intel_crt.c 20 KB

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  1. /*
  2. * Copyright © 2006-2007 Intel Corporation
  3. *
  4. * Permission is hereby granted, free of charge, to any person obtaining a
  5. * copy of this software and associated documentation files (the "Software"),
  6. * to deal in the Software without restriction, including without limitation
  7. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8. * and/or sell copies of the Software, and to permit persons to whom the
  9. * Software is furnished to do so, subject to the following conditions:
  10. *
  11. * The above copyright notice and this permission notice (including the next
  12. * paragraph) shall be included in all copies or substantial portions of the
  13. * Software.
  14. *
  15. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  18. * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20. * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  21. * DEALINGS IN THE SOFTWARE.
  22. *
  23. * Authors:
  24. * Eric Anholt <eric@anholt.net>
  25. */
  26. #include <linux/dmi.h>
  27. #include <linux/i2c.h>
  28. #include <linux/slab.h>
  29. #include "drmP.h"
  30. #include "drm.h"
  31. #include "drm_crtc.h"
  32. #include "drm_crtc_helper.h"
  33. #include "drm_edid.h"
  34. #include "intel_drv.h"
  35. #include "i915_drm.h"
  36. #include "i915_drv.h"
  37. /* Here's the desired hotplug mode */
  38. #define ADPA_HOTPLUG_BITS (ADPA_CRT_HOTPLUG_PERIOD_128 | \
  39. ADPA_CRT_HOTPLUG_WARMUP_10MS | \
  40. ADPA_CRT_HOTPLUG_SAMPLE_4S | \
  41. ADPA_CRT_HOTPLUG_VOLTAGE_50 | \
  42. ADPA_CRT_HOTPLUG_VOLREF_325MV | \
  43. ADPA_CRT_HOTPLUG_ENABLE)
  44. struct intel_crt {
  45. struct intel_encoder base;
  46. bool force_hotplug_required;
  47. u32 adpa_reg;
  48. };
  49. static struct intel_crt *intel_attached_crt(struct drm_connector *connector)
  50. {
  51. return container_of(intel_attached_encoder(connector),
  52. struct intel_crt, base);
  53. }
  54. static struct intel_crt *intel_encoder_to_crt(struct intel_encoder *encoder)
  55. {
  56. return container_of(encoder, struct intel_crt, base);
  57. }
  58. static void pch_crt_dpms(struct drm_encoder *encoder, int mode)
  59. {
  60. struct drm_device *dev = encoder->dev;
  61. struct drm_i915_private *dev_priv = dev->dev_private;
  62. u32 temp;
  63. temp = I915_READ(PCH_ADPA);
  64. temp &= ~ADPA_DAC_ENABLE;
  65. switch (mode) {
  66. case DRM_MODE_DPMS_ON:
  67. temp |= ADPA_DAC_ENABLE;
  68. break;
  69. case DRM_MODE_DPMS_STANDBY:
  70. case DRM_MODE_DPMS_SUSPEND:
  71. case DRM_MODE_DPMS_OFF:
  72. /* Just leave port enable cleared */
  73. break;
  74. }
  75. I915_WRITE(PCH_ADPA, temp);
  76. }
  77. static void gmch_crt_dpms(struct drm_encoder *encoder, int mode)
  78. {
  79. struct drm_device *dev = encoder->dev;
  80. struct drm_i915_private *dev_priv = dev->dev_private;
  81. u32 temp;
  82. temp = I915_READ(ADPA);
  83. temp &= ~(ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE);
  84. temp &= ~ADPA_DAC_ENABLE;
  85. if (IS_VALLEYVIEW(dev) && mode != DRM_MODE_DPMS_ON)
  86. mode = DRM_MODE_DPMS_OFF;
  87. switch (mode) {
  88. case DRM_MODE_DPMS_ON:
  89. temp |= ADPA_DAC_ENABLE;
  90. break;
  91. case DRM_MODE_DPMS_STANDBY:
  92. temp |= ADPA_DAC_ENABLE | ADPA_HSYNC_CNTL_DISABLE;
  93. break;
  94. case DRM_MODE_DPMS_SUSPEND:
  95. temp |= ADPA_DAC_ENABLE | ADPA_VSYNC_CNTL_DISABLE;
  96. break;
  97. case DRM_MODE_DPMS_OFF:
  98. temp |= ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE;
  99. break;
  100. }
  101. I915_WRITE(ADPA, temp);
  102. }
  103. static int intel_crt_mode_valid(struct drm_connector *connector,
  104. struct drm_display_mode *mode)
  105. {
  106. struct drm_device *dev = connector->dev;
  107. int max_clock = 0;
  108. if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
  109. return MODE_NO_DBLESCAN;
  110. if (mode->clock < 25000)
  111. return MODE_CLOCK_LOW;
  112. if (IS_GEN2(dev))
  113. max_clock = 350000;
  114. else
  115. max_clock = 400000;
  116. if (mode->clock > max_clock)
  117. return MODE_CLOCK_HIGH;
  118. return MODE_OK;
  119. }
  120. static bool intel_crt_mode_fixup(struct drm_encoder *encoder,
  121. const struct drm_display_mode *mode,
  122. struct drm_display_mode *adjusted_mode)
  123. {
  124. return true;
  125. }
  126. static void intel_crt_mode_set(struct drm_encoder *encoder,
  127. struct drm_display_mode *mode,
  128. struct drm_display_mode *adjusted_mode)
  129. {
  130. struct drm_device *dev = encoder->dev;
  131. struct drm_crtc *crtc = encoder->crtc;
  132. struct intel_crt *crt =
  133. intel_encoder_to_crt(to_intel_encoder(encoder));
  134. struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
  135. struct drm_i915_private *dev_priv = dev->dev_private;
  136. int dpll_md_reg;
  137. u32 adpa, dpll_md;
  138. dpll_md_reg = DPLL_MD(intel_crtc->pipe);
  139. /*
  140. * Disable separate mode multiplier used when cloning SDVO to CRT
  141. * XXX this needs to be adjusted when we really are cloning
  142. */
  143. if (INTEL_INFO(dev)->gen >= 4 && !HAS_PCH_SPLIT(dev)) {
  144. dpll_md = I915_READ(dpll_md_reg);
  145. I915_WRITE(dpll_md_reg,
  146. dpll_md & ~DPLL_MD_UDI_MULTIPLIER_MASK);
  147. }
  148. adpa = ADPA_HOTPLUG_BITS;
  149. if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
  150. adpa |= ADPA_HSYNC_ACTIVE_HIGH;
  151. if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
  152. adpa |= ADPA_VSYNC_ACTIVE_HIGH;
  153. /* For CPT allow 3 pipe config, for others just use A or B */
  154. if (HAS_PCH_CPT(dev))
  155. adpa |= PORT_TRANS_SEL_CPT(intel_crtc->pipe);
  156. else if (intel_crtc->pipe == 0)
  157. adpa |= ADPA_PIPE_A_SELECT;
  158. else
  159. adpa |= ADPA_PIPE_B_SELECT;
  160. if (!HAS_PCH_SPLIT(dev))
  161. I915_WRITE(BCLRPAT(intel_crtc->pipe), 0);
  162. I915_WRITE(crt->adpa_reg, adpa);
  163. }
  164. static bool intel_ironlake_crt_detect_hotplug(struct drm_connector *connector)
  165. {
  166. struct drm_device *dev = connector->dev;
  167. struct intel_crt *crt = intel_attached_crt(connector);
  168. struct drm_i915_private *dev_priv = dev->dev_private;
  169. u32 adpa;
  170. bool ret;
  171. /* The first time through, trigger an explicit detection cycle */
  172. if (crt->force_hotplug_required) {
  173. bool turn_off_dac = HAS_PCH_SPLIT(dev);
  174. u32 save_adpa;
  175. crt->force_hotplug_required = 0;
  176. save_adpa = adpa = I915_READ(PCH_ADPA);
  177. DRM_DEBUG_KMS("trigger hotplug detect cycle: adpa=0x%x\n", adpa);
  178. adpa |= ADPA_CRT_HOTPLUG_FORCE_TRIGGER;
  179. if (turn_off_dac)
  180. adpa &= ~ADPA_DAC_ENABLE;
  181. I915_WRITE(PCH_ADPA, adpa);
  182. if (wait_for((I915_READ(PCH_ADPA) & ADPA_CRT_HOTPLUG_FORCE_TRIGGER) == 0,
  183. 1000))
  184. DRM_DEBUG_KMS("timed out waiting for FORCE_TRIGGER");
  185. if (turn_off_dac) {
  186. I915_WRITE(PCH_ADPA, save_adpa);
  187. POSTING_READ(PCH_ADPA);
  188. }
  189. }
  190. /* Check the status to see if both blue and green are on now */
  191. adpa = I915_READ(PCH_ADPA);
  192. if ((adpa & ADPA_CRT_HOTPLUG_MONITOR_MASK) != 0)
  193. ret = true;
  194. else
  195. ret = false;
  196. DRM_DEBUG_KMS("ironlake hotplug adpa=0x%x, result %d\n", adpa, ret);
  197. return ret;
  198. }
  199. static bool valleyview_crt_detect_hotplug(struct drm_connector *connector)
  200. {
  201. struct drm_device *dev = connector->dev;
  202. struct drm_i915_private *dev_priv = dev->dev_private;
  203. u32 adpa;
  204. bool ret;
  205. u32 save_adpa;
  206. save_adpa = adpa = I915_READ(ADPA);
  207. DRM_DEBUG_KMS("trigger hotplug detect cycle: adpa=0x%x\n", adpa);
  208. adpa |= ADPA_CRT_HOTPLUG_FORCE_TRIGGER;
  209. I915_WRITE(ADPA, adpa);
  210. if (wait_for((I915_READ(ADPA) & ADPA_CRT_HOTPLUG_FORCE_TRIGGER) == 0,
  211. 1000)) {
  212. DRM_DEBUG_KMS("timed out waiting for FORCE_TRIGGER");
  213. I915_WRITE(ADPA, save_adpa);
  214. }
  215. /* Check the status to see if both blue and green are on now */
  216. adpa = I915_READ(ADPA);
  217. if ((adpa & ADPA_CRT_HOTPLUG_MONITOR_MASK) != 0)
  218. ret = true;
  219. else
  220. ret = false;
  221. DRM_DEBUG_KMS("valleyview hotplug adpa=0x%x, result %d\n", adpa, ret);
  222. /* FIXME: debug force function and remove */
  223. ret = true;
  224. return ret;
  225. }
  226. /**
  227. * Uses CRT_HOTPLUG_EN and CRT_HOTPLUG_STAT to detect CRT presence.
  228. *
  229. * Not for i915G/i915GM
  230. *
  231. * \return true if CRT is connected.
  232. * \return false if CRT is disconnected.
  233. */
  234. static bool intel_crt_detect_hotplug(struct drm_connector *connector)
  235. {
  236. struct drm_device *dev = connector->dev;
  237. struct drm_i915_private *dev_priv = dev->dev_private;
  238. u32 hotplug_en, orig, stat;
  239. bool ret = false;
  240. int i, tries = 0;
  241. if (HAS_PCH_SPLIT(dev))
  242. return intel_ironlake_crt_detect_hotplug(connector);
  243. if (IS_VALLEYVIEW(dev))
  244. return valleyview_crt_detect_hotplug(connector);
  245. /*
  246. * On 4 series desktop, CRT detect sequence need to be done twice
  247. * to get a reliable result.
  248. */
  249. if (IS_G4X(dev) && !IS_GM45(dev))
  250. tries = 2;
  251. else
  252. tries = 1;
  253. hotplug_en = orig = I915_READ(PORT_HOTPLUG_EN);
  254. hotplug_en |= CRT_HOTPLUG_FORCE_DETECT;
  255. for (i = 0; i < tries ; i++) {
  256. /* turn on the FORCE_DETECT */
  257. I915_WRITE(PORT_HOTPLUG_EN, hotplug_en);
  258. /* wait for FORCE_DETECT to go off */
  259. if (wait_for((I915_READ(PORT_HOTPLUG_EN) &
  260. CRT_HOTPLUG_FORCE_DETECT) == 0,
  261. 1000))
  262. DRM_DEBUG_KMS("timed out waiting for FORCE_DETECT to go off");
  263. }
  264. stat = I915_READ(PORT_HOTPLUG_STAT);
  265. if ((stat & CRT_HOTPLUG_MONITOR_MASK) != CRT_HOTPLUG_MONITOR_NONE)
  266. ret = true;
  267. /* clear the interrupt we just generated, if any */
  268. I915_WRITE(PORT_HOTPLUG_STAT, CRT_HOTPLUG_INT_STATUS);
  269. /* and put the bits back */
  270. I915_WRITE(PORT_HOTPLUG_EN, orig);
  271. return ret;
  272. }
  273. static struct edid *intel_crt_get_edid(struct drm_connector *connector,
  274. struct i2c_adapter *i2c)
  275. {
  276. struct edid *edid;
  277. edid = drm_get_edid(connector, i2c);
  278. if (!edid && !intel_gmbus_is_forced_bit(i2c)) {
  279. DRM_DEBUG_KMS("CRT GMBUS EDID read failed, retry using GPIO bit-banging\n");
  280. intel_gmbus_force_bit(i2c, true);
  281. edid = drm_get_edid(connector, i2c);
  282. intel_gmbus_force_bit(i2c, false);
  283. }
  284. return edid;
  285. }
  286. /* local version of intel_ddc_get_modes() to use intel_crt_get_edid() */
  287. static int intel_crt_ddc_get_modes(struct drm_connector *connector,
  288. struct i2c_adapter *adapter)
  289. {
  290. struct edid *edid;
  291. edid = intel_crt_get_edid(connector, adapter);
  292. if (!edid)
  293. return 0;
  294. return intel_connector_update_modes(connector, edid);
  295. }
  296. static bool intel_crt_detect_ddc(struct drm_connector *connector)
  297. {
  298. struct intel_crt *crt = intel_attached_crt(connector);
  299. struct drm_i915_private *dev_priv = crt->base.base.dev->dev_private;
  300. struct edid *edid;
  301. struct i2c_adapter *i2c;
  302. BUG_ON(crt->base.type != INTEL_OUTPUT_ANALOG);
  303. i2c = intel_gmbus_get_adapter(dev_priv, dev_priv->crt_ddc_pin);
  304. edid = intel_crt_get_edid(connector, i2c);
  305. if (edid) {
  306. bool is_digital = edid->input & DRM_EDID_INPUT_DIGITAL;
  307. /*
  308. * This may be a DVI-I connector with a shared DDC
  309. * link between analog and digital outputs, so we
  310. * have to check the EDID input spec of the attached device.
  311. */
  312. if (!is_digital) {
  313. DRM_DEBUG_KMS("CRT detected via DDC:0x50 [EDID]\n");
  314. return true;
  315. }
  316. DRM_DEBUG_KMS("CRT not detected via DDC:0x50 [EDID reports a digital panel]\n");
  317. } else {
  318. DRM_DEBUG_KMS("CRT not detected via DDC:0x50 [no valid EDID found]\n");
  319. }
  320. kfree(edid);
  321. return false;
  322. }
  323. static enum drm_connector_status
  324. intel_crt_load_detect(struct intel_crt *crt)
  325. {
  326. struct drm_device *dev = crt->base.base.dev;
  327. struct drm_i915_private *dev_priv = dev->dev_private;
  328. uint32_t pipe = to_intel_crtc(crt->base.base.crtc)->pipe;
  329. uint32_t save_bclrpat;
  330. uint32_t save_vtotal;
  331. uint32_t vtotal, vactive;
  332. uint32_t vsample;
  333. uint32_t vblank, vblank_start, vblank_end;
  334. uint32_t dsl;
  335. uint32_t bclrpat_reg;
  336. uint32_t vtotal_reg;
  337. uint32_t vblank_reg;
  338. uint32_t vsync_reg;
  339. uint32_t pipeconf_reg;
  340. uint32_t pipe_dsl_reg;
  341. uint8_t st00;
  342. enum drm_connector_status status;
  343. DRM_DEBUG_KMS("starting load-detect on CRT\n");
  344. bclrpat_reg = BCLRPAT(pipe);
  345. vtotal_reg = VTOTAL(pipe);
  346. vblank_reg = VBLANK(pipe);
  347. vsync_reg = VSYNC(pipe);
  348. pipeconf_reg = PIPECONF(pipe);
  349. pipe_dsl_reg = PIPEDSL(pipe);
  350. save_bclrpat = I915_READ(bclrpat_reg);
  351. save_vtotal = I915_READ(vtotal_reg);
  352. vblank = I915_READ(vblank_reg);
  353. vtotal = ((save_vtotal >> 16) & 0xfff) + 1;
  354. vactive = (save_vtotal & 0x7ff) + 1;
  355. vblank_start = (vblank & 0xfff) + 1;
  356. vblank_end = ((vblank >> 16) & 0xfff) + 1;
  357. /* Set the border color to purple. */
  358. I915_WRITE(bclrpat_reg, 0x500050);
  359. if (!IS_GEN2(dev)) {
  360. uint32_t pipeconf = I915_READ(pipeconf_reg);
  361. I915_WRITE(pipeconf_reg, pipeconf | PIPECONF_FORCE_BORDER);
  362. POSTING_READ(pipeconf_reg);
  363. /* Wait for next Vblank to substitue
  364. * border color for Color info */
  365. intel_wait_for_vblank(dev, pipe);
  366. st00 = I915_READ8(VGA_MSR_WRITE);
  367. status = ((st00 & (1 << 4)) != 0) ?
  368. connector_status_connected :
  369. connector_status_disconnected;
  370. I915_WRITE(pipeconf_reg, pipeconf);
  371. } else {
  372. bool restore_vblank = false;
  373. int count, detect;
  374. /*
  375. * If there isn't any border, add some.
  376. * Yes, this will flicker
  377. */
  378. if (vblank_start <= vactive && vblank_end >= vtotal) {
  379. uint32_t vsync = I915_READ(vsync_reg);
  380. uint32_t vsync_start = (vsync & 0xffff) + 1;
  381. vblank_start = vsync_start;
  382. I915_WRITE(vblank_reg,
  383. (vblank_start - 1) |
  384. ((vblank_end - 1) << 16));
  385. restore_vblank = true;
  386. }
  387. /* sample in the vertical border, selecting the larger one */
  388. if (vblank_start - vactive >= vtotal - vblank_end)
  389. vsample = (vblank_start + vactive) >> 1;
  390. else
  391. vsample = (vtotal + vblank_end) >> 1;
  392. /*
  393. * Wait for the border to be displayed
  394. */
  395. while (I915_READ(pipe_dsl_reg) >= vactive)
  396. ;
  397. while ((dsl = I915_READ(pipe_dsl_reg)) <= vsample)
  398. ;
  399. /*
  400. * Watch ST00 for an entire scanline
  401. */
  402. detect = 0;
  403. count = 0;
  404. do {
  405. count++;
  406. /* Read the ST00 VGA status register */
  407. st00 = I915_READ8(VGA_MSR_WRITE);
  408. if (st00 & (1 << 4))
  409. detect++;
  410. } while ((I915_READ(pipe_dsl_reg) == dsl));
  411. /* restore vblank if necessary */
  412. if (restore_vblank)
  413. I915_WRITE(vblank_reg, vblank);
  414. /*
  415. * If more than 3/4 of the scanline detected a monitor,
  416. * then it is assumed to be present. This works even on i830,
  417. * where there isn't any way to force the border color across
  418. * the screen
  419. */
  420. status = detect * 4 > count * 3 ?
  421. connector_status_connected :
  422. connector_status_disconnected;
  423. }
  424. /* Restore previous settings */
  425. I915_WRITE(bclrpat_reg, save_bclrpat);
  426. return status;
  427. }
  428. static enum drm_connector_status
  429. intel_crt_detect(struct drm_connector *connector, bool force)
  430. {
  431. struct drm_device *dev = connector->dev;
  432. struct intel_crt *crt = intel_attached_crt(connector);
  433. enum drm_connector_status status;
  434. struct intel_load_detect_pipe tmp;
  435. if (I915_HAS_HOTPLUG(dev)) {
  436. /* We can not rely on the HPD pin always being correctly wired
  437. * up, for example many KVM do not pass it through, and so
  438. * only trust an assertion that the monitor is connected.
  439. */
  440. if (intel_crt_detect_hotplug(connector)) {
  441. DRM_DEBUG_KMS("CRT detected via hotplug\n");
  442. return connector_status_connected;
  443. } else
  444. DRM_DEBUG_KMS("CRT not detected via hotplug\n");
  445. }
  446. if (intel_crt_detect_ddc(connector))
  447. return connector_status_connected;
  448. /* Load detection is broken on HPD capable machines. Whoever wants a
  449. * broken monitor (without edid) to work behind a broken kvm (that fails
  450. * to have the right resistors for HP detection) needs to fix this up.
  451. * For now just bail out. */
  452. if (I915_HAS_HOTPLUG(dev))
  453. return connector_status_disconnected;
  454. if (!force)
  455. return connector->status;
  456. /* for pre-945g platforms use load detect */
  457. if (intel_get_load_detect_pipe(connector, NULL, &tmp)) {
  458. if (intel_crt_detect_ddc(connector))
  459. status = connector_status_connected;
  460. else
  461. status = intel_crt_load_detect(crt);
  462. intel_release_load_detect_pipe(connector, &tmp);
  463. } else
  464. status = connector_status_unknown;
  465. return status;
  466. }
  467. static void intel_crt_destroy(struct drm_connector *connector)
  468. {
  469. drm_sysfs_connector_remove(connector);
  470. drm_connector_cleanup(connector);
  471. kfree(connector);
  472. }
  473. static int intel_crt_get_modes(struct drm_connector *connector)
  474. {
  475. struct drm_device *dev = connector->dev;
  476. struct drm_i915_private *dev_priv = dev->dev_private;
  477. int ret;
  478. struct i2c_adapter *i2c;
  479. i2c = intel_gmbus_get_adapter(dev_priv, dev_priv->crt_ddc_pin);
  480. ret = intel_crt_ddc_get_modes(connector, i2c);
  481. if (ret || !IS_G4X(dev))
  482. return ret;
  483. /* Try to probe digital port for output in DVI-I -> VGA mode. */
  484. i2c = intel_gmbus_get_adapter(dev_priv, GMBUS_PORT_DPB);
  485. return intel_crt_ddc_get_modes(connector, i2c);
  486. }
  487. static int intel_crt_set_property(struct drm_connector *connector,
  488. struct drm_property *property,
  489. uint64_t value)
  490. {
  491. return 0;
  492. }
  493. static void intel_crt_reset(struct drm_connector *connector)
  494. {
  495. struct drm_device *dev = connector->dev;
  496. struct intel_crt *crt = intel_attached_crt(connector);
  497. if (HAS_PCH_SPLIT(dev))
  498. crt->force_hotplug_required = 1;
  499. }
  500. /*
  501. * Routines for controlling stuff on the analog port
  502. */
  503. static const struct drm_encoder_helper_funcs pch_encoder_funcs = {
  504. .mode_fixup = intel_crt_mode_fixup,
  505. .prepare = intel_encoder_prepare,
  506. .commit = intel_encoder_commit,
  507. .mode_set = intel_crt_mode_set,
  508. .dpms = pch_crt_dpms,
  509. };
  510. static const struct drm_encoder_helper_funcs gmch_encoder_funcs = {
  511. .mode_fixup = intel_crt_mode_fixup,
  512. .prepare = intel_encoder_prepare,
  513. .commit = intel_encoder_commit,
  514. .mode_set = intel_crt_mode_set,
  515. .dpms = gmch_crt_dpms,
  516. };
  517. static const struct drm_connector_funcs intel_crt_connector_funcs = {
  518. .reset = intel_crt_reset,
  519. .dpms = drm_helper_connector_dpms,
  520. .detect = intel_crt_detect,
  521. .fill_modes = drm_helper_probe_single_connector_modes,
  522. .destroy = intel_crt_destroy,
  523. .set_property = intel_crt_set_property,
  524. };
  525. static const struct drm_connector_helper_funcs intel_crt_connector_helper_funcs = {
  526. .mode_valid = intel_crt_mode_valid,
  527. .get_modes = intel_crt_get_modes,
  528. .best_encoder = intel_best_encoder,
  529. };
  530. static const struct drm_encoder_funcs intel_crt_enc_funcs = {
  531. .destroy = intel_encoder_destroy,
  532. };
  533. static int __init intel_no_crt_dmi_callback(const struct dmi_system_id *id)
  534. {
  535. DRM_INFO("Skipping CRT initialization for %s\n", id->ident);
  536. return 1;
  537. }
  538. static const struct dmi_system_id intel_no_crt[] = {
  539. {
  540. .callback = intel_no_crt_dmi_callback,
  541. .ident = "ACER ZGB",
  542. .matches = {
  543. DMI_MATCH(DMI_SYS_VENDOR, "ACER"),
  544. DMI_MATCH(DMI_PRODUCT_NAME, "ZGB"),
  545. },
  546. },
  547. { }
  548. };
  549. void intel_crt_init(struct drm_device *dev)
  550. {
  551. struct drm_connector *connector;
  552. struct intel_crt *crt;
  553. struct intel_connector *intel_connector;
  554. struct drm_i915_private *dev_priv = dev->dev_private;
  555. const struct drm_encoder_helper_funcs *encoder_helper_funcs;
  556. /* Skip machines without VGA that falsely report hotplug events */
  557. if (dmi_check_system(intel_no_crt))
  558. return;
  559. crt = kzalloc(sizeof(struct intel_crt), GFP_KERNEL);
  560. if (!crt)
  561. return;
  562. intel_connector = kzalloc(sizeof(struct intel_connector), GFP_KERNEL);
  563. if (!intel_connector) {
  564. kfree(crt);
  565. return;
  566. }
  567. connector = &intel_connector->base;
  568. drm_connector_init(dev, &intel_connector->base,
  569. &intel_crt_connector_funcs, DRM_MODE_CONNECTOR_VGA);
  570. drm_encoder_init(dev, &crt->base.base, &intel_crt_enc_funcs,
  571. DRM_MODE_ENCODER_DAC);
  572. intel_connector_attach_encoder(intel_connector, &crt->base);
  573. crt->base.type = INTEL_OUTPUT_ANALOG;
  574. crt->base.cloneable = true;
  575. if (IS_HASWELL(dev))
  576. crt->base.crtc_mask = (1 << 0);
  577. else
  578. crt->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
  579. if (IS_GEN2(dev))
  580. connector->interlace_allowed = 0;
  581. else
  582. connector->interlace_allowed = 1;
  583. connector->doublescan_allowed = 0;
  584. if (HAS_PCH_SPLIT(dev))
  585. encoder_helper_funcs = &pch_encoder_funcs;
  586. else
  587. encoder_helper_funcs = &gmch_encoder_funcs;
  588. if (HAS_PCH_SPLIT(dev))
  589. crt->adpa_reg = PCH_ADPA;
  590. else if (IS_VALLEYVIEW(dev))
  591. crt->adpa_reg = VLV_ADPA;
  592. else
  593. crt->adpa_reg = ADPA;
  594. drm_encoder_helper_add(&crt->base.base, encoder_helper_funcs);
  595. drm_connector_helper_add(connector, &intel_crt_connector_helper_funcs);
  596. drm_sysfs_connector_add(connector);
  597. if (I915_HAS_HOTPLUG(dev))
  598. connector->polled = DRM_CONNECTOR_POLL_HPD;
  599. else
  600. connector->polled = DRM_CONNECTOR_POLL_CONNECT;
  601. /*
  602. * Configure the automatic hotplug detection stuff
  603. */
  604. crt->force_hotplug_required = 0;
  605. if (HAS_PCH_SPLIT(dev)) {
  606. u32 adpa;
  607. adpa = I915_READ(PCH_ADPA);
  608. adpa &= ~ADPA_CRT_HOTPLUG_MASK;
  609. adpa |= ADPA_HOTPLUG_BITS;
  610. I915_WRITE(PCH_ADPA, adpa);
  611. POSTING_READ(PCH_ADPA);
  612. DRM_DEBUG_KMS("pch crt adpa set to 0x%x\n", adpa);
  613. crt->force_hotplug_required = 1;
  614. }
  615. dev_priv->hotplug_supported_mask |= CRT_HOTPLUG_INT_STATUS;
  616. }