qla_init.c 121 KB

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  1. /*
  2. * QLogic Fibre Channel HBA Driver
  3. * Copyright (c) 2003-2008 QLogic Corporation
  4. *
  5. * See LICENSE.qla2xxx for copyright and licensing details.
  6. */
  7. #include "qla_def.h"
  8. #include "qla_gbl.h"
  9. #include <linux/delay.h>
  10. #include <linux/vmalloc.h>
  11. #include "qla_devtbl.h"
  12. #ifdef CONFIG_SPARC
  13. #include <asm/prom.h>
  14. #endif
  15. /*
  16. * QLogic ISP2x00 Hardware Support Function Prototypes.
  17. */
  18. static int qla2x00_isp_firmware(scsi_qla_host_t *);
  19. static void qla2x00_resize_request_q(scsi_qla_host_t *);
  20. static int qla2x00_setup_chip(scsi_qla_host_t *);
  21. static int qla2x00_init_rings(scsi_qla_host_t *);
  22. static int qla2x00_fw_ready(scsi_qla_host_t *);
  23. static int qla2x00_configure_hba(scsi_qla_host_t *);
  24. static int qla2x00_configure_loop(scsi_qla_host_t *);
  25. static int qla2x00_configure_local_loop(scsi_qla_host_t *);
  26. static int qla2x00_configure_fabric(scsi_qla_host_t *);
  27. static int qla2x00_find_all_fabric_devs(scsi_qla_host_t *, struct list_head *);
  28. static int qla2x00_device_resync(scsi_qla_host_t *);
  29. static int qla2x00_fabric_dev_login(scsi_qla_host_t *, fc_port_t *,
  30. uint16_t *);
  31. static int qla2x00_restart_isp(scsi_qla_host_t *);
  32. static int qla2x00_find_new_loop_id(scsi_qla_host_t *, fc_port_t *);
  33. static struct qla_chip_state_84xx *qla84xx_get_chip(struct scsi_qla_host *);
  34. static int qla84xx_init_chip(scsi_qla_host_t *);
  35. static int qla25xx_init_queues(struct qla_hw_data *);
  36. /****************************************************************************/
  37. /* QLogic ISP2x00 Hardware Support Functions. */
  38. /****************************************************************************/
  39. /*
  40. * qla2x00_initialize_adapter
  41. * Initialize board.
  42. *
  43. * Input:
  44. * ha = adapter block pointer.
  45. *
  46. * Returns:
  47. * 0 = success
  48. */
  49. int
  50. qla2x00_initialize_adapter(scsi_qla_host_t *vha)
  51. {
  52. int rval;
  53. struct qla_hw_data *ha = vha->hw;
  54. struct req_que *req = ha->req_q_map[0];
  55. /* Clear adapter flags. */
  56. vha->flags.online = 0;
  57. vha->flags.reset_active = 0;
  58. atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
  59. atomic_set(&vha->loop_state, LOOP_DOWN);
  60. vha->device_flags = DFLG_NO_CABLE;
  61. vha->dpc_flags = 0;
  62. vha->flags.management_server_logged_in = 0;
  63. vha->marker_needed = 0;
  64. ha->mbx_flags = 0;
  65. ha->isp_abort_cnt = 0;
  66. ha->beacon_blink_led = 0;
  67. set_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags);
  68. set_bit(0, ha->req_qid_map);
  69. set_bit(0, ha->rsp_qid_map);
  70. qla_printk(KERN_INFO, ha, "Configuring PCI space...\n");
  71. rval = ha->isp_ops->pci_config(vha);
  72. if (rval) {
  73. DEBUG2(printk("scsi(%ld): Unable to configure PCI space.\n",
  74. vha->host_no));
  75. return (rval);
  76. }
  77. ha->isp_ops->reset_chip(vha);
  78. rval = qla2xxx_get_flash_info(vha);
  79. if (rval) {
  80. DEBUG2(printk("scsi(%ld): Unable to validate FLASH data.\n",
  81. vha->host_no));
  82. return (rval);
  83. }
  84. ha->isp_ops->get_flash_version(vha, req->ring);
  85. qla_printk(KERN_INFO, ha, "Configure NVRAM parameters...\n");
  86. ha->isp_ops->nvram_config(vha);
  87. if (ha->flags.disable_serdes) {
  88. /* Mask HBA via NVRAM settings? */
  89. qla_printk(KERN_INFO, ha, "Masking HBA WWPN "
  90. "%02x%02x%02x%02x%02x%02x%02x%02x (via NVRAM).\n",
  91. vha->port_name[0], vha->port_name[1],
  92. vha->port_name[2], vha->port_name[3],
  93. vha->port_name[4], vha->port_name[5],
  94. vha->port_name[6], vha->port_name[7]);
  95. return QLA_FUNCTION_FAILED;
  96. }
  97. qla_printk(KERN_INFO, ha, "Verifying loaded RISC code...\n");
  98. if (qla2x00_isp_firmware(vha) != QLA_SUCCESS) {
  99. rval = ha->isp_ops->chip_diag(vha);
  100. if (rval)
  101. return (rval);
  102. rval = qla2x00_setup_chip(vha);
  103. if (rval)
  104. return (rval);
  105. }
  106. if (IS_QLA84XX(ha)) {
  107. ha->cs84xx = qla84xx_get_chip(vha);
  108. if (!ha->cs84xx) {
  109. qla_printk(KERN_ERR, ha,
  110. "Unable to configure ISP84XX.\n");
  111. return QLA_FUNCTION_FAILED;
  112. }
  113. }
  114. rval = qla2x00_init_rings(vha);
  115. return (rval);
  116. }
  117. /**
  118. * qla2100_pci_config() - Setup ISP21xx PCI configuration registers.
  119. * @ha: HA context
  120. *
  121. * Returns 0 on success.
  122. */
  123. int
  124. qla2100_pci_config(scsi_qla_host_t *vha)
  125. {
  126. uint16_t w;
  127. unsigned long flags;
  128. struct qla_hw_data *ha = vha->hw;
  129. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  130. pci_set_master(ha->pdev);
  131. pci_try_set_mwi(ha->pdev);
  132. pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
  133. w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
  134. pci_write_config_word(ha->pdev, PCI_COMMAND, w);
  135. pci_disable_rom(ha->pdev);
  136. /* Get PCI bus information. */
  137. spin_lock_irqsave(&ha->hardware_lock, flags);
  138. ha->pci_attr = RD_REG_WORD(&reg->ctrl_status);
  139. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  140. return QLA_SUCCESS;
  141. }
  142. /**
  143. * qla2300_pci_config() - Setup ISP23xx PCI configuration registers.
  144. * @ha: HA context
  145. *
  146. * Returns 0 on success.
  147. */
  148. int
  149. qla2300_pci_config(scsi_qla_host_t *vha)
  150. {
  151. uint16_t w;
  152. unsigned long flags = 0;
  153. uint32_t cnt;
  154. struct qla_hw_data *ha = vha->hw;
  155. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  156. pci_set_master(ha->pdev);
  157. pci_try_set_mwi(ha->pdev);
  158. pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
  159. w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
  160. if (IS_QLA2322(ha) || IS_QLA6322(ha))
  161. w &= ~PCI_COMMAND_INTX_DISABLE;
  162. pci_write_config_word(ha->pdev, PCI_COMMAND, w);
  163. /*
  164. * If this is a 2300 card and not 2312, reset the
  165. * COMMAND_INVALIDATE due to a bug in the 2300. Unfortunately,
  166. * the 2310 also reports itself as a 2300 so we need to get the
  167. * fb revision level -- a 6 indicates it really is a 2300 and
  168. * not a 2310.
  169. */
  170. if (IS_QLA2300(ha)) {
  171. spin_lock_irqsave(&ha->hardware_lock, flags);
  172. /* Pause RISC. */
  173. WRT_REG_WORD(&reg->hccr, HCCR_PAUSE_RISC);
  174. for (cnt = 0; cnt < 30000; cnt++) {
  175. if ((RD_REG_WORD(&reg->hccr) & HCCR_RISC_PAUSE) != 0)
  176. break;
  177. udelay(10);
  178. }
  179. /* Select FPM registers. */
  180. WRT_REG_WORD(&reg->ctrl_status, 0x20);
  181. RD_REG_WORD(&reg->ctrl_status);
  182. /* Get the fb rev level */
  183. ha->fb_rev = RD_FB_CMD_REG(ha, reg);
  184. if (ha->fb_rev == FPM_2300)
  185. pci_clear_mwi(ha->pdev);
  186. /* Deselect FPM registers. */
  187. WRT_REG_WORD(&reg->ctrl_status, 0x0);
  188. RD_REG_WORD(&reg->ctrl_status);
  189. /* Release RISC module. */
  190. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  191. for (cnt = 0; cnt < 30000; cnt++) {
  192. if ((RD_REG_WORD(&reg->hccr) & HCCR_RISC_PAUSE) == 0)
  193. break;
  194. udelay(10);
  195. }
  196. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  197. }
  198. pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80);
  199. pci_disable_rom(ha->pdev);
  200. /* Get PCI bus information. */
  201. spin_lock_irqsave(&ha->hardware_lock, flags);
  202. ha->pci_attr = RD_REG_WORD(&reg->ctrl_status);
  203. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  204. return QLA_SUCCESS;
  205. }
  206. /**
  207. * qla24xx_pci_config() - Setup ISP24xx PCI configuration registers.
  208. * @ha: HA context
  209. *
  210. * Returns 0 on success.
  211. */
  212. int
  213. qla24xx_pci_config(scsi_qla_host_t *vha)
  214. {
  215. uint16_t w;
  216. unsigned long flags = 0;
  217. struct qla_hw_data *ha = vha->hw;
  218. struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
  219. pci_set_master(ha->pdev);
  220. pci_try_set_mwi(ha->pdev);
  221. pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
  222. w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
  223. w &= ~PCI_COMMAND_INTX_DISABLE;
  224. pci_write_config_word(ha->pdev, PCI_COMMAND, w);
  225. pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80);
  226. /* PCI-X -- adjust Maximum Memory Read Byte Count (2048). */
  227. if (pci_find_capability(ha->pdev, PCI_CAP_ID_PCIX))
  228. pcix_set_mmrbc(ha->pdev, 2048);
  229. /* PCIe -- adjust Maximum Read Request Size (2048). */
  230. if (pci_find_capability(ha->pdev, PCI_CAP_ID_EXP))
  231. pcie_set_readrq(ha->pdev, 2048);
  232. pci_disable_rom(ha->pdev);
  233. ha->chip_revision = ha->pdev->revision;
  234. /* Get PCI bus information. */
  235. spin_lock_irqsave(&ha->hardware_lock, flags);
  236. ha->pci_attr = RD_REG_DWORD(&reg->ctrl_status);
  237. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  238. return QLA_SUCCESS;
  239. }
  240. /**
  241. * qla25xx_pci_config() - Setup ISP25xx PCI configuration registers.
  242. * @ha: HA context
  243. *
  244. * Returns 0 on success.
  245. */
  246. int
  247. qla25xx_pci_config(scsi_qla_host_t *vha)
  248. {
  249. uint16_t w;
  250. struct qla_hw_data *ha = vha->hw;
  251. pci_set_master(ha->pdev);
  252. pci_try_set_mwi(ha->pdev);
  253. pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
  254. w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
  255. w &= ~PCI_COMMAND_INTX_DISABLE;
  256. pci_write_config_word(ha->pdev, PCI_COMMAND, w);
  257. /* PCIe -- adjust Maximum Read Request Size (2048). */
  258. if (pci_find_capability(ha->pdev, PCI_CAP_ID_EXP))
  259. pcie_set_readrq(ha->pdev, 2048);
  260. pci_disable_rom(ha->pdev);
  261. ha->chip_revision = ha->pdev->revision;
  262. return QLA_SUCCESS;
  263. }
  264. /**
  265. * qla2x00_isp_firmware() - Choose firmware image.
  266. * @ha: HA context
  267. *
  268. * Returns 0 on success.
  269. */
  270. static int
  271. qla2x00_isp_firmware(scsi_qla_host_t *vha)
  272. {
  273. int rval;
  274. uint16_t loop_id, topo, sw_cap;
  275. uint8_t domain, area, al_pa;
  276. struct qla_hw_data *ha = vha->hw;
  277. /* Assume loading risc code */
  278. rval = QLA_FUNCTION_FAILED;
  279. if (ha->flags.disable_risc_code_load) {
  280. DEBUG2(printk("scsi(%ld): RISC CODE NOT loaded\n",
  281. vha->host_no));
  282. qla_printk(KERN_INFO, ha, "RISC CODE NOT loaded\n");
  283. /* Verify checksum of loaded RISC code. */
  284. rval = qla2x00_verify_checksum(vha, ha->fw_srisc_address);
  285. if (rval == QLA_SUCCESS) {
  286. /* And, verify we are not in ROM code. */
  287. rval = qla2x00_get_adapter_id(vha, &loop_id, &al_pa,
  288. &area, &domain, &topo, &sw_cap);
  289. }
  290. }
  291. if (rval) {
  292. DEBUG2_3(printk("scsi(%ld): **** Load RISC code ****\n",
  293. vha->host_no));
  294. }
  295. return (rval);
  296. }
  297. /**
  298. * qla2x00_reset_chip() - Reset ISP chip.
  299. * @ha: HA context
  300. *
  301. * Returns 0 on success.
  302. */
  303. void
  304. qla2x00_reset_chip(scsi_qla_host_t *vha)
  305. {
  306. unsigned long flags = 0;
  307. struct qla_hw_data *ha = vha->hw;
  308. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  309. uint32_t cnt;
  310. uint16_t cmd;
  311. ha->isp_ops->disable_intrs(ha);
  312. spin_lock_irqsave(&ha->hardware_lock, flags);
  313. /* Turn off master enable */
  314. cmd = 0;
  315. pci_read_config_word(ha->pdev, PCI_COMMAND, &cmd);
  316. cmd &= ~PCI_COMMAND_MASTER;
  317. pci_write_config_word(ha->pdev, PCI_COMMAND, cmd);
  318. if (!IS_QLA2100(ha)) {
  319. /* Pause RISC. */
  320. WRT_REG_WORD(&reg->hccr, HCCR_PAUSE_RISC);
  321. if (IS_QLA2200(ha) || IS_QLA2300(ha)) {
  322. for (cnt = 0; cnt < 30000; cnt++) {
  323. if ((RD_REG_WORD(&reg->hccr) &
  324. HCCR_RISC_PAUSE) != 0)
  325. break;
  326. udelay(100);
  327. }
  328. } else {
  329. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  330. udelay(10);
  331. }
  332. /* Select FPM registers. */
  333. WRT_REG_WORD(&reg->ctrl_status, 0x20);
  334. RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
  335. /* FPM Soft Reset. */
  336. WRT_REG_WORD(&reg->fpm_diag_config, 0x100);
  337. RD_REG_WORD(&reg->fpm_diag_config); /* PCI Posting. */
  338. /* Toggle Fpm Reset. */
  339. if (!IS_QLA2200(ha)) {
  340. WRT_REG_WORD(&reg->fpm_diag_config, 0x0);
  341. RD_REG_WORD(&reg->fpm_diag_config); /* PCI Posting. */
  342. }
  343. /* Select frame buffer registers. */
  344. WRT_REG_WORD(&reg->ctrl_status, 0x10);
  345. RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
  346. /* Reset frame buffer FIFOs. */
  347. if (IS_QLA2200(ha)) {
  348. WRT_FB_CMD_REG(ha, reg, 0xa000);
  349. RD_FB_CMD_REG(ha, reg); /* PCI Posting. */
  350. } else {
  351. WRT_FB_CMD_REG(ha, reg, 0x00fc);
  352. /* Read back fb_cmd until zero or 3 seconds max */
  353. for (cnt = 0; cnt < 3000; cnt++) {
  354. if ((RD_FB_CMD_REG(ha, reg) & 0xff) == 0)
  355. break;
  356. udelay(100);
  357. }
  358. }
  359. /* Select RISC module registers. */
  360. WRT_REG_WORD(&reg->ctrl_status, 0);
  361. RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
  362. /* Reset RISC processor. */
  363. WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
  364. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  365. /* Release RISC processor. */
  366. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  367. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  368. }
  369. WRT_REG_WORD(&reg->hccr, HCCR_CLR_RISC_INT);
  370. WRT_REG_WORD(&reg->hccr, HCCR_CLR_HOST_INT);
  371. /* Reset ISP chip. */
  372. WRT_REG_WORD(&reg->ctrl_status, CSR_ISP_SOFT_RESET);
  373. /* Wait for RISC to recover from reset. */
  374. if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
  375. /*
  376. * It is necessary to for a delay here since the card doesn't
  377. * respond to PCI reads during a reset. On some architectures
  378. * this will result in an MCA.
  379. */
  380. udelay(20);
  381. for (cnt = 30000; cnt; cnt--) {
  382. if ((RD_REG_WORD(&reg->ctrl_status) &
  383. CSR_ISP_SOFT_RESET) == 0)
  384. break;
  385. udelay(100);
  386. }
  387. } else
  388. udelay(10);
  389. /* Reset RISC processor. */
  390. WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
  391. WRT_REG_WORD(&reg->semaphore, 0);
  392. /* Release RISC processor. */
  393. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  394. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  395. if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
  396. for (cnt = 0; cnt < 30000; cnt++) {
  397. if (RD_MAILBOX_REG(ha, reg, 0) != MBS_BUSY)
  398. break;
  399. udelay(100);
  400. }
  401. } else
  402. udelay(100);
  403. /* Turn on master enable */
  404. cmd |= PCI_COMMAND_MASTER;
  405. pci_write_config_word(ha->pdev, PCI_COMMAND, cmd);
  406. /* Disable RISC pause on FPM parity error. */
  407. if (!IS_QLA2100(ha)) {
  408. WRT_REG_WORD(&reg->hccr, HCCR_DISABLE_PARITY_PAUSE);
  409. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  410. }
  411. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  412. }
  413. /**
  414. * qla24xx_reset_risc() - Perform full reset of ISP24xx RISC.
  415. * @ha: HA context
  416. *
  417. * Returns 0 on success.
  418. */
  419. static inline void
  420. qla24xx_reset_risc(scsi_qla_host_t *vha)
  421. {
  422. int hw_evt = 0;
  423. unsigned long flags = 0;
  424. struct qla_hw_data *ha = vha->hw;
  425. struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
  426. uint32_t cnt, d2;
  427. uint16_t wd;
  428. spin_lock_irqsave(&ha->hardware_lock, flags);
  429. /* Reset RISC. */
  430. WRT_REG_DWORD(&reg->ctrl_status, CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
  431. for (cnt = 0; cnt < 30000; cnt++) {
  432. if ((RD_REG_DWORD(&reg->ctrl_status) & CSRX_DMA_ACTIVE) == 0)
  433. break;
  434. udelay(10);
  435. }
  436. WRT_REG_DWORD(&reg->ctrl_status,
  437. CSRX_ISP_SOFT_RESET|CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
  438. pci_read_config_word(ha->pdev, PCI_COMMAND, &wd);
  439. udelay(100);
  440. /* Wait for firmware to complete NVRAM accesses. */
  441. d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
  442. for (cnt = 10000 ; cnt && d2; cnt--) {
  443. udelay(5);
  444. d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
  445. barrier();
  446. }
  447. if (cnt == 0)
  448. hw_evt = 1;
  449. /* Wait for soft-reset to complete. */
  450. d2 = RD_REG_DWORD(&reg->ctrl_status);
  451. for (cnt = 6000000 ; cnt && (d2 & CSRX_ISP_SOFT_RESET); cnt--) {
  452. udelay(5);
  453. d2 = RD_REG_DWORD(&reg->ctrl_status);
  454. barrier();
  455. }
  456. WRT_REG_DWORD(&reg->hccr, HCCRX_SET_RISC_RESET);
  457. RD_REG_DWORD(&reg->hccr);
  458. WRT_REG_DWORD(&reg->hccr, HCCRX_REL_RISC_PAUSE);
  459. RD_REG_DWORD(&reg->hccr);
  460. WRT_REG_DWORD(&reg->hccr, HCCRX_CLR_RISC_RESET);
  461. RD_REG_DWORD(&reg->hccr);
  462. d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
  463. for (cnt = 6000000 ; cnt && d2; cnt--) {
  464. udelay(5);
  465. d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
  466. barrier();
  467. }
  468. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  469. if (IS_NOPOLLING_TYPE(ha))
  470. ha->isp_ops->enable_intrs(ha);
  471. }
  472. /**
  473. * qla24xx_reset_chip() - Reset ISP24xx chip.
  474. * @ha: HA context
  475. *
  476. * Returns 0 on success.
  477. */
  478. void
  479. qla24xx_reset_chip(scsi_qla_host_t *vha)
  480. {
  481. struct qla_hw_data *ha = vha->hw;
  482. ha->isp_ops->disable_intrs(ha);
  483. /* Perform RISC reset. */
  484. qla24xx_reset_risc(vha);
  485. }
  486. /**
  487. * qla2x00_chip_diag() - Test chip for proper operation.
  488. * @ha: HA context
  489. *
  490. * Returns 0 on success.
  491. */
  492. int
  493. qla2x00_chip_diag(scsi_qla_host_t *vha)
  494. {
  495. int rval;
  496. struct qla_hw_data *ha = vha->hw;
  497. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  498. unsigned long flags = 0;
  499. uint16_t data;
  500. uint32_t cnt;
  501. uint16_t mb[5];
  502. struct req_que *req = ha->req_q_map[0];
  503. /* Assume a failed state */
  504. rval = QLA_FUNCTION_FAILED;
  505. DEBUG3(printk("scsi(%ld): Testing device at %lx.\n",
  506. vha->host_no, (u_long)&reg->flash_address));
  507. spin_lock_irqsave(&ha->hardware_lock, flags);
  508. /* Reset ISP chip. */
  509. WRT_REG_WORD(&reg->ctrl_status, CSR_ISP_SOFT_RESET);
  510. /*
  511. * We need to have a delay here since the card will not respond while
  512. * in reset causing an MCA on some architectures.
  513. */
  514. udelay(20);
  515. data = qla2x00_debounce_register(&reg->ctrl_status);
  516. for (cnt = 6000000 ; cnt && (data & CSR_ISP_SOFT_RESET); cnt--) {
  517. udelay(5);
  518. data = RD_REG_WORD(&reg->ctrl_status);
  519. barrier();
  520. }
  521. if (!cnt)
  522. goto chip_diag_failed;
  523. DEBUG3(printk("scsi(%ld): Reset register cleared by chip reset\n",
  524. ha->host_no));
  525. /* Reset RISC processor. */
  526. WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
  527. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  528. /* Workaround for QLA2312 PCI parity error */
  529. if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
  530. data = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 0));
  531. for (cnt = 6000000; cnt && (data == MBS_BUSY); cnt--) {
  532. udelay(5);
  533. data = RD_MAILBOX_REG(ha, reg, 0);
  534. barrier();
  535. }
  536. } else
  537. udelay(10);
  538. if (!cnt)
  539. goto chip_diag_failed;
  540. /* Check product ID of chip */
  541. DEBUG3(printk("scsi(%ld): Checking product ID of chip\n", ha->host_no));
  542. mb[1] = RD_MAILBOX_REG(ha, reg, 1);
  543. mb[2] = RD_MAILBOX_REG(ha, reg, 2);
  544. mb[3] = RD_MAILBOX_REG(ha, reg, 3);
  545. mb[4] = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 4));
  546. if (mb[1] != PROD_ID_1 || (mb[2] != PROD_ID_2 && mb[2] != PROD_ID_2a) ||
  547. mb[3] != PROD_ID_3) {
  548. qla_printk(KERN_WARNING, ha,
  549. "Wrong product ID = 0x%x,0x%x,0x%x\n", mb[1], mb[2], mb[3]);
  550. goto chip_diag_failed;
  551. }
  552. ha->product_id[0] = mb[1];
  553. ha->product_id[1] = mb[2];
  554. ha->product_id[2] = mb[3];
  555. ha->product_id[3] = mb[4];
  556. /* Adjust fw RISC transfer size */
  557. if (req->length > 1024)
  558. ha->fw_transfer_size = REQUEST_ENTRY_SIZE * 1024;
  559. else
  560. ha->fw_transfer_size = REQUEST_ENTRY_SIZE *
  561. req->length;
  562. if (IS_QLA2200(ha) &&
  563. RD_MAILBOX_REG(ha, reg, 7) == QLA2200A_RISC_ROM_VER) {
  564. /* Limit firmware transfer size with a 2200A */
  565. DEBUG3(printk("scsi(%ld): Found QLA2200A chip.\n",
  566. vha->host_no));
  567. ha->device_type |= DT_ISP2200A;
  568. ha->fw_transfer_size = 128;
  569. }
  570. /* Wrap Incoming Mailboxes Test. */
  571. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  572. DEBUG3(printk("scsi(%ld): Checking mailboxes.\n", vha->host_no));
  573. rval = qla2x00_mbx_reg_test(vha);
  574. if (rval) {
  575. DEBUG(printk("scsi(%ld): Failed mailbox send register test\n",
  576. vha->host_no));
  577. qla_printk(KERN_WARNING, ha,
  578. "Failed mailbox send register test\n");
  579. }
  580. else {
  581. /* Flag a successful rval */
  582. rval = QLA_SUCCESS;
  583. }
  584. spin_lock_irqsave(&ha->hardware_lock, flags);
  585. chip_diag_failed:
  586. if (rval)
  587. DEBUG2_3(printk("scsi(%ld): Chip diagnostics **** FAILED "
  588. "****\n", vha->host_no));
  589. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  590. return (rval);
  591. }
  592. /**
  593. * qla24xx_chip_diag() - Test ISP24xx for proper operation.
  594. * @ha: HA context
  595. *
  596. * Returns 0 on success.
  597. */
  598. int
  599. qla24xx_chip_diag(scsi_qla_host_t *vha)
  600. {
  601. int rval;
  602. struct qla_hw_data *ha = vha->hw;
  603. struct req_que *req = ha->req_q_map[0];
  604. /* Perform RISC reset. */
  605. qla24xx_reset_risc(vha);
  606. ha->fw_transfer_size = REQUEST_ENTRY_SIZE * req->length;
  607. rval = qla2x00_mbx_reg_test(vha);
  608. if (rval) {
  609. DEBUG(printk("scsi(%ld): Failed mailbox send register test\n",
  610. vha->host_no));
  611. qla_printk(KERN_WARNING, ha,
  612. "Failed mailbox send register test\n");
  613. } else {
  614. /* Flag a successful rval */
  615. rval = QLA_SUCCESS;
  616. }
  617. return rval;
  618. }
  619. void
  620. qla2x00_alloc_fw_dump(scsi_qla_host_t *vha)
  621. {
  622. int rval;
  623. uint32_t dump_size, fixed_size, mem_size, req_q_size, rsp_q_size,
  624. eft_size, fce_size, mq_size;
  625. dma_addr_t tc_dma;
  626. void *tc;
  627. struct qla_hw_data *ha = vha->hw;
  628. struct req_que *req = ha->req_q_map[0];
  629. struct rsp_que *rsp = ha->rsp_q_map[0];
  630. if (ha->fw_dump) {
  631. qla_printk(KERN_WARNING, ha,
  632. "Firmware dump previously allocated.\n");
  633. return;
  634. }
  635. ha->fw_dumped = 0;
  636. fixed_size = mem_size = eft_size = fce_size = mq_size = 0;
  637. if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
  638. fixed_size = sizeof(struct qla2100_fw_dump);
  639. } else if (IS_QLA23XX(ha)) {
  640. fixed_size = offsetof(struct qla2300_fw_dump, data_ram);
  641. mem_size = (ha->fw_memory_size - 0x11000 + 1) *
  642. sizeof(uint16_t);
  643. } else if (IS_FWI2_CAPABLE(ha)) {
  644. if (IS_QLA81XX(ha))
  645. fixed_size = offsetof(struct qla81xx_fw_dump, ext_mem);
  646. else if (IS_QLA25XX(ha))
  647. fixed_size = offsetof(struct qla25xx_fw_dump, ext_mem);
  648. else
  649. fixed_size = offsetof(struct qla24xx_fw_dump, ext_mem);
  650. mem_size = (ha->fw_memory_size - 0x100000 + 1) *
  651. sizeof(uint32_t);
  652. if (ha->mqenable)
  653. mq_size = sizeof(struct qla2xxx_mq_chain);
  654. /* Allocate memory for Fibre Channel Event Buffer. */
  655. if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha))
  656. goto try_eft;
  657. tc = dma_alloc_coherent(&ha->pdev->dev, FCE_SIZE, &tc_dma,
  658. GFP_KERNEL);
  659. if (!tc) {
  660. qla_printk(KERN_WARNING, ha, "Unable to allocate "
  661. "(%d KB) for FCE.\n", FCE_SIZE / 1024);
  662. goto try_eft;
  663. }
  664. memset(tc, 0, FCE_SIZE);
  665. rval = qla2x00_enable_fce_trace(vha, tc_dma, FCE_NUM_BUFFERS,
  666. ha->fce_mb, &ha->fce_bufs);
  667. if (rval) {
  668. qla_printk(KERN_WARNING, ha, "Unable to initialize "
  669. "FCE (%d).\n", rval);
  670. dma_free_coherent(&ha->pdev->dev, FCE_SIZE, tc,
  671. tc_dma);
  672. ha->flags.fce_enabled = 0;
  673. goto try_eft;
  674. }
  675. qla_printk(KERN_INFO, ha, "Allocated (%d KB) for FCE...\n",
  676. FCE_SIZE / 1024);
  677. fce_size = sizeof(struct qla2xxx_fce_chain) + FCE_SIZE;
  678. ha->flags.fce_enabled = 1;
  679. ha->fce_dma = tc_dma;
  680. ha->fce = tc;
  681. try_eft:
  682. /* Allocate memory for Extended Trace Buffer. */
  683. tc = dma_alloc_coherent(&ha->pdev->dev, EFT_SIZE, &tc_dma,
  684. GFP_KERNEL);
  685. if (!tc) {
  686. qla_printk(KERN_WARNING, ha, "Unable to allocate "
  687. "(%d KB) for EFT.\n", EFT_SIZE / 1024);
  688. goto cont_alloc;
  689. }
  690. memset(tc, 0, EFT_SIZE);
  691. rval = qla2x00_enable_eft_trace(vha, tc_dma, EFT_NUM_BUFFERS);
  692. if (rval) {
  693. qla_printk(KERN_WARNING, ha, "Unable to initialize "
  694. "EFT (%d).\n", rval);
  695. dma_free_coherent(&ha->pdev->dev, EFT_SIZE, tc,
  696. tc_dma);
  697. goto cont_alloc;
  698. }
  699. qla_printk(KERN_INFO, ha, "Allocated (%d KB) for EFT...\n",
  700. EFT_SIZE / 1024);
  701. eft_size = EFT_SIZE;
  702. ha->eft_dma = tc_dma;
  703. ha->eft = tc;
  704. }
  705. cont_alloc:
  706. req_q_size = req->length * sizeof(request_t);
  707. rsp_q_size = rsp->length * sizeof(response_t);
  708. dump_size = offsetof(struct qla2xxx_fw_dump, isp);
  709. dump_size += fixed_size + mem_size + req_q_size + rsp_q_size +
  710. eft_size;
  711. ha->chain_offset = dump_size;
  712. dump_size += mq_size + fce_size;
  713. ha->fw_dump = vmalloc(dump_size);
  714. if (!ha->fw_dump) {
  715. qla_printk(KERN_WARNING, ha, "Unable to allocate (%d KB) for "
  716. "firmware dump!!!\n", dump_size / 1024);
  717. if (ha->eft) {
  718. dma_free_coherent(&ha->pdev->dev, eft_size, ha->eft,
  719. ha->eft_dma);
  720. ha->eft = NULL;
  721. ha->eft_dma = 0;
  722. }
  723. return;
  724. }
  725. qla_printk(KERN_INFO, ha, "Allocated (%d KB) for firmware dump...\n",
  726. dump_size / 1024);
  727. ha->fw_dump_len = dump_size;
  728. ha->fw_dump->signature[0] = 'Q';
  729. ha->fw_dump->signature[1] = 'L';
  730. ha->fw_dump->signature[2] = 'G';
  731. ha->fw_dump->signature[3] = 'C';
  732. ha->fw_dump->version = __constant_htonl(1);
  733. ha->fw_dump->fixed_size = htonl(fixed_size);
  734. ha->fw_dump->mem_size = htonl(mem_size);
  735. ha->fw_dump->req_q_size = htonl(req_q_size);
  736. ha->fw_dump->rsp_q_size = htonl(rsp_q_size);
  737. ha->fw_dump->eft_size = htonl(eft_size);
  738. ha->fw_dump->eft_addr_l = htonl(LSD(ha->eft_dma));
  739. ha->fw_dump->eft_addr_h = htonl(MSD(ha->eft_dma));
  740. ha->fw_dump->header_size =
  741. htonl(offsetof(struct qla2xxx_fw_dump, isp));
  742. }
  743. /**
  744. * qla2x00_resize_request_q() - Resize request queue given available ISP memory.
  745. * @ha: HA context
  746. *
  747. * Returns 0 on success.
  748. */
  749. static void
  750. qla2x00_resize_request_q(scsi_qla_host_t *vha)
  751. {
  752. int rval;
  753. uint16_t fw_iocb_cnt = 0;
  754. uint16_t request_q_length = REQUEST_ENTRY_CNT_2XXX_EXT_MEM;
  755. dma_addr_t request_dma;
  756. request_t *request_ring;
  757. struct qla_hw_data *ha = vha->hw;
  758. struct req_que *req = ha->req_q_map[0];
  759. /* Valid only on recent ISPs. */
  760. if (IS_QLA2100(ha) || IS_QLA2200(ha))
  761. return;
  762. /* Retrieve IOCB counts available to the firmware. */
  763. rval = qla2x00_get_resource_cnts(vha, NULL, NULL, NULL, &fw_iocb_cnt,
  764. &ha->max_npiv_vports);
  765. if (rval)
  766. return;
  767. /* No point in continuing if current settings are sufficient. */
  768. if (fw_iocb_cnt < 1024)
  769. return;
  770. if (req->length >= request_q_length)
  771. return;
  772. /* Attempt to claim larger area for request queue. */
  773. request_ring = dma_alloc_coherent(&ha->pdev->dev,
  774. (request_q_length + 1) * sizeof(request_t), &request_dma,
  775. GFP_KERNEL);
  776. if (request_ring == NULL)
  777. return;
  778. /* Resize successful, report extensions. */
  779. qla_printk(KERN_INFO, ha, "Extended memory detected (%d KB)...\n",
  780. (ha->fw_memory_size + 1) / 1024);
  781. qla_printk(KERN_INFO, ha, "Resizing request queue depth "
  782. "(%d -> %d)...\n", req->length, request_q_length);
  783. /* Clear old allocations. */
  784. dma_free_coherent(&ha->pdev->dev,
  785. (req->length + 1) * sizeof(request_t), req->ring,
  786. req->dma);
  787. /* Begin using larger queue. */
  788. req->length = request_q_length;
  789. req->ring = request_ring;
  790. req->dma = request_dma;
  791. }
  792. /**
  793. * qla2x00_setup_chip() - Load and start RISC firmware.
  794. * @ha: HA context
  795. *
  796. * Returns 0 on success.
  797. */
  798. static int
  799. qla2x00_setup_chip(scsi_qla_host_t *vha)
  800. {
  801. int rval;
  802. uint32_t srisc_address = 0;
  803. struct qla_hw_data *ha = vha->hw;
  804. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  805. unsigned long flags;
  806. uint16_t fw_major_version;
  807. if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) {
  808. /* Disable SRAM, Instruction RAM and GP RAM parity. */
  809. spin_lock_irqsave(&ha->hardware_lock, flags);
  810. WRT_REG_WORD(&reg->hccr, (HCCR_ENABLE_PARITY + 0x0));
  811. RD_REG_WORD(&reg->hccr);
  812. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  813. }
  814. /* Load firmware sequences */
  815. rval = ha->isp_ops->load_risc(vha, &srisc_address);
  816. if (rval == QLA_SUCCESS) {
  817. DEBUG(printk("scsi(%ld): Verifying Checksum of loaded RISC "
  818. "code.\n", vha->host_no));
  819. rval = qla2x00_verify_checksum(vha, srisc_address);
  820. if (rval == QLA_SUCCESS) {
  821. /* Start firmware execution. */
  822. DEBUG(printk("scsi(%ld): Checksum OK, start "
  823. "firmware.\n", vha->host_no));
  824. rval = qla2x00_execute_fw(vha, srisc_address);
  825. /* Retrieve firmware information. */
  826. if (rval == QLA_SUCCESS) {
  827. fw_major_version = ha->fw_major_version;
  828. qla2x00_get_fw_version(vha,
  829. &ha->fw_major_version,
  830. &ha->fw_minor_version,
  831. &ha->fw_subminor_version,
  832. &ha->fw_attributes, &ha->fw_memory_size,
  833. ha->mpi_version, &ha->mpi_capabilities);
  834. ha->flags.npiv_supported = 0;
  835. if (IS_QLA2XXX_MIDTYPE(ha) &&
  836. (ha->fw_attributes & BIT_2)) {
  837. ha->flags.npiv_supported = 1;
  838. if ((!ha->max_npiv_vports) ||
  839. ((ha->max_npiv_vports + 1) %
  840. MIN_MULTI_ID_FABRIC))
  841. ha->max_npiv_vports =
  842. MIN_MULTI_ID_FABRIC - 1;
  843. }
  844. if (!fw_major_version) {
  845. qla2x00_resize_request_q(vha);
  846. if (ql2xallocfwdump)
  847. qla2x00_alloc_fw_dump(vha);
  848. }
  849. }
  850. } else {
  851. DEBUG2(printk(KERN_INFO
  852. "scsi(%ld): ISP Firmware failed checksum.\n",
  853. vha->host_no));
  854. }
  855. }
  856. if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) {
  857. /* Enable proper parity. */
  858. spin_lock_irqsave(&ha->hardware_lock, flags);
  859. if (IS_QLA2300(ha))
  860. /* SRAM parity */
  861. WRT_REG_WORD(&reg->hccr, HCCR_ENABLE_PARITY + 0x1);
  862. else
  863. /* SRAM, Instruction RAM and GP RAM parity */
  864. WRT_REG_WORD(&reg->hccr, HCCR_ENABLE_PARITY + 0x7);
  865. RD_REG_WORD(&reg->hccr);
  866. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  867. }
  868. if (rval) {
  869. DEBUG2_3(printk("scsi(%ld): Setup chip **** FAILED ****.\n",
  870. vha->host_no));
  871. }
  872. return (rval);
  873. }
  874. /**
  875. * qla2x00_init_response_q_entries() - Initializes response queue entries.
  876. * @ha: HA context
  877. *
  878. * Beginning of request ring has initialization control block already built
  879. * by nvram config routine.
  880. *
  881. * Returns 0 on success.
  882. */
  883. void
  884. qla2x00_init_response_q_entries(struct rsp_que *rsp)
  885. {
  886. uint16_t cnt;
  887. response_t *pkt;
  888. pkt = rsp->ring_ptr;
  889. for (cnt = 0; cnt < rsp->length; cnt++) {
  890. pkt->signature = RESPONSE_PROCESSED;
  891. pkt++;
  892. }
  893. }
  894. /**
  895. * qla2x00_update_fw_options() - Read and process firmware options.
  896. * @ha: HA context
  897. *
  898. * Returns 0 on success.
  899. */
  900. void
  901. qla2x00_update_fw_options(scsi_qla_host_t *vha)
  902. {
  903. uint16_t swing, emphasis, tx_sens, rx_sens;
  904. struct qla_hw_data *ha = vha->hw;
  905. memset(ha->fw_options, 0, sizeof(ha->fw_options));
  906. qla2x00_get_fw_options(vha, ha->fw_options);
  907. if (IS_QLA2100(ha) || IS_QLA2200(ha))
  908. return;
  909. /* Serial Link options. */
  910. DEBUG3(printk("scsi(%ld): Serial link options:\n",
  911. vha->host_no));
  912. DEBUG3(qla2x00_dump_buffer((uint8_t *)&ha->fw_seriallink_options,
  913. sizeof(ha->fw_seriallink_options)));
  914. ha->fw_options[1] &= ~FO1_SET_EMPHASIS_SWING;
  915. if (ha->fw_seriallink_options[3] & BIT_2) {
  916. ha->fw_options[1] |= FO1_SET_EMPHASIS_SWING;
  917. /* 1G settings */
  918. swing = ha->fw_seriallink_options[2] & (BIT_2 | BIT_1 | BIT_0);
  919. emphasis = (ha->fw_seriallink_options[2] &
  920. (BIT_4 | BIT_3)) >> 3;
  921. tx_sens = ha->fw_seriallink_options[0] &
  922. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  923. rx_sens = (ha->fw_seriallink_options[0] &
  924. (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4;
  925. ha->fw_options[10] = (emphasis << 14) | (swing << 8);
  926. if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
  927. if (rx_sens == 0x0)
  928. rx_sens = 0x3;
  929. ha->fw_options[10] |= (tx_sens << 4) | rx_sens;
  930. } else if (IS_QLA2322(ha) || IS_QLA6322(ha))
  931. ha->fw_options[10] |= BIT_5 |
  932. ((rx_sens & (BIT_1 | BIT_0)) << 2) |
  933. (tx_sens & (BIT_1 | BIT_0));
  934. /* 2G settings */
  935. swing = (ha->fw_seriallink_options[2] &
  936. (BIT_7 | BIT_6 | BIT_5)) >> 5;
  937. emphasis = ha->fw_seriallink_options[3] & (BIT_1 | BIT_0);
  938. tx_sens = ha->fw_seriallink_options[1] &
  939. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  940. rx_sens = (ha->fw_seriallink_options[1] &
  941. (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4;
  942. ha->fw_options[11] = (emphasis << 14) | (swing << 8);
  943. if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
  944. if (rx_sens == 0x0)
  945. rx_sens = 0x3;
  946. ha->fw_options[11] |= (tx_sens << 4) | rx_sens;
  947. } else if (IS_QLA2322(ha) || IS_QLA6322(ha))
  948. ha->fw_options[11] |= BIT_5 |
  949. ((rx_sens & (BIT_1 | BIT_0)) << 2) |
  950. (tx_sens & (BIT_1 | BIT_0));
  951. }
  952. /* FCP2 options. */
  953. /* Return command IOCBs without waiting for an ABTS to complete. */
  954. ha->fw_options[3] |= BIT_13;
  955. /* LED scheme. */
  956. if (ha->flags.enable_led_scheme)
  957. ha->fw_options[2] |= BIT_12;
  958. /* Detect ISP6312. */
  959. if (IS_QLA6312(ha))
  960. ha->fw_options[2] |= BIT_13;
  961. /* Update firmware options. */
  962. qla2x00_set_fw_options(vha, ha->fw_options);
  963. }
  964. void
  965. qla24xx_update_fw_options(scsi_qla_host_t *vha)
  966. {
  967. int rval;
  968. struct qla_hw_data *ha = vha->hw;
  969. /* Update Serial Link options. */
  970. if ((le16_to_cpu(ha->fw_seriallink_options24[0]) & BIT_0) == 0)
  971. return;
  972. rval = qla2x00_set_serdes_params(vha,
  973. le16_to_cpu(ha->fw_seriallink_options24[1]),
  974. le16_to_cpu(ha->fw_seriallink_options24[2]),
  975. le16_to_cpu(ha->fw_seriallink_options24[3]));
  976. if (rval != QLA_SUCCESS) {
  977. qla_printk(KERN_WARNING, ha,
  978. "Unable to update Serial Link options (%x).\n", rval);
  979. }
  980. }
  981. void
  982. qla2x00_config_rings(struct scsi_qla_host *vha)
  983. {
  984. struct qla_hw_data *ha = vha->hw;
  985. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  986. struct req_que *req = ha->req_q_map[0];
  987. struct rsp_que *rsp = ha->rsp_q_map[0];
  988. /* Setup ring parameters in initialization control block. */
  989. ha->init_cb->request_q_outpointer = __constant_cpu_to_le16(0);
  990. ha->init_cb->response_q_inpointer = __constant_cpu_to_le16(0);
  991. ha->init_cb->request_q_length = cpu_to_le16(req->length);
  992. ha->init_cb->response_q_length = cpu_to_le16(rsp->length);
  993. ha->init_cb->request_q_address[0] = cpu_to_le32(LSD(req->dma));
  994. ha->init_cb->request_q_address[1] = cpu_to_le32(MSD(req->dma));
  995. ha->init_cb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma));
  996. ha->init_cb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma));
  997. WRT_REG_WORD(ISP_REQ_Q_IN(ha, reg), 0);
  998. WRT_REG_WORD(ISP_REQ_Q_OUT(ha, reg), 0);
  999. WRT_REG_WORD(ISP_RSP_Q_IN(ha, reg), 0);
  1000. WRT_REG_WORD(ISP_RSP_Q_OUT(ha, reg), 0);
  1001. RD_REG_WORD(ISP_RSP_Q_OUT(ha, reg)); /* PCI Posting. */
  1002. }
  1003. void
  1004. qla24xx_config_rings(struct scsi_qla_host *vha)
  1005. {
  1006. struct qla_hw_data *ha = vha->hw;
  1007. device_reg_t __iomem *reg = ISP_QUE_REG(ha, 0);
  1008. struct device_reg_2xxx __iomem *ioreg = &ha->iobase->isp;
  1009. struct qla_msix_entry *msix;
  1010. struct init_cb_24xx *icb;
  1011. uint16_t rid = 0;
  1012. struct req_que *req = ha->req_q_map[0];
  1013. struct rsp_que *rsp = ha->rsp_q_map[0];
  1014. /* Setup ring parameters in initialization control block. */
  1015. icb = (struct init_cb_24xx *)ha->init_cb;
  1016. icb->request_q_outpointer = __constant_cpu_to_le16(0);
  1017. icb->response_q_inpointer = __constant_cpu_to_le16(0);
  1018. icb->request_q_length = cpu_to_le16(req->length);
  1019. icb->response_q_length = cpu_to_le16(rsp->length);
  1020. icb->request_q_address[0] = cpu_to_le32(LSD(req->dma));
  1021. icb->request_q_address[1] = cpu_to_le32(MSD(req->dma));
  1022. icb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma));
  1023. icb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma));
  1024. if (ha->mqenable) {
  1025. icb->qos = __constant_cpu_to_le16(QLA_DEFAULT_QUE_QOS);
  1026. icb->rid = __constant_cpu_to_le16(rid);
  1027. if (ha->flags.msix_enabled) {
  1028. msix = &ha->msix_entries[1];
  1029. DEBUG2_17(printk(KERN_INFO
  1030. "Reistering vector 0x%x for base que\n", msix->entry));
  1031. icb->msix = cpu_to_le16(msix->entry);
  1032. }
  1033. /* Use alternate PCI bus number */
  1034. if (MSB(rid))
  1035. icb->firmware_options_2 |=
  1036. __constant_cpu_to_le32(BIT_19);
  1037. /* Use alternate PCI devfn */
  1038. if (LSB(rid))
  1039. icb->firmware_options_2 |=
  1040. __constant_cpu_to_le32(BIT_18);
  1041. icb->firmware_options_2 &= __constant_cpu_to_le32(~BIT_22);
  1042. icb->firmware_options_2 |= __constant_cpu_to_le32(BIT_23);
  1043. WRT_REG_DWORD(&reg->isp25mq.req_q_in, 0);
  1044. WRT_REG_DWORD(&reg->isp25mq.req_q_out, 0);
  1045. WRT_REG_DWORD(&reg->isp25mq.rsp_q_in, 0);
  1046. WRT_REG_DWORD(&reg->isp25mq.rsp_q_out, 0);
  1047. } else {
  1048. WRT_REG_DWORD(&reg->isp24.req_q_in, 0);
  1049. WRT_REG_DWORD(&reg->isp24.req_q_out, 0);
  1050. WRT_REG_DWORD(&reg->isp24.rsp_q_in, 0);
  1051. WRT_REG_DWORD(&reg->isp24.rsp_q_out, 0);
  1052. }
  1053. /* PCI posting */
  1054. RD_REG_DWORD(&ioreg->hccr);
  1055. }
  1056. /**
  1057. * qla2x00_init_rings() - Initializes firmware.
  1058. * @ha: HA context
  1059. *
  1060. * Beginning of request ring has initialization control block already built
  1061. * by nvram config routine.
  1062. *
  1063. * Returns 0 on success.
  1064. */
  1065. static int
  1066. qla2x00_init_rings(scsi_qla_host_t *vha)
  1067. {
  1068. int rval;
  1069. unsigned long flags = 0;
  1070. int cnt, que;
  1071. struct qla_hw_data *ha = vha->hw;
  1072. struct req_que *req;
  1073. struct rsp_que *rsp;
  1074. struct scsi_qla_host *vp;
  1075. struct mid_init_cb_24xx *mid_init_cb =
  1076. (struct mid_init_cb_24xx *) ha->init_cb;
  1077. spin_lock_irqsave(&ha->hardware_lock, flags);
  1078. /* Clear outstanding commands array. */
  1079. for (que = 0; que < ha->max_queues; que++) {
  1080. req = ha->req_q_map[que];
  1081. if (!req)
  1082. continue;
  1083. for (cnt = 0; cnt < MAX_OUTSTANDING_COMMANDS; cnt++)
  1084. req->outstanding_cmds[cnt] = NULL;
  1085. req->current_outstanding_cmd = 0;
  1086. /* Initialize firmware. */
  1087. req->ring_ptr = req->ring;
  1088. req->ring_index = 0;
  1089. req->cnt = req->length;
  1090. }
  1091. for (que = 0; que < ha->max_queues; que++) {
  1092. rsp = ha->rsp_q_map[que];
  1093. if (!rsp)
  1094. continue;
  1095. rsp->ring_ptr = rsp->ring;
  1096. rsp->ring_index = 0;
  1097. /* Initialize response queue entries */
  1098. qla2x00_init_response_q_entries(rsp);
  1099. }
  1100. /* Clear RSCN queue. */
  1101. list_for_each_entry(vp, &ha->vp_list, list) {
  1102. vp->rscn_in_ptr = 0;
  1103. vp->rscn_out_ptr = 0;
  1104. }
  1105. ha->isp_ops->config_rings(vha);
  1106. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  1107. /* Update any ISP specific firmware options before initialization. */
  1108. ha->isp_ops->update_fw_options(vha);
  1109. DEBUG(printk("scsi(%ld): Issue init firmware.\n", vha->host_no));
  1110. if (ha->flags.npiv_supported) {
  1111. if (ha->operating_mode == LOOP)
  1112. ha->max_npiv_vports = MIN_MULTI_ID_FABRIC - 1;
  1113. mid_init_cb->count = cpu_to_le16(ha->max_npiv_vports);
  1114. }
  1115. mid_init_cb->options = __constant_cpu_to_le16(BIT_1);
  1116. rval = qla2x00_init_firmware(vha, ha->init_cb_size);
  1117. if (rval) {
  1118. DEBUG2_3(printk("scsi(%ld): Init firmware **** FAILED ****.\n",
  1119. vha->host_no));
  1120. } else {
  1121. DEBUG3(printk("scsi(%ld): Init firmware -- success.\n",
  1122. vha->host_no));
  1123. }
  1124. return (rval);
  1125. }
  1126. /**
  1127. * qla2x00_fw_ready() - Waits for firmware ready.
  1128. * @ha: HA context
  1129. *
  1130. * Returns 0 on success.
  1131. */
  1132. static int
  1133. qla2x00_fw_ready(scsi_qla_host_t *vha)
  1134. {
  1135. int rval;
  1136. unsigned long wtime, mtime, cs84xx_time;
  1137. uint16_t min_wait; /* Minimum wait time if loop is down */
  1138. uint16_t wait_time; /* Wait time if loop is coming ready */
  1139. uint16_t state[3];
  1140. struct qla_hw_data *ha = vha->hw;
  1141. rval = QLA_SUCCESS;
  1142. /* 20 seconds for loop down. */
  1143. min_wait = 20;
  1144. /*
  1145. * Firmware should take at most one RATOV to login, plus 5 seconds for
  1146. * our own processing.
  1147. */
  1148. if ((wait_time = (ha->retry_count*ha->login_timeout) + 5) < min_wait) {
  1149. wait_time = min_wait;
  1150. }
  1151. /* Min wait time if loop down */
  1152. mtime = jiffies + (min_wait * HZ);
  1153. /* wait time before firmware ready */
  1154. wtime = jiffies + (wait_time * HZ);
  1155. /* Wait for ISP to finish LIP */
  1156. if (!vha->flags.init_done)
  1157. qla_printk(KERN_INFO, ha, "Waiting for LIP to complete...\n");
  1158. DEBUG3(printk("scsi(%ld): Waiting for LIP to complete...\n",
  1159. vha->host_no));
  1160. do {
  1161. rval = qla2x00_get_firmware_state(vha, state);
  1162. if (rval == QLA_SUCCESS) {
  1163. if (state[0] < FSTATE_LOSS_OF_SYNC) {
  1164. vha->device_flags &= ~DFLG_NO_CABLE;
  1165. }
  1166. if (IS_QLA84XX(ha) && state[0] != FSTATE_READY) {
  1167. DEBUG16(printk("scsi(%ld): fw_state=%x "
  1168. "84xx=%x.\n", vha->host_no, state[0],
  1169. state[2]));
  1170. if ((state[2] & FSTATE_LOGGED_IN) &&
  1171. (state[2] & FSTATE_WAITING_FOR_VERIFY)) {
  1172. DEBUG16(printk("scsi(%ld): Sending "
  1173. "verify iocb.\n", vha->host_no));
  1174. cs84xx_time = jiffies;
  1175. rval = qla84xx_init_chip(vha);
  1176. if (rval != QLA_SUCCESS)
  1177. break;
  1178. /* Add time taken to initialize. */
  1179. cs84xx_time = jiffies - cs84xx_time;
  1180. wtime += cs84xx_time;
  1181. mtime += cs84xx_time;
  1182. DEBUG16(printk("scsi(%ld): Increasing "
  1183. "wait time by %ld. New time %ld\n",
  1184. vha->host_no, cs84xx_time, wtime));
  1185. }
  1186. } else if (state[0] == FSTATE_READY) {
  1187. DEBUG(printk("scsi(%ld): F/W Ready - OK \n",
  1188. vha->host_no));
  1189. qla2x00_get_retry_cnt(vha, &ha->retry_count,
  1190. &ha->login_timeout, &ha->r_a_tov);
  1191. rval = QLA_SUCCESS;
  1192. break;
  1193. }
  1194. rval = QLA_FUNCTION_FAILED;
  1195. if (atomic_read(&vha->loop_down_timer) &&
  1196. state[0] != FSTATE_READY) {
  1197. /* Loop down. Timeout on min_wait for states
  1198. * other than Wait for Login.
  1199. */
  1200. if (time_after_eq(jiffies, mtime)) {
  1201. qla_printk(KERN_INFO, ha,
  1202. "Cable is unplugged...\n");
  1203. vha->device_flags |= DFLG_NO_CABLE;
  1204. break;
  1205. }
  1206. }
  1207. } else {
  1208. /* Mailbox cmd failed. Timeout on min_wait. */
  1209. if (time_after_eq(jiffies, mtime))
  1210. break;
  1211. }
  1212. if (time_after_eq(jiffies, wtime))
  1213. break;
  1214. /* Delay for a while */
  1215. msleep(500);
  1216. DEBUG3(printk("scsi(%ld): fw_state=%x curr time=%lx.\n",
  1217. vha->host_no, state[0], jiffies));
  1218. } while (1);
  1219. DEBUG(printk("scsi(%ld): fw_state=%x curr time=%lx.\n",
  1220. vha->host_no, state[0], jiffies));
  1221. if (rval) {
  1222. DEBUG2_3(printk("scsi(%ld): Firmware ready **** FAILED ****.\n",
  1223. vha->host_no));
  1224. }
  1225. return (rval);
  1226. }
  1227. /*
  1228. * qla2x00_configure_hba
  1229. * Setup adapter context.
  1230. *
  1231. * Input:
  1232. * ha = adapter state pointer.
  1233. *
  1234. * Returns:
  1235. * 0 = success
  1236. *
  1237. * Context:
  1238. * Kernel context.
  1239. */
  1240. static int
  1241. qla2x00_configure_hba(scsi_qla_host_t *vha)
  1242. {
  1243. int rval;
  1244. uint16_t loop_id;
  1245. uint16_t topo;
  1246. uint16_t sw_cap;
  1247. uint8_t al_pa;
  1248. uint8_t area;
  1249. uint8_t domain;
  1250. char connect_type[22];
  1251. struct qla_hw_data *ha = vha->hw;
  1252. /* Get host addresses. */
  1253. rval = qla2x00_get_adapter_id(vha,
  1254. &loop_id, &al_pa, &area, &domain, &topo, &sw_cap);
  1255. if (rval != QLA_SUCCESS) {
  1256. if (LOOP_TRANSITION(vha) || atomic_read(&ha->loop_down_timer) ||
  1257. (rval == QLA_COMMAND_ERROR && loop_id == 0x7)) {
  1258. DEBUG2(printk("%s(%ld) Loop is in a transition state\n",
  1259. __func__, vha->host_no));
  1260. } else {
  1261. qla_printk(KERN_WARNING, ha,
  1262. "ERROR -- Unable to get host loop ID.\n");
  1263. set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
  1264. }
  1265. return (rval);
  1266. }
  1267. if (topo == 4) {
  1268. qla_printk(KERN_INFO, ha,
  1269. "Cannot get topology - retrying.\n");
  1270. return (QLA_FUNCTION_FAILED);
  1271. }
  1272. vha->loop_id = loop_id;
  1273. /* initialize */
  1274. ha->min_external_loopid = SNS_FIRST_LOOP_ID;
  1275. ha->operating_mode = LOOP;
  1276. ha->switch_cap = 0;
  1277. switch (topo) {
  1278. case 0:
  1279. DEBUG3(printk("scsi(%ld): HBA in NL topology.\n",
  1280. vha->host_no));
  1281. ha->current_topology = ISP_CFG_NL;
  1282. strcpy(connect_type, "(Loop)");
  1283. break;
  1284. case 1:
  1285. DEBUG3(printk("scsi(%ld): HBA in FL topology.\n",
  1286. vha->host_no));
  1287. ha->switch_cap = sw_cap;
  1288. ha->current_topology = ISP_CFG_FL;
  1289. strcpy(connect_type, "(FL_Port)");
  1290. break;
  1291. case 2:
  1292. DEBUG3(printk("scsi(%ld): HBA in N P2P topology.\n",
  1293. vha->host_no));
  1294. ha->operating_mode = P2P;
  1295. ha->current_topology = ISP_CFG_N;
  1296. strcpy(connect_type, "(N_Port-to-N_Port)");
  1297. break;
  1298. case 3:
  1299. DEBUG3(printk("scsi(%ld): HBA in F P2P topology.\n",
  1300. vha->host_no));
  1301. ha->switch_cap = sw_cap;
  1302. ha->operating_mode = P2P;
  1303. ha->current_topology = ISP_CFG_F;
  1304. strcpy(connect_type, "(F_Port)");
  1305. break;
  1306. default:
  1307. DEBUG3(printk("scsi(%ld): HBA in unknown topology %x. "
  1308. "Using NL.\n",
  1309. vha->host_no, topo));
  1310. ha->current_topology = ISP_CFG_NL;
  1311. strcpy(connect_type, "(Loop)");
  1312. break;
  1313. }
  1314. /* Save Host port and loop ID. */
  1315. /* byte order - Big Endian */
  1316. vha->d_id.b.domain = domain;
  1317. vha->d_id.b.area = area;
  1318. vha->d_id.b.al_pa = al_pa;
  1319. if (!vha->flags.init_done)
  1320. qla_printk(KERN_INFO, ha,
  1321. "Topology - %s, Host Loop address 0x%x\n",
  1322. connect_type, vha->loop_id);
  1323. if (rval) {
  1324. DEBUG2_3(printk("scsi(%ld): FAILED.\n", vha->host_no));
  1325. } else {
  1326. DEBUG3(printk("scsi(%ld): exiting normally.\n", vha->host_no));
  1327. }
  1328. return(rval);
  1329. }
  1330. static inline void
  1331. qla2x00_set_model_info(scsi_qla_host_t *vha, uint8_t *model, size_t len,
  1332. char *def)
  1333. {
  1334. char *st, *en;
  1335. uint16_t index;
  1336. struct qla_hw_data *ha = vha->hw;
  1337. if (memcmp(model, BINZERO, len) != 0) {
  1338. strncpy(ha->model_number, model, len);
  1339. st = en = ha->model_number;
  1340. en += len - 1;
  1341. while (en > st) {
  1342. if (*en != 0x20 && *en != 0x00)
  1343. break;
  1344. *en-- = '\0';
  1345. }
  1346. index = (ha->pdev->subsystem_device & 0xff);
  1347. if (ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC &&
  1348. index < QLA_MODEL_NAMES)
  1349. strncpy(ha->model_desc,
  1350. qla2x00_model_name[index * 2 + 1],
  1351. sizeof(ha->model_desc) - 1);
  1352. } else {
  1353. index = (ha->pdev->subsystem_device & 0xff);
  1354. if (ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC &&
  1355. index < QLA_MODEL_NAMES) {
  1356. strcpy(ha->model_number,
  1357. qla2x00_model_name[index * 2]);
  1358. strncpy(ha->model_desc,
  1359. qla2x00_model_name[index * 2 + 1],
  1360. sizeof(ha->model_desc) - 1);
  1361. } else {
  1362. strcpy(ha->model_number, def);
  1363. }
  1364. }
  1365. if (IS_FWI2_CAPABLE(ha))
  1366. qla2xxx_get_vpd_field(vha, "\x82", ha->model_desc,
  1367. sizeof(ha->model_desc));
  1368. }
  1369. /* On sparc systems, obtain port and node WWN from firmware
  1370. * properties.
  1371. */
  1372. static void qla2xxx_nvram_wwn_from_ofw(scsi_qla_host_t *vha, nvram_t *nv)
  1373. {
  1374. #ifdef CONFIG_SPARC
  1375. struct qla_hw_data *ha = vha->hw;
  1376. struct pci_dev *pdev = ha->pdev;
  1377. struct device_node *dp = pci_device_to_OF_node(pdev);
  1378. const u8 *val;
  1379. int len;
  1380. val = of_get_property(dp, "port-wwn", &len);
  1381. if (val && len >= WWN_SIZE)
  1382. memcpy(nv->port_name, val, WWN_SIZE);
  1383. val = of_get_property(dp, "node-wwn", &len);
  1384. if (val && len >= WWN_SIZE)
  1385. memcpy(nv->node_name, val, WWN_SIZE);
  1386. #endif
  1387. }
  1388. /*
  1389. * NVRAM configuration for ISP 2xxx
  1390. *
  1391. * Input:
  1392. * ha = adapter block pointer.
  1393. *
  1394. * Output:
  1395. * initialization control block in response_ring
  1396. * host adapters parameters in host adapter block
  1397. *
  1398. * Returns:
  1399. * 0 = success.
  1400. */
  1401. int
  1402. qla2x00_nvram_config(scsi_qla_host_t *vha)
  1403. {
  1404. int rval;
  1405. uint8_t chksum = 0;
  1406. uint16_t cnt;
  1407. uint8_t *dptr1, *dptr2;
  1408. struct qla_hw_data *ha = vha->hw;
  1409. init_cb_t *icb = ha->init_cb;
  1410. nvram_t *nv = ha->nvram;
  1411. uint8_t *ptr = ha->nvram;
  1412. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  1413. rval = QLA_SUCCESS;
  1414. /* Determine NVRAM starting address. */
  1415. ha->nvram_size = sizeof(nvram_t);
  1416. ha->nvram_base = 0;
  1417. if (!IS_QLA2100(ha) && !IS_QLA2200(ha) && !IS_QLA2300(ha))
  1418. if ((RD_REG_WORD(&reg->ctrl_status) >> 14) == 1)
  1419. ha->nvram_base = 0x80;
  1420. /* Get NVRAM data and calculate checksum. */
  1421. ha->isp_ops->read_nvram(vha, ptr, ha->nvram_base, ha->nvram_size);
  1422. for (cnt = 0, chksum = 0; cnt < ha->nvram_size; cnt++)
  1423. chksum += *ptr++;
  1424. DEBUG5(printk("scsi(%ld): Contents of NVRAM\n", vha->host_no));
  1425. DEBUG5(qla2x00_dump_buffer((uint8_t *)nv, ha->nvram_size));
  1426. /* Bad NVRAM data, set defaults parameters. */
  1427. if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' ||
  1428. nv->id[2] != 'P' || nv->id[3] != ' ' || nv->nvram_version < 1) {
  1429. /* Reset NVRAM data. */
  1430. qla_printk(KERN_WARNING, ha, "Inconsistent NVRAM detected: "
  1431. "checksum=0x%x id=%c version=0x%x.\n", chksum, nv->id[0],
  1432. nv->nvram_version);
  1433. qla_printk(KERN_WARNING, ha, "Falling back to functioning (yet "
  1434. "invalid -- WWPN) defaults.\n");
  1435. /*
  1436. * Set default initialization control block.
  1437. */
  1438. memset(nv, 0, ha->nvram_size);
  1439. nv->parameter_block_version = ICB_VERSION;
  1440. if (IS_QLA23XX(ha)) {
  1441. nv->firmware_options[0] = BIT_2 | BIT_1;
  1442. nv->firmware_options[1] = BIT_7 | BIT_5;
  1443. nv->add_firmware_options[0] = BIT_5;
  1444. nv->add_firmware_options[1] = BIT_5 | BIT_4;
  1445. nv->frame_payload_size = __constant_cpu_to_le16(2048);
  1446. nv->special_options[1] = BIT_7;
  1447. } else if (IS_QLA2200(ha)) {
  1448. nv->firmware_options[0] = BIT_2 | BIT_1;
  1449. nv->firmware_options[1] = BIT_7 | BIT_5;
  1450. nv->add_firmware_options[0] = BIT_5;
  1451. nv->add_firmware_options[1] = BIT_5 | BIT_4;
  1452. nv->frame_payload_size = __constant_cpu_to_le16(1024);
  1453. } else if (IS_QLA2100(ha)) {
  1454. nv->firmware_options[0] = BIT_3 | BIT_1;
  1455. nv->firmware_options[1] = BIT_5;
  1456. nv->frame_payload_size = __constant_cpu_to_le16(1024);
  1457. }
  1458. nv->max_iocb_allocation = __constant_cpu_to_le16(256);
  1459. nv->execution_throttle = __constant_cpu_to_le16(16);
  1460. nv->retry_count = 8;
  1461. nv->retry_delay = 1;
  1462. nv->port_name[0] = 33;
  1463. nv->port_name[3] = 224;
  1464. nv->port_name[4] = 139;
  1465. qla2xxx_nvram_wwn_from_ofw(vha, nv);
  1466. nv->login_timeout = 4;
  1467. /*
  1468. * Set default host adapter parameters
  1469. */
  1470. nv->host_p[1] = BIT_2;
  1471. nv->reset_delay = 5;
  1472. nv->port_down_retry_count = 8;
  1473. nv->max_luns_per_target = __constant_cpu_to_le16(8);
  1474. nv->link_down_timeout = 60;
  1475. rval = 1;
  1476. }
  1477. #if defined(CONFIG_IA64_GENERIC) || defined(CONFIG_IA64_SGI_SN2)
  1478. /*
  1479. * The SN2 does not provide BIOS emulation which means you can't change
  1480. * potentially bogus BIOS settings. Force the use of default settings
  1481. * for link rate and frame size. Hope that the rest of the settings
  1482. * are valid.
  1483. */
  1484. if (ia64_platform_is("sn2")) {
  1485. nv->frame_payload_size = __constant_cpu_to_le16(2048);
  1486. if (IS_QLA23XX(ha))
  1487. nv->special_options[1] = BIT_7;
  1488. }
  1489. #endif
  1490. /* Reset Initialization control block */
  1491. memset(icb, 0, ha->init_cb_size);
  1492. /*
  1493. * Setup driver NVRAM options.
  1494. */
  1495. nv->firmware_options[0] |= (BIT_6 | BIT_1);
  1496. nv->firmware_options[0] &= ~(BIT_5 | BIT_4);
  1497. nv->firmware_options[1] |= (BIT_5 | BIT_0);
  1498. nv->firmware_options[1] &= ~BIT_4;
  1499. if (IS_QLA23XX(ha)) {
  1500. nv->firmware_options[0] |= BIT_2;
  1501. nv->firmware_options[0] &= ~BIT_3;
  1502. nv->add_firmware_options[1] |= BIT_5 | BIT_4;
  1503. if (IS_QLA2300(ha)) {
  1504. if (ha->fb_rev == FPM_2310) {
  1505. strcpy(ha->model_number, "QLA2310");
  1506. } else {
  1507. strcpy(ha->model_number, "QLA2300");
  1508. }
  1509. } else {
  1510. qla2x00_set_model_info(vha, nv->model_number,
  1511. sizeof(nv->model_number), "QLA23xx");
  1512. }
  1513. } else if (IS_QLA2200(ha)) {
  1514. nv->firmware_options[0] |= BIT_2;
  1515. /*
  1516. * 'Point-to-point preferred, else loop' is not a safe
  1517. * connection mode setting.
  1518. */
  1519. if ((nv->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) ==
  1520. (BIT_5 | BIT_4)) {
  1521. /* Force 'loop preferred, else point-to-point'. */
  1522. nv->add_firmware_options[0] &= ~(BIT_6 | BIT_5 | BIT_4);
  1523. nv->add_firmware_options[0] |= BIT_5;
  1524. }
  1525. strcpy(ha->model_number, "QLA22xx");
  1526. } else /*if (IS_QLA2100(ha))*/ {
  1527. strcpy(ha->model_number, "QLA2100");
  1528. }
  1529. /*
  1530. * Copy over NVRAM RISC parameter block to initialization control block.
  1531. */
  1532. dptr1 = (uint8_t *)icb;
  1533. dptr2 = (uint8_t *)&nv->parameter_block_version;
  1534. cnt = (uint8_t *)&icb->request_q_outpointer - (uint8_t *)&icb->version;
  1535. while (cnt--)
  1536. *dptr1++ = *dptr2++;
  1537. /* Copy 2nd half. */
  1538. dptr1 = (uint8_t *)icb->add_firmware_options;
  1539. cnt = (uint8_t *)icb->reserved_3 - (uint8_t *)icb->add_firmware_options;
  1540. while (cnt--)
  1541. *dptr1++ = *dptr2++;
  1542. /* Use alternate WWN? */
  1543. if (nv->host_p[1] & BIT_7) {
  1544. memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
  1545. memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
  1546. }
  1547. /* Prepare nodename */
  1548. if ((icb->firmware_options[1] & BIT_6) == 0) {
  1549. /*
  1550. * Firmware will apply the following mask if the nodename was
  1551. * not provided.
  1552. */
  1553. memcpy(icb->node_name, icb->port_name, WWN_SIZE);
  1554. icb->node_name[0] &= 0xF0;
  1555. }
  1556. /*
  1557. * Set host adapter parameters.
  1558. */
  1559. if (nv->host_p[0] & BIT_7)
  1560. ql2xextended_error_logging = 1;
  1561. ha->flags.disable_risc_code_load = ((nv->host_p[0] & BIT_4) ? 1 : 0);
  1562. /* Always load RISC code on non ISP2[12]00 chips. */
  1563. if (!IS_QLA2100(ha) && !IS_QLA2200(ha))
  1564. ha->flags.disable_risc_code_load = 0;
  1565. ha->flags.enable_lip_reset = ((nv->host_p[1] & BIT_1) ? 1 : 0);
  1566. ha->flags.enable_lip_full_login = ((nv->host_p[1] & BIT_2) ? 1 : 0);
  1567. ha->flags.enable_target_reset = ((nv->host_p[1] & BIT_3) ? 1 : 0);
  1568. ha->flags.enable_led_scheme = (nv->special_options[1] & BIT_4) ? 1 : 0;
  1569. ha->flags.disable_serdes = 0;
  1570. ha->operating_mode =
  1571. (icb->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) >> 4;
  1572. memcpy(ha->fw_seriallink_options, nv->seriallink_options,
  1573. sizeof(ha->fw_seriallink_options));
  1574. /* save HBA serial number */
  1575. ha->serial0 = icb->port_name[5];
  1576. ha->serial1 = icb->port_name[6];
  1577. ha->serial2 = icb->port_name[7];
  1578. memcpy(vha->node_name, icb->node_name, WWN_SIZE);
  1579. memcpy(vha->port_name, icb->port_name, WWN_SIZE);
  1580. icb->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  1581. ha->retry_count = nv->retry_count;
  1582. /* Set minimum login_timeout to 4 seconds. */
  1583. if (nv->login_timeout < ql2xlogintimeout)
  1584. nv->login_timeout = ql2xlogintimeout;
  1585. if (nv->login_timeout < 4)
  1586. nv->login_timeout = 4;
  1587. ha->login_timeout = nv->login_timeout;
  1588. icb->login_timeout = nv->login_timeout;
  1589. /* Set minimum RATOV to 100 tenths of a second. */
  1590. ha->r_a_tov = 100;
  1591. ha->loop_reset_delay = nv->reset_delay;
  1592. /* Link Down Timeout = 0:
  1593. *
  1594. * When Port Down timer expires we will start returning
  1595. * I/O's to OS with "DID_NO_CONNECT".
  1596. *
  1597. * Link Down Timeout != 0:
  1598. *
  1599. * The driver waits for the link to come up after link down
  1600. * before returning I/Os to OS with "DID_NO_CONNECT".
  1601. */
  1602. if (nv->link_down_timeout == 0) {
  1603. ha->loop_down_abort_time =
  1604. (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
  1605. } else {
  1606. ha->link_down_timeout = nv->link_down_timeout;
  1607. ha->loop_down_abort_time =
  1608. (LOOP_DOWN_TIME - ha->link_down_timeout);
  1609. }
  1610. /*
  1611. * Need enough time to try and get the port back.
  1612. */
  1613. ha->port_down_retry_count = nv->port_down_retry_count;
  1614. if (qlport_down_retry)
  1615. ha->port_down_retry_count = qlport_down_retry;
  1616. /* Set login_retry_count */
  1617. ha->login_retry_count = nv->retry_count;
  1618. if (ha->port_down_retry_count == nv->port_down_retry_count &&
  1619. ha->port_down_retry_count > 3)
  1620. ha->login_retry_count = ha->port_down_retry_count;
  1621. else if (ha->port_down_retry_count > (int)ha->login_retry_count)
  1622. ha->login_retry_count = ha->port_down_retry_count;
  1623. if (ql2xloginretrycount)
  1624. ha->login_retry_count = ql2xloginretrycount;
  1625. icb->lun_enables = __constant_cpu_to_le16(0);
  1626. icb->command_resource_count = 0;
  1627. icb->immediate_notify_resource_count = 0;
  1628. icb->timeout = __constant_cpu_to_le16(0);
  1629. if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
  1630. /* Enable RIO */
  1631. icb->firmware_options[0] &= ~BIT_3;
  1632. icb->add_firmware_options[0] &=
  1633. ~(BIT_3 | BIT_2 | BIT_1 | BIT_0);
  1634. icb->add_firmware_options[0] |= BIT_2;
  1635. icb->response_accumulation_timer = 3;
  1636. icb->interrupt_delay_timer = 5;
  1637. vha->flags.process_response_queue = 1;
  1638. } else {
  1639. /* Enable ZIO. */
  1640. if (!vha->flags.init_done) {
  1641. ha->zio_mode = icb->add_firmware_options[0] &
  1642. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  1643. ha->zio_timer = icb->interrupt_delay_timer ?
  1644. icb->interrupt_delay_timer: 2;
  1645. }
  1646. icb->add_firmware_options[0] &=
  1647. ~(BIT_3 | BIT_2 | BIT_1 | BIT_0);
  1648. vha->flags.process_response_queue = 0;
  1649. if (ha->zio_mode != QLA_ZIO_DISABLED) {
  1650. ha->zio_mode = QLA_ZIO_MODE_6;
  1651. DEBUG2(printk("scsi(%ld): ZIO mode %d enabled; timer "
  1652. "delay (%d us).\n", vha->host_no, ha->zio_mode,
  1653. ha->zio_timer * 100));
  1654. qla_printk(KERN_INFO, ha,
  1655. "ZIO mode %d enabled; timer delay (%d us).\n",
  1656. ha->zio_mode, ha->zio_timer * 100);
  1657. icb->add_firmware_options[0] |= (uint8_t)ha->zio_mode;
  1658. icb->interrupt_delay_timer = (uint8_t)ha->zio_timer;
  1659. vha->flags.process_response_queue = 1;
  1660. }
  1661. }
  1662. if (rval) {
  1663. DEBUG2_3(printk(KERN_WARNING
  1664. "scsi(%ld): NVRAM configuration failed!\n", vha->host_no));
  1665. }
  1666. return (rval);
  1667. }
  1668. static void
  1669. qla2x00_rport_del(void *data)
  1670. {
  1671. fc_port_t *fcport = data;
  1672. struct fc_rport *rport;
  1673. spin_lock_irq(fcport->vha->host->host_lock);
  1674. rport = fcport->drport;
  1675. fcport->drport = NULL;
  1676. spin_unlock_irq(fcport->vha->host->host_lock);
  1677. if (rport)
  1678. fc_remote_port_delete(rport);
  1679. }
  1680. /**
  1681. * qla2x00_alloc_fcport() - Allocate a generic fcport.
  1682. * @ha: HA context
  1683. * @flags: allocation flags
  1684. *
  1685. * Returns a pointer to the allocated fcport, or NULL, if none available.
  1686. */
  1687. static fc_port_t *
  1688. qla2x00_alloc_fcport(scsi_qla_host_t *vha, gfp_t flags)
  1689. {
  1690. fc_port_t *fcport;
  1691. fcport = kzalloc(sizeof(fc_port_t), flags);
  1692. if (!fcport)
  1693. return NULL;
  1694. /* Setup fcport template structure. */
  1695. fcport->vha = vha;
  1696. fcport->vp_idx = vha->vp_idx;
  1697. fcport->port_type = FCT_UNKNOWN;
  1698. fcport->loop_id = FC_NO_LOOP_ID;
  1699. atomic_set(&fcport->state, FCS_UNCONFIGURED);
  1700. fcport->flags = FCF_RLC_SUPPORT;
  1701. fcport->supported_classes = FC_COS_UNSPECIFIED;
  1702. return fcport;
  1703. }
  1704. /*
  1705. * qla2x00_configure_loop
  1706. * Updates Fibre Channel Device Database with what is actually on loop.
  1707. *
  1708. * Input:
  1709. * ha = adapter block pointer.
  1710. *
  1711. * Returns:
  1712. * 0 = success.
  1713. * 1 = error.
  1714. * 2 = database was full and device was not configured.
  1715. */
  1716. static int
  1717. qla2x00_configure_loop(scsi_qla_host_t *vha)
  1718. {
  1719. int rval;
  1720. unsigned long flags, save_flags;
  1721. struct qla_hw_data *ha = vha->hw;
  1722. rval = QLA_SUCCESS;
  1723. /* Get Initiator ID */
  1724. if (test_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags)) {
  1725. rval = qla2x00_configure_hba(vha);
  1726. if (rval != QLA_SUCCESS) {
  1727. DEBUG(printk("scsi(%ld): Unable to configure HBA.\n",
  1728. vha->host_no));
  1729. return (rval);
  1730. }
  1731. }
  1732. save_flags = flags = vha->dpc_flags;
  1733. DEBUG(printk("scsi(%ld): Configure loop -- dpc flags =0x%lx\n",
  1734. vha->host_no, flags));
  1735. /*
  1736. * If we have both an RSCN and PORT UPDATE pending then handle them
  1737. * both at the same time.
  1738. */
  1739. clear_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
  1740. clear_bit(RSCN_UPDATE, &vha->dpc_flags);
  1741. /* Determine what we need to do */
  1742. if (ha->current_topology == ISP_CFG_FL &&
  1743. (test_bit(LOCAL_LOOP_UPDATE, &flags))) {
  1744. vha->flags.rscn_queue_overflow = 1;
  1745. set_bit(RSCN_UPDATE, &flags);
  1746. } else if (ha->current_topology == ISP_CFG_F &&
  1747. (test_bit(LOCAL_LOOP_UPDATE, &flags))) {
  1748. vha->flags.rscn_queue_overflow = 1;
  1749. set_bit(RSCN_UPDATE, &flags);
  1750. clear_bit(LOCAL_LOOP_UPDATE, &flags);
  1751. } else if (ha->current_topology == ISP_CFG_N) {
  1752. clear_bit(RSCN_UPDATE, &flags);
  1753. } else if (!vha->flags.online ||
  1754. (test_bit(ABORT_ISP_ACTIVE, &flags))) {
  1755. vha->flags.rscn_queue_overflow = 1;
  1756. set_bit(RSCN_UPDATE, &flags);
  1757. set_bit(LOCAL_LOOP_UPDATE, &flags);
  1758. }
  1759. if (test_bit(LOCAL_LOOP_UPDATE, &flags)) {
  1760. if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
  1761. rval = QLA_FUNCTION_FAILED;
  1762. else
  1763. rval = qla2x00_configure_local_loop(vha);
  1764. }
  1765. if (rval == QLA_SUCCESS && test_bit(RSCN_UPDATE, &flags)) {
  1766. if (LOOP_TRANSITION(vha))
  1767. rval = QLA_FUNCTION_FAILED;
  1768. else
  1769. rval = qla2x00_configure_fabric(vha);
  1770. }
  1771. if (rval == QLA_SUCCESS) {
  1772. if (atomic_read(&vha->loop_down_timer) ||
  1773. test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
  1774. rval = QLA_FUNCTION_FAILED;
  1775. } else {
  1776. atomic_set(&vha->loop_state, LOOP_READY);
  1777. DEBUG(printk("scsi(%ld): LOOP READY\n", vha->host_no));
  1778. }
  1779. }
  1780. if (rval) {
  1781. DEBUG2_3(printk("%s(%ld): *** FAILED ***\n",
  1782. __func__, vha->host_no));
  1783. } else {
  1784. DEBUG3(printk("%s: exiting normally\n", __func__));
  1785. }
  1786. /* Restore state if a resync event occurred during processing */
  1787. if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
  1788. if (test_bit(LOCAL_LOOP_UPDATE, &save_flags))
  1789. set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
  1790. if (test_bit(RSCN_UPDATE, &save_flags))
  1791. set_bit(RSCN_UPDATE, &vha->dpc_flags);
  1792. }
  1793. return (rval);
  1794. }
  1795. /*
  1796. * qla2x00_configure_local_loop
  1797. * Updates Fibre Channel Device Database with local loop devices.
  1798. *
  1799. * Input:
  1800. * ha = adapter block pointer.
  1801. *
  1802. * Returns:
  1803. * 0 = success.
  1804. */
  1805. static int
  1806. qla2x00_configure_local_loop(scsi_qla_host_t *vha)
  1807. {
  1808. int rval, rval2;
  1809. int found_devs;
  1810. int found;
  1811. fc_port_t *fcport, *new_fcport;
  1812. uint16_t index;
  1813. uint16_t entries;
  1814. char *id_iter;
  1815. uint16_t loop_id;
  1816. uint8_t domain, area, al_pa;
  1817. struct qla_hw_data *ha = vha->hw;
  1818. found_devs = 0;
  1819. new_fcport = NULL;
  1820. entries = MAX_FIBRE_DEVICES;
  1821. DEBUG3(printk("scsi(%ld): Getting FCAL position map\n", vha->host_no));
  1822. DEBUG3(qla2x00_get_fcal_position_map(vha, NULL));
  1823. /* Get list of logged in devices. */
  1824. memset(ha->gid_list, 0, GID_LIST_SIZE);
  1825. rval = qla2x00_get_id_list(vha, ha->gid_list, ha->gid_list_dma,
  1826. &entries);
  1827. if (rval != QLA_SUCCESS)
  1828. goto cleanup_allocation;
  1829. DEBUG3(printk("scsi(%ld): Entries in ID list (%d)\n",
  1830. ha->host_no, entries));
  1831. DEBUG3(qla2x00_dump_buffer((uint8_t *)ha->gid_list,
  1832. entries * sizeof(struct gid_list_info)));
  1833. /* Allocate temporary fcport for any new fcports discovered. */
  1834. new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
  1835. if (new_fcport == NULL) {
  1836. rval = QLA_MEMORY_ALLOC_FAILED;
  1837. goto cleanup_allocation;
  1838. }
  1839. new_fcport->flags &= ~FCF_FABRIC_DEVICE;
  1840. /*
  1841. * Mark local devices that were present with FCF_DEVICE_LOST for now.
  1842. */
  1843. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  1844. if (atomic_read(&fcport->state) == FCS_ONLINE &&
  1845. fcport->port_type != FCT_BROADCAST &&
  1846. (fcport->flags & FCF_FABRIC_DEVICE) == 0) {
  1847. DEBUG(printk("scsi(%ld): Marking port lost, "
  1848. "loop_id=0x%04x\n",
  1849. vha->host_no, fcport->loop_id));
  1850. atomic_set(&fcport->state, FCS_DEVICE_LOST);
  1851. fcport->flags &= ~FCF_FARP_DONE;
  1852. }
  1853. }
  1854. /* Add devices to port list. */
  1855. id_iter = (char *)ha->gid_list;
  1856. for (index = 0; index < entries; index++) {
  1857. domain = ((struct gid_list_info *)id_iter)->domain;
  1858. area = ((struct gid_list_info *)id_iter)->area;
  1859. al_pa = ((struct gid_list_info *)id_iter)->al_pa;
  1860. if (IS_QLA2100(ha) || IS_QLA2200(ha))
  1861. loop_id = (uint16_t)
  1862. ((struct gid_list_info *)id_iter)->loop_id_2100;
  1863. else
  1864. loop_id = le16_to_cpu(
  1865. ((struct gid_list_info *)id_iter)->loop_id);
  1866. id_iter += ha->gid_list_info_size;
  1867. /* Bypass reserved domain fields. */
  1868. if ((domain & 0xf0) == 0xf0)
  1869. continue;
  1870. /* Bypass if not same domain and area of adapter. */
  1871. if (area && domain &&
  1872. (area != vha->d_id.b.area || domain != vha->d_id.b.domain))
  1873. continue;
  1874. /* Bypass invalid local loop ID. */
  1875. if (loop_id > LAST_LOCAL_LOOP_ID)
  1876. continue;
  1877. /* Fill in member data. */
  1878. new_fcport->d_id.b.domain = domain;
  1879. new_fcport->d_id.b.area = area;
  1880. new_fcport->d_id.b.al_pa = al_pa;
  1881. new_fcport->loop_id = loop_id;
  1882. new_fcport->vp_idx = vha->vp_idx;
  1883. rval2 = qla2x00_get_port_database(vha, new_fcport, 0);
  1884. if (rval2 != QLA_SUCCESS) {
  1885. DEBUG2(printk("scsi(%ld): Failed to retrieve fcport "
  1886. "information -- get_port_database=%x, "
  1887. "loop_id=0x%04x\n",
  1888. vha->host_no, rval2, new_fcport->loop_id));
  1889. DEBUG2(printk("scsi(%ld): Scheduling resync...\n",
  1890. vha->host_no));
  1891. set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  1892. continue;
  1893. }
  1894. /* Check for matching device in port list. */
  1895. found = 0;
  1896. fcport = NULL;
  1897. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  1898. if (memcmp(new_fcport->port_name, fcport->port_name,
  1899. WWN_SIZE))
  1900. continue;
  1901. fcport->flags &= ~(FCF_FABRIC_DEVICE |
  1902. FCF_PERSISTENT_BOUND);
  1903. fcport->loop_id = new_fcport->loop_id;
  1904. fcport->port_type = new_fcport->port_type;
  1905. fcport->d_id.b24 = new_fcport->d_id.b24;
  1906. memcpy(fcport->node_name, new_fcport->node_name,
  1907. WWN_SIZE);
  1908. found++;
  1909. break;
  1910. }
  1911. if (!found) {
  1912. /* New device, add to fcports list. */
  1913. new_fcport->flags &= ~FCF_PERSISTENT_BOUND;
  1914. if (vha->vp_idx) {
  1915. new_fcport->vha = vha;
  1916. new_fcport->vp_idx = vha->vp_idx;
  1917. }
  1918. list_add_tail(&new_fcport->list, &vha->vp_fcports);
  1919. /* Allocate a new replacement fcport. */
  1920. fcport = new_fcport;
  1921. new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
  1922. if (new_fcport == NULL) {
  1923. rval = QLA_MEMORY_ALLOC_FAILED;
  1924. goto cleanup_allocation;
  1925. }
  1926. new_fcport->flags &= ~FCF_FABRIC_DEVICE;
  1927. }
  1928. /* Base iIDMA settings on HBA port speed. */
  1929. fcport->fp_speed = ha->link_data_rate;
  1930. qla2x00_update_fcport(vha, fcport);
  1931. found_devs++;
  1932. }
  1933. cleanup_allocation:
  1934. kfree(new_fcport);
  1935. if (rval != QLA_SUCCESS) {
  1936. DEBUG2(printk("scsi(%ld): Configure local loop error exit: "
  1937. "rval=%x\n", vha->host_no, rval));
  1938. }
  1939. if (found_devs) {
  1940. vha->device_flags |= DFLG_LOCAL_DEVICES;
  1941. vha->device_flags &= ~DFLG_RETRY_LOCAL_DEVICES;
  1942. }
  1943. return (rval);
  1944. }
  1945. static void
  1946. qla2x00_iidma_fcport(scsi_qla_host_t *vha, fc_port_t *fcport)
  1947. {
  1948. #define LS_UNKNOWN 2
  1949. static char *link_speeds[5] = { "1", "2", "?", "4", "8" };
  1950. int rval;
  1951. uint16_t mb[6];
  1952. struct qla_hw_data *ha = vha->hw;
  1953. if (!IS_IIDMA_CAPABLE(ha))
  1954. return;
  1955. if (fcport->fp_speed == PORT_SPEED_UNKNOWN ||
  1956. fcport->fp_speed > ha->link_data_rate)
  1957. return;
  1958. rval = qla2x00_set_idma_speed(vha, fcport->loop_id, fcport->fp_speed,
  1959. mb);
  1960. if (rval != QLA_SUCCESS) {
  1961. DEBUG2(printk("scsi(%ld): Unable to adjust iIDMA "
  1962. "%02x%02x%02x%02x%02x%02x%02x%02x -- %04x %x %04x %04x.\n",
  1963. vha->host_no, fcport->port_name[0], fcport->port_name[1],
  1964. fcport->port_name[2], fcport->port_name[3],
  1965. fcport->port_name[4], fcport->port_name[5],
  1966. fcport->port_name[6], fcport->port_name[7], rval,
  1967. fcport->fp_speed, mb[0], mb[1]));
  1968. } else {
  1969. DEBUG2(qla_printk(KERN_INFO, ha,
  1970. "iIDMA adjusted to %s GB/s on "
  1971. "%02x%02x%02x%02x%02x%02x%02x%02x.\n",
  1972. link_speeds[fcport->fp_speed], fcport->port_name[0],
  1973. fcport->port_name[1], fcport->port_name[2],
  1974. fcport->port_name[3], fcport->port_name[4],
  1975. fcport->port_name[5], fcport->port_name[6],
  1976. fcport->port_name[7]));
  1977. }
  1978. }
  1979. static void
  1980. qla2x00_reg_remote_port(scsi_qla_host_t *vha, fc_port_t *fcport)
  1981. {
  1982. struct fc_rport_identifiers rport_ids;
  1983. struct fc_rport *rport;
  1984. struct qla_hw_data *ha = vha->hw;
  1985. if (fcport->drport)
  1986. qla2x00_rport_del(fcport);
  1987. rport_ids.node_name = wwn_to_u64(fcport->node_name);
  1988. rport_ids.port_name = wwn_to_u64(fcport->port_name);
  1989. rport_ids.port_id = fcport->d_id.b.domain << 16 |
  1990. fcport->d_id.b.area << 8 | fcport->d_id.b.al_pa;
  1991. rport_ids.roles = FC_RPORT_ROLE_UNKNOWN;
  1992. fcport->rport = rport = fc_remote_port_add(vha->host, 0, &rport_ids);
  1993. if (!rport) {
  1994. qla_printk(KERN_WARNING, ha,
  1995. "Unable to allocate fc remote port!\n");
  1996. return;
  1997. }
  1998. spin_lock_irq(fcport->vha->host->host_lock);
  1999. *((fc_port_t **)rport->dd_data) = fcport;
  2000. spin_unlock_irq(fcport->vha->host->host_lock);
  2001. rport->supported_classes = fcport->supported_classes;
  2002. rport_ids.roles = FC_RPORT_ROLE_UNKNOWN;
  2003. if (fcport->port_type == FCT_INITIATOR)
  2004. rport_ids.roles |= FC_RPORT_ROLE_FCP_INITIATOR;
  2005. if (fcport->port_type == FCT_TARGET)
  2006. rport_ids.roles |= FC_RPORT_ROLE_FCP_TARGET;
  2007. fc_remote_port_rolechg(rport, rport_ids.roles);
  2008. }
  2009. /*
  2010. * qla2x00_update_fcport
  2011. * Updates device on list.
  2012. *
  2013. * Input:
  2014. * ha = adapter block pointer.
  2015. * fcport = port structure pointer.
  2016. *
  2017. * Return:
  2018. * 0 - Success
  2019. * BIT_0 - error
  2020. *
  2021. * Context:
  2022. * Kernel context.
  2023. */
  2024. void
  2025. qla2x00_update_fcport(scsi_qla_host_t *vha, fc_port_t *fcport)
  2026. {
  2027. struct qla_hw_data *ha = vha->hw;
  2028. fcport->vha = vha;
  2029. fcport->login_retry = 0;
  2030. fcport->port_login_retry_count = ha->port_down_retry_count *
  2031. PORT_RETRY_TIME;
  2032. atomic_set(&fcport->port_down_timer, ha->port_down_retry_count *
  2033. PORT_RETRY_TIME);
  2034. fcport->flags &= ~FCF_LOGIN_NEEDED;
  2035. qla2x00_iidma_fcport(vha, fcport);
  2036. atomic_set(&fcport->state, FCS_ONLINE);
  2037. qla2x00_reg_remote_port(vha, fcport);
  2038. }
  2039. /*
  2040. * qla2x00_configure_fabric
  2041. * Setup SNS devices with loop ID's.
  2042. *
  2043. * Input:
  2044. * ha = adapter block pointer.
  2045. *
  2046. * Returns:
  2047. * 0 = success.
  2048. * BIT_0 = error
  2049. */
  2050. static int
  2051. qla2x00_configure_fabric(scsi_qla_host_t *vha)
  2052. {
  2053. int rval, rval2;
  2054. fc_port_t *fcport, *fcptemp;
  2055. uint16_t next_loopid;
  2056. uint16_t mb[MAILBOX_REGISTER_COUNT];
  2057. uint16_t loop_id;
  2058. LIST_HEAD(new_fcports);
  2059. struct qla_hw_data *ha = vha->hw;
  2060. struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
  2061. /* If FL port exists, then SNS is present */
  2062. if (IS_FWI2_CAPABLE(ha))
  2063. loop_id = NPH_F_PORT;
  2064. else
  2065. loop_id = SNS_FL_PORT;
  2066. rval = qla2x00_get_port_name(vha, loop_id, vha->fabric_node_name, 1);
  2067. if (rval != QLA_SUCCESS) {
  2068. DEBUG2(printk("scsi(%ld): MBC_GET_PORT_NAME Failed, No FL "
  2069. "Port\n", vha->host_no));
  2070. vha->device_flags &= ~SWITCH_FOUND;
  2071. return (QLA_SUCCESS);
  2072. }
  2073. vha->device_flags |= SWITCH_FOUND;
  2074. /* Mark devices that need re-synchronization. */
  2075. rval2 = qla2x00_device_resync(vha);
  2076. if (rval2 == QLA_RSCNS_HANDLED) {
  2077. /* No point doing the scan, just continue. */
  2078. return (QLA_SUCCESS);
  2079. }
  2080. do {
  2081. /* FDMI support. */
  2082. if (ql2xfdmienable &&
  2083. test_and_clear_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags))
  2084. qla2x00_fdmi_register(vha);
  2085. /* Ensure we are logged into the SNS. */
  2086. if (IS_FWI2_CAPABLE(ha))
  2087. loop_id = NPH_SNS;
  2088. else
  2089. loop_id = SIMPLE_NAME_SERVER;
  2090. ha->isp_ops->fabric_login(vha, loop_id, 0xff, 0xff,
  2091. 0xfc, mb, BIT_1 | BIT_0);
  2092. if (mb[0] != MBS_COMMAND_COMPLETE) {
  2093. DEBUG2(qla_printk(KERN_INFO, ha,
  2094. "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x "
  2095. "mb[2]=%x mb[6]=%x mb[7]=%x\n", loop_id,
  2096. mb[0], mb[1], mb[2], mb[6], mb[7]));
  2097. return (QLA_SUCCESS);
  2098. }
  2099. if (test_and_clear_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags)) {
  2100. if (qla2x00_rft_id(vha)) {
  2101. /* EMPTY */
  2102. DEBUG2(printk("scsi(%ld): Register FC-4 "
  2103. "TYPE failed.\n", vha->host_no));
  2104. }
  2105. if (qla2x00_rff_id(vha)) {
  2106. /* EMPTY */
  2107. DEBUG2(printk("scsi(%ld): Register FC-4 "
  2108. "Features failed.\n", vha->host_no));
  2109. }
  2110. if (qla2x00_rnn_id(vha)) {
  2111. /* EMPTY */
  2112. DEBUG2(printk("scsi(%ld): Register Node Name "
  2113. "failed.\n", vha->host_no));
  2114. } else if (qla2x00_rsnn_nn(vha)) {
  2115. /* EMPTY */
  2116. DEBUG2(printk("scsi(%ld): Register Symbolic "
  2117. "Node Name failed.\n", vha->host_no));
  2118. }
  2119. }
  2120. rval = qla2x00_find_all_fabric_devs(vha, &new_fcports);
  2121. if (rval != QLA_SUCCESS)
  2122. break;
  2123. /*
  2124. * Logout all previous fabric devices marked lost, except
  2125. * tape devices.
  2126. */
  2127. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  2128. if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
  2129. break;
  2130. if ((fcport->flags & FCF_FABRIC_DEVICE) == 0)
  2131. continue;
  2132. if (atomic_read(&fcport->state) == FCS_DEVICE_LOST) {
  2133. qla2x00_mark_device_lost(vha, fcport,
  2134. ql2xplogiabsentdevice, 0);
  2135. if (fcport->loop_id != FC_NO_LOOP_ID &&
  2136. (fcport->flags & FCF_TAPE_PRESENT) == 0 &&
  2137. fcport->port_type != FCT_INITIATOR &&
  2138. fcport->port_type != FCT_BROADCAST) {
  2139. ha->isp_ops->fabric_logout(vha,
  2140. fcport->loop_id,
  2141. fcport->d_id.b.domain,
  2142. fcport->d_id.b.area,
  2143. fcport->d_id.b.al_pa);
  2144. fcport->loop_id = FC_NO_LOOP_ID;
  2145. }
  2146. }
  2147. }
  2148. /* Starting free loop ID. */
  2149. next_loopid = ha->min_external_loopid;
  2150. /*
  2151. * Scan through our port list and login entries that need to be
  2152. * logged in.
  2153. */
  2154. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  2155. if (atomic_read(&vha->loop_down_timer) ||
  2156. test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
  2157. break;
  2158. if ((fcport->flags & FCF_FABRIC_DEVICE) == 0 ||
  2159. (fcport->flags & FCF_LOGIN_NEEDED) == 0)
  2160. continue;
  2161. if (fcport->loop_id == FC_NO_LOOP_ID) {
  2162. fcport->loop_id = next_loopid;
  2163. rval = qla2x00_find_new_loop_id(
  2164. base_vha, fcport);
  2165. if (rval != QLA_SUCCESS) {
  2166. /* Ran out of IDs to use */
  2167. break;
  2168. }
  2169. }
  2170. /* Login and update database */
  2171. qla2x00_fabric_dev_login(vha, fcport, &next_loopid);
  2172. }
  2173. /* Exit if out of loop IDs. */
  2174. if (rval != QLA_SUCCESS) {
  2175. break;
  2176. }
  2177. /*
  2178. * Login and add the new devices to our port list.
  2179. */
  2180. list_for_each_entry_safe(fcport, fcptemp, &new_fcports, list) {
  2181. if (atomic_read(&vha->loop_down_timer) ||
  2182. test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
  2183. break;
  2184. /* Find a new loop ID to use. */
  2185. fcport->loop_id = next_loopid;
  2186. rval = qla2x00_find_new_loop_id(base_vha, fcport);
  2187. if (rval != QLA_SUCCESS) {
  2188. /* Ran out of IDs to use */
  2189. break;
  2190. }
  2191. /* Login and update database */
  2192. qla2x00_fabric_dev_login(vha, fcport, &next_loopid);
  2193. if (vha->vp_idx) {
  2194. fcport->vha = vha;
  2195. fcport->vp_idx = vha->vp_idx;
  2196. }
  2197. list_move_tail(&fcport->list, &vha->vp_fcports);
  2198. }
  2199. } while (0);
  2200. /* Free all new device structures not processed. */
  2201. list_for_each_entry_safe(fcport, fcptemp, &new_fcports, list) {
  2202. list_del(&fcport->list);
  2203. kfree(fcport);
  2204. }
  2205. if (rval) {
  2206. DEBUG2(printk("scsi(%ld): Configure fabric error exit: "
  2207. "rval=%d\n", vha->host_no, rval));
  2208. }
  2209. return (rval);
  2210. }
  2211. /*
  2212. * qla2x00_find_all_fabric_devs
  2213. *
  2214. * Input:
  2215. * ha = adapter block pointer.
  2216. * dev = database device entry pointer.
  2217. *
  2218. * Returns:
  2219. * 0 = success.
  2220. *
  2221. * Context:
  2222. * Kernel context.
  2223. */
  2224. static int
  2225. qla2x00_find_all_fabric_devs(scsi_qla_host_t *vha,
  2226. struct list_head *new_fcports)
  2227. {
  2228. int rval;
  2229. uint16_t loop_id;
  2230. fc_port_t *fcport, *new_fcport, *fcptemp;
  2231. int found;
  2232. sw_info_t *swl;
  2233. int swl_idx;
  2234. int first_dev, last_dev;
  2235. port_id_t wrap, nxt_d_id;
  2236. struct qla_hw_data *ha = vha->hw;
  2237. struct scsi_qla_host *vp, *base_vha = pci_get_drvdata(ha->pdev);
  2238. struct scsi_qla_host *tvp;
  2239. rval = QLA_SUCCESS;
  2240. /* Try GID_PT to get device list, else GAN. */
  2241. swl = kcalloc(MAX_FIBRE_DEVICES, sizeof(sw_info_t), GFP_KERNEL);
  2242. if (!swl) {
  2243. /*EMPTY*/
  2244. DEBUG2(printk("scsi(%ld): GID_PT allocations failed, fallback "
  2245. "on GA_NXT\n", vha->host_no));
  2246. } else {
  2247. if (qla2x00_gid_pt(vha, swl) != QLA_SUCCESS) {
  2248. kfree(swl);
  2249. swl = NULL;
  2250. } else if (qla2x00_gpn_id(vha, swl) != QLA_SUCCESS) {
  2251. kfree(swl);
  2252. swl = NULL;
  2253. } else if (qla2x00_gnn_id(vha, swl) != QLA_SUCCESS) {
  2254. kfree(swl);
  2255. swl = NULL;
  2256. } else if (ql2xiidmaenable &&
  2257. qla2x00_gfpn_id(vha, swl) == QLA_SUCCESS) {
  2258. qla2x00_gpsc(vha, swl);
  2259. }
  2260. }
  2261. swl_idx = 0;
  2262. /* Allocate temporary fcport for any new fcports discovered. */
  2263. new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
  2264. if (new_fcport == NULL) {
  2265. kfree(swl);
  2266. return (QLA_MEMORY_ALLOC_FAILED);
  2267. }
  2268. new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED);
  2269. /* Set start port ID scan at adapter ID. */
  2270. first_dev = 1;
  2271. last_dev = 0;
  2272. /* Starting free loop ID. */
  2273. loop_id = ha->min_external_loopid;
  2274. for (; loop_id <= ha->max_loop_id; loop_id++) {
  2275. if (qla2x00_is_reserved_id(vha, loop_id))
  2276. continue;
  2277. if (atomic_read(&vha->loop_down_timer) || LOOP_TRANSITION(vha))
  2278. break;
  2279. if (swl != NULL) {
  2280. if (last_dev) {
  2281. wrap.b24 = new_fcport->d_id.b24;
  2282. } else {
  2283. new_fcport->d_id.b24 = swl[swl_idx].d_id.b24;
  2284. memcpy(new_fcport->node_name,
  2285. swl[swl_idx].node_name, WWN_SIZE);
  2286. memcpy(new_fcport->port_name,
  2287. swl[swl_idx].port_name, WWN_SIZE);
  2288. memcpy(new_fcport->fabric_port_name,
  2289. swl[swl_idx].fabric_port_name, WWN_SIZE);
  2290. new_fcport->fp_speed = swl[swl_idx].fp_speed;
  2291. if (swl[swl_idx].d_id.b.rsvd_1 != 0) {
  2292. last_dev = 1;
  2293. }
  2294. swl_idx++;
  2295. }
  2296. } else {
  2297. /* Send GA_NXT to the switch */
  2298. rval = qla2x00_ga_nxt(vha, new_fcport);
  2299. if (rval != QLA_SUCCESS) {
  2300. qla_printk(KERN_WARNING, ha,
  2301. "SNS scan failed -- assuming zero-entry "
  2302. "result...\n");
  2303. list_for_each_entry_safe(fcport, fcptemp,
  2304. new_fcports, list) {
  2305. list_del(&fcport->list);
  2306. kfree(fcport);
  2307. }
  2308. rval = QLA_SUCCESS;
  2309. break;
  2310. }
  2311. }
  2312. /* If wrap on switch device list, exit. */
  2313. if (first_dev) {
  2314. wrap.b24 = new_fcport->d_id.b24;
  2315. first_dev = 0;
  2316. } else if (new_fcport->d_id.b24 == wrap.b24) {
  2317. DEBUG2(printk("scsi(%ld): device wrap (%02x%02x%02x)\n",
  2318. vha->host_no, new_fcport->d_id.b.domain,
  2319. new_fcport->d_id.b.area, new_fcport->d_id.b.al_pa));
  2320. break;
  2321. }
  2322. /* Bypass if same physical adapter. */
  2323. if (new_fcport->d_id.b24 == base_vha->d_id.b24)
  2324. continue;
  2325. /* Bypass virtual ports of the same host. */
  2326. found = 0;
  2327. if (ha->num_vhosts) {
  2328. list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) {
  2329. if (new_fcport->d_id.b24 == vp->d_id.b24) {
  2330. found = 1;
  2331. break;
  2332. }
  2333. }
  2334. if (found)
  2335. continue;
  2336. }
  2337. /* Bypass if same domain and area of adapter. */
  2338. if (((new_fcport->d_id.b24 & 0xffff00) ==
  2339. (vha->d_id.b24 & 0xffff00)) && ha->current_topology ==
  2340. ISP_CFG_FL)
  2341. continue;
  2342. /* Bypass reserved domain fields. */
  2343. if ((new_fcport->d_id.b.domain & 0xf0) == 0xf0)
  2344. continue;
  2345. /* Locate matching device in database. */
  2346. found = 0;
  2347. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  2348. if (memcmp(new_fcport->port_name, fcport->port_name,
  2349. WWN_SIZE))
  2350. continue;
  2351. found++;
  2352. /* Update port state. */
  2353. memcpy(fcport->fabric_port_name,
  2354. new_fcport->fabric_port_name, WWN_SIZE);
  2355. fcport->fp_speed = new_fcport->fp_speed;
  2356. /*
  2357. * If address the same and state FCS_ONLINE, nothing
  2358. * changed.
  2359. */
  2360. if (fcport->d_id.b24 == new_fcport->d_id.b24 &&
  2361. atomic_read(&fcport->state) == FCS_ONLINE) {
  2362. break;
  2363. }
  2364. /*
  2365. * If device was not a fabric device before.
  2366. */
  2367. if ((fcport->flags & FCF_FABRIC_DEVICE) == 0) {
  2368. fcport->d_id.b24 = new_fcport->d_id.b24;
  2369. fcport->loop_id = FC_NO_LOOP_ID;
  2370. fcport->flags |= (FCF_FABRIC_DEVICE |
  2371. FCF_LOGIN_NEEDED);
  2372. fcport->flags &= ~FCF_PERSISTENT_BOUND;
  2373. break;
  2374. }
  2375. /*
  2376. * Port ID changed or device was marked to be updated;
  2377. * Log it out if still logged in and mark it for
  2378. * relogin later.
  2379. */
  2380. fcport->d_id.b24 = new_fcport->d_id.b24;
  2381. fcport->flags |= FCF_LOGIN_NEEDED;
  2382. if (fcport->loop_id != FC_NO_LOOP_ID &&
  2383. (fcport->flags & FCF_TAPE_PRESENT) == 0 &&
  2384. fcport->port_type != FCT_INITIATOR &&
  2385. fcport->port_type != FCT_BROADCAST) {
  2386. ha->isp_ops->fabric_logout(vha, fcport->loop_id,
  2387. fcport->d_id.b.domain, fcport->d_id.b.area,
  2388. fcport->d_id.b.al_pa);
  2389. fcport->loop_id = FC_NO_LOOP_ID;
  2390. }
  2391. break;
  2392. }
  2393. if (found)
  2394. continue;
  2395. /* If device was not in our fcports list, then add it. */
  2396. list_add_tail(&new_fcport->list, new_fcports);
  2397. /* Allocate a new replacement fcport. */
  2398. nxt_d_id.b24 = new_fcport->d_id.b24;
  2399. new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
  2400. if (new_fcport == NULL) {
  2401. kfree(swl);
  2402. return (QLA_MEMORY_ALLOC_FAILED);
  2403. }
  2404. new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED);
  2405. new_fcport->d_id.b24 = nxt_d_id.b24;
  2406. }
  2407. kfree(swl);
  2408. kfree(new_fcport);
  2409. if (!list_empty(new_fcports))
  2410. vha->device_flags |= DFLG_FABRIC_DEVICES;
  2411. return (rval);
  2412. }
  2413. /*
  2414. * qla2x00_find_new_loop_id
  2415. * Scan through our port list and find a new usable loop ID.
  2416. *
  2417. * Input:
  2418. * ha: adapter state pointer.
  2419. * dev: port structure pointer.
  2420. *
  2421. * Returns:
  2422. * qla2x00 local function return status code.
  2423. *
  2424. * Context:
  2425. * Kernel context.
  2426. */
  2427. static int
  2428. qla2x00_find_new_loop_id(scsi_qla_host_t *vha, fc_port_t *dev)
  2429. {
  2430. int rval;
  2431. int found;
  2432. fc_port_t *fcport;
  2433. uint16_t first_loop_id;
  2434. struct qla_hw_data *ha = vha->hw;
  2435. struct scsi_qla_host *vp;
  2436. struct scsi_qla_host *tvp;
  2437. rval = QLA_SUCCESS;
  2438. /* Save starting loop ID. */
  2439. first_loop_id = dev->loop_id;
  2440. for (;;) {
  2441. /* Skip loop ID if already used by adapter. */
  2442. if (dev->loop_id == vha->loop_id)
  2443. dev->loop_id++;
  2444. /* Skip reserved loop IDs. */
  2445. while (qla2x00_is_reserved_id(vha, dev->loop_id))
  2446. dev->loop_id++;
  2447. /* Reset loop ID if passed the end. */
  2448. if (dev->loop_id > ha->max_loop_id) {
  2449. /* first loop ID. */
  2450. dev->loop_id = ha->min_external_loopid;
  2451. }
  2452. /* Check for loop ID being already in use. */
  2453. found = 0;
  2454. fcport = NULL;
  2455. list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) {
  2456. list_for_each_entry(fcport, &vp->vp_fcports, list) {
  2457. if (fcport->loop_id == dev->loop_id &&
  2458. fcport != dev) {
  2459. /* ID possibly in use */
  2460. found++;
  2461. break;
  2462. }
  2463. }
  2464. if (found)
  2465. break;
  2466. }
  2467. /* If not in use then it is free to use. */
  2468. if (!found) {
  2469. break;
  2470. }
  2471. /* ID in use. Try next value. */
  2472. dev->loop_id++;
  2473. /* If wrap around. No free ID to use. */
  2474. if (dev->loop_id == first_loop_id) {
  2475. dev->loop_id = FC_NO_LOOP_ID;
  2476. rval = QLA_FUNCTION_FAILED;
  2477. break;
  2478. }
  2479. }
  2480. return (rval);
  2481. }
  2482. /*
  2483. * qla2x00_device_resync
  2484. * Marks devices in the database that needs resynchronization.
  2485. *
  2486. * Input:
  2487. * ha = adapter block pointer.
  2488. *
  2489. * Context:
  2490. * Kernel context.
  2491. */
  2492. static int
  2493. qla2x00_device_resync(scsi_qla_host_t *vha)
  2494. {
  2495. int rval;
  2496. uint32_t mask;
  2497. fc_port_t *fcport;
  2498. uint32_t rscn_entry;
  2499. uint8_t rscn_out_iter;
  2500. uint8_t format;
  2501. port_id_t d_id;
  2502. rval = QLA_RSCNS_HANDLED;
  2503. while (vha->rscn_out_ptr != vha->rscn_in_ptr ||
  2504. vha->flags.rscn_queue_overflow) {
  2505. rscn_entry = vha->rscn_queue[vha->rscn_out_ptr];
  2506. format = MSB(MSW(rscn_entry));
  2507. d_id.b.domain = LSB(MSW(rscn_entry));
  2508. d_id.b.area = MSB(LSW(rscn_entry));
  2509. d_id.b.al_pa = LSB(LSW(rscn_entry));
  2510. DEBUG(printk("scsi(%ld): RSCN queue entry[%d] = "
  2511. "[%02x/%02x%02x%02x].\n",
  2512. vha->host_no, vha->rscn_out_ptr, format, d_id.b.domain,
  2513. d_id.b.area, d_id.b.al_pa));
  2514. vha->rscn_out_ptr++;
  2515. if (vha->rscn_out_ptr == MAX_RSCN_COUNT)
  2516. vha->rscn_out_ptr = 0;
  2517. /* Skip duplicate entries. */
  2518. for (rscn_out_iter = vha->rscn_out_ptr;
  2519. !vha->flags.rscn_queue_overflow &&
  2520. rscn_out_iter != vha->rscn_in_ptr;
  2521. rscn_out_iter = (rscn_out_iter ==
  2522. (MAX_RSCN_COUNT - 1)) ? 0: rscn_out_iter + 1) {
  2523. if (rscn_entry != vha->rscn_queue[rscn_out_iter])
  2524. break;
  2525. DEBUG(printk("scsi(%ld): Skipping duplicate RSCN queue "
  2526. "entry found at [%d].\n", vha->host_no,
  2527. rscn_out_iter));
  2528. vha->rscn_out_ptr = rscn_out_iter;
  2529. }
  2530. /* Queue overflow, set switch default case. */
  2531. if (vha->flags.rscn_queue_overflow) {
  2532. DEBUG(printk("scsi(%ld): device_resync: rscn "
  2533. "overflow.\n", vha->host_no));
  2534. format = 3;
  2535. vha->flags.rscn_queue_overflow = 0;
  2536. }
  2537. switch (format) {
  2538. case 0:
  2539. mask = 0xffffff;
  2540. break;
  2541. case 1:
  2542. mask = 0xffff00;
  2543. break;
  2544. case 2:
  2545. mask = 0xff0000;
  2546. break;
  2547. default:
  2548. mask = 0x0;
  2549. d_id.b24 = 0;
  2550. vha->rscn_out_ptr = vha->rscn_in_ptr;
  2551. break;
  2552. }
  2553. rval = QLA_SUCCESS;
  2554. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  2555. if ((fcport->flags & FCF_FABRIC_DEVICE) == 0 ||
  2556. (fcport->d_id.b24 & mask) != d_id.b24 ||
  2557. fcport->port_type == FCT_BROADCAST)
  2558. continue;
  2559. if (atomic_read(&fcport->state) == FCS_ONLINE) {
  2560. if (format != 3 ||
  2561. fcport->port_type != FCT_INITIATOR) {
  2562. qla2x00_mark_device_lost(vha, fcport,
  2563. 0, 0);
  2564. }
  2565. }
  2566. fcport->flags &= ~FCF_FARP_DONE;
  2567. }
  2568. }
  2569. return (rval);
  2570. }
  2571. /*
  2572. * qla2x00_fabric_dev_login
  2573. * Login fabric target device and update FC port database.
  2574. *
  2575. * Input:
  2576. * ha: adapter state pointer.
  2577. * fcport: port structure list pointer.
  2578. * next_loopid: contains value of a new loop ID that can be used
  2579. * by the next login attempt.
  2580. *
  2581. * Returns:
  2582. * qla2x00 local function return status code.
  2583. *
  2584. * Context:
  2585. * Kernel context.
  2586. */
  2587. static int
  2588. qla2x00_fabric_dev_login(scsi_qla_host_t *vha, fc_port_t *fcport,
  2589. uint16_t *next_loopid)
  2590. {
  2591. int rval;
  2592. int retry;
  2593. uint8_t opts;
  2594. struct qla_hw_data *ha = vha->hw;
  2595. rval = QLA_SUCCESS;
  2596. retry = 0;
  2597. rval = qla2x00_fabric_login(vha, fcport, next_loopid);
  2598. if (rval == QLA_SUCCESS) {
  2599. /* Send an ADISC to tape devices.*/
  2600. opts = 0;
  2601. if (fcport->flags & FCF_TAPE_PRESENT)
  2602. opts |= BIT_1;
  2603. rval = qla2x00_get_port_database(vha, fcport, opts);
  2604. if (rval != QLA_SUCCESS) {
  2605. ha->isp_ops->fabric_logout(vha, fcport->loop_id,
  2606. fcport->d_id.b.domain, fcport->d_id.b.area,
  2607. fcport->d_id.b.al_pa);
  2608. qla2x00_mark_device_lost(vha, fcport, 1, 0);
  2609. } else {
  2610. qla2x00_update_fcport(vha, fcport);
  2611. }
  2612. }
  2613. return (rval);
  2614. }
  2615. /*
  2616. * qla2x00_fabric_login
  2617. * Issue fabric login command.
  2618. *
  2619. * Input:
  2620. * ha = adapter block pointer.
  2621. * device = pointer to FC device type structure.
  2622. *
  2623. * Returns:
  2624. * 0 - Login successfully
  2625. * 1 - Login failed
  2626. * 2 - Initiator device
  2627. * 3 - Fatal error
  2628. */
  2629. int
  2630. qla2x00_fabric_login(scsi_qla_host_t *vha, fc_port_t *fcport,
  2631. uint16_t *next_loopid)
  2632. {
  2633. int rval;
  2634. int retry;
  2635. uint16_t tmp_loopid;
  2636. uint16_t mb[MAILBOX_REGISTER_COUNT];
  2637. struct qla_hw_data *ha = vha->hw;
  2638. retry = 0;
  2639. tmp_loopid = 0;
  2640. for (;;) {
  2641. DEBUG(printk("scsi(%ld): Trying Fabric Login w/loop id 0x%04x "
  2642. "for port %02x%02x%02x.\n",
  2643. vha->host_no, fcport->loop_id, fcport->d_id.b.domain,
  2644. fcport->d_id.b.area, fcport->d_id.b.al_pa));
  2645. /* Login fcport on switch. */
  2646. ha->isp_ops->fabric_login(vha, fcport->loop_id,
  2647. fcport->d_id.b.domain, fcport->d_id.b.area,
  2648. fcport->d_id.b.al_pa, mb, BIT_0);
  2649. if (mb[0] == MBS_PORT_ID_USED) {
  2650. /*
  2651. * Device has another loop ID. The firmware team
  2652. * recommends the driver perform an implicit login with
  2653. * the specified ID again. The ID we just used is save
  2654. * here so we return with an ID that can be tried by
  2655. * the next login.
  2656. */
  2657. retry++;
  2658. tmp_loopid = fcport->loop_id;
  2659. fcport->loop_id = mb[1];
  2660. DEBUG(printk("Fabric Login: port in use - next "
  2661. "loop id=0x%04x, port Id=%02x%02x%02x.\n",
  2662. fcport->loop_id, fcport->d_id.b.domain,
  2663. fcport->d_id.b.area, fcport->d_id.b.al_pa));
  2664. } else if (mb[0] == MBS_COMMAND_COMPLETE) {
  2665. /*
  2666. * Login succeeded.
  2667. */
  2668. if (retry) {
  2669. /* A retry occurred before. */
  2670. *next_loopid = tmp_loopid;
  2671. } else {
  2672. /*
  2673. * No retry occurred before. Just increment the
  2674. * ID value for next login.
  2675. */
  2676. *next_loopid = (fcport->loop_id + 1);
  2677. }
  2678. if (mb[1] & BIT_0) {
  2679. fcport->port_type = FCT_INITIATOR;
  2680. } else {
  2681. fcport->port_type = FCT_TARGET;
  2682. if (mb[1] & BIT_1) {
  2683. fcport->flags |= FCF_TAPE_PRESENT;
  2684. }
  2685. }
  2686. if (mb[10] & BIT_0)
  2687. fcport->supported_classes |= FC_COS_CLASS2;
  2688. if (mb[10] & BIT_1)
  2689. fcport->supported_classes |= FC_COS_CLASS3;
  2690. rval = QLA_SUCCESS;
  2691. break;
  2692. } else if (mb[0] == MBS_LOOP_ID_USED) {
  2693. /*
  2694. * Loop ID already used, try next loop ID.
  2695. */
  2696. fcport->loop_id++;
  2697. rval = qla2x00_find_new_loop_id(vha, fcport);
  2698. if (rval != QLA_SUCCESS) {
  2699. /* Ran out of loop IDs to use */
  2700. break;
  2701. }
  2702. } else if (mb[0] == MBS_COMMAND_ERROR) {
  2703. /*
  2704. * Firmware possibly timed out during login. If NO
  2705. * retries are left to do then the device is declared
  2706. * dead.
  2707. */
  2708. *next_loopid = fcport->loop_id;
  2709. ha->isp_ops->fabric_logout(vha, fcport->loop_id,
  2710. fcport->d_id.b.domain, fcport->d_id.b.area,
  2711. fcport->d_id.b.al_pa);
  2712. qla2x00_mark_device_lost(vha, fcport, 1, 0);
  2713. rval = 1;
  2714. break;
  2715. } else {
  2716. /*
  2717. * unrecoverable / not handled error
  2718. */
  2719. DEBUG2(printk("%s(%ld): failed=%x port_id=%02x%02x%02x "
  2720. "loop_id=%x jiffies=%lx.\n",
  2721. __func__, vha->host_no, mb[0],
  2722. fcport->d_id.b.domain, fcport->d_id.b.area,
  2723. fcport->d_id.b.al_pa, fcport->loop_id, jiffies));
  2724. *next_loopid = fcport->loop_id;
  2725. ha->isp_ops->fabric_logout(vha, fcport->loop_id,
  2726. fcport->d_id.b.domain, fcport->d_id.b.area,
  2727. fcport->d_id.b.al_pa);
  2728. fcport->loop_id = FC_NO_LOOP_ID;
  2729. fcport->login_retry = 0;
  2730. rval = 3;
  2731. break;
  2732. }
  2733. }
  2734. return (rval);
  2735. }
  2736. /*
  2737. * qla2x00_local_device_login
  2738. * Issue local device login command.
  2739. *
  2740. * Input:
  2741. * ha = adapter block pointer.
  2742. * loop_id = loop id of device to login to.
  2743. *
  2744. * Returns (Where's the #define!!!!):
  2745. * 0 - Login successfully
  2746. * 1 - Login failed
  2747. * 3 - Fatal error
  2748. */
  2749. int
  2750. qla2x00_local_device_login(scsi_qla_host_t *vha, fc_port_t *fcport)
  2751. {
  2752. int rval;
  2753. uint16_t mb[MAILBOX_REGISTER_COUNT];
  2754. memset(mb, 0, sizeof(mb));
  2755. rval = qla2x00_login_local_device(vha, fcport, mb, BIT_0);
  2756. if (rval == QLA_SUCCESS) {
  2757. /* Interrogate mailbox registers for any errors */
  2758. if (mb[0] == MBS_COMMAND_ERROR)
  2759. rval = 1;
  2760. else if (mb[0] == MBS_COMMAND_PARAMETER_ERROR)
  2761. /* device not in PCB table */
  2762. rval = 3;
  2763. }
  2764. return (rval);
  2765. }
  2766. /*
  2767. * qla2x00_loop_resync
  2768. * Resync with fibre channel devices.
  2769. *
  2770. * Input:
  2771. * ha = adapter block pointer.
  2772. *
  2773. * Returns:
  2774. * 0 = success
  2775. */
  2776. int
  2777. qla2x00_loop_resync(scsi_qla_host_t *vha)
  2778. {
  2779. int rval = QLA_SUCCESS;
  2780. uint32_t wait_time;
  2781. struct qla_hw_data *ha = vha->hw;
  2782. struct req_que *req = ha->req_q_map[vha->req_ques[0]];
  2783. struct rsp_que *rsp = req->rsp;
  2784. atomic_set(&vha->loop_state, LOOP_UPDATE);
  2785. clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
  2786. if (vha->flags.online) {
  2787. if (!(rval = qla2x00_fw_ready(vha))) {
  2788. /* Wait at most MAX_TARGET RSCNs for a stable link. */
  2789. wait_time = 256;
  2790. do {
  2791. atomic_set(&vha->loop_state, LOOP_UPDATE);
  2792. /* Issue a marker after FW becomes ready. */
  2793. qla2x00_marker(vha, req, rsp, 0, 0,
  2794. MK_SYNC_ALL);
  2795. vha->marker_needed = 0;
  2796. /* Remap devices on Loop. */
  2797. clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  2798. qla2x00_configure_loop(vha);
  2799. wait_time--;
  2800. } while (!atomic_read(&vha->loop_down_timer) &&
  2801. !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
  2802. && wait_time && (test_bit(LOOP_RESYNC_NEEDED,
  2803. &vha->dpc_flags)));
  2804. }
  2805. }
  2806. if (test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
  2807. return (QLA_FUNCTION_FAILED);
  2808. if (rval)
  2809. DEBUG2_3(printk("%s(): **** FAILED ****\n", __func__));
  2810. return (rval);
  2811. }
  2812. void
  2813. qla2x00_update_fcports(scsi_qla_host_t *vha)
  2814. {
  2815. fc_port_t *fcport;
  2816. /* Go with deferred removal of rport references. */
  2817. list_for_each_entry(fcport, &vha->vp_fcports, list)
  2818. if (fcport && fcport->drport &&
  2819. atomic_read(&fcport->state) != FCS_UNCONFIGURED)
  2820. qla2x00_rport_del(fcport);
  2821. }
  2822. /*
  2823. * qla2x00_abort_isp
  2824. * Resets ISP and aborts all outstanding commands.
  2825. *
  2826. * Input:
  2827. * ha = adapter block pointer.
  2828. *
  2829. * Returns:
  2830. * 0 = success
  2831. */
  2832. int
  2833. qla2x00_abort_isp(scsi_qla_host_t *vha)
  2834. {
  2835. int rval;
  2836. uint8_t status = 0;
  2837. struct qla_hw_data *ha = vha->hw;
  2838. struct scsi_qla_host *vp;
  2839. struct scsi_qla_host *tvp;
  2840. struct req_que *req = ha->req_q_map[0];
  2841. if (vha->flags.online) {
  2842. vha->flags.online = 0;
  2843. clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
  2844. ha->qla_stats.total_isp_aborts++;
  2845. qla_printk(KERN_INFO, ha,
  2846. "Performing ISP error recovery - ha= %p.\n", ha);
  2847. ha->isp_ops->reset_chip(vha);
  2848. atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
  2849. if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
  2850. atomic_set(&vha->loop_state, LOOP_DOWN);
  2851. qla2x00_mark_all_devices_lost(vha, 0);
  2852. list_for_each_entry_safe(vp, tvp, &ha->vp_list, list)
  2853. qla2x00_mark_all_devices_lost(vp, 0);
  2854. } else {
  2855. if (!atomic_read(&vha->loop_down_timer))
  2856. atomic_set(&vha->loop_down_timer,
  2857. LOOP_DOWN_TIME);
  2858. }
  2859. /* Requeue all commands in outstanding command list. */
  2860. qla2x00_abort_all_cmds(vha, DID_RESET << 16);
  2861. ha->isp_ops->get_flash_version(vha, req->ring);
  2862. ha->isp_ops->nvram_config(vha);
  2863. if (!qla2x00_restart_isp(vha)) {
  2864. clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
  2865. if (!atomic_read(&vha->loop_down_timer)) {
  2866. /*
  2867. * Issue marker command only when we are going
  2868. * to start the I/O .
  2869. */
  2870. vha->marker_needed = 1;
  2871. }
  2872. vha->flags.online = 1;
  2873. ha->isp_ops->enable_intrs(ha);
  2874. ha->isp_abort_cnt = 0;
  2875. clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
  2876. if (ha->fce) {
  2877. ha->flags.fce_enabled = 1;
  2878. memset(ha->fce, 0,
  2879. fce_calc_size(ha->fce_bufs));
  2880. rval = qla2x00_enable_fce_trace(vha,
  2881. ha->fce_dma, ha->fce_bufs, ha->fce_mb,
  2882. &ha->fce_bufs);
  2883. if (rval) {
  2884. qla_printk(KERN_WARNING, ha,
  2885. "Unable to reinitialize FCE "
  2886. "(%d).\n", rval);
  2887. ha->flags.fce_enabled = 0;
  2888. }
  2889. }
  2890. if (ha->eft) {
  2891. memset(ha->eft, 0, EFT_SIZE);
  2892. rval = qla2x00_enable_eft_trace(vha,
  2893. ha->eft_dma, EFT_NUM_BUFFERS);
  2894. if (rval) {
  2895. qla_printk(KERN_WARNING, ha,
  2896. "Unable to reinitialize EFT "
  2897. "(%d).\n", rval);
  2898. }
  2899. }
  2900. } else { /* failed the ISP abort */
  2901. vha->flags.online = 1;
  2902. if (test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) {
  2903. if (ha->isp_abort_cnt == 0) {
  2904. qla_printk(KERN_WARNING, ha,
  2905. "ISP error recovery failed - "
  2906. "board disabled\n");
  2907. /*
  2908. * The next call disables the board
  2909. * completely.
  2910. */
  2911. ha->isp_ops->reset_adapter(vha);
  2912. vha->flags.online = 0;
  2913. clear_bit(ISP_ABORT_RETRY,
  2914. &vha->dpc_flags);
  2915. status = 0;
  2916. } else { /* schedule another ISP abort */
  2917. ha->isp_abort_cnt--;
  2918. DEBUG(printk("qla%ld: ISP abort - "
  2919. "retry remaining %d\n",
  2920. vha->host_no, ha->isp_abort_cnt));
  2921. status = 1;
  2922. }
  2923. } else {
  2924. ha->isp_abort_cnt = MAX_RETRIES_OF_ISP_ABORT;
  2925. DEBUG(printk("qla2x00(%ld): ISP error recovery "
  2926. "- retrying (%d) more times\n",
  2927. vha->host_no, ha->isp_abort_cnt));
  2928. set_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
  2929. status = 1;
  2930. }
  2931. }
  2932. }
  2933. if (!status) {
  2934. DEBUG(printk(KERN_INFO
  2935. "qla2x00_abort_isp(%ld): succeeded.\n",
  2936. vha->host_no));
  2937. list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) {
  2938. if (vp->vp_idx)
  2939. qla2x00_vp_abort_isp(vp);
  2940. }
  2941. } else {
  2942. qla_printk(KERN_INFO, ha,
  2943. "qla2x00_abort_isp: **** FAILED ****\n");
  2944. }
  2945. return(status);
  2946. }
  2947. /*
  2948. * qla2x00_restart_isp
  2949. * restarts the ISP after a reset
  2950. *
  2951. * Input:
  2952. * ha = adapter block pointer.
  2953. *
  2954. * Returns:
  2955. * 0 = success
  2956. */
  2957. static int
  2958. qla2x00_restart_isp(scsi_qla_host_t *vha)
  2959. {
  2960. int status = 0;
  2961. uint32_t wait_time;
  2962. struct qla_hw_data *ha = vha->hw;
  2963. struct req_que *req = ha->req_q_map[0];
  2964. struct rsp_que *rsp = ha->rsp_q_map[0];
  2965. /* If firmware needs to be loaded */
  2966. if (qla2x00_isp_firmware(vha)) {
  2967. vha->flags.online = 0;
  2968. status = ha->isp_ops->chip_diag(vha);
  2969. if (!status)
  2970. status = qla2x00_setup_chip(vha);
  2971. }
  2972. if (!status && !(status = qla2x00_init_rings(vha))) {
  2973. clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
  2974. /* Initialize the queues in use */
  2975. qla25xx_init_queues(ha);
  2976. status = qla2x00_fw_ready(vha);
  2977. if (!status) {
  2978. DEBUG(printk("%s(): Start configure loop, "
  2979. "status = %d\n", __func__, status));
  2980. /* Issue a marker after FW becomes ready. */
  2981. qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL);
  2982. vha->flags.online = 1;
  2983. /* Wait at most MAX_TARGET RSCNs for a stable link. */
  2984. wait_time = 256;
  2985. do {
  2986. clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  2987. qla2x00_configure_loop(vha);
  2988. wait_time--;
  2989. } while (!atomic_read(&vha->loop_down_timer) &&
  2990. !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
  2991. && wait_time && (test_bit(LOOP_RESYNC_NEEDED,
  2992. &vha->dpc_flags)));
  2993. }
  2994. /* if no cable then assume it's good */
  2995. if ((vha->device_flags & DFLG_NO_CABLE))
  2996. status = 0;
  2997. DEBUG(printk("%s(): Configure loop done, status = 0x%x\n",
  2998. __func__,
  2999. status));
  3000. }
  3001. return (status);
  3002. }
  3003. static int
  3004. qla25xx_init_queues(struct qla_hw_data *ha)
  3005. {
  3006. struct rsp_que *rsp = NULL;
  3007. struct req_que *req = NULL;
  3008. struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
  3009. int ret = -1;
  3010. int i;
  3011. for (i = 1; i < ha->max_queues; i++) {
  3012. rsp = ha->rsp_q_map[i];
  3013. if (rsp) {
  3014. rsp->options &= ~BIT_0;
  3015. ret = qla25xx_init_rsp_que(base_vha, rsp);
  3016. if (ret != QLA_SUCCESS)
  3017. DEBUG2_17(printk(KERN_WARNING
  3018. "%s Rsp que:%d init failed\n", __func__,
  3019. rsp->id));
  3020. else
  3021. DEBUG2_17(printk(KERN_INFO
  3022. "%s Rsp que:%d inited\n", __func__,
  3023. rsp->id));
  3024. }
  3025. req = ha->req_q_map[i];
  3026. if (req) {
  3027. /* Clear outstanding commands array. */
  3028. req->options &= ~BIT_0;
  3029. ret = qla25xx_init_req_que(base_vha, req);
  3030. if (ret != QLA_SUCCESS)
  3031. DEBUG2_17(printk(KERN_WARNING
  3032. "%s Req que:%d init failed\n", __func__,
  3033. req->id));
  3034. else
  3035. DEBUG2_17(printk(KERN_WARNING
  3036. "%s Req que:%d inited\n", __func__,
  3037. req->id));
  3038. }
  3039. }
  3040. return ret;
  3041. }
  3042. /*
  3043. * qla2x00_reset_adapter
  3044. * Reset adapter.
  3045. *
  3046. * Input:
  3047. * ha = adapter block pointer.
  3048. */
  3049. void
  3050. qla2x00_reset_adapter(scsi_qla_host_t *vha)
  3051. {
  3052. unsigned long flags = 0;
  3053. struct qla_hw_data *ha = vha->hw;
  3054. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  3055. vha->flags.online = 0;
  3056. ha->isp_ops->disable_intrs(ha);
  3057. spin_lock_irqsave(&ha->hardware_lock, flags);
  3058. WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
  3059. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  3060. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  3061. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  3062. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  3063. }
  3064. void
  3065. qla24xx_reset_adapter(scsi_qla_host_t *vha)
  3066. {
  3067. unsigned long flags = 0;
  3068. struct qla_hw_data *ha = vha->hw;
  3069. struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
  3070. vha->flags.online = 0;
  3071. ha->isp_ops->disable_intrs(ha);
  3072. spin_lock_irqsave(&ha->hardware_lock, flags);
  3073. WRT_REG_DWORD(&reg->hccr, HCCRX_SET_RISC_RESET);
  3074. RD_REG_DWORD(&reg->hccr);
  3075. WRT_REG_DWORD(&reg->hccr, HCCRX_REL_RISC_PAUSE);
  3076. RD_REG_DWORD(&reg->hccr);
  3077. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  3078. if (IS_NOPOLLING_TYPE(ha))
  3079. ha->isp_ops->enable_intrs(ha);
  3080. }
  3081. /* On sparc systems, obtain port and node WWN from firmware
  3082. * properties.
  3083. */
  3084. static void qla24xx_nvram_wwn_from_ofw(scsi_qla_host_t *vha,
  3085. struct nvram_24xx *nv)
  3086. {
  3087. #ifdef CONFIG_SPARC
  3088. struct qla_hw_data *ha = vha->hw;
  3089. struct pci_dev *pdev = ha->pdev;
  3090. struct device_node *dp = pci_device_to_OF_node(pdev);
  3091. const u8 *val;
  3092. int len;
  3093. val = of_get_property(dp, "port-wwn", &len);
  3094. if (val && len >= WWN_SIZE)
  3095. memcpy(nv->port_name, val, WWN_SIZE);
  3096. val = of_get_property(dp, "node-wwn", &len);
  3097. if (val && len >= WWN_SIZE)
  3098. memcpy(nv->node_name, val, WWN_SIZE);
  3099. #endif
  3100. }
  3101. int
  3102. qla24xx_nvram_config(scsi_qla_host_t *vha)
  3103. {
  3104. int rval;
  3105. struct init_cb_24xx *icb;
  3106. struct nvram_24xx *nv;
  3107. uint32_t *dptr;
  3108. uint8_t *dptr1, *dptr2;
  3109. uint32_t chksum;
  3110. uint16_t cnt;
  3111. struct qla_hw_data *ha = vha->hw;
  3112. rval = QLA_SUCCESS;
  3113. icb = (struct init_cb_24xx *)ha->init_cb;
  3114. nv = ha->nvram;
  3115. /* Determine NVRAM starting address. */
  3116. ha->nvram_size = sizeof(struct nvram_24xx);
  3117. ha->nvram_base = FA_NVRAM_FUNC0_ADDR;
  3118. ha->vpd_size = FA_NVRAM_VPD_SIZE;
  3119. ha->vpd_base = FA_NVRAM_VPD0_ADDR;
  3120. if (PCI_FUNC(ha->pdev->devfn)) {
  3121. ha->nvram_base = FA_NVRAM_FUNC1_ADDR;
  3122. ha->vpd_base = FA_NVRAM_VPD1_ADDR;
  3123. }
  3124. /* Get VPD data into cache */
  3125. ha->vpd = ha->nvram + VPD_OFFSET;
  3126. ha->isp_ops->read_nvram(vha, (uint8_t *)ha->vpd,
  3127. ha->nvram_base - FA_NVRAM_FUNC0_ADDR, FA_NVRAM_VPD_SIZE * 4);
  3128. /* Get NVRAM data into cache and calculate checksum. */
  3129. dptr = (uint32_t *)nv;
  3130. ha->isp_ops->read_nvram(vha, (uint8_t *)dptr, ha->nvram_base,
  3131. ha->nvram_size);
  3132. for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++)
  3133. chksum += le32_to_cpu(*dptr++);
  3134. DEBUG5(printk("scsi(%ld): Contents of NVRAM\n", ha->host_no));
  3135. DEBUG5(qla2x00_dump_buffer((uint8_t *)nv, ha->nvram_size));
  3136. /* Bad NVRAM data, set defaults parameters. */
  3137. if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P'
  3138. || nv->id[3] != ' ' ||
  3139. nv->nvram_version < __constant_cpu_to_le16(ICB_VERSION)) {
  3140. /* Reset NVRAM data. */
  3141. qla_printk(KERN_WARNING, ha, "Inconsistent NVRAM detected: "
  3142. "checksum=0x%x id=%c version=0x%x.\n", chksum, nv->id[0],
  3143. le16_to_cpu(nv->nvram_version));
  3144. qla_printk(KERN_WARNING, ha, "Falling back to functioning (yet "
  3145. "invalid -- WWPN) defaults.\n");
  3146. /*
  3147. * Set default initialization control block.
  3148. */
  3149. memset(nv, 0, ha->nvram_size);
  3150. nv->nvram_version = __constant_cpu_to_le16(ICB_VERSION);
  3151. nv->version = __constant_cpu_to_le16(ICB_VERSION);
  3152. nv->frame_payload_size = __constant_cpu_to_le16(2048);
  3153. nv->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  3154. nv->exchange_count = __constant_cpu_to_le16(0);
  3155. nv->hard_address = __constant_cpu_to_le16(124);
  3156. nv->port_name[0] = 0x21;
  3157. nv->port_name[1] = 0x00 + PCI_FUNC(ha->pdev->devfn);
  3158. nv->port_name[2] = 0x00;
  3159. nv->port_name[3] = 0xe0;
  3160. nv->port_name[4] = 0x8b;
  3161. nv->port_name[5] = 0x1c;
  3162. nv->port_name[6] = 0x55;
  3163. nv->port_name[7] = 0x86;
  3164. nv->node_name[0] = 0x20;
  3165. nv->node_name[1] = 0x00;
  3166. nv->node_name[2] = 0x00;
  3167. nv->node_name[3] = 0xe0;
  3168. nv->node_name[4] = 0x8b;
  3169. nv->node_name[5] = 0x1c;
  3170. nv->node_name[6] = 0x55;
  3171. nv->node_name[7] = 0x86;
  3172. qla24xx_nvram_wwn_from_ofw(vha, nv);
  3173. nv->login_retry_count = __constant_cpu_to_le16(8);
  3174. nv->interrupt_delay_timer = __constant_cpu_to_le16(0);
  3175. nv->login_timeout = __constant_cpu_to_le16(0);
  3176. nv->firmware_options_1 =
  3177. __constant_cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1);
  3178. nv->firmware_options_2 = __constant_cpu_to_le32(2 << 4);
  3179. nv->firmware_options_2 |= __constant_cpu_to_le32(BIT_12);
  3180. nv->firmware_options_3 = __constant_cpu_to_le32(2 << 13);
  3181. nv->host_p = __constant_cpu_to_le32(BIT_11|BIT_10);
  3182. nv->efi_parameters = __constant_cpu_to_le32(0);
  3183. nv->reset_delay = 5;
  3184. nv->max_luns_per_target = __constant_cpu_to_le16(128);
  3185. nv->port_down_retry_count = __constant_cpu_to_le16(30);
  3186. nv->link_down_timeout = __constant_cpu_to_le16(30);
  3187. rval = 1;
  3188. }
  3189. /* Reset Initialization control block */
  3190. memset(icb, 0, ha->init_cb_size);
  3191. /* Copy 1st segment. */
  3192. dptr1 = (uint8_t *)icb;
  3193. dptr2 = (uint8_t *)&nv->version;
  3194. cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version;
  3195. while (cnt--)
  3196. *dptr1++ = *dptr2++;
  3197. icb->login_retry_count = nv->login_retry_count;
  3198. icb->link_down_on_nos = nv->link_down_on_nos;
  3199. /* Copy 2nd segment. */
  3200. dptr1 = (uint8_t *)&icb->interrupt_delay_timer;
  3201. dptr2 = (uint8_t *)&nv->interrupt_delay_timer;
  3202. cnt = (uint8_t *)&icb->reserved_3 -
  3203. (uint8_t *)&icb->interrupt_delay_timer;
  3204. while (cnt--)
  3205. *dptr1++ = *dptr2++;
  3206. /*
  3207. * Setup driver NVRAM options.
  3208. */
  3209. qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name),
  3210. "QLA2462");
  3211. /* Use alternate WWN? */
  3212. if (nv->host_p & __constant_cpu_to_le32(BIT_15)) {
  3213. memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
  3214. memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
  3215. }
  3216. /* Prepare nodename */
  3217. if ((icb->firmware_options_1 & __constant_cpu_to_le32(BIT_14)) == 0) {
  3218. /*
  3219. * Firmware will apply the following mask if the nodename was
  3220. * not provided.
  3221. */
  3222. memcpy(icb->node_name, icb->port_name, WWN_SIZE);
  3223. icb->node_name[0] &= 0xF0;
  3224. }
  3225. /* Set host adapter parameters. */
  3226. ha->flags.disable_risc_code_load = 0;
  3227. ha->flags.enable_lip_reset = 0;
  3228. ha->flags.enable_lip_full_login =
  3229. le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0;
  3230. ha->flags.enable_target_reset =
  3231. le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0;
  3232. ha->flags.enable_led_scheme = 0;
  3233. ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0;
  3234. ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) &
  3235. (BIT_6 | BIT_5 | BIT_4)) >> 4;
  3236. memcpy(ha->fw_seriallink_options24, nv->seriallink_options,
  3237. sizeof(ha->fw_seriallink_options24));
  3238. /* save HBA serial number */
  3239. ha->serial0 = icb->port_name[5];
  3240. ha->serial1 = icb->port_name[6];
  3241. ha->serial2 = icb->port_name[7];
  3242. memcpy(vha->node_name, icb->node_name, WWN_SIZE);
  3243. memcpy(vha->port_name, icb->port_name, WWN_SIZE);
  3244. icb->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  3245. ha->retry_count = le16_to_cpu(nv->login_retry_count);
  3246. /* Set minimum login_timeout to 4 seconds. */
  3247. if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout)
  3248. nv->login_timeout = cpu_to_le16(ql2xlogintimeout);
  3249. if (le16_to_cpu(nv->login_timeout) < 4)
  3250. nv->login_timeout = __constant_cpu_to_le16(4);
  3251. ha->login_timeout = le16_to_cpu(nv->login_timeout);
  3252. icb->login_timeout = nv->login_timeout;
  3253. /* Set minimum RATOV to 100 tenths of a second. */
  3254. ha->r_a_tov = 100;
  3255. ha->loop_reset_delay = nv->reset_delay;
  3256. /* Link Down Timeout = 0:
  3257. *
  3258. * When Port Down timer expires we will start returning
  3259. * I/O's to OS with "DID_NO_CONNECT".
  3260. *
  3261. * Link Down Timeout != 0:
  3262. *
  3263. * The driver waits for the link to come up after link down
  3264. * before returning I/Os to OS with "DID_NO_CONNECT".
  3265. */
  3266. if (le16_to_cpu(nv->link_down_timeout) == 0) {
  3267. ha->loop_down_abort_time =
  3268. (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
  3269. } else {
  3270. ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout);
  3271. ha->loop_down_abort_time =
  3272. (LOOP_DOWN_TIME - ha->link_down_timeout);
  3273. }
  3274. /* Need enough time to try and get the port back. */
  3275. ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count);
  3276. if (qlport_down_retry)
  3277. ha->port_down_retry_count = qlport_down_retry;
  3278. /* Set login_retry_count */
  3279. ha->login_retry_count = le16_to_cpu(nv->login_retry_count);
  3280. if (ha->port_down_retry_count ==
  3281. le16_to_cpu(nv->port_down_retry_count) &&
  3282. ha->port_down_retry_count > 3)
  3283. ha->login_retry_count = ha->port_down_retry_count;
  3284. else if (ha->port_down_retry_count > (int)ha->login_retry_count)
  3285. ha->login_retry_count = ha->port_down_retry_count;
  3286. if (ql2xloginretrycount)
  3287. ha->login_retry_count = ql2xloginretrycount;
  3288. /* Enable ZIO. */
  3289. if (!vha->flags.init_done) {
  3290. ha->zio_mode = le32_to_cpu(icb->firmware_options_2) &
  3291. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  3292. ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ?
  3293. le16_to_cpu(icb->interrupt_delay_timer): 2;
  3294. }
  3295. icb->firmware_options_2 &= __constant_cpu_to_le32(
  3296. ~(BIT_3 | BIT_2 | BIT_1 | BIT_0));
  3297. vha->flags.process_response_queue = 0;
  3298. if (ha->zio_mode != QLA_ZIO_DISABLED) {
  3299. ha->zio_mode = QLA_ZIO_MODE_6;
  3300. DEBUG2(printk("scsi(%ld): ZIO mode %d enabled; timer delay "
  3301. "(%d us).\n", vha->host_no, ha->zio_mode,
  3302. ha->zio_timer * 100));
  3303. qla_printk(KERN_INFO, ha,
  3304. "ZIO mode %d enabled; timer delay (%d us).\n",
  3305. ha->zio_mode, ha->zio_timer * 100);
  3306. icb->firmware_options_2 |= cpu_to_le32(
  3307. (uint32_t)ha->zio_mode);
  3308. icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer);
  3309. vha->flags.process_response_queue = 1;
  3310. }
  3311. if (rval) {
  3312. DEBUG2_3(printk(KERN_WARNING
  3313. "scsi(%ld): NVRAM configuration failed!\n", vha->host_no));
  3314. }
  3315. return (rval);
  3316. }
  3317. static int
  3318. qla24xx_load_risc_flash(scsi_qla_host_t *vha, uint32_t *srisc_addr)
  3319. {
  3320. int rval = QLA_SUCCESS;
  3321. int segments, fragment;
  3322. uint32_t faddr;
  3323. uint32_t *dcode, dlen;
  3324. uint32_t risc_addr;
  3325. uint32_t risc_size;
  3326. uint32_t i;
  3327. struct qla_hw_data *ha = vha->hw;
  3328. struct req_que *req = ha->req_q_map[0];
  3329. qla_printk(KERN_INFO, ha,
  3330. "FW: Loading from flash (%x)...\n", ha->flt_region_fw);
  3331. rval = QLA_SUCCESS;
  3332. segments = FA_RISC_CODE_SEGMENTS;
  3333. faddr = ha->flt_region_fw;
  3334. dcode = (uint32_t *)req->ring;
  3335. *srisc_addr = 0;
  3336. /* Validate firmware image by checking version. */
  3337. qla24xx_read_flash_data(vha, dcode, faddr + 4, 4);
  3338. for (i = 0; i < 4; i++)
  3339. dcode[i] = be32_to_cpu(dcode[i]);
  3340. if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff &&
  3341. dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) ||
  3342. (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 &&
  3343. dcode[3] == 0)) {
  3344. qla_printk(KERN_WARNING, ha,
  3345. "Unable to verify integrity of flash firmware image!\n");
  3346. qla_printk(KERN_WARNING, ha,
  3347. "Firmware data: %08x %08x %08x %08x!\n", dcode[0],
  3348. dcode[1], dcode[2], dcode[3]);
  3349. return QLA_FUNCTION_FAILED;
  3350. }
  3351. while (segments && rval == QLA_SUCCESS) {
  3352. /* Read segment's load information. */
  3353. qla24xx_read_flash_data(vha, dcode, faddr, 4);
  3354. risc_addr = be32_to_cpu(dcode[2]);
  3355. *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr;
  3356. risc_size = be32_to_cpu(dcode[3]);
  3357. fragment = 0;
  3358. while (risc_size > 0 && rval == QLA_SUCCESS) {
  3359. dlen = (uint32_t)(ha->fw_transfer_size >> 2);
  3360. if (dlen > risc_size)
  3361. dlen = risc_size;
  3362. DEBUG7(printk("scsi(%ld): Loading risc segment@ risc "
  3363. "addr %x, number of dwords 0x%x, offset 0x%x.\n",
  3364. vha->host_no, risc_addr, dlen, faddr));
  3365. qla24xx_read_flash_data(vha, dcode, faddr, dlen);
  3366. for (i = 0; i < dlen; i++)
  3367. dcode[i] = swab32(dcode[i]);
  3368. rval = qla2x00_load_ram(vha, req->dma, risc_addr,
  3369. dlen);
  3370. if (rval) {
  3371. DEBUG(printk("scsi(%ld):[ERROR] Failed to load "
  3372. "segment %d of firmware\n", vha->host_no,
  3373. fragment));
  3374. qla_printk(KERN_WARNING, ha,
  3375. "[ERROR] Failed to load segment %d of "
  3376. "firmware\n", fragment);
  3377. break;
  3378. }
  3379. faddr += dlen;
  3380. risc_addr += dlen;
  3381. risc_size -= dlen;
  3382. fragment++;
  3383. }
  3384. /* Next segment. */
  3385. segments--;
  3386. }
  3387. return rval;
  3388. }
  3389. #define QLA_FW_URL "ftp://ftp.qlogic.com/outgoing/linux/firmware/"
  3390. int
  3391. qla2x00_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
  3392. {
  3393. int rval;
  3394. int i, fragment;
  3395. uint16_t *wcode, *fwcode;
  3396. uint32_t risc_addr, risc_size, fwclen, wlen, *seg;
  3397. struct fw_blob *blob;
  3398. struct qla_hw_data *ha = vha->hw;
  3399. struct req_que *req = ha->req_q_map[0];
  3400. /* Load firmware blob. */
  3401. blob = qla2x00_request_firmware(vha);
  3402. if (!blob) {
  3403. qla_printk(KERN_ERR, ha, "Firmware image unavailable.\n");
  3404. qla_printk(KERN_ERR, ha, "Firmware images can be retrieved "
  3405. "from: " QLA_FW_URL ".\n");
  3406. return QLA_FUNCTION_FAILED;
  3407. }
  3408. rval = QLA_SUCCESS;
  3409. wcode = (uint16_t *)req->ring;
  3410. *srisc_addr = 0;
  3411. fwcode = (uint16_t *)blob->fw->data;
  3412. fwclen = 0;
  3413. /* Validate firmware image by checking version. */
  3414. if (blob->fw->size < 8 * sizeof(uint16_t)) {
  3415. qla_printk(KERN_WARNING, ha,
  3416. "Unable to verify integrity of firmware image (%Zd)!\n",
  3417. blob->fw->size);
  3418. goto fail_fw_integrity;
  3419. }
  3420. for (i = 0; i < 4; i++)
  3421. wcode[i] = be16_to_cpu(fwcode[i + 4]);
  3422. if ((wcode[0] == 0xffff && wcode[1] == 0xffff && wcode[2] == 0xffff &&
  3423. wcode[3] == 0xffff) || (wcode[0] == 0 && wcode[1] == 0 &&
  3424. wcode[2] == 0 && wcode[3] == 0)) {
  3425. qla_printk(KERN_WARNING, ha,
  3426. "Unable to verify integrity of firmware image!\n");
  3427. qla_printk(KERN_WARNING, ha,
  3428. "Firmware data: %04x %04x %04x %04x!\n", wcode[0],
  3429. wcode[1], wcode[2], wcode[3]);
  3430. goto fail_fw_integrity;
  3431. }
  3432. seg = blob->segs;
  3433. while (*seg && rval == QLA_SUCCESS) {
  3434. risc_addr = *seg;
  3435. *srisc_addr = *srisc_addr == 0 ? *seg : *srisc_addr;
  3436. risc_size = be16_to_cpu(fwcode[3]);
  3437. /* Validate firmware image size. */
  3438. fwclen += risc_size * sizeof(uint16_t);
  3439. if (blob->fw->size < fwclen) {
  3440. qla_printk(KERN_WARNING, ha,
  3441. "Unable to verify integrity of firmware image "
  3442. "(%Zd)!\n", blob->fw->size);
  3443. goto fail_fw_integrity;
  3444. }
  3445. fragment = 0;
  3446. while (risc_size > 0 && rval == QLA_SUCCESS) {
  3447. wlen = (uint16_t)(ha->fw_transfer_size >> 1);
  3448. if (wlen > risc_size)
  3449. wlen = risc_size;
  3450. DEBUG7(printk("scsi(%ld): Loading risc segment@ risc "
  3451. "addr %x, number of words 0x%x.\n", vha->host_no,
  3452. risc_addr, wlen));
  3453. for (i = 0; i < wlen; i++)
  3454. wcode[i] = swab16(fwcode[i]);
  3455. rval = qla2x00_load_ram(vha, req->dma, risc_addr,
  3456. wlen);
  3457. if (rval) {
  3458. DEBUG(printk("scsi(%ld):[ERROR] Failed to load "
  3459. "segment %d of firmware\n", vha->host_no,
  3460. fragment));
  3461. qla_printk(KERN_WARNING, ha,
  3462. "[ERROR] Failed to load segment %d of "
  3463. "firmware\n", fragment);
  3464. break;
  3465. }
  3466. fwcode += wlen;
  3467. risc_addr += wlen;
  3468. risc_size -= wlen;
  3469. fragment++;
  3470. }
  3471. /* Next segment. */
  3472. seg++;
  3473. }
  3474. return rval;
  3475. fail_fw_integrity:
  3476. return QLA_FUNCTION_FAILED;
  3477. }
  3478. static int
  3479. qla24xx_load_risc_blob(scsi_qla_host_t *vha, uint32_t *srisc_addr)
  3480. {
  3481. int rval;
  3482. int segments, fragment;
  3483. uint32_t *dcode, dlen;
  3484. uint32_t risc_addr;
  3485. uint32_t risc_size;
  3486. uint32_t i;
  3487. struct fw_blob *blob;
  3488. uint32_t *fwcode, fwclen;
  3489. struct qla_hw_data *ha = vha->hw;
  3490. struct req_que *req = ha->req_q_map[0];
  3491. /* Load firmware blob. */
  3492. blob = qla2x00_request_firmware(vha);
  3493. if (!blob) {
  3494. qla_printk(KERN_ERR, ha, "Firmware image unavailable.\n");
  3495. qla_printk(KERN_ERR, ha, "Firmware images can be retrieved "
  3496. "from: " QLA_FW_URL ".\n");
  3497. return QLA_FUNCTION_FAILED;
  3498. }
  3499. qla_printk(KERN_INFO, ha,
  3500. "FW: Loading via request-firmware...\n");
  3501. rval = QLA_SUCCESS;
  3502. segments = FA_RISC_CODE_SEGMENTS;
  3503. dcode = (uint32_t *)req->ring;
  3504. *srisc_addr = 0;
  3505. fwcode = (uint32_t *)blob->fw->data;
  3506. fwclen = 0;
  3507. /* Validate firmware image by checking version. */
  3508. if (blob->fw->size < 8 * sizeof(uint32_t)) {
  3509. qla_printk(KERN_WARNING, ha,
  3510. "Unable to verify integrity of firmware image (%Zd)!\n",
  3511. blob->fw->size);
  3512. goto fail_fw_integrity;
  3513. }
  3514. for (i = 0; i < 4; i++)
  3515. dcode[i] = be32_to_cpu(fwcode[i + 4]);
  3516. if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff &&
  3517. dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) ||
  3518. (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 &&
  3519. dcode[3] == 0)) {
  3520. qla_printk(KERN_WARNING, ha,
  3521. "Unable to verify integrity of firmware image!\n");
  3522. qla_printk(KERN_WARNING, ha,
  3523. "Firmware data: %08x %08x %08x %08x!\n", dcode[0],
  3524. dcode[1], dcode[2], dcode[3]);
  3525. goto fail_fw_integrity;
  3526. }
  3527. while (segments && rval == QLA_SUCCESS) {
  3528. risc_addr = be32_to_cpu(fwcode[2]);
  3529. *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr;
  3530. risc_size = be32_to_cpu(fwcode[3]);
  3531. /* Validate firmware image size. */
  3532. fwclen += risc_size * sizeof(uint32_t);
  3533. if (blob->fw->size < fwclen) {
  3534. qla_printk(KERN_WARNING, ha,
  3535. "Unable to verify integrity of firmware image "
  3536. "(%Zd)!\n", blob->fw->size);
  3537. goto fail_fw_integrity;
  3538. }
  3539. fragment = 0;
  3540. while (risc_size > 0 && rval == QLA_SUCCESS) {
  3541. dlen = (uint32_t)(ha->fw_transfer_size >> 2);
  3542. if (dlen > risc_size)
  3543. dlen = risc_size;
  3544. DEBUG7(printk("scsi(%ld): Loading risc segment@ risc "
  3545. "addr %x, number of dwords 0x%x.\n", vha->host_no,
  3546. risc_addr, dlen));
  3547. for (i = 0; i < dlen; i++)
  3548. dcode[i] = swab32(fwcode[i]);
  3549. rval = qla2x00_load_ram(vha, req->dma, risc_addr,
  3550. dlen);
  3551. if (rval) {
  3552. DEBUG(printk("scsi(%ld):[ERROR] Failed to load "
  3553. "segment %d of firmware\n", vha->host_no,
  3554. fragment));
  3555. qla_printk(KERN_WARNING, ha,
  3556. "[ERROR] Failed to load segment %d of "
  3557. "firmware\n", fragment);
  3558. break;
  3559. }
  3560. fwcode += dlen;
  3561. risc_addr += dlen;
  3562. risc_size -= dlen;
  3563. fragment++;
  3564. }
  3565. /* Next segment. */
  3566. segments--;
  3567. }
  3568. return rval;
  3569. fail_fw_integrity:
  3570. return QLA_FUNCTION_FAILED;
  3571. }
  3572. int
  3573. qla24xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
  3574. {
  3575. int rval;
  3576. /*
  3577. * FW Load priority:
  3578. * 1) Firmware via request-firmware interface (.bin file).
  3579. * 2) Firmware residing in flash.
  3580. */
  3581. rval = qla24xx_load_risc_blob(vha, srisc_addr);
  3582. if (rval == QLA_SUCCESS)
  3583. return rval;
  3584. return qla24xx_load_risc_flash(vha, srisc_addr);
  3585. }
  3586. int
  3587. qla81xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
  3588. {
  3589. int rval;
  3590. /*
  3591. * FW Load priority:
  3592. * 1) Firmware residing in flash.
  3593. * 2) Firmware via request-firmware interface (.bin file).
  3594. */
  3595. rval = qla24xx_load_risc_flash(vha, srisc_addr);
  3596. if (rval == QLA_SUCCESS)
  3597. return rval;
  3598. return qla24xx_load_risc_blob(vha, srisc_addr);
  3599. }
  3600. void
  3601. qla2x00_try_to_stop_firmware(scsi_qla_host_t *vha)
  3602. {
  3603. int ret, retries;
  3604. struct qla_hw_data *ha = vha->hw;
  3605. if (!IS_FWI2_CAPABLE(ha))
  3606. return;
  3607. if (!ha->fw_major_version)
  3608. return;
  3609. ret = qla2x00_stop_firmware(vha);
  3610. for (retries = 5; ret != QLA_SUCCESS && ret != QLA_FUNCTION_TIMEOUT &&
  3611. retries ; retries--) {
  3612. ha->isp_ops->reset_chip(vha);
  3613. if (ha->isp_ops->chip_diag(vha) != QLA_SUCCESS)
  3614. continue;
  3615. if (qla2x00_setup_chip(vha) != QLA_SUCCESS)
  3616. continue;
  3617. qla_printk(KERN_INFO, ha,
  3618. "Attempting retry of stop-firmware command...\n");
  3619. ret = qla2x00_stop_firmware(vha);
  3620. }
  3621. }
  3622. int
  3623. qla24xx_configure_vhba(scsi_qla_host_t *vha)
  3624. {
  3625. int rval = QLA_SUCCESS;
  3626. uint16_t mb[MAILBOX_REGISTER_COUNT];
  3627. struct qla_hw_data *ha = vha->hw;
  3628. struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
  3629. struct req_que *req = ha->req_q_map[vha->req_ques[0]];
  3630. struct rsp_que *rsp = req->rsp;
  3631. if (!vha->vp_idx)
  3632. return -EINVAL;
  3633. rval = qla2x00_fw_ready(base_vha);
  3634. if (rval == QLA_SUCCESS) {
  3635. clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
  3636. qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL);
  3637. }
  3638. vha->flags.management_server_logged_in = 0;
  3639. /* Login to SNS first */
  3640. ha->isp_ops->fabric_login(vha, NPH_SNS, 0xff, 0xff, 0xfc, mb, BIT_1);
  3641. if (mb[0] != MBS_COMMAND_COMPLETE) {
  3642. DEBUG15(qla_printk(KERN_INFO, ha,
  3643. "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x "
  3644. "mb[2]=%x mb[6]=%x mb[7]=%x\n", NPH_SNS,
  3645. mb[0], mb[1], mb[2], mb[6], mb[7]));
  3646. return (QLA_FUNCTION_FAILED);
  3647. }
  3648. atomic_set(&vha->loop_down_timer, 0);
  3649. atomic_set(&vha->loop_state, LOOP_UP);
  3650. set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  3651. set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
  3652. rval = qla2x00_loop_resync(base_vha);
  3653. return rval;
  3654. }
  3655. /* 84XX Support **************************************************************/
  3656. static LIST_HEAD(qla_cs84xx_list);
  3657. static DEFINE_MUTEX(qla_cs84xx_mutex);
  3658. static struct qla_chip_state_84xx *
  3659. qla84xx_get_chip(struct scsi_qla_host *vha)
  3660. {
  3661. struct qla_chip_state_84xx *cs84xx;
  3662. struct qla_hw_data *ha = vha->hw;
  3663. mutex_lock(&qla_cs84xx_mutex);
  3664. /* Find any shared 84xx chip. */
  3665. list_for_each_entry(cs84xx, &qla_cs84xx_list, list) {
  3666. if (cs84xx->bus == ha->pdev->bus) {
  3667. kref_get(&cs84xx->kref);
  3668. goto done;
  3669. }
  3670. }
  3671. cs84xx = kzalloc(sizeof(*cs84xx), GFP_KERNEL);
  3672. if (!cs84xx)
  3673. goto done;
  3674. kref_init(&cs84xx->kref);
  3675. spin_lock_init(&cs84xx->access_lock);
  3676. mutex_init(&cs84xx->fw_update_mutex);
  3677. cs84xx->bus = ha->pdev->bus;
  3678. list_add_tail(&cs84xx->list, &qla_cs84xx_list);
  3679. done:
  3680. mutex_unlock(&qla_cs84xx_mutex);
  3681. return cs84xx;
  3682. }
  3683. static void
  3684. __qla84xx_chip_release(struct kref *kref)
  3685. {
  3686. struct qla_chip_state_84xx *cs84xx =
  3687. container_of(kref, struct qla_chip_state_84xx, kref);
  3688. mutex_lock(&qla_cs84xx_mutex);
  3689. list_del(&cs84xx->list);
  3690. mutex_unlock(&qla_cs84xx_mutex);
  3691. kfree(cs84xx);
  3692. }
  3693. void
  3694. qla84xx_put_chip(struct scsi_qla_host *vha)
  3695. {
  3696. struct qla_hw_data *ha = vha->hw;
  3697. if (ha->cs84xx)
  3698. kref_put(&ha->cs84xx->kref, __qla84xx_chip_release);
  3699. }
  3700. static int
  3701. qla84xx_init_chip(scsi_qla_host_t *vha)
  3702. {
  3703. int rval;
  3704. uint16_t status[2];
  3705. struct qla_hw_data *ha = vha->hw;
  3706. mutex_lock(&ha->cs84xx->fw_update_mutex);
  3707. rval = qla84xx_verify_chip(vha, status);
  3708. mutex_unlock(&ha->cs84xx->fw_update_mutex);
  3709. return rval != QLA_SUCCESS || status[0] ? QLA_FUNCTION_FAILED:
  3710. QLA_SUCCESS;
  3711. }
  3712. /* 81XX Support **************************************************************/
  3713. int
  3714. qla81xx_nvram_config(scsi_qla_host_t *vha)
  3715. {
  3716. int rval;
  3717. struct init_cb_81xx *icb;
  3718. struct nvram_81xx *nv;
  3719. uint32_t *dptr;
  3720. uint8_t *dptr1, *dptr2;
  3721. uint32_t chksum;
  3722. uint16_t cnt;
  3723. struct qla_hw_data *ha = vha->hw;
  3724. rval = QLA_SUCCESS;
  3725. icb = (struct init_cb_81xx *)ha->init_cb;
  3726. nv = ha->nvram;
  3727. /* Determine NVRAM starting address. */
  3728. ha->nvram_size = sizeof(struct nvram_81xx);
  3729. ha->nvram_base = FA_NVRAM_FUNC0_ADDR;
  3730. ha->vpd_size = FA_NVRAM_VPD_SIZE;
  3731. ha->vpd_base = FA_NVRAM_VPD0_ADDR;
  3732. if (PCI_FUNC(ha->pdev->devfn) & 1) {
  3733. ha->nvram_base = FA_NVRAM_FUNC1_ADDR;
  3734. ha->vpd_base = FA_NVRAM_VPD1_ADDR;
  3735. }
  3736. /* Get VPD data into cache */
  3737. ha->vpd = ha->nvram + VPD_OFFSET;
  3738. ha->isp_ops->read_nvram(vha, (uint8_t *)ha->vpd,
  3739. ha->nvram_base - FA_NVRAM_FUNC0_ADDR, FA_NVRAM_VPD_SIZE * 4);
  3740. /* Get NVRAM data into cache and calculate checksum. */
  3741. dptr = (uint32_t *)nv;
  3742. ha->isp_ops->read_nvram(vha, (uint8_t *)dptr, ha->nvram_base,
  3743. ha->nvram_size);
  3744. for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++)
  3745. chksum += le32_to_cpu(*dptr++);
  3746. DEBUG5(printk("scsi(%ld): Contents of NVRAM\n", ha->host_no));
  3747. DEBUG5(qla2x00_dump_buffer((uint8_t *)nv, ha->nvram_size));
  3748. /* Bad NVRAM data, set defaults parameters. */
  3749. if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P'
  3750. || nv->id[3] != ' ' ||
  3751. nv->nvram_version < __constant_cpu_to_le16(ICB_VERSION)) {
  3752. /* Reset NVRAM data. */
  3753. qla_printk(KERN_WARNING, ha, "Inconsistent NVRAM detected: "
  3754. "checksum=0x%x id=%c version=0x%x.\n", chksum, nv->id[0],
  3755. le16_to_cpu(nv->nvram_version));
  3756. qla_printk(KERN_WARNING, ha, "Falling back to functioning (yet "
  3757. "invalid -- WWPN) defaults.\n");
  3758. /*
  3759. * Set default initialization control block.
  3760. */
  3761. memset(nv, 0, ha->nvram_size);
  3762. nv->nvram_version = __constant_cpu_to_le16(ICB_VERSION);
  3763. nv->version = __constant_cpu_to_le16(ICB_VERSION);
  3764. nv->frame_payload_size = __constant_cpu_to_le16(2048);
  3765. nv->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  3766. nv->exchange_count = __constant_cpu_to_le16(0);
  3767. nv->port_name[0] = 0x21;
  3768. nv->port_name[1] = 0x00 + PCI_FUNC(ha->pdev->devfn);
  3769. nv->port_name[2] = 0x00;
  3770. nv->port_name[3] = 0xe0;
  3771. nv->port_name[4] = 0x8b;
  3772. nv->port_name[5] = 0x1c;
  3773. nv->port_name[6] = 0x55;
  3774. nv->port_name[7] = 0x86;
  3775. nv->node_name[0] = 0x20;
  3776. nv->node_name[1] = 0x00;
  3777. nv->node_name[2] = 0x00;
  3778. nv->node_name[3] = 0xe0;
  3779. nv->node_name[4] = 0x8b;
  3780. nv->node_name[5] = 0x1c;
  3781. nv->node_name[6] = 0x55;
  3782. nv->node_name[7] = 0x86;
  3783. nv->login_retry_count = __constant_cpu_to_le16(8);
  3784. nv->interrupt_delay_timer = __constant_cpu_to_le16(0);
  3785. nv->login_timeout = __constant_cpu_to_le16(0);
  3786. nv->firmware_options_1 =
  3787. __constant_cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1);
  3788. nv->firmware_options_2 = __constant_cpu_to_le32(2 << 4);
  3789. nv->firmware_options_2 |= __constant_cpu_to_le32(BIT_12);
  3790. nv->firmware_options_3 = __constant_cpu_to_le32(2 << 13);
  3791. nv->host_p = __constant_cpu_to_le32(BIT_11|BIT_10);
  3792. nv->efi_parameters = __constant_cpu_to_le32(0);
  3793. nv->reset_delay = 5;
  3794. nv->max_luns_per_target = __constant_cpu_to_le16(128);
  3795. nv->port_down_retry_count = __constant_cpu_to_le16(30);
  3796. nv->link_down_timeout = __constant_cpu_to_le16(30);
  3797. nv->enode_mac[0] = 0x01;
  3798. nv->enode_mac[1] = 0x02;
  3799. nv->enode_mac[2] = 0x03;
  3800. nv->enode_mac[3] = 0x04;
  3801. nv->enode_mac[4] = 0x05;
  3802. nv->enode_mac[5] = 0x06 + PCI_FUNC(ha->pdev->devfn);
  3803. rval = 1;
  3804. }
  3805. /* Reset Initialization control block */
  3806. memset(icb, 0, sizeof(struct init_cb_81xx));
  3807. /* Copy 1st segment. */
  3808. dptr1 = (uint8_t *)icb;
  3809. dptr2 = (uint8_t *)&nv->version;
  3810. cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version;
  3811. while (cnt--)
  3812. *dptr1++ = *dptr2++;
  3813. icb->login_retry_count = nv->login_retry_count;
  3814. /* Copy 2nd segment. */
  3815. dptr1 = (uint8_t *)&icb->interrupt_delay_timer;
  3816. dptr2 = (uint8_t *)&nv->interrupt_delay_timer;
  3817. cnt = (uint8_t *)&icb->reserved_5 -
  3818. (uint8_t *)&icb->interrupt_delay_timer;
  3819. while (cnt--)
  3820. *dptr1++ = *dptr2++;
  3821. memcpy(icb->enode_mac, nv->enode_mac, sizeof(icb->enode_mac));
  3822. /* Some boards (with valid NVRAMs) still have NULL enode_mac!! */
  3823. if (!memcmp(icb->enode_mac, "\0\0\0\0\0\0", sizeof(icb->enode_mac))) {
  3824. icb->enode_mac[0] = 0x01;
  3825. icb->enode_mac[1] = 0x02;
  3826. icb->enode_mac[2] = 0x03;
  3827. icb->enode_mac[3] = 0x04;
  3828. icb->enode_mac[4] = 0x05;
  3829. icb->enode_mac[5] = 0x06 + PCI_FUNC(ha->pdev->devfn);
  3830. }
  3831. /* Use extended-initialization control block. */
  3832. memcpy(ha->ex_init_cb, &nv->ex_version, sizeof(*ha->ex_init_cb));
  3833. /*
  3834. * Setup driver NVRAM options.
  3835. */
  3836. qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name),
  3837. "QLE81XX");
  3838. /* Use alternate WWN? */
  3839. if (nv->host_p & __constant_cpu_to_le32(BIT_15)) {
  3840. memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
  3841. memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
  3842. }
  3843. /* Prepare nodename */
  3844. if ((icb->firmware_options_1 & __constant_cpu_to_le32(BIT_14)) == 0) {
  3845. /*
  3846. * Firmware will apply the following mask if the nodename was
  3847. * not provided.
  3848. */
  3849. memcpy(icb->node_name, icb->port_name, WWN_SIZE);
  3850. icb->node_name[0] &= 0xF0;
  3851. }
  3852. /* Set host adapter parameters. */
  3853. ha->flags.disable_risc_code_load = 0;
  3854. ha->flags.enable_lip_reset = 0;
  3855. ha->flags.enable_lip_full_login =
  3856. le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0;
  3857. ha->flags.enable_target_reset =
  3858. le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0;
  3859. ha->flags.enable_led_scheme = 0;
  3860. ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0;
  3861. ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) &
  3862. (BIT_6 | BIT_5 | BIT_4)) >> 4;
  3863. /* save HBA serial number */
  3864. ha->serial0 = icb->port_name[5];
  3865. ha->serial1 = icb->port_name[6];
  3866. ha->serial2 = icb->port_name[7];
  3867. memcpy(vha->node_name, icb->node_name, WWN_SIZE);
  3868. memcpy(vha->port_name, icb->port_name, WWN_SIZE);
  3869. icb->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  3870. ha->retry_count = le16_to_cpu(nv->login_retry_count);
  3871. /* Set minimum login_timeout to 4 seconds. */
  3872. if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout)
  3873. nv->login_timeout = cpu_to_le16(ql2xlogintimeout);
  3874. if (le16_to_cpu(nv->login_timeout) < 4)
  3875. nv->login_timeout = __constant_cpu_to_le16(4);
  3876. ha->login_timeout = le16_to_cpu(nv->login_timeout);
  3877. icb->login_timeout = nv->login_timeout;
  3878. /* Set minimum RATOV to 100 tenths of a second. */
  3879. ha->r_a_tov = 100;
  3880. ha->loop_reset_delay = nv->reset_delay;
  3881. /* Link Down Timeout = 0:
  3882. *
  3883. * When Port Down timer expires we will start returning
  3884. * I/O's to OS with "DID_NO_CONNECT".
  3885. *
  3886. * Link Down Timeout != 0:
  3887. *
  3888. * The driver waits for the link to come up after link down
  3889. * before returning I/Os to OS with "DID_NO_CONNECT".
  3890. */
  3891. if (le16_to_cpu(nv->link_down_timeout) == 0) {
  3892. ha->loop_down_abort_time =
  3893. (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
  3894. } else {
  3895. ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout);
  3896. ha->loop_down_abort_time =
  3897. (LOOP_DOWN_TIME - ha->link_down_timeout);
  3898. }
  3899. /* Need enough time to try and get the port back. */
  3900. ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count);
  3901. if (qlport_down_retry)
  3902. ha->port_down_retry_count = qlport_down_retry;
  3903. /* Set login_retry_count */
  3904. ha->login_retry_count = le16_to_cpu(nv->login_retry_count);
  3905. if (ha->port_down_retry_count ==
  3906. le16_to_cpu(nv->port_down_retry_count) &&
  3907. ha->port_down_retry_count > 3)
  3908. ha->login_retry_count = ha->port_down_retry_count;
  3909. else if (ha->port_down_retry_count > (int)ha->login_retry_count)
  3910. ha->login_retry_count = ha->port_down_retry_count;
  3911. if (ql2xloginretrycount)
  3912. ha->login_retry_count = ql2xloginretrycount;
  3913. /* Enable ZIO. */
  3914. if (!vha->flags.init_done) {
  3915. ha->zio_mode = le32_to_cpu(icb->firmware_options_2) &
  3916. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  3917. ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ?
  3918. le16_to_cpu(icb->interrupt_delay_timer): 2;
  3919. }
  3920. icb->firmware_options_2 &= __constant_cpu_to_le32(
  3921. ~(BIT_3 | BIT_2 | BIT_1 | BIT_0));
  3922. vha->flags.process_response_queue = 0;
  3923. if (ha->zio_mode != QLA_ZIO_DISABLED) {
  3924. ha->zio_mode = QLA_ZIO_MODE_6;
  3925. DEBUG2(printk("scsi(%ld): ZIO mode %d enabled; timer delay "
  3926. "(%d us).\n", vha->host_no, ha->zio_mode,
  3927. ha->zio_timer * 100));
  3928. qla_printk(KERN_INFO, ha,
  3929. "ZIO mode %d enabled; timer delay (%d us).\n",
  3930. ha->zio_mode, ha->zio_timer * 100);
  3931. icb->firmware_options_2 |= cpu_to_le32(
  3932. (uint32_t)ha->zio_mode);
  3933. icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer);
  3934. vha->flags.process_response_queue = 1;
  3935. }
  3936. if (rval) {
  3937. DEBUG2_3(printk(KERN_WARNING
  3938. "scsi(%ld): NVRAM configuration failed!\n", vha->host_no));
  3939. }
  3940. return (rval);
  3941. }
  3942. void
  3943. qla81xx_update_fw_options(scsi_qla_host_t *ha)
  3944. {
  3945. }