ide-dma.c 13 KB

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  1. /*
  2. * IDE DMA support (including IDE PCI BM-DMA).
  3. *
  4. * Copyright (C) 1995-1998 Mark Lord
  5. * Copyright (C) 1999-2000 Andre Hedrick <andre@linux-ide.org>
  6. * Copyright (C) 2004, 2007 Bartlomiej Zolnierkiewicz
  7. *
  8. * May be copied or modified under the terms of the GNU General Public License
  9. *
  10. * DMA is supported for all IDE devices (disk drives, cdroms, tapes, floppies).
  11. */
  12. /*
  13. * Special Thanks to Mark for his Six years of work.
  14. */
  15. /*
  16. * Thanks to "Christopher J. Reimer" <reimer@doe.carleton.ca> for
  17. * fixing the problem with the BIOS on some Acer motherboards.
  18. *
  19. * Thanks to "Benoit Poulot-Cazajous" <poulot@chorus.fr> for testing
  20. * "TX" chipset compatibility and for providing patches for the "TX" chipset.
  21. *
  22. * Thanks to Christian Brunner <chb@muc.de> for taking a good first crack
  23. * at generic DMA -- his patches were referred to when preparing this code.
  24. *
  25. * Most importantly, thanks to Robert Bringman <rob@mars.trion.com>
  26. * for supplying a Promise UDMA board & WD UDMA drive for this work!
  27. */
  28. #include <linux/types.h>
  29. #include <linux/kernel.h>
  30. #include <linux/ide.h>
  31. #include <linux/scatterlist.h>
  32. #include <linux/dma-mapping.h>
  33. static const struct drive_list_entry drive_whitelist[] = {
  34. { "Micropolis 2112A" , NULL },
  35. { "CONNER CTMA 4000" , NULL },
  36. { "CONNER CTT8000-A" , NULL },
  37. { "ST34342A" , NULL },
  38. { NULL , NULL }
  39. };
  40. static const struct drive_list_entry drive_blacklist[] = {
  41. { "WDC AC11000H" , NULL },
  42. { "WDC AC22100H" , NULL },
  43. { "WDC AC32500H" , NULL },
  44. { "WDC AC33100H" , NULL },
  45. { "WDC AC31600H" , NULL },
  46. { "WDC AC32100H" , "24.09P07" },
  47. { "WDC AC23200L" , "21.10N21" },
  48. { "Compaq CRD-8241B" , NULL },
  49. { "CRD-8400B" , NULL },
  50. { "CRD-8480B", NULL },
  51. { "CRD-8482B", NULL },
  52. { "CRD-84" , NULL },
  53. { "SanDisk SDP3B" , NULL },
  54. { "SanDisk SDP3B-64" , NULL },
  55. { "SANYO CD-ROM CRD" , NULL },
  56. { "HITACHI CDR-8" , NULL },
  57. { "HITACHI CDR-8335" , NULL },
  58. { "HITACHI CDR-8435" , NULL },
  59. { "Toshiba CD-ROM XM-6202B" , NULL },
  60. { "TOSHIBA CD-ROM XM-1702BC", NULL },
  61. { "CD-532E-A" , NULL },
  62. { "E-IDE CD-ROM CR-840", NULL },
  63. { "CD-ROM Drive/F5A", NULL },
  64. { "WPI CDD-820", NULL },
  65. { "SAMSUNG CD-ROM SC-148C", NULL },
  66. { "SAMSUNG CD-ROM SC", NULL },
  67. { "ATAPI CD-ROM DRIVE 40X MAXIMUM", NULL },
  68. { "_NEC DV5800A", NULL },
  69. { "SAMSUNG CD-ROM SN-124", "N001" },
  70. { "Seagate STT20000A", NULL },
  71. { "CD-ROM CDR_U200", "1.09" },
  72. { NULL , NULL }
  73. };
  74. /**
  75. * ide_dma_intr - IDE DMA interrupt handler
  76. * @drive: the drive the interrupt is for
  77. *
  78. * Handle an interrupt completing a read/write DMA transfer on an
  79. * IDE device
  80. */
  81. ide_startstop_t ide_dma_intr(ide_drive_t *drive)
  82. {
  83. ide_hwif_t *hwif = drive->hwif;
  84. u8 stat = 0, dma_stat = 0;
  85. dma_stat = hwif->dma_ops->dma_end(drive);
  86. stat = hwif->tp_ops->read_status(hwif);
  87. if (OK_STAT(stat, DRIVE_READY, drive->bad_wstat | ATA_DRQ)) {
  88. if (!dma_stat) {
  89. struct ide_cmd *cmd = &hwif->cmd;
  90. ide_finish_cmd(drive, cmd, stat);
  91. return ide_stopped;
  92. }
  93. printk(KERN_ERR "%s: %s: bad DMA status (0x%02x)\n",
  94. drive->name, __func__, dma_stat);
  95. }
  96. return ide_error(drive, "dma_intr", stat);
  97. }
  98. EXPORT_SYMBOL_GPL(ide_dma_intr);
  99. int ide_dma_good_drive(ide_drive_t *drive)
  100. {
  101. return ide_in_drive_list(drive->id, drive_whitelist);
  102. }
  103. /**
  104. * ide_build_sglist - map IDE scatter gather for DMA I/O
  105. * @drive: the drive to build the DMA table for
  106. * @rq: the request holding the sg list
  107. *
  108. * Perform the DMA mapping magic necessary to access the source or
  109. * target buffers of a request via DMA. The lower layers of the
  110. * kernel provide the necessary cache management so that we can
  111. * operate in a portable fashion.
  112. */
  113. int ide_build_sglist(ide_drive_t *drive, struct request *rq)
  114. {
  115. ide_hwif_t *hwif = drive->hwif;
  116. struct scatterlist *sg = hwif->sg_table;
  117. struct ide_cmd *cmd = &hwif->cmd;
  118. int i;
  119. ide_map_sg(drive, rq);
  120. if (rq_data_dir(rq) == READ)
  121. cmd->sg_dma_direction = DMA_FROM_DEVICE;
  122. else
  123. cmd->sg_dma_direction = DMA_TO_DEVICE;
  124. i = dma_map_sg(hwif->dev, sg, cmd->sg_nents, cmd->sg_dma_direction);
  125. if (i == 0)
  126. ide_map_sg(drive, rq);
  127. else {
  128. cmd->orig_sg_nents = cmd->sg_nents;
  129. cmd->sg_nents = i;
  130. }
  131. return i;
  132. }
  133. /**
  134. * ide_destroy_dmatable - clean up DMA mapping
  135. * @drive: The drive to unmap
  136. *
  137. * Teardown mappings after DMA has completed. This must be called
  138. * after the completion of each use of ide_build_dmatable and before
  139. * the next use of ide_build_dmatable. Failure to do so will cause
  140. * an oops as only one mapping can be live for each target at a given
  141. * time.
  142. */
  143. void ide_destroy_dmatable(ide_drive_t *drive)
  144. {
  145. ide_hwif_t *hwif = drive->hwif;
  146. struct ide_cmd *cmd = &hwif->cmd;
  147. dma_unmap_sg(hwif->dev, hwif->sg_table, cmd->orig_sg_nents,
  148. cmd->sg_dma_direction);
  149. }
  150. EXPORT_SYMBOL_GPL(ide_destroy_dmatable);
  151. /**
  152. * ide_dma_off_quietly - Generic DMA kill
  153. * @drive: drive to control
  154. *
  155. * Turn off the current DMA on this IDE controller.
  156. */
  157. void ide_dma_off_quietly(ide_drive_t *drive)
  158. {
  159. drive->dev_flags &= ~IDE_DFLAG_USING_DMA;
  160. ide_toggle_bounce(drive, 0);
  161. drive->hwif->dma_ops->dma_host_set(drive, 0);
  162. }
  163. EXPORT_SYMBOL(ide_dma_off_quietly);
  164. /**
  165. * ide_dma_off - disable DMA on a device
  166. * @drive: drive to disable DMA on
  167. *
  168. * Disable IDE DMA for a device on this IDE controller.
  169. * Inform the user that DMA has been disabled.
  170. */
  171. void ide_dma_off(ide_drive_t *drive)
  172. {
  173. printk(KERN_INFO "%s: DMA disabled\n", drive->name);
  174. ide_dma_off_quietly(drive);
  175. }
  176. EXPORT_SYMBOL(ide_dma_off);
  177. /**
  178. * ide_dma_on - Enable DMA on a device
  179. * @drive: drive to enable DMA on
  180. *
  181. * Enable IDE DMA for a device on this IDE controller.
  182. */
  183. void ide_dma_on(ide_drive_t *drive)
  184. {
  185. drive->dev_flags |= IDE_DFLAG_USING_DMA;
  186. ide_toggle_bounce(drive, 1);
  187. drive->hwif->dma_ops->dma_host_set(drive, 1);
  188. }
  189. int __ide_dma_bad_drive(ide_drive_t *drive)
  190. {
  191. u16 *id = drive->id;
  192. int blacklist = ide_in_drive_list(id, drive_blacklist);
  193. if (blacklist) {
  194. printk(KERN_WARNING "%s: Disabling (U)DMA for %s (blacklisted)\n",
  195. drive->name, (char *)&id[ATA_ID_PROD]);
  196. return blacklist;
  197. }
  198. return 0;
  199. }
  200. EXPORT_SYMBOL(__ide_dma_bad_drive);
  201. static const u8 xfer_mode_bases[] = {
  202. XFER_UDMA_0,
  203. XFER_MW_DMA_0,
  204. XFER_SW_DMA_0,
  205. };
  206. static unsigned int ide_get_mode_mask(ide_drive_t *drive, u8 base, u8 req_mode)
  207. {
  208. u16 *id = drive->id;
  209. ide_hwif_t *hwif = drive->hwif;
  210. const struct ide_port_ops *port_ops = hwif->port_ops;
  211. unsigned int mask = 0;
  212. switch (base) {
  213. case XFER_UDMA_0:
  214. if ((id[ATA_ID_FIELD_VALID] & 4) == 0)
  215. break;
  216. if (port_ops && port_ops->udma_filter)
  217. mask = port_ops->udma_filter(drive);
  218. else
  219. mask = hwif->ultra_mask;
  220. mask &= id[ATA_ID_UDMA_MODES];
  221. /*
  222. * avoid false cable warning from eighty_ninty_three()
  223. */
  224. if (req_mode > XFER_UDMA_2) {
  225. if ((mask & 0x78) && (eighty_ninty_three(drive) == 0))
  226. mask &= 0x07;
  227. }
  228. break;
  229. case XFER_MW_DMA_0:
  230. if ((id[ATA_ID_FIELD_VALID] & 2) == 0)
  231. break;
  232. if (port_ops && port_ops->mdma_filter)
  233. mask = port_ops->mdma_filter(drive);
  234. else
  235. mask = hwif->mwdma_mask;
  236. mask &= id[ATA_ID_MWDMA_MODES];
  237. break;
  238. case XFER_SW_DMA_0:
  239. if (id[ATA_ID_FIELD_VALID] & 2) {
  240. mask = id[ATA_ID_SWDMA_MODES] & hwif->swdma_mask;
  241. } else if (id[ATA_ID_OLD_DMA_MODES] >> 8) {
  242. u8 mode = id[ATA_ID_OLD_DMA_MODES] >> 8;
  243. /*
  244. * if the mode is valid convert it to the mask
  245. * (the maximum allowed mode is XFER_SW_DMA_2)
  246. */
  247. if (mode <= 2)
  248. mask = ((2 << mode) - 1) & hwif->swdma_mask;
  249. }
  250. break;
  251. default:
  252. BUG();
  253. break;
  254. }
  255. return mask;
  256. }
  257. /**
  258. * ide_find_dma_mode - compute DMA speed
  259. * @drive: IDE device
  260. * @req_mode: requested mode
  261. *
  262. * Checks the drive/host capabilities and finds the speed to use for
  263. * the DMA transfer. The speed is then limited by the requested mode.
  264. *
  265. * Returns 0 if the drive/host combination is incapable of DMA transfers
  266. * or if the requested mode is not a DMA mode.
  267. */
  268. u8 ide_find_dma_mode(ide_drive_t *drive, u8 req_mode)
  269. {
  270. ide_hwif_t *hwif = drive->hwif;
  271. unsigned int mask;
  272. int x, i;
  273. u8 mode = 0;
  274. if (drive->media != ide_disk) {
  275. if (hwif->host_flags & IDE_HFLAG_NO_ATAPI_DMA)
  276. return 0;
  277. }
  278. for (i = 0; i < ARRAY_SIZE(xfer_mode_bases); i++) {
  279. if (req_mode < xfer_mode_bases[i])
  280. continue;
  281. mask = ide_get_mode_mask(drive, xfer_mode_bases[i], req_mode);
  282. x = fls(mask) - 1;
  283. if (x >= 0) {
  284. mode = xfer_mode_bases[i] + x;
  285. break;
  286. }
  287. }
  288. if (hwif->chipset == ide_acorn && mode == 0) {
  289. /*
  290. * is this correct?
  291. */
  292. if (ide_dma_good_drive(drive) &&
  293. drive->id[ATA_ID_EIDE_DMA_TIME] < 150)
  294. mode = XFER_MW_DMA_1;
  295. }
  296. mode = min(mode, req_mode);
  297. printk(KERN_INFO "%s: %s mode selected\n", drive->name,
  298. mode ? ide_xfer_verbose(mode) : "no DMA");
  299. return mode;
  300. }
  301. EXPORT_SYMBOL_GPL(ide_find_dma_mode);
  302. static int ide_tune_dma(ide_drive_t *drive)
  303. {
  304. ide_hwif_t *hwif = drive->hwif;
  305. u8 speed;
  306. if (ata_id_has_dma(drive->id) == 0 ||
  307. (drive->dev_flags & IDE_DFLAG_NODMA))
  308. return 0;
  309. /* consult the list of known "bad" drives */
  310. if (__ide_dma_bad_drive(drive))
  311. return 0;
  312. if (ide_id_dma_bug(drive))
  313. return 0;
  314. if (hwif->host_flags & IDE_HFLAG_TRUST_BIOS_FOR_DMA)
  315. return config_drive_for_dma(drive);
  316. speed = ide_max_dma_mode(drive);
  317. if (!speed)
  318. return 0;
  319. if (ide_set_dma_mode(drive, speed))
  320. return 0;
  321. return 1;
  322. }
  323. static int ide_dma_check(ide_drive_t *drive)
  324. {
  325. ide_hwif_t *hwif = drive->hwif;
  326. if (ide_tune_dma(drive))
  327. return 0;
  328. /* TODO: always do PIO fallback */
  329. if (hwif->host_flags & IDE_HFLAG_TRUST_BIOS_FOR_DMA)
  330. return -1;
  331. ide_set_max_pio(drive);
  332. return -1;
  333. }
  334. int ide_id_dma_bug(ide_drive_t *drive)
  335. {
  336. u16 *id = drive->id;
  337. if (id[ATA_ID_FIELD_VALID] & 4) {
  338. if ((id[ATA_ID_UDMA_MODES] >> 8) &&
  339. (id[ATA_ID_MWDMA_MODES] >> 8))
  340. goto err_out;
  341. } else if (id[ATA_ID_FIELD_VALID] & 2) {
  342. if ((id[ATA_ID_MWDMA_MODES] >> 8) &&
  343. (id[ATA_ID_SWDMA_MODES] >> 8))
  344. goto err_out;
  345. }
  346. return 0;
  347. err_out:
  348. printk(KERN_ERR "%s: bad DMA info in identify block\n", drive->name);
  349. return 1;
  350. }
  351. int ide_set_dma(ide_drive_t *drive)
  352. {
  353. int rc;
  354. /*
  355. * Force DMAing for the beginning of the check.
  356. * Some chipsets appear to do interesting
  357. * things, if not checked and cleared.
  358. * PARANOIA!!!
  359. */
  360. ide_dma_off_quietly(drive);
  361. rc = ide_dma_check(drive);
  362. if (rc)
  363. return rc;
  364. ide_dma_on(drive);
  365. return 0;
  366. }
  367. void ide_check_dma_crc(ide_drive_t *drive)
  368. {
  369. u8 mode;
  370. ide_dma_off_quietly(drive);
  371. drive->crc_count = 0;
  372. mode = drive->current_speed;
  373. /*
  374. * Don't try non Ultra-DMA modes without iCRC's. Force the
  375. * device to PIO and make the user enable SWDMA/MWDMA modes.
  376. */
  377. if (mode > XFER_UDMA_0 && mode <= XFER_UDMA_7)
  378. mode--;
  379. else
  380. mode = XFER_PIO_4;
  381. ide_set_xfer_rate(drive, mode);
  382. if (drive->current_speed >= XFER_SW_DMA_0)
  383. ide_dma_on(drive);
  384. }
  385. void ide_dma_lost_irq(ide_drive_t *drive)
  386. {
  387. printk(KERN_ERR "%s: DMA interrupt recovery\n", drive->name);
  388. }
  389. EXPORT_SYMBOL_GPL(ide_dma_lost_irq);
  390. void ide_dma_timeout(ide_drive_t *drive)
  391. {
  392. ide_hwif_t *hwif = drive->hwif;
  393. printk(KERN_ERR "%s: timeout waiting for DMA\n", drive->name);
  394. if (hwif->dma_ops->dma_test_irq(drive))
  395. return;
  396. ide_dump_status(drive, "DMA timeout", hwif->tp_ops->read_status(hwif));
  397. hwif->dma_ops->dma_end(drive);
  398. }
  399. EXPORT_SYMBOL_GPL(ide_dma_timeout);
  400. /*
  401. * un-busy the port etc, and clear any pending DMA status. we want to
  402. * retry the current request in pio mode instead of risking tossing it
  403. * all away
  404. */
  405. ide_startstop_t ide_dma_timeout_retry(ide_drive_t *drive, int error)
  406. {
  407. ide_hwif_t *hwif = drive->hwif;
  408. struct request *rq;
  409. ide_startstop_t ret = ide_stopped;
  410. /*
  411. * end current dma transaction
  412. */
  413. if (error < 0) {
  414. printk(KERN_WARNING "%s: DMA timeout error\n", drive->name);
  415. (void)hwif->dma_ops->dma_end(drive);
  416. ret = ide_error(drive, "dma timeout error",
  417. hwif->tp_ops->read_status(hwif));
  418. } else {
  419. printk(KERN_WARNING "%s: DMA timeout retry\n", drive->name);
  420. hwif->dma_ops->dma_timeout(drive);
  421. }
  422. /*
  423. * disable dma for now, but remember that we did so because of
  424. * a timeout -- we'll reenable after we finish this next request
  425. * (or rather the first chunk of it) in pio.
  426. */
  427. drive->dev_flags |= IDE_DFLAG_DMA_PIO_RETRY;
  428. drive->retry_pio++;
  429. ide_dma_off_quietly(drive);
  430. /*
  431. * un-busy drive etc and make sure request is sane
  432. */
  433. rq = hwif->rq;
  434. if (!rq)
  435. goto out;
  436. hwif->rq = NULL;
  437. rq->errors = 0;
  438. if (!rq->bio)
  439. goto out;
  440. rq->sector = rq->bio->bi_sector;
  441. rq->current_nr_sectors = bio_iovec(rq->bio)->bv_len >> 9;
  442. rq->hard_cur_sectors = rq->current_nr_sectors;
  443. rq->buffer = bio_data(rq->bio);
  444. out:
  445. return ret;
  446. }
  447. void ide_release_dma_engine(ide_hwif_t *hwif)
  448. {
  449. if (hwif->dmatable_cpu) {
  450. int prd_size = hwif->prd_max_nents * hwif->prd_ent_size;
  451. dma_free_coherent(hwif->dev, prd_size,
  452. hwif->dmatable_cpu, hwif->dmatable_dma);
  453. hwif->dmatable_cpu = NULL;
  454. }
  455. }
  456. EXPORT_SYMBOL_GPL(ide_release_dma_engine);
  457. int ide_allocate_dma_engine(ide_hwif_t *hwif)
  458. {
  459. int prd_size;
  460. if (hwif->prd_max_nents == 0)
  461. hwif->prd_max_nents = PRD_ENTRIES;
  462. if (hwif->prd_ent_size == 0)
  463. hwif->prd_ent_size = PRD_BYTES;
  464. prd_size = hwif->prd_max_nents * hwif->prd_ent_size;
  465. hwif->dmatable_cpu = dma_alloc_coherent(hwif->dev, prd_size,
  466. &hwif->dmatable_dma,
  467. GFP_ATOMIC);
  468. if (hwif->dmatable_cpu == NULL) {
  469. printk(KERN_ERR "%s: unable to allocate PRD table\n",
  470. hwif->name);
  471. return -ENOMEM;
  472. }
  473. return 0;
  474. }
  475. EXPORT_SYMBOL_GPL(ide_allocate_dma_engine);