grufault.c 20 KB

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  1. /*
  2. * SN Platform GRU Driver
  3. *
  4. * FAULT HANDLER FOR GRU DETECTED TLB MISSES
  5. *
  6. * This file contains code that handles TLB misses within the GRU.
  7. * These misses are reported either via interrupts or user polling of
  8. * the user CB.
  9. *
  10. * Copyright (c) 2008 Silicon Graphics, Inc. All Rights Reserved.
  11. *
  12. * This program is free software; you can redistribute it and/or modify
  13. * it under the terms of the GNU General Public License as published by
  14. * the Free Software Foundation; either version 2 of the License, or
  15. * (at your option) any later version.
  16. *
  17. * This program is distributed in the hope that it will be useful,
  18. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  19. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  20. * GNU General Public License for more details.
  21. *
  22. * You should have received a copy of the GNU General Public License
  23. * along with this program; if not, write to the Free Software
  24. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  25. */
  26. #include <linux/kernel.h>
  27. #include <linux/errno.h>
  28. #include <linux/spinlock.h>
  29. #include <linux/mm.h>
  30. #include <linux/hugetlb.h>
  31. #include <linux/device.h>
  32. #include <linux/io.h>
  33. #include <linux/uaccess.h>
  34. #include <linux/security.h>
  35. #include <asm/pgtable.h>
  36. #include "gru.h"
  37. #include "grutables.h"
  38. #include "grulib.h"
  39. #include "gru_instructions.h"
  40. #include <asm/uv/uv_hub.h>
  41. /*
  42. * Test if a physical address is a valid GRU GSEG address
  43. */
  44. static inline int is_gru_paddr(unsigned long paddr)
  45. {
  46. return paddr >= gru_start_paddr && paddr < gru_end_paddr;
  47. }
  48. /*
  49. * Find the vma of a GRU segment. Caller must hold mmap_sem.
  50. */
  51. struct vm_area_struct *gru_find_vma(unsigned long vaddr)
  52. {
  53. struct vm_area_struct *vma;
  54. vma = find_vma(current->mm, vaddr);
  55. if (vma && vma->vm_start <= vaddr && vma->vm_ops == &gru_vm_ops)
  56. return vma;
  57. return NULL;
  58. }
  59. /*
  60. * Find and lock the gts that contains the specified user vaddr.
  61. *
  62. * Returns:
  63. * - *gts with the mmap_sem locked for read and the GTS locked.
  64. * - NULL if vaddr invalid OR is not a valid GSEG vaddr.
  65. */
  66. static struct gru_thread_state *gru_find_lock_gts(unsigned long vaddr)
  67. {
  68. struct mm_struct *mm = current->mm;
  69. struct vm_area_struct *vma;
  70. struct gru_thread_state *gts = NULL;
  71. down_read(&mm->mmap_sem);
  72. vma = gru_find_vma(vaddr);
  73. if (vma)
  74. gts = gru_find_thread_state(vma, TSID(vaddr, vma));
  75. if (gts)
  76. mutex_lock(&gts->ts_ctxlock);
  77. else
  78. up_read(&mm->mmap_sem);
  79. return gts;
  80. }
  81. static struct gru_thread_state *gru_alloc_locked_gts(unsigned long vaddr)
  82. {
  83. struct mm_struct *mm = current->mm;
  84. struct vm_area_struct *vma;
  85. struct gru_thread_state *gts = NULL;
  86. down_write(&mm->mmap_sem);
  87. vma = gru_find_vma(vaddr);
  88. if (vma)
  89. gts = gru_alloc_thread_state(vma, TSID(vaddr, vma));
  90. if (gts) {
  91. mutex_lock(&gts->ts_ctxlock);
  92. downgrade_write(&mm->mmap_sem);
  93. } else {
  94. up_write(&mm->mmap_sem);
  95. }
  96. return gts;
  97. }
  98. /*
  99. * Unlock a GTS that was previously locked with gru_find_lock_gts().
  100. */
  101. static void gru_unlock_gts(struct gru_thread_state *gts)
  102. {
  103. mutex_unlock(&gts->ts_ctxlock);
  104. up_read(&current->mm->mmap_sem);
  105. }
  106. /*
  107. * Set a CB.istatus to active using a user virtual address. This must be done
  108. * just prior to a TFH RESTART. The new cb.istatus is an in-cache status ONLY.
  109. * If the line is evicted, the status may be lost. The in-cache update
  110. * is necessary to prevent the user from seeing a stale cb.istatus that will
  111. * change as soon as the TFH restart is complete. Races may cause an
  112. * occasional failure to clear the cb.istatus, but that is ok.
  113. */
  114. static void gru_cb_set_istatus_active(struct gru_instruction_bits *cbk)
  115. {
  116. if (cbk) {
  117. cbk->istatus = CBS_ACTIVE;
  118. }
  119. }
  120. /*
  121. * Convert a interrupt IRQ to a pointer to the GRU GTS that caused the
  122. * interrupt. Interrupts are always sent to a cpu on the blade that contains the
  123. * GRU (except for headless blades which are not currently supported). A blade
  124. * has N grus; a block of N consecutive IRQs is assigned to the GRUs. The IRQ
  125. * number uniquely identifies the GRU chiplet on the local blade that caused the
  126. * interrupt. Always called in interrupt context.
  127. */
  128. static inline struct gru_state *irq_to_gru(int irq)
  129. {
  130. return &gru_base[uv_numa_blade_id()]->bs_grus[irq - IRQ_GRU];
  131. }
  132. /*
  133. * Read & clear a TFM
  134. *
  135. * The GRU has an array of fault maps. A map is private to a cpu
  136. * Only one cpu will be accessing a cpu's fault map.
  137. *
  138. * This function scans the cpu-private fault map & clears all bits that
  139. * are set. The function returns a bitmap that indicates the bits that
  140. * were cleared. Note that sense the maps may be updated asynchronously by
  141. * the GRU, atomic operations must be used to clear bits.
  142. */
  143. static void get_clear_fault_map(struct gru_state *gru,
  144. struct gru_tlb_fault_map *imap,
  145. struct gru_tlb_fault_map *dmap)
  146. {
  147. unsigned long i, k;
  148. struct gru_tlb_fault_map *tfm;
  149. tfm = get_tfm_for_cpu(gru, gru_cpu_fault_map_id());
  150. prefetchw(tfm); /* Helps on hardware, required for emulator */
  151. for (i = 0; i < BITS_TO_LONGS(GRU_NUM_CBE); i++) {
  152. k = tfm->fault_bits[i];
  153. if (k)
  154. k = xchg(&tfm->fault_bits[i], 0UL);
  155. imap->fault_bits[i] = k;
  156. k = tfm->done_bits[i];
  157. if (k)
  158. k = xchg(&tfm->done_bits[i], 0UL);
  159. dmap->fault_bits[i] = k;
  160. }
  161. /*
  162. * Not functionally required but helps performance. (Required
  163. * on emulator)
  164. */
  165. gru_flush_cache(tfm);
  166. }
  167. /*
  168. * Atomic (interrupt context) & non-atomic (user context) functions to
  169. * convert a vaddr into a physical address. The size of the page
  170. * is returned in pageshift.
  171. * returns:
  172. * 0 - successful
  173. * < 0 - error code
  174. * 1 - (atomic only) try again in non-atomic context
  175. */
  176. static int non_atomic_pte_lookup(struct vm_area_struct *vma,
  177. unsigned long vaddr, int write,
  178. unsigned long *paddr, int *pageshift)
  179. {
  180. struct page *page;
  181. /* ZZZ Need to handle HUGE pages */
  182. if (is_vm_hugetlb_page(vma))
  183. return -EFAULT;
  184. *pageshift = PAGE_SHIFT;
  185. if (get_user_pages
  186. (current, current->mm, vaddr, 1, write, 0, &page, NULL) <= 0)
  187. return -EFAULT;
  188. *paddr = page_to_phys(page);
  189. put_page(page);
  190. return 0;
  191. }
  192. /*
  193. * atomic_pte_lookup
  194. *
  195. * Convert a user virtual address to a physical address
  196. * Only supports Intel large pages (2MB only) on x86_64.
  197. * ZZZ - hugepage support is incomplete
  198. *
  199. * NOTE: mmap_sem is already held on entry to this function. This
  200. * guarantees existence of the page tables.
  201. */
  202. static int atomic_pte_lookup(struct vm_area_struct *vma, unsigned long vaddr,
  203. int write, unsigned long *paddr, int *pageshift)
  204. {
  205. pgd_t *pgdp;
  206. pmd_t *pmdp;
  207. pud_t *pudp;
  208. pte_t pte;
  209. pgdp = pgd_offset(vma->vm_mm, vaddr);
  210. if (unlikely(pgd_none(*pgdp)))
  211. goto err;
  212. pudp = pud_offset(pgdp, vaddr);
  213. if (unlikely(pud_none(*pudp)))
  214. goto err;
  215. pmdp = pmd_offset(pudp, vaddr);
  216. if (unlikely(pmd_none(*pmdp)))
  217. goto err;
  218. #ifdef CONFIG_X86_64
  219. if (unlikely(pmd_large(*pmdp)))
  220. pte = *(pte_t *) pmdp;
  221. else
  222. #endif
  223. pte = *pte_offset_kernel(pmdp, vaddr);
  224. if (unlikely(!pte_present(pte) ||
  225. (write && (!pte_write(pte) || !pte_dirty(pte)))))
  226. return 1;
  227. *paddr = pte_pfn(pte) << PAGE_SHIFT;
  228. #ifdef CONFIG_HUGETLB_PAGE
  229. *pageshift = is_vm_hugetlb_page(vma) ? HPAGE_SHIFT : PAGE_SHIFT;
  230. #else
  231. *pageshift = PAGE_SHIFT;
  232. #endif
  233. return 0;
  234. err:
  235. local_irq_enable();
  236. return 1;
  237. }
  238. static int gru_vtop(struct gru_thread_state *gts, unsigned long vaddr,
  239. int write, int atomic, unsigned long *gpa, int *pageshift)
  240. {
  241. struct mm_struct *mm = gts->ts_mm;
  242. struct vm_area_struct *vma;
  243. unsigned long paddr;
  244. int ret, ps;
  245. vma = find_vma(mm, vaddr);
  246. if (!vma)
  247. goto inval;
  248. /*
  249. * Atomic lookup is faster & usually works even if called in non-atomic
  250. * context.
  251. */
  252. rmb(); /* Must/check ms_range_active before loading PTEs */
  253. ret = atomic_pte_lookup(vma, vaddr, write, &paddr, &ps);
  254. if (ret) {
  255. if (atomic)
  256. goto upm;
  257. if (non_atomic_pte_lookup(vma, vaddr, write, &paddr, &ps))
  258. goto inval;
  259. }
  260. if (is_gru_paddr(paddr))
  261. goto inval;
  262. paddr = paddr & ~((1UL << ps) - 1);
  263. *gpa = uv_soc_phys_ram_to_gpa(paddr);
  264. *pageshift = ps;
  265. return 0;
  266. inval:
  267. return -1;
  268. upm:
  269. return -2;
  270. }
  271. /*
  272. * Drop a TLB entry into the GRU. The fault is described by info in an TFH.
  273. * Input:
  274. * cb Address of user CBR. Null if not running in user context
  275. * Return:
  276. * 0 = dropin, exception, or switch to UPM successful
  277. * 1 = range invalidate active
  278. * < 0 = error code
  279. *
  280. */
  281. static int gru_try_dropin(struct gru_thread_state *gts,
  282. struct gru_tlb_fault_handle *tfh,
  283. struct gru_instruction_bits *cbk)
  284. {
  285. int pageshift = 0, asid, write, ret, atomic = !cbk;
  286. unsigned long gpa = 0, vaddr = 0;
  287. /*
  288. * NOTE: The GRU contains magic hardware that eliminates races between
  289. * TLB invalidates and TLB dropins. If an invalidate occurs
  290. * in the window between reading the TFH and the subsequent TLB dropin,
  291. * the dropin is ignored. This eliminates the need for additional locks.
  292. */
  293. /*
  294. * Error if TFH state is IDLE or FMM mode & the user issuing a UPM call.
  295. * Might be a hardware race OR a stupid user. Ignore FMM because FMM
  296. * is a transient state.
  297. */
  298. if (tfh->status != TFHSTATUS_EXCEPTION) {
  299. gru_flush_cache(tfh);
  300. if (tfh->status != TFHSTATUS_EXCEPTION)
  301. goto failnoexception;
  302. STAT(tfh_stale_on_fault);
  303. }
  304. if (tfh->state == TFHSTATE_IDLE)
  305. goto failidle;
  306. if (tfh->state == TFHSTATE_MISS_FMM && cbk)
  307. goto failfmm;
  308. write = (tfh->cause & TFHCAUSE_TLB_MOD) != 0;
  309. vaddr = tfh->missvaddr;
  310. asid = tfh->missasid;
  311. if (asid == 0)
  312. goto failnoasid;
  313. rmb(); /* TFH must be cache resident before reading ms_range_active */
  314. /*
  315. * TFH is cache resident - at least briefly. Fail the dropin
  316. * if a range invalidate is active.
  317. */
  318. if (atomic_read(&gts->ts_gms->ms_range_active))
  319. goto failactive;
  320. ret = gru_vtop(gts, vaddr, write, atomic, &gpa, &pageshift);
  321. if (ret == -1)
  322. goto failinval;
  323. if (ret == -2)
  324. goto failupm;
  325. if (!(gts->ts_sizeavail & GRU_SIZEAVAIL(pageshift))) {
  326. gts->ts_sizeavail |= GRU_SIZEAVAIL(pageshift);
  327. if (atomic || !gru_update_cch(gts, 0)) {
  328. gts->ts_force_cch_reload = 1;
  329. goto failupm;
  330. }
  331. }
  332. gru_cb_set_istatus_active(cbk);
  333. tfh_write_restart(tfh, gpa, GAA_RAM, vaddr, asid, write,
  334. GRU_PAGESIZE(pageshift));
  335. STAT(tlb_dropin);
  336. gru_dbg(grudev,
  337. "%s: tfh 0x%p, vaddr 0x%lx, asid 0x%x, ps %d, gpa 0x%lx\n",
  338. ret ? "non-atomic" : "atomic", tfh, vaddr, asid,
  339. pageshift, gpa);
  340. return 0;
  341. failnoasid:
  342. /* No asid (delayed unload). */
  343. STAT(tlb_dropin_fail_no_asid);
  344. gru_dbg(grudev, "FAILED no_asid tfh: 0x%p, vaddr 0x%lx\n", tfh, vaddr);
  345. if (!cbk)
  346. tfh_user_polling_mode(tfh);
  347. else
  348. gru_flush_cache(tfh);
  349. return -EAGAIN;
  350. failupm:
  351. /* Atomic failure switch CBR to UPM */
  352. tfh_user_polling_mode(tfh);
  353. STAT(tlb_dropin_fail_upm);
  354. gru_dbg(grudev, "FAILED upm tfh: 0x%p, vaddr 0x%lx\n", tfh, vaddr);
  355. return 1;
  356. failfmm:
  357. /* FMM state on UPM call */
  358. gru_flush_cache(tfh);
  359. STAT(tlb_dropin_fail_fmm);
  360. gru_dbg(grudev, "FAILED fmm tfh: 0x%p, state %d\n", tfh, tfh->state);
  361. return 0;
  362. failnoexception:
  363. /* TFH status did not show exception pending */
  364. gru_flush_cache(tfh);
  365. if (cbk)
  366. gru_flush_cache(cbk);
  367. STAT(tlb_dropin_fail_no_exception);
  368. gru_dbg(grudev, "FAILED non-exception tfh: 0x%p, status %d, state %d\n",
  369. tfh, tfh->status, tfh->state);
  370. return 0;
  371. failidle:
  372. /* TFH state was idle - no miss pending */
  373. gru_flush_cache(tfh);
  374. if (cbk)
  375. gru_flush_cache(cbk);
  376. STAT(tlb_dropin_fail_idle);
  377. gru_dbg(grudev, "FAILED idle tfh: 0x%p, state %d\n", tfh, tfh->state);
  378. return 0;
  379. failinval:
  380. /* All errors (atomic & non-atomic) switch CBR to EXCEPTION state */
  381. tfh_exception(tfh);
  382. STAT(tlb_dropin_fail_invalid);
  383. gru_dbg(grudev, "FAILED inval tfh: 0x%p, vaddr 0x%lx\n", tfh, vaddr);
  384. return -EFAULT;
  385. failactive:
  386. /* Range invalidate active. Switch to UPM iff atomic */
  387. if (!cbk)
  388. tfh_user_polling_mode(tfh);
  389. else
  390. gru_flush_cache(tfh);
  391. STAT(tlb_dropin_fail_range_active);
  392. gru_dbg(grudev, "FAILED range active: tfh 0x%p, vaddr 0x%lx\n",
  393. tfh, vaddr);
  394. return 1;
  395. }
  396. /*
  397. * Process an external interrupt from the GRU. This interrupt is
  398. * caused by a TLB miss.
  399. * Note that this is the interrupt handler that is registered with linux
  400. * interrupt handlers.
  401. */
  402. irqreturn_t gru_intr(int irq, void *dev_id)
  403. {
  404. struct gru_state *gru;
  405. struct gru_tlb_fault_map imap, dmap;
  406. struct gru_thread_state *gts;
  407. struct gru_tlb_fault_handle *tfh = NULL;
  408. int cbrnum, ctxnum;
  409. STAT(intr);
  410. gru = irq_to_gru(irq);
  411. if (!gru) {
  412. dev_err(grudev, "GRU: invalid interrupt: cpu %d, irq %d\n",
  413. raw_smp_processor_id(), irq);
  414. return IRQ_NONE;
  415. }
  416. get_clear_fault_map(gru, &imap, &dmap);
  417. for_each_cbr_in_tfm(cbrnum, dmap.fault_bits) {
  418. complete(gru->gs_blade->bs_async_wq);
  419. gru_dbg(grudev, "gid %d, cbr_done %d, done %d\n",
  420. gru->gs_gid, cbrnum, gru->gs_blade->bs_async_wq->done);
  421. }
  422. for_each_cbr_in_tfm(cbrnum, imap.fault_bits) {
  423. tfh = get_tfh_by_index(gru, cbrnum);
  424. prefetchw(tfh); /* Helps on hdw, required for emulator */
  425. /*
  426. * When hardware sets a bit in the faultmap, it implicitly
  427. * locks the GRU context so that it cannot be unloaded.
  428. * The gts cannot change until a TFH start/writestart command
  429. * is issued.
  430. */
  431. ctxnum = tfh->ctxnum;
  432. gts = gru->gs_gts[ctxnum];
  433. /*
  434. * This is running in interrupt context. Trylock the mmap_sem.
  435. * If it fails, retry the fault in user context.
  436. */
  437. if (!gts->ts_force_cch_reload &&
  438. down_read_trylock(&gts->ts_mm->mmap_sem)) {
  439. gts->ustats.fmm_tlbdropin++;
  440. gru_try_dropin(gts, tfh, NULL);
  441. up_read(&gts->ts_mm->mmap_sem);
  442. } else {
  443. tfh_user_polling_mode(tfh);
  444. STAT(intr_mm_lock_failed);
  445. }
  446. }
  447. return IRQ_HANDLED;
  448. }
  449. static int gru_user_dropin(struct gru_thread_state *gts,
  450. struct gru_tlb_fault_handle *tfh,
  451. void *cb)
  452. {
  453. struct gru_mm_struct *gms = gts->ts_gms;
  454. int ret;
  455. gts->ustats.upm_tlbdropin++;
  456. while (1) {
  457. wait_event(gms->ms_wait_queue,
  458. atomic_read(&gms->ms_range_active) == 0);
  459. prefetchw(tfh); /* Helps on hdw, required for emulator */
  460. ret = gru_try_dropin(gts, tfh, cb);
  461. if (ret <= 0)
  462. return ret;
  463. STAT(call_os_wait_queue);
  464. }
  465. }
  466. /*
  467. * This interface is called as a result of a user detecting a "call OS" bit
  468. * in a user CB. Normally means that a TLB fault has occurred.
  469. * cb - user virtual address of the CB
  470. */
  471. int gru_handle_user_call_os(unsigned long cb)
  472. {
  473. struct gru_tlb_fault_handle *tfh;
  474. struct gru_thread_state *gts;
  475. void *cbk;
  476. int ucbnum, cbrnum, ret = -EINVAL;
  477. STAT(call_os);
  478. gru_dbg(grudev, "address 0x%lx\n", cb);
  479. /* sanity check the cb pointer */
  480. ucbnum = get_cb_number((void *)cb);
  481. if ((cb & (GRU_HANDLE_STRIDE - 1)) || ucbnum >= GRU_NUM_CB)
  482. return -EINVAL;
  483. gts = gru_find_lock_gts(cb);
  484. if (!gts)
  485. return -EINVAL;
  486. if (ucbnum >= gts->ts_cbr_au_count * GRU_CBR_AU_SIZE)
  487. goto exit;
  488. /*
  489. * If force_unload is set, the UPM TLB fault is phony. The task
  490. * has migrated to another node and the GSEG must be moved. Just
  491. * unload the context. The task will page fault and assign a new
  492. * context.
  493. */
  494. if (gts->ts_tgid_owner == current->tgid && gts->ts_blade >= 0 &&
  495. gts->ts_blade != uv_numa_blade_id()) {
  496. STAT(call_os_offnode_reference);
  497. gts->ts_force_unload = 1;
  498. }
  499. /*
  500. * CCH may contain stale data if ts_force_cch_reload is set.
  501. */
  502. if (gts->ts_gru && gts->ts_force_cch_reload) {
  503. gts->ts_force_cch_reload = 0;
  504. gru_update_cch(gts, 0);
  505. }
  506. ret = -EAGAIN;
  507. cbrnum = thread_cbr_number(gts, ucbnum);
  508. if (gts->ts_force_unload) {
  509. gru_unload_context(gts, 1);
  510. } else if (gts->ts_gru) {
  511. tfh = get_tfh_by_index(gts->ts_gru, cbrnum);
  512. cbk = get_gseg_base_address_cb(gts->ts_gru->gs_gru_base_vaddr,
  513. gts->ts_ctxnum, ucbnum);
  514. ret = gru_user_dropin(gts, tfh, cbk);
  515. }
  516. exit:
  517. gru_unlock_gts(gts);
  518. return ret;
  519. }
  520. /*
  521. * Fetch the exception detail information for a CB that terminated with
  522. * an exception.
  523. */
  524. int gru_get_exception_detail(unsigned long arg)
  525. {
  526. struct control_block_extended_exc_detail excdet;
  527. struct gru_control_block_extended *cbe;
  528. struct gru_thread_state *gts;
  529. int ucbnum, cbrnum, ret;
  530. STAT(user_exception);
  531. if (copy_from_user(&excdet, (void __user *)arg, sizeof(excdet)))
  532. return -EFAULT;
  533. gru_dbg(grudev, "address 0x%lx\n", excdet.cb);
  534. gts = gru_find_lock_gts(excdet.cb);
  535. if (!gts)
  536. return -EINVAL;
  537. ucbnum = get_cb_number((void *)excdet.cb);
  538. if (ucbnum >= gts->ts_cbr_au_count * GRU_CBR_AU_SIZE) {
  539. ret = -EINVAL;
  540. } else if (gts->ts_gru) {
  541. cbrnum = thread_cbr_number(gts, ucbnum);
  542. cbe = get_cbe_by_index(gts->ts_gru, cbrnum);
  543. gru_flush_cache(cbe); /* CBE not coherent */
  544. excdet.opc = cbe->opccpy;
  545. excdet.exopc = cbe->exopccpy;
  546. excdet.ecause = cbe->ecause;
  547. excdet.exceptdet0 = cbe->idef1upd;
  548. excdet.exceptdet1 = cbe->idef3upd;
  549. excdet.cbrstate = cbe->cbrstate;
  550. excdet.cbrexecstatus = cbe->cbrexecstatus;
  551. gru_flush_cache(cbe);
  552. ret = 0;
  553. } else {
  554. ret = -EAGAIN;
  555. }
  556. gru_unlock_gts(gts);
  557. gru_dbg(grudev,
  558. "cb 0x%lx, op %d, exopc %d, cbrstate %d, cbrexecstatus 0x%x, ecause 0x%x, "
  559. "exdet0 0x%lx, exdet1 0x%x\n",
  560. excdet.cb, excdet.opc, excdet.exopc, excdet.cbrstate, excdet.cbrexecstatus,
  561. excdet.ecause, excdet.exceptdet0, excdet.exceptdet1);
  562. if (!ret && copy_to_user((void __user *)arg, &excdet, sizeof(excdet)))
  563. ret = -EFAULT;
  564. return ret;
  565. }
  566. /*
  567. * User request to unload a context. Content is saved for possible reload.
  568. */
  569. static int gru_unload_all_contexts(void)
  570. {
  571. struct gru_thread_state *gts;
  572. struct gru_state *gru;
  573. int gid, ctxnum;
  574. if (!capable(CAP_SYS_ADMIN))
  575. return -EPERM;
  576. foreach_gid(gid) {
  577. gru = GID_TO_GRU(gid);
  578. spin_lock(&gru->gs_lock);
  579. for (ctxnum = 0; ctxnum < GRU_NUM_CCH; ctxnum++) {
  580. gts = gru->gs_gts[ctxnum];
  581. if (gts && mutex_trylock(&gts->ts_ctxlock)) {
  582. spin_unlock(&gru->gs_lock);
  583. gru_unload_context(gts, 1);
  584. mutex_unlock(&gts->ts_ctxlock);
  585. spin_lock(&gru->gs_lock);
  586. }
  587. }
  588. spin_unlock(&gru->gs_lock);
  589. }
  590. return 0;
  591. }
  592. int gru_user_unload_context(unsigned long arg)
  593. {
  594. struct gru_thread_state *gts;
  595. struct gru_unload_context_req req;
  596. STAT(user_unload_context);
  597. if (copy_from_user(&req, (void __user *)arg, sizeof(req)))
  598. return -EFAULT;
  599. gru_dbg(grudev, "gseg 0x%lx\n", req.gseg);
  600. if (!req.gseg)
  601. return gru_unload_all_contexts();
  602. gts = gru_find_lock_gts(req.gseg);
  603. if (!gts)
  604. return -EINVAL;
  605. if (gts->ts_gru)
  606. gru_unload_context(gts, 1);
  607. gru_unlock_gts(gts);
  608. return 0;
  609. }
  610. /*
  611. * User request to flush a range of virtual addresses from the GRU TLB
  612. * (Mainly for testing).
  613. */
  614. int gru_user_flush_tlb(unsigned long arg)
  615. {
  616. struct gru_thread_state *gts;
  617. struct gru_flush_tlb_req req;
  618. struct gru_mm_struct *gms;
  619. STAT(user_flush_tlb);
  620. if (copy_from_user(&req, (void __user *)arg, sizeof(req)))
  621. return -EFAULT;
  622. gru_dbg(grudev, "gseg 0x%lx, vaddr 0x%lx, len 0x%lx\n", req.gseg,
  623. req.vaddr, req.len);
  624. gts = gru_find_lock_gts(req.gseg);
  625. if (!gts)
  626. return -EINVAL;
  627. gms = gts->ts_gms;
  628. gru_unlock_gts(gts);
  629. gru_flush_tlb_range(gms, req.vaddr, req.len);
  630. return 0;
  631. }
  632. /*
  633. * Fetch GSEG statisticss
  634. */
  635. long gru_get_gseg_statistics(unsigned long arg)
  636. {
  637. struct gru_thread_state *gts;
  638. struct gru_get_gseg_statistics_req req;
  639. if (copy_from_user(&req, (void __user *)arg, sizeof(req)))
  640. return -EFAULT;
  641. /*
  642. * The library creates arrays of contexts for threaded programs.
  643. * If no gts exists in the array, the context has never been used & all
  644. * statistics are implicitly 0.
  645. */
  646. gts = gru_find_lock_gts(req.gseg);
  647. if (gts) {
  648. memcpy(&req.stats, &gts->ustats, sizeof(gts->ustats));
  649. gru_unlock_gts(gts);
  650. } else {
  651. memset(&req.stats, 0, sizeof(gts->ustats));
  652. }
  653. if (copy_to_user((void __user *)arg, &req, sizeof(req)))
  654. return -EFAULT;
  655. return 0;
  656. }
  657. /*
  658. * Register the current task as the user of the GSEG slice.
  659. * Needed for TLB fault interrupt targeting.
  660. */
  661. int gru_set_context_option(unsigned long arg)
  662. {
  663. struct gru_thread_state *gts;
  664. struct gru_set_context_option_req req;
  665. int ret = 0;
  666. STAT(set_context_option);
  667. if (copy_from_user(&req, (void __user *)arg, sizeof(req)))
  668. return -EFAULT;
  669. gru_dbg(grudev, "op %d, gseg 0x%lx, value1 0x%lx\n", req.op, req.gseg, req.val1);
  670. gts = gru_alloc_locked_gts(req.gseg);
  671. if (!gts)
  672. return -EINVAL;
  673. switch (req.op) {
  674. case sco_gseg_owner:
  675. /* Register the current task as the GSEG owner */
  676. gts->ts_tgid_owner = current->tgid;
  677. break;
  678. case sco_cch_req_slice:
  679. /* Set the CCH slice option */
  680. gts->ts_cch_req_slice = req.val1 & 3;
  681. break;
  682. default:
  683. ret = -EINVAL;
  684. }
  685. gru_unlock_gts(gts);
  686. return ret;
  687. }