mwl8k.c 100 KB

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  1. /*
  2. * drivers/net/wireless/mwl8k.c
  3. * Driver for Marvell TOPDOG 802.11 Wireless cards
  4. *
  5. * Copyright (C) 2008, 2009, 2010 Marvell Semiconductor Inc.
  6. *
  7. * This file is licensed under the terms of the GNU General Public
  8. * License version 2. This program is licensed "as is" without any
  9. * warranty of any kind, whether express or implied.
  10. */
  11. #include <linux/init.h>
  12. #include <linux/module.h>
  13. #include <linux/kernel.h>
  14. #include <linux/sched.h>
  15. #include <linux/spinlock.h>
  16. #include <linux/list.h>
  17. #include <linux/pci.h>
  18. #include <linux/delay.h>
  19. #include <linux/completion.h>
  20. #include <linux/etherdevice.h>
  21. #include <linux/slab.h>
  22. #include <net/mac80211.h>
  23. #include <linux/moduleparam.h>
  24. #include <linux/firmware.h>
  25. #include <linux/workqueue.h>
  26. #define MWL8K_DESC "Marvell TOPDOG(R) 802.11 Wireless Network Driver"
  27. #define MWL8K_NAME KBUILD_MODNAME
  28. #define MWL8K_VERSION "0.12"
  29. /* Register definitions */
  30. #define MWL8K_HIU_GEN_PTR 0x00000c10
  31. #define MWL8K_MODE_STA 0x0000005a
  32. #define MWL8K_MODE_AP 0x000000a5
  33. #define MWL8K_HIU_INT_CODE 0x00000c14
  34. #define MWL8K_FWSTA_READY 0xf0f1f2f4
  35. #define MWL8K_FWAP_READY 0xf1f2f4a5
  36. #define MWL8K_INT_CODE_CMD_FINISHED 0x00000005
  37. #define MWL8K_HIU_SCRATCH 0x00000c40
  38. /* Host->device communications */
  39. #define MWL8K_HIU_H2A_INTERRUPT_EVENTS 0x00000c18
  40. #define MWL8K_HIU_H2A_INTERRUPT_STATUS 0x00000c1c
  41. #define MWL8K_HIU_H2A_INTERRUPT_MASK 0x00000c20
  42. #define MWL8K_HIU_H2A_INTERRUPT_CLEAR_SEL 0x00000c24
  43. #define MWL8K_HIU_H2A_INTERRUPT_STATUS_MASK 0x00000c28
  44. #define MWL8K_H2A_INT_DUMMY (1 << 20)
  45. #define MWL8K_H2A_INT_RESET (1 << 15)
  46. #define MWL8K_H2A_INT_DOORBELL (1 << 1)
  47. #define MWL8K_H2A_INT_PPA_READY (1 << 0)
  48. /* Device->host communications */
  49. #define MWL8K_HIU_A2H_INTERRUPT_EVENTS 0x00000c2c
  50. #define MWL8K_HIU_A2H_INTERRUPT_STATUS 0x00000c30
  51. #define MWL8K_HIU_A2H_INTERRUPT_MASK 0x00000c34
  52. #define MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL 0x00000c38
  53. #define MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK 0x00000c3c
  54. #define MWL8K_A2H_INT_DUMMY (1 << 20)
  55. #define MWL8K_A2H_INT_CHNL_SWITCHED (1 << 11)
  56. #define MWL8K_A2H_INT_QUEUE_EMPTY (1 << 10)
  57. #define MWL8K_A2H_INT_RADAR_DETECT (1 << 7)
  58. #define MWL8K_A2H_INT_RADIO_ON (1 << 6)
  59. #define MWL8K_A2H_INT_RADIO_OFF (1 << 5)
  60. #define MWL8K_A2H_INT_MAC_EVENT (1 << 3)
  61. #define MWL8K_A2H_INT_OPC_DONE (1 << 2)
  62. #define MWL8K_A2H_INT_RX_READY (1 << 1)
  63. #define MWL8K_A2H_INT_TX_DONE (1 << 0)
  64. #define MWL8K_A2H_EVENTS (MWL8K_A2H_INT_DUMMY | \
  65. MWL8K_A2H_INT_CHNL_SWITCHED | \
  66. MWL8K_A2H_INT_QUEUE_EMPTY | \
  67. MWL8K_A2H_INT_RADAR_DETECT | \
  68. MWL8K_A2H_INT_RADIO_ON | \
  69. MWL8K_A2H_INT_RADIO_OFF | \
  70. MWL8K_A2H_INT_MAC_EVENT | \
  71. MWL8K_A2H_INT_OPC_DONE | \
  72. MWL8K_A2H_INT_RX_READY | \
  73. MWL8K_A2H_INT_TX_DONE)
  74. #define MWL8K_RX_QUEUES 1
  75. #define MWL8K_TX_QUEUES 4
  76. struct rxd_ops {
  77. int rxd_size;
  78. void (*rxd_init)(void *rxd, dma_addr_t next_dma_addr);
  79. void (*rxd_refill)(void *rxd, dma_addr_t addr, int len);
  80. int (*rxd_process)(void *rxd, struct ieee80211_rx_status *status,
  81. __le16 *qos);
  82. };
  83. struct mwl8k_device_info {
  84. char *part_name;
  85. char *helper_image;
  86. char *fw_image;
  87. struct rxd_ops *ap_rxd_ops;
  88. };
  89. struct mwl8k_rx_queue {
  90. int rxd_count;
  91. /* hw receives here */
  92. int head;
  93. /* refill descs here */
  94. int tail;
  95. void *rxd;
  96. dma_addr_t rxd_dma;
  97. struct {
  98. struct sk_buff *skb;
  99. DEFINE_DMA_UNMAP_ADDR(dma);
  100. } *buf;
  101. };
  102. struct mwl8k_tx_queue {
  103. /* hw transmits here */
  104. int head;
  105. /* sw appends here */
  106. int tail;
  107. unsigned int len;
  108. struct mwl8k_tx_desc *txd;
  109. dma_addr_t txd_dma;
  110. struct sk_buff **skb;
  111. };
  112. struct mwl8k_priv {
  113. struct ieee80211_hw *hw;
  114. struct pci_dev *pdev;
  115. struct mwl8k_device_info *device_info;
  116. void __iomem *sram;
  117. void __iomem *regs;
  118. /* firmware */
  119. struct firmware *fw_helper;
  120. struct firmware *fw_ucode;
  121. /* hardware/firmware parameters */
  122. bool ap_fw;
  123. struct rxd_ops *rxd_ops;
  124. struct ieee80211_supported_band band_24;
  125. struct ieee80211_channel channels_24[14];
  126. struct ieee80211_rate rates_24[14];
  127. struct ieee80211_supported_band band_50;
  128. struct ieee80211_channel channels_50[4];
  129. struct ieee80211_rate rates_50[9];
  130. u32 ap_macids_supported;
  131. u32 sta_macids_supported;
  132. /* firmware access */
  133. struct mutex fw_mutex;
  134. struct task_struct *fw_mutex_owner;
  135. int fw_mutex_depth;
  136. struct completion *hostcmd_wait;
  137. /* lock held over TX and TX reap */
  138. spinlock_t tx_lock;
  139. /* TX quiesce completion, protected by fw_mutex and tx_lock */
  140. struct completion *tx_wait;
  141. /* List of interfaces. */
  142. u32 macids_used;
  143. struct list_head vif_list;
  144. /* power management status cookie from firmware */
  145. u32 *cookie;
  146. dma_addr_t cookie_dma;
  147. u16 num_mcaddrs;
  148. u8 hw_rev;
  149. u32 fw_rev;
  150. /*
  151. * Running count of TX packets in flight, to avoid
  152. * iterating over the transmit rings each time.
  153. */
  154. int pending_tx_pkts;
  155. struct mwl8k_rx_queue rxq[MWL8K_RX_QUEUES];
  156. struct mwl8k_tx_queue txq[MWL8K_TX_QUEUES];
  157. bool radio_on;
  158. bool radio_short_preamble;
  159. bool sniffer_enabled;
  160. bool wmm_enabled;
  161. /* XXX need to convert this to handle multiple interfaces */
  162. bool capture_beacon;
  163. u8 capture_bssid[ETH_ALEN];
  164. struct sk_buff *beacon_skb;
  165. /*
  166. * This FJ worker has to be global as it is scheduled from the
  167. * RX handler. At this point we don't know which interface it
  168. * belongs to until the list of bssids waiting to complete join
  169. * is checked.
  170. */
  171. struct work_struct finalize_join_worker;
  172. /* Tasklet to perform TX reclaim. */
  173. struct tasklet_struct poll_tx_task;
  174. /* Tasklet to perform RX. */
  175. struct tasklet_struct poll_rx_task;
  176. };
  177. /* Per interface specific private data */
  178. struct mwl8k_vif {
  179. struct list_head list;
  180. struct ieee80211_vif *vif;
  181. /* Firmware macid for this vif. */
  182. int macid;
  183. /* Non AMPDU sequence number assigned by driver. */
  184. u16 seqno;
  185. };
  186. #define MWL8K_VIF(_vif) ((struct mwl8k_vif *)&((_vif)->drv_priv))
  187. struct mwl8k_sta {
  188. /* Index into station database. Returned by UPDATE_STADB. */
  189. u8 peer_id;
  190. };
  191. #define MWL8K_STA(_sta) ((struct mwl8k_sta *)&((_sta)->drv_priv))
  192. static const struct ieee80211_channel mwl8k_channels_24[] = {
  193. { .center_freq = 2412, .hw_value = 1, },
  194. { .center_freq = 2417, .hw_value = 2, },
  195. { .center_freq = 2422, .hw_value = 3, },
  196. { .center_freq = 2427, .hw_value = 4, },
  197. { .center_freq = 2432, .hw_value = 5, },
  198. { .center_freq = 2437, .hw_value = 6, },
  199. { .center_freq = 2442, .hw_value = 7, },
  200. { .center_freq = 2447, .hw_value = 8, },
  201. { .center_freq = 2452, .hw_value = 9, },
  202. { .center_freq = 2457, .hw_value = 10, },
  203. { .center_freq = 2462, .hw_value = 11, },
  204. { .center_freq = 2467, .hw_value = 12, },
  205. { .center_freq = 2472, .hw_value = 13, },
  206. { .center_freq = 2484, .hw_value = 14, },
  207. };
  208. static const struct ieee80211_rate mwl8k_rates_24[] = {
  209. { .bitrate = 10, .hw_value = 2, },
  210. { .bitrate = 20, .hw_value = 4, },
  211. { .bitrate = 55, .hw_value = 11, },
  212. { .bitrate = 110, .hw_value = 22, },
  213. { .bitrate = 220, .hw_value = 44, },
  214. { .bitrate = 60, .hw_value = 12, },
  215. { .bitrate = 90, .hw_value = 18, },
  216. { .bitrate = 120, .hw_value = 24, },
  217. { .bitrate = 180, .hw_value = 36, },
  218. { .bitrate = 240, .hw_value = 48, },
  219. { .bitrate = 360, .hw_value = 72, },
  220. { .bitrate = 480, .hw_value = 96, },
  221. { .bitrate = 540, .hw_value = 108, },
  222. { .bitrate = 720, .hw_value = 144, },
  223. };
  224. static const struct ieee80211_channel mwl8k_channels_50[] = {
  225. { .center_freq = 5180, .hw_value = 36, },
  226. { .center_freq = 5200, .hw_value = 40, },
  227. { .center_freq = 5220, .hw_value = 44, },
  228. { .center_freq = 5240, .hw_value = 48, },
  229. };
  230. static const struct ieee80211_rate mwl8k_rates_50[] = {
  231. { .bitrate = 60, .hw_value = 12, },
  232. { .bitrate = 90, .hw_value = 18, },
  233. { .bitrate = 120, .hw_value = 24, },
  234. { .bitrate = 180, .hw_value = 36, },
  235. { .bitrate = 240, .hw_value = 48, },
  236. { .bitrate = 360, .hw_value = 72, },
  237. { .bitrate = 480, .hw_value = 96, },
  238. { .bitrate = 540, .hw_value = 108, },
  239. { .bitrate = 720, .hw_value = 144, },
  240. };
  241. /* Set or get info from Firmware */
  242. #define MWL8K_CMD_SET 0x0001
  243. #define MWL8K_CMD_GET 0x0000
  244. /* Firmware command codes */
  245. #define MWL8K_CMD_CODE_DNLD 0x0001
  246. #define MWL8K_CMD_GET_HW_SPEC 0x0003
  247. #define MWL8K_CMD_SET_HW_SPEC 0x0004
  248. #define MWL8K_CMD_MAC_MULTICAST_ADR 0x0010
  249. #define MWL8K_CMD_GET_STAT 0x0014
  250. #define MWL8K_CMD_RADIO_CONTROL 0x001c
  251. #define MWL8K_CMD_RF_TX_POWER 0x001e
  252. #define MWL8K_CMD_RF_ANTENNA 0x0020
  253. #define MWL8K_CMD_SET_BEACON 0x0100 /* per-vif */
  254. #define MWL8K_CMD_SET_PRE_SCAN 0x0107
  255. #define MWL8K_CMD_SET_POST_SCAN 0x0108
  256. #define MWL8K_CMD_SET_RF_CHANNEL 0x010a
  257. #define MWL8K_CMD_SET_AID 0x010d
  258. #define MWL8K_CMD_SET_RATE 0x0110
  259. #define MWL8K_CMD_SET_FINALIZE_JOIN 0x0111
  260. #define MWL8K_CMD_RTS_THRESHOLD 0x0113
  261. #define MWL8K_CMD_SET_SLOT 0x0114
  262. #define MWL8K_CMD_SET_EDCA_PARAMS 0x0115
  263. #define MWL8K_CMD_SET_WMM_MODE 0x0123
  264. #define MWL8K_CMD_MIMO_CONFIG 0x0125
  265. #define MWL8K_CMD_USE_FIXED_RATE 0x0126
  266. #define MWL8K_CMD_ENABLE_SNIFFER 0x0150
  267. #define MWL8K_CMD_SET_MAC_ADDR 0x0202 /* per-vif */
  268. #define MWL8K_CMD_SET_RATEADAPT_MODE 0x0203
  269. #define MWL8K_CMD_BSS_START 0x1100 /* per-vif */
  270. #define MWL8K_CMD_SET_NEW_STN 0x1111 /* per-vif */
  271. #define MWL8K_CMD_UPDATE_STADB 0x1123
  272. static const char *mwl8k_cmd_name(__le16 cmd, char *buf, int bufsize)
  273. {
  274. u16 command = le16_to_cpu(cmd);
  275. #define MWL8K_CMDNAME(x) case MWL8K_CMD_##x: do {\
  276. snprintf(buf, bufsize, "%s", #x);\
  277. return buf;\
  278. } while (0)
  279. switch (command & ~0x8000) {
  280. MWL8K_CMDNAME(CODE_DNLD);
  281. MWL8K_CMDNAME(GET_HW_SPEC);
  282. MWL8K_CMDNAME(SET_HW_SPEC);
  283. MWL8K_CMDNAME(MAC_MULTICAST_ADR);
  284. MWL8K_CMDNAME(GET_STAT);
  285. MWL8K_CMDNAME(RADIO_CONTROL);
  286. MWL8K_CMDNAME(RF_TX_POWER);
  287. MWL8K_CMDNAME(RF_ANTENNA);
  288. MWL8K_CMDNAME(SET_BEACON);
  289. MWL8K_CMDNAME(SET_PRE_SCAN);
  290. MWL8K_CMDNAME(SET_POST_SCAN);
  291. MWL8K_CMDNAME(SET_RF_CHANNEL);
  292. MWL8K_CMDNAME(SET_AID);
  293. MWL8K_CMDNAME(SET_RATE);
  294. MWL8K_CMDNAME(SET_FINALIZE_JOIN);
  295. MWL8K_CMDNAME(RTS_THRESHOLD);
  296. MWL8K_CMDNAME(SET_SLOT);
  297. MWL8K_CMDNAME(SET_EDCA_PARAMS);
  298. MWL8K_CMDNAME(SET_WMM_MODE);
  299. MWL8K_CMDNAME(MIMO_CONFIG);
  300. MWL8K_CMDNAME(USE_FIXED_RATE);
  301. MWL8K_CMDNAME(ENABLE_SNIFFER);
  302. MWL8K_CMDNAME(SET_MAC_ADDR);
  303. MWL8K_CMDNAME(SET_RATEADAPT_MODE);
  304. MWL8K_CMDNAME(BSS_START);
  305. MWL8K_CMDNAME(SET_NEW_STN);
  306. MWL8K_CMDNAME(UPDATE_STADB);
  307. default:
  308. snprintf(buf, bufsize, "0x%x", cmd);
  309. }
  310. #undef MWL8K_CMDNAME
  311. return buf;
  312. }
  313. /* Hardware and firmware reset */
  314. static void mwl8k_hw_reset(struct mwl8k_priv *priv)
  315. {
  316. iowrite32(MWL8K_H2A_INT_RESET,
  317. priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  318. iowrite32(MWL8K_H2A_INT_RESET,
  319. priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  320. msleep(20);
  321. }
  322. /* Release fw image */
  323. static void mwl8k_release_fw(struct firmware **fw)
  324. {
  325. if (*fw == NULL)
  326. return;
  327. release_firmware(*fw);
  328. *fw = NULL;
  329. }
  330. static void mwl8k_release_firmware(struct mwl8k_priv *priv)
  331. {
  332. mwl8k_release_fw(&priv->fw_ucode);
  333. mwl8k_release_fw(&priv->fw_helper);
  334. }
  335. /* Request fw image */
  336. static int mwl8k_request_fw(struct mwl8k_priv *priv,
  337. const char *fname, struct firmware **fw)
  338. {
  339. /* release current image */
  340. if (*fw != NULL)
  341. mwl8k_release_fw(fw);
  342. return request_firmware((const struct firmware **)fw,
  343. fname, &priv->pdev->dev);
  344. }
  345. static int mwl8k_request_firmware(struct mwl8k_priv *priv)
  346. {
  347. struct mwl8k_device_info *di = priv->device_info;
  348. int rc;
  349. if (di->helper_image != NULL) {
  350. rc = mwl8k_request_fw(priv, di->helper_image, &priv->fw_helper);
  351. if (rc) {
  352. printk(KERN_ERR "%s: Error requesting helper "
  353. "firmware file %s\n", pci_name(priv->pdev),
  354. di->helper_image);
  355. return rc;
  356. }
  357. }
  358. rc = mwl8k_request_fw(priv, di->fw_image, &priv->fw_ucode);
  359. if (rc) {
  360. printk(KERN_ERR "%s: Error requesting firmware file %s\n",
  361. pci_name(priv->pdev), di->fw_image);
  362. mwl8k_release_fw(&priv->fw_helper);
  363. return rc;
  364. }
  365. return 0;
  366. }
  367. struct mwl8k_cmd_pkt {
  368. __le16 code;
  369. __le16 length;
  370. __u8 seq_num;
  371. __u8 macid;
  372. __le16 result;
  373. char payload[0];
  374. } __attribute__((packed));
  375. /*
  376. * Firmware loading.
  377. */
  378. static int
  379. mwl8k_send_fw_load_cmd(struct mwl8k_priv *priv, void *data, int length)
  380. {
  381. void __iomem *regs = priv->regs;
  382. dma_addr_t dma_addr;
  383. int loops;
  384. dma_addr = pci_map_single(priv->pdev, data, length, PCI_DMA_TODEVICE);
  385. if (pci_dma_mapping_error(priv->pdev, dma_addr))
  386. return -ENOMEM;
  387. iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR);
  388. iowrite32(0, regs + MWL8K_HIU_INT_CODE);
  389. iowrite32(MWL8K_H2A_INT_DOORBELL,
  390. regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  391. iowrite32(MWL8K_H2A_INT_DUMMY,
  392. regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  393. loops = 1000;
  394. do {
  395. u32 int_code;
  396. int_code = ioread32(regs + MWL8K_HIU_INT_CODE);
  397. if (int_code == MWL8K_INT_CODE_CMD_FINISHED) {
  398. iowrite32(0, regs + MWL8K_HIU_INT_CODE);
  399. break;
  400. }
  401. cond_resched();
  402. udelay(1);
  403. } while (--loops);
  404. pci_unmap_single(priv->pdev, dma_addr, length, PCI_DMA_TODEVICE);
  405. return loops ? 0 : -ETIMEDOUT;
  406. }
  407. static int mwl8k_load_fw_image(struct mwl8k_priv *priv,
  408. const u8 *data, size_t length)
  409. {
  410. struct mwl8k_cmd_pkt *cmd;
  411. int done;
  412. int rc = 0;
  413. cmd = kmalloc(sizeof(*cmd) + 256, GFP_KERNEL);
  414. if (cmd == NULL)
  415. return -ENOMEM;
  416. cmd->code = cpu_to_le16(MWL8K_CMD_CODE_DNLD);
  417. cmd->seq_num = 0;
  418. cmd->macid = 0;
  419. cmd->result = 0;
  420. done = 0;
  421. while (length) {
  422. int block_size = length > 256 ? 256 : length;
  423. memcpy(cmd->payload, data + done, block_size);
  424. cmd->length = cpu_to_le16(block_size);
  425. rc = mwl8k_send_fw_load_cmd(priv, cmd,
  426. sizeof(*cmd) + block_size);
  427. if (rc)
  428. break;
  429. done += block_size;
  430. length -= block_size;
  431. }
  432. if (!rc) {
  433. cmd->length = 0;
  434. rc = mwl8k_send_fw_load_cmd(priv, cmd, sizeof(*cmd));
  435. }
  436. kfree(cmd);
  437. return rc;
  438. }
  439. static int mwl8k_feed_fw_image(struct mwl8k_priv *priv,
  440. const u8 *data, size_t length)
  441. {
  442. unsigned char *buffer;
  443. int may_continue, rc = 0;
  444. u32 done, prev_block_size;
  445. buffer = kmalloc(1024, GFP_KERNEL);
  446. if (buffer == NULL)
  447. return -ENOMEM;
  448. done = 0;
  449. prev_block_size = 0;
  450. may_continue = 1000;
  451. while (may_continue > 0) {
  452. u32 block_size;
  453. block_size = ioread32(priv->regs + MWL8K_HIU_SCRATCH);
  454. if (block_size & 1) {
  455. block_size &= ~1;
  456. may_continue--;
  457. } else {
  458. done += prev_block_size;
  459. length -= prev_block_size;
  460. }
  461. if (block_size > 1024 || block_size > length) {
  462. rc = -EOVERFLOW;
  463. break;
  464. }
  465. if (length == 0) {
  466. rc = 0;
  467. break;
  468. }
  469. if (block_size == 0) {
  470. rc = -EPROTO;
  471. may_continue--;
  472. udelay(1);
  473. continue;
  474. }
  475. prev_block_size = block_size;
  476. memcpy(buffer, data + done, block_size);
  477. rc = mwl8k_send_fw_load_cmd(priv, buffer, block_size);
  478. if (rc)
  479. break;
  480. }
  481. if (!rc && length != 0)
  482. rc = -EREMOTEIO;
  483. kfree(buffer);
  484. return rc;
  485. }
  486. static int mwl8k_load_firmware(struct ieee80211_hw *hw)
  487. {
  488. struct mwl8k_priv *priv = hw->priv;
  489. struct firmware *fw = priv->fw_ucode;
  490. int rc;
  491. int loops;
  492. if (!memcmp(fw->data, "\x01\x00\x00\x00", 4)) {
  493. struct firmware *helper = priv->fw_helper;
  494. if (helper == NULL) {
  495. printk(KERN_ERR "%s: helper image needed but none "
  496. "given\n", pci_name(priv->pdev));
  497. return -EINVAL;
  498. }
  499. rc = mwl8k_load_fw_image(priv, helper->data, helper->size);
  500. if (rc) {
  501. printk(KERN_ERR "%s: unable to load firmware "
  502. "helper image\n", pci_name(priv->pdev));
  503. return rc;
  504. }
  505. msleep(5);
  506. rc = mwl8k_feed_fw_image(priv, fw->data, fw->size);
  507. } else {
  508. rc = mwl8k_load_fw_image(priv, fw->data, fw->size);
  509. }
  510. if (rc) {
  511. printk(KERN_ERR "%s: unable to load firmware image\n",
  512. pci_name(priv->pdev));
  513. return rc;
  514. }
  515. iowrite32(MWL8K_MODE_STA, priv->regs + MWL8K_HIU_GEN_PTR);
  516. loops = 500000;
  517. do {
  518. u32 ready_code;
  519. ready_code = ioread32(priv->regs + MWL8K_HIU_INT_CODE);
  520. if (ready_code == MWL8K_FWAP_READY) {
  521. priv->ap_fw = 1;
  522. break;
  523. } else if (ready_code == MWL8K_FWSTA_READY) {
  524. priv->ap_fw = 0;
  525. break;
  526. }
  527. cond_resched();
  528. udelay(1);
  529. } while (--loops);
  530. return loops ? 0 : -ETIMEDOUT;
  531. }
  532. /* DMA header used by firmware and hardware. */
  533. struct mwl8k_dma_data {
  534. __le16 fwlen;
  535. struct ieee80211_hdr wh;
  536. char data[0];
  537. } __attribute__((packed));
  538. /* Routines to add/remove DMA header from skb. */
  539. static inline void mwl8k_remove_dma_header(struct sk_buff *skb, __le16 qos)
  540. {
  541. struct mwl8k_dma_data *tr;
  542. int hdrlen;
  543. tr = (struct mwl8k_dma_data *)skb->data;
  544. hdrlen = ieee80211_hdrlen(tr->wh.frame_control);
  545. if (hdrlen != sizeof(tr->wh)) {
  546. if (ieee80211_is_data_qos(tr->wh.frame_control)) {
  547. memmove(tr->data - hdrlen, &tr->wh, hdrlen - 2);
  548. *((__le16 *)(tr->data - 2)) = qos;
  549. } else {
  550. memmove(tr->data - hdrlen, &tr->wh, hdrlen);
  551. }
  552. }
  553. if (hdrlen != sizeof(*tr))
  554. skb_pull(skb, sizeof(*tr) - hdrlen);
  555. }
  556. static inline void mwl8k_add_dma_header(struct sk_buff *skb)
  557. {
  558. struct ieee80211_hdr *wh;
  559. int hdrlen;
  560. struct mwl8k_dma_data *tr;
  561. /*
  562. * Add a firmware DMA header; the firmware requires that we
  563. * present a 2-byte payload length followed by a 4-address
  564. * header (without QoS field), followed (optionally) by any
  565. * WEP/ExtIV header (but only filled in for CCMP).
  566. */
  567. wh = (struct ieee80211_hdr *)skb->data;
  568. hdrlen = ieee80211_hdrlen(wh->frame_control);
  569. if (hdrlen != sizeof(*tr))
  570. skb_push(skb, sizeof(*tr) - hdrlen);
  571. if (ieee80211_is_data_qos(wh->frame_control))
  572. hdrlen -= 2;
  573. tr = (struct mwl8k_dma_data *)skb->data;
  574. if (wh != &tr->wh)
  575. memmove(&tr->wh, wh, hdrlen);
  576. if (hdrlen != sizeof(tr->wh))
  577. memset(((void *)&tr->wh) + hdrlen, 0, sizeof(tr->wh) - hdrlen);
  578. /*
  579. * Firmware length is the length of the fully formed "802.11
  580. * payload". That is, everything except for the 802.11 header.
  581. * This includes all crypto material including the MIC.
  582. */
  583. tr->fwlen = cpu_to_le16(skb->len - sizeof(*tr));
  584. }
  585. /*
  586. * Packet reception for 88w8366 AP firmware.
  587. */
  588. struct mwl8k_rxd_8366_ap {
  589. __le16 pkt_len;
  590. __u8 sq2;
  591. __u8 rate;
  592. __le32 pkt_phys_addr;
  593. __le32 next_rxd_phys_addr;
  594. __le16 qos_control;
  595. __le16 htsig2;
  596. __le32 hw_rssi_info;
  597. __le32 hw_noise_floor_info;
  598. __u8 noise_floor;
  599. __u8 pad0[3];
  600. __u8 rssi;
  601. __u8 rx_status;
  602. __u8 channel;
  603. __u8 rx_ctrl;
  604. } __attribute__((packed));
  605. #define MWL8K_8366_AP_RATE_INFO_MCS_FORMAT 0x80
  606. #define MWL8K_8366_AP_RATE_INFO_40MHZ 0x40
  607. #define MWL8K_8366_AP_RATE_INFO_RATEID(x) ((x) & 0x3f)
  608. #define MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST 0x80
  609. static void mwl8k_rxd_8366_ap_init(void *_rxd, dma_addr_t next_dma_addr)
  610. {
  611. struct mwl8k_rxd_8366_ap *rxd = _rxd;
  612. rxd->next_rxd_phys_addr = cpu_to_le32(next_dma_addr);
  613. rxd->rx_ctrl = MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST;
  614. }
  615. static void mwl8k_rxd_8366_ap_refill(void *_rxd, dma_addr_t addr, int len)
  616. {
  617. struct mwl8k_rxd_8366_ap *rxd = _rxd;
  618. rxd->pkt_len = cpu_to_le16(len);
  619. rxd->pkt_phys_addr = cpu_to_le32(addr);
  620. wmb();
  621. rxd->rx_ctrl = 0;
  622. }
  623. static int
  624. mwl8k_rxd_8366_ap_process(void *_rxd, struct ieee80211_rx_status *status,
  625. __le16 *qos)
  626. {
  627. struct mwl8k_rxd_8366_ap *rxd = _rxd;
  628. if (!(rxd->rx_ctrl & MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST))
  629. return -1;
  630. rmb();
  631. memset(status, 0, sizeof(*status));
  632. status->signal = -rxd->rssi;
  633. if (rxd->rate & MWL8K_8366_AP_RATE_INFO_MCS_FORMAT) {
  634. status->flag |= RX_FLAG_HT;
  635. if (rxd->rate & MWL8K_8366_AP_RATE_INFO_40MHZ)
  636. status->flag |= RX_FLAG_40MHZ;
  637. status->rate_idx = MWL8K_8366_AP_RATE_INFO_RATEID(rxd->rate);
  638. } else {
  639. int i;
  640. for (i = 0; i < ARRAY_SIZE(mwl8k_rates_24); i++) {
  641. if (mwl8k_rates_24[i].hw_value == rxd->rate) {
  642. status->rate_idx = i;
  643. break;
  644. }
  645. }
  646. }
  647. if (rxd->channel > 14) {
  648. status->band = IEEE80211_BAND_5GHZ;
  649. if (!(status->flag & RX_FLAG_HT))
  650. status->rate_idx -= 5;
  651. } else {
  652. status->band = IEEE80211_BAND_2GHZ;
  653. }
  654. status->freq = ieee80211_channel_to_frequency(rxd->channel);
  655. *qos = rxd->qos_control;
  656. return le16_to_cpu(rxd->pkt_len);
  657. }
  658. static struct rxd_ops rxd_8366_ap_ops = {
  659. .rxd_size = sizeof(struct mwl8k_rxd_8366_ap),
  660. .rxd_init = mwl8k_rxd_8366_ap_init,
  661. .rxd_refill = mwl8k_rxd_8366_ap_refill,
  662. .rxd_process = mwl8k_rxd_8366_ap_process,
  663. };
  664. /*
  665. * Packet reception for STA firmware.
  666. */
  667. struct mwl8k_rxd_sta {
  668. __le16 pkt_len;
  669. __u8 link_quality;
  670. __u8 noise_level;
  671. __le32 pkt_phys_addr;
  672. __le32 next_rxd_phys_addr;
  673. __le16 qos_control;
  674. __le16 rate_info;
  675. __le32 pad0[4];
  676. __u8 rssi;
  677. __u8 channel;
  678. __le16 pad1;
  679. __u8 rx_ctrl;
  680. __u8 rx_status;
  681. __u8 pad2[2];
  682. } __attribute__((packed));
  683. #define MWL8K_STA_RATE_INFO_SHORTPRE 0x8000
  684. #define MWL8K_STA_RATE_INFO_ANTSELECT(x) (((x) >> 11) & 0x3)
  685. #define MWL8K_STA_RATE_INFO_RATEID(x) (((x) >> 3) & 0x3f)
  686. #define MWL8K_STA_RATE_INFO_40MHZ 0x0004
  687. #define MWL8K_STA_RATE_INFO_SHORTGI 0x0002
  688. #define MWL8K_STA_RATE_INFO_MCS_FORMAT 0x0001
  689. #define MWL8K_STA_RX_CTRL_OWNED_BY_HOST 0x02
  690. static void mwl8k_rxd_sta_init(void *_rxd, dma_addr_t next_dma_addr)
  691. {
  692. struct mwl8k_rxd_sta *rxd = _rxd;
  693. rxd->next_rxd_phys_addr = cpu_to_le32(next_dma_addr);
  694. rxd->rx_ctrl = MWL8K_STA_RX_CTRL_OWNED_BY_HOST;
  695. }
  696. static void mwl8k_rxd_sta_refill(void *_rxd, dma_addr_t addr, int len)
  697. {
  698. struct mwl8k_rxd_sta *rxd = _rxd;
  699. rxd->pkt_len = cpu_to_le16(len);
  700. rxd->pkt_phys_addr = cpu_to_le32(addr);
  701. wmb();
  702. rxd->rx_ctrl = 0;
  703. }
  704. static int
  705. mwl8k_rxd_sta_process(void *_rxd, struct ieee80211_rx_status *status,
  706. __le16 *qos)
  707. {
  708. struct mwl8k_rxd_sta *rxd = _rxd;
  709. u16 rate_info;
  710. if (!(rxd->rx_ctrl & MWL8K_STA_RX_CTRL_OWNED_BY_HOST))
  711. return -1;
  712. rmb();
  713. rate_info = le16_to_cpu(rxd->rate_info);
  714. memset(status, 0, sizeof(*status));
  715. status->signal = -rxd->rssi;
  716. status->antenna = MWL8K_STA_RATE_INFO_ANTSELECT(rate_info);
  717. status->rate_idx = MWL8K_STA_RATE_INFO_RATEID(rate_info);
  718. if (rate_info & MWL8K_STA_RATE_INFO_SHORTPRE)
  719. status->flag |= RX_FLAG_SHORTPRE;
  720. if (rate_info & MWL8K_STA_RATE_INFO_40MHZ)
  721. status->flag |= RX_FLAG_40MHZ;
  722. if (rate_info & MWL8K_STA_RATE_INFO_SHORTGI)
  723. status->flag |= RX_FLAG_SHORT_GI;
  724. if (rate_info & MWL8K_STA_RATE_INFO_MCS_FORMAT)
  725. status->flag |= RX_FLAG_HT;
  726. if (rxd->channel > 14) {
  727. status->band = IEEE80211_BAND_5GHZ;
  728. if (!(status->flag & RX_FLAG_HT))
  729. status->rate_idx -= 5;
  730. } else {
  731. status->band = IEEE80211_BAND_2GHZ;
  732. }
  733. status->freq = ieee80211_channel_to_frequency(rxd->channel);
  734. *qos = rxd->qos_control;
  735. return le16_to_cpu(rxd->pkt_len);
  736. }
  737. static struct rxd_ops rxd_sta_ops = {
  738. .rxd_size = sizeof(struct mwl8k_rxd_sta),
  739. .rxd_init = mwl8k_rxd_sta_init,
  740. .rxd_refill = mwl8k_rxd_sta_refill,
  741. .rxd_process = mwl8k_rxd_sta_process,
  742. };
  743. #define MWL8K_RX_DESCS 256
  744. #define MWL8K_RX_MAXSZ 3800
  745. static int mwl8k_rxq_init(struct ieee80211_hw *hw, int index)
  746. {
  747. struct mwl8k_priv *priv = hw->priv;
  748. struct mwl8k_rx_queue *rxq = priv->rxq + index;
  749. int size;
  750. int i;
  751. rxq->rxd_count = 0;
  752. rxq->head = 0;
  753. rxq->tail = 0;
  754. size = MWL8K_RX_DESCS * priv->rxd_ops->rxd_size;
  755. rxq->rxd = pci_alloc_consistent(priv->pdev, size, &rxq->rxd_dma);
  756. if (rxq->rxd == NULL) {
  757. printk(KERN_ERR "%s: failed to alloc RX descriptors\n",
  758. wiphy_name(hw->wiphy));
  759. return -ENOMEM;
  760. }
  761. memset(rxq->rxd, 0, size);
  762. rxq->buf = kmalloc(MWL8K_RX_DESCS * sizeof(*rxq->buf), GFP_KERNEL);
  763. if (rxq->buf == NULL) {
  764. printk(KERN_ERR "%s: failed to alloc RX skbuff list\n",
  765. wiphy_name(hw->wiphy));
  766. pci_free_consistent(priv->pdev, size, rxq->rxd, rxq->rxd_dma);
  767. return -ENOMEM;
  768. }
  769. memset(rxq->buf, 0, MWL8K_RX_DESCS * sizeof(*rxq->buf));
  770. for (i = 0; i < MWL8K_RX_DESCS; i++) {
  771. int desc_size;
  772. void *rxd;
  773. int nexti;
  774. dma_addr_t next_dma_addr;
  775. desc_size = priv->rxd_ops->rxd_size;
  776. rxd = rxq->rxd + (i * priv->rxd_ops->rxd_size);
  777. nexti = i + 1;
  778. if (nexti == MWL8K_RX_DESCS)
  779. nexti = 0;
  780. next_dma_addr = rxq->rxd_dma + (nexti * desc_size);
  781. priv->rxd_ops->rxd_init(rxd, next_dma_addr);
  782. }
  783. return 0;
  784. }
  785. static int rxq_refill(struct ieee80211_hw *hw, int index, int limit)
  786. {
  787. struct mwl8k_priv *priv = hw->priv;
  788. struct mwl8k_rx_queue *rxq = priv->rxq + index;
  789. int refilled;
  790. refilled = 0;
  791. while (rxq->rxd_count < MWL8K_RX_DESCS && limit--) {
  792. struct sk_buff *skb;
  793. dma_addr_t addr;
  794. int rx;
  795. void *rxd;
  796. skb = dev_alloc_skb(MWL8K_RX_MAXSZ);
  797. if (skb == NULL)
  798. break;
  799. addr = pci_map_single(priv->pdev, skb->data,
  800. MWL8K_RX_MAXSZ, DMA_FROM_DEVICE);
  801. rxq->rxd_count++;
  802. rx = rxq->tail++;
  803. if (rxq->tail == MWL8K_RX_DESCS)
  804. rxq->tail = 0;
  805. rxq->buf[rx].skb = skb;
  806. dma_unmap_addr_set(&rxq->buf[rx], dma, addr);
  807. rxd = rxq->rxd + (rx * priv->rxd_ops->rxd_size);
  808. priv->rxd_ops->rxd_refill(rxd, addr, MWL8K_RX_MAXSZ);
  809. refilled++;
  810. }
  811. return refilled;
  812. }
  813. /* Must be called only when the card's reception is completely halted */
  814. static void mwl8k_rxq_deinit(struct ieee80211_hw *hw, int index)
  815. {
  816. struct mwl8k_priv *priv = hw->priv;
  817. struct mwl8k_rx_queue *rxq = priv->rxq + index;
  818. int i;
  819. for (i = 0; i < MWL8K_RX_DESCS; i++) {
  820. if (rxq->buf[i].skb != NULL) {
  821. pci_unmap_single(priv->pdev,
  822. dma_unmap_addr(&rxq->buf[i], dma),
  823. MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE);
  824. dma_unmap_addr_set(&rxq->buf[i], dma, 0);
  825. kfree_skb(rxq->buf[i].skb);
  826. rxq->buf[i].skb = NULL;
  827. }
  828. }
  829. kfree(rxq->buf);
  830. rxq->buf = NULL;
  831. pci_free_consistent(priv->pdev,
  832. MWL8K_RX_DESCS * priv->rxd_ops->rxd_size,
  833. rxq->rxd, rxq->rxd_dma);
  834. rxq->rxd = NULL;
  835. }
  836. /*
  837. * Scan a list of BSSIDs to process for finalize join.
  838. * Allows for extension to process multiple BSSIDs.
  839. */
  840. static inline int
  841. mwl8k_capture_bssid(struct mwl8k_priv *priv, struct ieee80211_hdr *wh)
  842. {
  843. return priv->capture_beacon &&
  844. ieee80211_is_beacon(wh->frame_control) &&
  845. !compare_ether_addr(wh->addr3, priv->capture_bssid);
  846. }
  847. static inline void mwl8k_save_beacon(struct ieee80211_hw *hw,
  848. struct sk_buff *skb)
  849. {
  850. struct mwl8k_priv *priv = hw->priv;
  851. priv->capture_beacon = false;
  852. memset(priv->capture_bssid, 0, ETH_ALEN);
  853. /*
  854. * Use GFP_ATOMIC as rxq_process is called from
  855. * the primary interrupt handler, memory allocation call
  856. * must not sleep.
  857. */
  858. priv->beacon_skb = skb_copy(skb, GFP_ATOMIC);
  859. if (priv->beacon_skb != NULL)
  860. ieee80211_queue_work(hw, &priv->finalize_join_worker);
  861. }
  862. static int rxq_process(struct ieee80211_hw *hw, int index, int limit)
  863. {
  864. struct mwl8k_priv *priv = hw->priv;
  865. struct mwl8k_rx_queue *rxq = priv->rxq + index;
  866. int processed;
  867. processed = 0;
  868. while (rxq->rxd_count && limit--) {
  869. struct sk_buff *skb;
  870. void *rxd;
  871. int pkt_len;
  872. struct ieee80211_rx_status status;
  873. __le16 qos;
  874. skb = rxq->buf[rxq->head].skb;
  875. if (skb == NULL)
  876. break;
  877. rxd = rxq->rxd + (rxq->head * priv->rxd_ops->rxd_size);
  878. pkt_len = priv->rxd_ops->rxd_process(rxd, &status, &qos);
  879. if (pkt_len < 0)
  880. break;
  881. rxq->buf[rxq->head].skb = NULL;
  882. pci_unmap_single(priv->pdev,
  883. dma_unmap_addr(&rxq->buf[rxq->head], dma),
  884. MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE);
  885. dma_unmap_addr_set(&rxq->buf[rxq->head], dma, 0);
  886. rxq->head++;
  887. if (rxq->head == MWL8K_RX_DESCS)
  888. rxq->head = 0;
  889. rxq->rxd_count--;
  890. skb_put(skb, pkt_len);
  891. mwl8k_remove_dma_header(skb, qos);
  892. /*
  893. * Check for a pending join operation. Save a
  894. * copy of the beacon and schedule a tasklet to
  895. * send a FINALIZE_JOIN command to the firmware.
  896. */
  897. if (mwl8k_capture_bssid(priv, (void *)skb->data))
  898. mwl8k_save_beacon(hw, skb);
  899. memcpy(IEEE80211_SKB_RXCB(skb), &status, sizeof(status));
  900. ieee80211_rx_irqsafe(hw, skb);
  901. processed++;
  902. }
  903. return processed;
  904. }
  905. /*
  906. * Packet transmission.
  907. */
  908. #define MWL8K_TXD_STATUS_OK 0x00000001
  909. #define MWL8K_TXD_STATUS_OK_RETRY 0x00000002
  910. #define MWL8K_TXD_STATUS_OK_MORE_RETRY 0x00000004
  911. #define MWL8K_TXD_STATUS_MULTICAST_TX 0x00000008
  912. #define MWL8K_TXD_STATUS_FW_OWNED 0x80000000
  913. #define MWL8K_QOS_QLEN_UNSPEC 0xff00
  914. #define MWL8K_QOS_ACK_POLICY_MASK 0x0060
  915. #define MWL8K_QOS_ACK_POLICY_NORMAL 0x0000
  916. #define MWL8K_QOS_ACK_POLICY_BLOCKACK 0x0060
  917. #define MWL8K_QOS_EOSP 0x0010
  918. struct mwl8k_tx_desc {
  919. __le32 status;
  920. __u8 data_rate;
  921. __u8 tx_priority;
  922. __le16 qos_control;
  923. __le32 pkt_phys_addr;
  924. __le16 pkt_len;
  925. __u8 dest_MAC_addr[ETH_ALEN];
  926. __le32 next_txd_phys_addr;
  927. __le32 reserved;
  928. __le16 rate_info;
  929. __u8 peer_id;
  930. __u8 tx_frag_cnt;
  931. } __attribute__((packed));
  932. #define MWL8K_TX_DESCS 128
  933. static int mwl8k_txq_init(struct ieee80211_hw *hw, int index)
  934. {
  935. struct mwl8k_priv *priv = hw->priv;
  936. struct mwl8k_tx_queue *txq = priv->txq + index;
  937. int size;
  938. int i;
  939. txq->len = 0;
  940. txq->head = 0;
  941. txq->tail = 0;
  942. size = MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc);
  943. txq->txd = pci_alloc_consistent(priv->pdev, size, &txq->txd_dma);
  944. if (txq->txd == NULL) {
  945. printk(KERN_ERR "%s: failed to alloc TX descriptors\n",
  946. wiphy_name(hw->wiphy));
  947. return -ENOMEM;
  948. }
  949. memset(txq->txd, 0, size);
  950. txq->skb = kmalloc(MWL8K_TX_DESCS * sizeof(*txq->skb), GFP_KERNEL);
  951. if (txq->skb == NULL) {
  952. printk(KERN_ERR "%s: failed to alloc TX skbuff list\n",
  953. wiphy_name(hw->wiphy));
  954. pci_free_consistent(priv->pdev, size, txq->txd, txq->txd_dma);
  955. return -ENOMEM;
  956. }
  957. memset(txq->skb, 0, MWL8K_TX_DESCS * sizeof(*txq->skb));
  958. for (i = 0; i < MWL8K_TX_DESCS; i++) {
  959. struct mwl8k_tx_desc *tx_desc;
  960. int nexti;
  961. tx_desc = txq->txd + i;
  962. nexti = (i + 1) % MWL8K_TX_DESCS;
  963. tx_desc->status = 0;
  964. tx_desc->next_txd_phys_addr =
  965. cpu_to_le32(txq->txd_dma + nexti * sizeof(*tx_desc));
  966. }
  967. return 0;
  968. }
  969. static inline void mwl8k_tx_start(struct mwl8k_priv *priv)
  970. {
  971. iowrite32(MWL8K_H2A_INT_PPA_READY,
  972. priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  973. iowrite32(MWL8K_H2A_INT_DUMMY,
  974. priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  975. ioread32(priv->regs + MWL8K_HIU_INT_CODE);
  976. }
  977. static void mwl8k_dump_tx_rings(struct ieee80211_hw *hw)
  978. {
  979. struct mwl8k_priv *priv = hw->priv;
  980. int i;
  981. for (i = 0; i < MWL8K_TX_QUEUES; i++) {
  982. struct mwl8k_tx_queue *txq = priv->txq + i;
  983. int fw_owned = 0;
  984. int drv_owned = 0;
  985. int unused = 0;
  986. int desc;
  987. for (desc = 0; desc < MWL8K_TX_DESCS; desc++) {
  988. struct mwl8k_tx_desc *tx_desc = txq->txd + desc;
  989. u32 status;
  990. status = le32_to_cpu(tx_desc->status);
  991. if (status & MWL8K_TXD_STATUS_FW_OWNED)
  992. fw_owned++;
  993. else
  994. drv_owned++;
  995. if (tx_desc->pkt_len == 0)
  996. unused++;
  997. }
  998. printk(KERN_ERR "%s: txq[%d] len=%d head=%d tail=%d "
  999. "fw_owned=%d drv_owned=%d unused=%d\n",
  1000. wiphy_name(hw->wiphy), i,
  1001. txq->len, txq->head, txq->tail,
  1002. fw_owned, drv_owned, unused);
  1003. }
  1004. }
  1005. /*
  1006. * Must be called with priv->fw_mutex held and tx queues stopped.
  1007. */
  1008. #define MWL8K_TX_WAIT_TIMEOUT_MS 5000
  1009. static int mwl8k_tx_wait_empty(struct ieee80211_hw *hw)
  1010. {
  1011. struct mwl8k_priv *priv = hw->priv;
  1012. DECLARE_COMPLETION_ONSTACK(tx_wait);
  1013. int retry;
  1014. int rc;
  1015. might_sleep();
  1016. /*
  1017. * The TX queues are stopped at this point, so this test
  1018. * doesn't need to take ->tx_lock.
  1019. */
  1020. if (!priv->pending_tx_pkts)
  1021. return 0;
  1022. retry = 0;
  1023. rc = 0;
  1024. spin_lock_bh(&priv->tx_lock);
  1025. priv->tx_wait = &tx_wait;
  1026. while (!rc) {
  1027. int oldcount;
  1028. unsigned long timeout;
  1029. oldcount = priv->pending_tx_pkts;
  1030. spin_unlock_bh(&priv->tx_lock);
  1031. timeout = wait_for_completion_timeout(&tx_wait,
  1032. msecs_to_jiffies(MWL8K_TX_WAIT_TIMEOUT_MS));
  1033. spin_lock_bh(&priv->tx_lock);
  1034. if (timeout) {
  1035. WARN_ON(priv->pending_tx_pkts);
  1036. if (retry) {
  1037. printk(KERN_NOTICE "%s: tx rings drained\n",
  1038. wiphy_name(hw->wiphy));
  1039. }
  1040. break;
  1041. }
  1042. if (priv->pending_tx_pkts < oldcount) {
  1043. printk(KERN_NOTICE "%s: waiting for tx rings "
  1044. "to drain (%d -> %d pkts)\n",
  1045. wiphy_name(hw->wiphy), oldcount,
  1046. priv->pending_tx_pkts);
  1047. retry = 1;
  1048. continue;
  1049. }
  1050. priv->tx_wait = NULL;
  1051. printk(KERN_ERR "%s: tx rings stuck for %d ms\n",
  1052. wiphy_name(hw->wiphy), MWL8K_TX_WAIT_TIMEOUT_MS);
  1053. mwl8k_dump_tx_rings(hw);
  1054. rc = -ETIMEDOUT;
  1055. }
  1056. spin_unlock_bh(&priv->tx_lock);
  1057. return rc;
  1058. }
  1059. #define MWL8K_TXD_SUCCESS(status) \
  1060. ((status) & (MWL8K_TXD_STATUS_OK | \
  1061. MWL8K_TXD_STATUS_OK_RETRY | \
  1062. MWL8K_TXD_STATUS_OK_MORE_RETRY))
  1063. static int
  1064. mwl8k_txq_reclaim(struct ieee80211_hw *hw, int index, int limit, int force)
  1065. {
  1066. struct mwl8k_priv *priv = hw->priv;
  1067. struct mwl8k_tx_queue *txq = priv->txq + index;
  1068. int processed;
  1069. processed = 0;
  1070. while (txq->len > 0 && limit--) {
  1071. int tx;
  1072. struct mwl8k_tx_desc *tx_desc;
  1073. unsigned long addr;
  1074. int size;
  1075. struct sk_buff *skb;
  1076. struct ieee80211_tx_info *info;
  1077. u32 status;
  1078. tx = txq->head;
  1079. tx_desc = txq->txd + tx;
  1080. status = le32_to_cpu(tx_desc->status);
  1081. if (status & MWL8K_TXD_STATUS_FW_OWNED) {
  1082. if (!force)
  1083. break;
  1084. tx_desc->status &=
  1085. ~cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED);
  1086. }
  1087. txq->head = (tx + 1) % MWL8K_TX_DESCS;
  1088. BUG_ON(txq->len == 0);
  1089. txq->len--;
  1090. priv->pending_tx_pkts--;
  1091. addr = le32_to_cpu(tx_desc->pkt_phys_addr);
  1092. size = le16_to_cpu(tx_desc->pkt_len);
  1093. skb = txq->skb[tx];
  1094. txq->skb[tx] = NULL;
  1095. BUG_ON(skb == NULL);
  1096. pci_unmap_single(priv->pdev, addr, size, PCI_DMA_TODEVICE);
  1097. mwl8k_remove_dma_header(skb, tx_desc->qos_control);
  1098. /* Mark descriptor as unused */
  1099. tx_desc->pkt_phys_addr = 0;
  1100. tx_desc->pkt_len = 0;
  1101. info = IEEE80211_SKB_CB(skb);
  1102. ieee80211_tx_info_clear_status(info);
  1103. if (MWL8K_TXD_SUCCESS(status))
  1104. info->flags |= IEEE80211_TX_STAT_ACK;
  1105. ieee80211_tx_status_irqsafe(hw, skb);
  1106. processed++;
  1107. }
  1108. if (processed && priv->radio_on && !mutex_is_locked(&priv->fw_mutex))
  1109. ieee80211_wake_queue(hw, index);
  1110. return processed;
  1111. }
  1112. /* must be called only when the card's transmit is completely halted */
  1113. static void mwl8k_txq_deinit(struct ieee80211_hw *hw, int index)
  1114. {
  1115. struct mwl8k_priv *priv = hw->priv;
  1116. struct mwl8k_tx_queue *txq = priv->txq + index;
  1117. mwl8k_txq_reclaim(hw, index, INT_MAX, 1);
  1118. kfree(txq->skb);
  1119. txq->skb = NULL;
  1120. pci_free_consistent(priv->pdev,
  1121. MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc),
  1122. txq->txd, txq->txd_dma);
  1123. txq->txd = NULL;
  1124. }
  1125. static int
  1126. mwl8k_txq_xmit(struct ieee80211_hw *hw, int index, struct sk_buff *skb)
  1127. {
  1128. struct mwl8k_priv *priv = hw->priv;
  1129. struct ieee80211_tx_info *tx_info;
  1130. struct mwl8k_vif *mwl8k_vif;
  1131. struct ieee80211_hdr *wh;
  1132. struct mwl8k_tx_queue *txq;
  1133. struct mwl8k_tx_desc *tx;
  1134. dma_addr_t dma;
  1135. u32 txstatus;
  1136. u8 txdatarate;
  1137. u16 qos;
  1138. wh = (struct ieee80211_hdr *)skb->data;
  1139. if (ieee80211_is_data_qos(wh->frame_control))
  1140. qos = le16_to_cpu(*((__le16 *)ieee80211_get_qos_ctl(wh)));
  1141. else
  1142. qos = 0;
  1143. mwl8k_add_dma_header(skb);
  1144. wh = &((struct mwl8k_dma_data *)skb->data)->wh;
  1145. tx_info = IEEE80211_SKB_CB(skb);
  1146. mwl8k_vif = MWL8K_VIF(tx_info->control.vif);
  1147. if (tx_info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
  1148. wh->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
  1149. wh->seq_ctrl |= cpu_to_le16(mwl8k_vif->seqno);
  1150. mwl8k_vif->seqno += 0x10;
  1151. }
  1152. /* Setup firmware control bit fields for each frame type. */
  1153. txstatus = 0;
  1154. txdatarate = 0;
  1155. if (ieee80211_is_mgmt(wh->frame_control) ||
  1156. ieee80211_is_ctl(wh->frame_control)) {
  1157. txdatarate = 0;
  1158. qos |= MWL8K_QOS_QLEN_UNSPEC | MWL8K_QOS_EOSP;
  1159. } else if (ieee80211_is_data(wh->frame_control)) {
  1160. txdatarate = 1;
  1161. if (is_multicast_ether_addr(wh->addr1))
  1162. txstatus |= MWL8K_TXD_STATUS_MULTICAST_TX;
  1163. qos &= ~MWL8K_QOS_ACK_POLICY_MASK;
  1164. if (tx_info->flags & IEEE80211_TX_CTL_AMPDU)
  1165. qos |= MWL8K_QOS_ACK_POLICY_BLOCKACK;
  1166. else
  1167. qos |= MWL8K_QOS_ACK_POLICY_NORMAL;
  1168. }
  1169. dma = pci_map_single(priv->pdev, skb->data,
  1170. skb->len, PCI_DMA_TODEVICE);
  1171. if (pci_dma_mapping_error(priv->pdev, dma)) {
  1172. printk(KERN_DEBUG "%s: failed to dma map skb, "
  1173. "dropping TX frame.\n", wiphy_name(hw->wiphy));
  1174. dev_kfree_skb(skb);
  1175. return NETDEV_TX_OK;
  1176. }
  1177. spin_lock_bh(&priv->tx_lock);
  1178. txq = priv->txq + index;
  1179. BUG_ON(txq->skb[txq->tail] != NULL);
  1180. txq->skb[txq->tail] = skb;
  1181. tx = txq->txd + txq->tail;
  1182. tx->data_rate = txdatarate;
  1183. tx->tx_priority = index;
  1184. tx->qos_control = cpu_to_le16(qos);
  1185. tx->pkt_phys_addr = cpu_to_le32(dma);
  1186. tx->pkt_len = cpu_to_le16(skb->len);
  1187. tx->rate_info = 0;
  1188. if (!priv->ap_fw && tx_info->control.sta != NULL)
  1189. tx->peer_id = MWL8K_STA(tx_info->control.sta)->peer_id;
  1190. else
  1191. tx->peer_id = 0;
  1192. wmb();
  1193. tx->status = cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED | txstatus);
  1194. txq->len++;
  1195. priv->pending_tx_pkts++;
  1196. txq->tail++;
  1197. if (txq->tail == MWL8K_TX_DESCS)
  1198. txq->tail = 0;
  1199. if (txq->head == txq->tail)
  1200. ieee80211_stop_queue(hw, index);
  1201. mwl8k_tx_start(priv);
  1202. spin_unlock_bh(&priv->tx_lock);
  1203. return NETDEV_TX_OK;
  1204. }
  1205. /*
  1206. * Firmware access.
  1207. *
  1208. * We have the following requirements for issuing firmware commands:
  1209. * - Some commands require that the packet transmit path is idle when
  1210. * the command is issued. (For simplicity, we'll just quiesce the
  1211. * transmit path for every command.)
  1212. * - There are certain sequences of commands that need to be issued to
  1213. * the hardware sequentially, with no other intervening commands.
  1214. *
  1215. * This leads to an implementation of a "firmware lock" as a mutex that
  1216. * can be taken recursively, and which is taken by both the low-level
  1217. * command submission function (mwl8k_post_cmd) as well as any users of
  1218. * that function that require issuing of an atomic sequence of commands,
  1219. * and quiesces the transmit path whenever it's taken.
  1220. */
  1221. static int mwl8k_fw_lock(struct ieee80211_hw *hw)
  1222. {
  1223. struct mwl8k_priv *priv = hw->priv;
  1224. if (priv->fw_mutex_owner != current) {
  1225. int rc;
  1226. mutex_lock(&priv->fw_mutex);
  1227. ieee80211_stop_queues(hw);
  1228. rc = mwl8k_tx_wait_empty(hw);
  1229. if (rc) {
  1230. ieee80211_wake_queues(hw);
  1231. mutex_unlock(&priv->fw_mutex);
  1232. return rc;
  1233. }
  1234. priv->fw_mutex_owner = current;
  1235. }
  1236. priv->fw_mutex_depth++;
  1237. return 0;
  1238. }
  1239. static void mwl8k_fw_unlock(struct ieee80211_hw *hw)
  1240. {
  1241. struct mwl8k_priv *priv = hw->priv;
  1242. if (!--priv->fw_mutex_depth) {
  1243. ieee80211_wake_queues(hw);
  1244. priv->fw_mutex_owner = NULL;
  1245. mutex_unlock(&priv->fw_mutex);
  1246. }
  1247. }
  1248. /*
  1249. * Command processing.
  1250. */
  1251. /* Timeout firmware commands after 10s */
  1252. #define MWL8K_CMD_TIMEOUT_MS 10000
  1253. static int mwl8k_post_cmd(struct ieee80211_hw *hw, struct mwl8k_cmd_pkt *cmd)
  1254. {
  1255. DECLARE_COMPLETION_ONSTACK(cmd_wait);
  1256. struct mwl8k_priv *priv = hw->priv;
  1257. void __iomem *regs = priv->regs;
  1258. dma_addr_t dma_addr;
  1259. unsigned int dma_size;
  1260. int rc;
  1261. unsigned long timeout = 0;
  1262. u8 buf[32];
  1263. cmd->result = (__force __le16) 0xffff;
  1264. dma_size = le16_to_cpu(cmd->length);
  1265. dma_addr = pci_map_single(priv->pdev, cmd, dma_size,
  1266. PCI_DMA_BIDIRECTIONAL);
  1267. if (pci_dma_mapping_error(priv->pdev, dma_addr))
  1268. return -ENOMEM;
  1269. rc = mwl8k_fw_lock(hw);
  1270. if (rc) {
  1271. pci_unmap_single(priv->pdev, dma_addr, dma_size,
  1272. PCI_DMA_BIDIRECTIONAL);
  1273. return rc;
  1274. }
  1275. priv->hostcmd_wait = &cmd_wait;
  1276. iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR);
  1277. iowrite32(MWL8K_H2A_INT_DOORBELL,
  1278. regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  1279. iowrite32(MWL8K_H2A_INT_DUMMY,
  1280. regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  1281. timeout = wait_for_completion_timeout(&cmd_wait,
  1282. msecs_to_jiffies(MWL8K_CMD_TIMEOUT_MS));
  1283. priv->hostcmd_wait = NULL;
  1284. mwl8k_fw_unlock(hw);
  1285. pci_unmap_single(priv->pdev, dma_addr, dma_size,
  1286. PCI_DMA_BIDIRECTIONAL);
  1287. if (!timeout) {
  1288. printk(KERN_ERR "%s: Command %s timeout after %u ms\n",
  1289. wiphy_name(hw->wiphy),
  1290. mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
  1291. MWL8K_CMD_TIMEOUT_MS);
  1292. rc = -ETIMEDOUT;
  1293. } else {
  1294. int ms;
  1295. ms = MWL8K_CMD_TIMEOUT_MS - jiffies_to_msecs(timeout);
  1296. rc = cmd->result ? -EINVAL : 0;
  1297. if (rc)
  1298. printk(KERN_ERR "%s: Command %s error 0x%x\n",
  1299. wiphy_name(hw->wiphy),
  1300. mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
  1301. le16_to_cpu(cmd->result));
  1302. else if (ms > 2000)
  1303. printk(KERN_NOTICE "%s: Command %s took %d ms\n",
  1304. wiphy_name(hw->wiphy),
  1305. mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
  1306. ms);
  1307. }
  1308. return rc;
  1309. }
  1310. static int mwl8k_post_pervif_cmd(struct ieee80211_hw *hw,
  1311. struct ieee80211_vif *vif,
  1312. struct mwl8k_cmd_pkt *cmd)
  1313. {
  1314. if (vif != NULL)
  1315. cmd->macid = MWL8K_VIF(vif)->macid;
  1316. return mwl8k_post_cmd(hw, cmd);
  1317. }
  1318. /*
  1319. * Setup code shared between STA and AP firmware images.
  1320. */
  1321. static void mwl8k_setup_2ghz_band(struct ieee80211_hw *hw)
  1322. {
  1323. struct mwl8k_priv *priv = hw->priv;
  1324. BUILD_BUG_ON(sizeof(priv->channels_24) != sizeof(mwl8k_channels_24));
  1325. memcpy(priv->channels_24, mwl8k_channels_24, sizeof(mwl8k_channels_24));
  1326. BUILD_BUG_ON(sizeof(priv->rates_24) != sizeof(mwl8k_rates_24));
  1327. memcpy(priv->rates_24, mwl8k_rates_24, sizeof(mwl8k_rates_24));
  1328. priv->band_24.band = IEEE80211_BAND_2GHZ;
  1329. priv->band_24.channels = priv->channels_24;
  1330. priv->band_24.n_channels = ARRAY_SIZE(mwl8k_channels_24);
  1331. priv->band_24.bitrates = priv->rates_24;
  1332. priv->band_24.n_bitrates = ARRAY_SIZE(mwl8k_rates_24);
  1333. hw->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->band_24;
  1334. }
  1335. static void mwl8k_setup_5ghz_band(struct ieee80211_hw *hw)
  1336. {
  1337. struct mwl8k_priv *priv = hw->priv;
  1338. BUILD_BUG_ON(sizeof(priv->channels_50) != sizeof(mwl8k_channels_50));
  1339. memcpy(priv->channels_50, mwl8k_channels_50, sizeof(mwl8k_channels_50));
  1340. BUILD_BUG_ON(sizeof(priv->rates_50) != sizeof(mwl8k_rates_50));
  1341. memcpy(priv->rates_50, mwl8k_rates_50, sizeof(mwl8k_rates_50));
  1342. priv->band_50.band = IEEE80211_BAND_5GHZ;
  1343. priv->band_50.channels = priv->channels_50;
  1344. priv->band_50.n_channels = ARRAY_SIZE(mwl8k_channels_50);
  1345. priv->band_50.bitrates = priv->rates_50;
  1346. priv->band_50.n_bitrates = ARRAY_SIZE(mwl8k_rates_50);
  1347. hw->wiphy->bands[IEEE80211_BAND_5GHZ] = &priv->band_50;
  1348. }
  1349. /*
  1350. * CMD_GET_HW_SPEC (STA version).
  1351. */
  1352. struct mwl8k_cmd_get_hw_spec_sta {
  1353. struct mwl8k_cmd_pkt header;
  1354. __u8 hw_rev;
  1355. __u8 host_interface;
  1356. __le16 num_mcaddrs;
  1357. __u8 perm_addr[ETH_ALEN];
  1358. __le16 region_code;
  1359. __le32 fw_rev;
  1360. __le32 ps_cookie;
  1361. __le32 caps;
  1362. __u8 mcs_bitmap[16];
  1363. __le32 rx_queue_ptr;
  1364. __le32 num_tx_queues;
  1365. __le32 tx_queue_ptrs[MWL8K_TX_QUEUES];
  1366. __le32 caps2;
  1367. __le32 num_tx_desc_per_queue;
  1368. __le32 total_rxd;
  1369. } __attribute__((packed));
  1370. #define MWL8K_CAP_MAX_AMSDU 0x20000000
  1371. #define MWL8K_CAP_GREENFIELD 0x08000000
  1372. #define MWL8K_CAP_AMPDU 0x04000000
  1373. #define MWL8K_CAP_RX_STBC 0x01000000
  1374. #define MWL8K_CAP_TX_STBC 0x00800000
  1375. #define MWL8K_CAP_SHORTGI_40MHZ 0x00400000
  1376. #define MWL8K_CAP_SHORTGI_20MHZ 0x00200000
  1377. #define MWL8K_CAP_RX_ANTENNA_MASK 0x000e0000
  1378. #define MWL8K_CAP_TX_ANTENNA_MASK 0x0001c000
  1379. #define MWL8K_CAP_DELAY_BA 0x00003000
  1380. #define MWL8K_CAP_MIMO 0x00000200
  1381. #define MWL8K_CAP_40MHZ 0x00000100
  1382. #define MWL8K_CAP_BAND_MASK 0x00000007
  1383. #define MWL8K_CAP_5GHZ 0x00000004
  1384. #define MWL8K_CAP_2GHZ4 0x00000001
  1385. static void
  1386. mwl8k_set_ht_caps(struct ieee80211_hw *hw,
  1387. struct ieee80211_supported_band *band, u32 cap)
  1388. {
  1389. int rx_streams;
  1390. int tx_streams;
  1391. band->ht_cap.ht_supported = 1;
  1392. if (cap & MWL8K_CAP_MAX_AMSDU)
  1393. band->ht_cap.cap |= IEEE80211_HT_CAP_MAX_AMSDU;
  1394. if (cap & MWL8K_CAP_GREENFIELD)
  1395. band->ht_cap.cap |= IEEE80211_HT_CAP_GRN_FLD;
  1396. if (cap & MWL8K_CAP_AMPDU) {
  1397. hw->flags |= IEEE80211_HW_AMPDU_AGGREGATION;
  1398. band->ht_cap.ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K;
  1399. band->ht_cap.ampdu_density = IEEE80211_HT_MPDU_DENSITY_NONE;
  1400. }
  1401. if (cap & MWL8K_CAP_RX_STBC)
  1402. band->ht_cap.cap |= IEEE80211_HT_CAP_RX_STBC;
  1403. if (cap & MWL8K_CAP_TX_STBC)
  1404. band->ht_cap.cap |= IEEE80211_HT_CAP_TX_STBC;
  1405. if (cap & MWL8K_CAP_SHORTGI_40MHZ)
  1406. band->ht_cap.cap |= IEEE80211_HT_CAP_SGI_40;
  1407. if (cap & MWL8K_CAP_SHORTGI_20MHZ)
  1408. band->ht_cap.cap |= IEEE80211_HT_CAP_SGI_20;
  1409. if (cap & MWL8K_CAP_DELAY_BA)
  1410. band->ht_cap.cap |= IEEE80211_HT_CAP_DELAY_BA;
  1411. if (cap & MWL8K_CAP_40MHZ)
  1412. band->ht_cap.cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40;
  1413. rx_streams = hweight32(cap & MWL8K_CAP_RX_ANTENNA_MASK);
  1414. tx_streams = hweight32(cap & MWL8K_CAP_TX_ANTENNA_MASK);
  1415. band->ht_cap.mcs.rx_mask[0] = 0xff;
  1416. if (rx_streams >= 2)
  1417. band->ht_cap.mcs.rx_mask[1] = 0xff;
  1418. if (rx_streams >= 3)
  1419. band->ht_cap.mcs.rx_mask[2] = 0xff;
  1420. band->ht_cap.mcs.rx_mask[4] = 0x01;
  1421. band->ht_cap.mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
  1422. if (rx_streams != tx_streams) {
  1423. band->ht_cap.mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF;
  1424. band->ht_cap.mcs.tx_params |= (tx_streams - 1) <<
  1425. IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT;
  1426. }
  1427. }
  1428. static void
  1429. mwl8k_set_caps(struct ieee80211_hw *hw, u32 caps)
  1430. {
  1431. struct mwl8k_priv *priv = hw->priv;
  1432. if ((caps & MWL8K_CAP_2GHZ4) || !(caps & MWL8K_CAP_BAND_MASK)) {
  1433. mwl8k_setup_2ghz_band(hw);
  1434. if (caps & MWL8K_CAP_MIMO)
  1435. mwl8k_set_ht_caps(hw, &priv->band_24, caps);
  1436. }
  1437. if (caps & MWL8K_CAP_5GHZ) {
  1438. mwl8k_setup_5ghz_band(hw);
  1439. if (caps & MWL8K_CAP_MIMO)
  1440. mwl8k_set_ht_caps(hw, &priv->band_50, caps);
  1441. }
  1442. }
  1443. static int mwl8k_cmd_get_hw_spec_sta(struct ieee80211_hw *hw)
  1444. {
  1445. struct mwl8k_priv *priv = hw->priv;
  1446. struct mwl8k_cmd_get_hw_spec_sta *cmd;
  1447. int rc;
  1448. int i;
  1449. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1450. if (cmd == NULL)
  1451. return -ENOMEM;
  1452. cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_HW_SPEC);
  1453. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1454. memset(cmd->perm_addr, 0xff, sizeof(cmd->perm_addr));
  1455. cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
  1456. cmd->rx_queue_ptr = cpu_to_le32(priv->rxq[0].rxd_dma);
  1457. cmd->num_tx_queues = cpu_to_le32(MWL8K_TX_QUEUES);
  1458. for (i = 0; i < MWL8K_TX_QUEUES; i++)
  1459. cmd->tx_queue_ptrs[i] = cpu_to_le32(priv->txq[i].txd_dma);
  1460. cmd->num_tx_desc_per_queue = cpu_to_le32(MWL8K_TX_DESCS);
  1461. cmd->total_rxd = cpu_to_le32(MWL8K_RX_DESCS);
  1462. rc = mwl8k_post_cmd(hw, &cmd->header);
  1463. if (!rc) {
  1464. SET_IEEE80211_PERM_ADDR(hw, cmd->perm_addr);
  1465. priv->num_mcaddrs = le16_to_cpu(cmd->num_mcaddrs);
  1466. priv->fw_rev = le32_to_cpu(cmd->fw_rev);
  1467. priv->hw_rev = cmd->hw_rev;
  1468. mwl8k_set_caps(hw, le32_to_cpu(cmd->caps));
  1469. priv->ap_macids_supported = 0x00000000;
  1470. priv->sta_macids_supported = 0x00000001;
  1471. }
  1472. kfree(cmd);
  1473. return rc;
  1474. }
  1475. /*
  1476. * CMD_GET_HW_SPEC (AP version).
  1477. */
  1478. struct mwl8k_cmd_get_hw_spec_ap {
  1479. struct mwl8k_cmd_pkt header;
  1480. __u8 hw_rev;
  1481. __u8 host_interface;
  1482. __le16 num_wcb;
  1483. __le16 num_mcaddrs;
  1484. __u8 perm_addr[ETH_ALEN];
  1485. __le16 region_code;
  1486. __le16 num_antenna;
  1487. __le32 fw_rev;
  1488. __le32 wcbbase0;
  1489. __le32 rxwrptr;
  1490. __le32 rxrdptr;
  1491. __le32 ps_cookie;
  1492. __le32 wcbbase1;
  1493. __le32 wcbbase2;
  1494. __le32 wcbbase3;
  1495. } __attribute__((packed));
  1496. static int mwl8k_cmd_get_hw_spec_ap(struct ieee80211_hw *hw)
  1497. {
  1498. struct mwl8k_priv *priv = hw->priv;
  1499. struct mwl8k_cmd_get_hw_spec_ap *cmd;
  1500. int rc;
  1501. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1502. if (cmd == NULL)
  1503. return -ENOMEM;
  1504. cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_HW_SPEC);
  1505. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1506. memset(cmd->perm_addr, 0xff, sizeof(cmd->perm_addr));
  1507. cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
  1508. rc = mwl8k_post_cmd(hw, &cmd->header);
  1509. if (!rc) {
  1510. int off;
  1511. SET_IEEE80211_PERM_ADDR(hw, cmd->perm_addr);
  1512. priv->num_mcaddrs = le16_to_cpu(cmd->num_mcaddrs);
  1513. priv->fw_rev = le32_to_cpu(cmd->fw_rev);
  1514. priv->hw_rev = cmd->hw_rev;
  1515. mwl8k_setup_2ghz_band(hw);
  1516. priv->ap_macids_supported = 0x000000ff;
  1517. priv->sta_macids_supported = 0x00000000;
  1518. off = le32_to_cpu(cmd->wcbbase0) & 0xffff;
  1519. iowrite32(priv->txq[0].txd_dma, priv->sram + off);
  1520. off = le32_to_cpu(cmd->rxwrptr) & 0xffff;
  1521. iowrite32(priv->rxq[0].rxd_dma, priv->sram + off);
  1522. off = le32_to_cpu(cmd->rxrdptr) & 0xffff;
  1523. iowrite32(priv->rxq[0].rxd_dma, priv->sram + off);
  1524. off = le32_to_cpu(cmd->wcbbase1) & 0xffff;
  1525. iowrite32(priv->txq[1].txd_dma, priv->sram + off);
  1526. off = le32_to_cpu(cmd->wcbbase2) & 0xffff;
  1527. iowrite32(priv->txq[2].txd_dma, priv->sram + off);
  1528. off = le32_to_cpu(cmd->wcbbase3) & 0xffff;
  1529. iowrite32(priv->txq[3].txd_dma, priv->sram + off);
  1530. }
  1531. kfree(cmd);
  1532. return rc;
  1533. }
  1534. /*
  1535. * CMD_SET_HW_SPEC.
  1536. */
  1537. struct mwl8k_cmd_set_hw_spec {
  1538. struct mwl8k_cmd_pkt header;
  1539. __u8 hw_rev;
  1540. __u8 host_interface;
  1541. __le16 num_mcaddrs;
  1542. __u8 perm_addr[ETH_ALEN];
  1543. __le16 region_code;
  1544. __le32 fw_rev;
  1545. __le32 ps_cookie;
  1546. __le32 caps;
  1547. __le32 rx_queue_ptr;
  1548. __le32 num_tx_queues;
  1549. __le32 tx_queue_ptrs[MWL8K_TX_QUEUES];
  1550. __le32 flags;
  1551. __le32 num_tx_desc_per_queue;
  1552. __le32 total_rxd;
  1553. } __attribute__((packed));
  1554. #define MWL8K_SET_HW_SPEC_FLAG_HOST_DECR_MGMT 0x00000080
  1555. #define MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_PROBERESP 0x00000020
  1556. #define MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_BEACON 0x00000010
  1557. static int mwl8k_cmd_set_hw_spec(struct ieee80211_hw *hw)
  1558. {
  1559. struct mwl8k_priv *priv = hw->priv;
  1560. struct mwl8k_cmd_set_hw_spec *cmd;
  1561. int rc;
  1562. int i;
  1563. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1564. if (cmd == NULL)
  1565. return -ENOMEM;
  1566. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_HW_SPEC);
  1567. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1568. cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
  1569. cmd->rx_queue_ptr = cpu_to_le32(priv->rxq[0].rxd_dma);
  1570. cmd->num_tx_queues = cpu_to_le32(MWL8K_TX_QUEUES);
  1571. for (i = 0; i < MWL8K_TX_QUEUES; i++)
  1572. cmd->tx_queue_ptrs[i] = cpu_to_le32(priv->txq[i].txd_dma);
  1573. cmd->flags = cpu_to_le32(MWL8K_SET_HW_SPEC_FLAG_HOST_DECR_MGMT |
  1574. MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_PROBERESP |
  1575. MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_BEACON);
  1576. cmd->num_tx_desc_per_queue = cpu_to_le32(MWL8K_TX_DESCS);
  1577. cmd->total_rxd = cpu_to_le32(MWL8K_RX_DESCS);
  1578. rc = mwl8k_post_cmd(hw, &cmd->header);
  1579. kfree(cmd);
  1580. return rc;
  1581. }
  1582. /*
  1583. * CMD_MAC_MULTICAST_ADR.
  1584. */
  1585. struct mwl8k_cmd_mac_multicast_adr {
  1586. struct mwl8k_cmd_pkt header;
  1587. __le16 action;
  1588. __le16 numaddr;
  1589. __u8 addr[0][ETH_ALEN];
  1590. };
  1591. #define MWL8K_ENABLE_RX_DIRECTED 0x0001
  1592. #define MWL8K_ENABLE_RX_MULTICAST 0x0002
  1593. #define MWL8K_ENABLE_RX_ALL_MULTICAST 0x0004
  1594. #define MWL8K_ENABLE_RX_BROADCAST 0x0008
  1595. static struct mwl8k_cmd_pkt *
  1596. __mwl8k_cmd_mac_multicast_adr(struct ieee80211_hw *hw, int allmulti,
  1597. struct netdev_hw_addr_list *mc_list)
  1598. {
  1599. struct mwl8k_priv *priv = hw->priv;
  1600. struct mwl8k_cmd_mac_multicast_adr *cmd;
  1601. int size;
  1602. int mc_count = 0;
  1603. if (mc_list)
  1604. mc_count = netdev_hw_addr_list_count(mc_list);
  1605. if (allmulti || mc_count > priv->num_mcaddrs) {
  1606. allmulti = 1;
  1607. mc_count = 0;
  1608. }
  1609. size = sizeof(*cmd) + mc_count * ETH_ALEN;
  1610. cmd = kzalloc(size, GFP_ATOMIC);
  1611. if (cmd == NULL)
  1612. return NULL;
  1613. cmd->header.code = cpu_to_le16(MWL8K_CMD_MAC_MULTICAST_ADR);
  1614. cmd->header.length = cpu_to_le16(size);
  1615. cmd->action = cpu_to_le16(MWL8K_ENABLE_RX_DIRECTED |
  1616. MWL8K_ENABLE_RX_BROADCAST);
  1617. if (allmulti) {
  1618. cmd->action |= cpu_to_le16(MWL8K_ENABLE_RX_ALL_MULTICAST);
  1619. } else if (mc_count) {
  1620. struct netdev_hw_addr *ha;
  1621. int i = 0;
  1622. cmd->action |= cpu_to_le16(MWL8K_ENABLE_RX_MULTICAST);
  1623. cmd->numaddr = cpu_to_le16(mc_count);
  1624. netdev_hw_addr_list_for_each(ha, mc_list) {
  1625. memcpy(cmd->addr[i], ha->addr, ETH_ALEN);
  1626. }
  1627. }
  1628. return &cmd->header;
  1629. }
  1630. /*
  1631. * CMD_GET_STAT.
  1632. */
  1633. struct mwl8k_cmd_get_stat {
  1634. struct mwl8k_cmd_pkt header;
  1635. __le32 stats[64];
  1636. } __attribute__((packed));
  1637. #define MWL8K_STAT_ACK_FAILURE 9
  1638. #define MWL8K_STAT_RTS_FAILURE 12
  1639. #define MWL8K_STAT_FCS_ERROR 24
  1640. #define MWL8K_STAT_RTS_SUCCESS 11
  1641. static int mwl8k_cmd_get_stat(struct ieee80211_hw *hw,
  1642. struct ieee80211_low_level_stats *stats)
  1643. {
  1644. struct mwl8k_cmd_get_stat *cmd;
  1645. int rc;
  1646. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1647. if (cmd == NULL)
  1648. return -ENOMEM;
  1649. cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_STAT);
  1650. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1651. rc = mwl8k_post_cmd(hw, &cmd->header);
  1652. if (!rc) {
  1653. stats->dot11ACKFailureCount =
  1654. le32_to_cpu(cmd->stats[MWL8K_STAT_ACK_FAILURE]);
  1655. stats->dot11RTSFailureCount =
  1656. le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_FAILURE]);
  1657. stats->dot11FCSErrorCount =
  1658. le32_to_cpu(cmd->stats[MWL8K_STAT_FCS_ERROR]);
  1659. stats->dot11RTSSuccessCount =
  1660. le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_SUCCESS]);
  1661. }
  1662. kfree(cmd);
  1663. return rc;
  1664. }
  1665. /*
  1666. * CMD_RADIO_CONTROL.
  1667. */
  1668. struct mwl8k_cmd_radio_control {
  1669. struct mwl8k_cmd_pkt header;
  1670. __le16 action;
  1671. __le16 control;
  1672. __le16 radio_on;
  1673. } __attribute__((packed));
  1674. static int
  1675. mwl8k_cmd_radio_control(struct ieee80211_hw *hw, bool enable, bool force)
  1676. {
  1677. struct mwl8k_priv *priv = hw->priv;
  1678. struct mwl8k_cmd_radio_control *cmd;
  1679. int rc;
  1680. if (enable == priv->radio_on && !force)
  1681. return 0;
  1682. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1683. if (cmd == NULL)
  1684. return -ENOMEM;
  1685. cmd->header.code = cpu_to_le16(MWL8K_CMD_RADIO_CONTROL);
  1686. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1687. cmd->action = cpu_to_le16(MWL8K_CMD_SET);
  1688. cmd->control = cpu_to_le16(priv->radio_short_preamble ? 3 : 1);
  1689. cmd->radio_on = cpu_to_le16(enable ? 0x0001 : 0x0000);
  1690. rc = mwl8k_post_cmd(hw, &cmd->header);
  1691. kfree(cmd);
  1692. if (!rc)
  1693. priv->radio_on = enable;
  1694. return rc;
  1695. }
  1696. static int mwl8k_cmd_radio_disable(struct ieee80211_hw *hw)
  1697. {
  1698. return mwl8k_cmd_radio_control(hw, 0, 0);
  1699. }
  1700. static int mwl8k_cmd_radio_enable(struct ieee80211_hw *hw)
  1701. {
  1702. return mwl8k_cmd_radio_control(hw, 1, 0);
  1703. }
  1704. static int
  1705. mwl8k_set_radio_preamble(struct ieee80211_hw *hw, bool short_preamble)
  1706. {
  1707. struct mwl8k_priv *priv = hw->priv;
  1708. priv->radio_short_preamble = short_preamble;
  1709. return mwl8k_cmd_radio_control(hw, 1, 1);
  1710. }
  1711. /*
  1712. * CMD_RF_TX_POWER.
  1713. */
  1714. #define MWL8K_TX_POWER_LEVEL_TOTAL 8
  1715. struct mwl8k_cmd_rf_tx_power {
  1716. struct mwl8k_cmd_pkt header;
  1717. __le16 action;
  1718. __le16 support_level;
  1719. __le16 current_level;
  1720. __le16 reserved;
  1721. __le16 power_level_list[MWL8K_TX_POWER_LEVEL_TOTAL];
  1722. } __attribute__((packed));
  1723. static int mwl8k_cmd_rf_tx_power(struct ieee80211_hw *hw, int dBm)
  1724. {
  1725. struct mwl8k_cmd_rf_tx_power *cmd;
  1726. int rc;
  1727. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1728. if (cmd == NULL)
  1729. return -ENOMEM;
  1730. cmd->header.code = cpu_to_le16(MWL8K_CMD_RF_TX_POWER);
  1731. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1732. cmd->action = cpu_to_le16(MWL8K_CMD_SET);
  1733. cmd->support_level = cpu_to_le16(dBm);
  1734. rc = mwl8k_post_cmd(hw, &cmd->header);
  1735. kfree(cmd);
  1736. return rc;
  1737. }
  1738. /*
  1739. * CMD_RF_ANTENNA.
  1740. */
  1741. struct mwl8k_cmd_rf_antenna {
  1742. struct mwl8k_cmd_pkt header;
  1743. __le16 antenna;
  1744. __le16 mode;
  1745. } __attribute__((packed));
  1746. #define MWL8K_RF_ANTENNA_RX 1
  1747. #define MWL8K_RF_ANTENNA_TX 2
  1748. static int
  1749. mwl8k_cmd_rf_antenna(struct ieee80211_hw *hw, int antenna, int mask)
  1750. {
  1751. struct mwl8k_cmd_rf_antenna *cmd;
  1752. int rc;
  1753. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1754. if (cmd == NULL)
  1755. return -ENOMEM;
  1756. cmd->header.code = cpu_to_le16(MWL8K_CMD_RF_ANTENNA);
  1757. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1758. cmd->antenna = cpu_to_le16(antenna);
  1759. cmd->mode = cpu_to_le16(mask);
  1760. rc = mwl8k_post_cmd(hw, &cmd->header);
  1761. kfree(cmd);
  1762. return rc;
  1763. }
  1764. /*
  1765. * CMD_SET_BEACON.
  1766. */
  1767. struct mwl8k_cmd_set_beacon {
  1768. struct mwl8k_cmd_pkt header;
  1769. __le16 beacon_len;
  1770. __u8 beacon[0];
  1771. };
  1772. static int mwl8k_cmd_set_beacon(struct ieee80211_hw *hw,
  1773. struct ieee80211_vif *vif, u8 *beacon, int len)
  1774. {
  1775. struct mwl8k_cmd_set_beacon *cmd;
  1776. int rc;
  1777. cmd = kzalloc(sizeof(*cmd) + len, GFP_KERNEL);
  1778. if (cmd == NULL)
  1779. return -ENOMEM;
  1780. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_BEACON);
  1781. cmd->header.length = cpu_to_le16(sizeof(*cmd) + len);
  1782. cmd->beacon_len = cpu_to_le16(len);
  1783. memcpy(cmd->beacon, beacon, len);
  1784. rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
  1785. kfree(cmd);
  1786. return rc;
  1787. }
  1788. /*
  1789. * CMD_SET_PRE_SCAN.
  1790. */
  1791. struct mwl8k_cmd_set_pre_scan {
  1792. struct mwl8k_cmd_pkt header;
  1793. } __attribute__((packed));
  1794. static int mwl8k_cmd_set_pre_scan(struct ieee80211_hw *hw)
  1795. {
  1796. struct mwl8k_cmd_set_pre_scan *cmd;
  1797. int rc;
  1798. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1799. if (cmd == NULL)
  1800. return -ENOMEM;
  1801. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_PRE_SCAN);
  1802. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1803. rc = mwl8k_post_cmd(hw, &cmd->header);
  1804. kfree(cmd);
  1805. return rc;
  1806. }
  1807. /*
  1808. * CMD_SET_POST_SCAN.
  1809. */
  1810. struct mwl8k_cmd_set_post_scan {
  1811. struct mwl8k_cmd_pkt header;
  1812. __le32 isibss;
  1813. __u8 bssid[ETH_ALEN];
  1814. } __attribute__((packed));
  1815. static int
  1816. mwl8k_cmd_set_post_scan(struct ieee80211_hw *hw, const __u8 *mac)
  1817. {
  1818. struct mwl8k_cmd_set_post_scan *cmd;
  1819. int rc;
  1820. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1821. if (cmd == NULL)
  1822. return -ENOMEM;
  1823. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_POST_SCAN);
  1824. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1825. cmd->isibss = 0;
  1826. memcpy(cmd->bssid, mac, ETH_ALEN);
  1827. rc = mwl8k_post_cmd(hw, &cmd->header);
  1828. kfree(cmd);
  1829. return rc;
  1830. }
  1831. /*
  1832. * CMD_SET_RF_CHANNEL.
  1833. */
  1834. struct mwl8k_cmd_set_rf_channel {
  1835. struct mwl8k_cmd_pkt header;
  1836. __le16 action;
  1837. __u8 current_channel;
  1838. __le32 channel_flags;
  1839. } __attribute__((packed));
  1840. static int mwl8k_cmd_set_rf_channel(struct ieee80211_hw *hw,
  1841. struct ieee80211_conf *conf)
  1842. {
  1843. struct ieee80211_channel *channel = conf->channel;
  1844. struct mwl8k_cmd_set_rf_channel *cmd;
  1845. int rc;
  1846. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1847. if (cmd == NULL)
  1848. return -ENOMEM;
  1849. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RF_CHANNEL);
  1850. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1851. cmd->action = cpu_to_le16(MWL8K_CMD_SET);
  1852. cmd->current_channel = channel->hw_value;
  1853. if (channel->band == IEEE80211_BAND_2GHZ)
  1854. cmd->channel_flags |= cpu_to_le32(0x00000001);
  1855. else if (channel->band == IEEE80211_BAND_5GHZ)
  1856. cmd->channel_flags |= cpu_to_le32(0x00000004);
  1857. if (conf->channel_type == NL80211_CHAN_NO_HT ||
  1858. conf->channel_type == NL80211_CHAN_HT20)
  1859. cmd->channel_flags |= cpu_to_le32(0x00000080);
  1860. else if (conf->channel_type == NL80211_CHAN_HT40MINUS)
  1861. cmd->channel_flags |= cpu_to_le32(0x000001900);
  1862. else if (conf->channel_type == NL80211_CHAN_HT40PLUS)
  1863. cmd->channel_flags |= cpu_to_le32(0x000000900);
  1864. rc = mwl8k_post_cmd(hw, &cmd->header);
  1865. kfree(cmd);
  1866. return rc;
  1867. }
  1868. /*
  1869. * CMD_SET_AID.
  1870. */
  1871. #define MWL8K_FRAME_PROT_DISABLED 0x00
  1872. #define MWL8K_FRAME_PROT_11G 0x07
  1873. #define MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY 0x02
  1874. #define MWL8K_FRAME_PROT_11N_HT_ALL 0x06
  1875. struct mwl8k_cmd_update_set_aid {
  1876. struct mwl8k_cmd_pkt header;
  1877. __le16 aid;
  1878. /* AP's MAC address (BSSID) */
  1879. __u8 bssid[ETH_ALEN];
  1880. __le16 protection_mode;
  1881. __u8 supp_rates[14];
  1882. } __attribute__((packed));
  1883. static void legacy_rate_mask_to_array(u8 *rates, u32 mask)
  1884. {
  1885. int i;
  1886. int j;
  1887. /*
  1888. * Clear nonstandard rates 4 and 13.
  1889. */
  1890. mask &= 0x1fef;
  1891. for (i = 0, j = 0; i < 14; i++) {
  1892. if (mask & (1 << i))
  1893. rates[j++] = mwl8k_rates_24[i].hw_value;
  1894. }
  1895. }
  1896. static int
  1897. mwl8k_cmd_set_aid(struct ieee80211_hw *hw,
  1898. struct ieee80211_vif *vif, u32 legacy_rate_mask)
  1899. {
  1900. struct mwl8k_cmd_update_set_aid *cmd;
  1901. u16 prot_mode;
  1902. int rc;
  1903. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1904. if (cmd == NULL)
  1905. return -ENOMEM;
  1906. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_AID);
  1907. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1908. cmd->aid = cpu_to_le16(vif->bss_conf.aid);
  1909. memcpy(cmd->bssid, vif->bss_conf.bssid, ETH_ALEN);
  1910. if (vif->bss_conf.use_cts_prot) {
  1911. prot_mode = MWL8K_FRAME_PROT_11G;
  1912. } else {
  1913. switch (vif->bss_conf.ht_operation_mode &
  1914. IEEE80211_HT_OP_MODE_PROTECTION) {
  1915. case IEEE80211_HT_OP_MODE_PROTECTION_20MHZ:
  1916. prot_mode = MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY;
  1917. break;
  1918. case IEEE80211_HT_OP_MODE_PROTECTION_NONHT_MIXED:
  1919. prot_mode = MWL8K_FRAME_PROT_11N_HT_ALL;
  1920. break;
  1921. default:
  1922. prot_mode = MWL8K_FRAME_PROT_DISABLED;
  1923. break;
  1924. }
  1925. }
  1926. cmd->protection_mode = cpu_to_le16(prot_mode);
  1927. legacy_rate_mask_to_array(cmd->supp_rates, legacy_rate_mask);
  1928. rc = mwl8k_post_cmd(hw, &cmd->header);
  1929. kfree(cmd);
  1930. return rc;
  1931. }
  1932. /*
  1933. * CMD_SET_RATE.
  1934. */
  1935. struct mwl8k_cmd_set_rate {
  1936. struct mwl8k_cmd_pkt header;
  1937. __u8 legacy_rates[14];
  1938. /* Bitmap for supported MCS codes. */
  1939. __u8 mcs_set[16];
  1940. __u8 reserved[16];
  1941. } __attribute__((packed));
  1942. static int
  1943. mwl8k_cmd_set_rate(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
  1944. u32 legacy_rate_mask, u8 *mcs_rates)
  1945. {
  1946. struct mwl8k_cmd_set_rate *cmd;
  1947. int rc;
  1948. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1949. if (cmd == NULL)
  1950. return -ENOMEM;
  1951. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATE);
  1952. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1953. legacy_rate_mask_to_array(cmd->legacy_rates, legacy_rate_mask);
  1954. memcpy(cmd->mcs_set, mcs_rates, 16);
  1955. rc = mwl8k_post_cmd(hw, &cmd->header);
  1956. kfree(cmd);
  1957. return rc;
  1958. }
  1959. /*
  1960. * CMD_FINALIZE_JOIN.
  1961. */
  1962. #define MWL8K_FJ_BEACON_MAXLEN 128
  1963. struct mwl8k_cmd_finalize_join {
  1964. struct mwl8k_cmd_pkt header;
  1965. __le32 sleep_interval; /* Number of beacon periods to sleep */
  1966. __u8 beacon_data[MWL8K_FJ_BEACON_MAXLEN];
  1967. } __attribute__((packed));
  1968. static int mwl8k_cmd_finalize_join(struct ieee80211_hw *hw, void *frame,
  1969. int framelen, int dtim)
  1970. {
  1971. struct mwl8k_cmd_finalize_join *cmd;
  1972. struct ieee80211_mgmt *payload = frame;
  1973. int payload_len;
  1974. int rc;
  1975. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1976. if (cmd == NULL)
  1977. return -ENOMEM;
  1978. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_FINALIZE_JOIN);
  1979. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1980. cmd->sleep_interval = cpu_to_le32(dtim ? dtim : 1);
  1981. payload_len = framelen - ieee80211_hdrlen(payload->frame_control);
  1982. if (payload_len < 0)
  1983. payload_len = 0;
  1984. else if (payload_len > MWL8K_FJ_BEACON_MAXLEN)
  1985. payload_len = MWL8K_FJ_BEACON_MAXLEN;
  1986. memcpy(cmd->beacon_data, &payload->u.beacon, payload_len);
  1987. rc = mwl8k_post_cmd(hw, &cmd->header);
  1988. kfree(cmd);
  1989. return rc;
  1990. }
  1991. /*
  1992. * CMD_SET_RTS_THRESHOLD.
  1993. */
  1994. struct mwl8k_cmd_set_rts_threshold {
  1995. struct mwl8k_cmd_pkt header;
  1996. __le16 action;
  1997. __le16 threshold;
  1998. } __attribute__((packed));
  1999. static int
  2000. mwl8k_cmd_set_rts_threshold(struct ieee80211_hw *hw, int rts_thresh)
  2001. {
  2002. struct mwl8k_cmd_set_rts_threshold *cmd;
  2003. int rc;
  2004. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2005. if (cmd == NULL)
  2006. return -ENOMEM;
  2007. cmd->header.code = cpu_to_le16(MWL8K_CMD_RTS_THRESHOLD);
  2008. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2009. cmd->action = cpu_to_le16(MWL8K_CMD_SET);
  2010. cmd->threshold = cpu_to_le16(rts_thresh);
  2011. rc = mwl8k_post_cmd(hw, &cmd->header);
  2012. kfree(cmd);
  2013. return rc;
  2014. }
  2015. /*
  2016. * CMD_SET_SLOT.
  2017. */
  2018. struct mwl8k_cmd_set_slot {
  2019. struct mwl8k_cmd_pkt header;
  2020. __le16 action;
  2021. __u8 short_slot;
  2022. } __attribute__((packed));
  2023. static int mwl8k_cmd_set_slot(struct ieee80211_hw *hw, bool short_slot_time)
  2024. {
  2025. struct mwl8k_cmd_set_slot *cmd;
  2026. int rc;
  2027. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2028. if (cmd == NULL)
  2029. return -ENOMEM;
  2030. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_SLOT);
  2031. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2032. cmd->action = cpu_to_le16(MWL8K_CMD_SET);
  2033. cmd->short_slot = short_slot_time;
  2034. rc = mwl8k_post_cmd(hw, &cmd->header);
  2035. kfree(cmd);
  2036. return rc;
  2037. }
  2038. /*
  2039. * CMD_SET_EDCA_PARAMS.
  2040. */
  2041. struct mwl8k_cmd_set_edca_params {
  2042. struct mwl8k_cmd_pkt header;
  2043. /* See MWL8K_SET_EDCA_XXX below */
  2044. __le16 action;
  2045. /* TX opportunity in units of 32 us */
  2046. __le16 txop;
  2047. union {
  2048. struct {
  2049. /* Log exponent of max contention period: 0...15 */
  2050. __le32 log_cw_max;
  2051. /* Log exponent of min contention period: 0...15 */
  2052. __le32 log_cw_min;
  2053. /* Adaptive interframe spacing in units of 32us */
  2054. __u8 aifs;
  2055. /* TX queue to configure */
  2056. __u8 txq;
  2057. } ap;
  2058. struct {
  2059. /* Log exponent of max contention period: 0...15 */
  2060. __u8 log_cw_max;
  2061. /* Log exponent of min contention period: 0...15 */
  2062. __u8 log_cw_min;
  2063. /* Adaptive interframe spacing in units of 32us */
  2064. __u8 aifs;
  2065. /* TX queue to configure */
  2066. __u8 txq;
  2067. } sta;
  2068. };
  2069. } __attribute__((packed));
  2070. #define MWL8K_SET_EDCA_CW 0x01
  2071. #define MWL8K_SET_EDCA_TXOP 0x02
  2072. #define MWL8K_SET_EDCA_AIFS 0x04
  2073. #define MWL8K_SET_EDCA_ALL (MWL8K_SET_EDCA_CW | \
  2074. MWL8K_SET_EDCA_TXOP | \
  2075. MWL8K_SET_EDCA_AIFS)
  2076. static int
  2077. mwl8k_cmd_set_edca_params(struct ieee80211_hw *hw, __u8 qnum,
  2078. __u16 cw_min, __u16 cw_max,
  2079. __u8 aifs, __u16 txop)
  2080. {
  2081. struct mwl8k_priv *priv = hw->priv;
  2082. struct mwl8k_cmd_set_edca_params *cmd;
  2083. int rc;
  2084. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2085. if (cmd == NULL)
  2086. return -ENOMEM;
  2087. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_EDCA_PARAMS);
  2088. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2089. cmd->action = cpu_to_le16(MWL8K_SET_EDCA_ALL);
  2090. cmd->txop = cpu_to_le16(txop);
  2091. if (priv->ap_fw) {
  2092. cmd->ap.log_cw_max = cpu_to_le32(ilog2(cw_max + 1));
  2093. cmd->ap.log_cw_min = cpu_to_le32(ilog2(cw_min + 1));
  2094. cmd->ap.aifs = aifs;
  2095. cmd->ap.txq = qnum;
  2096. } else {
  2097. cmd->sta.log_cw_max = (u8)ilog2(cw_max + 1);
  2098. cmd->sta.log_cw_min = (u8)ilog2(cw_min + 1);
  2099. cmd->sta.aifs = aifs;
  2100. cmd->sta.txq = qnum;
  2101. }
  2102. rc = mwl8k_post_cmd(hw, &cmd->header);
  2103. kfree(cmd);
  2104. return rc;
  2105. }
  2106. /*
  2107. * CMD_SET_WMM_MODE.
  2108. */
  2109. struct mwl8k_cmd_set_wmm_mode {
  2110. struct mwl8k_cmd_pkt header;
  2111. __le16 action;
  2112. } __attribute__((packed));
  2113. static int mwl8k_cmd_set_wmm_mode(struct ieee80211_hw *hw, bool enable)
  2114. {
  2115. struct mwl8k_priv *priv = hw->priv;
  2116. struct mwl8k_cmd_set_wmm_mode *cmd;
  2117. int rc;
  2118. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2119. if (cmd == NULL)
  2120. return -ENOMEM;
  2121. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_WMM_MODE);
  2122. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2123. cmd->action = cpu_to_le16(!!enable);
  2124. rc = mwl8k_post_cmd(hw, &cmd->header);
  2125. kfree(cmd);
  2126. if (!rc)
  2127. priv->wmm_enabled = enable;
  2128. return rc;
  2129. }
  2130. /*
  2131. * CMD_MIMO_CONFIG.
  2132. */
  2133. struct mwl8k_cmd_mimo_config {
  2134. struct mwl8k_cmd_pkt header;
  2135. __le32 action;
  2136. __u8 rx_antenna_map;
  2137. __u8 tx_antenna_map;
  2138. } __attribute__((packed));
  2139. static int mwl8k_cmd_mimo_config(struct ieee80211_hw *hw, __u8 rx, __u8 tx)
  2140. {
  2141. struct mwl8k_cmd_mimo_config *cmd;
  2142. int rc;
  2143. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2144. if (cmd == NULL)
  2145. return -ENOMEM;
  2146. cmd->header.code = cpu_to_le16(MWL8K_CMD_MIMO_CONFIG);
  2147. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2148. cmd->action = cpu_to_le32((u32)MWL8K_CMD_SET);
  2149. cmd->rx_antenna_map = rx;
  2150. cmd->tx_antenna_map = tx;
  2151. rc = mwl8k_post_cmd(hw, &cmd->header);
  2152. kfree(cmd);
  2153. return rc;
  2154. }
  2155. /*
  2156. * CMD_USE_FIXED_RATE (STA version).
  2157. */
  2158. struct mwl8k_cmd_use_fixed_rate_sta {
  2159. struct mwl8k_cmd_pkt header;
  2160. __le32 action;
  2161. __le32 allow_rate_drop;
  2162. __le32 num_rates;
  2163. struct {
  2164. __le32 is_ht_rate;
  2165. __le32 enable_retry;
  2166. __le32 rate;
  2167. __le32 retry_count;
  2168. } rate_entry[8];
  2169. __le32 rate_type;
  2170. __le32 reserved1;
  2171. __le32 reserved2;
  2172. } __attribute__((packed));
  2173. #define MWL8K_USE_AUTO_RATE 0x0002
  2174. #define MWL8K_UCAST_RATE 0
  2175. static int mwl8k_cmd_use_fixed_rate_sta(struct ieee80211_hw *hw)
  2176. {
  2177. struct mwl8k_cmd_use_fixed_rate_sta *cmd;
  2178. int rc;
  2179. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2180. if (cmd == NULL)
  2181. return -ENOMEM;
  2182. cmd->header.code = cpu_to_le16(MWL8K_CMD_USE_FIXED_RATE);
  2183. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2184. cmd->action = cpu_to_le32(MWL8K_USE_AUTO_RATE);
  2185. cmd->rate_type = cpu_to_le32(MWL8K_UCAST_RATE);
  2186. rc = mwl8k_post_cmd(hw, &cmd->header);
  2187. kfree(cmd);
  2188. return rc;
  2189. }
  2190. /*
  2191. * CMD_USE_FIXED_RATE (AP version).
  2192. */
  2193. struct mwl8k_cmd_use_fixed_rate_ap {
  2194. struct mwl8k_cmd_pkt header;
  2195. __le32 action;
  2196. __le32 allow_rate_drop;
  2197. __le32 num_rates;
  2198. struct mwl8k_rate_entry_ap {
  2199. __le32 is_ht_rate;
  2200. __le32 enable_retry;
  2201. __le32 rate;
  2202. __le32 retry_count;
  2203. } rate_entry[4];
  2204. u8 multicast_rate;
  2205. u8 multicast_rate_type;
  2206. u8 management_rate;
  2207. } __attribute__((packed));
  2208. static int
  2209. mwl8k_cmd_use_fixed_rate_ap(struct ieee80211_hw *hw, int mcast, int mgmt)
  2210. {
  2211. struct mwl8k_cmd_use_fixed_rate_ap *cmd;
  2212. int rc;
  2213. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2214. if (cmd == NULL)
  2215. return -ENOMEM;
  2216. cmd->header.code = cpu_to_le16(MWL8K_CMD_USE_FIXED_RATE);
  2217. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2218. cmd->action = cpu_to_le32(MWL8K_USE_AUTO_RATE);
  2219. cmd->multicast_rate = mcast;
  2220. cmd->management_rate = mgmt;
  2221. rc = mwl8k_post_cmd(hw, &cmd->header);
  2222. kfree(cmd);
  2223. return rc;
  2224. }
  2225. /*
  2226. * CMD_ENABLE_SNIFFER.
  2227. */
  2228. struct mwl8k_cmd_enable_sniffer {
  2229. struct mwl8k_cmd_pkt header;
  2230. __le32 action;
  2231. } __attribute__((packed));
  2232. static int mwl8k_cmd_enable_sniffer(struct ieee80211_hw *hw, bool enable)
  2233. {
  2234. struct mwl8k_cmd_enable_sniffer *cmd;
  2235. int rc;
  2236. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2237. if (cmd == NULL)
  2238. return -ENOMEM;
  2239. cmd->header.code = cpu_to_le16(MWL8K_CMD_ENABLE_SNIFFER);
  2240. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2241. cmd->action = cpu_to_le32(!!enable);
  2242. rc = mwl8k_post_cmd(hw, &cmd->header);
  2243. kfree(cmd);
  2244. return rc;
  2245. }
  2246. /*
  2247. * CMD_SET_MAC_ADDR.
  2248. */
  2249. struct mwl8k_cmd_set_mac_addr {
  2250. struct mwl8k_cmd_pkt header;
  2251. union {
  2252. struct {
  2253. __le16 mac_type;
  2254. __u8 mac_addr[ETH_ALEN];
  2255. } mbss;
  2256. __u8 mac_addr[ETH_ALEN];
  2257. };
  2258. } __attribute__((packed));
  2259. #define MWL8K_MAC_TYPE_PRIMARY_CLIENT 0
  2260. #define MWL8K_MAC_TYPE_SECONDARY_CLIENT 1
  2261. #define MWL8K_MAC_TYPE_PRIMARY_AP 2
  2262. #define MWL8K_MAC_TYPE_SECONDARY_AP 3
  2263. static int mwl8k_cmd_set_mac_addr(struct ieee80211_hw *hw,
  2264. struct ieee80211_vif *vif, u8 *mac)
  2265. {
  2266. struct mwl8k_priv *priv = hw->priv;
  2267. struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
  2268. struct mwl8k_cmd_set_mac_addr *cmd;
  2269. int mac_type;
  2270. int rc;
  2271. mac_type = MWL8K_MAC_TYPE_PRIMARY_AP;
  2272. if (vif != NULL && vif->type == NL80211_IFTYPE_STATION) {
  2273. if (mwl8k_vif->macid + 1 == ffs(priv->sta_macids_supported))
  2274. mac_type = MWL8K_MAC_TYPE_PRIMARY_CLIENT;
  2275. else
  2276. mac_type = MWL8K_MAC_TYPE_SECONDARY_CLIENT;
  2277. } else if (vif != NULL && vif->type == NL80211_IFTYPE_AP) {
  2278. if (mwl8k_vif->macid + 1 == ffs(priv->ap_macids_supported))
  2279. mac_type = MWL8K_MAC_TYPE_PRIMARY_AP;
  2280. else
  2281. mac_type = MWL8K_MAC_TYPE_SECONDARY_AP;
  2282. }
  2283. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2284. if (cmd == NULL)
  2285. return -ENOMEM;
  2286. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_MAC_ADDR);
  2287. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2288. if (priv->ap_fw) {
  2289. cmd->mbss.mac_type = cpu_to_le16(mac_type);
  2290. memcpy(cmd->mbss.mac_addr, mac, ETH_ALEN);
  2291. } else {
  2292. memcpy(cmd->mac_addr, mac, ETH_ALEN);
  2293. }
  2294. rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
  2295. kfree(cmd);
  2296. return rc;
  2297. }
  2298. /*
  2299. * CMD_SET_RATEADAPT_MODE.
  2300. */
  2301. struct mwl8k_cmd_set_rate_adapt_mode {
  2302. struct mwl8k_cmd_pkt header;
  2303. __le16 action;
  2304. __le16 mode;
  2305. } __attribute__((packed));
  2306. static int mwl8k_cmd_set_rateadapt_mode(struct ieee80211_hw *hw, __u16 mode)
  2307. {
  2308. struct mwl8k_cmd_set_rate_adapt_mode *cmd;
  2309. int rc;
  2310. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2311. if (cmd == NULL)
  2312. return -ENOMEM;
  2313. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATEADAPT_MODE);
  2314. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2315. cmd->action = cpu_to_le16(MWL8K_CMD_SET);
  2316. cmd->mode = cpu_to_le16(mode);
  2317. rc = mwl8k_post_cmd(hw, &cmd->header);
  2318. kfree(cmd);
  2319. return rc;
  2320. }
  2321. /*
  2322. * CMD_BSS_START.
  2323. */
  2324. struct mwl8k_cmd_bss_start {
  2325. struct mwl8k_cmd_pkt header;
  2326. __le32 enable;
  2327. } __attribute__((packed));
  2328. static int mwl8k_cmd_bss_start(struct ieee80211_hw *hw,
  2329. struct ieee80211_vif *vif, int enable)
  2330. {
  2331. struct mwl8k_cmd_bss_start *cmd;
  2332. int rc;
  2333. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2334. if (cmd == NULL)
  2335. return -ENOMEM;
  2336. cmd->header.code = cpu_to_le16(MWL8K_CMD_BSS_START);
  2337. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2338. cmd->enable = cpu_to_le32(enable);
  2339. rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
  2340. kfree(cmd);
  2341. return rc;
  2342. }
  2343. /*
  2344. * CMD_SET_NEW_STN.
  2345. */
  2346. struct mwl8k_cmd_set_new_stn {
  2347. struct mwl8k_cmd_pkt header;
  2348. __le16 aid;
  2349. __u8 mac_addr[6];
  2350. __le16 stn_id;
  2351. __le16 action;
  2352. __le16 rsvd;
  2353. __le32 legacy_rates;
  2354. __u8 ht_rates[4];
  2355. __le16 cap_info;
  2356. __le16 ht_capabilities_info;
  2357. __u8 mac_ht_param_info;
  2358. __u8 rev;
  2359. __u8 control_channel;
  2360. __u8 add_channel;
  2361. __le16 op_mode;
  2362. __le16 stbc;
  2363. __u8 add_qos_info;
  2364. __u8 is_qos_sta;
  2365. __le32 fw_sta_ptr;
  2366. } __attribute__((packed));
  2367. #define MWL8K_STA_ACTION_ADD 0
  2368. #define MWL8K_STA_ACTION_REMOVE 2
  2369. static int mwl8k_cmd_set_new_stn_add(struct ieee80211_hw *hw,
  2370. struct ieee80211_vif *vif,
  2371. struct ieee80211_sta *sta)
  2372. {
  2373. struct mwl8k_cmd_set_new_stn *cmd;
  2374. u32 rates;
  2375. int rc;
  2376. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2377. if (cmd == NULL)
  2378. return -ENOMEM;
  2379. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN);
  2380. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2381. cmd->aid = cpu_to_le16(sta->aid);
  2382. memcpy(cmd->mac_addr, sta->addr, ETH_ALEN);
  2383. cmd->stn_id = cpu_to_le16(sta->aid);
  2384. cmd->action = cpu_to_le16(MWL8K_STA_ACTION_ADD);
  2385. if (hw->conf.channel->band == IEEE80211_BAND_2GHZ)
  2386. rates = sta->supp_rates[IEEE80211_BAND_2GHZ];
  2387. else
  2388. rates = sta->supp_rates[IEEE80211_BAND_5GHZ] << 5;
  2389. cmd->legacy_rates = cpu_to_le32(rates);
  2390. if (sta->ht_cap.ht_supported) {
  2391. cmd->ht_rates[0] = sta->ht_cap.mcs.rx_mask[0];
  2392. cmd->ht_rates[1] = sta->ht_cap.mcs.rx_mask[1];
  2393. cmd->ht_rates[2] = sta->ht_cap.mcs.rx_mask[2];
  2394. cmd->ht_rates[3] = sta->ht_cap.mcs.rx_mask[3];
  2395. cmd->ht_capabilities_info = cpu_to_le16(sta->ht_cap.cap);
  2396. cmd->mac_ht_param_info = (sta->ht_cap.ampdu_factor & 3) |
  2397. ((sta->ht_cap.ampdu_density & 7) << 2);
  2398. cmd->is_qos_sta = 1;
  2399. }
  2400. rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
  2401. kfree(cmd);
  2402. return rc;
  2403. }
  2404. static int mwl8k_cmd_set_new_stn_add_self(struct ieee80211_hw *hw,
  2405. struct ieee80211_vif *vif)
  2406. {
  2407. struct mwl8k_cmd_set_new_stn *cmd;
  2408. int rc;
  2409. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2410. if (cmd == NULL)
  2411. return -ENOMEM;
  2412. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN);
  2413. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2414. memcpy(cmd->mac_addr, vif->addr, ETH_ALEN);
  2415. rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
  2416. kfree(cmd);
  2417. return rc;
  2418. }
  2419. static int mwl8k_cmd_set_new_stn_del(struct ieee80211_hw *hw,
  2420. struct ieee80211_vif *vif, u8 *addr)
  2421. {
  2422. struct mwl8k_cmd_set_new_stn *cmd;
  2423. int rc;
  2424. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2425. if (cmd == NULL)
  2426. return -ENOMEM;
  2427. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN);
  2428. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2429. memcpy(cmd->mac_addr, addr, ETH_ALEN);
  2430. cmd->action = cpu_to_le16(MWL8K_STA_ACTION_REMOVE);
  2431. rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
  2432. kfree(cmd);
  2433. return rc;
  2434. }
  2435. /*
  2436. * CMD_UPDATE_STADB.
  2437. */
  2438. struct ewc_ht_info {
  2439. __le16 control1;
  2440. __le16 control2;
  2441. __le16 control3;
  2442. } __attribute__((packed));
  2443. struct peer_capability_info {
  2444. /* Peer type - AP vs. STA. */
  2445. __u8 peer_type;
  2446. /* Basic 802.11 capabilities from assoc resp. */
  2447. __le16 basic_caps;
  2448. /* Set if peer supports 802.11n high throughput (HT). */
  2449. __u8 ht_support;
  2450. /* Valid if HT is supported. */
  2451. __le16 ht_caps;
  2452. __u8 extended_ht_caps;
  2453. struct ewc_ht_info ewc_info;
  2454. /* Legacy rate table. Intersection of our rates and peer rates. */
  2455. __u8 legacy_rates[12];
  2456. /* HT rate table. Intersection of our rates and peer rates. */
  2457. __u8 ht_rates[16];
  2458. __u8 pad[16];
  2459. /* If set, interoperability mode, no proprietary extensions. */
  2460. __u8 interop;
  2461. __u8 pad2;
  2462. __u8 station_id;
  2463. __le16 amsdu_enabled;
  2464. } __attribute__((packed));
  2465. struct mwl8k_cmd_update_stadb {
  2466. struct mwl8k_cmd_pkt header;
  2467. /* See STADB_ACTION_TYPE */
  2468. __le32 action;
  2469. /* Peer MAC address */
  2470. __u8 peer_addr[ETH_ALEN];
  2471. __le32 reserved;
  2472. /* Peer info - valid during add/update. */
  2473. struct peer_capability_info peer_info;
  2474. } __attribute__((packed));
  2475. #define MWL8K_STA_DB_MODIFY_ENTRY 1
  2476. #define MWL8K_STA_DB_DEL_ENTRY 2
  2477. /* Peer Entry flags - used to define the type of the peer node */
  2478. #define MWL8K_PEER_TYPE_ACCESSPOINT 2
  2479. static int mwl8k_cmd_update_stadb_add(struct ieee80211_hw *hw,
  2480. struct ieee80211_vif *vif,
  2481. struct ieee80211_sta *sta)
  2482. {
  2483. struct mwl8k_cmd_update_stadb *cmd;
  2484. struct peer_capability_info *p;
  2485. u32 rates;
  2486. int rc;
  2487. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2488. if (cmd == NULL)
  2489. return -ENOMEM;
  2490. cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_STADB);
  2491. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2492. cmd->action = cpu_to_le32(MWL8K_STA_DB_MODIFY_ENTRY);
  2493. memcpy(cmd->peer_addr, sta->addr, ETH_ALEN);
  2494. p = &cmd->peer_info;
  2495. p->peer_type = MWL8K_PEER_TYPE_ACCESSPOINT;
  2496. p->basic_caps = cpu_to_le16(vif->bss_conf.assoc_capability);
  2497. p->ht_support = sta->ht_cap.ht_supported;
  2498. p->ht_caps = cpu_to_le16(sta->ht_cap.cap);
  2499. p->extended_ht_caps = (sta->ht_cap.ampdu_factor & 3) |
  2500. ((sta->ht_cap.ampdu_density & 7) << 2);
  2501. if (hw->conf.channel->band == IEEE80211_BAND_2GHZ)
  2502. rates = sta->supp_rates[IEEE80211_BAND_2GHZ];
  2503. else
  2504. rates = sta->supp_rates[IEEE80211_BAND_5GHZ] << 5;
  2505. legacy_rate_mask_to_array(p->legacy_rates, rates);
  2506. memcpy(p->ht_rates, sta->ht_cap.mcs.rx_mask, 16);
  2507. p->interop = 1;
  2508. p->amsdu_enabled = 0;
  2509. rc = mwl8k_post_cmd(hw, &cmd->header);
  2510. kfree(cmd);
  2511. return rc ? rc : p->station_id;
  2512. }
  2513. static int mwl8k_cmd_update_stadb_del(struct ieee80211_hw *hw,
  2514. struct ieee80211_vif *vif, u8 *addr)
  2515. {
  2516. struct mwl8k_cmd_update_stadb *cmd;
  2517. int rc;
  2518. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2519. if (cmd == NULL)
  2520. return -ENOMEM;
  2521. cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_STADB);
  2522. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2523. cmd->action = cpu_to_le32(MWL8K_STA_DB_DEL_ENTRY);
  2524. memcpy(cmd->peer_addr, addr, ETH_ALEN);
  2525. rc = mwl8k_post_cmd(hw, &cmd->header);
  2526. kfree(cmd);
  2527. return rc;
  2528. }
  2529. /*
  2530. * Interrupt handling.
  2531. */
  2532. static irqreturn_t mwl8k_interrupt(int irq, void *dev_id)
  2533. {
  2534. struct ieee80211_hw *hw = dev_id;
  2535. struct mwl8k_priv *priv = hw->priv;
  2536. u32 status;
  2537. status = ioread32(priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
  2538. if (!status)
  2539. return IRQ_NONE;
  2540. if (status & MWL8K_A2H_INT_TX_DONE) {
  2541. status &= ~MWL8K_A2H_INT_TX_DONE;
  2542. tasklet_schedule(&priv->poll_tx_task);
  2543. }
  2544. if (status & MWL8K_A2H_INT_RX_READY) {
  2545. status &= ~MWL8K_A2H_INT_RX_READY;
  2546. tasklet_schedule(&priv->poll_rx_task);
  2547. }
  2548. if (status)
  2549. iowrite32(~status, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
  2550. if (status & MWL8K_A2H_INT_OPC_DONE) {
  2551. if (priv->hostcmd_wait != NULL)
  2552. complete(priv->hostcmd_wait);
  2553. }
  2554. if (status & MWL8K_A2H_INT_QUEUE_EMPTY) {
  2555. if (!mutex_is_locked(&priv->fw_mutex) &&
  2556. priv->radio_on && priv->pending_tx_pkts)
  2557. mwl8k_tx_start(priv);
  2558. }
  2559. return IRQ_HANDLED;
  2560. }
  2561. static void mwl8k_tx_poll(unsigned long data)
  2562. {
  2563. struct ieee80211_hw *hw = (struct ieee80211_hw *)data;
  2564. struct mwl8k_priv *priv = hw->priv;
  2565. int limit;
  2566. int i;
  2567. limit = 32;
  2568. spin_lock_bh(&priv->tx_lock);
  2569. for (i = 0; i < MWL8K_TX_QUEUES; i++)
  2570. limit -= mwl8k_txq_reclaim(hw, i, limit, 0);
  2571. if (!priv->pending_tx_pkts && priv->tx_wait != NULL) {
  2572. complete(priv->tx_wait);
  2573. priv->tx_wait = NULL;
  2574. }
  2575. spin_unlock_bh(&priv->tx_lock);
  2576. if (limit) {
  2577. writel(~MWL8K_A2H_INT_TX_DONE,
  2578. priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
  2579. } else {
  2580. tasklet_schedule(&priv->poll_tx_task);
  2581. }
  2582. }
  2583. static void mwl8k_rx_poll(unsigned long data)
  2584. {
  2585. struct ieee80211_hw *hw = (struct ieee80211_hw *)data;
  2586. struct mwl8k_priv *priv = hw->priv;
  2587. int limit;
  2588. limit = 32;
  2589. limit -= rxq_process(hw, 0, limit);
  2590. limit -= rxq_refill(hw, 0, limit);
  2591. if (limit) {
  2592. writel(~MWL8K_A2H_INT_RX_READY,
  2593. priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
  2594. } else {
  2595. tasklet_schedule(&priv->poll_rx_task);
  2596. }
  2597. }
  2598. /*
  2599. * Core driver operations.
  2600. */
  2601. static int mwl8k_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
  2602. {
  2603. struct mwl8k_priv *priv = hw->priv;
  2604. int index = skb_get_queue_mapping(skb);
  2605. int rc;
  2606. if (!priv->radio_on) {
  2607. printk(KERN_DEBUG "%s: dropped TX frame since radio "
  2608. "disabled\n", wiphy_name(hw->wiphy));
  2609. dev_kfree_skb(skb);
  2610. return NETDEV_TX_OK;
  2611. }
  2612. rc = mwl8k_txq_xmit(hw, index, skb);
  2613. return rc;
  2614. }
  2615. static int mwl8k_start(struct ieee80211_hw *hw)
  2616. {
  2617. struct mwl8k_priv *priv = hw->priv;
  2618. int rc;
  2619. rc = request_irq(priv->pdev->irq, mwl8k_interrupt,
  2620. IRQF_SHARED, MWL8K_NAME, hw);
  2621. if (rc) {
  2622. printk(KERN_ERR "%s: failed to register IRQ handler\n",
  2623. wiphy_name(hw->wiphy));
  2624. return -EIO;
  2625. }
  2626. /* Enable TX reclaim and RX tasklets. */
  2627. tasklet_enable(&priv->poll_tx_task);
  2628. tasklet_enable(&priv->poll_rx_task);
  2629. /* Enable interrupts */
  2630. iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  2631. rc = mwl8k_fw_lock(hw);
  2632. if (!rc) {
  2633. rc = mwl8k_cmd_radio_enable(hw);
  2634. if (!priv->ap_fw) {
  2635. if (!rc)
  2636. rc = mwl8k_cmd_enable_sniffer(hw, 0);
  2637. if (!rc)
  2638. rc = mwl8k_cmd_set_pre_scan(hw);
  2639. if (!rc)
  2640. rc = mwl8k_cmd_set_post_scan(hw,
  2641. "\x00\x00\x00\x00\x00\x00");
  2642. }
  2643. if (!rc)
  2644. rc = mwl8k_cmd_set_rateadapt_mode(hw, 0);
  2645. if (!rc)
  2646. rc = mwl8k_cmd_set_wmm_mode(hw, 0);
  2647. mwl8k_fw_unlock(hw);
  2648. }
  2649. if (rc) {
  2650. iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  2651. free_irq(priv->pdev->irq, hw);
  2652. tasklet_disable(&priv->poll_tx_task);
  2653. tasklet_disable(&priv->poll_rx_task);
  2654. }
  2655. return rc;
  2656. }
  2657. static void mwl8k_stop(struct ieee80211_hw *hw)
  2658. {
  2659. struct mwl8k_priv *priv = hw->priv;
  2660. int i;
  2661. mwl8k_cmd_radio_disable(hw);
  2662. ieee80211_stop_queues(hw);
  2663. /* Disable interrupts */
  2664. iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  2665. free_irq(priv->pdev->irq, hw);
  2666. /* Stop finalize join worker */
  2667. cancel_work_sync(&priv->finalize_join_worker);
  2668. if (priv->beacon_skb != NULL)
  2669. dev_kfree_skb(priv->beacon_skb);
  2670. /* Stop TX reclaim and RX tasklets. */
  2671. tasklet_disable(&priv->poll_tx_task);
  2672. tasklet_disable(&priv->poll_rx_task);
  2673. /* Return all skbs to mac80211 */
  2674. for (i = 0; i < MWL8K_TX_QUEUES; i++)
  2675. mwl8k_txq_reclaim(hw, i, INT_MAX, 1);
  2676. }
  2677. static int mwl8k_add_interface(struct ieee80211_hw *hw,
  2678. struct ieee80211_vif *vif)
  2679. {
  2680. struct mwl8k_priv *priv = hw->priv;
  2681. struct mwl8k_vif *mwl8k_vif;
  2682. u32 macids_supported;
  2683. int macid;
  2684. /*
  2685. * Reject interface creation if sniffer mode is active, as
  2686. * STA operation is mutually exclusive with hardware sniffer
  2687. * mode. (Sniffer mode is only used on STA firmware.)
  2688. */
  2689. if (priv->sniffer_enabled) {
  2690. printk(KERN_INFO "%s: unable to create STA "
  2691. "interface due to sniffer mode being enabled\n",
  2692. wiphy_name(hw->wiphy));
  2693. return -EINVAL;
  2694. }
  2695. switch (vif->type) {
  2696. case NL80211_IFTYPE_AP:
  2697. macids_supported = priv->ap_macids_supported;
  2698. break;
  2699. case NL80211_IFTYPE_STATION:
  2700. macids_supported = priv->sta_macids_supported;
  2701. break;
  2702. default:
  2703. return -EINVAL;
  2704. }
  2705. macid = ffs(macids_supported & ~priv->macids_used);
  2706. if (!macid--)
  2707. return -EBUSY;
  2708. /* Setup driver private area. */
  2709. mwl8k_vif = MWL8K_VIF(vif);
  2710. memset(mwl8k_vif, 0, sizeof(*mwl8k_vif));
  2711. mwl8k_vif->vif = vif;
  2712. mwl8k_vif->macid = macid;
  2713. mwl8k_vif->seqno = 0;
  2714. /* Set the mac address. */
  2715. mwl8k_cmd_set_mac_addr(hw, vif, vif->addr);
  2716. if (priv->ap_fw)
  2717. mwl8k_cmd_set_new_stn_add_self(hw, vif);
  2718. priv->macids_used |= 1 << mwl8k_vif->macid;
  2719. list_add_tail(&mwl8k_vif->list, &priv->vif_list);
  2720. return 0;
  2721. }
  2722. static void mwl8k_remove_interface(struct ieee80211_hw *hw,
  2723. struct ieee80211_vif *vif)
  2724. {
  2725. struct mwl8k_priv *priv = hw->priv;
  2726. struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
  2727. if (priv->ap_fw)
  2728. mwl8k_cmd_set_new_stn_del(hw, vif, vif->addr);
  2729. mwl8k_cmd_set_mac_addr(hw, vif, "\x00\x00\x00\x00\x00\x00");
  2730. priv->macids_used &= ~(1 << mwl8k_vif->macid);
  2731. list_del(&mwl8k_vif->list);
  2732. }
  2733. static int mwl8k_config(struct ieee80211_hw *hw, u32 changed)
  2734. {
  2735. struct ieee80211_conf *conf = &hw->conf;
  2736. struct mwl8k_priv *priv = hw->priv;
  2737. int rc;
  2738. if (conf->flags & IEEE80211_CONF_IDLE) {
  2739. mwl8k_cmd_radio_disable(hw);
  2740. return 0;
  2741. }
  2742. rc = mwl8k_fw_lock(hw);
  2743. if (rc)
  2744. return rc;
  2745. rc = mwl8k_cmd_radio_enable(hw);
  2746. if (rc)
  2747. goto out;
  2748. rc = mwl8k_cmd_set_rf_channel(hw, conf);
  2749. if (rc)
  2750. goto out;
  2751. if (conf->power_level > 18)
  2752. conf->power_level = 18;
  2753. rc = mwl8k_cmd_rf_tx_power(hw, conf->power_level);
  2754. if (rc)
  2755. goto out;
  2756. if (priv->ap_fw) {
  2757. rc = mwl8k_cmd_rf_antenna(hw, MWL8K_RF_ANTENNA_RX, 0x7);
  2758. if (!rc)
  2759. rc = mwl8k_cmd_rf_antenna(hw, MWL8K_RF_ANTENNA_TX, 0x7);
  2760. } else {
  2761. rc = mwl8k_cmd_mimo_config(hw, 0x7, 0x7);
  2762. }
  2763. out:
  2764. mwl8k_fw_unlock(hw);
  2765. return rc;
  2766. }
  2767. static void
  2768. mwl8k_bss_info_changed_sta(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
  2769. struct ieee80211_bss_conf *info, u32 changed)
  2770. {
  2771. struct mwl8k_priv *priv = hw->priv;
  2772. u32 ap_legacy_rates;
  2773. u8 ap_mcs_rates[16];
  2774. int rc;
  2775. if (mwl8k_fw_lock(hw))
  2776. return;
  2777. /*
  2778. * No need to capture a beacon if we're no longer associated.
  2779. */
  2780. if ((changed & BSS_CHANGED_ASSOC) && !vif->bss_conf.assoc)
  2781. priv->capture_beacon = false;
  2782. /*
  2783. * Get the AP's legacy and MCS rates.
  2784. */
  2785. if (vif->bss_conf.assoc) {
  2786. struct ieee80211_sta *ap;
  2787. rcu_read_lock();
  2788. ap = ieee80211_find_sta(vif, vif->bss_conf.bssid);
  2789. if (ap == NULL) {
  2790. rcu_read_unlock();
  2791. goto out;
  2792. }
  2793. if (hw->conf.channel->band == IEEE80211_BAND_2GHZ) {
  2794. ap_legacy_rates = ap->supp_rates[IEEE80211_BAND_2GHZ];
  2795. } else {
  2796. ap_legacy_rates =
  2797. ap->supp_rates[IEEE80211_BAND_5GHZ] << 5;
  2798. }
  2799. memcpy(ap_mcs_rates, ap->ht_cap.mcs.rx_mask, 16);
  2800. rcu_read_unlock();
  2801. }
  2802. if ((changed & BSS_CHANGED_ASSOC) && vif->bss_conf.assoc) {
  2803. rc = mwl8k_cmd_set_rate(hw, vif, ap_legacy_rates, ap_mcs_rates);
  2804. if (rc)
  2805. goto out;
  2806. rc = mwl8k_cmd_use_fixed_rate_sta(hw);
  2807. if (rc)
  2808. goto out;
  2809. }
  2810. if (changed & BSS_CHANGED_ERP_PREAMBLE) {
  2811. rc = mwl8k_set_radio_preamble(hw,
  2812. vif->bss_conf.use_short_preamble);
  2813. if (rc)
  2814. goto out;
  2815. }
  2816. if (changed & BSS_CHANGED_ERP_SLOT) {
  2817. rc = mwl8k_cmd_set_slot(hw, vif->bss_conf.use_short_slot);
  2818. if (rc)
  2819. goto out;
  2820. }
  2821. if (vif->bss_conf.assoc &&
  2822. (changed & (BSS_CHANGED_ASSOC | BSS_CHANGED_ERP_CTS_PROT |
  2823. BSS_CHANGED_HT))) {
  2824. rc = mwl8k_cmd_set_aid(hw, vif, ap_legacy_rates);
  2825. if (rc)
  2826. goto out;
  2827. }
  2828. if (vif->bss_conf.assoc &&
  2829. (changed & (BSS_CHANGED_ASSOC | BSS_CHANGED_BEACON_INT))) {
  2830. /*
  2831. * Finalize the join. Tell rx handler to process
  2832. * next beacon from our BSSID.
  2833. */
  2834. memcpy(priv->capture_bssid, vif->bss_conf.bssid, ETH_ALEN);
  2835. priv->capture_beacon = true;
  2836. }
  2837. out:
  2838. mwl8k_fw_unlock(hw);
  2839. }
  2840. static void
  2841. mwl8k_bss_info_changed_ap(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
  2842. struct ieee80211_bss_conf *info, u32 changed)
  2843. {
  2844. int rc;
  2845. if (mwl8k_fw_lock(hw))
  2846. return;
  2847. if (changed & BSS_CHANGED_ERP_PREAMBLE) {
  2848. rc = mwl8k_set_radio_preamble(hw,
  2849. vif->bss_conf.use_short_preamble);
  2850. if (rc)
  2851. goto out;
  2852. }
  2853. if (changed & BSS_CHANGED_BASIC_RATES) {
  2854. int idx;
  2855. int rate;
  2856. /*
  2857. * Use lowest supported basic rate for multicasts
  2858. * and management frames (such as probe responses --
  2859. * beacons will always go out at 1 Mb/s).
  2860. */
  2861. idx = ffs(vif->bss_conf.basic_rates);
  2862. if (idx)
  2863. idx--;
  2864. if (hw->conf.channel->band == IEEE80211_BAND_2GHZ)
  2865. rate = mwl8k_rates_24[idx].hw_value;
  2866. else
  2867. rate = mwl8k_rates_50[idx].hw_value;
  2868. mwl8k_cmd_use_fixed_rate_ap(hw, rate, rate);
  2869. }
  2870. if (changed & (BSS_CHANGED_BEACON_INT | BSS_CHANGED_BEACON)) {
  2871. struct sk_buff *skb;
  2872. skb = ieee80211_beacon_get(hw, vif);
  2873. if (skb != NULL) {
  2874. mwl8k_cmd_set_beacon(hw, vif, skb->data, skb->len);
  2875. kfree_skb(skb);
  2876. }
  2877. }
  2878. if (changed & BSS_CHANGED_BEACON_ENABLED)
  2879. mwl8k_cmd_bss_start(hw, vif, info->enable_beacon);
  2880. out:
  2881. mwl8k_fw_unlock(hw);
  2882. }
  2883. static void
  2884. mwl8k_bss_info_changed(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
  2885. struct ieee80211_bss_conf *info, u32 changed)
  2886. {
  2887. struct mwl8k_priv *priv = hw->priv;
  2888. if (!priv->ap_fw)
  2889. mwl8k_bss_info_changed_sta(hw, vif, info, changed);
  2890. else
  2891. mwl8k_bss_info_changed_ap(hw, vif, info, changed);
  2892. }
  2893. static u64 mwl8k_prepare_multicast(struct ieee80211_hw *hw,
  2894. struct netdev_hw_addr_list *mc_list)
  2895. {
  2896. struct mwl8k_cmd_pkt *cmd;
  2897. /*
  2898. * Synthesize and return a command packet that programs the
  2899. * hardware multicast address filter. At this point we don't
  2900. * know whether FIF_ALLMULTI is being requested, but if it is,
  2901. * we'll end up throwing this packet away and creating a new
  2902. * one in mwl8k_configure_filter().
  2903. */
  2904. cmd = __mwl8k_cmd_mac_multicast_adr(hw, 0, mc_list);
  2905. return (unsigned long)cmd;
  2906. }
  2907. static int
  2908. mwl8k_configure_filter_sniffer(struct ieee80211_hw *hw,
  2909. unsigned int changed_flags,
  2910. unsigned int *total_flags)
  2911. {
  2912. struct mwl8k_priv *priv = hw->priv;
  2913. /*
  2914. * Hardware sniffer mode is mutually exclusive with STA
  2915. * operation, so refuse to enable sniffer mode if a STA
  2916. * interface is active.
  2917. */
  2918. if (!list_empty(&priv->vif_list)) {
  2919. if (net_ratelimit())
  2920. printk(KERN_INFO "%s: not enabling sniffer "
  2921. "mode because STA interface is active\n",
  2922. wiphy_name(hw->wiphy));
  2923. return 0;
  2924. }
  2925. if (!priv->sniffer_enabled) {
  2926. if (mwl8k_cmd_enable_sniffer(hw, 1))
  2927. return 0;
  2928. priv->sniffer_enabled = true;
  2929. }
  2930. *total_flags &= FIF_PROMISC_IN_BSS | FIF_ALLMULTI |
  2931. FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL |
  2932. FIF_OTHER_BSS;
  2933. return 1;
  2934. }
  2935. static struct mwl8k_vif *mwl8k_first_vif(struct mwl8k_priv *priv)
  2936. {
  2937. if (!list_empty(&priv->vif_list))
  2938. return list_entry(priv->vif_list.next, struct mwl8k_vif, list);
  2939. return NULL;
  2940. }
  2941. static void mwl8k_configure_filter(struct ieee80211_hw *hw,
  2942. unsigned int changed_flags,
  2943. unsigned int *total_flags,
  2944. u64 multicast)
  2945. {
  2946. struct mwl8k_priv *priv = hw->priv;
  2947. struct mwl8k_cmd_pkt *cmd = (void *)(unsigned long)multicast;
  2948. /*
  2949. * AP firmware doesn't allow fine-grained control over
  2950. * the receive filter.
  2951. */
  2952. if (priv->ap_fw) {
  2953. *total_flags &= FIF_ALLMULTI | FIF_BCN_PRBRESP_PROMISC;
  2954. kfree(cmd);
  2955. return;
  2956. }
  2957. /*
  2958. * Enable hardware sniffer mode if FIF_CONTROL or
  2959. * FIF_OTHER_BSS is requested.
  2960. */
  2961. if (*total_flags & (FIF_CONTROL | FIF_OTHER_BSS) &&
  2962. mwl8k_configure_filter_sniffer(hw, changed_flags, total_flags)) {
  2963. kfree(cmd);
  2964. return;
  2965. }
  2966. /* Clear unsupported feature flags */
  2967. *total_flags &= FIF_ALLMULTI | FIF_BCN_PRBRESP_PROMISC;
  2968. if (mwl8k_fw_lock(hw)) {
  2969. kfree(cmd);
  2970. return;
  2971. }
  2972. if (priv->sniffer_enabled) {
  2973. mwl8k_cmd_enable_sniffer(hw, 0);
  2974. priv->sniffer_enabled = false;
  2975. }
  2976. if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
  2977. if (*total_flags & FIF_BCN_PRBRESP_PROMISC) {
  2978. /*
  2979. * Disable the BSS filter.
  2980. */
  2981. mwl8k_cmd_set_pre_scan(hw);
  2982. } else {
  2983. struct mwl8k_vif *mwl8k_vif;
  2984. const u8 *bssid;
  2985. /*
  2986. * Enable the BSS filter.
  2987. *
  2988. * If there is an active STA interface, use that
  2989. * interface's BSSID, otherwise use a dummy one
  2990. * (where the OUI part needs to be nonzero for
  2991. * the BSSID to be accepted by POST_SCAN).
  2992. */
  2993. mwl8k_vif = mwl8k_first_vif(priv);
  2994. if (mwl8k_vif != NULL)
  2995. bssid = mwl8k_vif->vif->bss_conf.bssid;
  2996. else
  2997. bssid = "\x01\x00\x00\x00\x00\x00";
  2998. mwl8k_cmd_set_post_scan(hw, bssid);
  2999. }
  3000. }
  3001. /*
  3002. * If FIF_ALLMULTI is being requested, throw away the command
  3003. * packet that ->prepare_multicast() built and replace it with
  3004. * a command packet that enables reception of all multicast
  3005. * packets.
  3006. */
  3007. if (*total_flags & FIF_ALLMULTI) {
  3008. kfree(cmd);
  3009. cmd = __mwl8k_cmd_mac_multicast_adr(hw, 1, NULL);
  3010. }
  3011. if (cmd != NULL) {
  3012. mwl8k_post_cmd(hw, cmd);
  3013. kfree(cmd);
  3014. }
  3015. mwl8k_fw_unlock(hw);
  3016. }
  3017. static int mwl8k_set_rts_threshold(struct ieee80211_hw *hw, u32 value)
  3018. {
  3019. return mwl8k_cmd_set_rts_threshold(hw, value);
  3020. }
  3021. static int mwl8k_sta_remove(struct ieee80211_hw *hw,
  3022. struct ieee80211_vif *vif,
  3023. struct ieee80211_sta *sta)
  3024. {
  3025. struct mwl8k_priv *priv = hw->priv;
  3026. if (priv->ap_fw)
  3027. return mwl8k_cmd_set_new_stn_del(hw, vif, sta->addr);
  3028. else
  3029. return mwl8k_cmd_update_stadb_del(hw, vif, sta->addr);
  3030. }
  3031. static int mwl8k_sta_add(struct ieee80211_hw *hw,
  3032. struct ieee80211_vif *vif,
  3033. struct ieee80211_sta *sta)
  3034. {
  3035. struct mwl8k_priv *priv = hw->priv;
  3036. int ret;
  3037. if (!priv->ap_fw) {
  3038. ret = mwl8k_cmd_update_stadb_add(hw, vif, sta);
  3039. if (ret >= 0) {
  3040. MWL8K_STA(sta)->peer_id = ret;
  3041. return 0;
  3042. }
  3043. return ret;
  3044. }
  3045. return mwl8k_cmd_set_new_stn_add(hw, vif, sta);
  3046. }
  3047. static int mwl8k_conf_tx(struct ieee80211_hw *hw, u16 queue,
  3048. const struct ieee80211_tx_queue_params *params)
  3049. {
  3050. struct mwl8k_priv *priv = hw->priv;
  3051. int rc;
  3052. rc = mwl8k_fw_lock(hw);
  3053. if (!rc) {
  3054. if (!priv->wmm_enabled)
  3055. rc = mwl8k_cmd_set_wmm_mode(hw, 1);
  3056. if (!rc)
  3057. rc = mwl8k_cmd_set_edca_params(hw, queue,
  3058. params->cw_min,
  3059. params->cw_max,
  3060. params->aifs,
  3061. params->txop);
  3062. mwl8k_fw_unlock(hw);
  3063. }
  3064. return rc;
  3065. }
  3066. static int mwl8k_get_stats(struct ieee80211_hw *hw,
  3067. struct ieee80211_low_level_stats *stats)
  3068. {
  3069. return mwl8k_cmd_get_stat(hw, stats);
  3070. }
  3071. static int
  3072. mwl8k_ampdu_action(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
  3073. enum ieee80211_ampdu_mlme_action action,
  3074. struct ieee80211_sta *sta, u16 tid, u16 *ssn)
  3075. {
  3076. switch (action) {
  3077. case IEEE80211_AMPDU_RX_START:
  3078. case IEEE80211_AMPDU_RX_STOP:
  3079. if (!(hw->flags & IEEE80211_HW_AMPDU_AGGREGATION))
  3080. return -ENOTSUPP;
  3081. return 0;
  3082. default:
  3083. return -ENOTSUPP;
  3084. }
  3085. }
  3086. static const struct ieee80211_ops mwl8k_ops = {
  3087. .tx = mwl8k_tx,
  3088. .start = mwl8k_start,
  3089. .stop = mwl8k_stop,
  3090. .add_interface = mwl8k_add_interface,
  3091. .remove_interface = mwl8k_remove_interface,
  3092. .config = mwl8k_config,
  3093. .bss_info_changed = mwl8k_bss_info_changed,
  3094. .prepare_multicast = mwl8k_prepare_multicast,
  3095. .configure_filter = mwl8k_configure_filter,
  3096. .set_rts_threshold = mwl8k_set_rts_threshold,
  3097. .sta_add = mwl8k_sta_add,
  3098. .sta_remove = mwl8k_sta_remove,
  3099. .conf_tx = mwl8k_conf_tx,
  3100. .get_stats = mwl8k_get_stats,
  3101. .ampdu_action = mwl8k_ampdu_action,
  3102. };
  3103. static void mwl8k_finalize_join_worker(struct work_struct *work)
  3104. {
  3105. struct mwl8k_priv *priv =
  3106. container_of(work, struct mwl8k_priv, finalize_join_worker);
  3107. struct sk_buff *skb = priv->beacon_skb;
  3108. struct ieee80211_mgmt *mgmt = (void *)skb->data;
  3109. int len = skb->len - offsetof(struct ieee80211_mgmt, u.beacon.variable);
  3110. const u8 *tim = cfg80211_find_ie(WLAN_EID_TIM,
  3111. mgmt->u.beacon.variable, len);
  3112. int dtim_period = 1;
  3113. if (tim && tim[1] >= 2)
  3114. dtim_period = tim[3];
  3115. mwl8k_cmd_finalize_join(priv->hw, skb->data, skb->len, dtim_period);
  3116. dev_kfree_skb(skb);
  3117. priv->beacon_skb = NULL;
  3118. }
  3119. enum {
  3120. MWL8363 = 0,
  3121. MWL8687,
  3122. MWL8366,
  3123. };
  3124. static struct mwl8k_device_info mwl8k_info_tbl[] __devinitdata = {
  3125. [MWL8363] = {
  3126. .part_name = "88w8363",
  3127. .helper_image = "mwl8k/helper_8363.fw",
  3128. .fw_image = "mwl8k/fmimage_8363.fw",
  3129. },
  3130. [MWL8687] = {
  3131. .part_name = "88w8687",
  3132. .helper_image = "mwl8k/helper_8687.fw",
  3133. .fw_image = "mwl8k/fmimage_8687.fw",
  3134. },
  3135. [MWL8366] = {
  3136. .part_name = "88w8366",
  3137. .helper_image = "mwl8k/helper_8366.fw",
  3138. .fw_image = "mwl8k/fmimage_8366.fw",
  3139. .ap_rxd_ops = &rxd_8366_ap_ops,
  3140. },
  3141. };
  3142. MODULE_FIRMWARE("mwl8k/helper_8363.fw");
  3143. MODULE_FIRMWARE("mwl8k/fmimage_8363.fw");
  3144. MODULE_FIRMWARE("mwl8k/helper_8687.fw");
  3145. MODULE_FIRMWARE("mwl8k/fmimage_8687.fw");
  3146. MODULE_FIRMWARE("mwl8k/helper_8366.fw");
  3147. MODULE_FIRMWARE("mwl8k/fmimage_8366.fw");
  3148. static DEFINE_PCI_DEVICE_TABLE(mwl8k_pci_id_table) = {
  3149. { PCI_VDEVICE(MARVELL, 0x2a0a), .driver_data = MWL8363, },
  3150. { PCI_VDEVICE(MARVELL, 0x2a0c), .driver_data = MWL8363, },
  3151. { PCI_VDEVICE(MARVELL, 0x2a24), .driver_data = MWL8363, },
  3152. { PCI_VDEVICE(MARVELL, 0x2a2b), .driver_data = MWL8687, },
  3153. { PCI_VDEVICE(MARVELL, 0x2a30), .driver_data = MWL8687, },
  3154. { PCI_VDEVICE(MARVELL, 0x2a40), .driver_data = MWL8366, },
  3155. { PCI_VDEVICE(MARVELL, 0x2a43), .driver_data = MWL8366, },
  3156. { },
  3157. };
  3158. MODULE_DEVICE_TABLE(pci, mwl8k_pci_id_table);
  3159. static int __devinit mwl8k_probe(struct pci_dev *pdev,
  3160. const struct pci_device_id *id)
  3161. {
  3162. static int printed_version = 0;
  3163. struct ieee80211_hw *hw;
  3164. struct mwl8k_priv *priv;
  3165. int rc;
  3166. int i;
  3167. if (!printed_version) {
  3168. printk(KERN_INFO "%s version %s\n", MWL8K_DESC, MWL8K_VERSION);
  3169. printed_version = 1;
  3170. }
  3171. rc = pci_enable_device(pdev);
  3172. if (rc) {
  3173. printk(KERN_ERR "%s: Cannot enable new PCI device\n",
  3174. MWL8K_NAME);
  3175. return rc;
  3176. }
  3177. rc = pci_request_regions(pdev, MWL8K_NAME);
  3178. if (rc) {
  3179. printk(KERN_ERR "%s: Cannot obtain PCI resources\n",
  3180. MWL8K_NAME);
  3181. goto err_disable_device;
  3182. }
  3183. pci_set_master(pdev);
  3184. hw = ieee80211_alloc_hw(sizeof(*priv), &mwl8k_ops);
  3185. if (hw == NULL) {
  3186. printk(KERN_ERR "%s: ieee80211 alloc failed\n", MWL8K_NAME);
  3187. rc = -ENOMEM;
  3188. goto err_free_reg;
  3189. }
  3190. SET_IEEE80211_DEV(hw, &pdev->dev);
  3191. pci_set_drvdata(pdev, hw);
  3192. priv = hw->priv;
  3193. priv->hw = hw;
  3194. priv->pdev = pdev;
  3195. priv->device_info = &mwl8k_info_tbl[id->driver_data];
  3196. priv->sram = pci_iomap(pdev, 0, 0x10000);
  3197. if (priv->sram == NULL) {
  3198. printk(KERN_ERR "%s: Cannot map device SRAM\n",
  3199. wiphy_name(hw->wiphy));
  3200. goto err_iounmap;
  3201. }
  3202. /*
  3203. * If BAR0 is a 32 bit BAR, the register BAR will be BAR1.
  3204. * If BAR0 is a 64 bit BAR, the register BAR will be BAR2.
  3205. */
  3206. priv->regs = pci_iomap(pdev, 1, 0x10000);
  3207. if (priv->regs == NULL) {
  3208. priv->regs = pci_iomap(pdev, 2, 0x10000);
  3209. if (priv->regs == NULL) {
  3210. printk(KERN_ERR "%s: Cannot map device registers\n",
  3211. wiphy_name(hw->wiphy));
  3212. goto err_iounmap;
  3213. }
  3214. }
  3215. /* Reset firmware and hardware */
  3216. mwl8k_hw_reset(priv);
  3217. /* Ask userland hotplug daemon for the device firmware */
  3218. rc = mwl8k_request_firmware(priv);
  3219. if (rc) {
  3220. printk(KERN_ERR "%s: Firmware files not found\n",
  3221. wiphy_name(hw->wiphy));
  3222. goto err_stop_firmware;
  3223. }
  3224. /* Load firmware into hardware */
  3225. rc = mwl8k_load_firmware(hw);
  3226. if (rc) {
  3227. printk(KERN_ERR "%s: Cannot start firmware\n",
  3228. wiphy_name(hw->wiphy));
  3229. goto err_stop_firmware;
  3230. }
  3231. /* Reclaim memory once firmware is successfully loaded */
  3232. mwl8k_release_firmware(priv);
  3233. if (priv->ap_fw) {
  3234. priv->rxd_ops = priv->device_info->ap_rxd_ops;
  3235. if (priv->rxd_ops == NULL) {
  3236. printk(KERN_ERR "%s: Driver does not have AP "
  3237. "firmware image support for this hardware\n",
  3238. wiphy_name(hw->wiphy));
  3239. goto err_stop_firmware;
  3240. }
  3241. } else {
  3242. priv->rxd_ops = &rxd_sta_ops;
  3243. }
  3244. priv->sniffer_enabled = false;
  3245. priv->wmm_enabled = false;
  3246. priv->pending_tx_pkts = 0;
  3247. /*
  3248. * Extra headroom is the size of the required DMA header
  3249. * minus the size of the smallest 802.11 frame (CTS frame).
  3250. */
  3251. hw->extra_tx_headroom =
  3252. sizeof(struct mwl8k_dma_data) - sizeof(struct ieee80211_cts);
  3253. hw->channel_change_time = 10;
  3254. hw->queues = MWL8K_TX_QUEUES;
  3255. /* Set rssi values to dBm */
  3256. hw->flags |= IEEE80211_HW_SIGNAL_DBM;
  3257. hw->vif_data_size = sizeof(struct mwl8k_vif);
  3258. hw->sta_data_size = sizeof(struct mwl8k_sta);
  3259. priv->macids_used = 0;
  3260. INIT_LIST_HEAD(&priv->vif_list);
  3261. /* Set default radio state and preamble */
  3262. priv->radio_on = 0;
  3263. priv->radio_short_preamble = 0;
  3264. /* Finalize join worker */
  3265. INIT_WORK(&priv->finalize_join_worker, mwl8k_finalize_join_worker);
  3266. /* TX reclaim and RX tasklets. */
  3267. tasklet_init(&priv->poll_tx_task, mwl8k_tx_poll, (unsigned long)hw);
  3268. tasklet_disable(&priv->poll_tx_task);
  3269. tasklet_init(&priv->poll_rx_task, mwl8k_rx_poll, (unsigned long)hw);
  3270. tasklet_disable(&priv->poll_rx_task);
  3271. /* Power management cookie */
  3272. priv->cookie = pci_alloc_consistent(priv->pdev, 4, &priv->cookie_dma);
  3273. if (priv->cookie == NULL)
  3274. goto err_stop_firmware;
  3275. rc = mwl8k_rxq_init(hw, 0);
  3276. if (rc)
  3277. goto err_free_cookie;
  3278. rxq_refill(hw, 0, INT_MAX);
  3279. mutex_init(&priv->fw_mutex);
  3280. priv->fw_mutex_owner = NULL;
  3281. priv->fw_mutex_depth = 0;
  3282. priv->hostcmd_wait = NULL;
  3283. spin_lock_init(&priv->tx_lock);
  3284. priv->tx_wait = NULL;
  3285. for (i = 0; i < MWL8K_TX_QUEUES; i++) {
  3286. rc = mwl8k_txq_init(hw, i);
  3287. if (rc)
  3288. goto err_free_queues;
  3289. }
  3290. iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
  3291. iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  3292. iowrite32(MWL8K_A2H_INT_TX_DONE | MWL8K_A2H_INT_RX_READY,
  3293. priv->regs + MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL);
  3294. iowrite32(0xffffffff, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK);
  3295. rc = request_irq(priv->pdev->irq, mwl8k_interrupt,
  3296. IRQF_SHARED, MWL8K_NAME, hw);
  3297. if (rc) {
  3298. printk(KERN_ERR "%s: failed to register IRQ handler\n",
  3299. wiphy_name(hw->wiphy));
  3300. goto err_free_queues;
  3301. }
  3302. /*
  3303. * Temporarily enable interrupts. Initial firmware host
  3304. * commands use interrupts and avoid polling. Disable
  3305. * interrupts when done.
  3306. */
  3307. iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  3308. /* Get config data, mac addrs etc */
  3309. if (priv->ap_fw) {
  3310. rc = mwl8k_cmd_get_hw_spec_ap(hw);
  3311. if (!rc)
  3312. rc = mwl8k_cmd_set_hw_spec(hw);
  3313. } else {
  3314. rc = mwl8k_cmd_get_hw_spec_sta(hw);
  3315. }
  3316. if (rc) {
  3317. printk(KERN_ERR "%s: Cannot initialise firmware\n",
  3318. wiphy_name(hw->wiphy));
  3319. goto err_free_irq;
  3320. }
  3321. hw->wiphy->interface_modes = 0;
  3322. if (priv->ap_macids_supported)
  3323. hw->wiphy->interface_modes |= BIT(NL80211_IFTYPE_AP);
  3324. if (priv->sta_macids_supported)
  3325. hw->wiphy->interface_modes |= BIT(NL80211_IFTYPE_STATION);
  3326. /* Turn radio off */
  3327. rc = mwl8k_cmd_radio_disable(hw);
  3328. if (rc) {
  3329. printk(KERN_ERR "%s: Cannot disable\n", wiphy_name(hw->wiphy));
  3330. goto err_free_irq;
  3331. }
  3332. /* Clear MAC address */
  3333. rc = mwl8k_cmd_set_mac_addr(hw, NULL, "\x00\x00\x00\x00\x00\x00");
  3334. if (rc) {
  3335. printk(KERN_ERR "%s: Cannot clear MAC address\n",
  3336. wiphy_name(hw->wiphy));
  3337. goto err_free_irq;
  3338. }
  3339. /* Disable interrupts */
  3340. iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  3341. free_irq(priv->pdev->irq, hw);
  3342. rc = ieee80211_register_hw(hw);
  3343. if (rc) {
  3344. printk(KERN_ERR "%s: Cannot register device\n",
  3345. wiphy_name(hw->wiphy));
  3346. goto err_free_queues;
  3347. }
  3348. printk(KERN_INFO "%s: %s v%d, %pM, %s firmware %u.%u.%u.%u\n",
  3349. wiphy_name(hw->wiphy), priv->device_info->part_name,
  3350. priv->hw_rev, hw->wiphy->perm_addr,
  3351. priv->ap_fw ? "AP" : "STA",
  3352. (priv->fw_rev >> 24) & 0xff, (priv->fw_rev >> 16) & 0xff,
  3353. (priv->fw_rev >> 8) & 0xff, priv->fw_rev & 0xff);
  3354. return 0;
  3355. err_free_irq:
  3356. iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  3357. free_irq(priv->pdev->irq, hw);
  3358. err_free_queues:
  3359. for (i = 0; i < MWL8K_TX_QUEUES; i++)
  3360. mwl8k_txq_deinit(hw, i);
  3361. mwl8k_rxq_deinit(hw, 0);
  3362. err_free_cookie:
  3363. if (priv->cookie != NULL)
  3364. pci_free_consistent(priv->pdev, 4,
  3365. priv->cookie, priv->cookie_dma);
  3366. err_stop_firmware:
  3367. mwl8k_hw_reset(priv);
  3368. mwl8k_release_firmware(priv);
  3369. err_iounmap:
  3370. if (priv->regs != NULL)
  3371. pci_iounmap(pdev, priv->regs);
  3372. if (priv->sram != NULL)
  3373. pci_iounmap(pdev, priv->sram);
  3374. pci_set_drvdata(pdev, NULL);
  3375. ieee80211_free_hw(hw);
  3376. err_free_reg:
  3377. pci_release_regions(pdev);
  3378. err_disable_device:
  3379. pci_disable_device(pdev);
  3380. return rc;
  3381. }
  3382. static void __devexit mwl8k_shutdown(struct pci_dev *pdev)
  3383. {
  3384. printk(KERN_ERR "===>%s(%u)\n", __func__, __LINE__);
  3385. }
  3386. static void __devexit mwl8k_remove(struct pci_dev *pdev)
  3387. {
  3388. struct ieee80211_hw *hw = pci_get_drvdata(pdev);
  3389. struct mwl8k_priv *priv;
  3390. int i;
  3391. if (hw == NULL)
  3392. return;
  3393. priv = hw->priv;
  3394. ieee80211_stop_queues(hw);
  3395. ieee80211_unregister_hw(hw);
  3396. /* Remove TX reclaim and RX tasklets. */
  3397. tasklet_kill(&priv->poll_tx_task);
  3398. tasklet_kill(&priv->poll_rx_task);
  3399. /* Stop hardware */
  3400. mwl8k_hw_reset(priv);
  3401. /* Return all skbs to mac80211 */
  3402. for (i = 0; i < MWL8K_TX_QUEUES; i++)
  3403. mwl8k_txq_reclaim(hw, i, INT_MAX, 1);
  3404. for (i = 0; i < MWL8K_TX_QUEUES; i++)
  3405. mwl8k_txq_deinit(hw, i);
  3406. mwl8k_rxq_deinit(hw, 0);
  3407. pci_free_consistent(priv->pdev, 4, priv->cookie, priv->cookie_dma);
  3408. pci_iounmap(pdev, priv->regs);
  3409. pci_iounmap(pdev, priv->sram);
  3410. pci_set_drvdata(pdev, NULL);
  3411. ieee80211_free_hw(hw);
  3412. pci_release_regions(pdev);
  3413. pci_disable_device(pdev);
  3414. }
  3415. static struct pci_driver mwl8k_driver = {
  3416. .name = MWL8K_NAME,
  3417. .id_table = mwl8k_pci_id_table,
  3418. .probe = mwl8k_probe,
  3419. .remove = __devexit_p(mwl8k_remove),
  3420. .shutdown = __devexit_p(mwl8k_shutdown),
  3421. };
  3422. static int __init mwl8k_init(void)
  3423. {
  3424. return pci_register_driver(&mwl8k_driver);
  3425. }
  3426. static void __exit mwl8k_exit(void)
  3427. {
  3428. pci_unregister_driver(&mwl8k_driver);
  3429. }
  3430. module_init(mwl8k_init);
  3431. module_exit(mwl8k_exit);
  3432. MODULE_DESCRIPTION(MWL8K_DESC);
  3433. MODULE_VERSION(MWL8K_VERSION);
  3434. MODULE_AUTHOR("Lennert Buytenhek <buytenh@marvell.com>");
  3435. MODULE_LICENSE("GPL");