w83795.c 58 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091929394959697989910010110210310410510610710810911011111211311411511611711811912012112212312412512612712812913013113213313413513613713813914014114214314414514614714814915015115215315415515615715815916016116216316416516616716816917017117217317417517617717817918018118218318418518618718818919019119219319419519619719819920020120220320420520620720820921021121221321421521621721821922022122222322422522622722822923023123223323423523623723823924024124224324424524624724824925025125225325425525625725825926026126226326426526626726826927027127227327427527627727827928028128228328428528628728828929029129229329429529629729829930030130230330430530630730830931031131231331431531631731831932032132232332432532632732832933033133233333433533633733833934034134234334434534634734834935035135235335435535635735835936036136236336436536636736836937037137237337437537637737837938038138238338438538638738838939039139239339439539639739839940040140240340440540640740840941041141241341441541641741841942042142242342442542642742842943043143243343443543643743843944044144244344444544644744844945045145245345445545645745845946046146246346446546646746846947047147247347447547647747847948048148248348448548648748848949049149249349449549649749849950050150250350450550650750850951051151251351451551651751851952052152252352452552652752852953053153253353453553653753853954054154254354454554654754854955055155255355455555655755855956056156256356456556656756856957057157257357457557657757857958058158258358458558658758858959059159259359459559659759859960060160260360460560660760860961061161261361461561661761861962062162262362462562662762862963063163263363463563663763863964064164264364464564664764864965065165265365465565665765865966066166266366466566666766866967067167267367467567667767867968068168268368468568668768868969069169269369469569669769869970070170270370470570670770870971071171271371471571671771871972072172272372472572672772872973073173273373473573673773873974074174274374474574674774874975075175275375475575675775875976076176276376476576676776876977077177277377477577677777877978078178278378478578678778878979079179279379479579679779879980080180280380480580680780880981081181281381481581681781881982082182282382482582682782882983083183283383483583683783883984084184284384484584684784884985085185285385485585685785885986086186286386486586686786886987087187287387487587687787887988088188288388488588688788888989089189289389489589689789889990090190290390490590690790890991091191291391491591691791891992092192292392492592692792892993093193293393493593693793893994094194294394494594694794894995095195295395495595695795895996096196296396496596696796896997097197297397497597697797897998098198298398498598698798898999099199299399499599699799899910001001100210031004100510061007100810091010101110121013101410151016101710181019102010211022102310241025102610271028102910301031103210331034103510361037103810391040104110421043104410451046104710481049105010511052105310541055105610571058105910601061106210631064106510661067106810691070107110721073107410751076107710781079108010811082108310841085108610871088108910901091109210931094109510961097109810991100110111021103110411051106110711081109111011111112111311141115111611171118111911201121112211231124112511261127112811291130113111321133113411351136113711381139114011411142114311441145114611471148114911501151115211531154115511561157115811591160116111621163116411651166116711681169117011711172117311741175117611771178117911801181118211831184118511861187118811891190119111921193119411951196119711981199120012011202120312041205120612071208120912101211121212131214121512161217121812191220122112221223122412251226122712281229123012311232123312341235123612371238123912401241124212431244124512461247124812491250125112521253125412551256125712581259126012611262126312641265126612671268126912701271127212731274127512761277127812791280128112821283128412851286128712881289129012911292129312941295129612971298129913001301130213031304130513061307130813091310131113121313131413151316131713181319132013211322132313241325132613271328132913301331133213331334133513361337133813391340134113421343134413451346134713481349135013511352135313541355135613571358135913601361136213631364136513661367136813691370137113721373137413751376137713781379138013811382138313841385138613871388138913901391139213931394139513961397139813991400140114021403140414051406140714081409141014111412141314141415141614171418141914201421142214231424142514261427142814291430143114321433143414351436143714381439144014411442144314441445144614471448144914501451145214531454145514561457145814591460146114621463146414651466146714681469147014711472147314741475147614771478147914801481148214831484148514861487148814891490149114921493149414951496149714981499150015011502150315041505150615071508150915101511151215131514151515161517151815191520152115221523152415251526152715281529153015311532153315341535153615371538153915401541154215431544154515461547154815491550155115521553155415551556155715581559156015611562156315641565156615671568156915701571157215731574157515761577157815791580158115821583158415851586158715881589159015911592159315941595159615971598159916001601160216031604160516061607160816091610161116121613161416151616161716181619162016211622162316241625162616271628162916301631163216331634163516361637163816391640164116421643164416451646164716481649165016511652165316541655165616571658165916601661166216631664166516661667166816691670167116721673167416751676167716781679168016811682168316841685168616871688168916901691169216931694169516961697169816991700170117021703170417051706170717081709171017111712171317141715171617171718171917201721172217231724172517261727172817291730173117321733173417351736173717381739174017411742174317441745174617471748174917501751175217531754175517561757175817591760176117621763176417651766176717681769177017711772177317741775177617771778177917801781178217831784178517861787178817891790179117921793179417951796179717981799180018011802180318041805180618071808180918101811181218131814181518161817181818191820182118221823182418251826182718281829183018311832183318341835183618371838183918401841184218431844184518461847184818491850185118521853185418551856185718581859186018611862186318641865186618671868186918701871187218731874187518761877187818791880188118821883188418851886188718881889189018911892189318941895189618971898189919001901190219031904190519061907190819091910191119121913191419151916191719181919192019211922192319241925192619271928192919301931193219331934193519361937193819391940194119421943194419451946194719481949195019511952195319541955195619571958195919601961196219631964196519661967196819691970197119721973197419751976197719781979198019811982198319841985198619871988198919901991199219931994199519961997199819992000200120022003200420052006200720082009201020112012201320142015201620172018201920202021202220232024202520262027202820292030203120322033203420352036203720382039204020412042204320442045204620472048204920502051205220532054205520562057205820592060206120622063206420652066206720682069207020712072207320742075207620772078207920802081208220832084208520862087208820892090209120922093209420952096209720982099210021012102210321042105210621072108210921102111211221132114211521162117211821192120212121222123212421252126212721282129213021312132213321342135213621372138213921402141214221432144214521462147
  1. /*
  2. * w83795.c - Linux kernel driver for hardware monitoring
  3. * Copyright (C) 2008 Nuvoton Technology Corp.
  4. * Wei Song
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation - version 2.
  9. *
  10. * This program is distributed in the hope that it will be useful,
  11. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. * GNU General Public License for more details.
  14. *
  15. * You should have received a copy of the GNU General Public License
  16. * along with this program; if not, write to the Free Software
  17. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
  18. * 02110-1301 USA.
  19. *
  20. * Supports following chips:
  21. *
  22. * Chip #vin #fanin #pwm #temp #dts wchipid vendid i2c ISA
  23. * w83795g 21 14 8 6 8 0x79 0x5ca3 yes no
  24. * w83795adg 18 14 2 6 8 0x79 0x5ca3 yes no
  25. */
  26. #include <linux/kernel.h>
  27. #include <linux/module.h>
  28. #include <linux/init.h>
  29. #include <linux/slab.h>
  30. #include <linux/i2c.h>
  31. #include <linux/hwmon.h>
  32. #include <linux/hwmon-sysfs.h>
  33. #include <linux/err.h>
  34. #include <linux/mutex.h>
  35. #include <linux/delay.h>
  36. /* Addresses to scan */
  37. static unsigned short normal_i2c[] = { 0x2c, 0x2d, 0x2e, 0x2f, I2C_CLIENT_END };
  38. static int reset;
  39. module_param(reset, bool, 0);
  40. MODULE_PARM_DESC(reset, "Set to 1 to reset chip, not recommended");
  41. #define W83795_REG_BANKSEL 0x00
  42. #define W83795_REG_VENDORID 0xfd
  43. #define W83795_REG_CHIPID 0xfe
  44. #define W83795_REG_DEVICEID 0xfb
  45. #define W83795_REG_DEVICEID_A 0xff
  46. #define W83795_REG_I2C_ADDR 0xfc
  47. #define W83795_REG_CONFIG 0x01
  48. #define W83795_REG_CONFIG_CONFIG48 0x04
  49. /* Multi-Function Pin Ctrl Registers */
  50. #define W83795_REG_VOLT_CTRL1 0x02
  51. #define W83795_REG_VOLT_CTRL2 0x03
  52. #define W83795_REG_TEMP_CTRL1 0x04
  53. #define W83795_REG_TEMP_CTRL2 0x05
  54. #define W83795_REG_FANIN_CTRL1 0x06
  55. #define W83795_REG_FANIN_CTRL2 0x07
  56. #define W83795_REG_VMIGB_CTRL 0x08
  57. #define TEMP_CTRL_DISABLE 0
  58. #define TEMP_CTRL_TD 1
  59. #define TEMP_CTRL_VSEN 2
  60. #define TEMP_CTRL_TR 3
  61. #define TEMP_CTRL_SHIFT 4
  62. #define TEMP_CTRL_HASIN_SHIFT 5
  63. /* temp mode may effect VSEN17-12 (in20-15) */
  64. static u16 W83795_REG_TEMP_CTRL[][6] = {
  65. /* Disable, TD, VSEN, TR, register shift value, has_in shift num */
  66. {0x00, 0x01, 0x02, 0x03, 0, 17}, /* TR1 */
  67. {0x00, 0x04, 0x08, 0x0C, 2, 18}, /* TR2 */
  68. {0x00, 0x10, 0x20, 0x30, 4, 19}, /* TR3 */
  69. {0x00, 0x40, 0x80, 0xC0, 6, 20}, /* TR4 */
  70. {0x00, 0x00, 0x02, 0x03, 0, 15}, /* TR5 */
  71. {0x00, 0x00, 0x08, 0x0C, 2, 16}, /* TR6 */
  72. };
  73. #define TEMP_READ 0
  74. #define TEMP_CRIT 1
  75. #define TEMP_CRIT_HYST 2
  76. #define TEMP_WARN 3
  77. #define TEMP_WARN_HYST 4
  78. /* only crit and crit_hyst affect real-time alarm status
  79. * current crit crit_hyst warn warn_hyst */
  80. static u16 W83795_REG_TEMP[][5] = {
  81. {0x21, 0x96, 0x97, 0x98, 0x99}, /* TD1/TR1 */
  82. {0x22, 0x9a, 0x9b, 0x9c, 0x9d}, /* TD2/TR2 */
  83. {0x23, 0x9e, 0x9f, 0xa0, 0xa1}, /* TD3/TR3 */
  84. {0x24, 0xa2, 0xa3, 0xa4, 0xa5}, /* TD4/TR4 */
  85. {0x1f, 0xa6, 0xa7, 0xa8, 0xa9}, /* TR5 */
  86. {0x20, 0xaa, 0xab, 0xac, 0xad}, /* TR6 */
  87. };
  88. #define IN_READ 0
  89. #define IN_MAX 1
  90. #define IN_LOW 2
  91. static const u16 W83795_REG_IN[][3] = {
  92. /* Current, HL, LL */
  93. {0x10, 0x70, 0x71}, /* VSEN1 */
  94. {0x11, 0x72, 0x73}, /* VSEN2 */
  95. {0x12, 0x74, 0x75}, /* VSEN3 */
  96. {0x13, 0x76, 0x77}, /* VSEN4 */
  97. {0x14, 0x78, 0x79}, /* VSEN5 */
  98. {0x15, 0x7a, 0x7b}, /* VSEN6 */
  99. {0x16, 0x7c, 0x7d}, /* VSEN7 */
  100. {0x17, 0x7e, 0x7f}, /* VSEN8 */
  101. {0x18, 0x80, 0x81}, /* VSEN9 */
  102. {0x19, 0x82, 0x83}, /* VSEN10 */
  103. {0x1A, 0x84, 0x85}, /* VSEN11 */
  104. {0x1B, 0x86, 0x87}, /* VTT */
  105. {0x1C, 0x88, 0x89}, /* 3VDD */
  106. {0x1D, 0x8a, 0x8b}, /* 3VSB */
  107. {0x1E, 0x8c, 0x8d}, /* VBAT */
  108. {0x1F, 0xa6, 0xa7}, /* VSEN12 */
  109. {0x20, 0xaa, 0xab}, /* VSEN13 */
  110. {0x21, 0x96, 0x97}, /* VSEN14 */
  111. {0x22, 0x9a, 0x9b}, /* VSEN15 */
  112. {0x23, 0x9e, 0x9f}, /* VSEN16 */
  113. {0x24, 0xa2, 0xa3}, /* VSEN17 */
  114. };
  115. #define W83795_REG_VRLSB 0x3C
  116. #define VRLSB_SHIFT 6
  117. static const u8 W83795_REG_IN_HL_LSB[] = {
  118. 0x8e, /* VSEN1-4 */
  119. 0x90, /* VSEN5-8 */
  120. 0x92, /* VSEN9-11 */
  121. 0x94, /* VTT, 3VDD, 3VSB, 3VBAT */
  122. 0xa8, /* VSEN12 */
  123. 0xac, /* VSEN13 */
  124. 0x98, /* VSEN14 */
  125. 0x9c, /* VSEN15 */
  126. 0xa0, /* VSEN16 */
  127. 0xa4, /* VSEN17 */
  128. };
  129. #define IN_LSB_REG(index, type) \
  130. (((type) == 1) ? W83795_REG_IN_HL_LSB[(index)] \
  131. : (W83795_REG_IN_HL_LSB[(index)] + 1))
  132. #define IN_LSB_REG_NUM 10
  133. #define IN_LSB_SHIFT 0
  134. #define IN_LSB_IDX 1
  135. static const u8 IN_LSB_SHIFT_IDX[][2] = {
  136. /* High/Low LSB shift, LSB No. */
  137. {0x00, 0x00}, /* VSEN1 */
  138. {0x02, 0x00}, /* VSEN2 */
  139. {0x04, 0x00}, /* VSEN3 */
  140. {0x06, 0x00}, /* VSEN4 */
  141. {0x00, 0x01}, /* VSEN5 */
  142. {0x02, 0x01}, /* VSEN6 */
  143. {0x04, 0x01}, /* VSEN7 */
  144. {0x06, 0x01}, /* VSEN8 */
  145. {0x00, 0x02}, /* VSEN9 */
  146. {0x02, 0x02}, /* VSEN10 */
  147. {0x04, 0x02}, /* VSEN11 */
  148. {0x00, 0x03}, /* VTT */
  149. {0x02, 0x03}, /* 3VDD */
  150. {0x04, 0x03}, /* 3VSB */
  151. {0x06, 0x03}, /* VBAT */
  152. {0x06, 0x04}, /* VSEN12 */
  153. {0x06, 0x05}, /* VSEN13 */
  154. {0x06, 0x06}, /* VSEN14 */
  155. {0x06, 0x07}, /* VSEN15 */
  156. {0x06, 0x08}, /* VSEN16 */
  157. {0x06, 0x09}, /* VSEN17 */
  158. };
  159. /* 3VDD, 3VSB, VBAT * 0.006 */
  160. #define REST_VLT_BEGIN 12 /* the 13th volt to 15th */
  161. #define REST_VLT_END 14 /* the 13th volt to 15th */
  162. #define W83795_REG_FAN(index) (0x2E + (index))
  163. #define W83795_REG_FAN_MIN_HL(index) (0xB6 + (index))
  164. #define W83795_REG_FAN_MIN_LSB(index) (0xC4 + (index) / 2)
  165. #define W83795_REG_FAN_MIN_LSB_SHIFT(index) \
  166. (((index) % 1) ? 4 : 0)
  167. #define W83795_REG_VID_CTRL 0x6A
  168. #define ALARM_BEEP_REG_NUM 6
  169. #define W83795_REG_ALARM(index) (0x41 + (index))
  170. #define W83795_REG_BEEP(index) (0x50 + (index))
  171. #define W83795_REG_CLR_CHASSIS 0x4D
  172. #define W83795_REG_TEMP_NUM 6
  173. #define W83795_REG_FCMS1 0x201
  174. #define W83795_REG_FCMS2 0x208
  175. #define W83795_REG_TFMR(index) (0x202 + (index))
  176. #define W83795_REG_FOMC 0x20F
  177. #define W83795_REG_FOPFP(index) (0x218 + (index))
  178. #define W83795_REG_TSS(index) (0x209 + (index))
  179. #define PWM_OUTPUT 0
  180. #define PWM_START 1
  181. #define PWM_NONSTOP 2
  182. #define PWM_STOP_TIME 3
  183. #define PWM_DIV 4
  184. #define W83795_REG_PWM(index, nr) \
  185. (((nr) == 0 ? 0x210 : \
  186. (nr) == 1 ? 0x220 : \
  187. (nr) == 2 ? 0x228 : \
  188. (nr) == 3 ? 0x230 : 0x218) + (index))
  189. #define W83795_REG_FOPFP_DIV(index) \
  190. (((index) < 8) ? ((index) + 1) : \
  191. ((index) == 8) ? 12 : \
  192. (16 << ((index) - 9)))
  193. #define W83795_REG_FTSH(index) (0x240 + (index) * 2)
  194. #define W83795_REG_FTSL(index) (0x241 + (index) * 2)
  195. #define W83795_REG_TFTS 0x250
  196. #define TEMP_PWM_TTTI 0
  197. #define TEMP_PWM_CTFS 1
  198. #define TEMP_PWM_HCT 2
  199. #define TEMP_PWM_HOT 3
  200. #define W83795_REG_TTTI(index) (0x260 + (index))
  201. #define W83795_REG_CTFS(index) (0x268 + (index))
  202. #define W83795_REG_HT(index) (0x270 + (index))
  203. #define SF4_TEMP 0
  204. #define SF4_PWM 1
  205. #define W83795_REG_SF4_TEMP(temp_num, index) \
  206. (0x280 + 0x10 * (temp_num) + (index))
  207. #define W83795_REG_SF4_PWM(temp_num, index) \
  208. (0x288 + 0x10 * (temp_num) + (index))
  209. #define W83795_REG_DTSC 0x301
  210. #define W83795_REG_DTSE 0x302
  211. #define W83795_REG_DTS(index) (0x26 + (index))
  212. #define DTS_CRIT 0
  213. #define DTS_CRIT_HYST 1
  214. #define DTS_WARN 2
  215. #define DTS_WARN_HYST 3
  216. #define W83795_REG_DTS_EXT(index) (0xB2 + (index))
  217. #define SETUP_PWM_DEFAULT 0
  218. #define SETUP_PWM_UPTIME 1
  219. #define SETUP_PWM_DOWNTIME 2
  220. #define W83795_REG_SETUP_PWM(index) (0x20C + (index))
  221. static inline u16 in_from_reg(u8 index, u16 val)
  222. {
  223. if ((index >= REST_VLT_BEGIN) && (index <= REST_VLT_END))
  224. return val * 6;
  225. else
  226. return val * 2;
  227. }
  228. static inline u16 in_to_reg(u8 index, u16 val)
  229. {
  230. if ((index >= REST_VLT_BEGIN) && (index <= REST_VLT_END))
  231. return val / 6;
  232. else
  233. return val / 2;
  234. }
  235. static inline unsigned long fan_from_reg(u16 val)
  236. {
  237. if ((val >= 0xff0) || (val == 0))
  238. return 0;
  239. return 1350000UL / val;
  240. }
  241. static inline u16 fan_to_reg(long rpm)
  242. {
  243. if (rpm <= 0)
  244. return 0x0fff;
  245. return SENSORS_LIMIT((1350000 + (rpm >> 1)) / rpm, 1, 0xffe);
  246. }
  247. static inline unsigned long time_from_reg(u8 reg)
  248. {
  249. return reg * 100;
  250. }
  251. static inline u8 time_to_reg(unsigned long val)
  252. {
  253. return SENSORS_LIMIT((val + 50) / 100, 0, 0xff);
  254. }
  255. static inline long temp_from_reg(s8 reg)
  256. {
  257. return reg * 1000;
  258. }
  259. static inline s8 temp_to_reg(long val, s8 min, s8 max)
  260. {
  261. return SENSORS_LIMIT((val < 0 ? -val : val) / 1000, min, max);
  262. }
  263. enum chip_types {w83795g, w83795adg};
  264. struct w83795_data {
  265. struct device *hwmon_dev;
  266. struct mutex update_lock;
  267. unsigned long last_updated; /* In jiffies */
  268. enum chip_types chip_type;
  269. u8 bank;
  270. u32 has_in; /* Enable monitor VIN or not */
  271. u16 in[21][3]; /* Register value, read/high/low */
  272. u8 in_lsb[10][3]; /* LSB Register value, high/low */
  273. u8 has_gain; /* has gain: in17-20 * 8 */
  274. u16 has_fan; /* Enable fan14-1 or not */
  275. u16 fan[14]; /* Register value combine */
  276. u16 fan_min[14]; /* Register value combine */
  277. u8 has_temp; /* Enable monitor temp6-1 or not */
  278. u8 temp[6][5]; /* current, crit, crit_hyst, warn, warn_hyst */
  279. u8 temp_read_vrlsb[6];
  280. u8 temp_mode; /* bit 0: TR mode, bit 1: TD mode */
  281. u8 temp_src[3]; /* Register value */
  282. u8 enable_dts; /* Enable PECI and SB-TSI,
  283. * bit 0: =1 enable, =0 disable,
  284. * bit 1: =1 AMD SB-TSI, =0 Intel PECI */
  285. u8 has_dts; /* Enable monitor DTS temp */
  286. u8 dts[8]; /* Register value */
  287. u8 dts_read_vrlsb[8]; /* Register value */
  288. u8 dts_ext[4]; /* Register value */
  289. u8 has_pwm; /* 795g supports 8 pwm, 795adg only supports 2,
  290. * no config register, only affected by chip
  291. * type */
  292. u8 pwm[8][5]; /* Register value, output, start, non stop, stop
  293. * time, div */
  294. u8 pwm_fcms[2]; /* Register value */
  295. u8 pwm_tfmr[6]; /* Register value */
  296. u8 pwm_fomc; /* Register value */
  297. u16 target_speed[8]; /* Register value, target speed for speed
  298. * cruise */
  299. u8 tol_speed; /* tolerance of target speed */
  300. u8 pwm_temp[6][4]; /* TTTI, CTFS, HCT, HOT */
  301. u8 sf4_reg[6][2][7]; /* 6 temp, temp/dcpwm, 7 registers */
  302. u8 setup_pwm[3]; /* Register value */
  303. u8 alarms[6]; /* Register value */
  304. u8 beeps[6]; /* Register value */
  305. u8 beep_enable;
  306. char valid;
  307. };
  308. /*
  309. * Hardware access
  310. * We assume that nobdody can change the bank outside the driver.
  311. */
  312. /* Must be called with data->update_lock held, except during initialization */
  313. static int w83795_set_bank(struct i2c_client *client, u8 bank)
  314. {
  315. struct w83795_data *data = i2c_get_clientdata(client);
  316. int err;
  317. /* If the same bank is already set, nothing to do */
  318. if ((data->bank & 0x07) == bank)
  319. return 0;
  320. /* Change to new bank, preserve all other bits */
  321. bank |= data->bank & ~0x07;
  322. err = i2c_smbus_write_byte_data(client, W83795_REG_BANKSEL, bank);
  323. if (err < 0) {
  324. dev_err(&client->dev,
  325. "Failed to set bank to %d, err %d\n",
  326. (int)bank, err);
  327. return err;
  328. }
  329. data->bank = bank;
  330. return 0;
  331. }
  332. /* Must be called with data->update_lock held, except during initialization */
  333. static u8 w83795_read(struct i2c_client *client, u16 reg)
  334. {
  335. int err;
  336. err = w83795_set_bank(client, reg >> 8);
  337. if (err < 0)
  338. return 0x00; /* Arbitrary */
  339. err = i2c_smbus_read_byte_data(client, reg & 0xff);
  340. if (err < 0) {
  341. dev_err(&client->dev,
  342. "Failed to read from register 0x%03x, err %d\n",
  343. (int)reg, err);
  344. return 0x00; /* Arbitrary */
  345. }
  346. return err;
  347. }
  348. /* Must be called with data->update_lock held, except during initialization */
  349. static int w83795_write(struct i2c_client *client, u16 reg, u8 value)
  350. {
  351. int err;
  352. err = w83795_set_bank(client, reg >> 8);
  353. if (err < 0)
  354. return err;
  355. err = i2c_smbus_write_byte_data(client, reg & 0xff, value);
  356. if (err < 0)
  357. dev_err(&client->dev,
  358. "Failed to write to register 0x%03x, err %d\n",
  359. (int)reg, err);
  360. return err;
  361. }
  362. static struct w83795_data *w83795_update_device(struct device *dev)
  363. {
  364. struct i2c_client *client = to_i2c_client(dev);
  365. struct w83795_data *data = i2c_get_clientdata(client);
  366. u16 tmp;
  367. int i;
  368. mutex_lock(&data->update_lock);
  369. if (!(time_after(jiffies, data->last_updated + HZ * 2)
  370. || !data->valid))
  371. goto END;
  372. /* Update the voltages value */
  373. for (i = 0; i < ARRAY_SIZE(data->in); i++) {
  374. if (!(data->has_in & (1 << i)))
  375. continue;
  376. tmp = w83795_read(client, W83795_REG_IN[i][IN_READ]) << 2;
  377. tmp |= (w83795_read(client, W83795_REG_VRLSB)
  378. >> VRLSB_SHIFT) & 0x03;
  379. data->in[i][IN_READ] = tmp;
  380. }
  381. /* Update fan */
  382. for (i = 0; i < ARRAY_SIZE(data->fan); i++) {
  383. if (!(data->has_fan & (1 << i)))
  384. continue;
  385. data->fan[i] = w83795_read(client, W83795_REG_FAN(i)) << 4;
  386. data->fan[i] |=
  387. (w83795_read(client, W83795_REG_VRLSB >> 4)) & 0x0F;
  388. }
  389. /* Update temperature */
  390. for (i = 0; i < ARRAY_SIZE(data->temp); i++) {
  391. /* even stop monitor, register still keep value, just read out
  392. * it */
  393. if (!(data->has_temp & (1 << i))) {
  394. data->temp[i][TEMP_READ] = 0;
  395. data->temp_read_vrlsb[i] = 0;
  396. continue;
  397. }
  398. data->temp[i][TEMP_READ] =
  399. w83795_read(client, W83795_REG_TEMP[i][TEMP_READ]);
  400. data->temp_read_vrlsb[i] =
  401. w83795_read(client, W83795_REG_VRLSB);
  402. }
  403. /* Update dts temperature */
  404. if (data->enable_dts != 0) {
  405. for (i = 0; i < ARRAY_SIZE(data->dts); i++) {
  406. if (!(data->has_dts & (1 << i)))
  407. continue;
  408. data->dts[i] =
  409. w83795_read(client, W83795_REG_DTS(i));
  410. data->dts_read_vrlsb[i] =
  411. w83795_read(client, W83795_REG_VRLSB);
  412. }
  413. }
  414. /* Update pwm output */
  415. for (i = 0; i < data->has_pwm; i++) {
  416. data->pwm[i][PWM_OUTPUT] =
  417. w83795_read(client, W83795_REG_PWM(i, PWM_OUTPUT));
  418. }
  419. /* update alarm */
  420. for (i = 0; i < ALARM_BEEP_REG_NUM; i++)
  421. data->alarms[i] = w83795_read(client, W83795_REG_ALARM(i));
  422. data->last_updated = jiffies;
  423. data->valid = 1;
  424. END:
  425. mutex_unlock(&data->update_lock);
  426. return data;
  427. }
  428. /*
  429. * Sysfs attributes
  430. */
  431. #define ALARM_STATUS 0
  432. #define BEEP_ENABLE 1
  433. static ssize_t
  434. show_alarm_beep(struct device *dev, struct device_attribute *attr, char *buf)
  435. {
  436. struct w83795_data *data = w83795_update_device(dev);
  437. struct sensor_device_attribute_2 *sensor_attr =
  438. to_sensor_dev_attr_2(attr);
  439. int nr = sensor_attr->nr;
  440. int index = sensor_attr->index >> 3;
  441. int bit = sensor_attr->index & 0x07;
  442. u8 val;
  443. if (ALARM_STATUS == nr) {
  444. val = (data->alarms[index] >> (bit)) & 1;
  445. } else { /* BEEP_ENABLE */
  446. val = (data->beeps[index] >> (bit)) & 1;
  447. }
  448. return sprintf(buf, "%u\n", val);
  449. }
  450. static ssize_t
  451. store_beep(struct device *dev, struct device_attribute *attr,
  452. const char *buf, size_t count)
  453. {
  454. struct i2c_client *client = to_i2c_client(dev);
  455. struct w83795_data *data = i2c_get_clientdata(client);
  456. struct sensor_device_attribute_2 *sensor_attr =
  457. to_sensor_dev_attr_2(attr);
  458. int index = sensor_attr->index >> 3;
  459. int shift = sensor_attr->index & 0x07;
  460. u8 beep_bit = 1 << shift;
  461. unsigned long val;
  462. if (strict_strtoul(buf, 10, &val) < 0)
  463. return -EINVAL;
  464. if (val != 0 && val != 1)
  465. return -EINVAL;
  466. mutex_lock(&data->update_lock);
  467. data->beeps[index] = w83795_read(client, W83795_REG_BEEP(index));
  468. data->beeps[index] &= ~beep_bit;
  469. data->beeps[index] |= val << shift;
  470. w83795_write(client, W83795_REG_BEEP(index), data->beeps[index]);
  471. mutex_unlock(&data->update_lock);
  472. return count;
  473. }
  474. static ssize_t
  475. show_beep_enable(struct device *dev, struct device_attribute *attr, char *buf)
  476. {
  477. struct i2c_client *client = to_i2c_client(dev);
  478. struct w83795_data *data = i2c_get_clientdata(client);
  479. return sprintf(buf, "%u\n", data->beep_enable);
  480. }
  481. static ssize_t
  482. store_beep_enable(struct device *dev, struct device_attribute *attr,
  483. const char *buf, size_t count)
  484. {
  485. struct i2c_client *client = to_i2c_client(dev);
  486. struct w83795_data *data = i2c_get_clientdata(client);
  487. unsigned long val;
  488. u8 tmp;
  489. if (strict_strtoul(buf, 10, &val) < 0)
  490. return -EINVAL;
  491. if (val != 0 && val != 1)
  492. return -EINVAL;
  493. mutex_lock(&data->update_lock);
  494. data->beep_enable = val;
  495. tmp = w83795_read(client, W83795_REG_BEEP(5));
  496. tmp &= 0x7f;
  497. tmp |= val << 7;
  498. w83795_write(client, W83795_REG_BEEP(5), tmp);
  499. mutex_unlock(&data->update_lock);
  500. return count;
  501. }
  502. /* Write any value to clear chassis alarm */
  503. static ssize_t
  504. store_chassis_clear(struct device *dev,
  505. struct device_attribute *attr, const char *buf,
  506. size_t count)
  507. {
  508. struct i2c_client *client = to_i2c_client(dev);
  509. struct w83795_data *data = i2c_get_clientdata(client);
  510. u8 val;
  511. mutex_lock(&data->update_lock);
  512. val = w83795_read(client, W83795_REG_CLR_CHASSIS);
  513. val |= 0x80;
  514. w83795_write(client, W83795_REG_CLR_CHASSIS, val);
  515. mutex_unlock(&data->update_lock);
  516. return count;
  517. }
  518. #define FAN_INPUT 0
  519. #define FAN_MIN 1
  520. static ssize_t
  521. show_fan(struct device *dev, struct device_attribute *attr, char *buf)
  522. {
  523. struct sensor_device_attribute_2 *sensor_attr =
  524. to_sensor_dev_attr_2(attr);
  525. int nr = sensor_attr->nr;
  526. int index = sensor_attr->index;
  527. struct w83795_data *data = w83795_update_device(dev);
  528. u16 val;
  529. if (FAN_INPUT == nr)
  530. val = data->fan[index] & 0x0fff;
  531. else
  532. val = data->fan_min[index] & 0x0fff;
  533. return sprintf(buf, "%lu\n", fan_from_reg(val));
  534. }
  535. static ssize_t
  536. store_fan_min(struct device *dev, struct device_attribute *attr,
  537. const char *buf, size_t count)
  538. {
  539. struct sensor_device_attribute_2 *sensor_attr =
  540. to_sensor_dev_attr_2(attr);
  541. int index = sensor_attr->index;
  542. struct i2c_client *client = to_i2c_client(dev);
  543. struct w83795_data *data = i2c_get_clientdata(client);
  544. unsigned long val;
  545. if (strict_strtoul(buf, 10, &val))
  546. return -EINVAL;
  547. val = fan_to_reg(val);
  548. mutex_lock(&data->update_lock);
  549. data->fan_min[index] = val;
  550. w83795_write(client, W83795_REG_FAN_MIN_HL(index), (val >> 4) & 0xff);
  551. val &= 0x0f;
  552. if (index % 1) {
  553. val <<= 4;
  554. val |= w83795_read(client, W83795_REG_FAN_MIN_LSB(index))
  555. & 0x0f;
  556. } else {
  557. val |= w83795_read(client, W83795_REG_FAN_MIN_LSB(index))
  558. & 0xf0;
  559. }
  560. w83795_write(client, W83795_REG_FAN_MIN_LSB(index), val & 0xff);
  561. mutex_unlock(&data->update_lock);
  562. return count;
  563. }
  564. static ssize_t
  565. show_pwm(struct device *dev, struct device_attribute *attr, char *buf)
  566. {
  567. struct w83795_data *data = w83795_update_device(dev);
  568. struct sensor_device_attribute_2 *sensor_attr =
  569. to_sensor_dev_attr_2(attr);
  570. int nr = sensor_attr->nr;
  571. int index = sensor_attr->index;
  572. u16 val;
  573. switch (nr) {
  574. case PWM_STOP_TIME:
  575. val = time_from_reg(data->pwm[index][nr]);
  576. break;
  577. case PWM_DIV:
  578. val = W83795_REG_FOPFP_DIV(data->pwm[index][nr] & 0x0f);
  579. break;
  580. default:
  581. val = data->pwm[index][nr];
  582. break;
  583. }
  584. return sprintf(buf, "%u\n", val);
  585. }
  586. static ssize_t
  587. store_pwm(struct device *dev, struct device_attribute *attr,
  588. const char *buf, size_t count)
  589. {
  590. struct i2c_client *client = to_i2c_client(dev);
  591. struct w83795_data *data = i2c_get_clientdata(client);
  592. struct sensor_device_attribute_2 *sensor_attr =
  593. to_sensor_dev_attr_2(attr);
  594. int nr = sensor_attr->nr;
  595. int index = sensor_attr->index;
  596. unsigned long val;
  597. int i;
  598. if (strict_strtoul(buf, 10, &val) < 0)
  599. return -EINVAL;
  600. mutex_lock(&data->update_lock);
  601. switch (nr) {
  602. case PWM_STOP_TIME:
  603. val = time_to_reg(val);
  604. break;
  605. case PWM_DIV:
  606. for (i = 0; i < 16; i++) {
  607. if (W83795_REG_FOPFP_DIV(i) == val) {
  608. val = i;
  609. break;
  610. }
  611. }
  612. if (i >= 16)
  613. goto err_end;
  614. val |= w83795_read(client, W83795_REG_PWM(index, nr)) & 0x80;
  615. break;
  616. default:
  617. val = SENSORS_LIMIT(val, 0, 0xff);
  618. break;
  619. }
  620. w83795_write(client, W83795_REG_PWM(index, nr), val);
  621. data->pwm[index][nr] = val & 0xff;
  622. mutex_unlock(&data->update_lock);
  623. return count;
  624. err_end:
  625. mutex_unlock(&data->update_lock);
  626. return -EINVAL;
  627. }
  628. static ssize_t
  629. show_pwm_enable(struct device *dev, struct device_attribute *attr, char *buf)
  630. {
  631. struct sensor_device_attribute_2 *sensor_attr =
  632. to_sensor_dev_attr_2(attr);
  633. struct i2c_client *client = to_i2c_client(dev);
  634. struct w83795_data *data = i2c_get_clientdata(client);
  635. int index = sensor_attr->index;
  636. u8 tmp;
  637. if (1 == (data->pwm_fcms[0] & (1 << index))) {
  638. tmp = 2;
  639. goto out;
  640. }
  641. for (tmp = 0; tmp < 6; tmp++) {
  642. if (data->pwm_tfmr[tmp] & (1 << index)) {
  643. tmp = 3;
  644. goto out;
  645. }
  646. }
  647. if (data->pwm_fomc & (1 << index))
  648. tmp = 0;
  649. else
  650. tmp = 1;
  651. out:
  652. return sprintf(buf, "%u\n", tmp);
  653. }
  654. static ssize_t
  655. store_pwm_enable(struct device *dev, struct device_attribute *attr,
  656. const char *buf, size_t count)
  657. {
  658. struct i2c_client *client = to_i2c_client(dev);
  659. struct w83795_data *data = i2c_get_clientdata(client);
  660. struct sensor_device_attribute_2 *sensor_attr =
  661. to_sensor_dev_attr_2(attr);
  662. int index = sensor_attr->index;
  663. unsigned long val;
  664. int i;
  665. if (strict_strtoul(buf, 10, &val) < 0)
  666. return -EINVAL;
  667. if (val > 2)
  668. return -EINVAL;
  669. mutex_lock(&data->update_lock);
  670. switch (val) {
  671. case 0:
  672. case 1:
  673. data->pwm_fcms[0] &= ~(1 << index);
  674. w83795_write(client, W83795_REG_FCMS1, data->pwm_fcms[0]);
  675. for (i = 0; i < 6; i++) {
  676. data->pwm_tfmr[i] &= ~(1 << index);
  677. w83795_write(client, W83795_REG_TFMR(i),
  678. data->pwm_tfmr[i]);
  679. }
  680. data->pwm_fomc |= 1 << index;
  681. data->pwm_fomc ^= val << index;
  682. w83795_write(client, W83795_REG_FOMC, data->pwm_fomc);
  683. break;
  684. case 2:
  685. data->pwm_fcms[0] |= (1 << index);
  686. w83795_write(client, W83795_REG_FCMS1, data->pwm_fcms[0]);
  687. break;
  688. }
  689. mutex_unlock(&data->update_lock);
  690. return count;
  691. }
  692. static ssize_t
  693. show_temp_src(struct device *dev, struct device_attribute *attr, char *buf)
  694. {
  695. struct sensor_device_attribute_2 *sensor_attr =
  696. to_sensor_dev_attr_2(attr);
  697. struct i2c_client *client = to_i2c_client(dev);
  698. struct w83795_data *data = i2c_get_clientdata(client);
  699. int index = sensor_attr->index;
  700. u8 val = index / 2;
  701. u8 tmp = data->temp_src[val];
  702. if (index % 1)
  703. val = 4;
  704. else
  705. val = 0;
  706. tmp >>= val;
  707. tmp &= 0x0f;
  708. return sprintf(buf, "%u\n", tmp);
  709. }
  710. static ssize_t
  711. store_temp_src(struct device *dev, struct device_attribute *attr,
  712. const char *buf, size_t count)
  713. {
  714. struct i2c_client *client = to_i2c_client(dev);
  715. struct w83795_data *data = i2c_get_clientdata(client);
  716. struct sensor_device_attribute_2 *sensor_attr =
  717. to_sensor_dev_attr_2(attr);
  718. int index = sensor_attr->index;
  719. unsigned long tmp;
  720. u8 val = index / 2;
  721. if (strict_strtoul(buf, 10, &tmp) < 0)
  722. return -EINVAL;
  723. tmp = SENSORS_LIMIT(tmp, 0, 15);
  724. mutex_lock(&data->update_lock);
  725. if (index % 1) {
  726. tmp <<= 4;
  727. data->temp_src[val] &= 0x0f;
  728. } else {
  729. data->temp_src[val] &= 0xf0;
  730. }
  731. data->temp_src[val] |= tmp;
  732. w83795_write(client, W83795_REG_TSS(val), data->temp_src[val]);
  733. mutex_unlock(&data->update_lock);
  734. return count;
  735. }
  736. #define TEMP_PWM_ENABLE 0
  737. #define TEMP_PWM_FAN_MAP 1
  738. static ssize_t
  739. show_temp_pwm_enable(struct device *dev, struct device_attribute *attr,
  740. char *buf)
  741. {
  742. struct i2c_client *client = to_i2c_client(dev);
  743. struct w83795_data *data = i2c_get_clientdata(client);
  744. struct sensor_device_attribute_2 *sensor_attr =
  745. to_sensor_dev_attr_2(attr);
  746. int nr = sensor_attr->nr;
  747. int index = sensor_attr->index;
  748. u8 tmp = 0xff;
  749. switch (nr) {
  750. case TEMP_PWM_ENABLE:
  751. tmp = (data->pwm_fcms[1] >> index) & 1;
  752. if (tmp)
  753. tmp = 4;
  754. else
  755. tmp = 3;
  756. break;
  757. case TEMP_PWM_FAN_MAP:
  758. tmp = data->pwm_tfmr[index];
  759. break;
  760. }
  761. return sprintf(buf, "%u\n", tmp);
  762. }
  763. static ssize_t
  764. store_temp_pwm_enable(struct device *dev, struct device_attribute *attr,
  765. const char *buf, size_t count)
  766. {
  767. struct i2c_client *client = to_i2c_client(dev);
  768. struct w83795_data *data = i2c_get_clientdata(client);
  769. struct sensor_device_attribute_2 *sensor_attr =
  770. to_sensor_dev_attr_2(attr);
  771. int nr = sensor_attr->nr;
  772. int index = sensor_attr->index;
  773. unsigned long tmp;
  774. if (strict_strtoul(buf, 10, &tmp) < 0)
  775. return -EINVAL;
  776. switch (nr) {
  777. case TEMP_PWM_ENABLE:
  778. if ((tmp != 3) && (tmp != 4))
  779. return -EINVAL;
  780. tmp -= 3;
  781. mutex_lock(&data->update_lock);
  782. data->pwm_fcms[1] &= ~(1 << index);
  783. data->pwm_fcms[1] |= tmp << index;
  784. w83795_write(client, W83795_REG_FCMS2, data->pwm_fcms[1]);
  785. mutex_unlock(&data->update_lock);
  786. break;
  787. case TEMP_PWM_FAN_MAP:
  788. mutex_lock(&data->update_lock);
  789. tmp = SENSORS_LIMIT(tmp, 0, 0xff);
  790. w83795_write(client, W83795_REG_TFMR(index), tmp);
  791. data->pwm_tfmr[index] = tmp;
  792. mutex_unlock(&data->update_lock);
  793. break;
  794. }
  795. return count;
  796. }
  797. #define FANIN_TARGET 0
  798. #define FANIN_TOL 1
  799. static ssize_t
  800. show_fanin(struct device *dev, struct device_attribute *attr, char *buf)
  801. {
  802. struct i2c_client *client = to_i2c_client(dev);
  803. struct w83795_data *data = i2c_get_clientdata(client);
  804. struct sensor_device_attribute_2 *sensor_attr =
  805. to_sensor_dev_attr_2(attr);
  806. int nr = sensor_attr->nr;
  807. int index = sensor_attr->index;
  808. u16 tmp = 0;
  809. switch (nr) {
  810. case FANIN_TARGET:
  811. tmp = fan_from_reg(data->target_speed[index]);
  812. break;
  813. case FANIN_TOL:
  814. tmp = data->tol_speed;
  815. break;
  816. }
  817. return sprintf(buf, "%u\n", tmp);
  818. }
  819. static ssize_t
  820. store_fanin(struct device *dev, struct device_attribute *attr,
  821. const char *buf, size_t count)
  822. {
  823. struct i2c_client *client = to_i2c_client(dev);
  824. struct w83795_data *data = i2c_get_clientdata(client);
  825. struct sensor_device_attribute_2 *sensor_attr =
  826. to_sensor_dev_attr_2(attr);
  827. int nr = sensor_attr->nr;
  828. int index = sensor_attr->index;
  829. unsigned long val;
  830. if (strict_strtoul(buf, 10, &val) < 0)
  831. return -EINVAL;
  832. mutex_lock(&data->update_lock);
  833. switch (nr) {
  834. case FANIN_TARGET:
  835. val = fan_to_reg(SENSORS_LIMIT(val, 0, 0xfff));
  836. w83795_write(client, W83795_REG_FTSH(index), (val >> 4) & 0xff);
  837. w83795_write(client, W83795_REG_FTSL(index), (val << 4) & 0xf0);
  838. data->target_speed[index] = val;
  839. break;
  840. case FANIN_TOL:
  841. val = SENSORS_LIMIT(val, 0, 0x3f);
  842. w83795_write(client, W83795_REG_TFTS, val);
  843. data->tol_speed = val;
  844. break;
  845. }
  846. mutex_unlock(&data->update_lock);
  847. return count;
  848. }
  849. static ssize_t
  850. show_temp_pwm(struct device *dev, struct device_attribute *attr, char *buf)
  851. {
  852. struct i2c_client *client = to_i2c_client(dev);
  853. struct w83795_data *data = i2c_get_clientdata(client);
  854. struct sensor_device_attribute_2 *sensor_attr =
  855. to_sensor_dev_attr_2(attr);
  856. int nr = sensor_attr->nr;
  857. int index = sensor_attr->index;
  858. long tmp = temp_from_reg(data->pwm_temp[index][nr]);
  859. return sprintf(buf, "%ld\n", tmp);
  860. }
  861. static ssize_t
  862. store_temp_pwm(struct device *dev, struct device_attribute *attr,
  863. const char *buf, size_t count)
  864. {
  865. struct i2c_client *client = to_i2c_client(dev);
  866. struct w83795_data *data = i2c_get_clientdata(client);
  867. struct sensor_device_attribute_2 *sensor_attr =
  868. to_sensor_dev_attr_2(attr);
  869. int nr = sensor_attr->nr;
  870. int index = sensor_attr->index;
  871. unsigned long val;
  872. u8 tmp;
  873. if (strict_strtoul(buf, 10, &val) < 0)
  874. return -EINVAL;
  875. val /= 1000;
  876. mutex_lock(&data->update_lock);
  877. switch (nr) {
  878. case TEMP_PWM_TTTI:
  879. val = SENSORS_LIMIT(val, 0, 0x7f);
  880. w83795_write(client, W83795_REG_TTTI(index), val);
  881. break;
  882. case TEMP_PWM_CTFS:
  883. val = SENSORS_LIMIT(val, 0, 0x7f);
  884. w83795_write(client, W83795_REG_CTFS(index), val);
  885. break;
  886. case TEMP_PWM_HCT:
  887. val = SENSORS_LIMIT(val, 0, 0x0f);
  888. tmp = w83795_read(client, W83795_REG_HT(index));
  889. tmp &= 0x0f;
  890. tmp |= (val << 4) & 0xf0;
  891. w83795_write(client, W83795_REG_HT(index), tmp);
  892. break;
  893. case TEMP_PWM_HOT:
  894. val = SENSORS_LIMIT(val, 0, 0x0f);
  895. tmp = w83795_read(client, W83795_REG_HT(index));
  896. tmp &= 0xf0;
  897. tmp |= val & 0x0f;
  898. w83795_write(client, W83795_REG_HT(index), tmp);
  899. break;
  900. }
  901. data->pwm_temp[index][nr] = val;
  902. mutex_unlock(&data->update_lock);
  903. return count;
  904. }
  905. static ssize_t
  906. show_sf4_pwm(struct device *dev, struct device_attribute *attr, char *buf)
  907. {
  908. struct i2c_client *client = to_i2c_client(dev);
  909. struct w83795_data *data = i2c_get_clientdata(client);
  910. struct sensor_device_attribute_2 *sensor_attr =
  911. to_sensor_dev_attr_2(attr);
  912. int nr = sensor_attr->nr;
  913. int index = sensor_attr->index;
  914. return sprintf(buf, "%u\n", data->sf4_reg[index][SF4_PWM][nr]);
  915. }
  916. static ssize_t
  917. store_sf4_pwm(struct device *dev, struct device_attribute *attr,
  918. const char *buf, size_t count)
  919. {
  920. struct i2c_client *client = to_i2c_client(dev);
  921. struct w83795_data *data = i2c_get_clientdata(client);
  922. struct sensor_device_attribute_2 *sensor_attr =
  923. to_sensor_dev_attr_2(attr);
  924. int nr = sensor_attr->nr;
  925. int index = sensor_attr->index;
  926. unsigned long val;
  927. if (strict_strtoul(buf, 10, &val) < 0)
  928. return -EINVAL;
  929. mutex_lock(&data->update_lock);
  930. w83795_write(client, W83795_REG_SF4_PWM(index, nr), val);
  931. data->sf4_reg[index][SF4_PWM][nr] = val;
  932. mutex_unlock(&data->update_lock);
  933. return count;
  934. }
  935. static ssize_t
  936. show_sf4_temp(struct device *dev, struct device_attribute *attr, char *buf)
  937. {
  938. struct i2c_client *client = to_i2c_client(dev);
  939. struct w83795_data *data = i2c_get_clientdata(client);
  940. struct sensor_device_attribute_2 *sensor_attr =
  941. to_sensor_dev_attr_2(attr);
  942. int nr = sensor_attr->nr;
  943. int index = sensor_attr->index;
  944. return sprintf(buf, "%u\n",
  945. (data->sf4_reg[index][SF4_TEMP][nr]) * 1000);
  946. }
  947. static ssize_t
  948. store_sf4_temp(struct device *dev, struct device_attribute *attr,
  949. const char *buf, size_t count)
  950. {
  951. struct i2c_client *client = to_i2c_client(dev);
  952. struct w83795_data *data = i2c_get_clientdata(client);
  953. struct sensor_device_attribute_2 *sensor_attr =
  954. to_sensor_dev_attr_2(attr);
  955. int nr = sensor_attr->nr;
  956. int index = sensor_attr->index;
  957. unsigned long val;
  958. if (strict_strtoul(buf, 10, &val) < 0)
  959. return -EINVAL;
  960. val /= 1000;
  961. mutex_lock(&data->update_lock);
  962. w83795_write(client, W83795_REG_SF4_TEMP(index, nr), val);
  963. data->sf4_reg[index][SF4_TEMP][nr] = val;
  964. mutex_unlock(&data->update_lock);
  965. return count;
  966. }
  967. static ssize_t
  968. show_temp(struct device *dev, struct device_attribute *attr, char *buf)
  969. {
  970. struct sensor_device_attribute_2 *sensor_attr =
  971. to_sensor_dev_attr_2(attr);
  972. int nr = sensor_attr->nr;
  973. int index = sensor_attr->index;
  974. struct w83795_data *data = w83795_update_device(dev);
  975. long temp = temp_from_reg(data->temp[index][nr] & 0x7f);
  976. if (TEMP_READ == nr)
  977. temp += ((data->temp_read_vrlsb[index] >> VRLSB_SHIFT) & 0x03)
  978. * 250;
  979. if (data->temp[index][nr] & 0x80)
  980. temp = -temp;
  981. return sprintf(buf, "%ld\n", temp);
  982. }
  983. static ssize_t
  984. store_temp(struct device *dev, struct device_attribute *attr,
  985. const char *buf, size_t count)
  986. {
  987. struct sensor_device_attribute_2 *sensor_attr =
  988. to_sensor_dev_attr_2(attr);
  989. int nr = sensor_attr->nr;
  990. int index = sensor_attr->index;
  991. struct i2c_client *client = to_i2c_client(dev);
  992. struct w83795_data *data = i2c_get_clientdata(client);
  993. long tmp;
  994. if (strict_strtol(buf, 10, &tmp) < 0)
  995. return -EINVAL;
  996. mutex_lock(&data->update_lock);
  997. data->temp[index][nr] = temp_to_reg(tmp, -128, 127);
  998. w83795_write(client, W83795_REG_TEMP[index][nr], data->temp[index][nr]);
  999. mutex_unlock(&data->update_lock);
  1000. return count;
  1001. }
  1002. static ssize_t
  1003. show_dts_mode(struct device *dev, struct device_attribute *attr, char *buf)
  1004. {
  1005. struct i2c_client *client = to_i2c_client(dev);
  1006. struct w83795_data *data = i2c_get_clientdata(client);
  1007. struct sensor_device_attribute_2 *sensor_attr =
  1008. to_sensor_dev_attr_2(attr);
  1009. int index = sensor_attr->index;
  1010. u8 tmp;
  1011. if (data->enable_dts == 0)
  1012. return sprintf(buf, "%d\n", 0);
  1013. if ((data->has_dts >> index) & 0x01) {
  1014. if (data->enable_dts & 2)
  1015. tmp = 5;
  1016. else
  1017. tmp = 6;
  1018. } else {
  1019. tmp = 0;
  1020. }
  1021. return sprintf(buf, "%d\n", tmp);
  1022. }
  1023. static ssize_t
  1024. show_dts(struct device *dev, struct device_attribute *attr, char *buf)
  1025. {
  1026. struct sensor_device_attribute_2 *sensor_attr =
  1027. to_sensor_dev_attr_2(attr);
  1028. int index = sensor_attr->index;
  1029. struct w83795_data *data = w83795_update_device(dev);
  1030. long temp = temp_from_reg(data->dts[index] & 0x7f);
  1031. temp += ((data->dts_read_vrlsb[index] >> VRLSB_SHIFT) & 0x03) * 250;
  1032. if (data->dts[index] & 0x80)
  1033. temp = -temp;
  1034. return sprintf(buf, "%ld\n", temp);
  1035. }
  1036. static ssize_t
  1037. show_dts_ext(struct device *dev, struct device_attribute *attr, char *buf)
  1038. {
  1039. struct sensor_device_attribute_2 *sensor_attr =
  1040. to_sensor_dev_attr_2(attr);
  1041. int nr = sensor_attr->nr;
  1042. struct i2c_client *client = to_i2c_client(dev);
  1043. struct w83795_data *data = i2c_get_clientdata(client);
  1044. long temp = temp_from_reg(data->dts_ext[nr] & 0x7f);
  1045. if (data->dts_ext[nr] & 0x80)
  1046. temp = -temp;
  1047. return sprintf(buf, "%ld\n", temp);
  1048. }
  1049. static ssize_t
  1050. store_dts_ext(struct device *dev, struct device_attribute *attr,
  1051. const char *buf, size_t count)
  1052. {
  1053. struct sensor_device_attribute_2 *sensor_attr =
  1054. to_sensor_dev_attr_2(attr);
  1055. int nr = sensor_attr->nr;
  1056. struct i2c_client *client = to_i2c_client(dev);
  1057. struct w83795_data *data = i2c_get_clientdata(client);
  1058. long tmp;
  1059. if (strict_strtol(buf, 10, &tmp) < 0)
  1060. return -EINVAL;
  1061. mutex_lock(&data->update_lock);
  1062. data->dts_ext[nr] = temp_to_reg(tmp, -128, 127);
  1063. w83795_write(client, W83795_REG_DTS_EXT(nr), data->dts_ext[nr]);
  1064. mutex_unlock(&data->update_lock);
  1065. return count;
  1066. }
  1067. /*
  1068. Type 3: Thermal diode
  1069. Type 4: Thermistor
  1070. Temp5-6, default TR
  1071. Temp1-4, default TD
  1072. */
  1073. static ssize_t
  1074. show_temp_mode(struct device *dev, struct device_attribute *attr, char *buf)
  1075. {
  1076. struct i2c_client *client = to_i2c_client(dev);
  1077. struct w83795_data *data = i2c_get_clientdata(client);
  1078. struct sensor_device_attribute_2 *sensor_attr =
  1079. to_sensor_dev_attr_2(attr);
  1080. int index = sensor_attr->index;
  1081. u8 tmp;
  1082. if (data->has_temp >> index & 0x01) {
  1083. if (data->temp_mode >> index & 0x01)
  1084. tmp = 3;
  1085. else
  1086. tmp = 4;
  1087. } else {
  1088. tmp = 0;
  1089. }
  1090. return sprintf(buf, "%d\n", tmp);
  1091. }
  1092. static ssize_t
  1093. store_temp_mode(struct device *dev, struct device_attribute *attr,
  1094. const char *buf, size_t count)
  1095. {
  1096. struct i2c_client *client = to_i2c_client(dev);
  1097. struct w83795_data *data = i2c_get_clientdata(client);
  1098. struct sensor_device_attribute_2 *sensor_attr =
  1099. to_sensor_dev_attr_2(attr);
  1100. int index = sensor_attr->index;
  1101. unsigned long val;
  1102. u8 tmp;
  1103. u32 mask;
  1104. if (strict_strtoul(buf, 10, &val) < 0)
  1105. return -EINVAL;
  1106. if ((val != 4) && (val != 3))
  1107. return -EINVAL;
  1108. if ((index > 3) && (val == 3))
  1109. return -EINVAL;
  1110. mutex_lock(&data->update_lock);
  1111. if (val == 3) {
  1112. val = TEMP_CTRL_TD;
  1113. data->has_temp |= 1 << index;
  1114. data->temp_mode |= 1 << index;
  1115. } else if (val == 4) {
  1116. val = TEMP_CTRL_TR;
  1117. data->has_temp |= 1 << index;
  1118. tmp = 1 << index;
  1119. data->temp_mode &= ~tmp;
  1120. }
  1121. if (index > 3)
  1122. tmp = w83795_read(client, W83795_REG_TEMP_CTRL1);
  1123. else
  1124. tmp = w83795_read(client, W83795_REG_TEMP_CTRL2);
  1125. mask = 0x03 << W83795_REG_TEMP_CTRL[index][TEMP_CTRL_SHIFT];
  1126. tmp &= ~mask;
  1127. tmp |= W83795_REG_TEMP_CTRL[index][val];
  1128. mask = 1 << W83795_REG_TEMP_CTRL[index][TEMP_CTRL_HASIN_SHIFT];
  1129. data->has_in &= ~mask;
  1130. if (index > 3)
  1131. w83795_write(client, W83795_REG_TEMP_CTRL1, tmp);
  1132. else
  1133. w83795_write(client, W83795_REG_TEMP_CTRL2, tmp);
  1134. mutex_unlock(&data->update_lock);
  1135. return count;
  1136. }
  1137. /* show/store VIN */
  1138. static ssize_t
  1139. show_in(struct device *dev, struct device_attribute *attr, char *buf)
  1140. {
  1141. struct sensor_device_attribute_2 *sensor_attr =
  1142. to_sensor_dev_attr_2(attr);
  1143. int nr = sensor_attr->nr;
  1144. int index = sensor_attr->index;
  1145. struct w83795_data *data = w83795_update_device(dev);
  1146. u16 val = data->in[index][nr];
  1147. u8 lsb_idx;
  1148. switch (nr) {
  1149. case IN_READ:
  1150. /* calculate this value again by sensors as sensors3.conf */
  1151. if ((index >= 17) &&
  1152. ((data->has_gain >> (index - 17)) & 1))
  1153. val *= 8;
  1154. break;
  1155. case IN_MAX:
  1156. case IN_LOW:
  1157. lsb_idx = IN_LSB_SHIFT_IDX[index][IN_LSB_IDX];
  1158. val <<= 2;
  1159. val |= (data->in_lsb[lsb_idx][nr] >>
  1160. IN_LSB_SHIFT_IDX[lsb_idx][IN_LSB_SHIFT]) & 0x03;
  1161. if ((index >= 17) &&
  1162. ((data->has_gain >> (index - 17)) & 1))
  1163. val *= 8;
  1164. break;
  1165. }
  1166. val = in_from_reg(index, val);
  1167. return sprintf(buf, "%d\n", val);
  1168. }
  1169. static ssize_t
  1170. store_in(struct device *dev, struct device_attribute *attr,
  1171. const char *buf, size_t count)
  1172. {
  1173. struct sensor_device_attribute_2 *sensor_attr =
  1174. to_sensor_dev_attr_2(attr);
  1175. int nr = sensor_attr->nr;
  1176. int index = sensor_attr->index;
  1177. struct i2c_client *client = to_i2c_client(dev);
  1178. struct w83795_data *data = i2c_get_clientdata(client);
  1179. unsigned long val;
  1180. u8 tmp;
  1181. u8 lsb_idx;
  1182. if (strict_strtoul(buf, 10, &val) < 0)
  1183. return -EINVAL;
  1184. val = in_to_reg(index, val);
  1185. if ((index >= 17) &&
  1186. ((data->has_gain >> (index - 17)) & 1))
  1187. val /= 8;
  1188. val = SENSORS_LIMIT(val, 0, 0x3FF);
  1189. mutex_lock(&data->update_lock);
  1190. lsb_idx = IN_LSB_SHIFT_IDX[index][IN_LSB_IDX];
  1191. tmp = w83795_read(client, IN_LSB_REG(lsb_idx, nr));
  1192. tmp &= ~(0x03 << IN_LSB_SHIFT_IDX[index][IN_LSB_SHIFT]);
  1193. tmp |= (val & 0x03) << IN_LSB_SHIFT_IDX[index][IN_LSB_SHIFT];
  1194. w83795_write(client, IN_LSB_REG(lsb_idx, nr), tmp);
  1195. data->in_lsb[lsb_idx][nr] = tmp;
  1196. tmp = (val >> 2) & 0xff;
  1197. w83795_write(client, W83795_REG_IN[index][nr], tmp);
  1198. data->in[index][nr] = tmp;
  1199. mutex_unlock(&data->update_lock);
  1200. return count;
  1201. }
  1202. static ssize_t
  1203. show_sf_setup(struct device *dev, struct device_attribute *attr, char *buf)
  1204. {
  1205. struct sensor_device_attribute_2 *sensor_attr =
  1206. to_sensor_dev_attr_2(attr);
  1207. int nr = sensor_attr->nr;
  1208. struct i2c_client *client = to_i2c_client(dev);
  1209. struct w83795_data *data = i2c_get_clientdata(client);
  1210. u16 val = data->setup_pwm[nr];
  1211. switch (nr) {
  1212. case SETUP_PWM_UPTIME:
  1213. case SETUP_PWM_DOWNTIME:
  1214. val = time_from_reg(val);
  1215. break;
  1216. }
  1217. return sprintf(buf, "%d\n", val);
  1218. }
  1219. static ssize_t
  1220. store_sf_setup(struct device *dev, struct device_attribute *attr,
  1221. const char *buf, size_t count)
  1222. {
  1223. struct sensor_device_attribute_2 *sensor_attr =
  1224. to_sensor_dev_attr_2(attr);
  1225. int nr = sensor_attr->nr;
  1226. struct i2c_client *client = to_i2c_client(dev);
  1227. struct w83795_data *data = i2c_get_clientdata(client);
  1228. unsigned long val;
  1229. if (strict_strtoul(buf, 10, &val) < 0)
  1230. return -EINVAL;
  1231. switch (nr) {
  1232. case SETUP_PWM_DEFAULT:
  1233. val = SENSORS_LIMIT(val, 0, 0xff);
  1234. break;
  1235. case SETUP_PWM_UPTIME:
  1236. case SETUP_PWM_DOWNTIME:
  1237. val = time_to_reg(val);
  1238. if (val == 0)
  1239. return -EINVAL;
  1240. break;
  1241. }
  1242. mutex_lock(&data->update_lock);
  1243. data->setup_pwm[nr] = val;
  1244. w83795_write(client, W83795_REG_SETUP_PWM(nr), val);
  1245. mutex_unlock(&data->update_lock);
  1246. return count;
  1247. }
  1248. #define NOT_USED -1
  1249. #define SENSOR_ATTR_IN(index) { \
  1250. SENSOR_ATTR_2(in##index##_input, S_IRUGO, show_in, NULL, \
  1251. IN_READ, index), \
  1252. SENSOR_ATTR_2(in##index##_max, S_IRUGO | S_IWUSR, show_in, \
  1253. store_in, IN_MAX, index), \
  1254. SENSOR_ATTR_2(in##index##_min, S_IRUGO | S_IWUSR, show_in, \
  1255. store_in, IN_LOW, index), \
  1256. SENSOR_ATTR_2(in##index##_alarm, S_IRUGO, show_alarm_beep, \
  1257. NULL, ALARM_STATUS, index + ((index > 14) ? 1 : 0)), \
  1258. SENSOR_ATTR_2(in##index##_beep, S_IWUSR | S_IRUGO, \
  1259. show_alarm_beep, store_beep, BEEP_ENABLE, \
  1260. index + ((index > 14) ? 1 : 0)) }
  1261. #define SENSOR_ATTR_FAN(index) { \
  1262. SENSOR_ATTR_2(fan##index##_input, S_IRUGO, show_fan, \
  1263. NULL, FAN_INPUT, index - 1), \
  1264. SENSOR_ATTR_2(fan##index##_min, S_IWUSR | S_IRUGO, \
  1265. show_fan, store_fan_min, FAN_MIN, index - 1), \
  1266. SENSOR_ATTR_2(fan##index##_alarm, S_IRUGO, show_alarm_beep, \
  1267. NULL, ALARM_STATUS, index + 31), \
  1268. SENSOR_ATTR_2(fan##index##_beep, S_IWUSR | S_IRUGO, \
  1269. show_alarm_beep, store_beep, BEEP_ENABLE, index + 31) }
  1270. #define SENSOR_ATTR_PWM(index) { \
  1271. SENSOR_ATTR_2(pwm##index, S_IWUSR | S_IRUGO, show_pwm, \
  1272. store_pwm, PWM_OUTPUT, index - 1), \
  1273. SENSOR_ATTR_2(pwm##index##_nonstop, S_IWUSR | S_IRUGO, \
  1274. show_pwm, store_pwm, PWM_NONSTOP, index - 1), \
  1275. SENSOR_ATTR_2(pwm##index##_start, S_IWUSR | S_IRUGO, \
  1276. show_pwm, store_pwm, PWM_START, index - 1), \
  1277. SENSOR_ATTR_2(pwm##index##_stop_time, S_IWUSR | S_IRUGO, \
  1278. show_pwm, store_pwm, PWM_STOP_TIME, index - 1), \
  1279. SENSOR_ATTR_2(fan##index##_div, S_IWUSR | S_IRUGO, \
  1280. show_pwm, store_pwm, PWM_DIV, index - 1), \
  1281. SENSOR_ATTR_2(pwm##index##_enable, S_IWUSR | S_IRUGO, \
  1282. show_pwm_enable, store_pwm_enable, NOT_USED, index - 1) }
  1283. #define SENSOR_ATTR_FANIN_TARGET(index) \
  1284. SENSOR_ATTR_2(speed_cruise##index##_target, S_IWUSR | S_IRUGO, \
  1285. show_fanin, store_fanin, FANIN_TARGET, index - 1)
  1286. #define SENSOR_ATTR_DTS(index) { \
  1287. SENSOR_ATTR_2(temp##index##_type, S_IRUGO , \
  1288. show_dts_mode, NULL, NOT_USED, index - 7), \
  1289. SENSOR_ATTR_2(temp##index##_input, S_IRUGO, show_dts, \
  1290. NULL, NOT_USED, index - 7), \
  1291. SENSOR_ATTR_2(temp##index##_max, S_IRUGO | S_IWUSR, show_dts_ext, \
  1292. store_dts_ext, DTS_CRIT, NOT_USED), \
  1293. SENSOR_ATTR_2(temp##index##_max_hyst, S_IRUGO | S_IWUSR, \
  1294. show_dts_ext, store_dts_ext, DTS_CRIT_HYST, NOT_USED), \
  1295. SENSOR_ATTR_2(temp##index##_warn, S_IRUGO | S_IWUSR, show_dts_ext, \
  1296. store_dts_ext, DTS_WARN, NOT_USED), \
  1297. SENSOR_ATTR_2(temp##index##_warn_hyst, S_IRUGO | S_IWUSR, \
  1298. show_dts_ext, store_dts_ext, DTS_WARN_HYST, NOT_USED), \
  1299. SENSOR_ATTR_2(temp##index##_alarm, S_IRUGO, \
  1300. show_alarm_beep, NULL, ALARM_STATUS, index + 17), \
  1301. SENSOR_ATTR_2(temp##index##_beep, S_IWUSR | S_IRUGO, \
  1302. show_alarm_beep, store_beep, BEEP_ENABLE, index + 17) }
  1303. #define SENSOR_ATTR_TEMP(index) { \
  1304. SENSOR_ATTR_2(temp##index##_type, S_IRUGO | S_IWUSR, \
  1305. show_temp_mode, store_temp_mode, NOT_USED, index - 1), \
  1306. SENSOR_ATTR_2(temp##index##_input, S_IRUGO, show_temp, \
  1307. NULL, TEMP_READ, index - 1), \
  1308. SENSOR_ATTR_2(temp##index##_max, S_IRUGO | S_IWUSR, show_temp, \
  1309. store_temp, TEMP_CRIT, index - 1), \
  1310. SENSOR_ATTR_2(temp##index##_max_hyst, S_IRUGO | S_IWUSR, \
  1311. show_temp, store_temp, TEMP_CRIT_HYST, index - 1), \
  1312. SENSOR_ATTR_2(temp##index##_warn, S_IRUGO | S_IWUSR, show_temp, \
  1313. store_temp, TEMP_WARN, index - 1), \
  1314. SENSOR_ATTR_2(temp##index##_warn_hyst, S_IRUGO | S_IWUSR, \
  1315. show_temp, store_temp, TEMP_WARN_HYST, index - 1), \
  1316. SENSOR_ATTR_2(temp##index##_alarm, S_IRUGO, \
  1317. show_alarm_beep, NULL, ALARM_STATUS, \
  1318. index + (index > 4 ? 11 : 17)), \
  1319. SENSOR_ATTR_2(temp##index##_beep, S_IWUSR | S_IRUGO, \
  1320. show_alarm_beep, store_beep, BEEP_ENABLE, \
  1321. index + (index > 4 ? 11 : 17)), \
  1322. SENSOR_ATTR_2(temp##index##_source_sel, S_IWUSR | S_IRUGO, \
  1323. show_temp_src, store_temp_src, NOT_USED, index - 1), \
  1324. SENSOR_ATTR_2(temp##index##_pwm_enable, S_IWUSR | S_IRUGO, \
  1325. show_temp_pwm_enable, store_temp_pwm_enable, \
  1326. TEMP_PWM_ENABLE, index - 1), \
  1327. SENSOR_ATTR_2(temp##index##_auto_channels_pwm, S_IWUSR | S_IRUGO, \
  1328. show_temp_pwm_enable, store_temp_pwm_enable, \
  1329. TEMP_PWM_FAN_MAP, index - 1), \
  1330. SENSOR_ATTR_2(thermal_cruise##index, S_IWUSR | S_IRUGO, \
  1331. show_temp_pwm, store_temp_pwm, TEMP_PWM_TTTI, index - 1), \
  1332. SENSOR_ATTR_2(temp##index##_crit, S_IWUSR | S_IRUGO, \
  1333. show_temp_pwm, store_temp_pwm, TEMP_PWM_CTFS, index - 1), \
  1334. SENSOR_ATTR_2(temp##index##_crit_hyst, S_IWUSR | S_IRUGO, \
  1335. show_temp_pwm, store_temp_pwm, TEMP_PWM_HCT, index - 1), \
  1336. SENSOR_ATTR_2(temp##index##_operation_hyst, S_IWUSR | S_IRUGO, \
  1337. show_temp_pwm, store_temp_pwm, TEMP_PWM_HOT, index - 1), \
  1338. SENSOR_ATTR_2(temp##index##_auto_point1_pwm, S_IRUGO | S_IWUSR, \
  1339. show_sf4_pwm, store_sf4_pwm, 0, index - 1), \
  1340. SENSOR_ATTR_2(temp##index##_auto_point2_pwm, S_IRUGO | S_IWUSR, \
  1341. show_sf4_pwm, store_sf4_pwm, 1, index - 1), \
  1342. SENSOR_ATTR_2(temp##index##_auto_point3_pwm, S_IRUGO | S_IWUSR, \
  1343. show_sf4_pwm, store_sf4_pwm, 2, index - 1), \
  1344. SENSOR_ATTR_2(temp##index##_auto_point4_pwm, S_IRUGO | S_IWUSR, \
  1345. show_sf4_pwm, store_sf4_pwm, 3, index - 1), \
  1346. SENSOR_ATTR_2(temp##index##_auto_point5_pwm, S_IRUGO | S_IWUSR, \
  1347. show_sf4_pwm, store_sf4_pwm, 4, index - 1), \
  1348. SENSOR_ATTR_2(temp##index##_auto_point6_pwm, S_IRUGO | S_IWUSR, \
  1349. show_sf4_pwm, store_sf4_pwm, 5, index - 1), \
  1350. SENSOR_ATTR_2(temp##index##_auto_point7_pwm, S_IRUGO | S_IWUSR, \
  1351. show_sf4_pwm, store_sf4_pwm, 6, index - 1), \
  1352. SENSOR_ATTR_2(temp##index##_auto_point1_temp, S_IRUGO | S_IWUSR,\
  1353. show_sf4_temp, store_sf4_temp, 0, index - 1), \
  1354. SENSOR_ATTR_2(temp##index##_auto_point2_temp, S_IRUGO | S_IWUSR,\
  1355. show_sf4_temp, store_sf4_temp, 1, index - 1), \
  1356. SENSOR_ATTR_2(temp##index##_auto_point3_temp, S_IRUGO | S_IWUSR,\
  1357. show_sf4_temp, store_sf4_temp, 2, index - 1), \
  1358. SENSOR_ATTR_2(temp##index##_auto_point4_temp, S_IRUGO | S_IWUSR,\
  1359. show_sf4_temp, store_sf4_temp, 3, index - 1), \
  1360. SENSOR_ATTR_2(temp##index##_auto_point5_temp, S_IRUGO | S_IWUSR,\
  1361. show_sf4_temp, store_sf4_temp, 4, index - 1), \
  1362. SENSOR_ATTR_2(temp##index##_auto_point6_temp, S_IRUGO | S_IWUSR,\
  1363. show_sf4_temp, store_sf4_temp, 5, index - 1), \
  1364. SENSOR_ATTR_2(temp##index##_auto_point7_temp, S_IRUGO | S_IWUSR,\
  1365. show_sf4_temp, store_sf4_temp, 6, index - 1) }
  1366. static struct sensor_device_attribute_2 w83795_in[][5] = {
  1367. SENSOR_ATTR_IN(0),
  1368. SENSOR_ATTR_IN(1),
  1369. SENSOR_ATTR_IN(2),
  1370. SENSOR_ATTR_IN(3),
  1371. SENSOR_ATTR_IN(4),
  1372. SENSOR_ATTR_IN(5),
  1373. SENSOR_ATTR_IN(6),
  1374. SENSOR_ATTR_IN(7),
  1375. SENSOR_ATTR_IN(8),
  1376. SENSOR_ATTR_IN(9),
  1377. SENSOR_ATTR_IN(10),
  1378. SENSOR_ATTR_IN(11),
  1379. SENSOR_ATTR_IN(12),
  1380. SENSOR_ATTR_IN(13),
  1381. SENSOR_ATTR_IN(14),
  1382. SENSOR_ATTR_IN(15),
  1383. SENSOR_ATTR_IN(16),
  1384. SENSOR_ATTR_IN(17),
  1385. SENSOR_ATTR_IN(18),
  1386. SENSOR_ATTR_IN(19),
  1387. SENSOR_ATTR_IN(20),
  1388. };
  1389. static struct sensor_device_attribute_2 w83795_fan[][4] = {
  1390. SENSOR_ATTR_FAN(1),
  1391. SENSOR_ATTR_FAN(2),
  1392. SENSOR_ATTR_FAN(3),
  1393. SENSOR_ATTR_FAN(4),
  1394. SENSOR_ATTR_FAN(5),
  1395. SENSOR_ATTR_FAN(6),
  1396. SENSOR_ATTR_FAN(7),
  1397. SENSOR_ATTR_FAN(8),
  1398. SENSOR_ATTR_FAN(9),
  1399. SENSOR_ATTR_FAN(10),
  1400. SENSOR_ATTR_FAN(11),
  1401. SENSOR_ATTR_FAN(12),
  1402. SENSOR_ATTR_FAN(13),
  1403. SENSOR_ATTR_FAN(14),
  1404. };
  1405. static struct sensor_device_attribute_2 w83795_temp[][29] = {
  1406. SENSOR_ATTR_TEMP(1),
  1407. SENSOR_ATTR_TEMP(2),
  1408. SENSOR_ATTR_TEMP(3),
  1409. SENSOR_ATTR_TEMP(4),
  1410. SENSOR_ATTR_TEMP(5),
  1411. SENSOR_ATTR_TEMP(6),
  1412. };
  1413. static struct sensor_device_attribute_2 w83795_dts[][8] = {
  1414. SENSOR_ATTR_DTS(7),
  1415. SENSOR_ATTR_DTS(8),
  1416. SENSOR_ATTR_DTS(9),
  1417. SENSOR_ATTR_DTS(10),
  1418. SENSOR_ATTR_DTS(11),
  1419. SENSOR_ATTR_DTS(12),
  1420. SENSOR_ATTR_DTS(13),
  1421. SENSOR_ATTR_DTS(14),
  1422. };
  1423. static struct sensor_device_attribute_2 w83795_static[] = {
  1424. SENSOR_ATTR_FANIN_TARGET(1),
  1425. SENSOR_ATTR_FANIN_TARGET(2),
  1426. SENSOR_ATTR_FANIN_TARGET(3),
  1427. SENSOR_ATTR_FANIN_TARGET(4),
  1428. SENSOR_ATTR_FANIN_TARGET(5),
  1429. SENSOR_ATTR_FANIN_TARGET(6),
  1430. SENSOR_ATTR_FANIN_TARGET(7),
  1431. SENSOR_ATTR_FANIN_TARGET(8),
  1432. };
  1433. static struct sensor_device_attribute_2 w83795_pwm[][6] = {
  1434. SENSOR_ATTR_PWM(1),
  1435. SENSOR_ATTR_PWM(2),
  1436. SENSOR_ATTR_PWM(3),
  1437. SENSOR_ATTR_PWM(4),
  1438. SENSOR_ATTR_PWM(5),
  1439. SENSOR_ATTR_PWM(6),
  1440. SENSOR_ATTR_PWM(7),
  1441. SENSOR_ATTR_PWM(8),
  1442. };
  1443. static struct sensor_device_attribute_2 sda_single_files[] = {
  1444. SENSOR_ATTR_2(chassis, S_IWUSR | S_IRUGO, show_alarm_beep,
  1445. store_chassis_clear, ALARM_STATUS, 46),
  1446. SENSOR_ATTR_2(beep_enable, S_IWUSR | S_IRUGO, show_beep_enable,
  1447. store_beep_enable, NOT_USED, NOT_USED),
  1448. SENSOR_ATTR_2(speed_cruise_tolerance, S_IWUSR | S_IRUGO, show_fanin,
  1449. store_fanin, FANIN_TOL, NOT_USED),
  1450. SENSOR_ATTR_2(pwm_default, S_IWUSR | S_IRUGO, show_sf_setup,
  1451. store_sf_setup, SETUP_PWM_DEFAULT, NOT_USED),
  1452. SENSOR_ATTR_2(pwm_uptime, S_IWUSR | S_IRUGO, show_sf_setup,
  1453. store_sf_setup, SETUP_PWM_UPTIME, NOT_USED),
  1454. SENSOR_ATTR_2(pwm_downtime, S_IWUSR | S_IRUGO, show_sf_setup,
  1455. store_sf_setup, SETUP_PWM_DOWNTIME, NOT_USED),
  1456. };
  1457. /*
  1458. * Driver interface
  1459. */
  1460. static void w83795_init_client(struct i2c_client *client)
  1461. {
  1462. if (reset)
  1463. w83795_write(client, W83795_REG_CONFIG, 0x80);
  1464. /* Start monitoring */
  1465. w83795_write(client, W83795_REG_CONFIG,
  1466. w83795_read(client, W83795_REG_CONFIG) | 0x01);
  1467. }
  1468. static int w83795_get_device_id(struct i2c_client *client)
  1469. {
  1470. int device_id;
  1471. device_id = i2c_smbus_read_byte_data(client, W83795_REG_DEVICEID);
  1472. /* Special case for rev. A chips; can't be checked first because later
  1473. revisions emulate this for compatibility */
  1474. if (device_id < 0 || (device_id & 0xf0) != 0x50) {
  1475. int alt_id;
  1476. alt_id = i2c_smbus_read_byte_data(client,
  1477. W83795_REG_DEVICEID_A);
  1478. if (alt_id == 0x50)
  1479. device_id = alt_id;
  1480. }
  1481. return device_id;
  1482. }
  1483. /* Return 0 if detection is successful, -ENODEV otherwise */
  1484. static int w83795_detect(struct i2c_client *client,
  1485. struct i2c_board_info *info)
  1486. {
  1487. int bank, vendor_id, device_id, expected, i2c_addr, config;
  1488. struct i2c_adapter *adapter = client->adapter;
  1489. unsigned short address = client->addr;
  1490. const char *chip_name;
  1491. if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
  1492. return -ENODEV;
  1493. bank = i2c_smbus_read_byte_data(client, W83795_REG_BANKSEL);
  1494. if (bank < 0 || (bank & 0x7c)) {
  1495. dev_dbg(&adapter->dev,
  1496. "w83795: Detection failed at addr 0x%02hx, check %s\n",
  1497. address, "bank");
  1498. return -ENODEV;
  1499. }
  1500. /* Check Nuvoton vendor ID */
  1501. vendor_id = i2c_smbus_read_byte_data(client, W83795_REG_VENDORID);
  1502. expected = bank & 0x80 ? 0x5c : 0xa3;
  1503. if (vendor_id != expected) {
  1504. dev_dbg(&adapter->dev,
  1505. "w83795: Detection failed at addr 0x%02hx, check %s\n",
  1506. address, "vendor id");
  1507. return -ENODEV;
  1508. }
  1509. /* Check device ID */
  1510. device_id = w83795_get_device_id(client) |
  1511. (i2c_smbus_read_byte_data(client, W83795_REG_CHIPID) << 8);
  1512. if ((device_id >> 4) != 0x795) {
  1513. dev_dbg(&adapter->dev,
  1514. "w83795: Detection failed at addr 0x%02hx, check %s\n",
  1515. address, "device id\n");
  1516. return -ENODEV;
  1517. }
  1518. /* If Nuvoton chip, address of chip and W83795_REG_I2C_ADDR
  1519. should match */
  1520. if ((bank & 0x07) == 0) {
  1521. i2c_addr = i2c_smbus_read_byte_data(client,
  1522. W83795_REG_I2C_ADDR);
  1523. if ((i2c_addr & 0x7f) != address) {
  1524. dev_dbg(&adapter->dev,
  1525. "w83795: Detection failed at addr 0x%02hx, "
  1526. "check %s\n", address, "i2c addr");
  1527. return -ENODEV;
  1528. }
  1529. }
  1530. /* Check 795 chip type: 795G or 795ADG
  1531. Usually we don't write to chips during detection, but here we don't
  1532. quite have the choice; hopefully it's OK, we are about to return
  1533. success anyway */
  1534. if ((bank & 0x07) != 0)
  1535. i2c_smbus_write_byte_data(client, W83795_REG_BANKSEL,
  1536. bank & ~0x07);
  1537. config = i2c_smbus_read_byte_data(client, W83795_REG_CONFIG);
  1538. if (config & W83795_REG_CONFIG_CONFIG48)
  1539. chip_name = "w83795adg";
  1540. else
  1541. chip_name = "w83795g";
  1542. strlcpy(info->type, chip_name, I2C_NAME_SIZE);
  1543. dev_info(&adapter->dev, "Found %s rev. %c at 0x%02hx\n", chip_name,
  1544. 'A' + (device_id & 0xf), address);
  1545. return 0;
  1546. }
  1547. static int w83795_handle_files(struct device *dev, int (*fn)(struct device *,
  1548. const struct device_attribute *))
  1549. {
  1550. struct w83795_data *data = dev_get_drvdata(dev);
  1551. int err, i, j;
  1552. for (i = 0; i < ARRAY_SIZE(w83795_in); i++) {
  1553. if (!(data->has_in & (1 << i)))
  1554. continue;
  1555. for (j = 0; j < ARRAY_SIZE(w83795_in[0]); j++) {
  1556. err = fn(dev, &w83795_in[i][j].dev_attr);
  1557. if (err)
  1558. return err;
  1559. }
  1560. }
  1561. for (i = 0; i < ARRAY_SIZE(w83795_fan); i++) {
  1562. if (!(data->has_fan & (1 << i)))
  1563. continue;
  1564. for (j = 0; j < ARRAY_SIZE(w83795_fan[0]); j++) {
  1565. err = fn(dev, &w83795_fan[i][j].dev_attr);
  1566. if (err)
  1567. return err;
  1568. }
  1569. }
  1570. for (i = 0; i < ARRAY_SIZE(sda_single_files); i++) {
  1571. err = fn(dev, &sda_single_files[i].dev_attr);
  1572. if (err)
  1573. return err;
  1574. }
  1575. for (i = 0; i < data->has_pwm; i++) {
  1576. for (j = 0; j < ARRAY_SIZE(w83795_pwm[0]); j++) {
  1577. err = fn(dev, &w83795_pwm[i][j].dev_attr);
  1578. if (err)
  1579. return err;
  1580. }
  1581. }
  1582. for (i = 0; i < ARRAY_SIZE(w83795_temp); i++) {
  1583. if (!(data->has_temp & (1 << i)))
  1584. continue;
  1585. for (j = 0; j < ARRAY_SIZE(w83795_temp[0]); j++) {
  1586. err = fn(dev, &w83795_temp[i][j].dev_attr);
  1587. if (err)
  1588. return err;
  1589. }
  1590. }
  1591. if (data->enable_dts != 0) {
  1592. for (i = 0; i < ARRAY_SIZE(w83795_dts); i++) {
  1593. if (!(data->has_dts & (1 << i)))
  1594. continue;
  1595. for (j = 0; j < ARRAY_SIZE(w83795_dts[0]); j++) {
  1596. err = fn(dev, &w83795_dts[i][j].dev_attr);
  1597. if (err)
  1598. return err;
  1599. }
  1600. }
  1601. }
  1602. for (i = 0; i < ARRAY_SIZE(w83795_static); i++) {
  1603. err = fn(dev, &w83795_static[i].dev_attr);
  1604. if (err)
  1605. return err;
  1606. }
  1607. return 0;
  1608. }
  1609. /* We need a wrapper that fits in w83795_handle_files */
  1610. static int device_remove_file_wrapper(struct device *dev,
  1611. const struct device_attribute *attr)
  1612. {
  1613. device_remove_file(dev, attr);
  1614. return 0;
  1615. }
  1616. static int w83795_probe(struct i2c_client *client,
  1617. const struct i2c_device_id *id)
  1618. {
  1619. int i;
  1620. u8 tmp;
  1621. struct device *dev = &client->dev;
  1622. struct w83795_data *data;
  1623. int err = 0;
  1624. data = kzalloc(sizeof(struct w83795_data), GFP_KERNEL);
  1625. if (!data) {
  1626. err = -ENOMEM;
  1627. goto exit;
  1628. }
  1629. i2c_set_clientdata(client, data);
  1630. data->chip_type = id->driver_data;
  1631. data->bank = i2c_smbus_read_byte_data(client, W83795_REG_BANKSEL);
  1632. mutex_init(&data->update_lock);
  1633. /* Initialize the chip */
  1634. w83795_init_client(client);
  1635. data->has_in = w83795_read(client, W83795_REG_VOLT_CTRL1);
  1636. data->has_in |= w83795_read(client, W83795_REG_VOLT_CTRL2) << 8;
  1637. /* VSEN11-9 not for 795adg */
  1638. if (data->chip_type == w83795adg)
  1639. data->has_in &= 0xf8ff;
  1640. data->has_fan = w83795_read(client, W83795_REG_FANIN_CTRL1);
  1641. data->has_fan |= w83795_read(client, W83795_REG_FANIN_CTRL2) << 8;
  1642. /* VDSEN12-17 and TR1-6, TD1-4 use same register */
  1643. tmp = w83795_read(client, W83795_REG_TEMP_CTRL1);
  1644. if (tmp & 0x20)
  1645. data->enable_dts = 1;
  1646. else
  1647. data->enable_dts = 0;
  1648. data->has_temp = 0;
  1649. data->temp_mode = 0;
  1650. if (tmp & 0x08) {
  1651. if (tmp & 0x04)
  1652. data->has_temp |= 0x20;
  1653. else
  1654. data->has_in |= 0x10000;
  1655. }
  1656. if (tmp & 0x02) {
  1657. if (tmp & 0x01)
  1658. data->has_temp |= 0x10;
  1659. else
  1660. data->has_in |= 0x8000;
  1661. }
  1662. tmp = w83795_read(client, W83795_REG_TEMP_CTRL2);
  1663. if (tmp & 0x40) {
  1664. data->has_temp |= 0x08;
  1665. if (!(tmp & 0x80))
  1666. data->temp_mode |= 0x08;
  1667. } else if (tmp & 0x80) {
  1668. data->has_in |= 0x100000;
  1669. }
  1670. if (tmp & 0x10) {
  1671. data->has_temp |= 0x04;
  1672. if (!(tmp & 0x20))
  1673. data->temp_mode |= 0x04;
  1674. } else if (tmp & 0x20) {
  1675. data->has_in |= 0x80000;
  1676. }
  1677. if (tmp & 0x04) {
  1678. data->has_temp |= 0x02;
  1679. if (!(tmp & 0x08))
  1680. data->temp_mode |= 0x02;
  1681. } else if (tmp & 0x08) {
  1682. data->has_in |= 0x40000;
  1683. }
  1684. if (tmp & 0x01) {
  1685. data->has_temp |= 0x01;
  1686. if (!(tmp & 0x02))
  1687. data->temp_mode |= 0x01;
  1688. } else if (tmp & 0x02) {
  1689. data->has_in |= 0x20000;
  1690. }
  1691. /* Check DTS enable status */
  1692. if (data->enable_dts == 0) {
  1693. data->has_dts = 0;
  1694. } else {
  1695. if (1 & w83795_read(client, W83795_REG_DTSC))
  1696. data->enable_dts |= 2;
  1697. data->has_dts = w83795_read(client, W83795_REG_DTSE);
  1698. }
  1699. /* First update the voltages measured value and limits */
  1700. for (i = 0; i < ARRAY_SIZE(data->in); i++) {
  1701. if (!(data->has_in & (1 << i)))
  1702. continue;
  1703. data->in[i][IN_MAX] =
  1704. w83795_read(client, W83795_REG_IN[i][IN_MAX]);
  1705. data->in[i][IN_LOW] =
  1706. w83795_read(client, W83795_REG_IN[i][IN_LOW]);
  1707. tmp = w83795_read(client, W83795_REG_IN[i][IN_READ]) << 2;
  1708. tmp |= (w83795_read(client, W83795_REG_VRLSB)
  1709. >> VRLSB_SHIFT) & 0x03;
  1710. data->in[i][IN_READ] = tmp;
  1711. }
  1712. for (i = 0; i < IN_LSB_REG_NUM; i++) {
  1713. data->in_lsb[i][IN_MAX] =
  1714. w83795_read(client, IN_LSB_REG(i, IN_MAX));
  1715. data->in_lsb[i][IN_LOW] =
  1716. w83795_read(client, IN_LSB_REG(i, IN_LOW));
  1717. }
  1718. data->has_gain = w83795_read(client, W83795_REG_VMIGB_CTRL) & 0x0f;
  1719. /* First update fan and limits */
  1720. for (i = 0; i < ARRAY_SIZE(data->fan); i++) {
  1721. if (!(data->has_fan & (1 << i)))
  1722. continue;
  1723. data->fan_min[i] =
  1724. w83795_read(client, W83795_REG_FAN_MIN_HL(i)) << 4;
  1725. data->fan_min[i] |=
  1726. (w83795_read(client, W83795_REG_FAN_MIN_LSB(i) >>
  1727. W83795_REG_FAN_MIN_LSB_SHIFT(i))) & 0x0F;
  1728. data->fan[i] = w83795_read(client, W83795_REG_FAN(i)) << 4;
  1729. data->fan[i] |=
  1730. (w83795_read(client, W83795_REG_VRLSB >> 4)) & 0x0F;
  1731. }
  1732. /* temperature and limits */
  1733. for (i = 0; i < ARRAY_SIZE(data->temp); i++) {
  1734. if (!(data->has_temp & (1 << i)))
  1735. continue;
  1736. data->temp[i][TEMP_CRIT] =
  1737. w83795_read(client, W83795_REG_TEMP[i][TEMP_CRIT]);
  1738. data->temp[i][TEMP_CRIT_HYST] =
  1739. w83795_read(client, W83795_REG_TEMP[i][TEMP_CRIT_HYST]);
  1740. data->temp[i][TEMP_WARN] =
  1741. w83795_read(client, W83795_REG_TEMP[i][TEMP_WARN]);
  1742. data->temp[i][TEMP_WARN_HYST] =
  1743. w83795_read(client, W83795_REG_TEMP[i][TEMP_WARN_HYST]);
  1744. data->temp[i][TEMP_READ] =
  1745. w83795_read(client, W83795_REG_TEMP[i][TEMP_READ]);
  1746. data->temp_read_vrlsb[i] =
  1747. w83795_read(client, W83795_REG_VRLSB);
  1748. }
  1749. /* dts temperature and limits */
  1750. if (data->enable_dts != 0) {
  1751. data->dts_ext[DTS_CRIT] =
  1752. w83795_read(client, W83795_REG_DTS_EXT(DTS_CRIT));
  1753. data->dts_ext[DTS_CRIT_HYST] =
  1754. w83795_read(client, W83795_REG_DTS_EXT(DTS_CRIT_HYST));
  1755. data->dts_ext[DTS_WARN] =
  1756. w83795_read(client, W83795_REG_DTS_EXT(DTS_WARN));
  1757. data->dts_ext[DTS_WARN_HYST] =
  1758. w83795_read(client, W83795_REG_DTS_EXT(DTS_WARN_HYST));
  1759. for (i = 0; i < ARRAY_SIZE(data->dts); i++) {
  1760. if (!(data->has_dts & (1 << i)))
  1761. continue;
  1762. data->dts[i] = w83795_read(client, W83795_REG_DTS(i));
  1763. data->dts_read_vrlsb[i] =
  1764. w83795_read(client, W83795_REG_VRLSB);
  1765. }
  1766. }
  1767. /* First update temp source selction */
  1768. for (i = 0; i < 3; i++)
  1769. data->temp_src[i] = w83795_read(client, W83795_REG_TSS(i));
  1770. /* pwm and smart fan */
  1771. if (data->chip_type == w83795g)
  1772. data->has_pwm = 8;
  1773. else
  1774. data->has_pwm = 2;
  1775. data->pwm_fcms[0] = w83795_read(client, W83795_REG_FCMS1);
  1776. data->pwm_fcms[1] = w83795_read(client, W83795_REG_FCMS2);
  1777. /* w83795adg only support pwm2-0 */
  1778. for (i = 0; i < W83795_REG_TEMP_NUM; i++)
  1779. data->pwm_tfmr[i] = w83795_read(client, W83795_REG_TFMR(i));
  1780. data->pwm_fomc = w83795_read(client, W83795_REG_FOMC);
  1781. for (i = 0; i < data->has_pwm; i++) {
  1782. for (tmp = 0; tmp < 5; tmp++) {
  1783. data->pwm[i][tmp] =
  1784. w83795_read(client, W83795_REG_PWM(i, tmp));
  1785. }
  1786. }
  1787. for (i = 0; i < 8; i++) {
  1788. data->target_speed[i] =
  1789. w83795_read(client, W83795_REG_FTSH(i)) << 4;
  1790. data->target_speed[i] |=
  1791. w83795_read(client, W83795_REG_FTSL(i)) >> 4;
  1792. }
  1793. data->tol_speed = w83795_read(client, W83795_REG_TFTS) & 0x3f;
  1794. for (i = 0; i < W83795_REG_TEMP_NUM; i++) {
  1795. data->pwm_temp[i][TEMP_PWM_TTTI] =
  1796. w83795_read(client, W83795_REG_TTTI(i)) & 0x7f;
  1797. data->pwm_temp[i][TEMP_PWM_CTFS] =
  1798. w83795_read(client, W83795_REG_CTFS(i));
  1799. tmp = w83795_read(client, W83795_REG_HT(i));
  1800. data->pwm_temp[i][TEMP_PWM_HCT] = (tmp >> 4) & 0x0f;
  1801. data->pwm_temp[i][TEMP_PWM_HOT] = tmp & 0x0f;
  1802. }
  1803. for (i = 0; i < W83795_REG_TEMP_NUM; i++) {
  1804. for (tmp = 0; tmp < 7; tmp++) {
  1805. data->sf4_reg[i][SF4_TEMP][tmp] =
  1806. w83795_read(client,
  1807. W83795_REG_SF4_TEMP(i, tmp));
  1808. data->sf4_reg[i][SF4_PWM][tmp] =
  1809. w83795_read(client, W83795_REG_SF4_PWM(i, tmp));
  1810. }
  1811. }
  1812. /* Setup PWM Register */
  1813. for (i = 0; i < 3; i++) {
  1814. data->setup_pwm[i] =
  1815. w83795_read(client, W83795_REG_SETUP_PWM(i));
  1816. }
  1817. /* alarm and beep */
  1818. for (i = 0; i < ALARM_BEEP_REG_NUM; i++) {
  1819. data->alarms[i] = w83795_read(client, W83795_REG_ALARM(i));
  1820. data->beeps[i] = w83795_read(client, W83795_REG_BEEP(i));
  1821. }
  1822. data->beep_enable =
  1823. (w83795_read(client, W83795_REG_BEEP(5)) >> 7) & 0x01;
  1824. err = w83795_handle_files(dev, device_create_file);
  1825. if (err)
  1826. goto exit_remove;
  1827. data->hwmon_dev = hwmon_device_register(dev);
  1828. if (IS_ERR(data->hwmon_dev)) {
  1829. err = PTR_ERR(data->hwmon_dev);
  1830. goto exit_remove;
  1831. }
  1832. return 0;
  1833. exit_remove:
  1834. w83795_handle_files(dev, device_remove_file_wrapper);
  1835. kfree(data);
  1836. exit:
  1837. return err;
  1838. }
  1839. static int w83795_remove(struct i2c_client *client)
  1840. {
  1841. struct w83795_data *data = i2c_get_clientdata(client);
  1842. hwmon_device_unregister(data->hwmon_dev);
  1843. w83795_handle_files(&client->dev, device_remove_file_wrapper);
  1844. kfree(data);
  1845. return 0;
  1846. }
  1847. static const struct i2c_device_id w83795_id[] = {
  1848. { "w83795g", w83795g },
  1849. { "w83795adg", w83795adg },
  1850. { }
  1851. };
  1852. MODULE_DEVICE_TABLE(i2c, w83795_id);
  1853. static struct i2c_driver w83795_driver = {
  1854. .driver = {
  1855. .name = "w83795",
  1856. },
  1857. .probe = w83795_probe,
  1858. .remove = w83795_remove,
  1859. .id_table = w83795_id,
  1860. .class = I2C_CLASS_HWMON,
  1861. .detect = w83795_detect,
  1862. .address_list = normal_i2c,
  1863. };
  1864. static int __init sensors_w83795_init(void)
  1865. {
  1866. return i2c_add_driver(&w83795_driver);
  1867. }
  1868. static void __exit sensors_w83795_exit(void)
  1869. {
  1870. i2c_del_driver(&w83795_driver);
  1871. }
  1872. MODULE_AUTHOR("Wei Song");
  1873. MODULE_DESCRIPTION("W83795G/ADG hardware monitoring driver");
  1874. MODULE_LICENSE("GPL");
  1875. module_init(sensors_w83795_init);
  1876. module_exit(sensors_w83795_exit);