mce_amd_64.c 15 KB

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  1. /*
  2. * (c) 2005, 2006 Advanced Micro Devices, Inc.
  3. * Your use of this code is subject to the terms and conditions of the
  4. * GNU general public license version 2. See "COPYING" or
  5. * http://www.gnu.org/licenses/gpl.html
  6. *
  7. * Written by Jacob Shin - AMD, Inc.
  8. *
  9. * Support : jacob.shin@amd.com
  10. *
  11. * April 2006
  12. * - added support for AMD Family 0x10 processors
  13. *
  14. * All MC4_MISCi registers are shared between multi-cores
  15. */
  16. #include <linux/cpu.h>
  17. #include <linux/errno.h>
  18. #include <linux/init.h>
  19. #include <linux/interrupt.h>
  20. #include <linux/kobject.h>
  21. #include <linux/notifier.h>
  22. #include <linux/sched.h>
  23. #include <linux/smp.h>
  24. #include <linux/sysdev.h>
  25. #include <linux/sysfs.h>
  26. #include <asm/apic.h>
  27. #include <asm/mce.h>
  28. #include <asm/msr.h>
  29. #include <asm/percpu.h>
  30. #include <asm/idle.h>
  31. #define PFX "mce_threshold: "
  32. #define VERSION "version 1.1.1"
  33. #define NR_BANKS 6
  34. #define NR_BLOCKS 9
  35. #define THRESHOLD_MAX 0xFFF
  36. #define INT_TYPE_APIC 0x00020000
  37. #define MASK_VALID_HI 0x80000000
  38. #define MASK_CNTP_HI 0x40000000
  39. #define MASK_LOCKED_HI 0x20000000
  40. #define MASK_LVTOFF_HI 0x00F00000
  41. #define MASK_COUNT_EN_HI 0x00080000
  42. #define MASK_INT_TYPE_HI 0x00060000
  43. #define MASK_OVERFLOW_HI 0x00010000
  44. #define MASK_ERR_COUNT_HI 0x00000FFF
  45. #define MASK_BLKPTR_LO 0xFF000000
  46. #define MCG_XBLK_ADDR 0xC0000400
  47. struct threshold_block {
  48. unsigned int block;
  49. unsigned int bank;
  50. unsigned int cpu;
  51. u32 address;
  52. u16 interrupt_enable;
  53. u16 threshold_limit;
  54. struct kobject kobj;
  55. struct list_head miscj;
  56. };
  57. /* defaults used early on boot */
  58. static struct threshold_block threshold_defaults = {
  59. .interrupt_enable = 0,
  60. .threshold_limit = THRESHOLD_MAX,
  61. };
  62. struct threshold_bank {
  63. struct kobject *kobj;
  64. struct threshold_block *blocks;
  65. cpumask_t cpus;
  66. };
  67. static DEFINE_PER_CPU(struct threshold_bank *, threshold_banks[NR_BANKS]);
  68. #ifdef CONFIG_SMP
  69. static unsigned char shared_bank[NR_BANKS] = {
  70. 0, 0, 0, 0, 1
  71. };
  72. #endif
  73. static DEFINE_PER_CPU(unsigned char, bank_map); /* see which banks are on */
  74. /*
  75. * CPU Initialization
  76. */
  77. struct thresh_restart {
  78. struct threshold_block *b;
  79. int reset;
  80. u16 old_limit;
  81. };
  82. /* must be called with correct cpu affinity */
  83. static long threshold_restart_bank(void *_tr)
  84. {
  85. struct thresh_restart *tr = _tr;
  86. u32 mci_misc_hi, mci_misc_lo;
  87. rdmsr(tr->b->address, mci_misc_lo, mci_misc_hi);
  88. if (tr->b->threshold_limit < (mci_misc_hi & THRESHOLD_MAX))
  89. tr->reset = 1; /* limit cannot be lower than err count */
  90. if (tr->reset) { /* reset err count and overflow bit */
  91. mci_misc_hi =
  92. (mci_misc_hi & ~(MASK_ERR_COUNT_HI | MASK_OVERFLOW_HI)) |
  93. (THRESHOLD_MAX - tr->b->threshold_limit);
  94. } else if (tr->old_limit) { /* change limit w/o reset */
  95. int new_count = (mci_misc_hi & THRESHOLD_MAX) +
  96. (tr->old_limit - tr->b->threshold_limit);
  97. mci_misc_hi = (mci_misc_hi & ~MASK_ERR_COUNT_HI) |
  98. (new_count & THRESHOLD_MAX);
  99. }
  100. tr->b->interrupt_enable ?
  101. (mci_misc_hi = (mci_misc_hi & ~MASK_INT_TYPE_HI) | INT_TYPE_APIC) :
  102. (mci_misc_hi &= ~MASK_INT_TYPE_HI);
  103. mci_misc_hi |= MASK_COUNT_EN_HI;
  104. wrmsr(tr->b->address, mci_misc_lo, mci_misc_hi);
  105. return 0;
  106. }
  107. /* cpu init entry point, called from mce.c with preempt off */
  108. void __cpuinit mce_amd_feature_init(struct cpuinfo_x86 *c)
  109. {
  110. unsigned int bank, block;
  111. unsigned int cpu = smp_processor_id();
  112. u8 lvt_off;
  113. u32 low = 0, high = 0, address = 0;
  114. struct thresh_restart tr;
  115. for (bank = 0; bank < NR_BANKS; ++bank) {
  116. for (block = 0; block < NR_BLOCKS; ++block) {
  117. if (block == 0)
  118. address = MSR_IA32_MC0_MISC + bank * 4;
  119. else if (block == 1) {
  120. address = (low & MASK_BLKPTR_LO) >> 21;
  121. if (!address)
  122. break;
  123. address += MCG_XBLK_ADDR;
  124. }
  125. else
  126. ++address;
  127. if (rdmsr_safe(address, &low, &high))
  128. break;
  129. if (!(high & MASK_VALID_HI)) {
  130. if (block)
  131. continue;
  132. else
  133. break;
  134. }
  135. if (!(high & MASK_CNTP_HI) ||
  136. (high & MASK_LOCKED_HI))
  137. continue;
  138. if (!block)
  139. per_cpu(bank_map, cpu) |= (1 << bank);
  140. #ifdef CONFIG_SMP
  141. if (shared_bank[bank] && c->cpu_core_id)
  142. break;
  143. #endif
  144. lvt_off = setup_APIC_eilvt_mce(THRESHOLD_APIC_VECTOR,
  145. APIC_EILVT_MSG_FIX, 0);
  146. high &= ~MASK_LVTOFF_HI;
  147. high |= lvt_off << 20;
  148. wrmsr(address, low, high);
  149. threshold_defaults.address = address;
  150. tr.b = &threshold_defaults;
  151. tr.reset = 0;
  152. tr.old_limit = 0;
  153. threshold_restart_bank(&tr);
  154. }
  155. }
  156. }
  157. /*
  158. * APIC Interrupt Handler
  159. */
  160. /*
  161. * threshold interrupt handler will service THRESHOLD_APIC_VECTOR.
  162. * the interrupt goes off when error_count reaches threshold_limit.
  163. * the handler will simply log mcelog w/ software defined bank number.
  164. */
  165. asmlinkage void mce_threshold_interrupt(void)
  166. {
  167. unsigned int bank, block;
  168. struct mce m;
  169. u32 low = 0, high = 0, address = 0;
  170. ack_APIC_irq();
  171. exit_idle();
  172. irq_enter();
  173. mce_setup(&m);
  174. /* assume first bank caused it */
  175. for (bank = 0; bank < NR_BANKS; ++bank) {
  176. if (!(per_cpu(bank_map, m.cpu) & (1 << bank)))
  177. continue;
  178. for (block = 0; block < NR_BLOCKS; ++block) {
  179. if (block == 0)
  180. address = MSR_IA32_MC0_MISC + bank * 4;
  181. else if (block == 1) {
  182. address = (low & MASK_BLKPTR_LO) >> 21;
  183. if (!address)
  184. break;
  185. address += MCG_XBLK_ADDR;
  186. }
  187. else
  188. ++address;
  189. if (rdmsr_safe(address, &low, &high))
  190. break;
  191. if (!(high & MASK_VALID_HI)) {
  192. if (block)
  193. continue;
  194. else
  195. break;
  196. }
  197. if (!(high & MASK_CNTP_HI) ||
  198. (high & MASK_LOCKED_HI))
  199. continue;
  200. /* Log the machine check that caused the threshold
  201. event. */
  202. do_machine_check(NULL, 0);
  203. if (high & MASK_OVERFLOW_HI) {
  204. rdmsrl(address, m.misc);
  205. rdmsrl(MSR_IA32_MC0_STATUS + bank * 4,
  206. m.status);
  207. m.bank = K8_MCE_THRESHOLD_BASE
  208. + bank * NR_BLOCKS
  209. + block;
  210. mce_log(&m);
  211. goto out;
  212. }
  213. }
  214. }
  215. out:
  216. inc_irq_stat(irq_threshold_count);
  217. irq_exit();
  218. }
  219. /*
  220. * Sysfs Interface
  221. */
  222. struct threshold_attr {
  223. struct attribute attr;
  224. ssize_t(*show) (struct threshold_block *, char *);
  225. ssize_t(*store) (struct threshold_block *, const char *, size_t count);
  226. };
  227. #define SHOW_FIELDS(name) \
  228. static ssize_t show_ ## name(struct threshold_block * b, char *buf) \
  229. { \
  230. return sprintf(buf, "%lx\n", (unsigned long) b->name); \
  231. }
  232. SHOW_FIELDS(interrupt_enable)
  233. SHOW_FIELDS(threshold_limit)
  234. static ssize_t store_interrupt_enable(struct threshold_block *b,
  235. const char *buf, size_t count)
  236. {
  237. char *end;
  238. struct thresh_restart tr;
  239. unsigned long new = simple_strtoul(buf, &end, 0);
  240. if (end == buf)
  241. return -EINVAL;
  242. b->interrupt_enable = !!new;
  243. tr.b = b;
  244. tr.reset = 0;
  245. tr.old_limit = 0;
  246. work_on_cpu(b->cpu, threshold_restart_bank, &tr);
  247. return end - buf;
  248. }
  249. static ssize_t store_threshold_limit(struct threshold_block *b,
  250. const char *buf, size_t count)
  251. {
  252. char *end;
  253. struct thresh_restart tr;
  254. unsigned long new = simple_strtoul(buf, &end, 0);
  255. if (end == buf)
  256. return -EINVAL;
  257. if (new > THRESHOLD_MAX)
  258. new = THRESHOLD_MAX;
  259. if (new < 1)
  260. new = 1;
  261. tr.old_limit = b->threshold_limit;
  262. b->threshold_limit = new;
  263. tr.b = b;
  264. tr.reset = 0;
  265. work_on_cpu(b->cpu, threshold_restart_bank, &tr);
  266. return end - buf;
  267. }
  268. static long local_error_count(void *_b)
  269. {
  270. struct threshold_block *b = _b;
  271. u32 low, high;
  272. rdmsr(b->address, low, high);
  273. return (high & 0xFFF) - (THRESHOLD_MAX - b->threshold_limit);
  274. }
  275. static ssize_t show_error_count(struct threshold_block *b, char *buf)
  276. {
  277. return sprintf(buf, "%lx\n", work_on_cpu(b->cpu, local_error_count, b));
  278. }
  279. static ssize_t store_error_count(struct threshold_block *b,
  280. const char *buf, size_t count)
  281. {
  282. struct thresh_restart tr = { .b = b, .reset = 1, .old_limit = 0 };
  283. work_on_cpu(b->cpu, threshold_restart_bank, &tr);
  284. return 1;
  285. }
  286. #define THRESHOLD_ATTR(_name,_mode,_show,_store) { \
  287. .attr = {.name = __stringify(_name), .mode = _mode }, \
  288. .show = _show, \
  289. .store = _store, \
  290. };
  291. #define RW_ATTR(name) \
  292. static struct threshold_attr name = \
  293. THRESHOLD_ATTR(name, 0644, show_## name, store_## name)
  294. RW_ATTR(interrupt_enable);
  295. RW_ATTR(threshold_limit);
  296. RW_ATTR(error_count);
  297. static struct attribute *default_attrs[] = {
  298. &interrupt_enable.attr,
  299. &threshold_limit.attr,
  300. &error_count.attr,
  301. NULL
  302. };
  303. #define to_block(k) container_of(k, struct threshold_block, kobj)
  304. #define to_attr(a) container_of(a, struct threshold_attr, attr)
  305. static ssize_t show(struct kobject *kobj, struct attribute *attr, char *buf)
  306. {
  307. struct threshold_block *b = to_block(kobj);
  308. struct threshold_attr *a = to_attr(attr);
  309. ssize_t ret;
  310. ret = a->show ? a->show(b, buf) : -EIO;
  311. return ret;
  312. }
  313. static ssize_t store(struct kobject *kobj, struct attribute *attr,
  314. const char *buf, size_t count)
  315. {
  316. struct threshold_block *b = to_block(kobj);
  317. struct threshold_attr *a = to_attr(attr);
  318. ssize_t ret;
  319. ret = a->store ? a->store(b, buf, count) : -EIO;
  320. return ret;
  321. }
  322. static struct sysfs_ops threshold_ops = {
  323. .show = show,
  324. .store = store,
  325. };
  326. static struct kobj_type threshold_ktype = {
  327. .sysfs_ops = &threshold_ops,
  328. .default_attrs = default_attrs,
  329. };
  330. static __cpuinit int allocate_threshold_blocks(unsigned int cpu,
  331. unsigned int bank,
  332. unsigned int block,
  333. u32 address)
  334. {
  335. int err;
  336. u32 low, high;
  337. struct threshold_block *b = NULL;
  338. if ((bank >= NR_BANKS) || (block >= NR_BLOCKS))
  339. return 0;
  340. if (rdmsr_safe(address, &low, &high))
  341. return 0;
  342. if (!(high & MASK_VALID_HI)) {
  343. if (block)
  344. goto recurse;
  345. else
  346. return 0;
  347. }
  348. if (!(high & MASK_CNTP_HI) ||
  349. (high & MASK_LOCKED_HI))
  350. goto recurse;
  351. b = kzalloc(sizeof(struct threshold_block), GFP_KERNEL);
  352. if (!b)
  353. return -ENOMEM;
  354. b->block = block;
  355. b->bank = bank;
  356. b->cpu = cpu;
  357. b->address = address;
  358. b->interrupt_enable = 0;
  359. b->threshold_limit = THRESHOLD_MAX;
  360. INIT_LIST_HEAD(&b->miscj);
  361. if (per_cpu(threshold_banks, cpu)[bank]->blocks)
  362. list_add(&b->miscj,
  363. &per_cpu(threshold_banks, cpu)[bank]->blocks->miscj);
  364. else
  365. per_cpu(threshold_banks, cpu)[bank]->blocks = b;
  366. err = kobject_init_and_add(&b->kobj, &threshold_ktype,
  367. per_cpu(threshold_banks, cpu)[bank]->kobj,
  368. "misc%i", block);
  369. if (err)
  370. goto out_free;
  371. recurse:
  372. if (!block) {
  373. address = (low & MASK_BLKPTR_LO) >> 21;
  374. if (!address)
  375. return 0;
  376. address += MCG_XBLK_ADDR;
  377. } else
  378. ++address;
  379. err = allocate_threshold_blocks(cpu, bank, ++block, address);
  380. if (err)
  381. goto out_free;
  382. if (b)
  383. kobject_uevent(&b->kobj, KOBJ_ADD);
  384. return err;
  385. out_free:
  386. if (b) {
  387. kobject_put(&b->kobj);
  388. kfree(b);
  389. }
  390. return err;
  391. }
  392. static __cpuinit long local_allocate_threshold_blocks(void *_bank)
  393. {
  394. unsigned int *bank = _bank;
  395. return allocate_threshold_blocks(smp_processor_id(), *bank, 0,
  396. MSR_IA32_MC0_MISC + *bank * 4);
  397. }
  398. /* symlinks sibling shared banks to first core. first core owns dir/files. */
  399. static __cpuinit int threshold_create_bank(unsigned int cpu, unsigned int bank)
  400. {
  401. int i, err = 0;
  402. struct threshold_bank *b = NULL;
  403. char name[32];
  404. sprintf(name, "threshold_bank%i", bank);
  405. #ifdef CONFIG_SMP
  406. if (cpu_data(cpu).cpu_core_id && shared_bank[bank]) { /* symlink */
  407. i = first_cpu(per_cpu(cpu_core_map, cpu));
  408. /* first core not up yet */
  409. if (cpu_data(i).cpu_core_id)
  410. goto out;
  411. /* already linked */
  412. if (per_cpu(threshold_banks, cpu)[bank])
  413. goto out;
  414. b = per_cpu(threshold_banks, i)[bank];
  415. if (!b)
  416. goto out;
  417. err = sysfs_create_link(&per_cpu(device_mce, cpu).kobj,
  418. b->kobj, name);
  419. if (err)
  420. goto out;
  421. b->cpus = per_cpu(cpu_core_map, cpu);
  422. per_cpu(threshold_banks, cpu)[bank] = b;
  423. goto out;
  424. }
  425. #endif
  426. b = kzalloc(sizeof(struct threshold_bank), GFP_KERNEL);
  427. if (!b) {
  428. err = -ENOMEM;
  429. goto out;
  430. }
  431. b->kobj = kobject_create_and_add(name, &per_cpu(device_mce, cpu).kobj);
  432. if (!b->kobj)
  433. goto out_free;
  434. #ifndef CONFIG_SMP
  435. b->cpus = CPU_MASK_ALL;
  436. #else
  437. b->cpus = per_cpu(cpu_core_map, cpu);
  438. #endif
  439. per_cpu(threshold_banks, cpu)[bank] = b;
  440. err = work_on_cpu(cpu, local_allocate_threshold_blocks, &bank);
  441. if (err)
  442. goto out_free;
  443. for_each_cpu_mask_nr(i, b->cpus) {
  444. if (i == cpu)
  445. continue;
  446. err = sysfs_create_link(&per_cpu(device_mce, i).kobj,
  447. b->kobj, name);
  448. if (err)
  449. goto out;
  450. per_cpu(threshold_banks, i)[bank] = b;
  451. }
  452. goto out;
  453. out_free:
  454. per_cpu(threshold_banks, cpu)[bank] = NULL;
  455. kfree(b);
  456. out:
  457. return err;
  458. }
  459. /* create dir/files for all valid threshold banks */
  460. static __cpuinit int threshold_create_device(unsigned int cpu)
  461. {
  462. unsigned int bank;
  463. int err = 0;
  464. for (bank = 0; bank < NR_BANKS; ++bank) {
  465. if (!(per_cpu(bank_map, cpu) & (1 << bank)))
  466. continue;
  467. err = threshold_create_bank(cpu, bank);
  468. if (err)
  469. goto out;
  470. }
  471. out:
  472. return err;
  473. }
  474. /*
  475. * let's be hotplug friendly.
  476. * in case of multiple core processors, the first core always takes ownership
  477. * of shared sysfs dir/files, and rest of the cores will be symlinked to it.
  478. */
  479. static void deallocate_threshold_block(unsigned int cpu,
  480. unsigned int bank)
  481. {
  482. struct threshold_block *pos = NULL;
  483. struct threshold_block *tmp = NULL;
  484. struct threshold_bank *head = per_cpu(threshold_banks, cpu)[bank];
  485. if (!head)
  486. return;
  487. list_for_each_entry_safe(pos, tmp, &head->blocks->miscj, miscj) {
  488. kobject_put(&pos->kobj);
  489. list_del(&pos->miscj);
  490. kfree(pos);
  491. }
  492. kfree(per_cpu(threshold_banks, cpu)[bank]->blocks);
  493. per_cpu(threshold_banks, cpu)[bank]->blocks = NULL;
  494. }
  495. static void threshold_remove_bank(unsigned int cpu, int bank)
  496. {
  497. int i = 0;
  498. struct threshold_bank *b;
  499. char name[32];
  500. b = per_cpu(threshold_banks, cpu)[bank];
  501. if (!b)
  502. return;
  503. if (!b->blocks)
  504. goto free_out;
  505. sprintf(name, "threshold_bank%i", bank);
  506. #ifdef CONFIG_SMP
  507. /* sibling symlink */
  508. if (shared_bank[bank] && b->blocks->cpu != cpu) {
  509. sysfs_remove_link(&per_cpu(device_mce, cpu).kobj, name);
  510. per_cpu(threshold_banks, cpu)[bank] = NULL;
  511. return;
  512. }
  513. #endif
  514. /* remove all sibling symlinks before unregistering */
  515. for_each_cpu_mask_nr(i, b->cpus) {
  516. if (i == cpu)
  517. continue;
  518. sysfs_remove_link(&per_cpu(device_mce, i).kobj, name);
  519. per_cpu(threshold_banks, i)[bank] = NULL;
  520. }
  521. deallocate_threshold_block(cpu, bank);
  522. free_out:
  523. kobject_del(b->kobj);
  524. kobject_put(b->kobj);
  525. kfree(b);
  526. per_cpu(threshold_banks, cpu)[bank] = NULL;
  527. }
  528. static void threshold_remove_device(unsigned int cpu)
  529. {
  530. unsigned int bank;
  531. for (bank = 0; bank < NR_BANKS; ++bank) {
  532. if (!(per_cpu(bank_map, cpu) & (1 << bank)))
  533. continue;
  534. threshold_remove_bank(cpu, bank);
  535. }
  536. }
  537. /* get notified when a cpu comes on/off */
  538. static void __cpuinit amd_64_threshold_cpu_callback(unsigned long action,
  539. unsigned int cpu)
  540. {
  541. if (cpu >= NR_CPUS)
  542. return;
  543. switch (action) {
  544. case CPU_ONLINE:
  545. case CPU_ONLINE_FROZEN:
  546. threshold_create_device(cpu);
  547. break;
  548. case CPU_DEAD:
  549. case CPU_DEAD_FROZEN:
  550. threshold_remove_device(cpu);
  551. break;
  552. default:
  553. break;
  554. }
  555. }
  556. static __init int threshold_init_device(void)
  557. {
  558. unsigned lcpu = 0;
  559. /* to hit CPUs online before the notifier is up */
  560. for_each_online_cpu(lcpu) {
  561. int err = threshold_create_device(lcpu);
  562. if (err)
  563. return err;
  564. }
  565. threshold_cpu_callback = amd_64_threshold_cpu_callback;
  566. return 0;
  567. }
  568. device_initcall(threshold_init_device);