via_irq.c 9.7 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343
  1. /* via_irq.c
  2. *
  3. * Copyright 2004 BEAM Ltd.
  4. * Copyright 2002 Tungsten Graphics, Inc.
  5. * Copyright 2005 Thomas Hellstrom.
  6. * All Rights Reserved.
  7. *
  8. * Permission is hereby granted, free of charge, to any person obtaining a
  9. * copy of this software and associated documentation files (the "Software"),
  10. * to deal in the Software without restriction, including without limitation
  11. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  12. * and/or sell copies of the Software, and to permit persons to whom the
  13. * Software is furnished to do so, subject to the following conditions:
  14. *
  15. * The above copyright notice and this permission notice (including the next
  16. * paragraph) shall be included in all copies or substantial portions of the
  17. * Software.
  18. *
  19. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  20. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  21. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  22. * BEAM LTD, TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
  23. * DAMAGES OR
  24. * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  25. * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  26. * DEALINGS IN THE SOFTWARE.
  27. *
  28. * Authors:
  29. * Terry Barnaby <terry1@beam.ltd.uk>
  30. * Keith Whitwell <keith@tungstengraphics.com>
  31. * Thomas Hellstrom <unichrome@shipmail.org>
  32. *
  33. * This code provides standard DRM access to the Via Unichrome / Pro Vertical blank
  34. * interrupt, as well as an infrastructure to handle other interrupts of the chip.
  35. * The refresh rate is also calculated for video playback sync purposes.
  36. */
  37. #include "drmP.h"
  38. #include "drm.h"
  39. #include "via_drm.h"
  40. #include "via_drv.h"
  41. #define VIA_REG_INTERRUPT 0x200
  42. /* VIA_REG_INTERRUPT */
  43. #define VIA_IRQ_GLOBAL (1 << 31)
  44. #define VIA_IRQ_VBLANK_ENABLE (1 << 19)
  45. #define VIA_IRQ_VBLANK_PENDING (1 << 3)
  46. #define VIA_IRQ_HQV0_ENABLE (1 << 11)
  47. #define VIA_IRQ_HQV1_ENABLE (1 << 25)
  48. #define VIA_IRQ_HQV0_PENDING (1 << 9)
  49. #define VIA_IRQ_HQV1_PENDING (1 << 10)
  50. /*
  51. * Device-specific IRQs go here. This type might need to be extended with
  52. * the register if there are multiple IRQ control registers.
  53. * Currently we activate the HQV interrupts of Unichrome Pro group A.
  54. */
  55. static maskarray_t via_pro_group_a_irqs[] = {
  56. {VIA_IRQ_HQV0_ENABLE, VIA_IRQ_HQV0_PENDING, 0x000003D0, 0x00008010,
  57. 0x00000000},
  58. {VIA_IRQ_HQV1_ENABLE, VIA_IRQ_HQV1_PENDING, 0x000013D0, 0x00008010,
  59. 0x00000000}
  60. };
  61. static int via_num_pro_group_a =
  62. sizeof(via_pro_group_a_irqs) / sizeof(maskarray_t);
  63. static maskarray_t via_unichrome_irqs[] = { };
  64. static int via_num_unichrome = sizeof(via_unichrome_irqs) / sizeof(maskarray_t);
  65. static unsigned time_diff(struct timeval *now, struct timeval *then)
  66. {
  67. return (now->tv_usec >= then->tv_usec) ?
  68. now->tv_usec - then->tv_usec :
  69. 1000000 - (then->tv_usec - now->tv_usec);
  70. }
  71. irqreturn_t via_driver_irq_handler(DRM_IRQ_ARGS)
  72. {
  73. drm_device_t *dev = (drm_device_t *) arg;
  74. drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private;
  75. u32 status;
  76. int handled = 0;
  77. struct timeval cur_vblank;
  78. drm_via_irq_t *cur_irq = dev_priv->via_irqs;
  79. int i;
  80. status = VIA_READ(VIA_REG_INTERRUPT);
  81. if (status & VIA_IRQ_VBLANK_PENDING) {
  82. atomic_inc(&dev->vbl_received);
  83. if (!(atomic_read(&dev->vbl_received) & 0x0F)) {
  84. do_gettimeofday(&cur_vblank);
  85. if (dev_priv->last_vblank_valid) {
  86. dev_priv->usec_per_vblank =
  87. time_diff(&cur_vblank,
  88. &dev_priv->last_vblank) >> 4;
  89. }
  90. dev_priv->last_vblank = cur_vblank;
  91. dev_priv->last_vblank_valid = 1;
  92. }
  93. if (!(atomic_read(&dev->vbl_received) & 0xFF)) {
  94. DRM_DEBUG("US per vblank is: %u\n",
  95. dev_priv->usec_per_vblank);
  96. }
  97. DRM_WAKEUP(&dev->vbl_queue);
  98. drm_vbl_send_signals(dev);
  99. handled = 1;
  100. }
  101. for (i = 0; i < dev_priv->num_irqs; ++i) {
  102. if (status & cur_irq->pending_mask) {
  103. atomic_inc(&cur_irq->irq_received);
  104. DRM_WAKEUP(&cur_irq->irq_queue);
  105. handled = 1;
  106. }
  107. cur_irq++;
  108. }
  109. /* Acknowlege interrupts */
  110. VIA_WRITE(VIA_REG_INTERRUPT, status);
  111. if (handled)
  112. return IRQ_HANDLED;
  113. else
  114. return IRQ_NONE;
  115. }
  116. static __inline__ void viadrv_acknowledge_irqs(drm_via_private_t * dev_priv)
  117. {
  118. u32 status;
  119. if (dev_priv) {
  120. /* Acknowlege interrupts */
  121. status = VIA_READ(VIA_REG_INTERRUPT);
  122. VIA_WRITE(VIA_REG_INTERRUPT, status |
  123. dev_priv->irq_pending_mask);
  124. }
  125. }
  126. int via_driver_vblank_wait(drm_device_t * dev, unsigned int *sequence)
  127. {
  128. drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private;
  129. unsigned int cur_vblank;
  130. int ret = 0;
  131. DRM_DEBUG("viadrv_vblank_wait\n");
  132. if (!dev_priv) {
  133. DRM_ERROR("%s called with no initialization\n", __FUNCTION__);
  134. return -EINVAL;
  135. }
  136. viadrv_acknowledge_irqs(dev_priv);
  137. /* Assume that the user has missed the current sequence number
  138. * by about a day rather than she wants to wait for years
  139. * using vertical blanks...
  140. */
  141. DRM_WAIT_ON(ret, dev->vbl_queue, 3 * DRM_HZ,
  142. (((cur_vblank = atomic_read(&dev->vbl_received)) -
  143. *sequence) <= (1 << 23)));
  144. *sequence = cur_vblank;
  145. return ret;
  146. }
  147. static int
  148. via_driver_irq_wait(drm_device_t * dev, unsigned int irq, int force_sequence,
  149. unsigned int *sequence)
  150. {
  151. drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private;
  152. unsigned int cur_irq_sequence;
  153. drm_via_irq_t *cur_irq = dev_priv->via_irqs;
  154. int ret = 0;
  155. maskarray_t *masks = dev_priv->irq_masks;
  156. DRM_DEBUG("%s\n", __FUNCTION__);
  157. if (!dev_priv) {
  158. DRM_ERROR("%s called with no initialization\n", __FUNCTION__);
  159. return DRM_ERR(EINVAL);
  160. }
  161. if (irq >= dev_priv->num_irqs) {
  162. DRM_ERROR("%s Trying to wait on unknown irq %d\n", __FUNCTION__,
  163. irq);
  164. return DRM_ERR(EINVAL);
  165. }
  166. cur_irq += irq;
  167. if (masks[irq][2] && !force_sequence) {
  168. DRM_WAIT_ON(ret, cur_irq->irq_queue, 3 * DRM_HZ,
  169. ((VIA_READ(masks[irq][2]) & masks[irq][3]) ==
  170. masks[irq][4]));
  171. cur_irq_sequence = atomic_read(&cur_irq->irq_received);
  172. } else {
  173. DRM_WAIT_ON(ret, cur_irq->irq_queue, 3 * DRM_HZ,
  174. (((cur_irq_sequence =
  175. atomic_read(&cur_irq->irq_received)) -
  176. *sequence) <= (1 << 23)));
  177. }
  178. *sequence = cur_irq_sequence;
  179. return ret;
  180. }
  181. /*
  182. * drm_dma.h hooks
  183. */
  184. void via_driver_irq_preinstall(drm_device_t * dev)
  185. {
  186. drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private;
  187. u32 status;
  188. drm_via_irq_t *cur_irq = dev_priv->via_irqs;
  189. int i;
  190. DRM_DEBUG("driver_irq_preinstall: dev_priv: %p\n", dev_priv);
  191. if (dev_priv) {
  192. dev_priv->irq_enable_mask = VIA_IRQ_VBLANK_ENABLE;
  193. dev_priv->irq_pending_mask = VIA_IRQ_VBLANK_PENDING;
  194. dev_priv->irq_masks = (dev_priv->pro_group_a) ?
  195. via_pro_group_a_irqs : via_unichrome_irqs;
  196. dev_priv->num_irqs = (dev_priv->pro_group_a) ?
  197. via_num_pro_group_a : via_num_unichrome;
  198. for (i = 0; i < dev_priv->num_irqs; ++i) {
  199. atomic_set(&cur_irq->irq_received, 0);
  200. cur_irq->enable_mask = dev_priv->irq_masks[i][0];
  201. cur_irq->pending_mask = dev_priv->irq_masks[i][1];
  202. DRM_INIT_WAITQUEUE(&cur_irq->irq_queue);
  203. dev_priv->irq_enable_mask |= cur_irq->enable_mask;
  204. dev_priv->irq_pending_mask |= cur_irq->pending_mask;
  205. cur_irq++;
  206. DRM_DEBUG("Initializing IRQ %d\n", i);
  207. }
  208. dev_priv->last_vblank_valid = 0;
  209. // Clear VSync interrupt regs
  210. status = VIA_READ(VIA_REG_INTERRUPT);
  211. VIA_WRITE(VIA_REG_INTERRUPT, status &
  212. ~(dev_priv->irq_enable_mask));
  213. /* Clear bits if they're already high */
  214. viadrv_acknowledge_irqs(dev_priv);
  215. }
  216. }
  217. void via_driver_irq_postinstall(drm_device_t * dev)
  218. {
  219. drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private;
  220. u32 status;
  221. DRM_DEBUG("via_driver_irq_postinstall\n");
  222. if (dev_priv) {
  223. status = VIA_READ(VIA_REG_INTERRUPT);
  224. VIA_WRITE(VIA_REG_INTERRUPT, status | VIA_IRQ_GLOBAL
  225. | dev_priv->irq_enable_mask);
  226. /* Some magic, oh for some data sheets ! */
  227. VIA_WRITE8(0x83d4, 0x11);
  228. VIA_WRITE8(0x83d5, VIA_READ8(0x83d5) | 0x30);
  229. }
  230. }
  231. void via_driver_irq_uninstall(drm_device_t * dev)
  232. {
  233. drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private;
  234. u32 status;
  235. DRM_DEBUG("driver_irq_uninstall)\n");
  236. if (dev_priv) {
  237. /* Some more magic, oh for some data sheets ! */
  238. VIA_WRITE8(0x83d4, 0x11);
  239. VIA_WRITE8(0x83d5, VIA_READ8(0x83d5) & ~0x30);
  240. status = VIA_READ(VIA_REG_INTERRUPT);
  241. VIA_WRITE(VIA_REG_INTERRUPT, status &
  242. ~(VIA_IRQ_VBLANK_ENABLE | dev_priv->irq_enable_mask));
  243. }
  244. }
  245. int via_wait_irq(DRM_IOCTL_ARGS)
  246. {
  247. drm_file_t *priv = filp->private_data;
  248. drm_device_t *dev = priv->head->dev;
  249. drm_via_irqwait_t __user *argp = (void __user *)data;
  250. drm_via_irqwait_t irqwait;
  251. struct timeval now;
  252. int ret = 0;
  253. drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private;
  254. drm_via_irq_t *cur_irq = dev_priv->via_irqs;
  255. int force_sequence;
  256. if (!dev->irq)
  257. return DRM_ERR(EINVAL);
  258. DRM_COPY_FROM_USER_IOCTL(irqwait, argp, sizeof(irqwait));
  259. if (irqwait.request.irq >= dev_priv->num_irqs) {
  260. DRM_ERROR("%s Trying to wait on unknown irq %d\n", __FUNCTION__,
  261. irqwait.request.irq);
  262. return DRM_ERR(EINVAL);
  263. }
  264. cur_irq += irqwait.request.irq;
  265. switch (irqwait.request.type & ~VIA_IRQ_FLAGS_MASK) {
  266. case VIA_IRQ_RELATIVE:
  267. irqwait.request.sequence += atomic_read(&cur_irq->irq_received);
  268. irqwait.request.type &= ~_DRM_VBLANK_RELATIVE;
  269. case VIA_IRQ_ABSOLUTE:
  270. break;
  271. default:
  272. return DRM_ERR(EINVAL);
  273. }
  274. if (irqwait.request.type & VIA_IRQ_SIGNAL) {
  275. DRM_ERROR("%s Signals on Via IRQs not implemented yet.\n",
  276. __FUNCTION__);
  277. return DRM_ERR(EINVAL);
  278. }
  279. force_sequence = (irqwait.request.type & VIA_IRQ_FORCE_SEQUENCE);
  280. ret = via_driver_irq_wait(dev, irqwait.request.irq, force_sequence,
  281. &irqwait.request.sequence);
  282. do_gettimeofday(&now);
  283. irqwait.reply.tval_sec = now.tv_sec;
  284. irqwait.reply.tval_usec = now.tv_usec;
  285. DRM_COPY_TO_USER_IOCTL(argp, irqwait, sizeof(irqwait));
  286. return ret;
  287. }