usb.c 16 KB

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  1. /*
  2. * arch/arm/plat-omap/usb.c -- platform level USB initialization
  3. *
  4. * Copyright (C) 2004 Texas Instruments, Inc.
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  19. */
  20. #undef DEBUG
  21. #include <linux/module.h>
  22. #include <linux/kernel.h>
  23. #include <linux/types.h>
  24. #include <linux/errno.h>
  25. #include <linux/init.h>
  26. #include <linux/platform_device.h>
  27. #include <linux/usb/otg.h>
  28. #include <linux/io.h>
  29. #include <asm/irq.h>
  30. #include <asm/system.h>
  31. #include <mach/hardware.h>
  32. #include <plat/control.h>
  33. #include <plat/mux.h>
  34. #include <plat/usb.h>
  35. #include <plat/board.h>
  36. #define INT_USB_IRQ_GEN IH2_BASE + 20
  37. #define INT_USB_IRQ_NISO IH2_BASE + 30
  38. #define INT_USB_IRQ_ISO IH2_BASE + 29
  39. #define INT_USB_IRQ_HGEN INT_USB_HHC_1
  40. #define INT_USB_IRQ_OTG IH2_BASE + 8
  41. /* These routines should handle the standard chip-specific modes
  42. * for usb0/1/2 ports, covering basic mux and transceiver setup.
  43. *
  44. * Some board-*.c files will need to set up additional mux options,
  45. * like for suspend handling, vbus sensing, GPIOs, and the D+ pullup.
  46. */
  47. /* TESTED ON:
  48. * - 1611B H2 (with usb1 mini-AB) using standard Mini-B or OTG cables
  49. * - 5912 OSK OHCI (with usb0 standard-A), standard A-to-B cables
  50. * - 5912 OSK UDC, with *nonstandard* A-to-A cable
  51. * - 1510 Innovator UDC with bundled usb0 cable
  52. * - 1510 Innovator OHCI with bundled usb1/usb2 cable
  53. * - 1510 Innovator OHCI with custom usb0 cable, feeding 5V VBUS
  54. * - 1710 custom development board using alternate pin group
  55. * - 1710 H3 (with usb1 mini-AB) using standard Mini-B or OTG cables
  56. */
  57. /*-------------------------------------------------------------------------*/
  58. #if defined(CONFIG_ARCH_OMAP_OTG) || defined(CONFIG_ARCH_OMAP15XX)
  59. static u32 __init omap_usb0_init(unsigned nwires, unsigned is_device)
  60. {
  61. u32 syscon1 = 0;
  62. if (nwires == 0) {
  63. if (!cpu_is_omap15xx()) {
  64. u32 l;
  65. /* pulldown D+/D- */
  66. l = omap_readl(USB_TRANSCEIVER_CTRL);
  67. l &= ~(3 << 1);
  68. omap_writel(l, USB_TRANSCEIVER_CTRL);
  69. }
  70. return 0;
  71. }
  72. if (is_device) {
  73. if (cpu_is_omap7xx()) {
  74. omap_cfg_reg(AA17_7XX_USB_DM);
  75. omap_cfg_reg(W16_7XX_USB_PU_EN);
  76. omap_cfg_reg(W17_7XX_USB_VBUSI);
  77. omap_cfg_reg(W18_7XX_USB_DMCK_OUT);
  78. omap_cfg_reg(W19_7XX_USB_DCRST);
  79. } else
  80. omap_cfg_reg(W4_USB_PUEN);
  81. }
  82. if (nwires == 2) {
  83. u32 l;
  84. // omap_cfg_reg(P9_USB_DP);
  85. // omap_cfg_reg(R8_USB_DM);
  86. if (cpu_is_omap15xx()) {
  87. /* This works on 1510-Innovator */
  88. return 0;
  89. }
  90. /* NOTES:
  91. * - peripheral should configure VBUS detection!
  92. * - only peripherals may use the internal D+/D- pulldowns
  93. * - OTG support on this port not yet written
  94. */
  95. /* Don't do this for omap7xx -- it causes USB to not work correctly */
  96. if (!cpu_is_omap7xx()) {
  97. l = omap_readl(USB_TRANSCEIVER_CTRL);
  98. l &= ~(7 << 4);
  99. if (!is_device)
  100. l |= (3 << 1);
  101. omap_writel(l, USB_TRANSCEIVER_CTRL);
  102. }
  103. return 3 << 16;
  104. }
  105. /* alternate pin config, external transceiver */
  106. if (cpu_is_omap15xx()) {
  107. printk(KERN_ERR "no usb0 alt pin config on 15xx\n");
  108. return 0;
  109. }
  110. omap_cfg_reg(V6_USB0_TXD);
  111. omap_cfg_reg(W9_USB0_TXEN);
  112. omap_cfg_reg(W5_USB0_SE0);
  113. if (nwires != 3)
  114. omap_cfg_reg(Y5_USB0_RCV);
  115. /* NOTE: SPEED and SUSP aren't configured here. OTG hosts
  116. * may be able to use I2C requests to set those bits along
  117. * with VBUS switching and overcurrent detection.
  118. */
  119. if (nwires != 6) {
  120. u32 l;
  121. l = omap_readl(USB_TRANSCEIVER_CTRL);
  122. l &= ~CONF_USB2_UNI_R;
  123. omap_writel(l, USB_TRANSCEIVER_CTRL);
  124. }
  125. switch (nwires) {
  126. case 3:
  127. syscon1 = 2;
  128. break;
  129. case 4:
  130. syscon1 = 1;
  131. break;
  132. case 6:
  133. syscon1 = 3;
  134. {
  135. u32 l;
  136. omap_cfg_reg(AA9_USB0_VP);
  137. omap_cfg_reg(R9_USB0_VM);
  138. l = omap_readl(USB_TRANSCEIVER_CTRL);
  139. l |= CONF_USB2_UNI_R;
  140. omap_writel(l, USB_TRANSCEIVER_CTRL);
  141. }
  142. break;
  143. default:
  144. printk(KERN_ERR "illegal usb%d %d-wire transceiver\n",
  145. 0, nwires);
  146. }
  147. return syscon1 << 16;
  148. }
  149. static u32 __init omap_usb1_init(unsigned nwires)
  150. {
  151. u32 syscon1 = 0;
  152. if (!cpu_is_omap15xx() && nwires != 6) {
  153. u32 l;
  154. l = omap_readl(USB_TRANSCEIVER_CTRL);
  155. l &= ~CONF_USB1_UNI_R;
  156. omap_writel(l, USB_TRANSCEIVER_CTRL);
  157. }
  158. if (nwires == 0)
  159. return 0;
  160. /* external transceiver */
  161. omap_cfg_reg(USB1_TXD);
  162. omap_cfg_reg(USB1_TXEN);
  163. if (nwires != 3)
  164. omap_cfg_reg(USB1_RCV);
  165. if (cpu_is_omap15xx()) {
  166. omap_cfg_reg(USB1_SEO);
  167. omap_cfg_reg(USB1_SPEED);
  168. // SUSP
  169. } else if (cpu_is_omap1610() || cpu_is_omap5912()) {
  170. omap_cfg_reg(W13_1610_USB1_SE0);
  171. omap_cfg_reg(R13_1610_USB1_SPEED);
  172. // SUSP
  173. } else if (cpu_is_omap1710()) {
  174. omap_cfg_reg(R13_1710_USB1_SE0);
  175. // SUSP
  176. } else {
  177. pr_debug("usb%d cpu unrecognized\n", 1);
  178. return 0;
  179. }
  180. switch (nwires) {
  181. case 2:
  182. goto bad;
  183. case 3:
  184. syscon1 = 2;
  185. break;
  186. case 4:
  187. syscon1 = 1;
  188. break;
  189. case 6:
  190. syscon1 = 3;
  191. omap_cfg_reg(USB1_VP);
  192. omap_cfg_reg(USB1_VM);
  193. if (!cpu_is_omap15xx()) {
  194. u32 l;
  195. l = omap_readl(USB_TRANSCEIVER_CTRL);
  196. l |= CONF_USB1_UNI_R;
  197. omap_writel(l, USB_TRANSCEIVER_CTRL);
  198. }
  199. break;
  200. default:
  201. bad:
  202. printk(KERN_ERR "illegal usb%d %d-wire transceiver\n",
  203. 1, nwires);
  204. }
  205. return syscon1 << 20;
  206. }
  207. static u32 __init omap_usb2_init(unsigned nwires, unsigned alt_pingroup)
  208. {
  209. u32 syscon1 = 0;
  210. /* NOTE omap1 erratum: must leave USB2_UNI_R set if usb0 in use */
  211. if (alt_pingroup || nwires == 0)
  212. return 0;
  213. if (!cpu_is_omap15xx() && nwires != 6) {
  214. u32 l;
  215. l = omap_readl(USB_TRANSCEIVER_CTRL);
  216. l &= ~CONF_USB2_UNI_R;
  217. omap_writel(l, USB_TRANSCEIVER_CTRL);
  218. }
  219. /* external transceiver */
  220. if (cpu_is_omap15xx()) {
  221. omap_cfg_reg(USB2_TXD);
  222. omap_cfg_reg(USB2_TXEN);
  223. omap_cfg_reg(USB2_SEO);
  224. if (nwires != 3)
  225. omap_cfg_reg(USB2_RCV);
  226. /* there is no USB2_SPEED */
  227. } else if (cpu_is_omap16xx()) {
  228. omap_cfg_reg(V6_USB2_TXD);
  229. omap_cfg_reg(W9_USB2_TXEN);
  230. omap_cfg_reg(W5_USB2_SE0);
  231. if (nwires != 3)
  232. omap_cfg_reg(Y5_USB2_RCV);
  233. // FIXME omap_cfg_reg(USB2_SPEED);
  234. } else {
  235. pr_debug("usb%d cpu unrecognized\n", 1);
  236. return 0;
  237. }
  238. // omap_cfg_reg(USB2_SUSP);
  239. switch (nwires) {
  240. case 2:
  241. goto bad;
  242. case 3:
  243. syscon1 = 2;
  244. break;
  245. case 4:
  246. syscon1 = 1;
  247. break;
  248. case 5:
  249. goto bad;
  250. case 6:
  251. syscon1 = 3;
  252. if (cpu_is_omap15xx()) {
  253. omap_cfg_reg(USB2_VP);
  254. omap_cfg_reg(USB2_VM);
  255. } else {
  256. u32 l;
  257. omap_cfg_reg(AA9_USB2_VP);
  258. omap_cfg_reg(R9_USB2_VM);
  259. l = omap_readl(USB_TRANSCEIVER_CTRL);
  260. l |= CONF_USB2_UNI_R;
  261. omap_writel(l, USB_TRANSCEIVER_CTRL);
  262. }
  263. break;
  264. default:
  265. bad:
  266. printk(KERN_ERR "illegal usb%d %d-wire transceiver\n",
  267. 2, nwires);
  268. }
  269. return syscon1 << 24;
  270. }
  271. #else
  272. #define omap_usb0_init NULL
  273. #define omap_usb1_init NULL
  274. #define omap_usb2_init NULL
  275. #endif
  276. /*-------------------------------------------------------------------------*/
  277. #ifdef CONFIG_USB_GADGET_OMAP
  278. static struct resource udc_resources[] = {
  279. /* order is significant! */
  280. { /* registers */
  281. .start = UDC_BASE,
  282. .end = UDC_BASE + 0xff,
  283. .flags = IORESOURCE_MEM,
  284. }, { /* general IRQ */
  285. .start = INT_USB_IRQ_GEN,
  286. .flags = IORESOURCE_IRQ,
  287. }, { /* PIO IRQ */
  288. .start = INT_USB_IRQ_NISO,
  289. .flags = IORESOURCE_IRQ,
  290. }, { /* SOF IRQ */
  291. .start = INT_USB_IRQ_ISO,
  292. .flags = IORESOURCE_IRQ,
  293. },
  294. };
  295. static u64 udc_dmamask = ~(u32)0;
  296. static struct platform_device udc_device = {
  297. .name = "omap_udc",
  298. .id = -1,
  299. .dev = {
  300. .dma_mask = &udc_dmamask,
  301. .coherent_dma_mask = 0xffffffff,
  302. },
  303. .num_resources = ARRAY_SIZE(udc_resources),
  304. .resource = udc_resources,
  305. };
  306. static inline void udc_device_init(struct omap_usb_config *pdata)
  307. {
  308. pdata->udc_device = &udc_device;
  309. }
  310. #else
  311. static inline void udc_device_init(struct omap_usb_config *pdata)
  312. {
  313. }
  314. #endif
  315. #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
  316. /* The dmamask must be set for OHCI to work */
  317. static u64 ohci_dmamask = ~(u32)0;
  318. static struct resource ohci_resources[] = {
  319. {
  320. .start = OMAP_OHCI_BASE,
  321. .end = OMAP_OHCI_BASE + 0xff,
  322. .flags = IORESOURCE_MEM,
  323. },
  324. {
  325. .start = INT_USB_IRQ_HGEN,
  326. .flags = IORESOURCE_IRQ,
  327. },
  328. };
  329. static struct platform_device ohci_device = {
  330. .name = "ohci",
  331. .id = -1,
  332. .dev = {
  333. .dma_mask = &ohci_dmamask,
  334. .coherent_dma_mask = 0xffffffff,
  335. },
  336. .num_resources = ARRAY_SIZE(ohci_resources),
  337. .resource = ohci_resources,
  338. };
  339. static inline void ohci_device_init(struct omap_usb_config *pdata)
  340. {
  341. pdata->ohci_device = &ohci_device;
  342. }
  343. #else
  344. static inline void ohci_device_init(struct omap_usb_config *pdata)
  345. {
  346. }
  347. #endif
  348. #if defined(CONFIG_USB_OTG) && defined(CONFIG_ARCH_OMAP_OTG)
  349. static struct resource otg_resources[] = {
  350. /* order is significant! */
  351. {
  352. .start = OTG_BASE,
  353. .end = OTG_BASE + 0xff,
  354. .flags = IORESOURCE_MEM,
  355. }, {
  356. .start = INT_USB_IRQ_OTG,
  357. .flags = IORESOURCE_IRQ,
  358. },
  359. };
  360. static struct platform_device otg_device = {
  361. .name = "omap_otg",
  362. .id = -1,
  363. .num_resources = ARRAY_SIZE(otg_resources),
  364. .resource = otg_resources,
  365. };
  366. static inline void otg_device_init(struct omap_usb_config *pdata)
  367. {
  368. pdata->otg_device = &otg_device;
  369. }
  370. #else
  371. static inline void otg_device_init(struct omap_usb_config *pdata)
  372. {
  373. }
  374. #endif
  375. /*-------------------------------------------------------------------------*/
  376. // FIXME correct answer depends on hmc_mode,
  377. // as does (on omap1) any nonzero value for config->otg port number
  378. #ifdef CONFIG_USB_GADGET_OMAP
  379. #define is_usb0_device(config) 1
  380. #else
  381. #define is_usb0_device(config) 0
  382. #endif
  383. /*-------------------------------------------------------------------------*/
  384. #ifdef CONFIG_ARCH_OMAP_OTG
  385. void __init
  386. omap_otg_init(struct omap_usb_config *config)
  387. {
  388. u32 syscon;
  389. int status;
  390. int alt_pingroup = 0;
  391. /* NOTE: no bus or clock setup (yet?) */
  392. syscon = omap_readl(OTG_SYSCON_1) & 0xffff;
  393. if (!(syscon & OTG_RESET_DONE))
  394. pr_debug("USB resets not complete?\n");
  395. //omap_writew(0, OTG_IRQ_EN);
  396. /* pin muxing and transceiver pinouts */
  397. if (config->pins[0] > 2) /* alt pingroup 2 */
  398. alt_pingroup = 1;
  399. syscon |= config->usb0_init(config->pins[0], is_usb0_device(config));
  400. syscon |= config->usb1_init(config->pins[1]);
  401. syscon |= config->usb2_init(config->pins[2], alt_pingroup);
  402. pr_debug("OTG_SYSCON_1 = %08x\n", omap_readl(OTG_SYSCON_1));
  403. omap_writel(syscon, OTG_SYSCON_1);
  404. syscon = config->hmc_mode;
  405. syscon |= USBX_SYNCHRO | (4 << 16) /* B_ASE0_BRST */;
  406. #ifdef CONFIG_USB_OTG
  407. if (config->otg)
  408. syscon |= OTG_EN;
  409. #endif
  410. if (cpu_class_is_omap1())
  411. pr_debug("USB_TRANSCEIVER_CTRL = %03x\n",
  412. omap_readl(USB_TRANSCEIVER_CTRL));
  413. pr_debug("OTG_SYSCON_2 = %08x\n", omap_readl(OTG_SYSCON_2));
  414. omap_writel(syscon, OTG_SYSCON_2);
  415. printk("USB: hmc %d", config->hmc_mode);
  416. if (!alt_pingroup)
  417. printk(", usb2 alt %d wires", config->pins[2]);
  418. else if (config->pins[0])
  419. printk(", usb0 %d wires%s", config->pins[0],
  420. is_usb0_device(config) ? " (dev)" : "");
  421. if (config->pins[1])
  422. printk(", usb1 %d wires", config->pins[1]);
  423. if (!alt_pingroup && config->pins[2])
  424. printk(", usb2 %d wires", config->pins[2]);
  425. if (config->otg)
  426. printk(", Mini-AB on usb%d", config->otg - 1);
  427. printk("\n");
  428. if (cpu_class_is_omap1()) {
  429. u16 w;
  430. /* leave USB clocks/controllers off until needed */
  431. w = omap_readw(ULPD_SOFT_REQ);
  432. w &= ~SOFT_USB_CLK_REQ;
  433. omap_writew(w, ULPD_SOFT_REQ);
  434. w = omap_readw(ULPD_CLOCK_CTRL);
  435. w &= ~USB_MCLK_EN;
  436. w |= DIS_USB_PVCI_CLK;
  437. omap_writew(w, ULPD_CLOCK_CTRL);
  438. }
  439. syscon = omap_readl(OTG_SYSCON_1);
  440. syscon |= HST_IDLE_EN|DEV_IDLE_EN|OTG_IDLE_EN;
  441. #ifdef CONFIG_USB_GADGET_OMAP
  442. if (config->otg || config->register_dev) {
  443. struct platform_device *udc_device = config->udc_device;
  444. syscon &= ~DEV_IDLE_EN;
  445. udc_device->dev.platform_data = config;
  446. /* IRQ numbers for omap7xx */
  447. if(cpu_is_omap7xx()) {
  448. udc_resources[1].start = INT_7XX_USB_GENI;
  449. udc_resources[2].start = INT_7XX_USB_NON_ISO;
  450. udc_resources[3].start = INT_7XX_USB_ISO;
  451. }
  452. status = platform_device_register(udc_device);
  453. if (status)
  454. pr_debug("can't register UDC device, %d\n", status);
  455. }
  456. #endif
  457. #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
  458. if (config->otg || config->register_host) {
  459. struct platform_device *ohci_device = config->ohci_device;
  460. syscon &= ~HST_IDLE_EN;
  461. ohci_device->dev.platform_data = config;
  462. if (cpu_is_omap7xx())
  463. ohci_resources[1].start = INT_7XX_USB_HHC_1;
  464. status = platform_device_register(ohci_device);
  465. if (status)
  466. pr_debug("can't register OHCI device, %d\n", status);
  467. }
  468. #endif
  469. #ifdef CONFIG_USB_OTG
  470. if (config->otg) {
  471. struct platform_device *otg_device = config->otg_device;
  472. syscon &= ~OTG_IDLE_EN;
  473. otg_device->dev.platform_data = config;
  474. if (cpu_is_omap7xx())
  475. otg_resources[1].start = INT_7XX_USB_OTG;
  476. status = platform_device_register(otg_device);
  477. if (status)
  478. pr_debug("can't register OTG device, %d\n", status);
  479. }
  480. #endif
  481. pr_debug("OTG_SYSCON_1 = %08x\n", omap_readl(OTG_SYSCON_1));
  482. omap_writel(syscon, OTG_SYSCON_1);
  483. status = 0;
  484. }
  485. #else
  486. void omap_otg_init(struct omap_usb_config *config) {}
  487. #endif
  488. /*-------------------------------------------------------------------------*/
  489. #ifdef CONFIG_ARCH_OMAP15XX
  490. /* ULPD_DPLL_CTRL */
  491. #define DPLL_IOB (1 << 13)
  492. #define DPLL_PLL_ENABLE (1 << 4)
  493. #define DPLL_LOCK (1 << 0)
  494. /* ULPD_APLL_CTRL */
  495. #define APLL_NDPLL_SWITCH (1 << 0)
  496. static void __init omap_1510_usb_init(struct omap_usb_config *config)
  497. {
  498. unsigned int val;
  499. u16 w;
  500. config->usb0_init(config->pins[0], is_usb0_device(config));
  501. config->usb1_init(config->pins[1]);
  502. config->usb2_init(config->pins[2], 0);
  503. val = omap_readl(MOD_CONF_CTRL_0) & ~(0x3f << 1);
  504. val |= (config->hmc_mode << 1);
  505. omap_writel(val, MOD_CONF_CTRL_0);
  506. printk("USB: hmc %d", config->hmc_mode);
  507. if (config->pins[0])
  508. printk(", usb0 %d wires%s", config->pins[0],
  509. is_usb0_device(config) ? " (dev)" : "");
  510. if (config->pins[1])
  511. printk(", usb1 %d wires", config->pins[1]);
  512. if (config->pins[2])
  513. printk(", usb2 %d wires", config->pins[2]);
  514. printk("\n");
  515. /* use DPLL for 48 MHz function clock */
  516. pr_debug("APLL %04x DPLL %04x REQ %04x\n", omap_readw(ULPD_APLL_CTRL),
  517. omap_readw(ULPD_DPLL_CTRL), omap_readw(ULPD_SOFT_REQ));
  518. w = omap_readw(ULPD_APLL_CTRL);
  519. w &= ~APLL_NDPLL_SWITCH;
  520. omap_writew(w, ULPD_APLL_CTRL);
  521. w = omap_readw(ULPD_DPLL_CTRL);
  522. w |= DPLL_IOB | DPLL_PLL_ENABLE;
  523. omap_writew(w, ULPD_DPLL_CTRL);
  524. w = omap_readw(ULPD_SOFT_REQ);
  525. w |= SOFT_UDC_REQ | SOFT_DPLL_REQ;
  526. omap_writew(w, ULPD_SOFT_REQ);
  527. while (!(omap_readw(ULPD_DPLL_CTRL) & DPLL_LOCK))
  528. cpu_relax();
  529. #ifdef CONFIG_USB_GADGET_OMAP
  530. if (config->register_dev) {
  531. int status;
  532. udc_device.dev.platform_data = config;
  533. status = platform_device_register(&udc_device);
  534. if (status)
  535. pr_debug("can't register UDC device, %d\n", status);
  536. /* udc driver gates 48MHz by D+ pullup */
  537. }
  538. #endif
  539. #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
  540. if (config->register_host) {
  541. int status;
  542. ohci_device.dev.platform_data = config;
  543. status = platform_device_register(&ohci_device);
  544. if (status)
  545. pr_debug("can't register OHCI device, %d\n", status);
  546. /* hcd explicitly gates 48MHz */
  547. }
  548. #endif
  549. }
  550. #else
  551. static inline void omap_1510_usb_init(struct omap_usb_config *config) {}
  552. #endif
  553. /*-------------------------------------------------------------------------*/
  554. void __init omap_usb_init(struct omap_usb_config *pdata)
  555. {
  556. pdata->usb0_init = omap_usb0_init;
  557. pdata->usb1_init = omap_usb1_init;
  558. pdata->usb2_init = omap_usb2_init;
  559. udc_device_init(pdata);
  560. ohci_device_init(pdata);
  561. otg_device_init(pdata);
  562. if (cpu_is_omap7xx() || cpu_is_omap16xx())
  563. omap_otg_init(pdata);
  564. else if (cpu_is_omap15xx())
  565. omap_1510_usb_init(pdata);
  566. else
  567. printk(KERN_ERR "USB: No init for your chip yet\n");
  568. }