ebony.dts 7.0 KB

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  1. /*
  2. * Device Tree Source for IBM Ebony
  3. *
  4. * Copyright (c) 2006, 2007 IBM Corp.
  5. * Josh Boyer <jwboyer@linux.vnet.ibm.com>, David Gibson <dwg@au1.ibm.com>
  6. *
  7. * FIXME: Draft only!
  8. *
  9. * This file is licensed under the terms of the GNU General Public
  10. * License version 2. This program is licensed "as is" without
  11. * any warranty of any kind, whether express or implied.
  12. *
  13. * To build:
  14. * dtc -I dts -O asm -o ebony.S -b 0 ebony.dts
  15. * dtc -I dts -O dtb -o ebony.dtb -b 0 ebony.dts
  16. */
  17. / {
  18. #address-cells = <2>;
  19. #size-cells = <1>;
  20. model = "ibm,ebony";
  21. compatible = "ibm,ebony";
  22. dcr-parent = <&/cpus/PowerPC,440GP@0>;
  23. cpus {
  24. #address-cells = <1>;
  25. #size-cells = <0>;
  26. PowerPC,440GP@0 {
  27. device_type = "cpu";
  28. reg = <0>;
  29. clock-frequency = <0>; // Filled in by zImage
  30. timebase-frequency = <0>; // Filled in by zImage
  31. i-cache-line-size = <32>;
  32. d-cache-line-size = <32>;
  33. i-cache-size = <0>;
  34. d-cache-size = <0>;
  35. dcr-controller;
  36. dcr-access-method = "native";
  37. };
  38. };
  39. memory {
  40. device_type = "memory";
  41. reg = <0 0 0>; // Filled in by zImage
  42. };
  43. UIC0: interrupt-controller0 {
  44. device_type = "ibm,uic";
  45. compatible = "ibm,uic-440gp", "ibm,uic";
  46. interrupt-controller;
  47. cell-index = <0>;
  48. dcr-reg = <0c0 009>;
  49. #address-cells = <0>;
  50. #size-cells = <0>;
  51. #interrupt-cells = <2>;
  52. };
  53. UIC1: interrupt-controller1 {
  54. device_type = "ibm,uic";
  55. compatible = "ibm,uic-440gp", "ibm,uic";
  56. interrupt-controller;
  57. cell-index = <1>;
  58. dcr-reg = <0d0 009>;
  59. #address-cells = <0>;
  60. #size-cells = <0>;
  61. #interrupt-cells = <2>;
  62. interrupts = <1e 4 1f 4>; /* cascade */
  63. interrupt-parent = <&UIC0>;
  64. };
  65. CPC0: cpc {
  66. device_type = "ibm,cpc";
  67. compatible = "ibm,cpc-440gp";
  68. dcr-reg = <0b0 003 0e0 010>;
  69. // FIXME: anything else?
  70. };
  71. plb {
  72. device_type = "ibm,plb";
  73. compatible = "ibm,plb-440gp", "ibm,plb4";
  74. #address-cells = <2>;
  75. #size-cells = <1>;
  76. ranges;
  77. clock-frequency = <0>; // Filled in by zImage
  78. SDRAM0: sdram {
  79. device_type = "memory-controller";
  80. compatible = "ibm,sdram-440gp", "ibm,sdram";
  81. dcr-reg = <010 2>;
  82. // FIXME: anything else?
  83. };
  84. DMA0: dma {
  85. // FIXME: ???
  86. device_type = "ibm,dma-4xx";
  87. compatible = "ibm,dma-440gp", "ibm,dma-4xx";
  88. dcr-reg = <100 027>;
  89. };
  90. MAL0: mcmal {
  91. device_type = "mcmal-dma";
  92. compatible = "ibm,mcmal-440gp", "ibm,mcmal";
  93. dcr-reg = <180 62>;
  94. num-tx-chans = <4>;
  95. num-rx-chans = <4>;
  96. interrupt-parent = <&MAL0>;
  97. interrupts = <0 1 2 3 4>;
  98. #interrupt-cells = <1>;
  99. #address-cells = <0>;
  100. #size-cells = <0>;
  101. interrupt-map = </*TXEOB*/ 0 &UIC0 a 4
  102. /*RXEOB*/ 1 &UIC0 b 4
  103. /*SERR*/ 2 &UIC1 0 4
  104. /*TXDE*/ 3 &UIC1 1 4
  105. /*RXDE*/ 4 &UIC1 2 4>;
  106. interrupt-map-mask = <ffffffff>;
  107. };
  108. POB0: opb {
  109. device_type = "ibm,opb";
  110. compatible = "ibm,opb-440gp", "ibm,opb";
  111. #address-cells = <1>;
  112. #size-cells = <1>;
  113. /* Wish there was a nicer way of specifying a full 32-bit
  114. range */
  115. ranges = <00000000 1 00000000 80000000
  116. 80000000 1 80000000 80000000>;
  117. dcr-reg = <090 00b>;
  118. interrupt-parent = <&UIC1>;
  119. interrupts = <7 4>;
  120. clock-frequency = <0>; // Filled in by zImage
  121. EBC0: ebc {
  122. device_type = "ibm,ebc";
  123. compatible = "ibm,ebc-440gp";
  124. dcr-reg = <012 2>;
  125. #address-cells = <2>;
  126. #size-cells = <1>;
  127. clock-frequency = <0>; // Filled in by zImage
  128. ranges = <0 00000000 fff00000 100000
  129. 1 00000000 48000000 100000
  130. 2 00000000 ff800000 400000
  131. 3 00000000 48200000 100000
  132. 7 00000000 48300000 100000>;
  133. interrupts = <5 4>;
  134. interrupt-parent = <&UIC1>;
  135. small-flash@0,0 {
  136. device_type = "rom";
  137. compatible = "direct-mapped";
  138. probe-type = "JEDEC";
  139. bank-width = <1>;
  140. partitions = <0 80000>;
  141. partition-names = "OpenBIOS";
  142. reg = <0 80000 80000>;
  143. };
  144. ds1743@1,0 {
  145. /* NVRAM & RTC */
  146. device_type = "nvram";
  147. compatible = "ds1743";
  148. reg = <1 0 2000>;
  149. };
  150. large-flash@2,0 {
  151. device_type = "rom";
  152. compatible = "direct-mapped";
  153. probe-type = "JEDEC";
  154. bank-width = <1>;
  155. partitions = <0 380000
  156. 280000 80000>;
  157. partition-names = "fs", "firmware";
  158. reg = <2 0 400000>;
  159. };
  160. ir@3,0 {
  161. reg = <3 0 10>;
  162. };
  163. fpga@7,0 {
  164. compatible = "Ebony-FPGA";
  165. reg = <7 0 10>;
  166. };
  167. };
  168. UART0: serial@40000200 {
  169. device_type = "serial";
  170. compatible = "ns16550";
  171. reg = <40000200 8>;
  172. virtual-reg = <e0000200>;
  173. clock-frequency = <A8C000>;
  174. current-speed = <2580>;
  175. interrupt-parent = <&UIC0>;
  176. interrupts = <0 4>;
  177. };
  178. UART1: serial@40000300 {
  179. device_type = "serial";
  180. compatible = "ns16550";
  181. reg = <40000300 8>;
  182. virtual-reg = <e0000300>;
  183. clock-frequency = <A8C000>;
  184. current-speed = <2580>;
  185. interrupt-parent = <&UIC0>;
  186. interrupts = <1 4>;
  187. };
  188. IIC0: i2c@40000400 {
  189. /* FIXME */
  190. device_type = "i2c";
  191. compatible = "ibm,iic-440gp", "ibm,iic";
  192. reg = <40000400 14>;
  193. interrupt-parent = <&UIC0>;
  194. interrupts = <2 4>;
  195. };
  196. IIC1: i2c@40000500 {
  197. /* FIXME */
  198. device_type = "i2c";
  199. compatible = "ibm,iic-440gp", "ibm,iic";
  200. reg = <40000500 14>;
  201. interrupt-parent = <&UIC0>;
  202. interrupts = <3 4>;
  203. };
  204. GPIO0: gpio@40000700 {
  205. /* FIXME */
  206. device_type = "gpio";
  207. compatible = "ibm,gpio-440gp";
  208. reg = <40000700 20>;
  209. };
  210. ZMII0: emac-zmii@40000780 {
  211. device_type = "emac-zmii";
  212. compatible = "ibm,zmii-440gp", "ibm,zmii";
  213. reg = <40000780 c>;
  214. };
  215. EMAC0: ethernet@40000800 {
  216. linux,network-index = <0>;
  217. device_type = "network";
  218. compatible = "ibm,emac-440gp", "ibm,emac";
  219. interrupt-parent = <&UIC1>;
  220. interrupts = <1c 4 1d 4>;
  221. reg = <40000800 70>;
  222. local-mac-address = [000000000000]; // Filled in by zImage
  223. mal-device = <&MAL0>;
  224. mal-tx-channel = <0 1>;
  225. mal-rx-channel = <0>;
  226. cell-index = <0>;
  227. max-frame-size = <5dc>;
  228. rx-fifo-size = <1000>;
  229. tx-fifo-size = <800>;
  230. phy-mode = "rmii";
  231. phy-map = <00000001>;
  232. zmii-device = <&ZMII0>;
  233. zmii-channel = <0>;
  234. };
  235. EMAC1: ethernet@40000900 {
  236. linux,network-index = <1>;
  237. device_type = "network";
  238. compatible = "ibm,emac-440gp", "ibm,emac";
  239. interrupt-parent = <&UIC1>;
  240. interrupts = <1e 4 1f 4>;
  241. reg = <40000900 70>;
  242. local-mac-address = [000000000000]; // Filled in by zImage
  243. mal-device = <&MAL0>;
  244. mal-tx-channel = <2 3>;
  245. mal-rx-channel = <1>;
  246. cell-index = <1>;
  247. max-frame-size = <5dc>;
  248. rx-fifo-size = <1000>;
  249. tx-fifo-size = <800>;
  250. phy-mode = "rmii";
  251. phy-map = <00000001>;
  252. zmii-device = <&ZMII0>;
  253. zmii-channel = <1>;
  254. };
  255. GPT0: gpt@40000a00 {
  256. /* FIXME */
  257. reg = <40000a00 d4>;
  258. interrupt-parent = <&UIC0>;
  259. interrupts = <12 4 13 4 14 4 15 4 16 4>;
  260. };
  261. };
  262. PCIX0: pci@1234 {
  263. device_type = "pci";
  264. /* FIXME */
  265. reg = <2 0ec00000 8
  266. 2 0ec80000 f0
  267. 2 0ec80100 fc>;
  268. };
  269. };
  270. chosen {
  271. linux,stdout-path = "/plb/opb/serial@40000200";
  272. // linux,initrd-start = <0>; /* FIXME */
  273. // linux,initrd-end = <0>;
  274. // bootargs = "";
  275. };
  276. };