wl1251_tx.h 5.8 KB

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  1. /*
  2. * This file is part of wl1251
  3. *
  4. * Copyright (c) 1998-2007 Texas Instruments Incorporated
  5. * Copyright (C) 2008 Nokia Corporation
  6. *
  7. * Contact: Kalle Valo <kalle.valo@nokia.com>
  8. *
  9. * This program is free software; you can redistribute it and/or
  10. * modify it under the terms of the GNU General Public License
  11. * version 2 as published by the Free Software Foundation.
  12. *
  13. * This program is distributed in the hope that it will be useful, but
  14. * WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  16. * General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
  21. * 02110-1301 USA
  22. *
  23. */
  24. #ifndef __WL1251_TX_H__
  25. #define __WL1251_TX_H__
  26. #include <linux/bitops.h>
  27. /*
  28. *
  29. * TX PATH
  30. *
  31. * The Tx path uses a double buffer and a tx_control structure, each located
  32. * at a fixed address in the device's memory. On startup, the host retrieves
  33. * the pointers to these addresses. A double buffer allows for continuous data
  34. * flow towards the device. The host keeps track of which buffer is available
  35. * and alternates between these two buffers on a per packet basis.
  36. *
  37. * The size of each of the two buffers is large enough to hold the longest
  38. * 802.3 packet - maximum size Ethernet packet + header + descriptor.
  39. * TX complete indication will be received a-synchronously in a TX done cyclic
  40. * buffer which is composed of 16 tx_result descriptors structures and is used
  41. * in a cyclic manner.
  42. *
  43. * The TX (HOST) procedure is as follows:
  44. * 1. Read the Tx path status, that will give the data_out_count.
  45. * 2. goto 1, if not possible.
  46. * i.e. if data_in_count - data_out_count >= HwBuffer size (2 for double
  47. * buffer).
  48. * 3. Copy the packet (preceded by double_buffer_desc), if possible.
  49. * i.e. if data_in_count - data_out_count < HwBuffer size (2 for double
  50. * buffer).
  51. * 4. increment data_in_count.
  52. * 5. Inform the firmware by generating a firmware internal interrupt.
  53. * 6. FW will increment data_out_count after it reads the buffer.
  54. *
  55. * The TX Complete procedure:
  56. * 1. To get a TX complete indication the host enables the tx_complete flag in
  57. * the TX descriptor Structure.
  58. * 2. For each packet with a Tx Complete field set, the firmware adds the
  59. * transmit results to the cyclic buffer (txDoneRing) and sets both done_1
  60. * and done_2 to 1 to indicate driver ownership.
  61. * 3. The firmware sends a Tx Complete interrupt to the host to trigger the
  62. * host to process the new data. Note: interrupt will be send per packet if
  63. * TX complete indication was requested in tx_control or per crossing
  64. * aggregation threshold.
  65. * 4. After receiving the Tx Complete interrupt, the host reads the
  66. * TxDescriptorDone information in a cyclic manner and clears both done_1
  67. * and done_2 fields.
  68. *
  69. */
  70. #define TX_COMPLETE_REQUIRED_BIT 0x80
  71. #define TX_STATUS_DATA_OUT_COUNT_MASK 0xf
  72. #define WL1251_TX_ALIGN_TO 4
  73. #define WL1251_TX_ALIGN(len) (((len) + WL1251_TX_ALIGN_TO - 1) & \
  74. ~(WL1251_TX_ALIGN_TO - 1))
  75. #define WL1251_TKIP_IV_SPACE 4
  76. struct tx_control {
  77. /* Rate Policy (class) index */
  78. unsigned rate_policy:3;
  79. /* When set, no ack policy is expected */
  80. unsigned ack_policy:1;
  81. /*
  82. * Packet type:
  83. * 0 -> 802.11
  84. * 1 -> 802.3
  85. * 2 -> IP
  86. * 3 -> raw codec
  87. */
  88. unsigned packet_type:2;
  89. /* If set, this is a QoS-Null or QoS-Data frame */
  90. unsigned qos:1;
  91. /*
  92. * If set, the target triggers the tx complete INT
  93. * upon frame sending completion.
  94. */
  95. unsigned tx_complete:1;
  96. /* 2 bytes padding before packet header */
  97. unsigned xfer_pad:1;
  98. unsigned reserved:7;
  99. } __attribute__ ((packed));
  100. struct tx_double_buffer_desc {
  101. /* Length of payload, including headers. */
  102. u16 length;
  103. /*
  104. * A bit mask that specifies the initial rate to be used
  105. * Possible values are:
  106. * 0x0001 - 1Mbits
  107. * 0x0002 - 2Mbits
  108. * 0x0004 - 5.5Mbits
  109. * 0x0008 - 6Mbits
  110. * 0x0010 - 9Mbits
  111. * 0x0020 - 11Mbits
  112. * 0x0040 - 12Mbits
  113. * 0x0080 - 18Mbits
  114. * 0x0100 - 22Mbits
  115. * 0x0200 - 24Mbits
  116. * 0x0400 - 36Mbits
  117. * 0x0800 - 48Mbits
  118. * 0x1000 - 54Mbits
  119. */
  120. u16 rate;
  121. /* Time in us that a packet can spend in the target */
  122. u32 expiry_time;
  123. /* index of the TX queue used for this packet */
  124. u8 xmit_queue;
  125. /* Used to identify a packet */
  126. u8 id;
  127. struct tx_control control;
  128. /*
  129. * The FW should cut the packet into fragments
  130. * of this size.
  131. */
  132. u16 frag_threshold;
  133. /* Numbers of HW queue blocks to be allocated */
  134. u8 num_mem_blocks;
  135. u8 reserved;
  136. } __attribute__ ((packed));
  137. enum {
  138. TX_SUCCESS = 0,
  139. TX_DMA_ERROR = BIT(7),
  140. TX_DISABLED = BIT(6),
  141. TX_RETRY_EXCEEDED = BIT(5),
  142. TX_TIMEOUT = BIT(4),
  143. TX_KEY_NOT_FOUND = BIT(3),
  144. TX_ENCRYPT_FAIL = BIT(2),
  145. TX_UNAVAILABLE_PRIORITY = BIT(1),
  146. };
  147. struct tx_result {
  148. /*
  149. * Ownership synchronization between the host and
  150. * the firmware. If done_1 and done_2 are cleared,
  151. * owned by the FW (no info ready).
  152. */
  153. u8 done_1;
  154. /* same as double_buffer_desc->id */
  155. u8 id;
  156. /*
  157. * Total air access duration consumed by this
  158. * packet, including all retries and overheads.
  159. */
  160. u16 medium_usage;
  161. /* Total media delay (from 1st EDCA AIFS counter until TX Complete). */
  162. u32 medium_delay;
  163. /* Time between host xfer and tx complete */
  164. u32 fw_hnadling_time;
  165. /* The LS-byte of the last TKIP sequence number. */
  166. u8 lsb_seq_num;
  167. /* Retry count */
  168. u8 ack_failures;
  169. /* At which rate we got a ACK */
  170. u16 rate;
  171. u16 reserved;
  172. /* TX_* */
  173. u8 status;
  174. /* See done_1 */
  175. u8 done_2;
  176. } __attribute__ ((packed));
  177. void wl1251_tx_work(struct work_struct *work);
  178. void wl1251_tx_complete(struct wl1251 *wl);
  179. void wl1251_tx_flush(struct wl1251 *wl);
  180. #endif