rt2500usb.c 64 KB

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  1. /*
  2. Copyright (C) 2004 - 2009 rt2x00 SourceForge Project
  3. <http://rt2x00.serialmonkey.com>
  4. This program is free software; you can redistribute it and/or modify
  5. it under the terms of the GNU General Public License as published by
  6. the Free Software Foundation; either version 2 of the License, or
  7. (at your option) any later version.
  8. This program is distributed in the hope that it will be useful,
  9. but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. GNU General Public License for more details.
  12. You should have received a copy of the GNU General Public License
  13. along with this program; if not, write to the
  14. Free Software Foundation, Inc.,
  15. 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  16. */
  17. /*
  18. Module: rt2500usb
  19. Abstract: rt2500usb device specific routines.
  20. Supported chipsets: RT2570.
  21. */
  22. #include <linux/delay.h>
  23. #include <linux/etherdevice.h>
  24. #include <linux/init.h>
  25. #include <linux/kernel.h>
  26. #include <linux/module.h>
  27. #include <linux/usb.h>
  28. #include "rt2x00.h"
  29. #include "rt2x00usb.h"
  30. #include "rt2500usb.h"
  31. /*
  32. * Allow hardware encryption to be disabled.
  33. */
  34. static int modparam_nohwcrypt = 0;
  35. module_param_named(nohwcrypt, modparam_nohwcrypt, bool, S_IRUGO);
  36. MODULE_PARM_DESC(nohwcrypt, "Disable hardware encryption.");
  37. /*
  38. * Register access.
  39. * All access to the CSR registers will go through the methods
  40. * rt2500usb_register_read and rt2500usb_register_write.
  41. * BBP and RF register require indirect register access,
  42. * and use the CSR registers BBPCSR and RFCSR to achieve this.
  43. * These indirect registers work with busy bits,
  44. * and we will try maximal REGISTER_BUSY_COUNT times to access
  45. * the register while taking a REGISTER_BUSY_DELAY us delay
  46. * between each attampt. When the busy bit is still set at that time,
  47. * the access attempt is considered to have failed,
  48. * and we will print an error.
  49. * If the csr_mutex is already held then the _lock variants must
  50. * be used instead.
  51. */
  52. static inline void rt2500usb_register_read(struct rt2x00_dev *rt2x00dev,
  53. const unsigned int offset,
  54. u16 *value)
  55. {
  56. __le16 reg;
  57. rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_READ,
  58. USB_VENDOR_REQUEST_IN, offset,
  59. &reg, sizeof(reg), REGISTER_TIMEOUT);
  60. *value = le16_to_cpu(reg);
  61. }
  62. static inline void rt2500usb_register_read_lock(struct rt2x00_dev *rt2x00dev,
  63. const unsigned int offset,
  64. u16 *value)
  65. {
  66. __le16 reg;
  67. rt2x00usb_vendor_req_buff_lock(rt2x00dev, USB_MULTI_READ,
  68. USB_VENDOR_REQUEST_IN, offset,
  69. &reg, sizeof(reg), REGISTER_TIMEOUT);
  70. *value = le16_to_cpu(reg);
  71. }
  72. static inline void rt2500usb_register_multiread(struct rt2x00_dev *rt2x00dev,
  73. const unsigned int offset,
  74. void *value, const u16 length)
  75. {
  76. rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_READ,
  77. USB_VENDOR_REQUEST_IN, offset,
  78. value, length,
  79. REGISTER_TIMEOUT16(length));
  80. }
  81. static inline void rt2500usb_register_write(struct rt2x00_dev *rt2x00dev,
  82. const unsigned int offset,
  83. u16 value)
  84. {
  85. __le16 reg = cpu_to_le16(value);
  86. rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_WRITE,
  87. USB_VENDOR_REQUEST_OUT, offset,
  88. &reg, sizeof(reg), REGISTER_TIMEOUT);
  89. }
  90. static inline void rt2500usb_register_write_lock(struct rt2x00_dev *rt2x00dev,
  91. const unsigned int offset,
  92. u16 value)
  93. {
  94. __le16 reg = cpu_to_le16(value);
  95. rt2x00usb_vendor_req_buff_lock(rt2x00dev, USB_MULTI_WRITE,
  96. USB_VENDOR_REQUEST_OUT, offset,
  97. &reg, sizeof(reg), REGISTER_TIMEOUT);
  98. }
  99. static inline void rt2500usb_register_multiwrite(struct rt2x00_dev *rt2x00dev,
  100. const unsigned int offset,
  101. void *value, const u16 length)
  102. {
  103. rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_WRITE,
  104. USB_VENDOR_REQUEST_OUT, offset,
  105. value, length,
  106. REGISTER_TIMEOUT16(length));
  107. }
  108. static int rt2500usb_regbusy_read(struct rt2x00_dev *rt2x00dev,
  109. const unsigned int offset,
  110. struct rt2x00_field16 field,
  111. u16 *reg)
  112. {
  113. unsigned int i;
  114. for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
  115. rt2500usb_register_read_lock(rt2x00dev, offset, reg);
  116. if (!rt2x00_get_field16(*reg, field))
  117. return 1;
  118. udelay(REGISTER_BUSY_DELAY);
  119. }
  120. ERROR(rt2x00dev, "Indirect register access failed: "
  121. "offset=0x%.08x, value=0x%.08x\n", offset, *reg);
  122. *reg = ~0;
  123. return 0;
  124. }
  125. #define WAIT_FOR_BBP(__dev, __reg) \
  126. rt2500usb_regbusy_read((__dev), PHY_CSR8, PHY_CSR8_BUSY, (__reg))
  127. #define WAIT_FOR_RF(__dev, __reg) \
  128. rt2500usb_regbusy_read((__dev), PHY_CSR10, PHY_CSR10_RF_BUSY, (__reg))
  129. static void rt2500usb_bbp_write(struct rt2x00_dev *rt2x00dev,
  130. const unsigned int word, const u8 value)
  131. {
  132. u16 reg;
  133. mutex_lock(&rt2x00dev->csr_mutex);
  134. /*
  135. * Wait until the BBP becomes available, afterwards we
  136. * can safely write the new data into the register.
  137. */
  138. if (WAIT_FOR_BBP(rt2x00dev, &reg)) {
  139. reg = 0;
  140. rt2x00_set_field16(&reg, PHY_CSR7_DATA, value);
  141. rt2x00_set_field16(&reg, PHY_CSR7_REG_ID, word);
  142. rt2x00_set_field16(&reg, PHY_CSR7_READ_CONTROL, 0);
  143. rt2500usb_register_write_lock(rt2x00dev, PHY_CSR7, reg);
  144. }
  145. mutex_unlock(&rt2x00dev->csr_mutex);
  146. }
  147. static void rt2500usb_bbp_read(struct rt2x00_dev *rt2x00dev,
  148. const unsigned int word, u8 *value)
  149. {
  150. u16 reg;
  151. mutex_lock(&rt2x00dev->csr_mutex);
  152. /*
  153. * Wait until the BBP becomes available, afterwards we
  154. * can safely write the read request into the register.
  155. * After the data has been written, we wait until hardware
  156. * returns the correct value, if at any time the register
  157. * doesn't become available in time, reg will be 0xffffffff
  158. * which means we return 0xff to the caller.
  159. */
  160. if (WAIT_FOR_BBP(rt2x00dev, &reg)) {
  161. reg = 0;
  162. rt2x00_set_field16(&reg, PHY_CSR7_REG_ID, word);
  163. rt2x00_set_field16(&reg, PHY_CSR7_READ_CONTROL, 1);
  164. rt2500usb_register_write_lock(rt2x00dev, PHY_CSR7, reg);
  165. if (WAIT_FOR_BBP(rt2x00dev, &reg))
  166. rt2500usb_register_read_lock(rt2x00dev, PHY_CSR7, &reg);
  167. }
  168. *value = rt2x00_get_field16(reg, PHY_CSR7_DATA);
  169. mutex_unlock(&rt2x00dev->csr_mutex);
  170. }
  171. static void rt2500usb_rf_write(struct rt2x00_dev *rt2x00dev,
  172. const unsigned int word, const u32 value)
  173. {
  174. u16 reg;
  175. mutex_lock(&rt2x00dev->csr_mutex);
  176. /*
  177. * Wait until the RF becomes available, afterwards we
  178. * can safely write the new data into the register.
  179. */
  180. if (WAIT_FOR_RF(rt2x00dev, &reg)) {
  181. reg = 0;
  182. rt2x00_set_field16(&reg, PHY_CSR9_RF_VALUE, value);
  183. rt2500usb_register_write_lock(rt2x00dev, PHY_CSR9, reg);
  184. reg = 0;
  185. rt2x00_set_field16(&reg, PHY_CSR10_RF_VALUE, value >> 16);
  186. rt2x00_set_field16(&reg, PHY_CSR10_RF_NUMBER_OF_BITS, 20);
  187. rt2x00_set_field16(&reg, PHY_CSR10_RF_IF_SELECT, 0);
  188. rt2x00_set_field16(&reg, PHY_CSR10_RF_BUSY, 1);
  189. rt2500usb_register_write_lock(rt2x00dev, PHY_CSR10, reg);
  190. rt2x00_rf_write(rt2x00dev, word, value);
  191. }
  192. mutex_unlock(&rt2x00dev->csr_mutex);
  193. }
  194. #ifdef CONFIG_RT2X00_LIB_DEBUGFS
  195. static void _rt2500usb_register_read(struct rt2x00_dev *rt2x00dev,
  196. const unsigned int offset,
  197. u32 *value)
  198. {
  199. rt2500usb_register_read(rt2x00dev, offset, (u16 *)value);
  200. }
  201. static void _rt2500usb_register_write(struct rt2x00_dev *rt2x00dev,
  202. const unsigned int offset,
  203. u32 value)
  204. {
  205. rt2500usb_register_write(rt2x00dev, offset, value);
  206. }
  207. static const struct rt2x00debug rt2500usb_rt2x00debug = {
  208. .owner = THIS_MODULE,
  209. .csr = {
  210. .read = _rt2500usb_register_read,
  211. .write = _rt2500usb_register_write,
  212. .flags = RT2X00DEBUGFS_OFFSET,
  213. .word_base = CSR_REG_BASE,
  214. .word_size = sizeof(u16),
  215. .word_count = CSR_REG_SIZE / sizeof(u16),
  216. },
  217. .eeprom = {
  218. .read = rt2x00_eeprom_read,
  219. .write = rt2x00_eeprom_write,
  220. .word_base = EEPROM_BASE,
  221. .word_size = sizeof(u16),
  222. .word_count = EEPROM_SIZE / sizeof(u16),
  223. },
  224. .bbp = {
  225. .read = rt2500usb_bbp_read,
  226. .write = rt2500usb_bbp_write,
  227. .word_base = BBP_BASE,
  228. .word_size = sizeof(u8),
  229. .word_count = BBP_SIZE / sizeof(u8),
  230. },
  231. .rf = {
  232. .read = rt2x00_rf_read,
  233. .write = rt2500usb_rf_write,
  234. .word_base = RF_BASE,
  235. .word_size = sizeof(u32),
  236. .word_count = RF_SIZE / sizeof(u32),
  237. },
  238. };
  239. #endif /* CONFIG_RT2X00_LIB_DEBUGFS */
  240. static int rt2500usb_rfkill_poll(struct rt2x00_dev *rt2x00dev)
  241. {
  242. u16 reg;
  243. rt2500usb_register_read(rt2x00dev, MAC_CSR19, &reg);
  244. return rt2x00_get_field32(reg, MAC_CSR19_BIT7);
  245. }
  246. #ifdef CONFIG_RT2X00_LIB_LEDS
  247. static void rt2500usb_brightness_set(struct led_classdev *led_cdev,
  248. enum led_brightness brightness)
  249. {
  250. struct rt2x00_led *led =
  251. container_of(led_cdev, struct rt2x00_led, led_dev);
  252. unsigned int enabled = brightness != LED_OFF;
  253. u16 reg;
  254. rt2500usb_register_read(led->rt2x00dev, MAC_CSR20, &reg);
  255. if (led->type == LED_TYPE_RADIO || led->type == LED_TYPE_ASSOC)
  256. rt2x00_set_field16(&reg, MAC_CSR20_LINK, enabled);
  257. else if (led->type == LED_TYPE_ACTIVITY)
  258. rt2x00_set_field16(&reg, MAC_CSR20_ACTIVITY, enabled);
  259. rt2500usb_register_write(led->rt2x00dev, MAC_CSR20, reg);
  260. }
  261. static int rt2500usb_blink_set(struct led_classdev *led_cdev,
  262. unsigned long *delay_on,
  263. unsigned long *delay_off)
  264. {
  265. struct rt2x00_led *led =
  266. container_of(led_cdev, struct rt2x00_led, led_dev);
  267. u16 reg;
  268. rt2500usb_register_read(led->rt2x00dev, MAC_CSR21, &reg);
  269. rt2x00_set_field16(&reg, MAC_CSR21_ON_PERIOD, *delay_on);
  270. rt2x00_set_field16(&reg, MAC_CSR21_OFF_PERIOD, *delay_off);
  271. rt2500usb_register_write(led->rt2x00dev, MAC_CSR21, reg);
  272. return 0;
  273. }
  274. static void rt2500usb_init_led(struct rt2x00_dev *rt2x00dev,
  275. struct rt2x00_led *led,
  276. enum led_type type)
  277. {
  278. led->rt2x00dev = rt2x00dev;
  279. led->type = type;
  280. led->led_dev.brightness_set = rt2500usb_brightness_set;
  281. led->led_dev.blink_set = rt2500usb_blink_set;
  282. led->flags = LED_INITIALIZED;
  283. }
  284. #endif /* CONFIG_RT2X00_LIB_LEDS */
  285. /*
  286. * Configuration handlers.
  287. */
  288. /*
  289. * rt2500usb does not differentiate between shared and pairwise
  290. * keys, so we should use the same function for both key types.
  291. */
  292. static int rt2500usb_config_key(struct rt2x00_dev *rt2x00dev,
  293. struct rt2x00lib_crypto *crypto,
  294. struct ieee80211_key_conf *key)
  295. {
  296. int timeout;
  297. u32 mask;
  298. u16 reg;
  299. if (crypto->cmd == SET_KEY) {
  300. /*
  301. * Pairwise key will always be entry 0, but this
  302. * could collide with a shared key on the same
  303. * position...
  304. */
  305. mask = TXRX_CSR0_KEY_ID.bit_mask;
  306. rt2500usb_register_read(rt2x00dev, TXRX_CSR0, &reg);
  307. reg &= mask;
  308. if (reg && reg == mask)
  309. return -ENOSPC;
  310. reg = rt2x00_get_field16(reg, TXRX_CSR0_KEY_ID);
  311. key->hw_key_idx += reg ? ffz(reg) : 0;
  312. /*
  313. * The encryption key doesn't fit within the CSR cache,
  314. * this means we should allocate it seperately and use
  315. * rt2x00usb_vendor_request() to send the key to the hardware.
  316. */
  317. reg = KEY_ENTRY(key->hw_key_idx);
  318. timeout = REGISTER_TIMEOUT32(sizeof(crypto->key));
  319. rt2x00usb_vendor_request_large_buff(rt2x00dev, USB_MULTI_WRITE,
  320. USB_VENDOR_REQUEST_OUT, reg,
  321. crypto->key,
  322. sizeof(crypto->key),
  323. timeout);
  324. /*
  325. * The driver does not support the IV/EIV generation
  326. * in hardware. However it demands the data to be provided
  327. * both seperately as well as inside the frame.
  328. * We already provided the CONFIG_CRYPTO_COPY_IV to rt2x00lib
  329. * to ensure rt2x00lib will not strip the data from the
  330. * frame after the copy, now we must tell mac80211
  331. * to generate the IV/EIV data.
  332. */
  333. key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
  334. key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
  335. }
  336. /*
  337. * TXRX_CSR0_KEY_ID contains only single-bit fields to indicate
  338. * a particular key is valid.
  339. */
  340. rt2500usb_register_read(rt2x00dev, TXRX_CSR0, &reg);
  341. rt2x00_set_field16(&reg, TXRX_CSR0_ALGORITHM, crypto->cipher);
  342. rt2x00_set_field16(&reg, TXRX_CSR0_IV_OFFSET, IEEE80211_HEADER);
  343. mask = rt2x00_get_field16(reg, TXRX_CSR0_KEY_ID);
  344. if (crypto->cmd == SET_KEY)
  345. mask |= 1 << key->hw_key_idx;
  346. else if (crypto->cmd == DISABLE_KEY)
  347. mask &= ~(1 << key->hw_key_idx);
  348. rt2x00_set_field16(&reg, TXRX_CSR0_KEY_ID, mask);
  349. rt2500usb_register_write(rt2x00dev, TXRX_CSR0, reg);
  350. return 0;
  351. }
  352. static void rt2500usb_config_filter(struct rt2x00_dev *rt2x00dev,
  353. const unsigned int filter_flags)
  354. {
  355. u16 reg;
  356. /*
  357. * Start configuration steps.
  358. * Note that the version error will always be dropped
  359. * and broadcast frames will always be accepted since
  360. * there is no filter for it at this time.
  361. */
  362. rt2500usb_register_read(rt2x00dev, TXRX_CSR2, &reg);
  363. rt2x00_set_field16(&reg, TXRX_CSR2_DROP_CRC,
  364. !(filter_flags & FIF_FCSFAIL));
  365. rt2x00_set_field16(&reg, TXRX_CSR2_DROP_PHYSICAL,
  366. !(filter_flags & FIF_PLCPFAIL));
  367. rt2x00_set_field16(&reg, TXRX_CSR2_DROP_CONTROL,
  368. !(filter_flags & FIF_CONTROL));
  369. rt2x00_set_field16(&reg, TXRX_CSR2_DROP_NOT_TO_ME,
  370. !(filter_flags & FIF_PROMISC_IN_BSS));
  371. rt2x00_set_field16(&reg, TXRX_CSR2_DROP_TODS,
  372. !(filter_flags & FIF_PROMISC_IN_BSS) &&
  373. !rt2x00dev->intf_ap_count);
  374. rt2x00_set_field16(&reg, TXRX_CSR2_DROP_VERSION_ERROR, 1);
  375. rt2x00_set_field16(&reg, TXRX_CSR2_DROP_MULTICAST,
  376. !(filter_flags & FIF_ALLMULTI));
  377. rt2x00_set_field16(&reg, TXRX_CSR2_DROP_BROADCAST, 0);
  378. rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg);
  379. }
  380. static void rt2500usb_config_intf(struct rt2x00_dev *rt2x00dev,
  381. struct rt2x00_intf *intf,
  382. struct rt2x00intf_conf *conf,
  383. const unsigned int flags)
  384. {
  385. unsigned int bcn_preload;
  386. u16 reg;
  387. if (flags & CONFIG_UPDATE_TYPE) {
  388. /*
  389. * Enable beacon config
  390. */
  391. bcn_preload = PREAMBLE + GET_DURATION(IEEE80211_HEADER, 20);
  392. rt2500usb_register_read(rt2x00dev, TXRX_CSR20, &reg);
  393. rt2x00_set_field16(&reg, TXRX_CSR20_OFFSET, bcn_preload >> 6);
  394. rt2x00_set_field16(&reg, TXRX_CSR20_BCN_EXPECT_WINDOW,
  395. 2 * (conf->type != NL80211_IFTYPE_STATION));
  396. rt2500usb_register_write(rt2x00dev, TXRX_CSR20, reg);
  397. /*
  398. * Enable synchronisation.
  399. */
  400. rt2500usb_register_read(rt2x00dev, TXRX_CSR18, &reg);
  401. rt2x00_set_field16(&reg, TXRX_CSR18_OFFSET, 0);
  402. rt2500usb_register_write(rt2x00dev, TXRX_CSR18, reg);
  403. rt2500usb_register_read(rt2x00dev, TXRX_CSR19, &reg);
  404. rt2x00_set_field16(&reg, TXRX_CSR19_TSF_COUNT, 1);
  405. rt2x00_set_field16(&reg, TXRX_CSR19_TSF_SYNC, conf->sync);
  406. rt2x00_set_field16(&reg, TXRX_CSR19_TBCN, 1);
  407. rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
  408. }
  409. if (flags & CONFIG_UPDATE_MAC)
  410. rt2500usb_register_multiwrite(rt2x00dev, MAC_CSR2, conf->mac,
  411. (3 * sizeof(__le16)));
  412. if (flags & CONFIG_UPDATE_BSSID)
  413. rt2500usb_register_multiwrite(rt2x00dev, MAC_CSR5, conf->bssid,
  414. (3 * sizeof(__le16)));
  415. }
  416. static void rt2500usb_config_erp(struct rt2x00_dev *rt2x00dev,
  417. struct rt2x00lib_erp *erp)
  418. {
  419. u16 reg;
  420. rt2500usb_register_read(rt2x00dev, TXRX_CSR10, &reg);
  421. rt2x00_set_field16(&reg, TXRX_CSR10_AUTORESPOND_PREAMBLE,
  422. !!erp->short_preamble);
  423. rt2500usb_register_write(rt2x00dev, TXRX_CSR10, reg);
  424. rt2500usb_register_write(rt2x00dev, TXRX_CSR11, erp->basic_rates);
  425. rt2500usb_register_read(rt2x00dev, TXRX_CSR18, &reg);
  426. rt2x00_set_field16(&reg, TXRX_CSR18_INTERVAL, erp->beacon_int * 4);
  427. rt2500usb_register_write(rt2x00dev, TXRX_CSR18, reg);
  428. rt2500usb_register_write(rt2x00dev, MAC_CSR10, erp->slot_time);
  429. rt2500usb_register_write(rt2x00dev, MAC_CSR11, erp->sifs);
  430. rt2500usb_register_write(rt2x00dev, MAC_CSR12, erp->eifs);
  431. }
  432. static void rt2500usb_config_ant(struct rt2x00_dev *rt2x00dev,
  433. struct antenna_setup *ant)
  434. {
  435. u8 r2;
  436. u8 r14;
  437. u16 csr5;
  438. u16 csr6;
  439. /*
  440. * We should never come here because rt2x00lib is supposed
  441. * to catch this and send us the correct antenna explicitely.
  442. */
  443. BUG_ON(ant->rx == ANTENNA_SW_DIVERSITY ||
  444. ant->tx == ANTENNA_SW_DIVERSITY);
  445. rt2500usb_bbp_read(rt2x00dev, 2, &r2);
  446. rt2500usb_bbp_read(rt2x00dev, 14, &r14);
  447. rt2500usb_register_read(rt2x00dev, PHY_CSR5, &csr5);
  448. rt2500usb_register_read(rt2x00dev, PHY_CSR6, &csr6);
  449. /*
  450. * Configure the TX antenna.
  451. */
  452. switch (ant->tx) {
  453. case ANTENNA_HW_DIVERSITY:
  454. rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 1);
  455. rt2x00_set_field16(&csr5, PHY_CSR5_CCK, 1);
  456. rt2x00_set_field16(&csr6, PHY_CSR6_OFDM, 1);
  457. break;
  458. case ANTENNA_A:
  459. rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 0);
  460. rt2x00_set_field16(&csr5, PHY_CSR5_CCK, 0);
  461. rt2x00_set_field16(&csr6, PHY_CSR6_OFDM, 0);
  462. break;
  463. case ANTENNA_B:
  464. default:
  465. rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 2);
  466. rt2x00_set_field16(&csr5, PHY_CSR5_CCK, 2);
  467. rt2x00_set_field16(&csr6, PHY_CSR6_OFDM, 2);
  468. break;
  469. }
  470. /*
  471. * Configure the RX antenna.
  472. */
  473. switch (ant->rx) {
  474. case ANTENNA_HW_DIVERSITY:
  475. rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 1);
  476. break;
  477. case ANTENNA_A:
  478. rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 0);
  479. break;
  480. case ANTENNA_B:
  481. default:
  482. rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 2);
  483. break;
  484. }
  485. /*
  486. * RT2525E and RT5222 need to flip TX I/Q
  487. */
  488. if (rt2x00_rf(&rt2x00dev->chip, RF2525E) ||
  489. rt2x00_rf(&rt2x00dev->chip, RF5222)) {
  490. rt2x00_set_field8(&r2, BBP_R2_TX_IQ_FLIP, 1);
  491. rt2x00_set_field16(&csr5, PHY_CSR5_CCK_FLIP, 1);
  492. rt2x00_set_field16(&csr6, PHY_CSR6_OFDM_FLIP, 1);
  493. /*
  494. * RT2525E does not need RX I/Q Flip.
  495. */
  496. if (rt2x00_rf(&rt2x00dev->chip, RF2525E))
  497. rt2x00_set_field8(&r14, BBP_R14_RX_IQ_FLIP, 0);
  498. } else {
  499. rt2x00_set_field16(&csr5, PHY_CSR5_CCK_FLIP, 0);
  500. rt2x00_set_field16(&csr6, PHY_CSR6_OFDM_FLIP, 0);
  501. }
  502. rt2500usb_bbp_write(rt2x00dev, 2, r2);
  503. rt2500usb_bbp_write(rt2x00dev, 14, r14);
  504. rt2500usb_register_write(rt2x00dev, PHY_CSR5, csr5);
  505. rt2500usb_register_write(rt2x00dev, PHY_CSR6, csr6);
  506. }
  507. static void rt2500usb_config_channel(struct rt2x00_dev *rt2x00dev,
  508. struct rf_channel *rf, const int txpower)
  509. {
  510. /*
  511. * Set TXpower.
  512. */
  513. rt2x00_set_field32(&rf->rf3, RF3_TXPOWER, TXPOWER_TO_DEV(txpower));
  514. /*
  515. * For RT2525E we should first set the channel to half band higher.
  516. */
  517. if (rt2x00_rf(&rt2x00dev->chip, RF2525E)) {
  518. static const u32 vals[] = {
  519. 0x000008aa, 0x000008ae, 0x000008ae, 0x000008b2,
  520. 0x000008b2, 0x000008b6, 0x000008b6, 0x000008ba,
  521. 0x000008ba, 0x000008be, 0x000008b7, 0x00000902,
  522. 0x00000902, 0x00000906
  523. };
  524. rt2500usb_rf_write(rt2x00dev, 2, vals[rf->channel - 1]);
  525. if (rf->rf4)
  526. rt2500usb_rf_write(rt2x00dev, 4, rf->rf4);
  527. }
  528. rt2500usb_rf_write(rt2x00dev, 1, rf->rf1);
  529. rt2500usb_rf_write(rt2x00dev, 2, rf->rf2);
  530. rt2500usb_rf_write(rt2x00dev, 3, rf->rf3);
  531. if (rf->rf4)
  532. rt2500usb_rf_write(rt2x00dev, 4, rf->rf4);
  533. }
  534. static void rt2500usb_config_txpower(struct rt2x00_dev *rt2x00dev,
  535. const int txpower)
  536. {
  537. u32 rf3;
  538. rt2x00_rf_read(rt2x00dev, 3, &rf3);
  539. rt2x00_set_field32(&rf3, RF3_TXPOWER, TXPOWER_TO_DEV(txpower));
  540. rt2500usb_rf_write(rt2x00dev, 3, rf3);
  541. }
  542. static void rt2500usb_config_ps(struct rt2x00_dev *rt2x00dev,
  543. struct rt2x00lib_conf *libconf)
  544. {
  545. enum dev_state state =
  546. (libconf->conf->flags & IEEE80211_CONF_PS) ?
  547. STATE_SLEEP : STATE_AWAKE;
  548. u16 reg;
  549. if (state == STATE_SLEEP) {
  550. rt2500usb_register_read(rt2x00dev, MAC_CSR18, &reg);
  551. rt2x00_set_field16(&reg, MAC_CSR18_DELAY_AFTER_BEACON,
  552. rt2x00dev->beacon_int - 20);
  553. rt2x00_set_field16(&reg, MAC_CSR18_BEACONS_BEFORE_WAKEUP,
  554. libconf->conf->listen_interval - 1);
  555. /* We must first disable autowake before it can be enabled */
  556. rt2x00_set_field16(&reg, MAC_CSR18_AUTO_WAKE, 0);
  557. rt2500usb_register_write(rt2x00dev, MAC_CSR18, reg);
  558. rt2x00_set_field16(&reg, MAC_CSR18_AUTO_WAKE, 1);
  559. rt2500usb_register_write(rt2x00dev, MAC_CSR18, reg);
  560. }
  561. rt2x00dev->ops->lib->set_device_state(rt2x00dev, state);
  562. }
  563. static void rt2500usb_config(struct rt2x00_dev *rt2x00dev,
  564. struct rt2x00lib_conf *libconf,
  565. const unsigned int flags)
  566. {
  567. if (flags & IEEE80211_CONF_CHANGE_CHANNEL)
  568. rt2500usb_config_channel(rt2x00dev, &libconf->rf,
  569. libconf->conf->power_level);
  570. if ((flags & IEEE80211_CONF_CHANGE_POWER) &&
  571. !(flags & IEEE80211_CONF_CHANGE_CHANNEL))
  572. rt2500usb_config_txpower(rt2x00dev,
  573. libconf->conf->power_level);
  574. if (flags & IEEE80211_CONF_CHANGE_PS)
  575. rt2500usb_config_ps(rt2x00dev, libconf);
  576. }
  577. /*
  578. * Link tuning
  579. */
  580. static void rt2500usb_link_stats(struct rt2x00_dev *rt2x00dev,
  581. struct link_qual *qual)
  582. {
  583. u16 reg;
  584. /*
  585. * Update FCS error count from register.
  586. */
  587. rt2500usb_register_read(rt2x00dev, STA_CSR0, &reg);
  588. qual->rx_failed = rt2x00_get_field16(reg, STA_CSR0_FCS_ERROR);
  589. /*
  590. * Update False CCA count from register.
  591. */
  592. rt2500usb_register_read(rt2x00dev, STA_CSR3, &reg);
  593. qual->false_cca = rt2x00_get_field16(reg, STA_CSR3_FALSE_CCA_ERROR);
  594. }
  595. static void rt2500usb_reset_tuner(struct rt2x00_dev *rt2x00dev,
  596. struct link_qual *qual)
  597. {
  598. u16 eeprom;
  599. u16 value;
  600. rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R24, &eeprom);
  601. value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_R24_LOW);
  602. rt2500usb_bbp_write(rt2x00dev, 24, value);
  603. rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R25, &eeprom);
  604. value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_R25_LOW);
  605. rt2500usb_bbp_write(rt2x00dev, 25, value);
  606. rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R61, &eeprom);
  607. value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_R61_LOW);
  608. rt2500usb_bbp_write(rt2x00dev, 61, value);
  609. rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_VGC, &eeprom);
  610. value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_VGCUPPER);
  611. rt2500usb_bbp_write(rt2x00dev, 17, value);
  612. qual->vgc_level = value;
  613. }
  614. /*
  615. * NOTE: This function is directly ported from legacy driver, but
  616. * despite it being declared it was never called. Although link tuning
  617. * sounds like a good idea, and usually works well for the other drivers,
  618. * it does _not_ work with rt2500usb. Enabling this function will result
  619. * in TX capabilities only until association kicks in. Immediately
  620. * after the successful association all TX frames will be kept in the
  621. * hardware queue and never transmitted.
  622. */
  623. #if 0
  624. static void rt2500usb_link_tuner(struct rt2x00_dev *rt2x00dev)
  625. {
  626. int rssi = rt2x00_get_link_rssi(&rt2x00dev->link);
  627. u16 bbp_thresh;
  628. u16 vgc_bound;
  629. u16 sens;
  630. u16 r24;
  631. u16 r25;
  632. u16 r61;
  633. u16 r17_sens;
  634. u8 r17;
  635. u8 up_bound;
  636. u8 low_bound;
  637. /*
  638. * Read current r17 value, as well as the sensitivity values
  639. * for the r17 register.
  640. */
  641. rt2500usb_bbp_read(rt2x00dev, 17, &r17);
  642. rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R17, &r17_sens);
  643. rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_VGC, &vgc_bound);
  644. up_bound = rt2x00_get_field16(vgc_bound, EEPROM_BBPTUNE_VGCUPPER);
  645. low_bound = rt2x00_get_field16(vgc_bound, EEPROM_BBPTUNE_VGCLOWER);
  646. /*
  647. * If we are not associated, we should go straight to the
  648. * dynamic CCA tuning.
  649. */
  650. if (!rt2x00dev->intf_associated)
  651. goto dynamic_cca_tune;
  652. /*
  653. * Determine the BBP tuning threshold and correctly
  654. * set BBP 24, 25 and 61.
  655. */
  656. rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE, &bbp_thresh);
  657. bbp_thresh = rt2x00_get_field16(bbp_thresh, EEPROM_BBPTUNE_THRESHOLD);
  658. rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R24, &r24);
  659. rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R25, &r25);
  660. rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R61, &r61);
  661. if ((rssi + bbp_thresh) > 0) {
  662. r24 = rt2x00_get_field16(r24, EEPROM_BBPTUNE_R24_HIGH);
  663. r25 = rt2x00_get_field16(r25, EEPROM_BBPTUNE_R25_HIGH);
  664. r61 = rt2x00_get_field16(r61, EEPROM_BBPTUNE_R61_HIGH);
  665. } else {
  666. r24 = rt2x00_get_field16(r24, EEPROM_BBPTUNE_R24_LOW);
  667. r25 = rt2x00_get_field16(r25, EEPROM_BBPTUNE_R25_LOW);
  668. r61 = rt2x00_get_field16(r61, EEPROM_BBPTUNE_R61_LOW);
  669. }
  670. rt2500usb_bbp_write(rt2x00dev, 24, r24);
  671. rt2500usb_bbp_write(rt2x00dev, 25, r25);
  672. rt2500usb_bbp_write(rt2x00dev, 61, r61);
  673. /*
  674. * A too low RSSI will cause too much false CCA which will
  675. * then corrupt the R17 tuning. To remidy this the tuning should
  676. * be stopped (While making sure the R17 value will not exceed limits)
  677. */
  678. if (rssi >= -40) {
  679. if (r17 != 0x60)
  680. rt2500usb_bbp_write(rt2x00dev, 17, 0x60);
  681. return;
  682. }
  683. /*
  684. * Special big-R17 for short distance
  685. */
  686. if (rssi >= -58) {
  687. sens = rt2x00_get_field16(r17_sens, EEPROM_BBPTUNE_R17_LOW);
  688. if (r17 != sens)
  689. rt2500usb_bbp_write(rt2x00dev, 17, sens);
  690. return;
  691. }
  692. /*
  693. * Special mid-R17 for middle distance
  694. */
  695. if (rssi >= -74) {
  696. sens = rt2x00_get_field16(r17_sens, EEPROM_BBPTUNE_R17_HIGH);
  697. if (r17 != sens)
  698. rt2500usb_bbp_write(rt2x00dev, 17, sens);
  699. return;
  700. }
  701. /*
  702. * Leave short or middle distance condition, restore r17
  703. * to the dynamic tuning range.
  704. */
  705. low_bound = 0x32;
  706. if (rssi < -77)
  707. up_bound -= (-77 - rssi);
  708. if (up_bound < low_bound)
  709. up_bound = low_bound;
  710. if (r17 > up_bound) {
  711. rt2500usb_bbp_write(rt2x00dev, 17, up_bound);
  712. rt2x00dev->link.vgc_level = up_bound;
  713. return;
  714. }
  715. dynamic_cca_tune:
  716. /*
  717. * R17 is inside the dynamic tuning range,
  718. * start tuning the link based on the false cca counter.
  719. */
  720. if (rt2x00dev->link.qual.false_cca > 512 && r17 < up_bound) {
  721. rt2500usb_bbp_write(rt2x00dev, 17, ++r17);
  722. rt2x00dev->link.vgc_level = r17;
  723. } else if (rt2x00dev->link.qual.false_cca < 100 && r17 > low_bound) {
  724. rt2500usb_bbp_write(rt2x00dev, 17, --r17);
  725. rt2x00dev->link.vgc_level = r17;
  726. }
  727. }
  728. #else
  729. #define rt2500usb_link_tuner NULL
  730. #endif
  731. /*
  732. * Initialization functions.
  733. */
  734. static int rt2500usb_init_registers(struct rt2x00_dev *rt2x00dev)
  735. {
  736. u16 reg;
  737. rt2x00usb_vendor_request_sw(rt2x00dev, USB_DEVICE_MODE, 0x0001,
  738. USB_MODE_TEST, REGISTER_TIMEOUT);
  739. rt2x00usb_vendor_request_sw(rt2x00dev, USB_SINGLE_WRITE, 0x0308,
  740. 0x00f0, REGISTER_TIMEOUT);
  741. rt2500usb_register_read(rt2x00dev, TXRX_CSR2, &reg);
  742. rt2x00_set_field16(&reg, TXRX_CSR2_DISABLE_RX, 1);
  743. rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg);
  744. rt2500usb_register_write(rt2x00dev, MAC_CSR13, 0x1111);
  745. rt2500usb_register_write(rt2x00dev, MAC_CSR14, 0x1e11);
  746. rt2500usb_register_read(rt2x00dev, MAC_CSR1, &reg);
  747. rt2x00_set_field16(&reg, MAC_CSR1_SOFT_RESET, 1);
  748. rt2x00_set_field16(&reg, MAC_CSR1_BBP_RESET, 1);
  749. rt2x00_set_field16(&reg, MAC_CSR1_HOST_READY, 0);
  750. rt2500usb_register_write(rt2x00dev, MAC_CSR1, reg);
  751. rt2500usb_register_read(rt2x00dev, MAC_CSR1, &reg);
  752. rt2x00_set_field16(&reg, MAC_CSR1_SOFT_RESET, 0);
  753. rt2x00_set_field16(&reg, MAC_CSR1_BBP_RESET, 0);
  754. rt2x00_set_field16(&reg, MAC_CSR1_HOST_READY, 0);
  755. rt2500usb_register_write(rt2x00dev, MAC_CSR1, reg);
  756. rt2500usb_register_read(rt2x00dev, TXRX_CSR5, &reg);
  757. rt2x00_set_field16(&reg, TXRX_CSR5_BBP_ID0, 13);
  758. rt2x00_set_field16(&reg, TXRX_CSR5_BBP_ID0_VALID, 1);
  759. rt2x00_set_field16(&reg, TXRX_CSR5_BBP_ID1, 12);
  760. rt2x00_set_field16(&reg, TXRX_CSR5_BBP_ID1_VALID, 1);
  761. rt2500usb_register_write(rt2x00dev, TXRX_CSR5, reg);
  762. rt2500usb_register_read(rt2x00dev, TXRX_CSR6, &reg);
  763. rt2x00_set_field16(&reg, TXRX_CSR6_BBP_ID0, 10);
  764. rt2x00_set_field16(&reg, TXRX_CSR6_BBP_ID0_VALID, 1);
  765. rt2x00_set_field16(&reg, TXRX_CSR6_BBP_ID1, 11);
  766. rt2x00_set_field16(&reg, TXRX_CSR6_BBP_ID1_VALID, 1);
  767. rt2500usb_register_write(rt2x00dev, TXRX_CSR6, reg);
  768. rt2500usb_register_read(rt2x00dev, TXRX_CSR7, &reg);
  769. rt2x00_set_field16(&reg, TXRX_CSR7_BBP_ID0, 7);
  770. rt2x00_set_field16(&reg, TXRX_CSR7_BBP_ID0_VALID, 1);
  771. rt2x00_set_field16(&reg, TXRX_CSR7_BBP_ID1, 6);
  772. rt2x00_set_field16(&reg, TXRX_CSR7_BBP_ID1_VALID, 1);
  773. rt2500usb_register_write(rt2x00dev, TXRX_CSR7, reg);
  774. rt2500usb_register_read(rt2x00dev, TXRX_CSR8, &reg);
  775. rt2x00_set_field16(&reg, TXRX_CSR8_BBP_ID0, 5);
  776. rt2x00_set_field16(&reg, TXRX_CSR8_BBP_ID0_VALID, 1);
  777. rt2x00_set_field16(&reg, TXRX_CSR8_BBP_ID1, 0);
  778. rt2x00_set_field16(&reg, TXRX_CSR8_BBP_ID1_VALID, 0);
  779. rt2500usb_register_write(rt2x00dev, TXRX_CSR8, reg);
  780. rt2500usb_register_read(rt2x00dev, TXRX_CSR19, &reg);
  781. rt2x00_set_field16(&reg, TXRX_CSR19_TSF_COUNT, 0);
  782. rt2x00_set_field16(&reg, TXRX_CSR19_TSF_SYNC, 0);
  783. rt2x00_set_field16(&reg, TXRX_CSR19_TBCN, 0);
  784. rt2x00_set_field16(&reg, TXRX_CSR19_BEACON_GEN, 0);
  785. rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
  786. rt2500usb_register_write(rt2x00dev, TXRX_CSR21, 0xe78f);
  787. rt2500usb_register_write(rt2x00dev, MAC_CSR9, 0xff1d);
  788. if (rt2x00dev->ops->lib->set_device_state(rt2x00dev, STATE_AWAKE))
  789. return -EBUSY;
  790. rt2500usb_register_read(rt2x00dev, MAC_CSR1, &reg);
  791. rt2x00_set_field16(&reg, MAC_CSR1_SOFT_RESET, 0);
  792. rt2x00_set_field16(&reg, MAC_CSR1_BBP_RESET, 0);
  793. rt2x00_set_field16(&reg, MAC_CSR1_HOST_READY, 1);
  794. rt2500usb_register_write(rt2x00dev, MAC_CSR1, reg);
  795. if (rt2x00_rev(&rt2x00dev->chip) >= RT2570_VERSION_C) {
  796. rt2500usb_register_read(rt2x00dev, PHY_CSR2, &reg);
  797. rt2x00_set_field16(&reg, PHY_CSR2_LNA, 0);
  798. } else {
  799. reg = 0;
  800. rt2x00_set_field16(&reg, PHY_CSR2_LNA, 1);
  801. rt2x00_set_field16(&reg, PHY_CSR2_LNA_MODE, 3);
  802. }
  803. rt2500usb_register_write(rt2x00dev, PHY_CSR2, reg);
  804. rt2500usb_register_write(rt2x00dev, MAC_CSR11, 0x0002);
  805. rt2500usb_register_write(rt2x00dev, MAC_CSR22, 0x0053);
  806. rt2500usb_register_write(rt2x00dev, MAC_CSR15, 0x01ee);
  807. rt2500usb_register_write(rt2x00dev, MAC_CSR16, 0x0000);
  808. rt2500usb_register_read(rt2x00dev, MAC_CSR8, &reg);
  809. rt2x00_set_field16(&reg, MAC_CSR8_MAX_FRAME_UNIT,
  810. rt2x00dev->rx->data_size);
  811. rt2500usb_register_write(rt2x00dev, MAC_CSR8, reg);
  812. rt2500usb_register_read(rt2x00dev, TXRX_CSR0, &reg);
  813. rt2x00_set_field16(&reg, TXRX_CSR0_IV_OFFSET, IEEE80211_HEADER);
  814. rt2x00_set_field16(&reg, TXRX_CSR0_KEY_ID, 0);
  815. rt2500usb_register_write(rt2x00dev, TXRX_CSR0, reg);
  816. rt2500usb_register_read(rt2x00dev, MAC_CSR18, &reg);
  817. rt2x00_set_field16(&reg, MAC_CSR18_DELAY_AFTER_BEACON, 90);
  818. rt2500usb_register_write(rt2x00dev, MAC_CSR18, reg);
  819. rt2500usb_register_read(rt2x00dev, PHY_CSR4, &reg);
  820. rt2x00_set_field16(&reg, PHY_CSR4_LOW_RF_LE, 1);
  821. rt2500usb_register_write(rt2x00dev, PHY_CSR4, reg);
  822. rt2500usb_register_read(rt2x00dev, TXRX_CSR1, &reg);
  823. rt2x00_set_field16(&reg, TXRX_CSR1_AUTO_SEQUENCE, 1);
  824. rt2500usb_register_write(rt2x00dev, TXRX_CSR1, reg);
  825. return 0;
  826. }
  827. static int rt2500usb_wait_bbp_ready(struct rt2x00_dev *rt2x00dev)
  828. {
  829. unsigned int i;
  830. u8 value;
  831. for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
  832. rt2500usb_bbp_read(rt2x00dev, 0, &value);
  833. if ((value != 0xff) && (value != 0x00))
  834. return 0;
  835. udelay(REGISTER_BUSY_DELAY);
  836. }
  837. ERROR(rt2x00dev, "BBP register access failed, aborting.\n");
  838. return -EACCES;
  839. }
  840. static int rt2500usb_init_bbp(struct rt2x00_dev *rt2x00dev)
  841. {
  842. unsigned int i;
  843. u16 eeprom;
  844. u8 value;
  845. u8 reg_id;
  846. if (unlikely(rt2500usb_wait_bbp_ready(rt2x00dev)))
  847. return -EACCES;
  848. rt2500usb_bbp_write(rt2x00dev, 3, 0x02);
  849. rt2500usb_bbp_write(rt2x00dev, 4, 0x19);
  850. rt2500usb_bbp_write(rt2x00dev, 14, 0x1c);
  851. rt2500usb_bbp_write(rt2x00dev, 15, 0x30);
  852. rt2500usb_bbp_write(rt2x00dev, 16, 0xac);
  853. rt2500usb_bbp_write(rt2x00dev, 18, 0x18);
  854. rt2500usb_bbp_write(rt2x00dev, 19, 0xff);
  855. rt2500usb_bbp_write(rt2x00dev, 20, 0x1e);
  856. rt2500usb_bbp_write(rt2x00dev, 21, 0x08);
  857. rt2500usb_bbp_write(rt2x00dev, 22, 0x08);
  858. rt2500usb_bbp_write(rt2x00dev, 23, 0x08);
  859. rt2500usb_bbp_write(rt2x00dev, 24, 0x80);
  860. rt2500usb_bbp_write(rt2x00dev, 25, 0x50);
  861. rt2500usb_bbp_write(rt2x00dev, 26, 0x08);
  862. rt2500usb_bbp_write(rt2x00dev, 27, 0x23);
  863. rt2500usb_bbp_write(rt2x00dev, 30, 0x10);
  864. rt2500usb_bbp_write(rt2x00dev, 31, 0x2b);
  865. rt2500usb_bbp_write(rt2x00dev, 32, 0xb9);
  866. rt2500usb_bbp_write(rt2x00dev, 34, 0x12);
  867. rt2500usb_bbp_write(rt2x00dev, 35, 0x50);
  868. rt2500usb_bbp_write(rt2x00dev, 39, 0xc4);
  869. rt2500usb_bbp_write(rt2x00dev, 40, 0x02);
  870. rt2500usb_bbp_write(rt2x00dev, 41, 0x60);
  871. rt2500usb_bbp_write(rt2x00dev, 53, 0x10);
  872. rt2500usb_bbp_write(rt2x00dev, 54, 0x18);
  873. rt2500usb_bbp_write(rt2x00dev, 56, 0x08);
  874. rt2500usb_bbp_write(rt2x00dev, 57, 0x10);
  875. rt2500usb_bbp_write(rt2x00dev, 58, 0x08);
  876. rt2500usb_bbp_write(rt2x00dev, 61, 0x60);
  877. rt2500usb_bbp_write(rt2x00dev, 62, 0x10);
  878. rt2500usb_bbp_write(rt2x00dev, 75, 0xff);
  879. for (i = 0; i < EEPROM_BBP_SIZE; i++) {
  880. rt2x00_eeprom_read(rt2x00dev, EEPROM_BBP_START + i, &eeprom);
  881. if (eeprom != 0xffff && eeprom != 0x0000) {
  882. reg_id = rt2x00_get_field16(eeprom, EEPROM_BBP_REG_ID);
  883. value = rt2x00_get_field16(eeprom, EEPROM_BBP_VALUE);
  884. rt2500usb_bbp_write(rt2x00dev, reg_id, value);
  885. }
  886. }
  887. return 0;
  888. }
  889. /*
  890. * Device state switch handlers.
  891. */
  892. static void rt2500usb_toggle_rx(struct rt2x00_dev *rt2x00dev,
  893. enum dev_state state)
  894. {
  895. u16 reg;
  896. rt2500usb_register_read(rt2x00dev, TXRX_CSR2, &reg);
  897. rt2x00_set_field16(&reg, TXRX_CSR2_DISABLE_RX,
  898. (state == STATE_RADIO_RX_OFF) ||
  899. (state == STATE_RADIO_RX_OFF_LINK));
  900. rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg);
  901. }
  902. static int rt2500usb_enable_radio(struct rt2x00_dev *rt2x00dev)
  903. {
  904. /*
  905. * Initialize all registers.
  906. */
  907. if (unlikely(rt2500usb_init_registers(rt2x00dev) ||
  908. rt2500usb_init_bbp(rt2x00dev)))
  909. return -EIO;
  910. return 0;
  911. }
  912. static void rt2500usb_disable_radio(struct rt2x00_dev *rt2x00dev)
  913. {
  914. rt2500usb_register_write(rt2x00dev, MAC_CSR13, 0x2121);
  915. rt2500usb_register_write(rt2x00dev, MAC_CSR14, 0x2121);
  916. /*
  917. * Disable synchronisation.
  918. */
  919. rt2500usb_register_write(rt2x00dev, TXRX_CSR19, 0);
  920. rt2x00usb_disable_radio(rt2x00dev);
  921. }
  922. static int rt2500usb_set_state(struct rt2x00_dev *rt2x00dev,
  923. enum dev_state state)
  924. {
  925. u16 reg;
  926. u16 reg2;
  927. unsigned int i;
  928. char put_to_sleep;
  929. char bbp_state;
  930. char rf_state;
  931. put_to_sleep = (state != STATE_AWAKE);
  932. reg = 0;
  933. rt2x00_set_field16(&reg, MAC_CSR17_BBP_DESIRE_STATE, state);
  934. rt2x00_set_field16(&reg, MAC_CSR17_RF_DESIRE_STATE, state);
  935. rt2x00_set_field16(&reg, MAC_CSR17_PUT_TO_SLEEP, put_to_sleep);
  936. rt2500usb_register_write(rt2x00dev, MAC_CSR17, reg);
  937. rt2x00_set_field16(&reg, MAC_CSR17_SET_STATE, 1);
  938. rt2500usb_register_write(rt2x00dev, MAC_CSR17, reg);
  939. /*
  940. * Device is not guaranteed to be in the requested state yet.
  941. * We must wait until the register indicates that the
  942. * device has entered the correct state.
  943. */
  944. for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
  945. rt2500usb_register_read(rt2x00dev, MAC_CSR17, &reg2);
  946. bbp_state = rt2x00_get_field16(reg2, MAC_CSR17_BBP_CURR_STATE);
  947. rf_state = rt2x00_get_field16(reg2, MAC_CSR17_RF_CURR_STATE);
  948. if (bbp_state == state && rf_state == state)
  949. return 0;
  950. rt2500usb_register_write(rt2x00dev, MAC_CSR17, reg);
  951. msleep(30);
  952. }
  953. return -EBUSY;
  954. }
  955. static int rt2500usb_set_device_state(struct rt2x00_dev *rt2x00dev,
  956. enum dev_state state)
  957. {
  958. int retval = 0;
  959. switch (state) {
  960. case STATE_RADIO_ON:
  961. retval = rt2500usb_enable_radio(rt2x00dev);
  962. break;
  963. case STATE_RADIO_OFF:
  964. rt2500usb_disable_radio(rt2x00dev);
  965. break;
  966. case STATE_RADIO_RX_ON:
  967. case STATE_RADIO_RX_ON_LINK:
  968. case STATE_RADIO_RX_OFF:
  969. case STATE_RADIO_RX_OFF_LINK:
  970. rt2500usb_toggle_rx(rt2x00dev, state);
  971. break;
  972. case STATE_RADIO_IRQ_ON:
  973. case STATE_RADIO_IRQ_OFF:
  974. /* No support, but no error either */
  975. break;
  976. case STATE_DEEP_SLEEP:
  977. case STATE_SLEEP:
  978. case STATE_STANDBY:
  979. case STATE_AWAKE:
  980. retval = rt2500usb_set_state(rt2x00dev, state);
  981. break;
  982. default:
  983. retval = -ENOTSUPP;
  984. break;
  985. }
  986. if (unlikely(retval))
  987. ERROR(rt2x00dev, "Device failed to enter state %d (%d).\n",
  988. state, retval);
  989. return retval;
  990. }
  991. /*
  992. * TX descriptor initialization
  993. */
  994. static void rt2500usb_write_tx_desc(struct rt2x00_dev *rt2x00dev,
  995. struct sk_buff *skb,
  996. struct txentry_desc *txdesc)
  997. {
  998. struct skb_frame_desc *skbdesc = get_skb_frame_desc(skb);
  999. __le32 *txd = skbdesc->desc;
  1000. u32 word;
  1001. /*
  1002. * Start writing the descriptor words.
  1003. */
  1004. rt2x00_desc_read(txd, 1, &word);
  1005. rt2x00_set_field32(&word, TXD_W1_IV_OFFSET, txdesc->iv_offset);
  1006. rt2x00_set_field32(&word, TXD_W1_AIFS, txdesc->aifs);
  1007. rt2x00_set_field32(&word, TXD_W1_CWMIN, txdesc->cw_min);
  1008. rt2x00_set_field32(&word, TXD_W1_CWMAX, txdesc->cw_max);
  1009. rt2x00_desc_write(txd, 1, word);
  1010. rt2x00_desc_read(txd, 2, &word);
  1011. rt2x00_set_field32(&word, TXD_W2_PLCP_SIGNAL, txdesc->signal);
  1012. rt2x00_set_field32(&word, TXD_W2_PLCP_SERVICE, txdesc->service);
  1013. rt2x00_set_field32(&word, TXD_W2_PLCP_LENGTH_LOW, txdesc->length_low);
  1014. rt2x00_set_field32(&word, TXD_W2_PLCP_LENGTH_HIGH, txdesc->length_high);
  1015. rt2x00_desc_write(txd, 2, word);
  1016. if (test_bit(ENTRY_TXD_ENCRYPT, &txdesc->flags)) {
  1017. _rt2x00_desc_write(txd, 3, skbdesc->iv[0]);
  1018. _rt2x00_desc_write(txd, 4, skbdesc->iv[1]);
  1019. }
  1020. rt2x00_desc_read(txd, 0, &word);
  1021. rt2x00_set_field32(&word, TXD_W0_RETRY_LIMIT, txdesc->retry_limit);
  1022. rt2x00_set_field32(&word, TXD_W0_MORE_FRAG,
  1023. test_bit(ENTRY_TXD_MORE_FRAG, &txdesc->flags));
  1024. rt2x00_set_field32(&word, TXD_W0_ACK,
  1025. test_bit(ENTRY_TXD_ACK, &txdesc->flags));
  1026. rt2x00_set_field32(&word, TXD_W0_TIMESTAMP,
  1027. test_bit(ENTRY_TXD_REQ_TIMESTAMP, &txdesc->flags));
  1028. rt2x00_set_field32(&word, TXD_W0_OFDM,
  1029. (txdesc->rate_mode == RATE_MODE_OFDM));
  1030. rt2x00_set_field32(&word, TXD_W0_NEW_SEQ,
  1031. test_bit(ENTRY_TXD_FIRST_FRAGMENT, &txdesc->flags));
  1032. rt2x00_set_field32(&word, TXD_W0_IFS, txdesc->ifs);
  1033. rt2x00_set_field32(&word, TXD_W0_DATABYTE_COUNT, skb->len);
  1034. rt2x00_set_field32(&word, TXD_W0_CIPHER, !!txdesc->cipher);
  1035. rt2x00_set_field32(&word, TXD_W0_KEY_ID, txdesc->key_idx);
  1036. rt2x00_desc_write(txd, 0, word);
  1037. }
  1038. /*
  1039. * TX data initialization
  1040. */
  1041. static void rt2500usb_beacondone(struct urb *urb);
  1042. static void rt2500usb_write_beacon(struct queue_entry *entry)
  1043. {
  1044. struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
  1045. struct usb_device *usb_dev = to_usb_device_intf(rt2x00dev->dev);
  1046. struct queue_entry_priv_usb_bcn *bcn_priv = entry->priv_data;
  1047. struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb);
  1048. int pipe = usb_sndbulkpipe(usb_dev, entry->queue->usb_endpoint);
  1049. int length;
  1050. u16 reg;
  1051. /*
  1052. * Add the descriptor in front of the skb.
  1053. */
  1054. skb_push(entry->skb, entry->queue->desc_size);
  1055. memcpy(entry->skb->data, skbdesc->desc, skbdesc->desc_len);
  1056. skbdesc->desc = entry->skb->data;
  1057. /*
  1058. * Disable beaconing while we are reloading the beacon data,
  1059. * otherwise we might be sending out invalid data.
  1060. */
  1061. rt2500usb_register_read(rt2x00dev, TXRX_CSR19, &reg);
  1062. rt2x00_set_field16(&reg, TXRX_CSR19_BEACON_GEN, 0);
  1063. rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
  1064. /*
  1065. * USB devices cannot blindly pass the skb->len as the
  1066. * length of the data to usb_fill_bulk_urb. Pass the skb
  1067. * to the driver to determine what the length should be.
  1068. */
  1069. length = rt2x00dev->ops->lib->get_tx_data_len(entry);
  1070. usb_fill_bulk_urb(bcn_priv->urb, usb_dev, pipe,
  1071. entry->skb->data, length, rt2500usb_beacondone,
  1072. entry);
  1073. /*
  1074. * Second we need to create the guardian byte.
  1075. * We only need a single byte, so lets recycle
  1076. * the 'flags' field we are not using for beacons.
  1077. */
  1078. bcn_priv->guardian_data = 0;
  1079. usb_fill_bulk_urb(bcn_priv->guardian_urb, usb_dev, pipe,
  1080. &bcn_priv->guardian_data, 1, rt2500usb_beacondone,
  1081. entry);
  1082. /*
  1083. * Send out the guardian byte.
  1084. */
  1085. usb_submit_urb(bcn_priv->guardian_urb, GFP_ATOMIC);
  1086. }
  1087. static int rt2500usb_get_tx_data_len(struct queue_entry *entry)
  1088. {
  1089. int length;
  1090. /*
  1091. * The length _must_ be a multiple of 2,
  1092. * but it must _not_ be a multiple of the USB packet size.
  1093. */
  1094. length = roundup(entry->skb->len, 2);
  1095. length += (2 * !(length % entry->queue->usb_maxpacket));
  1096. return length;
  1097. }
  1098. static void rt2500usb_kick_tx_queue(struct rt2x00_dev *rt2x00dev,
  1099. const enum data_queue_qid queue)
  1100. {
  1101. u16 reg, reg0;
  1102. if (queue != QID_BEACON) {
  1103. rt2x00usb_kick_tx_queue(rt2x00dev, queue);
  1104. return;
  1105. }
  1106. rt2500usb_register_read(rt2x00dev, TXRX_CSR19, &reg);
  1107. if (!rt2x00_get_field16(reg, TXRX_CSR19_BEACON_GEN)) {
  1108. rt2x00_set_field16(&reg, TXRX_CSR19_TSF_COUNT, 1);
  1109. rt2x00_set_field16(&reg, TXRX_CSR19_TBCN, 1);
  1110. reg0 = reg;
  1111. rt2x00_set_field16(&reg, TXRX_CSR19_BEACON_GEN, 1);
  1112. /*
  1113. * Beacon generation will fail initially.
  1114. * To prevent this we need to change the TXRX_CSR19
  1115. * register several times (reg0 is the same as reg
  1116. * except for TXRX_CSR19_BEACON_GEN, which is 0 in reg0
  1117. * and 1 in reg).
  1118. */
  1119. rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
  1120. rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg0);
  1121. rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
  1122. rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg0);
  1123. rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
  1124. }
  1125. }
  1126. /*
  1127. * RX control handlers
  1128. */
  1129. static void rt2500usb_fill_rxdone(struct queue_entry *entry,
  1130. struct rxdone_entry_desc *rxdesc)
  1131. {
  1132. struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
  1133. struct queue_entry_priv_usb *entry_priv = entry->priv_data;
  1134. struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb);
  1135. __le32 *rxd =
  1136. (__le32 *)(entry->skb->data +
  1137. (entry_priv->urb->actual_length -
  1138. entry->queue->desc_size));
  1139. u32 word0;
  1140. u32 word1;
  1141. /*
  1142. * Copy descriptor to the skbdesc->desc buffer, making it safe from moving of
  1143. * frame data in rt2x00usb.
  1144. */
  1145. memcpy(skbdesc->desc, rxd, skbdesc->desc_len);
  1146. rxd = (__le32 *)skbdesc->desc;
  1147. /*
  1148. * It is now safe to read the descriptor on all architectures.
  1149. */
  1150. rt2x00_desc_read(rxd, 0, &word0);
  1151. rt2x00_desc_read(rxd, 1, &word1);
  1152. if (rt2x00_get_field32(word0, RXD_W0_CRC_ERROR))
  1153. rxdesc->flags |= RX_FLAG_FAILED_FCS_CRC;
  1154. if (rt2x00_get_field32(word0, RXD_W0_PHYSICAL_ERROR))
  1155. rxdesc->flags |= RX_FLAG_FAILED_PLCP_CRC;
  1156. if (test_bit(CONFIG_SUPPORT_HW_CRYPTO, &rt2x00dev->flags)) {
  1157. rxdesc->cipher = rt2x00_get_field32(word0, RXD_W0_CIPHER);
  1158. if (rt2x00_get_field32(word0, RXD_W0_CIPHER_ERROR))
  1159. rxdesc->cipher_status = RX_CRYPTO_FAIL_KEY;
  1160. }
  1161. if (rxdesc->cipher != CIPHER_NONE) {
  1162. _rt2x00_desc_read(rxd, 2, &rxdesc->iv[0]);
  1163. _rt2x00_desc_read(rxd, 3, &rxdesc->iv[1]);
  1164. rxdesc->dev_flags |= RXDONE_CRYPTO_IV;
  1165. /* ICV is located at the end of frame */
  1166. rxdesc->flags |= RX_FLAG_MMIC_STRIPPED;
  1167. if (rxdesc->cipher_status == RX_CRYPTO_SUCCESS)
  1168. rxdesc->flags |= RX_FLAG_DECRYPTED;
  1169. else if (rxdesc->cipher_status == RX_CRYPTO_FAIL_MIC)
  1170. rxdesc->flags |= RX_FLAG_MMIC_ERROR;
  1171. }
  1172. /*
  1173. * Obtain the status about this packet.
  1174. * When frame was received with an OFDM bitrate,
  1175. * the signal is the PLCP value. If it was received with
  1176. * a CCK bitrate the signal is the rate in 100kbit/s.
  1177. */
  1178. rxdesc->signal = rt2x00_get_field32(word1, RXD_W1_SIGNAL);
  1179. rxdesc->rssi =
  1180. rt2x00_get_field32(word1, RXD_W1_RSSI) - rt2x00dev->rssi_offset;
  1181. rxdesc->size = rt2x00_get_field32(word0, RXD_W0_DATABYTE_COUNT);
  1182. if (rt2x00_get_field32(word0, RXD_W0_OFDM))
  1183. rxdesc->dev_flags |= RXDONE_SIGNAL_PLCP;
  1184. else
  1185. rxdesc->dev_flags |= RXDONE_SIGNAL_BITRATE;
  1186. if (rt2x00_get_field32(word0, RXD_W0_MY_BSS))
  1187. rxdesc->dev_flags |= RXDONE_MY_BSS;
  1188. /*
  1189. * Adjust the skb memory window to the frame boundaries.
  1190. */
  1191. skb_trim(entry->skb, rxdesc->size);
  1192. }
  1193. /*
  1194. * Interrupt functions.
  1195. */
  1196. static void rt2500usb_beacondone(struct urb *urb)
  1197. {
  1198. struct queue_entry *entry = (struct queue_entry *)urb->context;
  1199. struct queue_entry_priv_usb_bcn *bcn_priv = entry->priv_data;
  1200. if (!test_bit(DEVICE_STATE_ENABLED_RADIO, &entry->queue->rt2x00dev->flags))
  1201. return;
  1202. /*
  1203. * Check if this was the guardian beacon,
  1204. * if that was the case we need to send the real beacon now.
  1205. * Otherwise we should free the sk_buffer, the device
  1206. * should be doing the rest of the work now.
  1207. */
  1208. if (bcn_priv->guardian_urb == urb) {
  1209. usb_submit_urb(bcn_priv->urb, GFP_ATOMIC);
  1210. } else if (bcn_priv->urb == urb) {
  1211. dev_kfree_skb(entry->skb);
  1212. entry->skb = NULL;
  1213. }
  1214. }
  1215. /*
  1216. * Device probe functions.
  1217. */
  1218. static int rt2500usb_validate_eeprom(struct rt2x00_dev *rt2x00dev)
  1219. {
  1220. u16 word;
  1221. u8 *mac;
  1222. u8 bbp;
  1223. rt2x00usb_eeprom_read(rt2x00dev, rt2x00dev->eeprom, EEPROM_SIZE);
  1224. /*
  1225. * Start validation of the data that has been read.
  1226. */
  1227. mac = rt2x00_eeprom_addr(rt2x00dev, EEPROM_MAC_ADDR_0);
  1228. if (!is_valid_ether_addr(mac)) {
  1229. random_ether_addr(mac);
  1230. EEPROM(rt2x00dev, "MAC: %pM\n", mac);
  1231. }
  1232. rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &word);
  1233. if (word == 0xffff) {
  1234. rt2x00_set_field16(&word, EEPROM_ANTENNA_NUM, 2);
  1235. rt2x00_set_field16(&word, EEPROM_ANTENNA_TX_DEFAULT,
  1236. ANTENNA_SW_DIVERSITY);
  1237. rt2x00_set_field16(&word, EEPROM_ANTENNA_RX_DEFAULT,
  1238. ANTENNA_SW_DIVERSITY);
  1239. rt2x00_set_field16(&word, EEPROM_ANTENNA_LED_MODE,
  1240. LED_MODE_DEFAULT);
  1241. rt2x00_set_field16(&word, EEPROM_ANTENNA_DYN_TXAGC, 0);
  1242. rt2x00_set_field16(&word, EEPROM_ANTENNA_HARDWARE_RADIO, 0);
  1243. rt2x00_set_field16(&word, EEPROM_ANTENNA_RF_TYPE, RF2522);
  1244. rt2x00_eeprom_write(rt2x00dev, EEPROM_ANTENNA, word);
  1245. EEPROM(rt2x00dev, "Antenna: 0x%04x\n", word);
  1246. }
  1247. rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC, &word);
  1248. if (word == 0xffff) {
  1249. rt2x00_set_field16(&word, EEPROM_NIC_CARDBUS_ACCEL, 0);
  1250. rt2x00_set_field16(&word, EEPROM_NIC_DYN_BBP_TUNE, 0);
  1251. rt2x00_set_field16(&word, EEPROM_NIC_CCK_TX_POWER, 0);
  1252. rt2x00_eeprom_write(rt2x00dev, EEPROM_NIC, word);
  1253. EEPROM(rt2x00dev, "NIC: 0x%04x\n", word);
  1254. }
  1255. rt2x00_eeprom_read(rt2x00dev, EEPROM_CALIBRATE_OFFSET, &word);
  1256. if (word == 0xffff) {
  1257. rt2x00_set_field16(&word, EEPROM_CALIBRATE_OFFSET_RSSI,
  1258. DEFAULT_RSSI_OFFSET);
  1259. rt2x00_eeprom_write(rt2x00dev, EEPROM_CALIBRATE_OFFSET, word);
  1260. EEPROM(rt2x00dev, "Calibrate offset: 0x%04x\n", word);
  1261. }
  1262. rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE, &word);
  1263. if (word == 0xffff) {
  1264. rt2x00_set_field16(&word, EEPROM_BBPTUNE_THRESHOLD, 45);
  1265. rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE, word);
  1266. EEPROM(rt2x00dev, "BBPtune: 0x%04x\n", word);
  1267. }
  1268. /*
  1269. * Switch lower vgc bound to current BBP R17 value,
  1270. * lower the value a bit for better quality.
  1271. */
  1272. rt2500usb_bbp_read(rt2x00dev, 17, &bbp);
  1273. bbp -= 6;
  1274. rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_VGC, &word);
  1275. if (word == 0xffff) {
  1276. rt2x00_set_field16(&word, EEPROM_BBPTUNE_VGCUPPER, 0x40);
  1277. rt2x00_set_field16(&word, EEPROM_BBPTUNE_VGCLOWER, bbp);
  1278. rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_VGC, word);
  1279. EEPROM(rt2x00dev, "BBPtune vgc: 0x%04x\n", word);
  1280. } else {
  1281. rt2x00_set_field16(&word, EEPROM_BBPTUNE_VGCLOWER, bbp);
  1282. rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_VGC, word);
  1283. }
  1284. rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R17, &word);
  1285. if (word == 0xffff) {
  1286. rt2x00_set_field16(&word, EEPROM_BBPTUNE_R17_LOW, 0x48);
  1287. rt2x00_set_field16(&word, EEPROM_BBPTUNE_R17_HIGH, 0x41);
  1288. rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R17, word);
  1289. EEPROM(rt2x00dev, "BBPtune r17: 0x%04x\n", word);
  1290. }
  1291. rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R24, &word);
  1292. if (word == 0xffff) {
  1293. rt2x00_set_field16(&word, EEPROM_BBPTUNE_R24_LOW, 0x40);
  1294. rt2x00_set_field16(&word, EEPROM_BBPTUNE_R24_HIGH, 0x80);
  1295. rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R24, word);
  1296. EEPROM(rt2x00dev, "BBPtune r24: 0x%04x\n", word);
  1297. }
  1298. rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R25, &word);
  1299. if (word == 0xffff) {
  1300. rt2x00_set_field16(&word, EEPROM_BBPTUNE_R25_LOW, 0x40);
  1301. rt2x00_set_field16(&word, EEPROM_BBPTUNE_R25_HIGH, 0x50);
  1302. rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R25, word);
  1303. EEPROM(rt2x00dev, "BBPtune r25: 0x%04x\n", word);
  1304. }
  1305. rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R61, &word);
  1306. if (word == 0xffff) {
  1307. rt2x00_set_field16(&word, EEPROM_BBPTUNE_R61_LOW, 0x60);
  1308. rt2x00_set_field16(&word, EEPROM_BBPTUNE_R61_HIGH, 0x6d);
  1309. rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R61, word);
  1310. EEPROM(rt2x00dev, "BBPtune r61: 0x%04x\n", word);
  1311. }
  1312. return 0;
  1313. }
  1314. static int rt2500usb_init_eeprom(struct rt2x00_dev *rt2x00dev)
  1315. {
  1316. u16 reg;
  1317. u16 value;
  1318. u16 eeprom;
  1319. /*
  1320. * Read EEPROM word for configuration.
  1321. */
  1322. rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &eeprom);
  1323. /*
  1324. * Identify RF chipset.
  1325. */
  1326. value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RF_TYPE);
  1327. rt2500usb_register_read(rt2x00dev, MAC_CSR0, &reg);
  1328. rt2x00_set_chip(rt2x00dev, RT2570, value, reg);
  1329. if (!rt2x00_check_rev(&rt2x00dev->chip, 0x000ffff0, 0) ||
  1330. rt2x00_check_rev(&rt2x00dev->chip, 0x0000000f, 0)) {
  1331. ERROR(rt2x00dev, "Invalid RT chipset detected.\n");
  1332. return -ENODEV;
  1333. }
  1334. if (!rt2x00_rf(&rt2x00dev->chip, RF2522) &&
  1335. !rt2x00_rf(&rt2x00dev->chip, RF2523) &&
  1336. !rt2x00_rf(&rt2x00dev->chip, RF2524) &&
  1337. !rt2x00_rf(&rt2x00dev->chip, RF2525) &&
  1338. !rt2x00_rf(&rt2x00dev->chip, RF2525E) &&
  1339. !rt2x00_rf(&rt2x00dev->chip, RF5222)) {
  1340. ERROR(rt2x00dev, "Invalid RF chipset detected.\n");
  1341. return -ENODEV;
  1342. }
  1343. /*
  1344. * Identify default antenna configuration.
  1345. */
  1346. rt2x00dev->default_ant.tx =
  1347. rt2x00_get_field16(eeprom, EEPROM_ANTENNA_TX_DEFAULT);
  1348. rt2x00dev->default_ant.rx =
  1349. rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RX_DEFAULT);
  1350. /*
  1351. * When the eeprom indicates SW_DIVERSITY use HW_DIVERSITY instead.
  1352. * I am not 100% sure about this, but the legacy drivers do not
  1353. * indicate antenna swapping in software is required when
  1354. * diversity is enabled.
  1355. */
  1356. if (rt2x00dev->default_ant.tx == ANTENNA_SW_DIVERSITY)
  1357. rt2x00dev->default_ant.tx = ANTENNA_HW_DIVERSITY;
  1358. if (rt2x00dev->default_ant.rx == ANTENNA_SW_DIVERSITY)
  1359. rt2x00dev->default_ant.rx = ANTENNA_HW_DIVERSITY;
  1360. /*
  1361. * Store led mode, for correct led behaviour.
  1362. */
  1363. #ifdef CONFIG_RT2X00_LIB_LEDS
  1364. value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_LED_MODE);
  1365. rt2500usb_init_led(rt2x00dev, &rt2x00dev->led_radio, LED_TYPE_RADIO);
  1366. if (value == LED_MODE_TXRX_ACTIVITY ||
  1367. value == LED_MODE_DEFAULT ||
  1368. value == LED_MODE_ASUS)
  1369. rt2500usb_init_led(rt2x00dev, &rt2x00dev->led_qual,
  1370. LED_TYPE_ACTIVITY);
  1371. #endif /* CONFIG_RT2X00_LIB_LEDS */
  1372. /*
  1373. * Detect if this device has an hardware controlled radio.
  1374. */
  1375. if (rt2x00_get_field16(eeprom, EEPROM_ANTENNA_HARDWARE_RADIO))
  1376. __set_bit(CONFIG_SUPPORT_HW_BUTTON, &rt2x00dev->flags);
  1377. /*
  1378. * Check if the BBP tuning should be disabled.
  1379. */
  1380. rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC, &eeprom);
  1381. if (rt2x00_get_field16(eeprom, EEPROM_NIC_DYN_BBP_TUNE))
  1382. __set_bit(CONFIG_DISABLE_LINK_TUNING, &rt2x00dev->flags);
  1383. /*
  1384. * Read the RSSI <-> dBm offset information.
  1385. */
  1386. rt2x00_eeprom_read(rt2x00dev, EEPROM_CALIBRATE_OFFSET, &eeprom);
  1387. rt2x00dev->rssi_offset =
  1388. rt2x00_get_field16(eeprom, EEPROM_CALIBRATE_OFFSET_RSSI);
  1389. return 0;
  1390. }
  1391. /*
  1392. * RF value list for RF2522
  1393. * Supports: 2.4 GHz
  1394. */
  1395. static const struct rf_channel rf_vals_bg_2522[] = {
  1396. { 1, 0x00002050, 0x000c1fda, 0x00000101, 0 },
  1397. { 2, 0x00002050, 0x000c1fee, 0x00000101, 0 },
  1398. { 3, 0x00002050, 0x000c2002, 0x00000101, 0 },
  1399. { 4, 0x00002050, 0x000c2016, 0x00000101, 0 },
  1400. { 5, 0x00002050, 0x000c202a, 0x00000101, 0 },
  1401. { 6, 0x00002050, 0x000c203e, 0x00000101, 0 },
  1402. { 7, 0x00002050, 0x000c2052, 0x00000101, 0 },
  1403. { 8, 0x00002050, 0x000c2066, 0x00000101, 0 },
  1404. { 9, 0x00002050, 0x000c207a, 0x00000101, 0 },
  1405. { 10, 0x00002050, 0x000c208e, 0x00000101, 0 },
  1406. { 11, 0x00002050, 0x000c20a2, 0x00000101, 0 },
  1407. { 12, 0x00002050, 0x000c20b6, 0x00000101, 0 },
  1408. { 13, 0x00002050, 0x000c20ca, 0x00000101, 0 },
  1409. { 14, 0x00002050, 0x000c20fa, 0x00000101, 0 },
  1410. };
  1411. /*
  1412. * RF value list for RF2523
  1413. * Supports: 2.4 GHz
  1414. */
  1415. static const struct rf_channel rf_vals_bg_2523[] = {
  1416. { 1, 0x00022010, 0x00000c9e, 0x000e0111, 0x00000a1b },
  1417. { 2, 0x00022010, 0x00000ca2, 0x000e0111, 0x00000a1b },
  1418. { 3, 0x00022010, 0x00000ca6, 0x000e0111, 0x00000a1b },
  1419. { 4, 0x00022010, 0x00000caa, 0x000e0111, 0x00000a1b },
  1420. { 5, 0x00022010, 0x00000cae, 0x000e0111, 0x00000a1b },
  1421. { 6, 0x00022010, 0x00000cb2, 0x000e0111, 0x00000a1b },
  1422. { 7, 0x00022010, 0x00000cb6, 0x000e0111, 0x00000a1b },
  1423. { 8, 0x00022010, 0x00000cba, 0x000e0111, 0x00000a1b },
  1424. { 9, 0x00022010, 0x00000cbe, 0x000e0111, 0x00000a1b },
  1425. { 10, 0x00022010, 0x00000d02, 0x000e0111, 0x00000a1b },
  1426. { 11, 0x00022010, 0x00000d06, 0x000e0111, 0x00000a1b },
  1427. { 12, 0x00022010, 0x00000d0a, 0x000e0111, 0x00000a1b },
  1428. { 13, 0x00022010, 0x00000d0e, 0x000e0111, 0x00000a1b },
  1429. { 14, 0x00022010, 0x00000d1a, 0x000e0111, 0x00000a03 },
  1430. };
  1431. /*
  1432. * RF value list for RF2524
  1433. * Supports: 2.4 GHz
  1434. */
  1435. static const struct rf_channel rf_vals_bg_2524[] = {
  1436. { 1, 0x00032020, 0x00000c9e, 0x00000101, 0x00000a1b },
  1437. { 2, 0x00032020, 0x00000ca2, 0x00000101, 0x00000a1b },
  1438. { 3, 0x00032020, 0x00000ca6, 0x00000101, 0x00000a1b },
  1439. { 4, 0x00032020, 0x00000caa, 0x00000101, 0x00000a1b },
  1440. { 5, 0x00032020, 0x00000cae, 0x00000101, 0x00000a1b },
  1441. { 6, 0x00032020, 0x00000cb2, 0x00000101, 0x00000a1b },
  1442. { 7, 0x00032020, 0x00000cb6, 0x00000101, 0x00000a1b },
  1443. { 8, 0x00032020, 0x00000cba, 0x00000101, 0x00000a1b },
  1444. { 9, 0x00032020, 0x00000cbe, 0x00000101, 0x00000a1b },
  1445. { 10, 0x00032020, 0x00000d02, 0x00000101, 0x00000a1b },
  1446. { 11, 0x00032020, 0x00000d06, 0x00000101, 0x00000a1b },
  1447. { 12, 0x00032020, 0x00000d0a, 0x00000101, 0x00000a1b },
  1448. { 13, 0x00032020, 0x00000d0e, 0x00000101, 0x00000a1b },
  1449. { 14, 0x00032020, 0x00000d1a, 0x00000101, 0x00000a03 },
  1450. };
  1451. /*
  1452. * RF value list for RF2525
  1453. * Supports: 2.4 GHz
  1454. */
  1455. static const struct rf_channel rf_vals_bg_2525[] = {
  1456. { 1, 0x00022020, 0x00080c9e, 0x00060111, 0x00000a1b },
  1457. { 2, 0x00022020, 0x00080ca2, 0x00060111, 0x00000a1b },
  1458. { 3, 0x00022020, 0x00080ca6, 0x00060111, 0x00000a1b },
  1459. { 4, 0x00022020, 0x00080caa, 0x00060111, 0x00000a1b },
  1460. { 5, 0x00022020, 0x00080cae, 0x00060111, 0x00000a1b },
  1461. { 6, 0x00022020, 0x00080cb2, 0x00060111, 0x00000a1b },
  1462. { 7, 0x00022020, 0x00080cb6, 0x00060111, 0x00000a1b },
  1463. { 8, 0x00022020, 0x00080cba, 0x00060111, 0x00000a1b },
  1464. { 9, 0x00022020, 0x00080cbe, 0x00060111, 0x00000a1b },
  1465. { 10, 0x00022020, 0x00080d02, 0x00060111, 0x00000a1b },
  1466. { 11, 0x00022020, 0x00080d06, 0x00060111, 0x00000a1b },
  1467. { 12, 0x00022020, 0x00080d0a, 0x00060111, 0x00000a1b },
  1468. { 13, 0x00022020, 0x00080d0e, 0x00060111, 0x00000a1b },
  1469. { 14, 0x00022020, 0x00080d1a, 0x00060111, 0x00000a03 },
  1470. };
  1471. /*
  1472. * RF value list for RF2525e
  1473. * Supports: 2.4 GHz
  1474. */
  1475. static const struct rf_channel rf_vals_bg_2525e[] = {
  1476. { 1, 0x00022010, 0x0000089a, 0x00060111, 0x00000e1b },
  1477. { 2, 0x00022010, 0x0000089e, 0x00060111, 0x00000e07 },
  1478. { 3, 0x00022010, 0x0000089e, 0x00060111, 0x00000e1b },
  1479. { 4, 0x00022010, 0x000008a2, 0x00060111, 0x00000e07 },
  1480. { 5, 0x00022010, 0x000008a2, 0x00060111, 0x00000e1b },
  1481. { 6, 0x00022010, 0x000008a6, 0x00060111, 0x00000e07 },
  1482. { 7, 0x00022010, 0x000008a6, 0x00060111, 0x00000e1b },
  1483. { 8, 0x00022010, 0x000008aa, 0x00060111, 0x00000e07 },
  1484. { 9, 0x00022010, 0x000008aa, 0x00060111, 0x00000e1b },
  1485. { 10, 0x00022010, 0x000008ae, 0x00060111, 0x00000e07 },
  1486. { 11, 0x00022010, 0x000008ae, 0x00060111, 0x00000e1b },
  1487. { 12, 0x00022010, 0x000008b2, 0x00060111, 0x00000e07 },
  1488. { 13, 0x00022010, 0x000008b2, 0x00060111, 0x00000e1b },
  1489. { 14, 0x00022010, 0x000008b6, 0x00060111, 0x00000e23 },
  1490. };
  1491. /*
  1492. * RF value list for RF5222
  1493. * Supports: 2.4 GHz & 5.2 GHz
  1494. */
  1495. static const struct rf_channel rf_vals_5222[] = {
  1496. { 1, 0x00022020, 0x00001136, 0x00000101, 0x00000a0b },
  1497. { 2, 0x00022020, 0x0000113a, 0x00000101, 0x00000a0b },
  1498. { 3, 0x00022020, 0x0000113e, 0x00000101, 0x00000a0b },
  1499. { 4, 0x00022020, 0x00001182, 0x00000101, 0x00000a0b },
  1500. { 5, 0x00022020, 0x00001186, 0x00000101, 0x00000a0b },
  1501. { 6, 0x00022020, 0x0000118a, 0x00000101, 0x00000a0b },
  1502. { 7, 0x00022020, 0x0000118e, 0x00000101, 0x00000a0b },
  1503. { 8, 0x00022020, 0x00001192, 0x00000101, 0x00000a0b },
  1504. { 9, 0x00022020, 0x00001196, 0x00000101, 0x00000a0b },
  1505. { 10, 0x00022020, 0x0000119a, 0x00000101, 0x00000a0b },
  1506. { 11, 0x00022020, 0x0000119e, 0x00000101, 0x00000a0b },
  1507. { 12, 0x00022020, 0x000011a2, 0x00000101, 0x00000a0b },
  1508. { 13, 0x00022020, 0x000011a6, 0x00000101, 0x00000a0b },
  1509. { 14, 0x00022020, 0x000011ae, 0x00000101, 0x00000a1b },
  1510. /* 802.11 UNI / HyperLan 2 */
  1511. { 36, 0x00022010, 0x00018896, 0x00000101, 0x00000a1f },
  1512. { 40, 0x00022010, 0x0001889a, 0x00000101, 0x00000a1f },
  1513. { 44, 0x00022010, 0x0001889e, 0x00000101, 0x00000a1f },
  1514. { 48, 0x00022010, 0x000188a2, 0x00000101, 0x00000a1f },
  1515. { 52, 0x00022010, 0x000188a6, 0x00000101, 0x00000a1f },
  1516. { 66, 0x00022010, 0x000188aa, 0x00000101, 0x00000a1f },
  1517. { 60, 0x00022010, 0x000188ae, 0x00000101, 0x00000a1f },
  1518. { 64, 0x00022010, 0x000188b2, 0x00000101, 0x00000a1f },
  1519. /* 802.11 HyperLan 2 */
  1520. { 100, 0x00022010, 0x00008802, 0x00000101, 0x00000a0f },
  1521. { 104, 0x00022010, 0x00008806, 0x00000101, 0x00000a0f },
  1522. { 108, 0x00022010, 0x0000880a, 0x00000101, 0x00000a0f },
  1523. { 112, 0x00022010, 0x0000880e, 0x00000101, 0x00000a0f },
  1524. { 116, 0x00022010, 0x00008812, 0x00000101, 0x00000a0f },
  1525. { 120, 0x00022010, 0x00008816, 0x00000101, 0x00000a0f },
  1526. { 124, 0x00022010, 0x0000881a, 0x00000101, 0x00000a0f },
  1527. { 128, 0x00022010, 0x0000881e, 0x00000101, 0x00000a0f },
  1528. { 132, 0x00022010, 0x00008822, 0x00000101, 0x00000a0f },
  1529. { 136, 0x00022010, 0x00008826, 0x00000101, 0x00000a0f },
  1530. /* 802.11 UNII */
  1531. { 140, 0x00022010, 0x0000882a, 0x00000101, 0x00000a0f },
  1532. { 149, 0x00022020, 0x000090a6, 0x00000101, 0x00000a07 },
  1533. { 153, 0x00022020, 0x000090ae, 0x00000101, 0x00000a07 },
  1534. { 157, 0x00022020, 0x000090b6, 0x00000101, 0x00000a07 },
  1535. { 161, 0x00022020, 0x000090be, 0x00000101, 0x00000a07 },
  1536. };
  1537. static int rt2500usb_probe_hw_mode(struct rt2x00_dev *rt2x00dev)
  1538. {
  1539. struct hw_mode_spec *spec = &rt2x00dev->spec;
  1540. struct channel_info *info;
  1541. char *tx_power;
  1542. unsigned int i;
  1543. /*
  1544. * Initialize all hw fields.
  1545. */
  1546. rt2x00dev->hw->flags =
  1547. IEEE80211_HW_RX_INCLUDES_FCS |
  1548. IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING |
  1549. IEEE80211_HW_SIGNAL_DBM |
  1550. IEEE80211_HW_SUPPORTS_PS |
  1551. IEEE80211_HW_PS_NULLFUNC_STACK;
  1552. rt2x00dev->hw->extra_tx_headroom = TXD_DESC_SIZE;
  1553. SET_IEEE80211_DEV(rt2x00dev->hw, rt2x00dev->dev);
  1554. SET_IEEE80211_PERM_ADDR(rt2x00dev->hw,
  1555. rt2x00_eeprom_addr(rt2x00dev,
  1556. EEPROM_MAC_ADDR_0));
  1557. /*
  1558. * Initialize hw_mode information.
  1559. */
  1560. spec->supported_bands = SUPPORT_BAND_2GHZ;
  1561. spec->supported_rates = SUPPORT_RATE_CCK | SUPPORT_RATE_OFDM;
  1562. if (rt2x00_rf(&rt2x00dev->chip, RF2522)) {
  1563. spec->num_channels = ARRAY_SIZE(rf_vals_bg_2522);
  1564. spec->channels = rf_vals_bg_2522;
  1565. } else if (rt2x00_rf(&rt2x00dev->chip, RF2523)) {
  1566. spec->num_channels = ARRAY_SIZE(rf_vals_bg_2523);
  1567. spec->channels = rf_vals_bg_2523;
  1568. } else if (rt2x00_rf(&rt2x00dev->chip, RF2524)) {
  1569. spec->num_channels = ARRAY_SIZE(rf_vals_bg_2524);
  1570. spec->channels = rf_vals_bg_2524;
  1571. } else if (rt2x00_rf(&rt2x00dev->chip, RF2525)) {
  1572. spec->num_channels = ARRAY_SIZE(rf_vals_bg_2525);
  1573. spec->channels = rf_vals_bg_2525;
  1574. } else if (rt2x00_rf(&rt2x00dev->chip, RF2525E)) {
  1575. spec->num_channels = ARRAY_SIZE(rf_vals_bg_2525e);
  1576. spec->channels = rf_vals_bg_2525e;
  1577. } else if (rt2x00_rf(&rt2x00dev->chip, RF5222)) {
  1578. spec->supported_bands |= SUPPORT_BAND_5GHZ;
  1579. spec->num_channels = ARRAY_SIZE(rf_vals_5222);
  1580. spec->channels = rf_vals_5222;
  1581. }
  1582. /*
  1583. * Create channel information array
  1584. */
  1585. info = kzalloc(spec->num_channels * sizeof(*info), GFP_KERNEL);
  1586. if (!info)
  1587. return -ENOMEM;
  1588. spec->channels_info = info;
  1589. tx_power = rt2x00_eeprom_addr(rt2x00dev, EEPROM_TXPOWER_START);
  1590. for (i = 0; i < 14; i++)
  1591. info[i].tx_power1 = TXPOWER_FROM_DEV(tx_power[i]);
  1592. if (spec->num_channels > 14) {
  1593. for (i = 14; i < spec->num_channels; i++)
  1594. info[i].tx_power1 = DEFAULT_TXPOWER;
  1595. }
  1596. return 0;
  1597. }
  1598. static int rt2500usb_probe_hw(struct rt2x00_dev *rt2x00dev)
  1599. {
  1600. int retval;
  1601. /*
  1602. * Allocate eeprom data.
  1603. */
  1604. retval = rt2500usb_validate_eeprom(rt2x00dev);
  1605. if (retval)
  1606. return retval;
  1607. retval = rt2500usb_init_eeprom(rt2x00dev);
  1608. if (retval)
  1609. return retval;
  1610. /*
  1611. * Initialize hw specifications.
  1612. */
  1613. retval = rt2500usb_probe_hw_mode(rt2x00dev);
  1614. if (retval)
  1615. return retval;
  1616. /*
  1617. * This device requires the atim queue
  1618. */
  1619. __set_bit(DRIVER_REQUIRE_ATIM_QUEUE, &rt2x00dev->flags);
  1620. __set_bit(DRIVER_REQUIRE_BEACON_GUARD, &rt2x00dev->flags);
  1621. if (!modparam_nohwcrypt) {
  1622. __set_bit(CONFIG_SUPPORT_HW_CRYPTO, &rt2x00dev->flags);
  1623. __set_bit(DRIVER_REQUIRE_COPY_IV, &rt2x00dev->flags);
  1624. }
  1625. __set_bit(CONFIG_DISABLE_LINK_TUNING, &rt2x00dev->flags);
  1626. /*
  1627. * Set the rssi offset.
  1628. */
  1629. rt2x00dev->rssi_offset = DEFAULT_RSSI_OFFSET;
  1630. return 0;
  1631. }
  1632. static const struct ieee80211_ops rt2500usb_mac80211_ops = {
  1633. .tx = rt2x00mac_tx,
  1634. .start = rt2x00mac_start,
  1635. .stop = rt2x00mac_stop,
  1636. .add_interface = rt2x00mac_add_interface,
  1637. .remove_interface = rt2x00mac_remove_interface,
  1638. .config = rt2x00mac_config,
  1639. .configure_filter = rt2x00mac_configure_filter,
  1640. .set_tim = rt2x00mac_set_tim,
  1641. .set_key = rt2x00mac_set_key,
  1642. .get_stats = rt2x00mac_get_stats,
  1643. .bss_info_changed = rt2x00mac_bss_info_changed,
  1644. .conf_tx = rt2x00mac_conf_tx,
  1645. .get_tx_stats = rt2x00mac_get_tx_stats,
  1646. .rfkill_poll = rt2x00mac_rfkill_poll,
  1647. };
  1648. static const struct rt2x00lib_ops rt2500usb_rt2x00_ops = {
  1649. .probe_hw = rt2500usb_probe_hw,
  1650. .initialize = rt2x00usb_initialize,
  1651. .uninitialize = rt2x00usb_uninitialize,
  1652. .clear_entry = rt2x00usb_clear_entry,
  1653. .set_device_state = rt2500usb_set_device_state,
  1654. .rfkill_poll = rt2500usb_rfkill_poll,
  1655. .link_stats = rt2500usb_link_stats,
  1656. .reset_tuner = rt2500usb_reset_tuner,
  1657. .link_tuner = rt2500usb_link_tuner,
  1658. .write_tx_desc = rt2500usb_write_tx_desc,
  1659. .write_tx_data = rt2x00usb_write_tx_data,
  1660. .write_beacon = rt2500usb_write_beacon,
  1661. .get_tx_data_len = rt2500usb_get_tx_data_len,
  1662. .kick_tx_queue = rt2500usb_kick_tx_queue,
  1663. .kill_tx_queue = rt2x00usb_kill_tx_queue,
  1664. .fill_rxdone = rt2500usb_fill_rxdone,
  1665. .config_shared_key = rt2500usb_config_key,
  1666. .config_pairwise_key = rt2500usb_config_key,
  1667. .config_filter = rt2500usb_config_filter,
  1668. .config_intf = rt2500usb_config_intf,
  1669. .config_erp = rt2500usb_config_erp,
  1670. .config_ant = rt2500usb_config_ant,
  1671. .config = rt2500usb_config,
  1672. };
  1673. static const struct data_queue_desc rt2500usb_queue_rx = {
  1674. .entry_num = RX_ENTRIES,
  1675. .data_size = DATA_FRAME_SIZE,
  1676. .desc_size = RXD_DESC_SIZE,
  1677. .priv_size = sizeof(struct queue_entry_priv_usb),
  1678. };
  1679. static const struct data_queue_desc rt2500usb_queue_tx = {
  1680. .entry_num = TX_ENTRIES,
  1681. .data_size = DATA_FRAME_SIZE,
  1682. .desc_size = TXD_DESC_SIZE,
  1683. .priv_size = sizeof(struct queue_entry_priv_usb),
  1684. };
  1685. static const struct data_queue_desc rt2500usb_queue_bcn = {
  1686. .entry_num = BEACON_ENTRIES,
  1687. .data_size = MGMT_FRAME_SIZE,
  1688. .desc_size = TXD_DESC_SIZE,
  1689. .priv_size = sizeof(struct queue_entry_priv_usb_bcn),
  1690. };
  1691. static const struct data_queue_desc rt2500usb_queue_atim = {
  1692. .entry_num = ATIM_ENTRIES,
  1693. .data_size = DATA_FRAME_SIZE,
  1694. .desc_size = TXD_DESC_SIZE,
  1695. .priv_size = sizeof(struct queue_entry_priv_usb),
  1696. };
  1697. static const struct rt2x00_ops rt2500usb_ops = {
  1698. .name = KBUILD_MODNAME,
  1699. .max_sta_intf = 1,
  1700. .max_ap_intf = 1,
  1701. .eeprom_size = EEPROM_SIZE,
  1702. .rf_size = RF_SIZE,
  1703. .tx_queues = NUM_TX_QUEUES,
  1704. .rx = &rt2500usb_queue_rx,
  1705. .tx = &rt2500usb_queue_tx,
  1706. .bcn = &rt2500usb_queue_bcn,
  1707. .atim = &rt2500usb_queue_atim,
  1708. .lib = &rt2500usb_rt2x00_ops,
  1709. .hw = &rt2500usb_mac80211_ops,
  1710. #ifdef CONFIG_RT2X00_LIB_DEBUGFS
  1711. .debugfs = &rt2500usb_rt2x00debug,
  1712. #endif /* CONFIG_RT2X00_LIB_DEBUGFS */
  1713. };
  1714. /*
  1715. * rt2500usb module information.
  1716. */
  1717. static struct usb_device_id rt2500usb_device_table[] = {
  1718. /* ASUS */
  1719. { USB_DEVICE(0x0b05, 0x1706), USB_DEVICE_DATA(&rt2500usb_ops) },
  1720. { USB_DEVICE(0x0b05, 0x1707), USB_DEVICE_DATA(&rt2500usb_ops) },
  1721. /* Belkin */
  1722. { USB_DEVICE(0x050d, 0x7050), USB_DEVICE_DATA(&rt2500usb_ops) },
  1723. { USB_DEVICE(0x050d, 0x7051), USB_DEVICE_DATA(&rt2500usb_ops) },
  1724. { USB_DEVICE(0x050d, 0x705a), USB_DEVICE_DATA(&rt2500usb_ops) },
  1725. /* Cisco Systems */
  1726. { USB_DEVICE(0x13b1, 0x000d), USB_DEVICE_DATA(&rt2500usb_ops) },
  1727. { USB_DEVICE(0x13b1, 0x0011), USB_DEVICE_DATA(&rt2500usb_ops) },
  1728. { USB_DEVICE(0x13b1, 0x001a), USB_DEVICE_DATA(&rt2500usb_ops) },
  1729. /* CNet */
  1730. { USB_DEVICE(0x1371, 0x9022), USB_DEVICE_DATA(&rt2500usb_ops) },
  1731. /* Conceptronic */
  1732. { USB_DEVICE(0x14b2, 0x3c02), USB_DEVICE_DATA(&rt2500usb_ops) },
  1733. /* D-LINK */
  1734. { USB_DEVICE(0x2001, 0x3c00), USB_DEVICE_DATA(&rt2500usb_ops) },
  1735. /* Gigabyte */
  1736. { USB_DEVICE(0x1044, 0x8001), USB_DEVICE_DATA(&rt2500usb_ops) },
  1737. { USB_DEVICE(0x1044, 0x8007), USB_DEVICE_DATA(&rt2500usb_ops) },
  1738. /* Hercules */
  1739. { USB_DEVICE(0x06f8, 0xe000), USB_DEVICE_DATA(&rt2500usb_ops) },
  1740. /* Melco */
  1741. { USB_DEVICE(0x0411, 0x005e), USB_DEVICE_DATA(&rt2500usb_ops) },
  1742. { USB_DEVICE(0x0411, 0x0066), USB_DEVICE_DATA(&rt2500usb_ops) },
  1743. { USB_DEVICE(0x0411, 0x0067), USB_DEVICE_DATA(&rt2500usb_ops) },
  1744. { USB_DEVICE(0x0411, 0x008b), USB_DEVICE_DATA(&rt2500usb_ops) },
  1745. { USB_DEVICE(0x0411, 0x0097), USB_DEVICE_DATA(&rt2500usb_ops) },
  1746. /* MSI */
  1747. { USB_DEVICE(0x0db0, 0x6861), USB_DEVICE_DATA(&rt2500usb_ops) },
  1748. { USB_DEVICE(0x0db0, 0x6865), USB_DEVICE_DATA(&rt2500usb_ops) },
  1749. { USB_DEVICE(0x0db0, 0x6869), USB_DEVICE_DATA(&rt2500usb_ops) },
  1750. /* Ralink */
  1751. { USB_DEVICE(0x148f, 0x1706), USB_DEVICE_DATA(&rt2500usb_ops) },
  1752. { USB_DEVICE(0x148f, 0x2570), USB_DEVICE_DATA(&rt2500usb_ops) },
  1753. { USB_DEVICE(0x148f, 0x2573), USB_DEVICE_DATA(&rt2500usb_ops) },
  1754. { USB_DEVICE(0x148f, 0x9020), USB_DEVICE_DATA(&rt2500usb_ops) },
  1755. /* Sagem */
  1756. { USB_DEVICE(0x079b, 0x004b), USB_DEVICE_DATA(&rt2500usb_ops) },
  1757. /* Siemens */
  1758. { USB_DEVICE(0x0681, 0x3c06), USB_DEVICE_DATA(&rt2500usb_ops) },
  1759. /* SMC */
  1760. { USB_DEVICE(0x0707, 0xee13), USB_DEVICE_DATA(&rt2500usb_ops) },
  1761. /* Spairon */
  1762. { USB_DEVICE(0x114b, 0x0110), USB_DEVICE_DATA(&rt2500usb_ops) },
  1763. /* SURECOM */
  1764. { USB_DEVICE(0x0769, 0x11f3), USB_DEVICE_DATA(&rt2500usb_ops) },
  1765. /* Trust */
  1766. { USB_DEVICE(0x0eb0, 0x9020), USB_DEVICE_DATA(&rt2500usb_ops) },
  1767. /* VTech */
  1768. { USB_DEVICE(0x0f88, 0x3012), USB_DEVICE_DATA(&rt2500usb_ops) },
  1769. /* Zinwell */
  1770. { USB_DEVICE(0x5a57, 0x0260), USB_DEVICE_DATA(&rt2500usb_ops) },
  1771. { 0, }
  1772. };
  1773. MODULE_AUTHOR(DRV_PROJECT);
  1774. MODULE_VERSION(DRV_VERSION);
  1775. MODULE_DESCRIPTION("Ralink RT2500 USB Wireless LAN driver.");
  1776. MODULE_SUPPORTED_DEVICE("Ralink RT2570 USB chipset based cards");
  1777. MODULE_DEVICE_TABLE(usb, rt2500usb_device_table);
  1778. MODULE_LICENSE("GPL");
  1779. static struct usb_driver rt2500usb_driver = {
  1780. .name = KBUILD_MODNAME,
  1781. .id_table = rt2500usb_device_table,
  1782. .probe = rt2x00usb_probe,
  1783. .disconnect = rt2x00usb_disconnect,
  1784. .suspend = rt2x00usb_suspend,
  1785. .resume = rt2x00usb_resume,
  1786. };
  1787. static int __init rt2500usb_init(void)
  1788. {
  1789. return usb_register(&rt2500usb_driver);
  1790. }
  1791. static void __exit rt2500usb_exit(void)
  1792. {
  1793. usb_deregister(&rt2500usb_driver);
  1794. }
  1795. module_init(rt2500usb_init);
  1796. module_exit(rt2500usb_exit);