iwl3945-base.c 118 KB

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  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2003 - 2009 Intel Corporation. All rights reserved.
  4. *
  5. * Portions of this file are derived from the ipw3945 project, as well
  6. * as portions of the ieee80211 subsystem header files.
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms of version 2 of the GNU General Public License as
  10. * published by the Free Software Foundation.
  11. *
  12. * This program is distributed in the hope that it will be useful, but WITHOUT
  13. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  15. * more details.
  16. *
  17. * You should have received a copy of the GNU General Public License along with
  18. * this program; if not, write to the Free Software Foundation, Inc.,
  19. * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  20. *
  21. * The full GNU General Public License is included in this distribution in the
  22. * file called LICENSE.
  23. *
  24. * Contact Information:
  25. * Intel Linux Wireless <ilw@linux.intel.com>
  26. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27. *
  28. *****************************************************************************/
  29. #include <linux/kernel.h>
  30. #include <linux/module.h>
  31. #include <linux/init.h>
  32. #include <linux/pci.h>
  33. #include <linux/dma-mapping.h>
  34. #include <linux/delay.h>
  35. #include <linux/sched.h>
  36. #include <linux/skbuff.h>
  37. #include <linux/netdevice.h>
  38. #include <linux/wireless.h>
  39. #include <linux/firmware.h>
  40. #include <linux/etherdevice.h>
  41. #include <linux/if_arp.h>
  42. #include <net/ieee80211_radiotap.h>
  43. #include <net/lib80211.h>
  44. #include <net/mac80211.h>
  45. #include <asm/div64.h>
  46. #define DRV_NAME "iwl3945"
  47. #include "iwl-fh.h"
  48. #include "iwl-3945-fh.h"
  49. #include "iwl-commands.h"
  50. #include "iwl-sta.h"
  51. #include "iwl-3945.h"
  52. #include "iwl-helpers.h"
  53. #include "iwl-core.h"
  54. #include "iwl-dev.h"
  55. /*
  56. * module name, copyright, version, etc.
  57. */
  58. #define DRV_DESCRIPTION \
  59. "Intel(R) PRO/Wireless 3945ABG/BG Network Connection driver for Linux"
  60. #ifdef CONFIG_IWLWIFI_DEBUG
  61. #define VD "d"
  62. #else
  63. #define VD
  64. #endif
  65. #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
  66. #define VS "s"
  67. #else
  68. #define VS
  69. #endif
  70. #define IWL39_VERSION "1.2.26k" VD VS
  71. #define DRV_COPYRIGHT "Copyright(c) 2003-2009 Intel Corporation"
  72. #define DRV_AUTHOR "<ilw@linux.intel.com>"
  73. #define DRV_VERSION IWL39_VERSION
  74. MODULE_DESCRIPTION(DRV_DESCRIPTION);
  75. MODULE_VERSION(DRV_VERSION);
  76. MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
  77. MODULE_LICENSE("GPL");
  78. /* module parameters */
  79. struct iwl_mod_params iwl3945_mod_params = {
  80. .num_of_queues = IWL39_NUM_QUEUES, /* Not used */
  81. .sw_crypto = 1,
  82. .restart_fw = 1,
  83. /* the rest are 0 by default */
  84. };
  85. /**
  86. * iwl3945_get_antenna_flags - Get antenna flags for RXON command
  87. * @priv: eeprom and antenna fields are used to determine antenna flags
  88. *
  89. * priv->eeprom39 is used to determine if antenna AUX/MAIN are reversed
  90. * iwl3945_mod_params.antenna specifies the antenna diversity mode:
  91. *
  92. * IWL_ANTENNA_DIVERSITY - NIC selects best antenna by itself
  93. * IWL_ANTENNA_MAIN - Force MAIN antenna
  94. * IWL_ANTENNA_AUX - Force AUX antenna
  95. */
  96. __le32 iwl3945_get_antenna_flags(const struct iwl_priv *priv)
  97. {
  98. struct iwl3945_eeprom *eeprom = (struct iwl3945_eeprom *)priv->eeprom;
  99. switch (iwl3945_mod_params.antenna) {
  100. case IWL_ANTENNA_DIVERSITY:
  101. return 0;
  102. case IWL_ANTENNA_MAIN:
  103. if (eeprom->antenna_switch_type)
  104. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
  105. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
  106. case IWL_ANTENNA_AUX:
  107. if (eeprom->antenna_switch_type)
  108. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
  109. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
  110. }
  111. /* bad antenna selector value */
  112. IWL_ERR(priv, "Bad antenna selector value (0x%x)\n",
  113. iwl3945_mod_params.antenna);
  114. return 0; /* "diversity" is default if error */
  115. }
  116. static int iwl3945_set_ccmp_dynamic_key_info(struct iwl_priv *priv,
  117. struct ieee80211_key_conf *keyconf,
  118. u8 sta_id)
  119. {
  120. unsigned long flags;
  121. __le16 key_flags = 0;
  122. int ret;
  123. key_flags |= (STA_KEY_FLG_CCMP | STA_KEY_FLG_MAP_KEY_MSK);
  124. key_flags |= cpu_to_le16(keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
  125. if (sta_id == priv->hw_params.bcast_sta_id)
  126. key_flags |= STA_KEY_MULTICAST_MSK;
  127. keyconf->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
  128. keyconf->hw_key_idx = keyconf->keyidx;
  129. key_flags &= ~STA_KEY_FLG_INVALID;
  130. spin_lock_irqsave(&priv->sta_lock, flags);
  131. priv->stations[sta_id].keyinfo.alg = keyconf->alg;
  132. priv->stations[sta_id].keyinfo.keylen = keyconf->keylen;
  133. memcpy(priv->stations[sta_id].keyinfo.key, keyconf->key,
  134. keyconf->keylen);
  135. memcpy(priv->stations[sta_id].sta.key.key, keyconf->key,
  136. keyconf->keylen);
  137. if ((priv->stations[sta_id].sta.key.key_flags & STA_KEY_FLG_ENCRYPT_MSK)
  138. == STA_KEY_FLG_NO_ENC)
  139. priv->stations[sta_id].sta.key.key_offset =
  140. iwl_get_free_ucode_key_index(priv);
  141. /* else, we are overriding an existing key => no need to allocated room
  142. * in uCode. */
  143. WARN(priv->stations[sta_id].sta.key.key_offset == WEP_INVALID_OFFSET,
  144. "no space for a new key");
  145. priv->stations[sta_id].sta.key.key_flags = key_flags;
  146. priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  147. priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  148. IWL_DEBUG_INFO(priv, "hwcrypto: modify ucode station key info\n");
  149. ret = iwl_send_add_sta(priv, &priv->stations[sta_id].sta, CMD_ASYNC);
  150. spin_unlock_irqrestore(&priv->sta_lock, flags);
  151. return ret;
  152. }
  153. static int iwl3945_set_tkip_dynamic_key_info(struct iwl_priv *priv,
  154. struct ieee80211_key_conf *keyconf,
  155. u8 sta_id)
  156. {
  157. return -EOPNOTSUPP;
  158. }
  159. static int iwl3945_set_wep_dynamic_key_info(struct iwl_priv *priv,
  160. struct ieee80211_key_conf *keyconf,
  161. u8 sta_id)
  162. {
  163. return -EOPNOTSUPP;
  164. }
  165. static int iwl3945_clear_sta_key_info(struct iwl_priv *priv, u8 sta_id)
  166. {
  167. unsigned long flags;
  168. spin_lock_irqsave(&priv->sta_lock, flags);
  169. memset(&priv->stations[sta_id].keyinfo, 0, sizeof(struct iwl_hw_key));
  170. memset(&priv->stations[sta_id].sta.key, 0,
  171. sizeof(struct iwl4965_keyinfo));
  172. priv->stations[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
  173. priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  174. priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  175. spin_unlock_irqrestore(&priv->sta_lock, flags);
  176. IWL_DEBUG_INFO(priv, "hwcrypto: clear ucode station key info\n");
  177. iwl_send_add_sta(priv, &priv->stations[sta_id].sta, 0);
  178. return 0;
  179. }
  180. static int iwl3945_set_dynamic_key(struct iwl_priv *priv,
  181. struct ieee80211_key_conf *keyconf, u8 sta_id)
  182. {
  183. int ret = 0;
  184. keyconf->hw_key_idx = HW_KEY_DYNAMIC;
  185. switch (keyconf->alg) {
  186. case ALG_CCMP:
  187. ret = iwl3945_set_ccmp_dynamic_key_info(priv, keyconf, sta_id);
  188. break;
  189. case ALG_TKIP:
  190. ret = iwl3945_set_tkip_dynamic_key_info(priv, keyconf, sta_id);
  191. break;
  192. case ALG_WEP:
  193. ret = iwl3945_set_wep_dynamic_key_info(priv, keyconf, sta_id);
  194. break;
  195. default:
  196. IWL_ERR(priv, "Unknown alg: %s alg = %d\n", __func__, keyconf->alg);
  197. ret = -EINVAL;
  198. }
  199. IWL_DEBUG_WEP(priv, "Set dynamic key: alg= %d len=%d idx=%d sta=%d ret=%d\n",
  200. keyconf->alg, keyconf->keylen, keyconf->keyidx,
  201. sta_id, ret);
  202. return ret;
  203. }
  204. static int iwl3945_remove_static_key(struct iwl_priv *priv)
  205. {
  206. int ret = -EOPNOTSUPP;
  207. return ret;
  208. }
  209. static int iwl3945_set_static_key(struct iwl_priv *priv,
  210. struct ieee80211_key_conf *key)
  211. {
  212. if (key->alg == ALG_WEP)
  213. return -EOPNOTSUPP;
  214. IWL_ERR(priv, "Static key invalid: alg %d\n", key->alg);
  215. return -EINVAL;
  216. }
  217. static void iwl3945_clear_free_frames(struct iwl_priv *priv)
  218. {
  219. struct list_head *element;
  220. IWL_DEBUG_INFO(priv, "%d frames on pre-allocated heap on clear.\n",
  221. priv->frames_count);
  222. while (!list_empty(&priv->free_frames)) {
  223. element = priv->free_frames.next;
  224. list_del(element);
  225. kfree(list_entry(element, struct iwl3945_frame, list));
  226. priv->frames_count--;
  227. }
  228. if (priv->frames_count) {
  229. IWL_WARN(priv, "%d frames still in use. Did we lose one?\n",
  230. priv->frames_count);
  231. priv->frames_count = 0;
  232. }
  233. }
  234. static struct iwl3945_frame *iwl3945_get_free_frame(struct iwl_priv *priv)
  235. {
  236. struct iwl3945_frame *frame;
  237. struct list_head *element;
  238. if (list_empty(&priv->free_frames)) {
  239. frame = kzalloc(sizeof(*frame), GFP_KERNEL);
  240. if (!frame) {
  241. IWL_ERR(priv, "Could not allocate frame!\n");
  242. return NULL;
  243. }
  244. priv->frames_count++;
  245. return frame;
  246. }
  247. element = priv->free_frames.next;
  248. list_del(element);
  249. return list_entry(element, struct iwl3945_frame, list);
  250. }
  251. static void iwl3945_free_frame(struct iwl_priv *priv, struct iwl3945_frame *frame)
  252. {
  253. memset(frame, 0, sizeof(*frame));
  254. list_add(&frame->list, &priv->free_frames);
  255. }
  256. unsigned int iwl3945_fill_beacon_frame(struct iwl_priv *priv,
  257. struct ieee80211_hdr *hdr,
  258. int left)
  259. {
  260. if (!iwl_is_associated(priv) || !priv->ibss_beacon ||
  261. ((priv->iw_mode != NL80211_IFTYPE_ADHOC) &&
  262. (priv->iw_mode != NL80211_IFTYPE_AP)))
  263. return 0;
  264. if (priv->ibss_beacon->len > left)
  265. return 0;
  266. memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
  267. return priv->ibss_beacon->len;
  268. }
  269. static int iwl3945_send_beacon_cmd(struct iwl_priv *priv)
  270. {
  271. struct iwl3945_frame *frame;
  272. unsigned int frame_size;
  273. int rc;
  274. u8 rate;
  275. frame = iwl3945_get_free_frame(priv);
  276. if (!frame) {
  277. IWL_ERR(priv, "Could not obtain free frame buffer for beacon "
  278. "command.\n");
  279. return -ENOMEM;
  280. }
  281. rate = iwl_rate_get_lowest_plcp(priv);
  282. frame_size = iwl3945_hw_get_beacon_cmd(priv, frame, rate);
  283. rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
  284. &frame->u.cmd[0]);
  285. iwl3945_free_frame(priv, frame);
  286. return rc;
  287. }
  288. static void iwl3945_unset_hw_params(struct iwl_priv *priv)
  289. {
  290. if (priv->shared_virt)
  291. pci_free_consistent(priv->pci_dev,
  292. sizeof(struct iwl3945_shared),
  293. priv->shared_virt,
  294. priv->shared_phys);
  295. }
  296. static void iwl3945_build_tx_cmd_hwcrypto(struct iwl_priv *priv,
  297. struct ieee80211_tx_info *info,
  298. struct iwl_device_cmd *cmd,
  299. struct sk_buff *skb_frag,
  300. int sta_id)
  301. {
  302. struct iwl3945_tx_cmd *tx = (struct iwl3945_tx_cmd *)cmd->cmd.payload;
  303. struct iwl_hw_key *keyinfo = &priv->stations[sta_id].keyinfo;
  304. switch (keyinfo->alg) {
  305. case ALG_CCMP:
  306. tx->sec_ctl = TX_CMD_SEC_CCM;
  307. memcpy(tx->key, keyinfo->key, keyinfo->keylen);
  308. IWL_DEBUG_TX(priv, "tx_cmd with AES hwcrypto\n");
  309. break;
  310. case ALG_TKIP:
  311. break;
  312. case ALG_WEP:
  313. tx->sec_ctl = TX_CMD_SEC_WEP |
  314. (info->control.hw_key->hw_key_idx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT;
  315. if (keyinfo->keylen == 13)
  316. tx->sec_ctl |= TX_CMD_SEC_KEY128;
  317. memcpy(&tx->key[3], keyinfo->key, keyinfo->keylen);
  318. IWL_DEBUG_TX(priv, "Configuring packet for WEP encryption "
  319. "with key %d\n", info->control.hw_key->hw_key_idx);
  320. break;
  321. default:
  322. IWL_ERR(priv, "Unknown encode alg %d\n", keyinfo->alg);
  323. break;
  324. }
  325. }
  326. /*
  327. * handle build REPLY_TX command notification.
  328. */
  329. static void iwl3945_build_tx_cmd_basic(struct iwl_priv *priv,
  330. struct iwl_device_cmd *cmd,
  331. struct ieee80211_tx_info *info,
  332. struct ieee80211_hdr *hdr, u8 std_id)
  333. {
  334. struct iwl3945_tx_cmd *tx = (struct iwl3945_tx_cmd *)cmd->cmd.payload;
  335. __le32 tx_flags = tx->tx_flags;
  336. __le16 fc = hdr->frame_control;
  337. u8 rc_flags = info->control.rates[0].flags;
  338. tx->stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  339. if (!(info->flags & IEEE80211_TX_CTL_NO_ACK)) {
  340. tx_flags |= TX_CMD_FLG_ACK_MSK;
  341. if (ieee80211_is_mgmt(fc))
  342. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  343. if (ieee80211_is_probe_resp(fc) &&
  344. !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
  345. tx_flags |= TX_CMD_FLG_TSF_MSK;
  346. } else {
  347. tx_flags &= (~TX_CMD_FLG_ACK_MSK);
  348. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  349. }
  350. tx->sta_id = std_id;
  351. if (ieee80211_has_morefrags(fc))
  352. tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
  353. if (ieee80211_is_data_qos(fc)) {
  354. u8 *qc = ieee80211_get_qos_ctl(hdr);
  355. tx->tid_tspec = qc[0] & 0xf;
  356. tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
  357. } else {
  358. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  359. }
  360. if (rc_flags & IEEE80211_TX_RC_USE_RTS_CTS) {
  361. tx_flags |= TX_CMD_FLG_RTS_MSK;
  362. tx_flags &= ~TX_CMD_FLG_CTS_MSK;
  363. } else if (rc_flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {
  364. tx_flags &= ~TX_CMD_FLG_RTS_MSK;
  365. tx_flags |= TX_CMD_FLG_CTS_MSK;
  366. }
  367. if ((tx_flags & TX_CMD_FLG_RTS_MSK) || (tx_flags & TX_CMD_FLG_CTS_MSK))
  368. tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
  369. tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
  370. if (ieee80211_is_mgmt(fc)) {
  371. if (ieee80211_is_assoc_req(fc) || ieee80211_is_reassoc_req(fc))
  372. tx->timeout.pm_frame_timeout = cpu_to_le16(3);
  373. else
  374. tx->timeout.pm_frame_timeout = cpu_to_le16(2);
  375. } else {
  376. tx->timeout.pm_frame_timeout = 0;
  377. #ifdef CONFIG_IWLWIFI_LEDS
  378. priv->rxtxpackets += le16_to_cpu(cmd->cmd.tx.len);
  379. #endif
  380. }
  381. tx->driver_txop = 0;
  382. tx->tx_flags = tx_flags;
  383. tx->next_frame_len = 0;
  384. }
  385. /*
  386. * start REPLY_TX command process
  387. */
  388. static int iwl3945_tx_skb(struct iwl_priv *priv, struct sk_buff *skb)
  389. {
  390. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  391. struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
  392. struct iwl3945_tx_cmd *tx;
  393. struct iwl_tx_queue *txq = NULL;
  394. struct iwl_queue *q = NULL;
  395. struct iwl_device_cmd *out_cmd;
  396. struct iwl_cmd_meta *out_meta;
  397. dma_addr_t phys_addr;
  398. dma_addr_t txcmd_phys;
  399. int txq_id = skb_get_queue_mapping(skb);
  400. u16 len, idx, len_org, hdr_len; /* TODO: len_org is not used */
  401. u8 id;
  402. u8 unicast;
  403. u8 sta_id;
  404. u8 tid = 0;
  405. u16 seq_number = 0;
  406. __le16 fc;
  407. u8 wait_write_ptr = 0;
  408. u8 *qc = NULL;
  409. unsigned long flags;
  410. int rc;
  411. spin_lock_irqsave(&priv->lock, flags);
  412. if (iwl_is_rfkill(priv)) {
  413. IWL_DEBUG_DROP(priv, "Dropping - RF KILL\n");
  414. goto drop_unlock;
  415. }
  416. if ((ieee80211_get_tx_rate(priv->hw, info)->hw_value & 0xFF) == IWL_INVALID_RATE) {
  417. IWL_ERR(priv, "ERROR: No TX rate available.\n");
  418. goto drop_unlock;
  419. }
  420. unicast = !is_multicast_ether_addr(hdr->addr1);
  421. id = 0;
  422. fc = hdr->frame_control;
  423. #ifdef CONFIG_IWLWIFI_DEBUG
  424. if (ieee80211_is_auth(fc))
  425. IWL_DEBUG_TX(priv, "Sending AUTH frame\n");
  426. else if (ieee80211_is_assoc_req(fc))
  427. IWL_DEBUG_TX(priv, "Sending ASSOC frame\n");
  428. else if (ieee80211_is_reassoc_req(fc))
  429. IWL_DEBUG_TX(priv, "Sending REASSOC frame\n");
  430. #endif
  431. /* drop all non-injected data frame if we are not associated */
  432. if (ieee80211_is_data(fc) &&
  433. !(info->flags & IEEE80211_TX_CTL_INJECTED) &&
  434. (!iwl_is_associated(priv) ||
  435. ((priv->iw_mode == NL80211_IFTYPE_STATION) && !priv->assoc_id))) {
  436. IWL_DEBUG_DROP(priv, "Dropping - !iwl_is_associated\n");
  437. goto drop_unlock;
  438. }
  439. spin_unlock_irqrestore(&priv->lock, flags);
  440. hdr_len = ieee80211_hdrlen(fc);
  441. /* Find (or create) index into station table for destination station */
  442. if (info->flags & IEEE80211_TX_CTL_INJECTED)
  443. sta_id = priv->hw_params.bcast_sta_id;
  444. else
  445. sta_id = iwl_get_sta_id(priv, hdr);
  446. if (sta_id == IWL_INVALID_STATION) {
  447. IWL_DEBUG_DROP(priv, "Dropping - INVALID STATION: %pM\n",
  448. hdr->addr1);
  449. goto drop;
  450. }
  451. IWL_DEBUG_RATE(priv, "station Id %d\n", sta_id);
  452. if (ieee80211_is_data_qos(fc)) {
  453. qc = ieee80211_get_qos_ctl(hdr);
  454. tid = qc[0] & IEEE80211_QOS_CTL_TID_MASK;
  455. if (unlikely(tid >= MAX_TID_COUNT))
  456. goto drop;
  457. seq_number = priv->stations[sta_id].tid[tid].seq_number &
  458. IEEE80211_SCTL_SEQ;
  459. hdr->seq_ctrl = cpu_to_le16(seq_number) |
  460. (hdr->seq_ctrl &
  461. cpu_to_le16(IEEE80211_SCTL_FRAG));
  462. seq_number += 0x10;
  463. }
  464. /* Descriptor for chosen Tx queue */
  465. txq = &priv->txq[txq_id];
  466. q = &txq->q;
  467. spin_lock_irqsave(&priv->lock, flags);
  468. idx = get_cmd_index(q, q->write_ptr, 0);
  469. /* Set up driver data for this TFD */
  470. memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl_tx_info));
  471. txq->txb[q->write_ptr].skb[0] = skb;
  472. /* Init first empty entry in queue's array of Tx/cmd buffers */
  473. out_cmd = txq->cmd[idx];
  474. out_meta = &txq->meta[idx];
  475. tx = (struct iwl3945_tx_cmd *)out_cmd->cmd.payload;
  476. memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
  477. memset(tx, 0, sizeof(*tx));
  478. /*
  479. * Set up the Tx-command (not MAC!) header.
  480. * Store the chosen Tx queue and TFD index within the sequence field;
  481. * after Tx, uCode's Tx response will return this value so driver can
  482. * locate the frame within the tx queue and do post-tx processing.
  483. */
  484. out_cmd->hdr.cmd = REPLY_TX;
  485. out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
  486. INDEX_TO_SEQ(q->write_ptr)));
  487. /* Copy MAC header from skb into command buffer */
  488. memcpy(tx->hdr, hdr, hdr_len);
  489. if (info->control.hw_key)
  490. iwl3945_build_tx_cmd_hwcrypto(priv, info, out_cmd, skb, sta_id);
  491. /* TODO need this for burst mode later on */
  492. iwl3945_build_tx_cmd_basic(priv, out_cmd, info, hdr, sta_id);
  493. /* set is_hcca to 0; it probably will never be implemented */
  494. iwl3945_hw_build_tx_cmd_rate(priv, out_cmd, info, hdr, sta_id, 0);
  495. /* Total # bytes to be transmitted */
  496. len = (u16)skb->len;
  497. tx->len = cpu_to_le16(len);
  498. iwl_dbg_log_tx_data_frame(priv, len, hdr);
  499. iwl_update_stats(priv, true, fc, len);
  500. tx->tx_flags &= ~TX_CMD_FLG_ANT_A_MSK;
  501. tx->tx_flags &= ~TX_CMD_FLG_ANT_B_MSK;
  502. if (!ieee80211_has_morefrags(hdr->frame_control)) {
  503. txq->need_update = 1;
  504. if (qc)
  505. priv->stations[sta_id].tid[tid].seq_number = seq_number;
  506. } else {
  507. wait_write_ptr = 1;
  508. txq->need_update = 0;
  509. }
  510. IWL_DEBUG_TX(priv, "sequence nr = 0X%x \n",
  511. le16_to_cpu(out_cmd->hdr.sequence));
  512. IWL_DEBUG_TX(priv, "tx_flags = 0X%x \n", le32_to_cpu(tx->tx_flags));
  513. iwl_print_hex_dump(priv, IWL_DL_TX, tx, sizeof(*tx));
  514. iwl_print_hex_dump(priv, IWL_DL_TX, (u8 *)tx->hdr,
  515. ieee80211_hdrlen(fc));
  516. /*
  517. * Use the first empty entry in this queue's command buffer array
  518. * to contain the Tx command and MAC header concatenated together
  519. * (payload data will be in another buffer).
  520. * Size of this varies, due to varying MAC header length.
  521. * If end is not dword aligned, we'll have 2 extra bytes at the end
  522. * of the MAC header (device reads on dword boundaries).
  523. * We'll tell device about this padding later.
  524. */
  525. len = sizeof(struct iwl3945_tx_cmd) +
  526. sizeof(struct iwl_cmd_header) + hdr_len;
  527. len_org = len;
  528. len = (len + 3) & ~3;
  529. if (len_org != len)
  530. len_org = 1;
  531. else
  532. len_org = 0;
  533. /* Physical address of this Tx command's header (not MAC header!),
  534. * within command buffer array. */
  535. txcmd_phys = pci_map_single(priv->pci_dev, &out_cmd->hdr,
  536. len, PCI_DMA_TODEVICE);
  537. /* we do not map meta data ... so we can safely access address to
  538. * provide to unmap command*/
  539. pci_unmap_addr_set(out_meta, mapping, txcmd_phys);
  540. pci_unmap_len_set(out_meta, len, len);
  541. /* Add buffer containing Tx command and MAC(!) header to TFD's
  542. * first entry */
  543. priv->cfg->ops->lib->txq_attach_buf_to_tfd(priv, txq,
  544. txcmd_phys, len, 1, 0);
  545. /* Set up TFD's 2nd entry to point directly to remainder of skb,
  546. * if any (802.11 null frames have no payload). */
  547. len = skb->len - hdr_len;
  548. if (len) {
  549. phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len,
  550. len, PCI_DMA_TODEVICE);
  551. priv->cfg->ops->lib->txq_attach_buf_to_tfd(priv, txq,
  552. phys_addr, len,
  553. 0, U32_PAD(len));
  554. }
  555. /* Tell device the write index *just past* this latest filled TFD */
  556. q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
  557. rc = iwl_txq_update_write_ptr(priv, txq);
  558. spin_unlock_irqrestore(&priv->lock, flags);
  559. if (rc)
  560. return rc;
  561. if ((iwl_queue_space(q) < q->high_mark)
  562. && priv->mac80211_registered) {
  563. if (wait_write_ptr) {
  564. spin_lock_irqsave(&priv->lock, flags);
  565. txq->need_update = 1;
  566. iwl_txq_update_write_ptr(priv, txq);
  567. spin_unlock_irqrestore(&priv->lock, flags);
  568. }
  569. iwl_stop_queue(priv, skb_get_queue_mapping(skb));
  570. }
  571. return 0;
  572. drop_unlock:
  573. spin_unlock_irqrestore(&priv->lock, flags);
  574. drop:
  575. return -1;
  576. }
  577. #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
  578. #include "iwl-spectrum.h"
  579. #define BEACON_TIME_MASK_LOW 0x00FFFFFF
  580. #define BEACON_TIME_MASK_HIGH 0xFF000000
  581. #define TIME_UNIT 1024
  582. /*
  583. * extended beacon time format
  584. * time in usec will be changed into a 32-bit value in 8:24 format
  585. * the high 1 byte is the beacon counts
  586. * the lower 3 bytes is the time in usec within one beacon interval
  587. */
  588. static u32 iwl3945_usecs_to_beacons(u32 usec, u32 beacon_interval)
  589. {
  590. u32 quot;
  591. u32 rem;
  592. u32 interval = beacon_interval * 1024;
  593. if (!interval || !usec)
  594. return 0;
  595. quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24);
  596. rem = (usec % interval) & BEACON_TIME_MASK_LOW;
  597. return (quot << 24) + rem;
  598. }
  599. /* base is usually what we get from ucode with each received frame,
  600. * the same as HW timer counter counting down
  601. */
  602. static __le32 iwl3945_add_beacon_time(u32 base, u32 addon, u32 beacon_interval)
  603. {
  604. u32 base_low = base & BEACON_TIME_MASK_LOW;
  605. u32 addon_low = addon & BEACON_TIME_MASK_LOW;
  606. u32 interval = beacon_interval * TIME_UNIT;
  607. u32 res = (base & BEACON_TIME_MASK_HIGH) +
  608. (addon & BEACON_TIME_MASK_HIGH);
  609. if (base_low > addon_low)
  610. res += base_low - addon_low;
  611. else if (base_low < addon_low) {
  612. res += interval + base_low - addon_low;
  613. res += (1 << 24);
  614. } else
  615. res += (1 << 24);
  616. return cpu_to_le32(res);
  617. }
  618. static int iwl3945_get_measurement(struct iwl_priv *priv,
  619. struct ieee80211_measurement_params *params,
  620. u8 type)
  621. {
  622. struct iwl_spectrum_cmd spectrum;
  623. struct iwl_rx_packet *res;
  624. struct iwl_host_cmd cmd = {
  625. .id = REPLY_SPECTRUM_MEASUREMENT_CMD,
  626. .data = (void *)&spectrum,
  627. .flags = CMD_WANT_SKB,
  628. };
  629. u32 add_time = le64_to_cpu(params->start_time);
  630. int rc;
  631. int spectrum_resp_status;
  632. int duration = le16_to_cpu(params->duration);
  633. if (iwl_is_associated(priv))
  634. add_time =
  635. iwl3945_usecs_to_beacons(
  636. le64_to_cpu(params->start_time) - priv->last_tsf,
  637. le16_to_cpu(priv->rxon_timing.beacon_interval));
  638. memset(&spectrum, 0, sizeof(spectrum));
  639. spectrum.channel_count = cpu_to_le16(1);
  640. spectrum.flags =
  641. RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
  642. spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
  643. cmd.len = sizeof(spectrum);
  644. spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
  645. if (iwl_is_associated(priv))
  646. spectrum.start_time =
  647. iwl3945_add_beacon_time(priv->last_beacon_time,
  648. add_time,
  649. le16_to_cpu(priv->rxon_timing.beacon_interval));
  650. else
  651. spectrum.start_time = 0;
  652. spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
  653. spectrum.channels[0].channel = params->channel;
  654. spectrum.channels[0].type = type;
  655. if (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK)
  656. spectrum.flags |= RXON_FLG_BAND_24G_MSK |
  657. RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK;
  658. rc = iwl_send_cmd_sync(priv, &cmd);
  659. if (rc)
  660. return rc;
  661. res = (struct iwl_rx_packet *)cmd.reply_skb->data;
  662. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  663. IWL_ERR(priv, "Bad return from REPLY_RX_ON_ASSOC command\n");
  664. rc = -EIO;
  665. }
  666. spectrum_resp_status = le16_to_cpu(res->u.spectrum.status);
  667. switch (spectrum_resp_status) {
  668. case 0: /* Command will be handled */
  669. if (res->u.spectrum.id != 0xff) {
  670. IWL_DEBUG_INFO(priv, "Replaced existing measurement: %d\n",
  671. res->u.spectrum.id);
  672. priv->measurement_status &= ~MEASUREMENT_READY;
  673. }
  674. priv->measurement_status |= MEASUREMENT_ACTIVE;
  675. rc = 0;
  676. break;
  677. case 1: /* Command will not be handled */
  678. rc = -EAGAIN;
  679. break;
  680. }
  681. dev_kfree_skb_any(cmd.reply_skb);
  682. return rc;
  683. }
  684. #endif
  685. static void iwl3945_rx_reply_alive(struct iwl_priv *priv,
  686. struct iwl_rx_mem_buffer *rxb)
  687. {
  688. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  689. struct iwl_alive_resp *palive;
  690. struct delayed_work *pwork;
  691. palive = &pkt->u.alive_frame;
  692. IWL_DEBUG_INFO(priv, "Alive ucode status 0x%08X revision "
  693. "0x%01X 0x%01X\n",
  694. palive->is_valid, palive->ver_type,
  695. palive->ver_subtype);
  696. if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
  697. IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
  698. memcpy(&priv->card_alive_init, &pkt->u.alive_frame,
  699. sizeof(struct iwl_alive_resp));
  700. pwork = &priv->init_alive_start;
  701. } else {
  702. IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
  703. memcpy(&priv->card_alive, &pkt->u.alive_frame,
  704. sizeof(struct iwl_alive_resp));
  705. pwork = &priv->alive_start;
  706. iwl3945_disable_events(priv);
  707. }
  708. /* We delay the ALIVE response by 5ms to
  709. * give the HW RF Kill time to activate... */
  710. if (palive->is_valid == UCODE_VALID_OK)
  711. queue_delayed_work(priv->workqueue, pwork,
  712. msecs_to_jiffies(5));
  713. else
  714. IWL_WARN(priv, "uCode did not respond OK.\n");
  715. }
  716. static void iwl3945_rx_reply_add_sta(struct iwl_priv *priv,
  717. struct iwl_rx_mem_buffer *rxb)
  718. {
  719. #ifdef CONFIG_IWLWIFI_DEBUG
  720. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  721. #endif
  722. IWL_DEBUG_RX(priv, "Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status);
  723. return;
  724. }
  725. static void iwl3945_bg_beacon_update(struct work_struct *work)
  726. {
  727. struct iwl_priv *priv =
  728. container_of(work, struct iwl_priv, beacon_update);
  729. struct sk_buff *beacon;
  730. /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
  731. beacon = ieee80211_beacon_get(priv->hw, priv->vif);
  732. if (!beacon) {
  733. IWL_ERR(priv, "update beacon failed\n");
  734. return;
  735. }
  736. mutex_lock(&priv->mutex);
  737. /* new beacon skb is allocated every time; dispose previous.*/
  738. if (priv->ibss_beacon)
  739. dev_kfree_skb(priv->ibss_beacon);
  740. priv->ibss_beacon = beacon;
  741. mutex_unlock(&priv->mutex);
  742. iwl3945_send_beacon_cmd(priv);
  743. }
  744. static void iwl3945_rx_beacon_notif(struct iwl_priv *priv,
  745. struct iwl_rx_mem_buffer *rxb)
  746. {
  747. #ifdef CONFIG_IWLWIFI_DEBUG
  748. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  749. struct iwl3945_beacon_notif *beacon = &(pkt->u.beacon_status);
  750. u8 rate = beacon->beacon_notify_hdr.rate;
  751. IWL_DEBUG_RX(priv, "beacon status %x retries %d iss %d "
  752. "tsf %d %d rate %d\n",
  753. le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
  754. beacon->beacon_notify_hdr.failure_frame,
  755. le32_to_cpu(beacon->ibss_mgr_status),
  756. le32_to_cpu(beacon->high_tsf),
  757. le32_to_cpu(beacon->low_tsf), rate);
  758. #endif
  759. if ((priv->iw_mode == NL80211_IFTYPE_AP) &&
  760. (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
  761. queue_work(priv->workqueue, &priv->beacon_update);
  762. }
  763. /* Handle notification from uCode that card's power state is changing
  764. * due to software, hardware, or critical temperature RFKILL */
  765. static void iwl3945_rx_card_state_notif(struct iwl_priv *priv,
  766. struct iwl_rx_mem_buffer *rxb)
  767. {
  768. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  769. u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
  770. unsigned long status = priv->status;
  771. IWL_WARN(priv, "Card state received: HW:%s SW:%s\n",
  772. (flags & HW_CARD_DISABLED) ? "Kill" : "On",
  773. (flags & SW_CARD_DISABLED) ? "Kill" : "On");
  774. iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
  775. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  776. if (flags & HW_CARD_DISABLED)
  777. set_bit(STATUS_RF_KILL_HW, &priv->status);
  778. else
  779. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  780. iwl_scan_cancel(priv);
  781. if ((test_bit(STATUS_RF_KILL_HW, &status) !=
  782. test_bit(STATUS_RF_KILL_HW, &priv->status)))
  783. wiphy_rfkill_set_hw_state(priv->hw->wiphy,
  784. test_bit(STATUS_RF_KILL_HW, &priv->status));
  785. else
  786. wake_up_interruptible(&priv->wait_command_queue);
  787. }
  788. /**
  789. * iwl3945_setup_rx_handlers - Initialize Rx handler callbacks
  790. *
  791. * Setup the RX handlers for each of the reply types sent from the uCode
  792. * to the host.
  793. *
  794. * This function chains into the hardware specific files for them to setup
  795. * any hardware specific handlers as well.
  796. */
  797. static void iwl3945_setup_rx_handlers(struct iwl_priv *priv)
  798. {
  799. priv->rx_handlers[REPLY_ALIVE] = iwl3945_rx_reply_alive;
  800. priv->rx_handlers[REPLY_ADD_STA] = iwl3945_rx_reply_add_sta;
  801. priv->rx_handlers[REPLY_ERROR] = iwl_rx_reply_error;
  802. priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl_rx_csa;
  803. priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl_rx_pm_sleep_notif;
  804. priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
  805. iwl_rx_pm_debug_statistics_notif;
  806. priv->rx_handlers[BEACON_NOTIFICATION] = iwl3945_rx_beacon_notif;
  807. /*
  808. * The same handler is used for both the REPLY to a discrete
  809. * statistics request from the host as well as for the periodic
  810. * statistics notifications (after received beacons) from the uCode.
  811. */
  812. priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl3945_hw_rx_statistics;
  813. priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl3945_hw_rx_statistics;
  814. iwl_setup_spectrum_handlers(priv);
  815. iwl_setup_rx_scan_handlers(priv);
  816. priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl3945_rx_card_state_notif;
  817. /* Set up hardware specific Rx handlers */
  818. iwl3945_hw_rx_handler_setup(priv);
  819. }
  820. /************************** RX-FUNCTIONS ****************************/
  821. /*
  822. * Rx theory of operation
  823. *
  824. * The host allocates 32 DMA target addresses and passes the host address
  825. * to the firmware at register IWL_RFDS_TABLE_LOWER + N * RFD_SIZE where N is
  826. * 0 to 31
  827. *
  828. * Rx Queue Indexes
  829. * The host/firmware share two index registers for managing the Rx buffers.
  830. *
  831. * The READ index maps to the first position that the firmware may be writing
  832. * to -- the driver can read up to (but not including) this position and get
  833. * good data.
  834. * The READ index is managed by the firmware once the card is enabled.
  835. *
  836. * The WRITE index maps to the last position the driver has read from -- the
  837. * position preceding WRITE is the last slot the firmware can place a packet.
  838. *
  839. * The queue is empty (no good data) if WRITE = READ - 1, and is full if
  840. * WRITE = READ.
  841. *
  842. * During initialization, the host sets up the READ queue position to the first
  843. * INDEX position, and WRITE to the last (READ - 1 wrapped)
  844. *
  845. * When the firmware places a packet in a buffer, it will advance the READ index
  846. * and fire the RX interrupt. The driver can then query the READ index and
  847. * process as many packets as possible, moving the WRITE index forward as it
  848. * resets the Rx queue buffers with new memory.
  849. *
  850. * The management in the driver is as follows:
  851. * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
  852. * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
  853. * to replenish the iwl->rxq->rx_free.
  854. * + In iwl3945_rx_replenish (scheduled) if 'processed' != 'read' then the
  855. * iwl->rxq is replenished and the READ INDEX is updated (updating the
  856. * 'processed' and 'read' driver indexes as well)
  857. * + A received packet is processed and handed to the kernel network stack,
  858. * detached from the iwl->rxq. The driver 'processed' index is updated.
  859. * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
  860. * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
  861. * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there
  862. * were enough free buffers and RX_STALLED is set it is cleared.
  863. *
  864. *
  865. * Driver sequence:
  866. *
  867. * iwl3945_rx_replenish() Replenishes rx_free list from rx_used, and calls
  868. * iwl3945_rx_queue_restock
  869. * iwl3945_rx_queue_restock() Moves available buffers from rx_free into Rx
  870. * queue, updates firmware pointers, and updates
  871. * the WRITE index. If insufficient rx_free buffers
  872. * are available, schedules iwl3945_rx_replenish
  873. *
  874. * -- enable interrupts --
  875. * ISR - iwl3945_rx() Detach iwl_rx_mem_buffers from pool up to the
  876. * READ INDEX, detaching the SKB from the pool.
  877. * Moves the packet buffer from queue to rx_used.
  878. * Calls iwl3945_rx_queue_restock to refill any empty
  879. * slots.
  880. * ...
  881. *
  882. */
  883. /**
  884. * iwl3945_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
  885. */
  886. static inline __le32 iwl3945_dma_addr2rbd_ptr(struct iwl_priv *priv,
  887. dma_addr_t dma_addr)
  888. {
  889. return cpu_to_le32((u32)dma_addr);
  890. }
  891. /**
  892. * iwl3945_rx_queue_restock - refill RX queue from pre-allocated pool
  893. *
  894. * If there are slots in the RX queue that need to be restocked,
  895. * and we have free pre-allocated buffers, fill the ranks as much
  896. * as we can, pulling from rx_free.
  897. *
  898. * This moves the 'write' index forward to catch up with 'processed', and
  899. * also updates the memory address in the firmware to reference the new
  900. * target buffer.
  901. */
  902. static int iwl3945_rx_queue_restock(struct iwl_priv *priv)
  903. {
  904. struct iwl_rx_queue *rxq = &priv->rxq;
  905. struct list_head *element;
  906. struct iwl_rx_mem_buffer *rxb;
  907. unsigned long flags;
  908. int write, rc;
  909. spin_lock_irqsave(&rxq->lock, flags);
  910. write = rxq->write & ~0x7;
  911. while ((iwl_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
  912. /* Get next free Rx buffer, remove from free list */
  913. element = rxq->rx_free.next;
  914. rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
  915. list_del(element);
  916. /* Point to Rx buffer via next RBD in circular buffer */
  917. rxq->bd[rxq->write] = iwl3945_dma_addr2rbd_ptr(priv, rxb->real_dma_addr);
  918. rxq->queue[rxq->write] = rxb;
  919. rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
  920. rxq->free_count--;
  921. }
  922. spin_unlock_irqrestore(&rxq->lock, flags);
  923. /* If the pre-allocated buffer pool is dropping low, schedule to
  924. * refill it */
  925. if (rxq->free_count <= RX_LOW_WATERMARK)
  926. queue_work(priv->workqueue, &priv->rx_replenish);
  927. /* If we've added more space for the firmware to place data, tell it.
  928. * Increment device's write pointer in multiples of 8. */
  929. if ((rxq->write_actual != (rxq->write & ~0x7))
  930. || (abs(rxq->write - rxq->read) > 7)) {
  931. spin_lock_irqsave(&rxq->lock, flags);
  932. rxq->need_update = 1;
  933. spin_unlock_irqrestore(&rxq->lock, flags);
  934. rc = iwl_rx_queue_update_write_ptr(priv, rxq);
  935. if (rc)
  936. return rc;
  937. }
  938. return 0;
  939. }
  940. /**
  941. * iwl3945_rx_replenish - Move all used packet from rx_used to rx_free
  942. *
  943. * When moving to rx_free an SKB is allocated for the slot.
  944. *
  945. * Also restock the Rx queue via iwl3945_rx_queue_restock.
  946. * This is called as a scheduled work item (except for during initialization)
  947. */
  948. static void iwl3945_rx_allocate(struct iwl_priv *priv, gfp_t priority)
  949. {
  950. struct iwl_rx_queue *rxq = &priv->rxq;
  951. struct list_head *element;
  952. struct iwl_rx_mem_buffer *rxb;
  953. struct sk_buff *skb;
  954. unsigned long flags;
  955. while (1) {
  956. spin_lock_irqsave(&rxq->lock, flags);
  957. if (list_empty(&rxq->rx_used)) {
  958. spin_unlock_irqrestore(&rxq->lock, flags);
  959. return;
  960. }
  961. spin_unlock_irqrestore(&rxq->lock, flags);
  962. if (rxq->free_count > RX_LOW_WATERMARK)
  963. priority |= __GFP_NOWARN;
  964. /* Alloc a new receive buffer */
  965. skb = alloc_skb(priv->hw_params.rx_buf_size, priority);
  966. if (!skb) {
  967. if (net_ratelimit())
  968. IWL_DEBUG_INFO(priv, "Failed to allocate SKB buffer.\n");
  969. if ((rxq->free_count <= RX_LOW_WATERMARK) &&
  970. net_ratelimit())
  971. IWL_CRIT(priv, "Failed to allocate SKB buffer with %s. Only %u free buffers remaining.\n",
  972. priority == GFP_ATOMIC ? "GFP_ATOMIC" : "GFP_KERNEL",
  973. rxq->free_count);
  974. /* We don't reschedule replenish work here -- we will
  975. * call the restock method and if it still needs
  976. * more buffers it will schedule replenish */
  977. break;
  978. }
  979. spin_lock_irqsave(&rxq->lock, flags);
  980. if (list_empty(&rxq->rx_used)) {
  981. spin_unlock_irqrestore(&rxq->lock, flags);
  982. dev_kfree_skb_any(skb);
  983. return;
  984. }
  985. element = rxq->rx_used.next;
  986. rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
  987. list_del(element);
  988. spin_unlock_irqrestore(&rxq->lock, flags);
  989. rxb->skb = skb;
  990. /* If radiotap head is required, reserve some headroom here.
  991. * The physical head count is a variable rx_stats->phy_count.
  992. * We reserve 4 bytes here. Plus these extra bytes, the
  993. * headroom of the physical head should be enough for the
  994. * radiotap head that iwl3945 supported. See iwl3945_rt.
  995. */
  996. skb_reserve(rxb->skb, 4);
  997. /* Get physical address of RB/SKB */
  998. rxb->real_dma_addr = pci_map_single(priv->pci_dev,
  999. rxb->skb->data,
  1000. priv->hw_params.rx_buf_size,
  1001. PCI_DMA_FROMDEVICE);
  1002. spin_lock_irqsave(&rxq->lock, flags);
  1003. list_add_tail(&rxb->list, &rxq->rx_free);
  1004. priv->alloc_rxb_skb++;
  1005. rxq->free_count++;
  1006. spin_unlock_irqrestore(&rxq->lock, flags);
  1007. }
  1008. }
  1009. void iwl3945_rx_queue_reset(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
  1010. {
  1011. unsigned long flags;
  1012. int i;
  1013. spin_lock_irqsave(&rxq->lock, flags);
  1014. INIT_LIST_HEAD(&rxq->rx_free);
  1015. INIT_LIST_HEAD(&rxq->rx_used);
  1016. /* Fill the rx_used queue with _all_ of the Rx buffers */
  1017. for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
  1018. /* In the reset function, these buffers may have been allocated
  1019. * to an SKB, so we need to unmap and free potential storage */
  1020. if (rxq->pool[i].skb != NULL) {
  1021. pci_unmap_single(priv->pci_dev,
  1022. rxq->pool[i].real_dma_addr,
  1023. priv->hw_params.rx_buf_size,
  1024. PCI_DMA_FROMDEVICE);
  1025. priv->alloc_rxb_skb--;
  1026. dev_kfree_skb(rxq->pool[i].skb);
  1027. rxq->pool[i].skb = NULL;
  1028. }
  1029. list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
  1030. }
  1031. /* Set us so that we have processed and used all buffers, but have
  1032. * not restocked the Rx queue with fresh buffers */
  1033. rxq->read = rxq->write = 0;
  1034. rxq->free_count = 0;
  1035. rxq->write_actual = 0;
  1036. spin_unlock_irqrestore(&rxq->lock, flags);
  1037. }
  1038. void iwl3945_rx_replenish(void *data)
  1039. {
  1040. struct iwl_priv *priv = data;
  1041. unsigned long flags;
  1042. iwl3945_rx_allocate(priv, GFP_KERNEL);
  1043. spin_lock_irqsave(&priv->lock, flags);
  1044. iwl3945_rx_queue_restock(priv);
  1045. spin_unlock_irqrestore(&priv->lock, flags);
  1046. }
  1047. static void iwl3945_rx_replenish_now(struct iwl_priv *priv)
  1048. {
  1049. iwl3945_rx_allocate(priv, GFP_ATOMIC);
  1050. iwl3945_rx_queue_restock(priv);
  1051. }
  1052. /* Assumes that the skb field of the buffers in 'pool' is kept accurate.
  1053. * If an SKB has been detached, the POOL needs to have its SKB set to NULL
  1054. * This free routine walks the list of POOL entries and if SKB is set to
  1055. * non NULL it is unmapped and freed
  1056. */
  1057. static void iwl3945_rx_queue_free(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
  1058. {
  1059. int i;
  1060. for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
  1061. if (rxq->pool[i].skb != NULL) {
  1062. pci_unmap_single(priv->pci_dev,
  1063. rxq->pool[i].real_dma_addr,
  1064. priv->hw_params.rx_buf_size,
  1065. PCI_DMA_FROMDEVICE);
  1066. dev_kfree_skb(rxq->pool[i].skb);
  1067. }
  1068. }
  1069. pci_free_consistent(priv->pci_dev, 4 * RX_QUEUE_SIZE, rxq->bd,
  1070. rxq->dma_addr);
  1071. pci_free_consistent(priv->pci_dev, sizeof(struct iwl_rb_status),
  1072. rxq->rb_stts, rxq->rb_stts_dma);
  1073. rxq->bd = NULL;
  1074. rxq->rb_stts = NULL;
  1075. }
  1076. /* Convert linear signal-to-noise ratio into dB */
  1077. static u8 ratio2dB[100] = {
  1078. /* 0 1 2 3 4 5 6 7 8 9 */
  1079. 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
  1080. 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
  1081. 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
  1082. 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
  1083. 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
  1084. 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
  1085. 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
  1086. 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
  1087. 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
  1088. 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */
  1089. };
  1090. /* Calculates a relative dB value from a ratio of linear
  1091. * (i.e. not dB) signal levels.
  1092. * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
  1093. int iwl3945_calc_db_from_ratio(int sig_ratio)
  1094. {
  1095. /* 1000:1 or higher just report as 60 dB */
  1096. if (sig_ratio >= 1000)
  1097. return 60;
  1098. /* 100:1 or higher, divide by 10 and use table,
  1099. * add 20 dB to make up for divide by 10 */
  1100. if (sig_ratio >= 100)
  1101. return 20 + (int)ratio2dB[sig_ratio/10];
  1102. /* We shouldn't see this */
  1103. if (sig_ratio < 1)
  1104. return 0;
  1105. /* Use table for ratios 1:1 - 99:1 */
  1106. return (int)ratio2dB[sig_ratio];
  1107. }
  1108. #define PERFECT_RSSI (-20) /* dBm */
  1109. #define WORST_RSSI (-95) /* dBm */
  1110. #define RSSI_RANGE (PERFECT_RSSI - WORST_RSSI)
  1111. /* Calculate an indication of rx signal quality (a percentage, not dBm!).
  1112. * See http://www.ces.clemson.edu/linux/signal_quality.shtml for info
  1113. * about formulas used below. */
  1114. int iwl3945_calc_sig_qual(int rssi_dbm, int noise_dbm)
  1115. {
  1116. int sig_qual;
  1117. int degradation = PERFECT_RSSI - rssi_dbm;
  1118. /* If we get a noise measurement, use signal-to-noise ratio (SNR)
  1119. * as indicator; formula is (signal dbm - noise dbm).
  1120. * SNR at or above 40 is a great signal (100%).
  1121. * Below that, scale to fit SNR of 0 - 40 dB within 0 - 100% indicator.
  1122. * Weakest usable signal is usually 10 - 15 dB SNR. */
  1123. if (noise_dbm) {
  1124. if (rssi_dbm - noise_dbm >= 40)
  1125. return 100;
  1126. else if (rssi_dbm < noise_dbm)
  1127. return 0;
  1128. sig_qual = ((rssi_dbm - noise_dbm) * 5) / 2;
  1129. /* Else use just the signal level.
  1130. * This formula is a least squares fit of data points collected and
  1131. * compared with a reference system that had a percentage (%) display
  1132. * for signal quality. */
  1133. } else
  1134. sig_qual = (100 * (RSSI_RANGE * RSSI_RANGE) - degradation *
  1135. (15 * RSSI_RANGE + 62 * degradation)) /
  1136. (RSSI_RANGE * RSSI_RANGE);
  1137. if (sig_qual > 100)
  1138. sig_qual = 100;
  1139. else if (sig_qual < 1)
  1140. sig_qual = 0;
  1141. return sig_qual;
  1142. }
  1143. /**
  1144. * iwl3945_rx_handle - Main entry function for receiving responses from uCode
  1145. *
  1146. * Uses the priv->rx_handlers callback function array to invoke
  1147. * the appropriate handlers, including command responses,
  1148. * frame-received notifications, and other notifications.
  1149. */
  1150. static void iwl3945_rx_handle(struct iwl_priv *priv)
  1151. {
  1152. struct iwl_rx_mem_buffer *rxb;
  1153. struct iwl_rx_packet *pkt;
  1154. struct iwl_rx_queue *rxq = &priv->rxq;
  1155. u32 r, i;
  1156. int reclaim;
  1157. unsigned long flags;
  1158. u8 fill_rx = 0;
  1159. u32 count = 8;
  1160. int total_empty = 0;
  1161. /* uCode's read index (stored in shared DRAM) indicates the last Rx
  1162. * buffer that the driver may process (last buffer filled by ucode). */
  1163. r = le16_to_cpu(rxq->rb_stts->closed_rb_num) & 0x0FFF;
  1164. i = rxq->read;
  1165. /* calculate total frames need to be restock after handling RX */
  1166. total_empty = r - priv->rxq.write_actual;
  1167. if (total_empty < 0)
  1168. total_empty += RX_QUEUE_SIZE;
  1169. if (total_empty > (RX_QUEUE_SIZE / 2))
  1170. fill_rx = 1;
  1171. /* Rx interrupt, but nothing sent from uCode */
  1172. if (i == r)
  1173. IWL_DEBUG_RX(priv, "r = %d, i = %d\n", r, i);
  1174. while (i != r) {
  1175. rxb = rxq->queue[i];
  1176. /* If an RXB doesn't have a Rx queue slot associated with it,
  1177. * then a bug has been introduced in the queue refilling
  1178. * routines -- catch it here */
  1179. BUG_ON(rxb == NULL);
  1180. rxq->queue[i] = NULL;
  1181. pci_unmap_single(priv->pci_dev, rxb->real_dma_addr,
  1182. priv->hw_params.rx_buf_size,
  1183. PCI_DMA_FROMDEVICE);
  1184. pkt = (struct iwl_rx_packet *)rxb->skb->data;
  1185. /* Reclaim a command buffer only if this packet is a response
  1186. * to a (driver-originated) command.
  1187. * If the packet (e.g. Rx frame) originated from uCode,
  1188. * there is no command buffer to reclaim.
  1189. * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
  1190. * but apparently a few don't get set; catch them here. */
  1191. reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
  1192. (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
  1193. (pkt->hdr.cmd != REPLY_TX);
  1194. /* Based on type of command response or notification,
  1195. * handle those that need handling via function in
  1196. * rx_handlers table. See iwl3945_setup_rx_handlers() */
  1197. if (priv->rx_handlers[pkt->hdr.cmd]) {
  1198. IWL_DEBUG_RX(priv, "r = %d, i = %d, %s, 0x%02x\n", r, i,
  1199. get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
  1200. priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
  1201. priv->isr_stats.rx_handlers[pkt->hdr.cmd]++;
  1202. } else {
  1203. /* No handling needed */
  1204. IWL_DEBUG_RX(priv, "r %d i %d No handler needed for %s, 0x%02x\n",
  1205. r, i, get_cmd_string(pkt->hdr.cmd),
  1206. pkt->hdr.cmd);
  1207. }
  1208. if (reclaim) {
  1209. /* Invoke any callbacks, transfer the skb to caller, and
  1210. * fire off the (possibly) blocking iwl_send_cmd()
  1211. * as we reclaim the driver command queue */
  1212. if (rxb && rxb->skb)
  1213. iwl_tx_cmd_complete(priv, rxb);
  1214. else
  1215. IWL_WARN(priv, "Claim null rxb?\n");
  1216. }
  1217. /* For now we just don't re-use anything. We can tweak this
  1218. * later to try and re-use notification packets and SKBs that
  1219. * fail to Rx correctly */
  1220. if (rxb->skb != NULL) {
  1221. priv->alloc_rxb_skb--;
  1222. dev_kfree_skb_any(rxb->skb);
  1223. rxb->skb = NULL;
  1224. }
  1225. spin_lock_irqsave(&rxq->lock, flags);
  1226. list_add_tail(&rxb->list, &priv->rxq.rx_used);
  1227. spin_unlock_irqrestore(&rxq->lock, flags);
  1228. i = (i + 1) & RX_QUEUE_MASK;
  1229. /* If there are a lot of unused frames,
  1230. * restock the Rx queue so ucode won't assert. */
  1231. if (fill_rx) {
  1232. count++;
  1233. if (count >= 8) {
  1234. priv->rxq.read = i;
  1235. iwl3945_rx_replenish_now(priv);
  1236. count = 0;
  1237. }
  1238. }
  1239. }
  1240. /* Backtrack one entry */
  1241. priv->rxq.read = i;
  1242. if (fill_rx)
  1243. iwl3945_rx_replenish_now(priv);
  1244. else
  1245. iwl3945_rx_queue_restock(priv);
  1246. }
  1247. /* call this function to flush any scheduled tasklet */
  1248. static inline void iwl_synchronize_irq(struct iwl_priv *priv)
  1249. {
  1250. /* wait to make sure we flush pending tasklet*/
  1251. synchronize_irq(priv->pci_dev->irq);
  1252. tasklet_kill(&priv->irq_tasklet);
  1253. }
  1254. #ifdef CONFIG_IWLWIFI_DEBUG
  1255. static const char *desc_lookup(int i)
  1256. {
  1257. switch (i) {
  1258. case 1:
  1259. return "FAIL";
  1260. case 2:
  1261. return "BAD_PARAM";
  1262. case 3:
  1263. return "BAD_CHECKSUM";
  1264. case 4:
  1265. return "NMI_INTERRUPT";
  1266. case 5:
  1267. return "SYSASSERT";
  1268. case 6:
  1269. return "FATAL_ERROR";
  1270. }
  1271. return "UNKNOWN";
  1272. }
  1273. #define ERROR_START_OFFSET (1 * sizeof(u32))
  1274. #define ERROR_ELEM_SIZE (7 * sizeof(u32))
  1275. void iwl3945_dump_nic_error_log(struct iwl_priv *priv)
  1276. {
  1277. u32 i;
  1278. u32 desc, time, count, base, data1;
  1279. u32 blink1, blink2, ilink1, ilink2;
  1280. base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
  1281. if (!iwl3945_hw_valid_rtc_data_addr(base)) {
  1282. IWL_ERR(priv, "Not valid error log pointer 0x%08X\n", base);
  1283. return;
  1284. }
  1285. count = iwl_read_targ_mem(priv, base);
  1286. if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
  1287. IWL_ERR(priv, "Start IWL Error Log Dump:\n");
  1288. IWL_ERR(priv, "Status: 0x%08lX, count: %d\n",
  1289. priv->status, count);
  1290. }
  1291. IWL_ERR(priv, "Desc Time asrtPC blink2 "
  1292. "ilink1 nmiPC Line\n");
  1293. for (i = ERROR_START_OFFSET;
  1294. i < (count * ERROR_ELEM_SIZE) + ERROR_START_OFFSET;
  1295. i += ERROR_ELEM_SIZE) {
  1296. desc = iwl_read_targ_mem(priv, base + i);
  1297. time =
  1298. iwl_read_targ_mem(priv, base + i + 1 * sizeof(u32));
  1299. blink1 =
  1300. iwl_read_targ_mem(priv, base + i + 2 * sizeof(u32));
  1301. blink2 =
  1302. iwl_read_targ_mem(priv, base + i + 3 * sizeof(u32));
  1303. ilink1 =
  1304. iwl_read_targ_mem(priv, base + i + 4 * sizeof(u32));
  1305. ilink2 =
  1306. iwl_read_targ_mem(priv, base + i + 5 * sizeof(u32));
  1307. data1 =
  1308. iwl_read_targ_mem(priv, base + i + 6 * sizeof(u32));
  1309. IWL_ERR(priv,
  1310. "%-13s (#%d) %010u 0x%05X 0x%05X 0x%05X 0x%05X %u\n\n",
  1311. desc_lookup(desc), desc, time, blink1, blink2,
  1312. ilink1, ilink2, data1);
  1313. }
  1314. }
  1315. #define EVENT_START_OFFSET (6 * sizeof(u32))
  1316. /**
  1317. * iwl3945_print_event_log - Dump error event log to syslog
  1318. *
  1319. */
  1320. static void iwl3945_print_event_log(struct iwl_priv *priv, u32 start_idx,
  1321. u32 num_events, u32 mode)
  1322. {
  1323. u32 i;
  1324. u32 base; /* SRAM byte address of event log header */
  1325. u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
  1326. u32 ptr; /* SRAM byte address of log data */
  1327. u32 ev, time, data; /* event log data */
  1328. if (num_events == 0)
  1329. return;
  1330. base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
  1331. if (mode == 0)
  1332. event_size = 2 * sizeof(u32);
  1333. else
  1334. event_size = 3 * sizeof(u32);
  1335. ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
  1336. /* "time" is actually "data" for mode 0 (no timestamp).
  1337. * place event id # at far right for easier visual parsing. */
  1338. for (i = 0; i < num_events; i++) {
  1339. ev = iwl_read_targ_mem(priv, ptr);
  1340. ptr += sizeof(u32);
  1341. time = iwl_read_targ_mem(priv, ptr);
  1342. ptr += sizeof(u32);
  1343. if (mode == 0) {
  1344. /* data, ev */
  1345. IWL_ERR(priv, "0x%08x\t%04u\n", time, ev);
  1346. } else {
  1347. data = iwl_read_targ_mem(priv, ptr);
  1348. ptr += sizeof(u32);
  1349. IWL_ERR(priv, "%010u\t0x%08x\t%04u\n", time, data, ev);
  1350. }
  1351. }
  1352. }
  1353. void iwl3945_dump_nic_event_log(struct iwl_priv *priv)
  1354. {
  1355. u32 base; /* SRAM byte address of event log header */
  1356. u32 capacity; /* event log capacity in # entries */
  1357. u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
  1358. u32 num_wraps; /* # times uCode wrapped to top of log */
  1359. u32 next_entry; /* index of next entry to be written by uCode */
  1360. u32 size; /* # entries that we'll print */
  1361. base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
  1362. if (!iwl3945_hw_valid_rtc_data_addr(base)) {
  1363. IWL_ERR(priv, "Invalid event log pointer 0x%08X\n", base);
  1364. return;
  1365. }
  1366. /* event log header */
  1367. capacity = iwl_read_targ_mem(priv, base);
  1368. mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
  1369. num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
  1370. next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
  1371. size = num_wraps ? capacity : next_entry;
  1372. /* bail out if nothing in log */
  1373. if (size == 0) {
  1374. IWL_ERR(priv, "Start IWL Event Log Dump: nothing in log\n");
  1375. return;
  1376. }
  1377. IWL_ERR(priv, "Start IWL Event Log Dump: display count %d, wraps %d\n",
  1378. size, num_wraps);
  1379. /* if uCode has wrapped back to top of log, start at the oldest entry,
  1380. * i.e the next one that uCode would fill. */
  1381. if (num_wraps)
  1382. iwl3945_print_event_log(priv, next_entry,
  1383. capacity - next_entry, mode);
  1384. /* (then/else) start at top of log */
  1385. iwl3945_print_event_log(priv, 0, next_entry, mode);
  1386. }
  1387. #else
  1388. void iwl3945_dump_nic_event_log(struct iwl_priv *priv)
  1389. {
  1390. }
  1391. void iwl3945_dump_nic_error_log(struct iwl_priv *priv)
  1392. {
  1393. }
  1394. #endif
  1395. static void iwl3945_irq_tasklet(struct iwl_priv *priv)
  1396. {
  1397. u32 inta, handled = 0;
  1398. u32 inta_fh;
  1399. unsigned long flags;
  1400. #ifdef CONFIG_IWLWIFI_DEBUG
  1401. u32 inta_mask;
  1402. #endif
  1403. spin_lock_irqsave(&priv->lock, flags);
  1404. /* Ack/clear/reset pending uCode interrupts.
  1405. * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
  1406. * and will clear only when CSR_FH_INT_STATUS gets cleared. */
  1407. inta = iwl_read32(priv, CSR_INT);
  1408. iwl_write32(priv, CSR_INT, inta);
  1409. /* Ack/clear/reset pending flow-handler (DMA) interrupts.
  1410. * Any new interrupts that happen after this, either while we're
  1411. * in this tasklet, or later, will show up in next ISR/tasklet. */
  1412. inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
  1413. iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
  1414. #ifdef CONFIG_IWLWIFI_DEBUG
  1415. if (iwl_get_debug_level(priv) & IWL_DL_ISR) {
  1416. /* just for debug */
  1417. inta_mask = iwl_read32(priv, CSR_INT_MASK);
  1418. IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
  1419. inta, inta_mask, inta_fh);
  1420. }
  1421. #endif
  1422. /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
  1423. * atomic, make sure that inta covers all the interrupts that
  1424. * we've discovered, even if FH interrupt came in just after
  1425. * reading CSR_INT. */
  1426. if (inta_fh & CSR39_FH_INT_RX_MASK)
  1427. inta |= CSR_INT_BIT_FH_RX;
  1428. if (inta_fh & CSR39_FH_INT_TX_MASK)
  1429. inta |= CSR_INT_BIT_FH_TX;
  1430. /* Now service all interrupt bits discovered above. */
  1431. if (inta & CSR_INT_BIT_HW_ERR) {
  1432. IWL_ERR(priv, "Hardware error detected. Restarting.\n");
  1433. /* Tell the device to stop sending interrupts */
  1434. iwl_disable_interrupts(priv);
  1435. priv->isr_stats.hw++;
  1436. iwl_irq_handle_error(priv);
  1437. handled |= CSR_INT_BIT_HW_ERR;
  1438. spin_unlock_irqrestore(&priv->lock, flags);
  1439. return;
  1440. }
  1441. #ifdef CONFIG_IWLWIFI_DEBUG
  1442. if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
  1443. /* NIC fires this, but we don't use it, redundant with WAKEUP */
  1444. if (inta & CSR_INT_BIT_SCD) {
  1445. IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
  1446. "the frame/frames.\n");
  1447. priv->isr_stats.sch++;
  1448. }
  1449. /* Alive notification via Rx interrupt will do the real work */
  1450. if (inta & CSR_INT_BIT_ALIVE) {
  1451. IWL_DEBUG_ISR(priv, "Alive interrupt\n");
  1452. priv->isr_stats.alive++;
  1453. }
  1454. }
  1455. #endif
  1456. /* Safely ignore these bits for debug checks below */
  1457. inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
  1458. /* Error detected by uCode */
  1459. if (inta & CSR_INT_BIT_SW_ERR) {
  1460. IWL_ERR(priv, "Microcode SW error detected. "
  1461. "Restarting 0x%X.\n", inta);
  1462. priv->isr_stats.sw++;
  1463. priv->isr_stats.sw_err = inta;
  1464. iwl_irq_handle_error(priv);
  1465. handled |= CSR_INT_BIT_SW_ERR;
  1466. }
  1467. /* uCode wakes up after power-down sleep */
  1468. if (inta & CSR_INT_BIT_WAKEUP) {
  1469. IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
  1470. iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
  1471. iwl_txq_update_write_ptr(priv, &priv->txq[0]);
  1472. iwl_txq_update_write_ptr(priv, &priv->txq[1]);
  1473. iwl_txq_update_write_ptr(priv, &priv->txq[2]);
  1474. iwl_txq_update_write_ptr(priv, &priv->txq[3]);
  1475. iwl_txq_update_write_ptr(priv, &priv->txq[4]);
  1476. iwl_txq_update_write_ptr(priv, &priv->txq[5]);
  1477. priv->isr_stats.wakeup++;
  1478. handled |= CSR_INT_BIT_WAKEUP;
  1479. }
  1480. /* All uCode command responses, including Tx command responses,
  1481. * Rx "responses" (frame-received notification), and other
  1482. * notifications from uCode come through here*/
  1483. if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
  1484. iwl3945_rx_handle(priv);
  1485. priv->isr_stats.rx++;
  1486. handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
  1487. }
  1488. if (inta & CSR_INT_BIT_FH_TX) {
  1489. IWL_DEBUG_ISR(priv, "Tx interrupt\n");
  1490. priv->isr_stats.tx++;
  1491. iwl_write32(priv, CSR_FH_INT_STATUS, (1 << 6));
  1492. iwl_write_direct32(priv, FH39_TCSR_CREDIT
  1493. (FH39_SRVC_CHNL), 0x0);
  1494. handled |= CSR_INT_BIT_FH_TX;
  1495. }
  1496. if (inta & ~handled) {
  1497. IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
  1498. priv->isr_stats.unhandled++;
  1499. }
  1500. if (inta & ~priv->inta_mask) {
  1501. IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
  1502. inta & ~priv->inta_mask);
  1503. IWL_WARN(priv, " with FH_INT = 0x%08x\n", inta_fh);
  1504. }
  1505. /* Re-enable all interrupts */
  1506. /* only Re-enable if disabled by irq */
  1507. if (test_bit(STATUS_INT_ENABLED, &priv->status))
  1508. iwl_enable_interrupts(priv);
  1509. #ifdef CONFIG_IWLWIFI_DEBUG
  1510. if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
  1511. inta = iwl_read32(priv, CSR_INT);
  1512. inta_mask = iwl_read32(priv, CSR_INT_MASK);
  1513. inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
  1514. IWL_DEBUG_ISR(priv, "End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
  1515. "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
  1516. }
  1517. #endif
  1518. spin_unlock_irqrestore(&priv->lock, flags);
  1519. }
  1520. static int iwl3945_get_channels_for_scan(struct iwl_priv *priv,
  1521. enum ieee80211_band band,
  1522. u8 is_active, u8 n_probes,
  1523. struct iwl3945_scan_channel *scan_ch)
  1524. {
  1525. struct ieee80211_channel *chan;
  1526. const struct ieee80211_supported_band *sband;
  1527. const struct iwl_channel_info *ch_info;
  1528. u16 passive_dwell = 0;
  1529. u16 active_dwell = 0;
  1530. int added, i;
  1531. sband = iwl_get_hw_mode(priv, band);
  1532. if (!sband)
  1533. return 0;
  1534. active_dwell = iwl_get_active_dwell_time(priv, band, n_probes);
  1535. passive_dwell = iwl_get_passive_dwell_time(priv, band);
  1536. if (passive_dwell <= active_dwell)
  1537. passive_dwell = active_dwell + 1;
  1538. for (i = 0, added = 0; i < priv->scan_request->n_channels; i++) {
  1539. chan = priv->scan_request->channels[i];
  1540. if (chan->band != band)
  1541. continue;
  1542. scan_ch->channel = chan->hw_value;
  1543. ch_info = iwl_get_channel_info(priv, band, scan_ch->channel);
  1544. if (!is_channel_valid(ch_info)) {
  1545. IWL_DEBUG_SCAN(priv, "Channel %d is INVALID for this band.\n",
  1546. scan_ch->channel);
  1547. continue;
  1548. }
  1549. scan_ch->active_dwell = cpu_to_le16(active_dwell);
  1550. scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
  1551. /* If passive , set up for auto-switch
  1552. * and use long active_dwell time.
  1553. */
  1554. if (!is_active || is_channel_passive(ch_info) ||
  1555. (chan->flags & IEEE80211_CHAN_PASSIVE_SCAN)) {
  1556. scan_ch->type = 0; /* passive */
  1557. if (IWL_UCODE_API(priv->ucode_ver) == 1)
  1558. scan_ch->active_dwell = cpu_to_le16(passive_dwell - 1);
  1559. } else {
  1560. scan_ch->type = 1; /* active */
  1561. }
  1562. /* Set direct probe bits. These may be used both for active
  1563. * scan channels (probes gets sent right away),
  1564. * or for passive channels (probes get se sent only after
  1565. * hearing clear Rx packet).*/
  1566. if (IWL_UCODE_API(priv->ucode_ver) >= 2) {
  1567. if (n_probes)
  1568. scan_ch->type |= IWL39_SCAN_PROBE_MASK(n_probes);
  1569. } else {
  1570. /* uCode v1 does not allow setting direct probe bits on
  1571. * passive channel. */
  1572. if ((scan_ch->type & 1) && n_probes)
  1573. scan_ch->type |= IWL39_SCAN_PROBE_MASK(n_probes);
  1574. }
  1575. /* Set txpower levels to defaults */
  1576. scan_ch->tpc.dsp_atten = 110;
  1577. /* scan_pwr_info->tpc.dsp_atten; */
  1578. /*scan_pwr_info->tpc.tx_gain; */
  1579. if (band == IEEE80211_BAND_5GHZ)
  1580. scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
  1581. else {
  1582. scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
  1583. /* NOTE: if we were doing 6Mb OFDM for scans we'd use
  1584. * power level:
  1585. * scan_ch->tpc.tx_gain = ((1 << 5) | (2 << 3)) | 3;
  1586. */
  1587. }
  1588. IWL_DEBUG_SCAN(priv, "Scanning %d [%s %d]\n",
  1589. scan_ch->channel,
  1590. (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
  1591. (scan_ch->type & 1) ?
  1592. active_dwell : passive_dwell);
  1593. scan_ch++;
  1594. added++;
  1595. }
  1596. IWL_DEBUG_SCAN(priv, "total channels to scan %d \n", added);
  1597. return added;
  1598. }
  1599. static void iwl3945_init_hw_rates(struct iwl_priv *priv,
  1600. struct ieee80211_rate *rates)
  1601. {
  1602. int i;
  1603. for (i = 0; i < IWL_RATE_COUNT; i++) {
  1604. rates[i].bitrate = iwl3945_rates[i].ieee * 5;
  1605. rates[i].hw_value = i; /* Rate scaling will work on indexes */
  1606. rates[i].hw_value_short = i;
  1607. rates[i].flags = 0;
  1608. if ((i > IWL39_LAST_OFDM_RATE) || (i < IWL_FIRST_OFDM_RATE)) {
  1609. /*
  1610. * If CCK != 1M then set short preamble rate flag.
  1611. */
  1612. rates[i].flags |= (iwl3945_rates[i].plcp == 10) ?
  1613. 0 : IEEE80211_RATE_SHORT_PREAMBLE;
  1614. }
  1615. }
  1616. }
  1617. /******************************************************************************
  1618. *
  1619. * uCode download functions
  1620. *
  1621. ******************************************************************************/
  1622. static void iwl3945_dealloc_ucode_pci(struct iwl_priv *priv)
  1623. {
  1624. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
  1625. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
  1626. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
  1627. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
  1628. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
  1629. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
  1630. }
  1631. /**
  1632. * iwl3945_verify_inst_full - verify runtime uCode image in card vs. host,
  1633. * looking at all data.
  1634. */
  1635. static int iwl3945_verify_inst_full(struct iwl_priv *priv, __le32 *image, u32 len)
  1636. {
  1637. u32 val;
  1638. u32 save_len = len;
  1639. int rc = 0;
  1640. u32 errcnt;
  1641. IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
  1642. iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
  1643. IWL39_RTC_INST_LOWER_BOUND);
  1644. errcnt = 0;
  1645. for (; len > 0; len -= sizeof(u32), image++) {
  1646. /* read data comes through single port, auto-incr addr */
  1647. /* NOTE: Use the debugless read so we don't flood kernel log
  1648. * if IWL_DL_IO is set */
  1649. val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  1650. if (val != le32_to_cpu(*image)) {
  1651. IWL_ERR(priv, "uCode INST section is invalid at "
  1652. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  1653. save_len - len, val, le32_to_cpu(*image));
  1654. rc = -EIO;
  1655. errcnt++;
  1656. if (errcnt >= 20)
  1657. break;
  1658. }
  1659. }
  1660. if (!errcnt)
  1661. IWL_DEBUG_INFO(priv,
  1662. "ucode image in INSTRUCTION memory is good\n");
  1663. return rc;
  1664. }
  1665. /**
  1666. * iwl3945_verify_inst_sparse - verify runtime uCode image in card vs. host,
  1667. * using sample data 100 bytes apart. If these sample points are good,
  1668. * it's a pretty good bet that everything between them is good, too.
  1669. */
  1670. static int iwl3945_verify_inst_sparse(struct iwl_priv *priv, __le32 *image, u32 len)
  1671. {
  1672. u32 val;
  1673. int rc = 0;
  1674. u32 errcnt = 0;
  1675. u32 i;
  1676. IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
  1677. for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
  1678. /* read data comes through single port, auto-incr addr */
  1679. /* NOTE: Use the debugless read so we don't flood kernel log
  1680. * if IWL_DL_IO is set */
  1681. iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
  1682. i + IWL39_RTC_INST_LOWER_BOUND);
  1683. val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  1684. if (val != le32_to_cpu(*image)) {
  1685. #if 0 /* Enable this if you want to see details */
  1686. IWL_ERR(priv, "uCode INST section is invalid at "
  1687. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  1688. i, val, *image);
  1689. #endif
  1690. rc = -EIO;
  1691. errcnt++;
  1692. if (errcnt >= 3)
  1693. break;
  1694. }
  1695. }
  1696. return rc;
  1697. }
  1698. /**
  1699. * iwl3945_verify_ucode - determine which instruction image is in SRAM,
  1700. * and verify its contents
  1701. */
  1702. static int iwl3945_verify_ucode(struct iwl_priv *priv)
  1703. {
  1704. __le32 *image;
  1705. u32 len;
  1706. int rc = 0;
  1707. /* Try bootstrap */
  1708. image = (__le32 *)priv->ucode_boot.v_addr;
  1709. len = priv->ucode_boot.len;
  1710. rc = iwl3945_verify_inst_sparse(priv, image, len);
  1711. if (rc == 0) {
  1712. IWL_DEBUG_INFO(priv, "Bootstrap uCode is good in inst SRAM\n");
  1713. return 0;
  1714. }
  1715. /* Try initialize */
  1716. image = (__le32 *)priv->ucode_init.v_addr;
  1717. len = priv->ucode_init.len;
  1718. rc = iwl3945_verify_inst_sparse(priv, image, len);
  1719. if (rc == 0) {
  1720. IWL_DEBUG_INFO(priv, "Initialize uCode is good in inst SRAM\n");
  1721. return 0;
  1722. }
  1723. /* Try runtime/protocol */
  1724. image = (__le32 *)priv->ucode_code.v_addr;
  1725. len = priv->ucode_code.len;
  1726. rc = iwl3945_verify_inst_sparse(priv, image, len);
  1727. if (rc == 0) {
  1728. IWL_DEBUG_INFO(priv, "Runtime uCode is good in inst SRAM\n");
  1729. return 0;
  1730. }
  1731. IWL_ERR(priv, "NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
  1732. /* Since nothing seems to match, show first several data entries in
  1733. * instruction SRAM, so maybe visual inspection will give a clue.
  1734. * Selection of bootstrap image (vs. other images) is arbitrary. */
  1735. image = (__le32 *)priv->ucode_boot.v_addr;
  1736. len = priv->ucode_boot.len;
  1737. rc = iwl3945_verify_inst_full(priv, image, len);
  1738. return rc;
  1739. }
  1740. static void iwl3945_nic_start(struct iwl_priv *priv)
  1741. {
  1742. /* Remove all resets to allow NIC to operate */
  1743. iwl_write32(priv, CSR_RESET, 0);
  1744. }
  1745. /**
  1746. * iwl3945_read_ucode - Read uCode images from disk file.
  1747. *
  1748. * Copy into buffers for card to fetch via bus-mastering
  1749. */
  1750. static int iwl3945_read_ucode(struct iwl_priv *priv)
  1751. {
  1752. const struct iwl_ucode_header *ucode;
  1753. int ret = -EINVAL, index;
  1754. const struct firmware *ucode_raw;
  1755. /* firmware file name contains uCode/driver compatibility version */
  1756. const char *name_pre = priv->cfg->fw_name_pre;
  1757. const unsigned int api_max = priv->cfg->ucode_api_max;
  1758. const unsigned int api_min = priv->cfg->ucode_api_min;
  1759. char buf[25];
  1760. u8 *src;
  1761. size_t len;
  1762. u32 api_ver, inst_size, data_size, init_size, init_data_size, boot_size;
  1763. /* Ask kernel firmware_class module to get the boot firmware off disk.
  1764. * request_firmware() is synchronous, file is in memory on return. */
  1765. for (index = api_max; index >= api_min; index--) {
  1766. sprintf(buf, "%s%u%s", name_pre, index, ".ucode");
  1767. ret = request_firmware(&ucode_raw, buf, &priv->pci_dev->dev);
  1768. if (ret < 0) {
  1769. IWL_ERR(priv, "%s firmware file req failed: %d\n",
  1770. buf, ret);
  1771. if (ret == -ENOENT)
  1772. continue;
  1773. else
  1774. goto error;
  1775. } else {
  1776. if (index < api_max)
  1777. IWL_ERR(priv, "Loaded firmware %s, "
  1778. "which is deprecated. "
  1779. " Please use API v%u instead.\n",
  1780. buf, api_max);
  1781. IWL_DEBUG_INFO(priv, "Got firmware '%s' file "
  1782. "(%zd bytes) from disk\n",
  1783. buf, ucode_raw->size);
  1784. break;
  1785. }
  1786. }
  1787. if (ret < 0)
  1788. goto error;
  1789. /* Make sure that we got at least our header! */
  1790. if (ucode_raw->size < priv->cfg->ops->ucode->get_header_size(1)) {
  1791. IWL_ERR(priv, "File size way too small!\n");
  1792. ret = -EINVAL;
  1793. goto err_release;
  1794. }
  1795. /* Data from ucode file: header followed by uCode images */
  1796. ucode = (struct iwl_ucode_header *)ucode_raw->data;
  1797. priv->ucode_ver = le32_to_cpu(ucode->ver);
  1798. api_ver = IWL_UCODE_API(priv->ucode_ver);
  1799. inst_size = priv->cfg->ops->ucode->get_inst_size(ucode, api_ver);
  1800. data_size = priv->cfg->ops->ucode->get_data_size(ucode, api_ver);
  1801. init_size = priv->cfg->ops->ucode->get_init_size(ucode, api_ver);
  1802. init_data_size =
  1803. priv->cfg->ops->ucode->get_init_data_size(ucode, api_ver);
  1804. boot_size = priv->cfg->ops->ucode->get_boot_size(ucode, api_ver);
  1805. src = priv->cfg->ops->ucode->get_data(ucode, api_ver);
  1806. /* api_ver should match the api version forming part of the
  1807. * firmware filename ... but we don't check for that and only rely
  1808. * on the API version read from firmware header from here on forward */
  1809. if (api_ver < api_min || api_ver > api_max) {
  1810. IWL_ERR(priv, "Driver unable to support your firmware API. "
  1811. "Driver supports v%u, firmware is v%u.\n",
  1812. api_max, api_ver);
  1813. priv->ucode_ver = 0;
  1814. ret = -EINVAL;
  1815. goto err_release;
  1816. }
  1817. if (api_ver != api_max)
  1818. IWL_ERR(priv, "Firmware has old API version. Expected %u, "
  1819. "got %u. New firmware can be obtained "
  1820. "from http://www.intellinuxwireless.org.\n",
  1821. api_max, api_ver);
  1822. IWL_INFO(priv, "loaded firmware version %u.%u.%u.%u\n",
  1823. IWL_UCODE_MAJOR(priv->ucode_ver),
  1824. IWL_UCODE_MINOR(priv->ucode_ver),
  1825. IWL_UCODE_API(priv->ucode_ver),
  1826. IWL_UCODE_SERIAL(priv->ucode_ver));
  1827. IWL_DEBUG_INFO(priv, "f/w package hdr ucode version raw = 0x%x\n",
  1828. priv->ucode_ver);
  1829. IWL_DEBUG_INFO(priv, "f/w package hdr runtime inst size = %u\n",
  1830. inst_size);
  1831. IWL_DEBUG_INFO(priv, "f/w package hdr runtime data size = %u\n",
  1832. data_size);
  1833. IWL_DEBUG_INFO(priv, "f/w package hdr init inst size = %u\n",
  1834. init_size);
  1835. IWL_DEBUG_INFO(priv, "f/w package hdr init data size = %u\n",
  1836. init_data_size);
  1837. IWL_DEBUG_INFO(priv, "f/w package hdr boot inst size = %u\n",
  1838. boot_size);
  1839. /* Verify size of file vs. image size info in file's header */
  1840. if (ucode_raw->size != priv->cfg->ops->ucode->get_header_size(api_ver) +
  1841. inst_size + data_size + init_size +
  1842. init_data_size + boot_size) {
  1843. IWL_DEBUG_INFO(priv,
  1844. "uCode file size %zd does not match expected size\n",
  1845. ucode_raw->size);
  1846. ret = -EINVAL;
  1847. goto err_release;
  1848. }
  1849. /* Verify that uCode images will fit in card's SRAM */
  1850. if (inst_size > IWL39_MAX_INST_SIZE) {
  1851. IWL_DEBUG_INFO(priv, "uCode instr len %d too large to fit in\n",
  1852. inst_size);
  1853. ret = -EINVAL;
  1854. goto err_release;
  1855. }
  1856. if (data_size > IWL39_MAX_DATA_SIZE) {
  1857. IWL_DEBUG_INFO(priv, "uCode data len %d too large to fit in\n",
  1858. data_size);
  1859. ret = -EINVAL;
  1860. goto err_release;
  1861. }
  1862. if (init_size > IWL39_MAX_INST_SIZE) {
  1863. IWL_DEBUG_INFO(priv,
  1864. "uCode init instr len %d too large to fit in\n",
  1865. init_size);
  1866. ret = -EINVAL;
  1867. goto err_release;
  1868. }
  1869. if (init_data_size > IWL39_MAX_DATA_SIZE) {
  1870. IWL_DEBUG_INFO(priv,
  1871. "uCode init data len %d too large to fit in\n",
  1872. init_data_size);
  1873. ret = -EINVAL;
  1874. goto err_release;
  1875. }
  1876. if (boot_size > IWL39_MAX_BSM_SIZE) {
  1877. IWL_DEBUG_INFO(priv,
  1878. "uCode boot instr len %d too large to fit in\n",
  1879. boot_size);
  1880. ret = -EINVAL;
  1881. goto err_release;
  1882. }
  1883. /* Allocate ucode buffers for card's bus-master loading ... */
  1884. /* Runtime instructions and 2 copies of data:
  1885. * 1) unmodified from disk
  1886. * 2) backup cache for save/restore during power-downs */
  1887. priv->ucode_code.len = inst_size;
  1888. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
  1889. priv->ucode_data.len = data_size;
  1890. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
  1891. priv->ucode_data_backup.len = data_size;
  1892. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
  1893. if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
  1894. !priv->ucode_data_backup.v_addr)
  1895. goto err_pci_alloc;
  1896. /* Initialization instructions and data */
  1897. if (init_size && init_data_size) {
  1898. priv->ucode_init.len = init_size;
  1899. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
  1900. priv->ucode_init_data.len = init_data_size;
  1901. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
  1902. if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
  1903. goto err_pci_alloc;
  1904. }
  1905. /* Bootstrap (instructions only, no data) */
  1906. if (boot_size) {
  1907. priv->ucode_boot.len = boot_size;
  1908. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
  1909. if (!priv->ucode_boot.v_addr)
  1910. goto err_pci_alloc;
  1911. }
  1912. /* Copy images into buffers for card's bus-master reads ... */
  1913. /* Runtime instructions (first block of data in file) */
  1914. len = inst_size;
  1915. IWL_DEBUG_INFO(priv,
  1916. "Copying (but not loading) uCode instr len %zd\n", len);
  1917. memcpy(priv->ucode_code.v_addr, src, len);
  1918. src += len;
  1919. IWL_DEBUG_INFO(priv, "uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
  1920. priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
  1921. /* Runtime data (2nd block)
  1922. * NOTE: Copy into backup buffer will be done in iwl3945_up() */
  1923. len = data_size;
  1924. IWL_DEBUG_INFO(priv,
  1925. "Copying (but not loading) uCode data len %zd\n", len);
  1926. memcpy(priv->ucode_data.v_addr, src, len);
  1927. memcpy(priv->ucode_data_backup.v_addr, src, len);
  1928. src += len;
  1929. /* Initialization instructions (3rd block) */
  1930. if (init_size) {
  1931. len = init_size;
  1932. IWL_DEBUG_INFO(priv,
  1933. "Copying (but not loading) init instr len %zd\n", len);
  1934. memcpy(priv->ucode_init.v_addr, src, len);
  1935. src += len;
  1936. }
  1937. /* Initialization data (4th block) */
  1938. if (init_data_size) {
  1939. len = init_data_size;
  1940. IWL_DEBUG_INFO(priv,
  1941. "Copying (but not loading) init data len %zd\n", len);
  1942. memcpy(priv->ucode_init_data.v_addr, src, len);
  1943. src += len;
  1944. }
  1945. /* Bootstrap instructions (5th block) */
  1946. len = boot_size;
  1947. IWL_DEBUG_INFO(priv,
  1948. "Copying (but not loading) boot instr len %zd\n", len);
  1949. memcpy(priv->ucode_boot.v_addr, src, len);
  1950. /* We have our copies now, allow OS release its copies */
  1951. release_firmware(ucode_raw);
  1952. return 0;
  1953. err_pci_alloc:
  1954. IWL_ERR(priv, "failed to allocate pci memory\n");
  1955. ret = -ENOMEM;
  1956. iwl3945_dealloc_ucode_pci(priv);
  1957. err_release:
  1958. release_firmware(ucode_raw);
  1959. error:
  1960. return ret;
  1961. }
  1962. /**
  1963. * iwl3945_set_ucode_ptrs - Set uCode address location
  1964. *
  1965. * Tell initialization uCode where to find runtime uCode.
  1966. *
  1967. * BSM registers initially contain pointers to initialization uCode.
  1968. * We need to replace them to load runtime uCode inst and data,
  1969. * and to save runtime data when powering down.
  1970. */
  1971. static int iwl3945_set_ucode_ptrs(struct iwl_priv *priv)
  1972. {
  1973. dma_addr_t pinst;
  1974. dma_addr_t pdata;
  1975. /* bits 31:0 for 3945 */
  1976. pinst = priv->ucode_code.p_addr;
  1977. pdata = priv->ucode_data_backup.p_addr;
  1978. /* Tell bootstrap uCode where to find image to load */
  1979. iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
  1980. iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
  1981. iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
  1982. priv->ucode_data.len);
  1983. /* Inst byte count must be last to set up, bit 31 signals uCode
  1984. * that all new ptr/size info is in place */
  1985. iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
  1986. priv->ucode_code.len | BSM_DRAM_INST_LOAD);
  1987. IWL_DEBUG_INFO(priv, "Runtime uCode pointers are set.\n");
  1988. return 0;
  1989. }
  1990. /**
  1991. * iwl3945_init_alive_start - Called after REPLY_ALIVE notification received
  1992. *
  1993. * Called after REPLY_ALIVE notification received from "initialize" uCode.
  1994. *
  1995. * Tell "initialize" uCode to go ahead and load the runtime uCode.
  1996. */
  1997. static void iwl3945_init_alive_start(struct iwl_priv *priv)
  1998. {
  1999. /* Check alive response for "valid" sign from uCode */
  2000. if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
  2001. /* We had an error bringing up the hardware, so take it
  2002. * all the way back down so we can try again */
  2003. IWL_DEBUG_INFO(priv, "Initialize Alive failed.\n");
  2004. goto restart;
  2005. }
  2006. /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
  2007. * This is a paranoid check, because we would not have gotten the
  2008. * "initialize" alive if code weren't properly loaded. */
  2009. if (iwl3945_verify_ucode(priv)) {
  2010. /* Runtime instruction load was bad;
  2011. * take it all the way back down so we can try again */
  2012. IWL_DEBUG_INFO(priv, "Bad \"initialize\" uCode load.\n");
  2013. goto restart;
  2014. }
  2015. /* Send pointers to protocol/runtime uCode image ... init code will
  2016. * load and launch runtime uCode, which will send us another "Alive"
  2017. * notification. */
  2018. IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
  2019. if (iwl3945_set_ucode_ptrs(priv)) {
  2020. /* Runtime instruction load won't happen;
  2021. * take it all the way back down so we can try again */
  2022. IWL_DEBUG_INFO(priv, "Couldn't set up uCode pointers.\n");
  2023. goto restart;
  2024. }
  2025. return;
  2026. restart:
  2027. queue_work(priv->workqueue, &priv->restart);
  2028. }
  2029. /**
  2030. * iwl3945_alive_start - called after REPLY_ALIVE notification received
  2031. * from protocol/runtime uCode (initialization uCode's
  2032. * Alive gets handled by iwl3945_init_alive_start()).
  2033. */
  2034. static void iwl3945_alive_start(struct iwl_priv *priv)
  2035. {
  2036. int thermal_spin = 0;
  2037. u32 rfkill;
  2038. IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
  2039. if (priv->card_alive.is_valid != UCODE_VALID_OK) {
  2040. /* We had an error bringing up the hardware, so take it
  2041. * all the way back down so we can try again */
  2042. IWL_DEBUG_INFO(priv, "Alive failed.\n");
  2043. goto restart;
  2044. }
  2045. /* Initialize uCode has loaded Runtime uCode ... verify inst image.
  2046. * This is a paranoid check, because we would not have gotten the
  2047. * "runtime" alive if code weren't properly loaded. */
  2048. if (iwl3945_verify_ucode(priv)) {
  2049. /* Runtime instruction load was bad;
  2050. * take it all the way back down so we can try again */
  2051. IWL_DEBUG_INFO(priv, "Bad runtime uCode load.\n");
  2052. goto restart;
  2053. }
  2054. iwl_clear_stations_table(priv);
  2055. rfkill = iwl_read_prph(priv, APMG_RFKILL_REG);
  2056. IWL_DEBUG_INFO(priv, "RFKILL status: 0x%x\n", rfkill);
  2057. if (rfkill & 0x1) {
  2058. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  2059. /* if RFKILL is not on, then wait for thermal
  2060. * sensor in adapter to kick in */
  2061. while (iwl3945_hw_get_temperature(priv) == 0) {
  2062. thermal_spin++;
  2063. udelay(10);
  2064. }
  2065. if (thermal_spin)
  2066. IWL_DEBUG_INFO(priv, "Thermal calibration took %dus\n",
  2067. thermal_spin * 10);
  2068. } else
  2069. set_bit(STATUS_RF_KILL_HW, &priv->status);
  2070. /* After the ALIVE response, we can send commands to 3945 uCode */
  2071. set_bit(STATUS_ALIVE, &priv->status);
  2072. if (iwl_is_rfkill(priv))
  2073. return;
  2074. ieee80211_wake_queues(priv->hw);
  2075. priv->active_rate = priv->rates_mask;
  2076. priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
  2077. iwl_power_update_mode(priv, false);
  2078. if (iwl_is_associated(priv)) {
  2079. struct iwl3945_rxon_cmd *active_rxon =
  2080. (struct iwl3945_rxon_cmd *)(&priv->active_rxon);
  2081. priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
  2082. active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  2083. } else {
  2084. /* Initialize our rx_config data */
  2085. iwl_connection_init_rx_config(priv, priv->iw_mode);
  2086. }
  2087. /* Configure Bluetooth device coexistence support */
  2088. iwl_send_bt_config(priv);
  2089. /* Configure the adapter for unassociated operation */
  2090. iwlcore_commit_rxon(priv);
  2091. iwl3945_reg_txpower_periodic(priv);
  2092. iwl3945_led_register(priv);
  2093. IWL_DEBUG_INFO(priv, "ALIVE processing complete.\n");
  2094. set_bit(STATUS_READY, &priv->status);
  2095. wake_up_interruptible(&priv->wait_command_queue);
  2096. /* reassociate for ADHOC mode */
  2097. if (priv->vif && (priv->iw_mode == NL80211_IFTYPE_ADHOC)) {
  2098. struct sk_buff *beacon = ieee80211_beacon_get(priv->hw,
  2099. priv->vif);
  2100. if (beacon)
  2101. iwl_mac_beacon_update(priv->hw, beacon);
  2102. }
  2103. if (test_and_clear_bit(STATUS_MODE_PENDING, &priv->status))
  2104. iwl_set_mode(priv, priv->iw_mode);
  2105. return;
  2106. restart:
  2107. queue_work(priv->workqueue, &priv->restart);
  2108. }
  2109. static void iwl3945_cancel_deferred_work(struct iwl_priv *priv);
  2110. static void __iwl3945_down(struct iwl_priv *priv)
  2111. {
  2112. unsigned long flags;
  2113. int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
  2114. struct ieee80211_conf *conf = NULL;
  2115. IWL_DEBUG_INFO(priv, DRV_NAME " is going down\n");
  2116. conf = ieee80211_get_hw_conf(priv->hw);
  2117. if (!exit_pending)
  2118. set_bit(STATUS_EXIT_PENDING, &priv->status);
  2119. iwl3945_led_unregister(priv);
  2120. iwl_clear_stations_table(priv);
  2121. /* Unblock any waiting calls */
  2122. wake_up_interruptible_all(&priv->wait_command_queue);
  2123. /* Wipe out the EXIT_PENDING status bit if we are not actually
  2124. * exiting the module */
  2125. if (!exit_pending)
  2126. clear_bit(STATUS_EXIT_PENDING, &priv->status);
  2127. /* stop and reset the on-board processor */
  2128. iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
  2129. /* tell the device to stop sending interrupts */
  2130. spin_lock_irqsave(&priv->lock, flags);
  2131. iwl_disable_interrupts(priv);
  2132. spin_unlock_irqrestore(&priv->lock, flags);
  2133. iwl_synchronize_irq(priv);
  2134. if (priv->mac80211_registered)
  2135. ieee80211_stop_queues(priv->hw);
  2136. /* If we have not previously called iwl3945_init() then
  2137. * clear all bits but the RF Kill bits and return */
  2138. if (!iwl_is_init(priv)) {
  2139. priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
  2140. STATUS_RF_KILL_HW |
  2141. test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
  2142. STATUS_GEO_CONFIGURED |
  2143. test_bit(STATUS_EXIT_PENDING, &priv->status) <<
  2144. STATUS_EXIT_PENDING;
  2145. goto exit;
  2146. }
  2147. /* ...otherwise clear out all the status bits but the RF Kill
  2148. * bit and continue taking the NIC down. */
  2149. priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
  2150. STATUS_RF_KILL_HW |
  2151. test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
  2152. STATUS_GEO_CONFIGURED |
  2153. test_bit(STATUS_FW_ERROR, &priv->status) <<
  2154. STATUS_FW_ERROR |
  2155. test_bit(STATUS_EXIT_PENDING, &priv->status) <<
  2156. STATUS_EXIT_PENDING;
  2157. priv->cfg->ops->lib->apm_ops.reset(priv);
  2158. spin_lock_irqsave(&priv->lock, flags);
  2159. iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  2160. spin_unlock_irqrestore(&priv->lock, flags);
  2161. iwl3945_hw_txq_ctx_stop(priv);
  2162. iwl3945_hw_rxq_stop(priv);
  2163. iwl_write_prph(priv, APMG_CLK_DIS_REG,
  2164. APMG_CLK_VAL_DMA_CLK_RQT);
  2165. udelay(5);
  2166. if (exit_pending)
  2167. priv->cfg->ops->lib->apm_ops.stop(priv);
  2168. else
  2169. priv->cfg->ops->lib->apm_ops.reset(priv);
  2170. exit:
  2171. memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
  2172. if (priv->ibss_beacon)
  2173. dev_kfree_skb(priv->ibss_beacon);
  2174. priv->ibss_beacon = NULL;
  2175. /* clear out any free frames */
  2176. iwl3945_clear_free_frames(priv);
  2177. }
  2178. static void iwl3945_down(struct iwl_priv *priv)
  2179. {
  2180. mutex_lock(&priv->mutex);
  2181. __iwl3945_down(priv);
  2182. mutex_unlock(&priv->mutex);
  2183. iwl3945_cancel_deferred_work(priv);
  2184. }
  2185. #define MAX_HW_RESTARTS 5
  2186. static int __iwl3945_up(struct iwl_priv *priv)
  2187. {
  2188. int rc, i;
  2189. if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  2190. IWL_WARN(priv, "Exit pending; will not bring the NIC up\n");
  2191. return -EIO;
  2192. }
  2193. if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
  2194. IWL_ERR(priv, "ucode not available for device bring up\n");
  2195. return -EIO;
  2196. }
  2197. /* If platform's RF_KILL switch is NOT set to KILL */
  2198. if (iwl_read32(priv, CSR_GP_CNTRL) &
  2199. CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
  2200. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  2201. else {
  2202. set_bit(STATUS_RF_KILL_HW, &priv->status);
  2203. IWL_WARN(priv, "Radio disabled by HW RF Kill switch\n");
  2204. return -ENODEV;
  2205. }
  2206. iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
  2207. rc = iwl3945_hw_nic_init(priv);
  2208. if (rc) {
  2209. IWL_ERR(priv, "Unable to int nic\n");
  2210. return rc;
  2211. }
  2212. /* make sure rfkill handshake bits are cleared */
  2213. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  2214. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
  2215. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  2216. /* clear (again), then enable host interrupts */
  2217. iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
  2218. iwl_enable_interrupts(priv);
  2219. /* really make sure rfkill handshake bits are cleared */
  2220. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  2221. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  2222. /* Copy original ucode data image from disk into backup cache.
  2223. * This will be used to initialize the on-board processor's
  2224. * data SRAM for a clean start when the runtime program first loads. */
  2225. memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
  2226. priv->ucode_data.len);
  2227. /* We return success when we resume from suspend and rf_kill is on. */
  2228. if (test_bit(STATUS_RF_KILL_HW, &priv->status))
  2229. return 0;
  2230. for (i = 0; i < MAX_HW_RESTARTS; i++) {
  2231. iwl_clear_stations_table(priv);
  2232. /* load bootstrap state machine,
  2233. * load bootstrap program into processor's memory,
  2234. * prepare to load the "initialize" uCode */
  2235. priv->cfg->ops->lib->load_ucode(priv);
  2236. if (rc) {
  2237. IWL_ERR(priv,
  2238. "Unable to set up bootstrap uCode: %d\n", rc);
  2239. continue;
  2240. }
  2241. /* start card; "initialize" will load runtime ucode */
  2242. iwl3945_nic_start(priv);
  2243. IWL_DEBUG_INFO(priv, DRV_NAME " is coming up\n");
  2244. return 0;
  2245. }
  2246. set_bit(STATUS_EXIT_PENDING, &priv->status);
  2247. __iwl3945_down(priv);
  2248. clear_bit(STATUS_EXIT_PENDING, &priv->status);
  2249. /* tried to restart and config the device for as long as our
  2250. * patience could withstand */
  2251. IWL_ERR(priv, "Unable to initialize device after %d attempts.\n", i);
  2252. return -EIO;
  2253. }
  2254. /*****************************************************************************
  2255. *
  2256. * Workqueue callbacks
  2257. *
  2258. *****************************************************************************/
  2259. static void iwl3945_bg_init_alive_start(struct work_struct *data)
  2260. {
  2261. struct iwl_priv *priv =
  2262. container_of(data, struct iwl_priv, init_alive_start.work);
  2263. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2264. return;
  2265. mutex_lock(&priv->mutex);
  2266. iwl3945_init_alive_start(priv);
  2267. mutex_unlock(&priv->mutex);
  2268. }
  2269. static void iwl3945_bg_alive_start(struct work_struct *data)
  2270. {
  2271. struct iwl_priv *priv =
  2272. container_of(data, struct iwl_priv, alive_start.work);
  2273. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2274. return;
  2275. mutex_lock(&priv->mutex);
  2276. iwl3945_alive_start(priv);
  2277. mutex_unlock(&priv->mutex);
  2278. }
  2279. static void iwl3945_rfkill_poll(struct work_struct *data)
  2280. {
  2281. struct iwl_priv *priv =
  2282. container_of(data, struct iwl_priv, rfkill_poll.work);
  2283. if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
  2284. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  2285. else
  2286. set_bit(STATUS_RF_KILL_HW, &priv->status);
  2287. wiphy_rfkill_set_hw_state(priv->hw->wiphy,
  2288. test_bit(STATUS_RF_KILL_HW, &priv->status));
  2289. queue_delayed_work(priv->workqueue, &priv->rfkill_poll,
  2290. round_jiffies_relative(2 * HZ));
  2291. }
  2292. #define IWL_SCAN_CHECK_WATCHDOG (7 * HZ)
  2293. static void iwl3945_bg_request_scan(struct work_struct *data)
  2294. {
  2295. struct iwl_priv *priv =
  2296. container_of(data, struct iwl_priv, request_scan);
  2297. struct iwl_host_cmd cmd = {
  2298. .id = REPLY_SCAN_CMD,
  2299. .len = sizeof(struct iwl3945_scan_cmd),
  2300. .flags = CMD_SIZE_HUGE,
  2301. };
  2302. int rc = 0;
  2303. struct iwl3945_scan_cmd *scan;
  2304. struct ieee80211_conf *conf = NULL;
  2305. u8 n_probes = 0;
  2306. enum ieee80211_band band;
  2307. bool is_active = false;
  2308. conf = ieee80211_get_hw_conf(priv->hw);
  2309. mutex_lock(&priv->mutex);
  2310. cancel_delayed_work(&priv->scan_check);
  2311. if (!iwl_is_ready(priv)) {
  2312. IWL_WARN(priv, "request scan called when driver not ready.\n");
  2313. goto done;
  2314. }
  2315. /* Make sure the scan wasn't canceled before this queued work
  2316. * was given the chance to run... */
  2317. if (!test_bit(STATUS_SCANNING, &priv->status))
  2318. goto done;
  2319. /* This should never be called or scheduled if there is currently
  2320. * a scan active in the hardware. */
  2321. if (test_bit(STATUS_SCAN_HW, &priv->status)) {
  2322. IWL_DEBUG_INFO(priv, "Multiple concurrent scan requests "
  2323. "Ignoring second request.\n");
  2324. rc = -EIO;
  2325. goto done;
  2326. }
  2327. if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  2328. IWL_DEBUG_SCAN(priv, "Aborting scan due to device shutdown\n");
  2329. goto done;
  2330. }
  2331. if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  2332. IWL_DEBUG_HC(priv,
  2333. "Scan request while abort pending. Queuing.\n");
  2334. goto done;
  2335. }
  2336. if (iwl_is_rfkill(priv)) {
  2337. IWL_DEBUG_HC(priv, "Aborting scan due to RF Kill activation\n");
  2338. goto done;
  2339. }
  2340. if (!test_bit(STATUS_READY, &priv->status)) {
  2341. IWL_DEBUG_HC(priv,
  2342. "Scan request while uninitialized. Queuing.\n");
  2343. goto done;
  2344. }
  2345. if (!priv->scan_bands) {
  2346. IWL_DEBUG_HC(priv, "Aborting scan due to no requested bands\n");
  2347. goto done;
  2348. }
  2349. if (!priv->scan) {
  2350. priv->scan = kmalloc(sizeof(struct iwl3945_scan_cmd) +
  2351. IWL_MAX_SCAN_SIZE, GFP_KERNEL);
  2352. if (!priv->scan) {
  2353. rc = -ENOMEM;
  2354. goto done;
  2355. }
  2356. }
  2357. scan = priv->scan;
  2358. memset(scan, 0, sizeof(struct iwl3945_scan_cmd) + IWL_MAX_SCAN_SIZE);
  2359. scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH;
  2360. scan->quiet_time = IWL_ACTIVE_QUIET_TIME;
  2361. if (iwl_is_associated(priv)) {
  2362. u16 interval = 0;
  2363. u32 extra;
  2364. u32 suspend_time = 100;
  2365. u32 scan_suspend_time = 100;
  2366. unsigned long flags;
  2367. IWL_DEBUG_INFO(priv, "Scanning while associated...\n");
  2368. spin_lock_irqsave(&priv->lock, flags);
  2369. interval = priv->beacon_int;
  2370. spin_unlock_irqrestore(&priv->lock, flags);
  2371. scan->suspend_time = 0;
  2372. scan->max_out_time = cpu_to_le32(200 * 1024);
  2373. if (!interval)
  2374. interval = suspend_time;
  2375. /*
  2376. * suspend time format:
  2377. * 0-19: beacon interval in usec (time before exec.)
  2378. * 20-23: 0
  2379. * 24-31: number of beacons (suspend between channels)
  2380. */
  2381. extra = (suspend_time / interval) << 24;
  2382. scan_suspend_time = 0xFF0FFFFF &
  2383. (extra | ((suspend_time % interval) * 1024));
  2384. scan->suspend_time = cpu_to_le32(scan_suspend_time);
  2385. IWL_DEBUG_SCAN(priv, "suspend_time 0x%X beacon interval %d\n",
  2386. scan_suspend_time, interval);
  2387. }
  2388. if (priv->scan_request->n_ssids) {
  2389. int i, p = 0;
  2390. IWL_DEBUG_SCAN(priv, "Kicking off active scan\n");
  2391. for (i = 0; i < priv->scan_request->n_ssids; i++) {
  2392. /* always does wildcard anyway */
  2393. if (!priv->scan_request->ssids[i].ssid_len)
  2394. continue;
  2395. scan->direct_scan[p].id = WLAN_EID_SSID;
  2396. scan->direct_scan[p].len =
  2397. priv->scan_request->ssids[i].ssid_len;
  2398. memcpy(scan->direct_scan[p].ssid,
  2399. priv->scan_request->ssids[i].ssid,
  2400. priv->scan_request->ssids[i].ssid_len);
  2401. n_probes++;
  2402. p++;
  2403. }
  2404. is_active = true;
  2405. } else
  2406. IWL_DEBUG_SCAN(priv, "Kicking off passive scan.\n");
  2407. /* We don't build a direct scan probe request; the uCode will do
  2408. * that based on the direct_mask added to each channel entry */
  2409. scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
  2410. scan->tx_cmd.sta_id = priv->hw_params.bcast_sta_id;
  2411. scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  2412. /* flags + rate selection */
  2413. if (priv->scan_bands & BIT(IEEE80211_BAND_2GHZ)) {
  2414. scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
  2415. scan->tx_cmd.rate = IWL_RATE_1M_PLCP;
  2416. scan->good_CRC_th = 0;
  2417. band = IEEE80211_BAND_2GHZ;
  2418. } else if (priv->scan_bands & BIT(IEEE80211_BAND_5GHZ)) {
  2419. scan->tx_cmd.rate = IWL_RATE_6M_PLCP;
  2420. /*
  2421. * If active scaning is requested but a certain channel
  2422. * is marked passive, we can do active scanning if we
  2423. * detect transmissions.
  2424. */
  2425. scan->good_CRC_th = is_active ? IWL_GOOD_CRC_TH : 0;
  2426. band = IEEE80211_BAND_5GHZ;
  2427. } else {
  2428. IWL_WARN(priv, "Invalid scan band count\n");
  2429. goto done;
  2430. }
  2431. scan->tx_cmd.len = cpu_to_le16(
  2432. iwl_fill_probe_req(priv,
  2433. (struct ieee80211_mgmt *)scan->data,
  2434. priv->scan_request->ie,
  2435. priv->scan_request->ie_len,
  2436. IWL_MAX_SCAN_SIZE - sizeof(*scan)));
  2437. /* select Rx antennas */
  2438. scan->flags |= iwl3945_get_antenna_flags(priv);
  2439. if (iwl_is_monitor_mode(priv))
  2440. scan->filter_flags = RXON_FILTER_PROMISC_MSK;
  2441. scan->channel_count =
  2442. iwl3945_get_channels_for_scan(priv, band, is_active, n_probes,
  2443. (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
  2444. if (scan->channel_count == 0) {
  2445. IWL_DEBUG_SCAN(priv, "channel count %d\n", scan->channel_count);
  2446. goto done;
  2447. }
  2448. cmd.len += le16_to_cpu(scan->tx_cmd.len) +
  2449. scan->channel_count * sizeof(struct iwl3945_scan_channel);
  2450. cmd.data = scan;
  2451. scan->len = cpu_to_le16(cmd.len);
  2452. set_bit(STATUS_SCAN_HW, &priv->status);
  2453. rc = iwl_send_cmd_sync(priv, &cmd);
  2454. if (rc)
  2455. goto done;
  2456. queue_delayed_work(priv->workqueue, &priv->scan_check,
  2457. IWL_SCAN_CHECK_WATCHDOG);
  2458. mutex_unlock(&priv->mutex);
  2459. return;
  2460. done:
  2461. /* can not perform scan make sure we clear scanning
  2462. * bits from status so next scan request can be performed.
  2463. * if we dont clear scanning status bit here all next scan
  2464. * will fail
  2465. */
  2466. clear_bit(STATUS_SCAN_HW, &priv->status);
  2467. clear_bit(STATUS_SCANNING, &priv->status);
  2468. /* inform mac80211 scan aborted */
  2469. queue_work(priv->workqueue, &priv->scan_completed);
  2470. mutex_unlock(&priv->mutex);
  2471. }
  2472. static void iwl3945_bg_up(struct work_struct *data)
  2473. {
  2474. struct iwl_priv *priv = container_of(data, struct iwl_priv, up);
  2475. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2476. return;
  2477. mutex_lock(&priv->mutex);
  2478. __iwl3945_up(priv);
  2479. mutex_unlock(&priv->mutex);
  2480. }
  2481. static void iwl3945_bg_restart(struct work_struct *data)
  2482. {
  2483. struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
  2484. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2485. return;
  2486. if (test_and_clear_bit(STATUS_FW_ERROR, &priv->status)) {
  2487. mutex_lock(&priv->mutex);
  2488. priv->vif = NULL;
  2489. priv->is_open = 0;
  2490. mutex_unlock(&priv->mutex);
  2491. iwl3945_down(priv);
  2492. ieee80211_restart_hw(priv->hw);
  2493. } else {
  2494. iwl3945_down(priv);
  2495. queue_work(priv->workqueue, &priv->up);
  2496. }
  2497. }
  2498. static void iwl3945_bg_rx_replenish(struct work_struct *data)
  2499. {
  2500. struct iwl_priv *priv =
  2501. container_of(data, struct iwl_priv, rx_replenish);
  2502. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2503. return;
  2504. mutex_lock(&priv->mutex);
  2505. iwl3945_rx_replenish(priv);
  2506. mutex_unlock(&priv->mutex);
  2507. }
  2508. #define IWL_DELAY_NEXT_SCAN (HZ*2)
  2509. void iwl3945_post_associate(struct iwl_priv *priv)
  2510. {
  2511. int rc = 0;
  2512. struct ieee80211_conf *conf = NULL;
  2513. if (priv->iw_mode == NL80211_IFTYPE_AP) {
  2514. IWL_ERR(priv, "%s Should not be called in AP mode\n", __func__);
  2515. return;
  2516. }
  2517. IWL_DEBUG_ASSOC(priv, "Associated as %d to: %pM\n",
  2518. priv->assoc_id, priv->active_rxon.bssid_addr);
  2519. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2520. return;
  2521. if (!priv->vif || !priv->is_open)
  2522. return;
  2523. iwl_scan_cancel_timeout(priv, 200);
  2524. conf = ieee80211_get_hw_conf(priv->hw);
  2525. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  2526. iwlcore_commit_rxon(priv);
  2527. memset(&priv->rxon_timing, 0, sizeof(struct iwl_rxon_time_cmd));
  2528. iwl_setup_rxon_timing(priv);
  2529. rc = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
  2530. sizeof(priv->rxon_timing), &priv->rxon_timing);
  2531. if (rc)
  2532. IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
  2533. "Attempting to continue.\n");
  2534. priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
  2535. priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
  2536. IWL_DEBUG_ASSOC(priv, "assoc id %d beacon interval %d\n",
  2537. priv->assoc_id, priv->beacon_int);
  2538. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
  2539. priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  2540. else
  2541. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  2542. if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
  2543. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
  2544. priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  2545. else
  2546. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  2547. if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
  2548. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  2549. }
  2550. iwlcore_commit_rxon(priv);
  2551. switch (priv->iw_mode) {
  2552. case NL80211_IFTYPE_STATION:
  2553. iwl3945_rate_scale_init(priv->hw, IWL_AP_ID);
  2554. break;
  2555. case NL80211_IFTYPE_ADHOC:
  2556. priv->assoc_id = 1;
  2557. iwl_add_station(priv, priv->bssid, 0, CMD_SYNC, NULL);
  2558. iwl3945_sync_sta(priv, IWL_STA_ID,
  2559. (priv->band == IEEE80211_BAND_5GHZ) ?
  2560. IWL_RATE_6M_PLCP : IWL_RATE_1M_PLCP,
  2561. CMD_ASYNC);
  2562. iwl3945_rate_scale_init(priv->hw, IWL_STA_ID);
  2563. iwl3945_send_beacon_cmd(priv);
  2564. break;
  2565. default:
  2566. IWL_ERR(priv, "%s Should not be called in %d mode\n",
  2567. __func__, priv->iw_mode);
  2568. break;
  2569. }
  2570. iwl_activate_qos(priv, 0);
  2571. /* we have just associated, don't start scan too early */
  2572. priv->next_scan_jiffies = jiffies + IWL_DELAY_NEXT_SCAN;
  2573. }
  2574. /*****************************************************************************
  2575. *
  2576. * mac80211 entry point functions
  2577. *
  2578. *****************************************************************************/
  2579. #define UCODE_READY_TIMEOUT (2 * HZ)
  2580. static int iwl3945_mac_start(struct ieee80211_hw *hw)
  2581. {
  2582. struct iwl_priv *priv = hw->priv;
  2583. int ret;
  2584. IWL_DEBUG_MAC80211(priv, "enter\n");
  2585. /* we should be verifying the device is ready to be opened */
  2586. mutex_lock(&priv->mutex);
  2587. /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
  2588. * ucode filename and max sizes are card-specific. */
  2589. if (!priv->ucode_code.len) {
  2590. ret = iwl3945_read_ucode(priv);
  2591. if (ret) {
  2592. IWL_ERR(priv, "Could not read microcode: %d\n", ret);
  2593. mutex_unlock(&priv->mutex);
  2594. goto out_release_irq;
  2595. }
  2596. }
  2597. ret = __iwl3945_up(priv);
  2598. mutex_unlock(&priv->mutex);
  2599. if (ret)
  2600. goto out_release_irq;
  2601. IWL_DEBUG_INFO(priv, "Start UP work.\n");
  2602. /* Wait for START_ALIVE from ucode. Otherwise callbacks from
  2603. * mac80211 will not be run successfully. */
  2604. ret = wait_event_interruptible_timeout(priv->wait_command_queue,
  2605. test_bit(STATUS_READY, &priv->status),
  2606. UCODE_READY_TIMEOUT);
  2607. if (!ret) {
  2608. if (!test_bit(STATUS_READY, &priv->status)) {
  2609. IWL_ERR(priv,
  2610. "Wait for START_ALIVE timeout after %dms.\n",
  2611. jiffies_to_msecs(UCODE_READY_TIMEOUT));
  2612. ret = -ETIMEDOUT;
  2613. goto out_release_irq;
  2614. }
  2615. }
  2616. /* ucode is running and will send rfkill notifications,
  2617. * no need to poll the killswitch state anymore */
  2618. cancel_delayed_work(&priv->rfkill_poll);
  2619. priv->is_open = 1;
  2620. IWL_DEBUG_MAC80211(priv, "leave\n");
  2621. return 0;
  2622. out_release_irq:
  2623. priv->is_open = 0;
  2624. IWL_DEBUG_MAC80211(priv, "leave - failed\n");
  2625. return ret;
  2626. }
  2627. static void iwl3945_mac_stop(struct ieee80211_hw *hw)
  2628. {
  2629. struct iwl_priv *priv = hw->priv;
  2630. IWL_DEBUG_MAC80211(priv, "enter\n");
  2631. if (!priv->is_open) {
  2632. IWL_DEBUG_MAC80211(priv, "leave - skip\n");
  2633. return;
  2634. }
  2635. priv->is_open = 0;
  2636. if (iwl_is_ready_rf(priv)) {
  2637. /* stop mac, cancel any scan request and clear
  2638. * RXON_FILTER_ASSOC_MSK BIT
  2639. */
  2640. mutex_lock(&priv->mutex);
  2641. iwl_scan_cancel_timeout(priv, 100);
  2642. mutex_unlock(&priv->mutex);
  2643. }
  2644. iwl3945_down(priv);
  2645. flush_workqueue(priv->workqueue);
  2646. /* start polling the killswitch state again */
  2647. queue_delayed_work(priv->workqueue, &priv->rfkill_poll,
  2648. round_jiffies_relative(2 * HZ));
  2649. IWL_DEBUG_MAC80211(priv, "leave\n");
  2650. }
  2651. static int iwl3945_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
  2652. {
  2653. struct iwl_priv *priv = hw->priv;
  2654. IWL_DEBUG_MAC80211(priv, "enter\n");
  2655. IWL_DEBUG_TX(priv, "dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
  2656. ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
  2657. if (iwl3945_tx_skb(priv, skb))
  2658. dev_kfree_skb_any(skb);
  2659. IWL_DEBUG_MAC80211(priv, "leave\n");
  2660. return NETDEV_TX_OK;
  2661. }
  2662. void iwl3945_config_ap(struct iwl_priv *priv)
  2663. {
  2664. int rc = 0;
  2665. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2666. return;
  2667. /* The following should be done only at AP bring up */
  2668. if (!(iwl_is_associated(priv))) {
  2669. /* RXON - unassoc (to set timing command) */
  2670. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  2671. iwlcore_commit_rxon(priv);
  2672. /* RXON Timing */
  2673. memset(&priv->rxon_timing, 0, sizeof(struct iwl_rxon_time_cmd));
  2674. iwl_setup_rxon_timing(priv);
  2675. rc = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
  2676. sizeof(priv->rxon_timing),
  2677. &priv->rxon_timing);
  2678. if (rc)
  2679. IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
  2680. "Attempting to continue.\n");
  2681. /* FIXME: what should be the assoc_id for AP? */
  2682. priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
  2683. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
  2684. priv->staging_rxon.flags |=
  2685. RXON_FLG_SHORT_PREAMBLE_MSK;
  2686. else
  2687. priv->staging_rxon.flags &=
  2688. ~RXON_FLG_SHORT_PREAMBLE_MSK;
  2689. if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
  2690. if (priv->assoc_capability &
  2691. WLAN_CAPABILITY_SHORT_SLOT_TIME)
  2692. priv->staging_rxon.flags |=
  2693. RXON_FLG_SHORT_SLOT_MSK;
  2694. else
  2695. priv->staging_rxon.flags &=
  2696. ~RXON_FLG_SHORT_SLOT_MSK;
  2697. if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
  2698. priv->staging_rxon.flags &=
  2699. ~RXON_FLG_SHORT_SLOT_MSK;
  2700. }
  2701. /* restore RXON assoc */
  2702. priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
  2703. iwlcore_commit_rxon(priv);
  2704. iwl_add_station(priv, iwl_bcast_addr, 0, CMD_SYNC, NULL);
  2705. }
  2706. iwl3945_send_beacon_cmd(priv);
  2707. /* FIXME - we need to add code here to detect a totally new
  2708. * configuration, reset the AP, unassoc, rxon timing, assoc,
  2709. * clear sta table, add BCAST sta... */
  2710. }
  2711. static int iwl3945_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
  2712. struct ieee80211_vif *vif,
  2713. struct ieee80211_sta *sta,
  2714. struct ieee80211_key_conf *key)
  2715. {
  2716. struct iwl_priv *priv = hw->priv;
  2717. const u8 *addr;
  2718. int ret = 0;
  2719. u8 sta_id = IWL_INVALID_STATION;
  2720. u8 static_key;
  2721. IWL_DEBUG_MAC80211(priv, "enter\n");
  2722. if (iwl3945_mod_params.sw_crypto) {
  2723. IWL_DEBUG_MAC80211(priv, "leave - hwcrypto disabled\n");
  2724. return -EOPNOTSUPP;
  2725. }
  2726. addr = sta ? sta->addr : iwl_bcast_addr;
  2727. static_key = !iwl_is_associated(priv);
  2728. if (!static_key) {
  2729. sta_id = iwl_find_station(priv, addr);
  2730. if (sta_id == IWL_INVALID_STATION) {
  2731. IWL_DEBUG_MAC80211(priv, "leave - %pM not in station map.\n",
  2732. addr);
  2733. return -EINVAL;
  2734. }
  2735. }
  2736. mutex_lock(&priv->mutex);
  2737. iwl_scan_cancel_timeout(priv, 100);
  2738. mutex_unlock(&priv->mutex);
  2739. switch (cmd) {
  2740. case SET_KEY:
  2741. if (static_key)
  2742. ret = iwl3945_set_static_key(priv, key);
  2743. else
  2744. ret = iwl3945_set_dynamic_key(priv, key, sta_id);
  2745. IWL_DEBUG_MAC80211(priv, "enable hwcrypto key\n");
  2746. break;
  2747. case DISABLE_KEY:
  2748. if (static_key)
  2749. ret = iwl3945_remove_static_key(priv);
  2750. else
  2751. ret = iwl3945_clear_sta_key_info(priv, sta_id);
  2752. IWL_DEBUG_MAC80211(priv, "disable hwcrypto key\n");
  2753. break;
  2754. default:
  2755. ret = -EINVAL;
  2756. }
  2757. IWL_DEBUG_MAC80211(priv, "leave\n");
  2758. return ret;
  2759. }
  2760. /*****************************************************************************
  2761. *
  2762. * sysfs attributes
  2763. *
  2764. *****************************************************************************/
  2765. #ifdef CONFIG_IWLWIFI_DEBUG
  2766. /*
  2767. * The following adds a new attribute to the sysfs representation
  2768. * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
  2769. * used for controlling the debug level.
  2770. *
  2771. * See the level definitions in iwl for details.
  2772. *
  2773. * The debug_level being managed using sysfs below is a per device debug
  2774. * level that is used instead of the global debug level if it (the per
  2775. * device debug level) is set.
  2776. */
  2777. static ssize_t show_debug_level(struct device *d,
  2778. struct device_attribute *attr, char *buf)
  2779. {
  2780. struct iwl_priv *priv = dev_get_drvdata(d);
  2781. return sprintf(buf, "0x%08X\n", iwl_get_debug_level(priv));
  2782. }
  2783. static ssize_t store_debug_level(struct device *d,
  2784. struct device_attribute *attr,
  2785. const char *buf, size_t count)
  2786. {
  2787. struct iwl_priv *priv = dev_get_drvdata(d);
  2788. unsigned long val;
  2789. int ret;
  2790. ret = strict_strtoul(buf, 0, &val);
  2791. if (ret)
  2792. IWL_INFO(priv, "%s is not in hex or decimal form.\n", buf);
  2793. else {
  2794. priv->debug_level = val;
  2795. if (iwl_alloc_traffic_mem(priv))
  2796. IWL_ERR(priv,
  2797. "Not enough memory to generate traffic log\n");
  2798. }
  2799. return strnlen(buf, count);
  2800. }
  2801. static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
  2802. show_debug_level, store_debug_level);
  2803. #endif /* CONFIG_IWLWIFI_DEBUG */
  2804. static ssize_t show_temperature(struct device *d,
  2805. struct device_attribute *attr, char *buf)
  2806. {
  2807. struct iwl_priv *priv = dev_get_drvdata(d);
  2808. if (!iwl_is_alive(priv))
  2809. return -EAGAIN;
  2810. return sprintf(buf, "%d\n", iwl3945_hw_get_temperature(priv));
  2811. }
  2812. static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
  2813. static ssize_t show_tx_power(struct device *d,
  2814. struct device_attribute *attr, char *buf)
  2815. {
  2816. struct iwl_priv *priv = dev_get_drvdata(d);
  2817. return sprintf(buf, "%d\n", priv->tx_power_user_lmt);
  2818. }
  2819. static ssize_t store_tx_power(struct device *d,
  2820. struct device_attribute *attr,
  2821. const char *buf, size_t count)
  2822. {
  2823. struct iwl_priv *priv = dev_get_drvdata(d);
  2824. char *p = (char *)buf;
  2825. u32 val;
  2826. val = simple_strtoul(p, &p, 10);
  2827. if (p == buf)
  2828. IWL_INFO(priv, ": %s is not in decimal form.\n", buf);
  2829. else
  2830. iwl3945_hw_reg_set_txpower(priv, val);
  2831. return count;
  2832. }
  2833. static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
  2834. static ssize_t show_flags(struct device *d,
  2835. struct device_attribute *attr, char *buf)
  2836. {
  2837. struct iwl_priv *priv = dev_get_drvdata(d);
  2838. return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
  2839. }
  2840. static ssize_t store_flags(struct device *d,
  2841. struct device_attribute *attr,
  2842. const char *buf, size_t count)
  2843. {
  2844. struct iwl_priv *priv = dev_get_drvdata(d);
  2845. u32 flags = simple_strtoul(buf, NULL, 0);
  2846. mutex_lock(&priv->mutex);
  2847. if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
  2848. /* Cancel any currently running scans... */
  2849. if (iwl_scan_cancel_timeout(priv, 100))
  2850. IWL_WARN(priv, "Could not cancel scan.\n");
  2851. else {
  2852. IWL_DEBUG_INFO(priv, "Committing rxon.flags = 0x%04X\n",
  2853. flags);
  2854. priv->staging_rxon.flags = cpu_to_le32(flags);
  2855. iwlcore_commit_rxon(priv);
  2856. }
  2857. }
  2858. mutex_unlock(&priv->mutex);
  2859. return count;
  2860. }
  2861. static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
  2862. static ssize_t show_filter_flags(struct device *d,
  2863. struct device_attribute *attr, char *buf)
  2864. {
  2865. struct iwl_priv *priv = dev_get_drvdata(d);
  2866. return sprintf(buf, "0x%04X\n",
  2867. le32_to_cpu(priv->active_rxon.filter_flags));
  2868. }
  2869. static ssize_t store_filter_flags(struct device *d,
  2870. struct device_attribute *attr,
  2871. const char *buf, size_t count)
  2872. {
  2873. struct iwl_priv *priv = dev_get_drvdata(d);
  2874. u32 filter_flags = simple_strtoul(buf, NULL, 0);
  2875. mutex_lock(&priv->mutex);
  2876. if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
  2877. /* Cancel any currently running scans... */
  2878. if (iwl_scan_cancel_timeout(priv, 100))
  2879. IWL_WARN(priv, "Could not cancel scan.\n");
  2880. else {
  2881. IWL_DEBUG_INFO(priv, "Committing rxon.filter_flags = "
  2882. "0x%04X\n", filter_flags);
  2883. priv->staging_rxon.filter_flags =
  2884. cpu_to_le32(filter_flags);
  2885. iwlcore_commit_rxon(priv);
  2886. }
  2887. }
  2888. mutex_unlock(&priv->mutex);
  2889. return count;
  2890. }
  2891. static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
  2892. store_filter_flags);
  2893. #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
  2894. static ssize_t show_measurement(struct device *d,
  2895. struct device_attribute *attr, char *buf)
  2896. {
  2897. struct iwl_priv *priv = dev_get_drvdata(d);
  2898. struct iwl_spectrum_notification measure_report;
  2899. u32 size = sizeof(measure_report), len = 0, ofs = 0;
  2900. u8 *data = (u8 *)&measure_report;
  2901. unsigned long flags;
  2902. spin_lock_irqsave(&priv->lock, flags);
  2903. if (!(priv->measurement_status & MEASUREMENT_READY)) {
  2904. spin_unlock_irqrestore(&priv->lock, flags);
  2905. return 0;
  2906. }
  2907. memcpy(&measure_report, &priv->measure_report, size);
  2908. priv->measurement_status = 0;
  2909. spin_unlock_irqrestore(&priv->lock, flags);
  2910. while (size && (PAGE_SIZE - len)) {
  2911. hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
  2912. PAGE_SIZE - len, 1);
  2913. len = strlen(buf);
  2914. if (PAGE_SIZE - len)
  2915. buf[len++] = '\n';
  2916. ofs += 16;
  2917. size -= min(size, 16U);
  2918. }
  2919. return len;
  2920. }
  2921. static ssize_t store_measurement(struct device *d,
  2922. struct device_attribute *attr,
  2923. const char *buf, size_t count)
  2924. {
  2925. struct iwl_priv *priv = dev_get_drvdata(d);
  2926. struct ieee80211_measurement_params params = {
  2927. .channel = le16_to_cpu(priv->active_rxon.channel),
  2928. .start_time = cpu_to_le64(priv->last_tsf),
  2929. .duration = cpu_to_le16(1),
  2930. };
  2931. u8 type = IWL_MEASURE_BASIC;
  2932. u8 buffer[32];
  2933. u8 channel;
  2934. if (count) {
  2935. char *p = buffer;
  2936. strncpy(buffer, buf, min(sizeof(buffer), count));
  2937. channel = simple_strtoul(p, NULL, 0);
  2938. if (channel)
  2939. params.channel = channel;
  2940. p = buffer;
  2941. while (*p && *p != ' ')
  2942. p++;
  2943. if (*p)
  2944. type = simple_strtoul(p + 1, NULL, 0);
  2945. }
  2946. IWL_DEBUG_INFO(priv, "Invoking measurement of type %d on "
  2947. "channel %d (for '%s')\n", type, params.channel, buf);
  2948. iwl3945_get_measurement(priv, &params, type);
  2949. return count;
  2950. }
  2951. static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR,
  2952. show_measurement, store_measurement);
  2953. #endif /* CONFIG_IWL3945_SPECTRUM_MEASUREMENT */
  2954. static ssize_t store_retry_rate(struct device *d,
  2955. struct device_attribute *attr,
  2956. const char *buf, size_t count)
  2957. {
  2958. struct iwl_priv *priv = dev_get_drvdata(d);
  2959. priv->retry_rate = simple_strtoul(buf, NULL, 0);
  2960. if (priv->retry_rate <= 0)
  2961. priv->retry_rate = 1;
  2962. return count;
  2963. }
  2964. static ssize_t show_retry_rate(struct device *d,
  2965. struct device_attribute *attr, char *buf)
  2966. {
  2967. struct iwl_priv *priv = dev_get_drvdata(d);
  2968. return sprintf(buf, "%d", priv->retry_rate);
  2969. }
  2970. static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate,
  2971. store_retry_rate);
  2972. static ssize_t show_channels(struct device *d,
  2973. struct device_attribute *attr, char *buf)
  2974. {
  2975. /* all this shit doesn't belong into sysfs anyway */
  2976. return 0;
  2977. }
  2978. static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL);
  2979. static ssize_t show_statistics(struct device *d,
  2980. struct device_attribute *attr, char *buf)
  2981. {
  2982. struct iwl_priv *priv = dev_get_drvdata(d);
  2983. u32 size = sizeof(struct iwl3945_notif_statistics);
  2984. u32 len = 0, ofs = 0;
  2985. u8 *data = (u8 *)&priv->statistics_39;
  2986. int rc = 0;
  2987. if (!iwl_is_alive(priv))
  2988. return -EAGAIN;
  2989. mutex_lock(&priv->mutex);
  2990. rc = iwl_send_statistics_request(priv, 0);
  2991. mutex_unlock(&priv->mutex);
  2992. if (rc) {
  2993. len = sprintf(buf,
  2994. "Error sending statistics request: 0x%08X\n", rc);
  2995. return len;
  2996. }
  2997. while (size && (PAGE_SIZE - len)) {
  2998. hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
  2999. PAGE_SIZE - len, 1);
  3000. len = strlen(buf);
  3001. if (PAGE_SIZE - len)
  3002. buf[len++] = '\n';
  3003. ofs += 16;
  3004. size -= min(size, 16U);
  3005. }
  3006. return len;
  3007. }
  3008. static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
  3009. static ssize_t show_antenna(struct device *d,
  3010. struct device_attribute *attr, char *buf)
  3011. {
  3012. struct iwl_priv *priv = dev_get_drvdata(d);
  3013. if (!iwl_is_alive(priv))
  3014. return -EAGAIN;
  3015. return sprintf(buf, "%d\n", iwl3945_mod_params.antenna);
  3016. }
  3017. static ssize_t store_antenna(struct device *d,
  3018. struct device_attribute *attr,
  3019. const char *buf, size_t count)
  3020. {
  3021. struct iwl_priv *priv __maybe_unused = dev_get_drvdata(d);
  3022. int ant;
  3023. if (count == 0)
  3024. return 0;
  3025. if (sscanf(buf, "%1i", &ant) != 1) {
  3026. IWL_DEBUG_INFO(priv, "not in hex or decimal form.\n");
  3027. return count;
  3028. }
  3029. if ((ant >= 0) && (ant <= 2)) {
  3030. IWL_DEBUG_INFO(priv, "Setting antenna select to %d.\n", ant);
  3031. iwl3945_mod_params.antenna = (enum iwl3945_antenna)ant;
  3032. } else
  3033. IWL_DEBUG_INFO(priv, "Bad antenna select value %d.\n", ant);
  3034. return count;
  3035. }
  3036. static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, show_antenna, store_antenna);
  3037. static ssize_t show_status(struct device *d,
  3038. struct device_attribute *attr, char *buf)
  3039. {
  3040. struct iwl_priv *priv = dev_get_drvdata(d);
  3041. if (!iwl_is_alive(priv))
  3042. return -EAGAIN;
  3043. return sprintf(buf, "0x%08x\n", (int)priv->status);
  3044. }
  3045. static DEVICE_ATTR(status, S_IRUGO, show_status, NULL);
  3046. static ssize_t dump_error_log(struct device *d,
  3047. struct device_attribute *attr,
  3048. const char *buf, size_t count)
  3049. {
  3050. struct iwl_priv *priv = dev_get_drvdata(d);
  3051. char *p = (char *)buf;
  3052. if (p[0] == '1')
  3053. iwl3945_dump_nic_error_log(priv);
  3054. return strnlen(buf, count);
  3055. }
  3056. static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, dump_error_log);
  3057. /*****************************************************************************
  3058. *
  3059. * driver setup and tear down
  3060. *
  3061. *****************************************************************************/
  3062. static void iwl3945_setup_deferred_work(struct iwl_priv *priv)
  3063. {
  3064. priv->workqueue = create_singlethread_workqueue(DRV_NAME);
  3065. init_waitqueue_head(&priv->wait_command_queue);
  3066. INIT_WORK(&priv->up, iwl3945_bg_up);
  3067. INIT_WORK(&priv->restart, iwl3945_bg_restart);
  3068. INIT_WORK(&priv->rx_replenish, iwl3945_bg_rx_replenish);
  3069. INIT_WORK(&priv->beacon_update, iwl3945_bg_beacon_update);
  3070. INIT_DELAYED_WORK(&priv->init_alive_start, iwl3945_bg_init_alive_start);
  3071. INIT_DELAYED_WORK(&priv->alive_start, iwl3945_bg_alive_start);
  3072. INIT_DELAYED_WORK(&priv->rfkill_poll, iwl3945_rfkill_poll);
  3073. INIT_WORK(&priv->scan_completed, iwl_bg_scan_completed);
  3074. INIT_WORK(&priv->request_scan, iwl3945_bg_request_scan);
  3075. INIT_WORK(&priv->abort_scan, iwl_bg_abort_scan);
  3076. INIT_DELAYED_WORK(&priv->scan_check, iwl_bg_scan_check);
  3077. iwl3945_hw_setup_deferred_work(priv);
  3078. tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
  3079. iwl3945_irq_tasklet, (unsigned long)priv);
  3080. }
  3081. static void iwl3945_cancel_deferred_work(struct iwl_priv *priv)
  3082. {
  3083. iwl3945_hw_cancel_deferred_work(priv);
  3084. cancel_delayed_work_sync(&priv->init_alive_start);
  3085. cancel_delayed_work(&priv->scan_check);
  3086. cancel_delayed_work(&priv->alive_start);
  3087. cancel_work_sync(&priv->beacon_update);
  3088. }
  3089. static struct attribute *iwl3945_sysfs_entries[] = {
  3090. &dev_attr_antenna.attr,
  3091. &dev_attr_channels.attr,
  3092. &dev_attr_dump_errors.attr,
  3093. &dev_attr_flags.attr,
  3094. &dev_attr_filter_flags.attr,
  3095. #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
  3096. &dev_attr_measurement.attr,
  3097. #endif
  3098. &dev_attr_retry_rate.attr,
  3099. &dev_attr_statistics.attr,
  3100. &dev_attr_status.attr,
  3101. &dev_attr_temperature.attr,
  3102. &dev_attr_tx_power.attr,
  3103. #ifdef CONFIG_IWLWIFI_DEBUG
  3104. &dev_attr_debug_level.attr,
  3105. #endif
  3106. NULL
  3107. };
  3108. static struct attribute_group iwl3945_attribute_group = {
  3109. .name = NULL, /* put in device directory */
  3110. .attrs = iwl3945_sysfs_entries,
  3111. };
  3112. static struct ieee80211_ops iwl3945_hw_ops = {
  3113. .tx = iwl3945_mac_tx,
  3114. .start = iwl3945_mac_start,
  3115. .stop = iwl3945_mac_stop,
  3116. .add_interface = iwl_mac_add_interface,
  3117. .remove_interface = iwl_mac_remove_interface,
  3118. .config = iwl_mac_config,
  3119. .configure_filter = iwl_configure_filter,
  3120. .set_key = iwl3945_mac_set_key,
  3121. .get_tx_stats = iwl_mac_get_tx_stats,
  3122. .conf_tx = iwl_mac_conf_tx,
  3123. .reset_tsf = iwl_mac_reset_tsf,
  3124. .bss_info_changed = iwl_bss_info_changed,
  3125. .hw_scan = iwl_mac_hw_scan
  3126. };
  3127. static int iwl3945_init_drv(struct iwl_priv *priv)
  3128. {
  3129. int ret;
  3130. struct iwl3945_eeprom *eeprom = (struct iwl3945_eeprom *)priv->eeprom;
  3131. priv->retry_rate = 1;
  3132. priv->ibss_beacon = NULL;
  3133. spin_lock_init(&priv->lock);
  3134. spin_lock_init(&priv->sta_lock);
  3135. spin_lock_init(&priv->hcmd_lock);
  3136. INIT_LIST_HEAD(&priv->free_frames);
  3137. mutex_init(&priv->mutex);
  3138. /* Clear the driver's (not device's) station table */
  3139. iwl_clear_stations_table(priv);
  3140. priv->data_retry_limit = -1;
  3141. priv->ieee_channels = NULL;
  3142. priv->ieee_rates = NULL;
  3143. priv->band = IEEE80211_BAND_2GHZ;
  3144. priv->iw_mode = NL80211_IFTYPE_STATION;
  3145. iwl_reset_qos(priv);
  3146. priv->qos_data.qos_active = 0;
  3147. priv->qos_data.qos_cap.val = 0;
  3148. priv->rates_mask = IWL_RATES_MASK;
  3149. priv->tx_power_user_lmt = IWL_DEFAULT_TX_POWER;
  3150. if (eeprom->version < EEPROM_3945_EEPROM_VERSION) {
  3151. IWL_WARN(priv, "Unsupported EEPROM version: 0x%04X\n",
  3152. eeprom->version);
  3153. ret = -EINVAL;
  3154. goto err;
  3155. }
  3156. ret = iwl_init_channel_map(priv);
  3157. if (ret) {
  3158. IWL_ERR(priv, "initializing regulatory failed: %d\n", ret);
  3159. goto err;
  3160. }
  3161. /* Set up txpower settings in driver for all channels */
  3162. if (iwl3945_txpower_set_from_eeprom(priv)) {
  3163. ret = -EIO;
  3164. goto err_free_channel_map;
  3165. }
  3166. ret = iwlcore_init_geos(priv);
  3167. if (ret) {
  3168. IWL_ERR(priv, "initializing geos failed: %d\n", ret);
  3169. goto err_free_channel_map;
  3170. }
  3171. iwl3945_init_hw_rates(priv, priv->ieee_rates);
  3172. return 0;
  3173. err_free_channel_map:
  3174. iwl_free_channel_map(priv);
  3175. err:
  3176. return ret;
  3177. }
  3178. static int iwl3945_setup_mac(struct iwl_priv *priv)
  3179. {
  3180. int ret;
  3181. struct ieee80211_hw *hw = priv->hw;
  3182. hw->rate_control_algorithm = "iwl-3945-rs";
  3183. hw->sta_data_size = sizeof(struct iwl3945_sta_priv);
  3184. /* Tell mac80211 our characteristics */
  3185. hw->flags = IEEE80211_HW_SIGNAL_DBM |
  3186. IEEE80211_HW_NOISE_DBM |
  3187. IEEE80211_HW_SPECTRUM_MGMT |
  3188. IEEE80211_HW_SUPPORTS_PS |
  3189. IEEE80211_HW_SUPPORTS_DYNAMIC_PS;
  3190. hw->wiphy->interface_modes =
  3191. BIT(NL80211_IFTYPE_STATION) |
  3192. BIT(NL80211_IFTYPE_ADHOC);
  3193. hw->wiphy->custom_regulatory = true;
  3194. /* Firmware does not support this */
  3195. hw->wiphy->disable_beacon_hints = true;
  3196. hw->wiphy->max_scan_ssids = PROBE_OPTION_MAX_3945;
  3197. /* we create the 802.11 header and a zero-length SSID element */
  3198. hw->wiphy->max_scan_ie_len = IWL_MAX_PROBE_REQUEST - 24 - 2;
  3199. /* Default value; 4 EDCA QOS priorities */
  3200. hw->queues = 4;
  3201. if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
  3202. priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
  3203. &priv->bands[IEEE80211_BAND_2GHZ];
  3204. if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
  3205. priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
  3206. &priv->bands[IEEE80211_BAND_5GHZ];
  3207. ret = ieee80211_register_hw(priv->hw);
  3208. if (ret) {
  3209. IWL_ERR(priv, "Failed to register hw (error %d)\n", ret);
  3210. return ret;
  3211. }
  3212. priv->mac80211_registered = 1;
  3213. return 0;
  3214. }
  3215. static int iwl3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  3216. {
  3217. int err = 0;
  3218. struct iwl_priv *priv;
  3219. struct ieee80211_hw *hw;
  3220. struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
  3221. struct iwl3945_eeprom *eeprom;
  3222. unsigned long flags;
  3223. /***********************
  3224. * 1. Allocating HW data
  3225. * ********************/
  3226. /* mac80211 allocates memory for this device instance, including
  3227. * space for this driver's private structure */
  3228. hw = iwl_alloc_all(cfg, &iwl3945_hw_ops);
  3229. if (hw == NULL) {
  3230. printk(KERN_ERR DRV_NAME "Can not allocate network device\n");
  3231. err = -ENOMEM;
  3232. goto out;
  3233. }
  3234. priv = hw->priv;
  3235. SET_IEEE80211_DEV(hw, &pdev->dev);
  3236. /*
  3237. * Disabling hardware scan means that mac80211 will perform scans
  3238. * "the hard way", rather than using device's scan.
  3239. */
  3240. if (iwl3945_mod_params.disable_hw_scan) {
  3241. IWL_DEBUG_INFO(priv, "Disabling hw_scan\n");
  3242. iwl3945_hw_ops.hw_scan = NULL;
  3243. }
  3244. IWL_DEBUG_INFO(priv, "*** LOAD DRIVER ***\n");
  3245. priv->cfg = cfg;
  3246. priv->pci_dev = pdev;
  3247. priv->inta_mask = CSR_INI_SET_MASK;
  3248. #ifdef CONFIG_IWLWIFI_DEBUG
  3249. atomic_set(&priv->restrict_refcnt, 0);
  3250. #endif
  3251. if (iwl_alloc_traffic_mem(priv))
  3252. IWL_ERR(priv, "Not enough memory to generate traffic log\n");
  3253. /***************************
  3254. * 2. Initializing PCI bus
  3255. * *************************/
  3256. if (pci_enable_device(pdev)) {
  3257. err = -ENODEV;
  3258. goto out_ieee80211_free_hw;
  3259. }
  3260. pci_set_master(pdev);
  3261. err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
  3262. if (!err)
  3263. err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
  3264. if (err) {
  3265. IWL_WARN(priv, "No suitable DMA available.\n");
  3266. goto out_pci_disable_device;
  3267. }
  3268. pci_set_drvdata(pdev, priv);
  3269. err = pci_request_regions(pdev, DRV_NAME);
  3270. if (err)
  3271. goto out_pci_disable_device;
  3272. /***********************
  3273. * 3. Read REV Register
  3274. * ********************/
  3275. priv->hw_base = pci_iomap(pdev, 0, 0);
  3276. if (!priv->hw_base) {
  3277. err = -ENODEV;
  3278. goto out_pci_release_regions;
  3279. }
  3280. IWL_DEBUG_INFO(priv, "pci_resource_len = 0x%08llx\n",
  3281. (unsigned long long) pci_resource_len(pdev, 0));
  3282. IWL_DEBUG_INFO(priv, "pci_resource_base = %p\n", priv->hw_base);
  3283. /* We disable the RETRY_TIMEOUT register (0x41) to keep
  3284. * PCI Tx retries from interfering with C3 CPU state */
  3285. pci_write_config_byte(pdev, 0x41, 0x00);
  3286. /* this spin lock will be used in apm_ops.init and EEPROM access
  3287. * we should init now
  3288. */
  3289. spin_lock_init(&priv->reg_lock);
  3290. /* amp init */
  3291. err = priv->cfg->ops->lib->apm_ops.init(priv);
  3292. if (err < 0) {
  3293. IWL_DEBUG_INFO(priv, "Failed to init the card\n");
  3294. goto out_iounmap;
  3295. }
  3296. /***********************
  3297. * 4. Read EEPROM
  3298. * ********************/
  3299. /* Read the EEPROM */
  3300. err = iwl_eeprom_init(priv);
  3301. if (err) {
  3302. IWL_ERR(priv, "Unable to init EEPROM\n");
  3303. goto out_iounmap;
  3304. }
  3305. /* MAC Address location in EEPROM same for 3945/4965 */
  3306. eeprom = (struct iwl3945_eeprom *)priv->eeprom;
  3307. memcpy(priv->mac_addr, eeprom->mac_address, ETH_ALEN);
  3308. IWL_DEBUG_INFO(priv, "MAC address: %pM\n", priv->mac_addr);
  3309. SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
  3310. /***********************
  3311. * 5. Setup HW Constants
  3312. * ********************/
  3313. /* Device-specific setup */
  3314. if (iwl3945_hw_set_hw_params(priv)) {
  3315. IWL_ERR(priv, "failed to set hw settings\n");
  3316. goto out_eeprom_free;
  3317. }
  3318. /***********************
  3319. * 6. Setup priv
  3320. * ********************/
  3321. err = iwl3945_init_drv(priv);
  3322. if (err) {
  3323. IWL_ERR(priv, "initializing driver failed\n");
  3324. goto out_unset_hw_params;
  3325. }
  3326. IWL_INFO(priv, "Detected Intel Wireless WiFi Link %s\n",
  3327. priv->cfg->name);
  3328. /***********************
  3329. * 7. Setup Services
  3330. * ********************/
  3331. spin_lock_irqsave(&priv->lock, flags);
  3332. iwl_disable_interrupts(priv);
  3333. spin_unlock_irqrestore(&priv->lock, flags);
  3334. pci_enable_msi(priv->pci_dev);
  3335. err = request_irq(priv->pci_dev->irq, priv->cfg->ops->lib->isr,
  3336. IRQF_SHARED, DRV_NAME, priv);
  3337. if (err) {
  3338. IWL_ERR(priv, "Error allocating IRQ %d\n", priv->pci_dev->irq);
  3339. goto out_disable_msi;
  3340. }
  3341. err = sysfs_create_group(&pdev->dev.kobj, &iwl3945_attribute_group);
  3342. if (err) {
  3343. IWL_ERR(priv, "failed to create sysfs device attributes\n");
  3344. goto out_release_irq;
  3345. }
  3346. iwl_set_rxon_channel(priv,
  3347. &priv->bands[IEEE80211_BAND_2GHZ].channels[5]);
  3348. iwl3945_setup_deferred_work(priv);
  3349. iwl3945_setup_rx_handlers(priv);
  3350. /*********************************
  3351. * 8. Setup and Register mac80211
  3352. * *******************************/
  3353. iwl_enable_interrupts(priv);
  3354. err = iwl3945_setup_mac(priv);
  3355. if (err)
  3356. goto out_remove_sysfs;
  3357. err = iwl_dbgfs_register(priv, DRV_NAME);
  3358. if (err)
  3359. IWL_ERR(priv, "failed to create debugfs files. Ignoring error: %d\n", err);
  3360. /* Start monitoring the killswitch */
  3361. queue_delayed_work(priv->workqueue, &priv->rfkill_poll,
  3362. 2 * HZ);
  3363. return 0;
  3364. out_remove_sysfs:
  3365. destroy_workqueue(priv->workqueue);
  3366. priv->workqueue = NULL;
  3367. sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
  3368. out_release_irq:
  3369. free_irq(priv->pci_dev->irq, priv);
  3370. out_disable_msi:
  3371. pci_disable_msi(priv->pci_dev);
  3372. iwlcore_free_geos(priv);
  3373. iwl_free_channel_map(priv);
  3374. out_unset_hw_params:
  3375. iwl3945_unset_hw_params(priv);
  3376. out_eeprom_free:
  3377. iwl_eeprom_free(priv);
  3378. out_iounmap:
  3379. pci_iounmap(pdev, priv->hw_base);
  3380. out_pci_release_regions:
  3381. pci_release_regions(pdev);
  3382. out_pci_disable_device:
  3383. pci_set_drvdata(pdev, NULL);
  3384. pci_disable_device(pdev);
  3385. out_ieee80211_free_hw:
  3386. iwl_free_traffic_mem(priv);
  3387. ieee80211_free_hw(priv->hw);
  3388. out:
  3389. return err;
  3390. }
  3391. static void __devexit iwl3945_pci_remove(struct pci_dev *pdev)
  3392. {
  3393. struct iwl_priv *priv = pci_get_drvdata(pdev);
  3394. unsigned long flags;
  3395. if (!priv)
  3396. return;
  3397. IWL_DEBUG_INFO(priv, "*** UNLOAD DRIVER ***\n");
  3398. iwl_dbgfs_unregister(priv);
  3399. set_bit(STATUS_EXIT_PENDING, &priv->status);
  3400. if (priv->mac80211_registered) {
  3401. ieee80211_unregister_hw(priv->hw);
  3402. priv->mac80211_registered = 0;
  3403. } else {
  3404. iwl3945_down(priv);
  3405. }
  3406. /* make sure we flush any pending irq or
  3407. * tasklet for the driver
  3408. */
  3409. spin_lock_irqsave(&priv->lock, flags);
  3410. iwl_disable_interrupts(priv);
  3411. spin_unlock_irqrestore(&priv->lock, flags);
  3412. iwl_synchronize_irq(priv);
  3413. sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
  3414. cancel_delayed_work_sync(&priv->rfkill_poll);
  3415. iwl3945_dealloc_ucode_pci(priv);
  3416. if (priv->rxq.bd)
  3417. iwl3945_rx_queue_free(priv, &priv->rxq);
  3418. iwl3945_hw_txq_ctx_free(priv);
  3419. iwl3945_unset_hw_params(priv);
  3420. iwl_clear_stations_table(priv);
  3421. /*netif_stop_queue(dev); */
  3422. flush_workqueue(priv->workqueue);
  3423. /* ieee80211_unregister_hw calls iwl3945_mac_stop, which flushes
  3424. * priv->workqueue... so we can't take down the workqueue
  3425. * until now... */
  3426. destroy_workqueue(priv->workqueue);
  3427. priv->workqueue = NULL;
  3428. iwl_free_traffic_mem(priv);
  3429. free_irq(pdev->irq, priv);
  3430. pci_disable_msi(pdev);
  3431. pci_iounmap(pdev, priv->hw_base);
  3432. pci_release_regions(pdev);
  3433. pci_disable_device(pdev);
  3434. pci_set_drvdata(pdev, NULL);
  3435. iwl_free_channel_map(priv);
  3436. iwlcore_free_geos(priv);
  3437. kfree(priv->scan);
  3438. if (priv->ibss_beacon)
  3439. dev_kfree_skb(priv->ibss_beacon);
  3440. ieee80211_free_hw(priv->hw);
  3441. }
  3442. /*****************************************************************************
  3443. *
  3444. * driver and module entry point
  3445. *
  3446. *****************************************************************************/
  3447. static struct pci_driver iwl3945_driver = {
  3448. .name = DRV_NAME,
  3449. .id_table = iwl3945_hw_card_ids,
  3450. .probe = iwl3945_pci_probe,
  3451. .remove = __devexit_p(iwl3945_pci_remove),
  3452. #ifdef CONFIG_PM
  3453. .suspend = iwl_pci_suspend,
  3454. .resume = iwl_pci_resume,
  3455. #endif
  3456. };
  3457. static int __init iwl3945_init(void)
  3458. {
  3459. int ret;
  3460. printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
  3461. printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
  3462. ret = iwl3945_rate_control_register();
  3463. if (ret) {
  3464. printk(KERN_ERR DRV_NAME
  3465. "Unable to register rate control algorithm: %d\n", ret);
  3466. return ret;
  3467. }
  3468. ret = pci_register_driver(&iwl3945_driver);
  3469. if (ret) {
  3470. printk(KERN_ERR DRV_NAME "Unable to initialize PCI module\n");
  3471. goto error_register;
  3472. }
  3473. return ret;
  3474. error_register:
  3475. iwl3945_rate_control_unregister();
  3476. return ret;
  3477. }
  3478. static void __exit iwl3945_exit(void)
  3479. {
  3480. pci_unregister_driver(&iwl3945_driver);
  3481. iwl3945_rate_control_unregister();
  3482. }
  3483. MODULE_FIRMWARE(IWL3945_MODULE_FIRMWARE(IWL3945_UCODE_API_MAX));
  3484. module_param_named(antenna, iwl3945_mod_params.antenna, int, 0444);
  3485. MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
  3486. module_param_named(swcrypto, iwl3945_mod_params.sw_crypto, int, 0444);
  3487. MODULE_PARM_DESC(swcrypto,
  3488. "using software crypto (default 1 [software])\n");
  3489. #ifdef CONFIG_IWLWIFI_DEBUG
  3490. module_param_named(debug, iwl_debug_level, uint, 0644);
  3491. MODULE_PARM_DESC(debug, "debug output mask");
  3492. #endif
  3493. module_param_named(disable_hw_scan, iwl3945_mod_params.disable_hw_scan, int, 0444);
  3494. MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
  3495. module_param_named(fw_restart3945, iwl3945_mod_params.restart_fw, int, 0444);
  3496. MODULE_PARM_DESC(fw_restart3945, "restart firmware in case of error");
  3497. module_exit(iwl3945_exit);
  3498. module_init(iwl3945_init);