iwl-core.c 86 KB

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  1. /******************************************************************************
  2. *
  3. * GPL LICENSE SUMMARY
  4. *
  5. * Copyright(c) 2008 - 2009 Intel Corporation. All rights reserved.
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of version 2 of the GNU General Public License as
  9. * published by the Free Software Foundation.
  10. *
  11. * This program is distributed in the hope that it will be useful, but
  12. * WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  14. * General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
  19. * USA
  20. *
  21. * The full GNU General Public License is included in this distribution
  22. * in the file called LICENSE.GPL.
  23. *
  24. * Contact Information:
  25. * Intel Linux Wireless <ilw@linux.intel.com>
  26. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27. *****************************************************************************/
  28. #include <linux/kernel.h>
  29. #include <linux/module.h>
  30. #include <linux/etherdevice.h>
  31. #include <linux/sched.h>
  32. #include <net/mac80211.h>
  33. #include "iwl-eeprom.h"
  34. #include "iwl-dev.h" /* FIXME: remove */
  35. #include "iwl-debug.h"
  36. #include "iwl-core.h"
  37. #include "iwl-io.h"
  38. #include "iwl-power.h"
  39. #include "iwl-sta.h"
  40. #include "iwl-helpers.h"
  41. MODULE_DESCRIPTION("iwl core");
  42. MODULE_VERSION(IWLWIFI_VERSION);
  43. MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
  44. MODULE_LICENSE("GPL");
  45. #define IWL_DECLARE_RATE_INFO(r, s, ip, in, rp, rn, pp, np) \
  46. [IWL_RATE_##r##M_INDEX] = { IWL_RATE_##r##M_PLCP, \
  47. IWL_RATE_SISO_##s##M_PLCP, \
  48. IWL_RATE_MIMO2_##s##M_PLCP,\
  49. IWL_RATE_MIMO3_##s##M_PLCP,\
  50. IWL_RATE_##r##M_IEEE, \
  51. IWL_RATE_##ip##M_INDEX, \
  52. IWL_RATE_##in##M_INDEX, \
  53. IWL_RATE_##rp##M_INDEX, \
  54. IWL_RATE_##rn##M_INDEX, \
  55. IWL_RATE_##pp##M_INDEX, \
  56. IWL_RATE_##np##M_INDEX }
  57. u32 iwl_debug_level;
  58. EXPORT_SYMBOL(iwl_debug_level);
  59. static irqreturn_t iwl_isr(int irq, void *data);
  60. /*
  61. * Parameter order:
  62. * rate, ht rate, prev rate, next rate, prev tgg rate, next tgg rate
  63. *
  64. * If there isn't a valid next or previous rate then INV is used which
  65. * maps to IWL_RATE_INVALID
  66. *
  67. */
  68. const struct iwl_rate_info iwl_rates[IWL_RATE_COUNT] = {
  69. IWL_DECLARE_RATE_INFO(1, INV, INV, 2, INV, 2, INV, 2), /* 1mbps */
  70. IWL_DECLARE_RATE_INFO(2, INV, 1, 5, 1, 5, 1, 5), /* 2mbps */
  71. IWL_DECLARE_RATE_INFO(5, INV, 2, 6, 2, 11, 2, 11), /*5.5mbps */
  72. IWL_DECLARE_RATE_INFO(11, INV, 9, 12, 9, 12, 5, 18), /* 11mbps */
  73. IWL_DECLARE_RATE_INFO(6, 6, 5, 9, 5, 11, 5, 11), /* 6mbps */
  74. IWL_DECLARE_RATE_INFO(9, 6, 6, 11, 6, 11, 5, 11), /* 9mbps */
  75. IWL_DECLARE_RATE_INFO(12, 12, 11, 18, 11, 18, 11, 18), /* 12mbps */
  76. IWL_DECLARE_RATE_INFO(18, 18, 12, 24, 12, 24, 11, 24), /* 18mbps */
  77. IWL_DECLARE_RATE_INFO(24, 24, 18, 36, 18, 36, 18, 36), /* 24mbps */
  78. IWL_DECLARE_RATE_INFO(36, 36, 24, 48, 24, 48, 24, 48), /* 36mbps */
  79. IWL_DECLARE_RATE_INFO(48, 48, 36, 54, 36, 54, 36, 54), /* 48mbps */
  80. IWL_DECLARE_RATE_INFO(54, 54, 48, INV, 48, INV, 48, INV),/* 54mbps */
  81. IWL_DECLARE_RATE_INFO(60, 60, 48, INV, 48, INV, 48, INV),/* 60mbps */
  82. /* FIXME:RS: ^^ should be INV (legacy) */
  83. };
  84. EXPORT_SYMBOL(iwl_rates);
  85. /**
  86. * translate ucode response to mac80211 tx status control values
  87. */
  88. void iwl_hwrate_to_tx_control(struct iwl_priv *priv, u32 rate_n_flags,
  89. struct ieee80211_tx_info *info)
  90. {
  91. struct ieee80211_tx_rate *r = &info->control.rates[0];
  92. info->antenna_sel_tx =
  93. ((rate_n_flags & RATE_MCS_ANT_ABC_MSK) >> RATE_MCS_ANT_POS);
  94. if (rate_n_flags & RATE_MCS_HT_MSK)
  95. r->flags |= IEEE80211_TX_RC_MCS;
  96. if (rate_n_flags & RATE_MCS_GF_MSK)
  97. r->flags |= IEEE80211_TX_RC_GREEN_FIELD;
  98. if (rate_n_flags & RATE_MCS_HT40_MSK)
  99. r->flags |= IEEE80211_TX_RC_40_MHZ_WIDTH;
  100. if (rate_n_flags & RATE_MCS_DUP_MSK)
  101. r->flags |= IEEE80211_TX_RC_DUP_DATA;
  102. if (rate_n_flags & RATE_MCS_SGI_MSK)
  103. r->flags |= IEEE80211_TX_RC_SHORT_GI;
  104. r->idx = iwl_hwrate_to_mac80211_idx(rate_n_flags, info->band);
  105. }
  106. EXPORT_SYMBOL(iwl_hwrate_to_tx_control);
  107. int iwl_hwrate_to_plcp_idx(u32 rate_n_flags)
  108. {
  109. int idx = 0;
  110. /* HT rate format */
  111. if (rate_n_flags & RATE_MCS_HT_MSK) {
  112. idx = (rate_n_flags & 0xff);
  113. if (idx >= IWL_RATE_MIMO3_6M_PLCP)
  114. idx = idx - IWL_RATE_MIMO3_6M_PLCP;
  115. else if (idx >= IWL_RATE_MIMO2_6M_PLCP)
  116. idx = idx - IWL_RATE_MIMO2_6M_PLCP;
  117. idx += IWL_FIRST_OFDM_RATE;
  118. /* skip 9M not supported in ht*/
  119. if (idx >= IWL_RATE_9M_INDEX)
  120. idx += 1;
  121. if ((idx >= IWL_FIRST_OFDM_RATE) && (idx <= IWL_LAST_OFDM_RATE))
  122. return idx;
  123. /* legacy rate format, search for match in table */
  124. } else {
  125. for (idx = 0; idx < ARRAY_SIZE(iwl_rates); idx++)
  126. if (iwl_rates[idx].plcp == (rate_n_flags & 0xFF))
  127. return idx;
  128. }
  129. return -1;
  130. }
  131. EXPORT_SYMBOL(iwl_hwrate_to_plcp_idx);
  132. int iwl_hwrate_to_mac80211_idx(u32 rate_n_flags, enum ieee80211_band band)
  133. {
  134. int idx = 0;
  135. int band_offset = 0;
  136. /* HT rate format: mac80211 wants an MCS number, which is just LSB */
  137. if (rate_n_flags & RATE_MCS_HT_MSK) {
  138. idx = (rate_n_flags & 0xff);
  139. return idx;
  140. /* Legacy rate format, search for match in table */
  141. } else {
  142. if (band == IEEE80211_BAND_5GHZ)
  143. band_offset = IWL_FIRST_OFDM_RATE;
  144. for (idx = band_offset; idx < IWL_RATE_COUNT_LEGACY; idx++)
  145. if (iwl_rates[idx].plcp == (rate_n_flags & 0xFF))
  146. return idx - band_offset;
  147. }
  148. return -1;
  149. }
  150. u8 iwl_toggle_tx_ant(struct iwl_priv *priv, u8 ant)
  151. {
  152. int i;
  153. u8 ind = ant;
  154. for (i = 0; i < RATE_ANT_NUM - 1; i++) {
  155. ind = (ind + 1) < RATE_ANT_NUM ? ind + 1 : 0;
  156. if (priv->hw_params.valid_tx_ant & BIT(ind))
  157. return ind;
  158. }
  159. return ant;
  160. }
  161. const u8 iwl_bcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
  162. EXPORT_SYMBOL(iwl_bcast_addr);
  163. /* This function both allocates and initializes hw and priv. */
  164. struct ieee80211_hw *iwl_alloc_all(struct iwl_cfg *cfg,
  165. struct ieee80211_ops *hw_ops)
  166. {
  167. struct iwl_priv *priv;
  168. /* mac80211 allocates memory for this device instance, including
  169. * space for this driver's private structure */
  170. struct ieee80211_hw *hw =
  171. ieee80211_alloc_hw(sizeof(struct iwl_priv), hw_ops);
  172. if (hw == NULL) {
  173. printk(KERN_ERR "%s: Can not allocate network device\n",
  174. cfg->name);
  175. goto out;
  176. }
  177. priv = hw->priv;
  178. priv->hw = hw;
  179. out:
  180. return hw;
  181. }
  182. EXPORT_SYMBOL(iwl_alloc_all);
  183. void iwl_hw_detect(struct iwl_priv *priv)
  184. {
  185. priv->hw_rev = _iwl_read32(priv, CSR_HW_REV);
  186. priv->hw_wa_rev = _iwl_read32(priv, CSR_HW_REV_WA_REG);
  187. pci_read_config_byte(priv->pci_dev, PCI_REVISION_ID, &priv->rev_id);
  188. }
  189. EXPORT_SYMBOL(iwl_hw_detect);
  190. int iwl_hw_nic_init(struct iwl_priv *priv)
  191. {
  192. unsigned long flags;
  193. struct iwl_rx_queue *rxq = &priv->rxq;
  194. int ret;
  195. /* nic_init */
  196. spin_lock_irqsave(&priv->lock, flags);
  197. priv->cfg->ops->lib->apm_ops.init(priv);
  198. iwl_write32(priv, CSR_INT_COALESCING, 512 / 32);
  199. spin_unlock_irqrestore(&priv->lock, flags);
  200. ret = priv->cfg->ops->lib->apm_ops.set_pwr_src(priv, IWL_PWR_SRC_VMAIN);
  201. priv->cfg->ops->lib->apm_ops.config(priv);
  202. /* Allocate the RX queue, or reset if it is already allocated */
  203. if (!rxq->bd) {
  204. ret = iwl_rx_queue_alloc(priv);
  205. if (ret) {
  206. IWL_ERR(priv, "Unable to initialize Rx queue\n");
  207. return -ENOMEM;
  208. }
  209. } else
  210. iwl_rx_queue_reset(priv, rxq);
  211. iwl_rx_replenish(priv);
  212. iwl_rx_init(priv, rxq);
  213. spin_lock_irqsave(&priv->lock, flags);
  214. rxq->need_update = 1;
  215. iwl_rx_queue_update_write_ptr(priv, rxq);
  216. spin_unlock_irqrestore(&priv->lock, flags);
  217. /* Allocate and init all Tx and Command queues */
  218. ret = iwl_txq_ctx_reset(priv);
  219. if (ret)
  220. return ret;
  221. set_bit(STATUS_INIT, &priv->status);
  222. return 0;
  223. }
  224. EXPORT_SYMBOL(iwl_hw_nic_init);
  225. /*
  226. * QoS support
  227. */
  228. void iwl_activate_qos(struct iwl_priv *priv, u8 force)
  229. {
  230. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  231. return;
  232. priv->qos_data.def_qos_parm.qos_flags = 0;
  233. if (priv->qos_data.qos_cap.q_AP.queue_request &&
  234. !priv->qos_data.qos_cap.q_AP.txop_request)
  235. priv->qos_data.def_qos_parm.qos_flags |=
  236. QOS_PARAM_FLG_TXOP_TYPE_MSK;
  237. if (priv->qos_data.qos_active)
  238. priv->qos_data.def_qos_parm.qos_flags |=
  239. QOS_PARAM_FLG_UPDATE_EDCA_MSK;
  240. if (priv->current_ht_config.is_ht)
  241. priv->qos_data.def_qos_parm.qos_flags |= QOS_PARAM_FLG_TGN_MSK;
  242. if (force || iwl_is_associated(priv)) {
  243. IWL_DEBUG_QOS(priv, "send QoS cmd with Qos active=%d FLAGS=0x%X\n",
  244. priv->qos_data.qos_active,
  245. priv->qos_data.def_qos_parm.qos_flags);
  246. iwl_send_cmd_pdu_async(priv, REPLY_QOS_PARAM,
  247. sizeof(struct iwl_qosparam_cmd),
  248. &priv->qos_data.def_qos_parm, NULL);
  249. }
  250. }
  251. EXPORT_SYMBOL(iwl_activate_qos);
  252. /*
  253. * AC CWmin CW max AIFSN TXOP Limit TXOP Limit
  254. * (802.11b) (802.11a/g)
  255. * AC_BK 15 1023 7 0 0
  256. * AC_BE 15 1023 3 0 0
  257. * AC_VI 7 15 2 6.016ms 3.008ms
  258. * AC_VO 3 7 2 3.264ms 1.504ms
  259. */
  260. void iwl_reset_qos(struct iwl_priv *priv)
  261. {
  262. u16 cw_min = 15;
  263. u16 cw_max = 1023;
  264. u8 aifs = 2;
  265. bool is_legacy = false;
  266. unsigned long flags;
  267. int i;
  268. spin_lock_irqsave(&priv->lock, flags);
  269. /* QoS always active in AP and ADHOC mode
  270. * In STA mode wait for association
  271. */
  272. if (priv->iw_mode == NL80211_IFTYPE_ADHOC ||
  273. priv->iw_mode == NL80211_IFTYPE_AP)
  274. priv->qos_data.qos_active = 1;
  275. else
  276. priv->qos_data.qos_active = 0;
  277. /* check for legacy mode */
  278. if ((priv->iw_mode == NL80211_IFTYPE_ADHOC &&
  279. (priv->active_rate & IWL_OFDM_RATES_MASK) == 0) ||
  280. (priv->iw_mode == NL80211_IFTYPE_STATION &&
  281. (priv->staging_rxon.flags & RXON_FLG_SHORT_SLOT_MSK) == 0)) {
  282. cw_min = 31;
  283. is_legacy = 1;
  284. }
  285. if (priv->qos_data.qos_active)
  286. aifs = 3;
  287. /* AC_BE */
  288. priv->qos_data.def_qos_parm.ac[0].cw_min = cpu_to_le16(cw_min);
  289. priv->qos_data.def_qos_parm.ac[0].cw_max = cpu_to_le16(cw_max);
  290. priv->qos_data.def_qos_parm.ac[0].aifsn = aifs;
  291. priv->qos_data.def_qos_parm.ac[0].edca_txop = 0;
  292. priv->qos_data.def_qos_parm.ac[0].reserved1 = 0;
  293. if (priv->qos_data.qos_active) {
  294. /* AC_BK */
  295. i = 1;
  296. priv->qos_data.def_qos_parm.ac[i].cw_min = cpu_to_le16(cw_min);
  297. priv->qos_data.def_qos_parm.ac[i].cw_max = cpu_to_le16(cw_max);
  298. priv->qos_data.def_qos_parm.ac[i].aifsn = 7;
  299. priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
  300. priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
  301. /* AC_VI */
  302. i = 2;
  303. priv->qos_data.def_qos_parm.ac[i].cw_min =
  304. cpu_to_le16((cw_min + 1) / 2 - 1);
  305. priv->qos_data.def_qos_parm.ac[i].cw_max =
  306. cpu_to_le16(cw_min);
  307. priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
  308. if (is_legacy)
  309. priv->qos_data.def_qos_parm.ac[i].edca_txop =
  310. cpu_to_le16(6016);
  311. else
  312. priv->qos_data.def_qos_parm.ac[i].edca_txop =
  313. cpu_to_le16(3008);
  314. priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
  315. /* AC_VO */
  316. i = 3;
  317. priv->qos_data.def_qos_parm.ac[i].cw_min =
  318. cpu_to_le16((cw_min + 1) / 4 - 1);
  319. priv->qos_data.def_qos_parm.ac[i].cw_max =
  320. cpu_to_le16((cw_min + 1) / 2 - 1);
  321. priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
  322. priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
  323. if (is_legacy)
  324. priv->qos_data.def_qos_parm.ac[i].edca_txop =
  325. cpu_to_le16(3264);
  326. else
  327. priv->qos_data.def_qos_parm.ac[i].edca_txop =
  328. cpu_to_le16(1504);
  329. } else {
  330. for (i = 1; i < 4; i++) {
  331. priv->qos_data.def_qos_parm.ac[i].cw_min =
  332. cpu_to_le16(cw_min);
  333. priv->qos_data.def_qos_parm.ac[i].cw_max =
  334. cpu_to_le16(cw_max);
  335. priv->qos_data.def_qos_parm.ac[i].aifsn = aifs;
  336. priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
  337. priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
  338. }
  339. }
  340. IWL_DEBUG_QOS(priv, "set QoS to default \n");
  341. spin_unlock_irqrestore(&priv->lock, flags);
  342. }
  343. EXPORT_SYMBOL(iwl_reset_qos);
  344. #define MAX_BIT_RATE_40_MHZ 150 /* Mbps */
  345. #define MAX_BIT_RATE_20_MHZ 72 /* Mbps */
  346. static void iwlcore_init_ht_hw_capab(const struct iwl_priv *priv,
  347. struct ieee80211_sta_ht_cap *ht_info,
  348. enum ieee80211_band band)
  349. {
  350. u16 max_bit_rate = 0;
  351. u8 rx_chains_num = priv->hw_params.rx_chains_num;
  352. u8 tx_chains_num = priv->hw_params.tx_chains_num;
  353. ht_info->cap = 0;
  354. memset(&ht_info->mcs, 0, sizeof(ht_info->mcs));
  355. ht_info->ht_supported = true;
  356. if (priv->cfg->ht_greenfield_support)
  357. ht_info->cap |= IEEE80211_HT_CAP_GRN_FLD;
  358. ht_info->cap |= IEEE80211_HT_CAP_SGI_20;
  359. ht_info->cap |= (IEEE80211_HT_CAP_SM_PS &
  360. (WLAN_HT_CAP_SM_PS_DISABLED << 2));
  361. max_bit_rate = MAX_BIT_RATE_20_MHZ;
  362. if (priv->hw_params.ht40_channel & BIT(band)) {
  363. ht_info->cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40;
  364. ht_info->cap |= IEEE80211_HT_CAP_SGI_40;
  365. ht_info->mcs.rx_mask[4] = 0x01;
  366. max_bit_rate = MAX_BIT_RATE_40_MHZ;
  367. }
  368. if (priv->cfg->mod_params->amsdu_size_8K)
  369. ht_info->cap |= IEEE80211_HT_CAP_MAX_AMSDU;
  370. ht_info->ampdu_factor = CFG_HT_RX_AMPDU_FACTOR_DEF;
  371. ht_info->ampdu_density = CFG_HT_MPDU_DENSITY_DEF;
  372. ht_info->mcs.rx_mask[0] = 0xFF;
  373. if (rx_chains_num >= 2)
  374. ht_info->mcs.rx_mask[1] = 0xFF;
  375. if (rx_chains_num >= 3)
  376. ht_info->mcs.rx_mask[2] = 0xFF;
  377. /* Highest supported Rx data rate */
  378. max_bit_rate *= rx_chains_num;
  379. WARN_ON(max_bit_rate & ~IEEE80211_HT_MCS_RX_HIGHEST_MASK);
  380. ht_info->mcs.rx_highest = cpu_to_le16(max_bit_rate);
  381. /* Tx MCS capabilities */
  382. ht_info->mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
  383. if (tx_chains_num != rx_chains_num) {
  384. ht_info->mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF;
  385. ht_info->mcs.tx_params |= ((tx_chains_num - 1) <<
  386. IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT);
  387. }
  388. }
  389. static void iwlcore_init_hw_rates(struct iwl_priv *priv,
  390. struct ieee80211_rate *rates)
  391. {
  392. int i;
  393. for (i = 0; i < IWL_RATE_COUNT_LEGACY; i++) {
  394. rates[i].bitrate = iwl_rates[i].ieee * 5;
  395. rates[i].hw_value = i; /* Rate scaling will work on indexes */
  396. rates[i].hw_value_short = i;
  397. rates[i].flags = 0;
  398. if ((i >= IWL_FIRST_CCK_RATE) && (i <= IWL_LAST_CCK_RATE)) {
  399. /*
  400. * If CCK != 1M then set short preamble rate flag.
  401. */
  402. rates[i].flags |=
  403. (iwl_rates[i].plcp == IWL_RATE_1M_PLCP) ?
  404. 0 : IEEE80211_RATE_SHORT_PREAMBLE;
  405. }
  406. }
  407. }
  408. /**
  409. * iwlcore_init_geos - Initialize mac80211's geo/channel info based from eeprom
  410. */
  411. int iwlcore_init_geos(struct iwl_priv *priv)
  412. {
  413. struct iwl_channel_info *ch;
  414. struct ieee80211_supported_band *sband;
  415. struct ieee80211_channel *channels;
  416. struct ieee80211_channel *geo_ch;
  417. struct ieee80211_rate *rates;
  418. int i = 0;
  419. if (priv->bands[IEEE80211_BAND_2GHZ].n_bitrates ||
  420. priv->bands[IEEE80211_BAND_5GHZ].n_bitrates) {
  421. IWL_DEBUG_INFO(priv, "Geography modes already initialized.\n");
  422. set_bit(STATUS_GEO_CONFIGURED, &priv->status);
  423. return 0;
  424. }
  425. channels = kzalloc(sizeof(struct ieee80211_channel) *
  426. priv->channel_count, GFP_KERNEL);
  427. if (!channels)
  428. return -ENOMEM;
  429. rates = kzalloc((sizeof(struct ieee80211_rate) * IWL_RATE_COUNT_LEGACY),
  430. GFP_KERNEL);
  431. if (!rates) {
  432. kfree(channels);
  433. return -ENOMEM;
  434. }
  435. /* 5.2GHz channels start after the 2.4GHz channels */
  436. sband = &priv->bands[IEEE80211_BAND_5GHZ];
  437. sband->channels = &channels[ARRAY_SIZE(iwl_eeprom_band_1)];
  438. /* just OFDM */
  439. sband->bitrates = &rates[IWL_FIRST_OFDM_RATE];
  440. sband->n_bitrates = IWL_RATE_COUNT_LEGACY - IWL_FIRST_OFDM_RATE;
  441. if (priv->cfg->sku & IWL_SKU_N)
  442. iwlcore_init_ht_hw_capab(priv, &sband->ht_cap,
  443. IEEE80211_BAND_5GHZ);
  444. sband = &priv->bands[IEEE80211_BAND_2GHZ];
  445. sband->channels = channels;
  446. /* OFDM & CCK */
  447. sband->bitrates = rates;
  448. sband->n_bitrates = IWL_RATE_COUNT_LEGACY;
  449. if (priv->cfg->sku & IWL_SKU_N)
  450. iwlcore_init_ht_hw_capab(priv, &sband->ht_cap,
  451. IEEE80211_BAND_2GHZ);
  452. priv->ieee_channels = channels;
  453. priv->ieee_rates = rates;
  454. for (i = 0; i < priv->channel_count; i++) {
  455. ch = &priv->channel_info[i];
  456. /* FIXME: might be removed if scan is OK */
  457. if (!is_channel_valid(ch))
  458. continue;
  459. if (is_channel_a_band(ch))
  460. sband = &priv->bands[IEEE80211_BAND_5GHZ];
  461. else
  462. sband = &priv->bands[IEEE80211_BAND_2GHZ];
  463. geo_ch = &sband->channels[sband->n_channels++];
  464. geo_ch->center_freq =
  465. ieee80211_channel_to_frequency(ch->channel);
  466. geo_ch->max_power = ch->max_power_avg;
  467. geo_ch->max_antenna_gain = 0xff;
  468. geo_ch->hw_value = ch->channel;
  469. if (is_channel_valid(ch)) {
  470. if (!(ch->flags & EEPROM_CHANNEL_IBSS))
  471. geo_ch->flags |= IEEE80211_CHAN_NO_IBSS;
  472. if (!(ch->flags & EEPROM_CHANNEL_ACTIVE))
  473. geo_ch->flags |= IEEE80211_CHAN_PASSIVE_SCAN;
  474. if (ch->flags & EEPROM_CHANNEL_RADAR)
  475. geo_ch->flags |= IEEE80211_CHAN_RADAR;
  476. geo_ch->flags |= ch->ht40_extension_channel;
  477. if (ch->max_power_avg > priv->tx_power_device_lmt)
  478. priv->tx_power_device_lmt = ch->max_power_avg;
  479. } else {
  480. geo_ch->flags |= IEEE80211_CHAN_DISABLED;
  481. }
  482. IWL_DEBUG_INFO(priv, "Channel %d Freq=%d[%sGHz] %s flag=0x%X\n",
  483. ch->channel, geo_ch->center_freq,
  484. is_channel_a_band(ch) ? "5.2" : "2.4",
  485. geo_ch->flags & IEEE80211_CHAN_DISABLED ?
  486. "restricted" : "valid",
  487. geo_ch->flags);
  488. }
  489. if ((priv->bands[IEEE80211_BAND_5GHZ].n_channels == 0) &&
  490. priv->cfg->sku & IWL_SKU_A) {
  491. IWL_INFO(priv, "Incorrectly detected BG card as ABG. "
  492. "Please send your PCI ID 0x%04X:0x%04X to maintainer.\n",
  493. priv->pci_dev->device,
  494. priv->pci_dev->subsystem_device);
  495. priv->cfg->sku &= ~IWL_SKU_A;
  496. }
  497. IWL_INFO(priv, "Tunable channels: %d 802.11bg, %d 802.11a channels\n",
  498. priv->bands[IEEE80211_BAND_2GHZ].n_channels,
  499. priv->bands[IEEE80211_BAND_5GHZ].n_channels);
  500. set_bit(STATUS_GEO_CONFIGURED, &priv->status);
  501. return 0;
  502. }
  503. EXPORT_SYMBOL(iwlcore_init_geos);
  504. /*
  505. * iwlcore_free_geos - undo allocations in iwlcore_init_geos
  506. */
  507. void iwlcore_free_geos(struct iwl_priv *priv)
  508. {
  509. kfree(priv->ieee_channels);
  510. kfree(priv->ieee_rates);
  511. clear_bit(STATUS_GEO_CONFIGURED, &priv->status);
  512. }
  513. EXPORT_SYMBOL(iwlcore_free_geos);
  514. static bool is_single_rx_stream(struct iwl_priv *priv)
  515. {
  516. return !priv->current_ht_config.is_ht ||
  517. ((priv->current_ht_config.mcs.rx_mask[1] == 0) &&
  518. (priv->current_ht_config.mcs.rx_mask[2] == 0));
  519. }
  520. static u8 iwl_is_channel_extension(struct iwl_priv *priv,
  521. enum ieee80211_band band,
  522. u16 channel, u8 extension_chan_offset)
  523. {
  524. const struct iwl_channel_info *ch_info;
  525. ch_info = iwl_get_channel_info(priv, band, channel);
  526. if (!is_channel_valid(ch_info))
  527. return 0;
  528. if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_ABOVE)
  529. return !(ch_info->ht40_extension_channel &
  530. IEEE80211_CHAN_NO_HT40PLUS);
  531. else if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_BELOW)
  532. return !(ch_info->ht40_extension_channel &
  533. IEEE80211_CHAN_NO_HT40MINUS);
  534. return 0;
  535. }
  536. u8 iwl_is_ht40_tx_allowed(struct iwl_priv *priv,
  537. struct ieee80211_sta_ht_cap *sta_ht_inf)
  538. {
  539. struct iwl_ht_info *iwl_ht_conf = &priv->current_ht_config;
  540. if ((!iwl_ht_conf->is_ht) ||
  541. (iwl_ht_conf->supported_chan_width != IWL_CHANNEL_WIDTH_40MHZ))
  542. return 0;
  543. /* We do not check for IEEE80211_HT_CAP_SUP_WIDTH_20_40
  544. * the bit will not set if it is pure 40MHz case
  545. */
  546. if (sta_ht_inf) {
  547. if (!sta_ht_inf->ht_supported)
  548. return 0;
  549. }
  550. #ifdef CONFIG_IWLWIFI_DEBUG
  551. if (priv->disable_ht40)
  552. return 0;
  553. #endif
  554. return iwl_is_channel_extension(priv, priv->band,
  555. le16_to_cpu(priv->staging_rxon.channel),
  556. iwl_ht_conf->extension_chan_offset);
  557. }
  558. EXPORT_SYMBOL(iwl_is_ht40_tx_allowed);
  559. static u16 iwl_adjust_beacon_interval(u16 beacon_val, u16 max_beacon_val)
  560. {
  561. u16 new_val = 0;
  562. u16 beacon_factor = 0;
  563. beacon_factor = (beacon_val + max_beacon_val) / max_beacon_val;
  564. new_val = beacon_val / beacon_factor;
  565. if (!new_val)
  566. new_val = max_beacon_val;
  567. return new_val;
  568. }
  569. void iwl_setup_rxon_timing(struct iwl_priv *priv)
  570. {
  571. u64 tsf;
  572. s32 interval_tm, rem;
  573. unsigned long flags;
  574. struct ieee80211_conf *conf = NULL;
  575. u16 beacon_int;
  576. conf = ieee80211_get_hw_conf(priv->hw);
  577. spin_lock_irqsave(&priv->lock, flags);
  578. priv->rxon_timing.timestamp = cpu_to_le64(priv->timestamp);
  579. priv->rxon_timing.listen_interval = cpu_to_le16(conf->listen_interval);
  580. if (priv->iw_mode == NL80211_IFTYPE_STATION) {
  581. beacon_int = priv->beacon_int;
  582. priv->rxon_timing.atim_window = 0;
  583. } else {
  584. beacon_int = priv->vif->bss_conf.beacon_int;
  585. /* TODO: we need to get atim_window from upper stack
  586. * for now we set to 0 */
  587. priv->rxon_timing.atim_window = 0;
  588. }
  589. beacon_int = iwl_adjust_beacon_interval(beacon_int,
  590. priv->hw_params.max_beacon_itrvl * 1024);
  591. priv->rxon_timing.beacon_interval = cpu_to_le16(beacon_int);
  592. tsf = priv->timestamp; /* tsf is modifed by do_div: copy it */
  593. interval_tm = beacon_int * 1024;
  594. rem = do_div(tsf, interval_tm);
  595. priv->rxon_timing.beacon_init_val = cpu_to_le32(interval_tm - rem);
  596. spin_unlock_irqrestore(&priv->lock, flags);
  597. IWL_DEBUG_ASSOC(priv,
  598. "beacon interval %d beacon timer %d beacon tim %d\n",
  599. le16_to_cpu(priv->rxon_timing.beacon_interval),
  600. le32_to_cpu(priv->rxon_timing.beacon_init_val),
  601. le16_to_cpu(priv->rxon_timing.atim_window));
  602. }
  603. EXPORT_SYMBOL(iwl_setup_rxon_timing);
  604. void iwl_set_rxon_hwcrypto(struct iwl_priv *priv, int hw_decrypt)
  605. {
  606. struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
  607. if (hw_decrypt)
  608. rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
  609. else
  610. rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
  611. }
  612. EXPORT_SYMBOL(iwl_set_rxon_hwcrypto);
  613. /**
  614. * iwl_check_rxon_cmd - validate RXON structure is valid
  615. *
  616. * NOTE: This is really only useful during development and can eventually
  617. * be #ifdef'd out once the driver is stable and folks aren't actively
  618. * making changes
  619. */
  620. int iwl_check_rxon_cmd(struct iwl_priv *priv)
  621. {
  622. int error = 0;
  623. int counter = 1;
  624. struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
  625. if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
  626. error |= le32_to_cpu(rxon->flags &
  627. (RXON_FLG_TGJ_NARROW_BAND_MSK |
  628. RXON_FLG_RADAR_DETECT_MSK));
  629. if (error)
  630. IWL_WARN(priv, "check 24G fields %d | %d\n",
  631. counter++, error);
  632. } else {
  633. error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ?
  634. 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK);
  635. if (error)
  636. IWL_WARN(priv, "check 52 fields %d | %d\n",
  637. counter++, error);
  638. error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK);
  639. if (error)
  640. IWL_WARN(priv, "check 52 CCK %d | %d\n",
  641. counter++, error);
  642. }
  643. error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1;
  644. if (error)
  645. IWL_WARN(priv, "check mac addr %d | %d\n", counter++, error);
  646. /* make sure basic rates 6Mbps and 1Mbps are supported */
  647. error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) &&
  648. ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0));
  649. if (error)
  650. IWL_WARN(priv, "check basic rate %d | %d\n", counter++, error);
  651. error |= (le16_to_cpu(rxon->assoc_id) > 2007);
  652. if (error)
  653. IWL_WARN(priv, "check assoc id %d | %d\n", counter++, error);
  654. error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
  655. == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK));
  656. if (error)
  657. IWL_WARN(priv, "check CCK and short slot %d | %d\n",
  658. counter++, error);
  659. error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
  660. == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK));
  661. if (error)
  662. IWL_WARN(priv, "check CCK & auto detect %d | %d\n",
  663. counter++, error);
  664. error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
  665. RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK);
  666. if (error)
  667. IWL_WARN(priv, "check TGG and auto detect %d | %d\n",
  668. counter++, error);
  669. if (error)
  670. IWL_WARN(priv, "Tuning to channel %d\n",
  671. le16_to_cpu(rxon->channel));
  672. if (error) {
  673. IWL_ERR(priv, "Not a valid iwl_rxon_assoc_cmd field values\n");
  674. return -1;
  675. }
  676. return 0;
  677. }
  678. EXPORT_SYMBOL(iwl_check_rxon_cmd);
  679. /**
  680. * iwl_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
  681. * @priv: staging_rxon is compared to active_rxon
  682. *
  683. * If the RXON structure is changing enough to require a new tune,
  684. * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
  685. * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
  686. */
  687. int iwl_full_rxon_required(struct iwl_priv *priv)
  688. {
  689. /* These items are only settable from the full RXON command */
  690. if (!(iwl_is_associated(priv)) ||
  691. compare_ether_addr(priv->staging_rxon.bssid_addr,
  692. priv->active_rxon.bssid_addr) ||
  693. compare_ether_addr(priv->staging_rxon.node_addr,
  694. priv->active_rxon.node_addr) ||
  695. compare_ether_addr(priv->staging_rxon.wlap_bssid_addr,
  696. priv->active_rxon.wlap_bssid_addr) ||
  697. (priv->staging_rxon.dev_type != priv->active_rxon.dev_type) ||
  698. (priv->staging_rxon.channel != priv->active_rxon.channel) ||
  699. (priv->staging_rxon.air_propagation !=
  700. priv->active_rxon.air_propagation) ||
  701. (priv->staging_rxon.ofdm_ht_single_stream_basic_rates !=
  702. priv->active_rxon.ofdm_ht_single_stream_basic_rates) ||
  703. (priv->staging_rxon.ofdm_ht_dual_stream_basic_rates !=
  704. priv->active_rxon.ofdm_ht_dual_stream_basic_rates) ||
  705. (priv->staging_rxon.ofdm_ht_triple_stream_basic_rates !=
  706. priv->active_rxon.ofdm_ht_triple_stream_basic_rates) ||
  707. (priv->staging_rxon.assoc_id != priv->active_rxon.assoc_id))
  708. return 1;
  709. /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
  710. * be updated with the RXON_ASSOC command -- however only some
  711. * flag transitions are allowed using RXON_ASSOC */
  712. /* Check if we are not switching bands */
  713. if ((priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) !=
  714. (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK))
  715. return 1;
  716. /* Check if we are switching association toggle */
  717. if ((priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) !=
  718. (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK))
  719. return 1;
  720. return 0;
  721. }
  722. EXPORT_SYMBOL(iwl_full_rxon_required);
  723. u8 iwl_rate_get_lowest_plcp(struct iwl_priv *priv)
  724. {
  725. int i;
  726. int rate_mask;
  727. /* Set rate mask*/
  728. if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)
  729. rate_mask = priv->active_rate_basic & IWL_CCK_RATES_MASK;
  730. else
  731. rate_mask = priv->active_rate_basic & IWL_OFDM_RATES_MASK;
  732. /* Find lowest valid rate */
  733. for (i = IWL_RATE_1M_INDEX; i != IWL_RATE_INVALID;
  734. i = iwl_rates[i].next_ieee) {
  735. if (rate_mask & (1 << i))
  736. return iwl_rates[i].plcp;
  737. }
  738. /* No valid rate was found. Assign the lowest one */
  739. if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)
  740. return IWL_RATE_1M_PLCP;
  741. else
  742. return IWL_RATE_6M_PLCP;
  743. }
  744. EXPORT_SYMBOL(iwl_rate_get_lowest_plcp);
  745. void iwl_set_rxon_ht(struct iwl_priv *priv, struct iwl_ht_info *ht_info)
  746. {
  747. struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
  748. if (!ht_info->is_ht) {
  749. rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MSK |
  750. RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK |
  751. RXON_FLG_HT40_PROT_MSK |
  752. RXON_FLG_HT_PROT_MSK);
  753. return;
  754. }
  755. /* FIXME: if the definition of ht_protection changed, the "translation"
  756. * will be needed for rxon->flags
  757. */
  758. rxon->flags |= cpu_to_le32(ht_info->ht_protection << RXON_FLG_HT_OPERATING_MODE_POS);
  759. /* Set up channel bandwidth:
  760. * 20 MHz only, 20/40 mixed or pure 40 if ht40 ok */
  761. /* clear the HT channel mode before set the mode */
  762. rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MSK |
  763. RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
  764. if (iwl_is_ht40_tx_allowed(priv, NULL)) {
  765. /* pure ht40 */
  766. if (ht_info->ht_protection == IEEE80211_HT_OP_MODE_PROTECTION_20MHZ) {
  767. rxon->flags |= RXON_FLG_CHANNEL_MODE_PURE_40;
  768. /* Note: control channel is opposite of extension channel */
  769. switch (ht_info->extension_chan_offset) {
  770. case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
  771. rxon->flags &= ~RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
  772. break;
  773. case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
  774. rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
  775. break;
  776. }
  777. } else {
  778. /* Note: control channel is opposite of extension channel */
  779. switch (ht_info->extension_chan_offset) {
  780. case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
  781. rxon->flags &= ~(RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
  782. rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED;
  783. break;
  784. case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
  785. rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
  786. rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED;
  787. break;
  788. case IEEE80211_HT_PARAM_CHA_SEC_NONE:
  789. default:
  790. /* channel location only valid if in Mixed mode */
  791. IWL_ERR(priv, "invalid extension channel offset\n");
  792. break;
  793. }
  794. }
  795. } else {
  796. rxon->flags |= RXON_FLG_CHANNEL_MODE_LEGACY;
  797. }
  798. if (priv->cfg->ops->hcmd->set_rxon_chain)
  799. priv->cfg->ops->hcmd->set_rxon_chain(priv);
  800. IWL_DEBUG_ASSOC(priv, "supported HT rate 0x%X 0x%X 0x%X "
  801. "rxon flags 0x%X operation mode :0x%X "
  802. "extension channel offset 0x%x\n",
  803. ht_info->mcs.rx_mask[0],
  804. ht_info->mcs.rx_mask[1],
  805. ht_info->mcs.rx_mask[2],
  806. le32_to_cpu(rxon->flags), ht_info->ht_protection,
  807. ht_info->extension_chan_offset);
  808. return;
  809. }
  810. EXPORT_SYMBOL(iwl_set_rxon_ht);
  811. #define IWL_NUM_RX_CHAINS_MULTIPLE 3
  812. #define IWL_NUM_RX_CHAINS_SINGLE 2
  813. #define IWL_NUM_IDLE_CHAINS_DUAL 2
  814. #define IWL_NUM_IDLE_CHAINS_SINGLE 1
  815. /* Determine how many receiver/antenna chains to use.
  816. * More provides better reception via diversity. Fewer saves power.
  817. * MIMO (dual stream) requires at least 2, but works better with 3.
  818. * This does not determine *which* chains to use, just how many.
  819. */
  820. static int iwl_get_active_rx_chain_count(struct iwl_priv *priv)
  821. {
  822. bool is_single = is_single_rx_stream(priv);
  823. bool is_cam = !test_bit(STATUS_POWER_PMI, &priv->status);
  824. /* # of Rx chains to use when expecting MIMO. */
  825. if (is_single || (!is_cam && (priv->current_ht_config.sm_ps ==
  826. WLAN_HT_CAP_SM_PS_STATIC)))
  827. return IWL_NUM_RX_CHAINS_SINGLE;
  828. else
  829. return IWL_NUM_RX_CHAINS_MULTIPLE;
  830. }
  831. static int iwl_get_idle_rx_chain_count(struct iwl_priv *priv, int active_cnt)
  832. {
  833. int idle_cnt;
  834. bool is_cam = !test_bit(STATUS_POWER_PMI, &priv->status);
  835. /* # Rx chains when idling and maybe trying to save power */
  836. switch (priv->current_ht_config.sm_ps) {
  837. case WLAN_HT_CAP_SM_PS_STATIC:
  838. case WLAN_HT_CAP_SM_PS_DYNAMIC:
  839. idle_cnt = (is_cam) ? IWL_NUM_IDLE_CHAINS_DUAL :
  840. IWL_NUM_IDLE_CHAINS_SINGLE;
  841. break;
  842. case WLAN_HT_CAP_SM_PS_DISABLED:
  843. idle_cnt = (is_cam) ? active_cnt : IWL_NUM_IDLE_CHAINS_SINGLE;
  844. break;
  845. case WLAN_HT_CAP_SM_PS_INVALID:
  846. default:
  847. IWL_ERR(priv, "invalid mimo ps mode %d\n",
  848. priv->current_ht_config.sm_ps);
  849. WARN_ON(1);
  850. idle_cnt = -1;
  851. break;
  852. }
  853. return idle_cnt;
  854. }
  855. /* up to 4 chains */
  856. static u8 iwl_count_chain_bitmap(u32 chain_bitmap)
  857. {
  858. u8 res;
  859. res = (chain_bitmap & BIT(0)) >> 0;
  860. res += (chain_bitmap & BIT(1)) >> 1;
  861. res += (chain_bitmap & BIT(2)) >> 2;
  862. res += (chain_bitmap & BIT(4)) >> 4;
  863. return res;
  864. }
  865. /**
  866. * iwl_is_monitor_mode - Determine if interface in monitor mode
  867. *
  868. * priv->iw_mode is set in add_interface, but add_interface is
  869. * never called for monitor mode. The only way mac80211 informs us about
  870. * monitor mode is through configuring filters (call to configure_filter).
  871. */
  872. bool iwl_is_monitor_mode(struct iwl_priv *priv)
  873. {
  874. return !!(priv->staging_rxon.filter_flags & RXON_FILTER_PROMISC_MSK);
  875. }
  876. EXPORT_SYMBOL(iwl_is_monitor_mode);
  877. /**
  878. * iwl_set_rxon_chain - Set up Rx chain usage in "staging" RXON image
  879. *
  880. * Selects how many and which Rx receivers/antennas/chains to use.
  881. * This should not be used for scan command ... it puts data in wrong place.
  882. */
  883. void iwl_set_rxon_chain(struct iwl_priv *priv)
  884. {
  885. bool is_single = is_single_rx_stream(priv);
  886. bool is_cam = !test_bit(STATUS_POWER_PMI, &priv->status);
  887. u8 idle_rx_cnt, active_rx_cnt, valid_rx_cnt;
  888. u32 active_chains;
  889. u16 rx_chain;
  890. /* Tell uCode which antennas are actually connected.
  891. * Before first association, we assume all antennas are connected.
  892. * Just after first association, iwl_chain_noise_calibration()
  893. * checks which antennas actually *are* connected. */
  894. if (priv->chain_noise_data.active_chains)
  895. active_chains = priv->chain_noise_data.active_chains;
  896. else
  897. active_chains = priv->hw_params.valid_rx_ant;
  898. rx_chain = active_chains << RXON_RX_CHAIN_VALID_POS;
  899. /* How many receivers should we use? */
  900. active_rx_cnt = iwl_get_active_rx_chain_count(priv);
  901. idle_rx_cnt = iwl_get_idle_rx_chain_count(priv, active_rx_cnt);
  902. /* correct rx chain count according hw settings
  903. * and chain noise calibration
  904. */
  905. valid_rx_cnt = iwl_count_chain_bitmap(active_chains);
  906. if (valid_rx_cnt < active_rx_cnt)
  907. active_rx_cnt = valid_rx_cnt;
  908. if (valid_rx_cnt < idle_rx_cnt)
  909. idle_rx_cnt = valid_rx_cnt;
  910. rx_chain |= active_rx_cnt << RXON_RX_CHAIN_MIMO_CNT_POS;
  911. rx_chain |= idle_rx_cnt << RXON_RX_CHAIN_CNT_POS;
  912. /* copied from 'iwl_bg_request_scan()' */
  913. /* Force use of chains B and C (0x6) for Rx for 4965
  914. * Avoid A (0x1) because of its off-channel reception on A-band.
  915. * MIMO is not used here, but value is required */
  916. if (iwl_is_monitor_mode(priv) &&
  917. !(priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) &&
  918. ((priv->hw_rev & CSR_HW_REV_TYPE_MSK) == CSR_HW_REV_TYPE_4965)) {
  919. rx_chain = ANT_ABC << RXON_RX_CHAIN_VALID_POS;
  920. rx_chain |= ANT_BC << RXON_RX_CHAIN_FORCE_SEL_POS;
  921. rx_chain |= ANT_ABC << RXON_RX_CHAIN_FORCE_MIMO_SEL_POS;
  922. rx_chain |= 0x1 << RXON_RX_CHAIN_DRIVER_FORCE_POS;
  923. }
  924. priv->staging_rxon.rx_chain = cpu_to_le16(rx_chain);
  925. if (!is_single && (active_rx_cnt >= IWL_NUM_RX_CHAINS_SINGLE) && is_cam)
  926. priv->staging_rxon.rx_chain |= RXON_RX_CHAIN_MIMO_FORCE_MSK;
  927. else
  928. priv->staging_rxon.rx_chain &= ~RXON_RX_CHAIN_MIMO_FORCE_MSK;
  929. IWL_DEBUG_ASSOC(priv, "rx_chain=0x%X active=%d idle=%d\n",
  930. priv->staging_rxon.rx_chain,
  931. active_rx_cnt, idle_rx_cnt);
  932. WARN_ON(active_rx_cnt == 0 || idle_rx_cnt == 0 ||
  933. active_rx_cnt < idle_rx_cnt);
  934. }
  935. EXPORT_SYMBOL(iwl_set_rxon_chain);
  936. /**
  937. * iwl_set_rxon_channel - Set the phymode and channel values in staging RXON
  938. * @phymode: MODE_IEEE80211A sets to 5.2GHz; all else set to 2.4GHz
  939. * @channel: Any channel valid for the requested phymode
  940. * In addition to setting the staging RXON, priv->phymode is also set.
  941. *
  942. * NOTE: Does not commit to the hardware; it sets appropriate bit fields
  943. * in the staging RXON flag structure based on the phymode
  944. */
  945. int iwl_set_rxon_channel(struct iwl_priv *priv, struct ieee80211_channel *ch)
  946. {
  947. enum ieee80211_band band = ch->band;
  948. u16 channel = ieee80211_frequency_to_channel(ch->center_freq);
  949. if (!iwl_get_channel_info(priv, band, channel)) {
  950. IWL_DEBUG_INFO(priv, "Could not set channel to %d [%d]\n",
  951. channel, band);
  952. return -EINVAL;
  953. }
  954. if ((le16_to_cpu(priv->staging_rxon.channel) == channel) &&
  955. (priv->band == band))
  956. return 0;
  957. priv->staging_rxon.channel = cpu_to_le16(channel);
  958. if (band == IEEE80211_BAND_5GHZ)
  959. priv->staging_rxon.flags &= ~RXON_FLG_BAND_24G_MSK;
  960. else
  961. priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
  962. priv->band = band;
  963. IWL_DEBUG_INFO(priv, "Staging channel set to %d [%d]\n", channel, band);
  964. return 0;
  965. }
  966. EXPORT_SYMBOL(iwl_set_rxon_channel);
  967. void iwl_set_flags_for_band(struct iwl_priv *priv,
  968. enum ieee80211_band band)
  969. {
  970. if (band == IEEE80211_BAND_5GHZ) {
  971. priv->staging_rxon.flags &=
  972. ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
  973. | RXON_FLG_CCK_MSK);
  974. priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  975. } else {
  976. /* Copied from iwl_post_associate() */
  977. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
  978. priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  979. else
  980. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  981. if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
  982. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  983. priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
  984. priv->staging_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK;
  985. priv->staging_rxon.flags &= ~RXON_FLG_CCK_MSK;
  986. }
  987. }
  988. /*
  989. * initialize rxon structure with default values from eeprom
  990. */
  991. void iwl_connection_init_rx_config(struct iwl_priv *priv, int mode)
  992. {
  993. const struct iwl_channel_info *ch_info;
  994. memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon));
  995. switch (mode) {
  996. case NL80211_IFTYPE_AP:
  997. priv->staging_rxon.dev_type = RXON_DEV_TYPE_AP;
  998. break;
  999. case NL80211_IFTYPE_STATION:
  1000. priv->staging_rxon.dev_type = RXON_DEV_TYPE_ESS;
  1001. priv->staging_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
  1002. break;
  1003. case NL80211_IFTYPE_ADHOC:
  1004. priv->staging_rxon.dev_type = RXON_DEV_TYPE_IBSS;
  1005. priv->staging_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
  1006. priv->staging_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
  1007. RXON_FILTER_ACCEPT_GRP_MSK;
  1008. break;
  1009. default:
  1010. IWL_ERR(priv, "Unsupported interface type %d\n", mode);
  1011. break;
  1012. }
  1013. #if 0
  1014. /* TODO: Figure out when short_preamble would be set and cache from
  1015. * that */
  1016. if (!hw_to_local(priv->hw)->short_preamble)
  1017. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  1018. else
  1019. priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  1020. #endif
  1021. ch_info = iwl_get_channel_info(priv, priv->band,
  1022. le16_to_cpu(priv->active_rxon.channel));
  1023. if (!ch_info)
  1024. ch_info = &priv->channel_info[0];
  1025. /*
  1026. * in some case A channels are all non IBSS
  1027. * in this case force B/G channel
  1028. */
  1029. if ((priv->iw_mode == NL80211_IFTYPE_ADHOC) &&
  1030. !(is_channel_ibss(ch_info)))
  1031. ch_info = &priv->channel_info[0];
  1032. priv->staging_rxon.channel = cpu_to_le16(ch_info->channel);
  1033. priv->band = ch_info->band;
  1034. iwl_set_flags_for_band(priv, priv->band);
  1035. priv->staging_rxon.ofdm_basic_rates =
  1036. (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
  1037. priv->staging_rxon.cck_basic_rates =
  1038. (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
  1039. /* clear both MIX and PURE40 mode flag */
  1040. priv->staging_rxon.flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED |
  1041. RXON_FLG_CHANNEL_MODE_PURE_40);
  1042. memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
  1043. memcpy(priv->staging_rxon.wlap_bssid_addr, priv->mac_addr, ETH_ALEN);
  1044. priv->staging_rxon.ofdm_ht_single_stream_basic_rates = 0xff;
  1045. priv->staging_rxon.ofdm_ht_dual_stream_basic_rates = 0xff;
  1046. priv->staging_rxon.ofdm_ht_triple_stream_basic_rates = 0xff;
  1047. }
  1048. EXPORT_SYMBOL(iwl_connection_init_rx_config);
  1049. static void iwl_set_rate(struct iwl_priv *priv)
  1050. {
  1051. const struct ieee80211_supported_band *hw = NULL;
  1052. struct ieee80211_rate *rate;
  1053. int i;
  1054. hw = iwl_get_hw_mode(priv, priv->band);
  1055. if (!hw) {
  1056. IWL_ERR(priv, "Failed to set rate: unable to get hw mode\n");
  1057. return;
  1058. }
  1059. priv->active_rate = 0;
  1060. priv->active_rate_basic = 0;
  1061. for (i = 0; i < hw->n_bitrates; i++) {
  1062. rate = &(hw->bitrates[i]);
  1063. if (rate->hw_value < IWL_RATE_COUNT_LEGACY)
  1064. priv->active_rate |= (1 << rate->hw_value);
  1065. }
  1066. IWL_DEBUG_RATE(priv, "Set active_rate = %0x, active_rate_basic = %0x\n",
  1067. priv->active_rate, priv->active_rate_basic);
  1068. /*
  1069. * If a basic rate is configured, then use it (adding IWL_RATE_1M_MASK)
  1070. * otherwise set it to the default of all CCK rates and 6, 12, 24 for
  1071. * OFDM
  1072. */
  1073. if (priv->active_rate_basic & IWL_CCK_BASIC_RATES_MASK)
  1074. priv->staging_rxon.cck_basic_rates =
  1075. ((priv->active_rate_basic &
  1076. IWL_CCK_RATES_MASK) >> IWL_FIRST_CCK_RATE) & 0xF;
  1077. else
  1078. priv->staging_rxon.cck_basic_rates =
  1079. (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
  1080. if (priv->active_rate_basic & IWL_OFDM_BASIC_RATES_MASK)
  1081. priv->staging_rxon.ofdm_basic_rates =
  1082. ((priv->active_rate_basic &
  1083. (IWL_OFDM_BASIC_RATES_MASK | IWL_RATE_6M_MASK)) >>
  1084. IWL_FIRST_OFDM_RATE) & 0xFF;
  1085. else
  1086. priv->staging_rxon.ofdm_basic_rates =
  1087. (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
  1088. }
  1089. void iwl_rx_csa(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb)
  1090. {
  1091. struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
  1092. struct iwl_rxon_cmd *rxon = (void *)&priv->active_rxon;
  1093. struct iwl_csa_notification *csa = &(pkt->u.csa_notif);
  1094. IWL_DEBUG_11H(priv, "CSA notif: channel %d, status %d\n",
  1095. le16_to_cpu(csa->channel), le32_to_cpu(csa->status));
  1096. rxon->channel = csa->channel;
  1097. priv->staging_rxon.channel = csa->channel;
  1098. }
  1099. EXPORT_SYMBOL(iwl_rx_csa);
  1100. #ifdef CONFIG_IWLWIFI_DEBUG
  1101. static void iwl_print_rx_config_cmd(struct iwl_priv *priv)
  1102. {
  1103. struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
  1104. IWL_DEBUG_RADIO(priv, "RX CONFIG:\n");
  1105. iwl_print_hex_dump(priv, IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
  1106. IWL_DEBUG_RADIO(priv, "u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
  1107. IWL_DEBUG_RADIO(priv, "u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
  1108. IWL_DEBUG_RADIO(priv, "u32 filter_flags: 0x%08x\n",
  1109. le32_to_cpu(rxon->filter_flags));
  1110. IWL_DEBUG_RADIO(priv, "u8 dev_type: 0x%x\n", rxon->dev_type);
  1111. IWL_DEBUG_RADIO(priv, "u8 ofdm_basic_rates: 0x%02x\n",
  1112. rxon->ofdm_basic_rates);
  1113. IWL_DEBUG_RADIO(priv, "u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
  1114. IWL_DEBUG_RADIO(priv, "u8[6] node_addr: %pM\n", rxon->node_addr);
  1115. IWL_DEBUG_RADIO(priv, "u8[6] bssid_addr: %pM\n", rxon->bssid_addr);
  1116. IWL_DEBUG_RADIO(priv, "u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
  1117. }
  1118. #endif
  1119. /**
  1120. * iwl_irq_handle_error - called for HW or SW error interrupt from card
  1121. */
  1122. void iwl_irq_handle_error(struct iwl_priv *priv)
  1123. {
  1124. /* Set the FW error flag -- cleared on iwl_down */
  1125. set_bit(STATUS_FW_ERROR, &priv->status);
  1126. /* Cancel currently queued command. */
  1127. clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
  1128. #ifdef CONFIG_IWLWIFI_DEBUG
  1129. if (iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS) {
  1130. priv->cfg->ops->lib->dump_nic_error_log(priv);
  1131. priv->cfg->ops->lib->dump_nic_event_log(priv);
  1132. iwl_print_rx_config_cmd(priv);
  1133. }
  1134. #endif
  1135. wake_up_interruptible(&priv->wait_command_queue);
  1136. /* Keep the restart process from trying to send host
  1137. * commands by clearing the INIT status bit */
  1138. clear_bit(STATUS_READY, &priv->status);
  1139. if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  1140. IWL_DEBUG(priv, IWL_DL_FW_ERRORS,
  1141. "Restarting adapter due to uCode error.\n");
  1142. if (priv->cfg->mod_params->restart_fw)
  1143. queue_work(priv->workqueue, &priv->restart);
  1144. }
  1145. }
  1146. EXPORT_SYMBOL(iwl_irq_handle_error);
  1147. void iwl_configure_filter(struct ieee80211_hw *hw,
  1148. unsigned int changed_flags,
  1149. unsigned int *total_flags,
  1150. u64 multicast)
  1151. {
  1152. struct iwl_priv *priv = hw->priv;
  1153. __le32 *filter_flags = &priv->staging_rxon.filter_flags;
  1154. IWL_DEBUG_MAC80211(priv, "Enter: changed: 0x%x, total: 0x%x\n",
  1155. changed_flags, *total_flags);
  1156. if (changed_flags & (FIF_OTHER_BSS | FIF_PROMISC_IN_BSS)) {
  1157. if (*total_flags & (FIF_OTHER_BSS | FIF_PROMISC_IN_BSS))
  1158. *filter_flags |= RXON_FILTER_PROMISC_MSK;
  1159. else
  1160. *filter_flags &= ~RXON_FILTER_PROMISC_MSK;
  1161. }
  1162. if (changed_flags & FIF_ALLMULTI) {
  1163. if (*total_flags & FIF_ALLMULTI)
  1164. *filter_flags |= RXON_FILTER_ACCEPT_GRP_MSK;
  1165. else
  1166. *filter_flags &= ~RXON_FILTER_ACCEPT_GRP_MSK;
  1167. }
  1168. if (changed_flags & FIF_CONTROL) {
  1169. if (*total_flags & FIF_CONTROL)
  1170. *filter_flags |= RXON_FILTER_CTL2HOST_MSK;
  1171. else
  1172. *filter_flags &= ~RXON_FILTER_CTL2HOST_MSK;
  1173. }
  1174. if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
  1175. if (*total_flags & FIF_BCN_PRBRESP_PROMISC)
  1176. *filter_flags |= RXON_FILTER_BCON_AWARE_MSK;
  1177. else
  1178. *filter_flags &= ~RXON_FILTER_BCON_AWARE_MSK;
  1179. }
  1180. /* We avoid iwl_commit_rxon here to commit the new filter flags
  1181. * since mac80211 will call ieee80211_hw_config immediately.
  1182. * (mc_list is not supported at this time). Otherwise, we need to
  1183. * queue a background iwl_commit_rxon work.
  1184. */
  1185. *total_flags &= FIF_OTHER_BSS | FIF_ALLMULTI | FIF_PROMISC_IN_BSS |
  1186. FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL;
  1187. }
  1188. EXPORT_SYMBOL(iwl_configure_filter);
  1189. int iwl_setup_mac(struct iwl_priv *priv)
  1190. {
  1191. int ret;
  1192. struct ieee80211_hw *hw = priv->hw;
  1193. hw->rate_control_algorithm = "iwl-agn-rs";
  1194. /* Tell mac80211 our characteristics */
  1195. hw->flags = IEEE80211_HW_SIGNAL_DBM |
  1196. IEEE80211_HW_NOISE_DBM |
  1197. IEEE80211_HW_AMPDU_AGGREGATION |
  1198. IEEE80211_HW_SPECTRUM_MGMT;
  1199. if (!priv->cfg->broken_powersave)
  1200. hw->flags |= IEEE80211_HW_SUPPORTS_PS |
  1201. IEEE80211_HW_SUPPORTS_DYNAMIC_PS;
  1202. hw->wiphy->interface_modes =
  1203. BIT(NL80211_IFTYPE_STATION) |
  1204. BIT(NL80211_IFTYPE_ADHOC);
  1205. hw->wiphy->custom_regulatory = true;
  1206. /* Firmware does not support this */
  1207. hw->wiphy->disable_beacon_hints = true;
  1208. /*
  1209. * For now, disable PS by default because it affects
  1210. * RX performance significantly.
  1211. */
  1212. hw->wiphy->ps_default = false;
  1213. hw->wiphy->max_scan_ssids = PROBE_OPTION_MAX;
  1214. /* we create the 802.11 header and a zero-length SSID element */
  1215. hw->wiphy->max_scan_ie_len = IWL_MAX_PROBE_REQUEST - 24 - 2;
  1216. /* Default value; 4 EDCA QOS priorities */
  1217. hw->queues = 4;
  1218. hw->max_listen_interval = IWL_CONN_MAX_LISTEN_INTERVAL;
  1219. if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
  1220. priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
  1221. &priv->bands[IEEE80211_BAND_2GHZ];
  1222. if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
  1223. priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
  1224. &priv->bands[IEEE80211_BAND_5GHZ];
  1225. ret = ieee80211_register_hw(priv->hw);
  1226. if (ret) {
  1227. IWL_ERR(priv, "Failed to register hw (error %d)\n", ret);
  1228. return ret;
  1229. }
  1230. priv->mac80211_registered = 1;
  1231. return 0;
  1232. }
  1233. EXPORT_SYMBOL(iwl_setup_mac);
  1234. int iwl_set_hw_params(struct iwl_priv *priv)
  1235. {
  1236. priv->hw_params.max_rxq_size = RX_QUEUE_SIZE;
  1237. priv->hw_params.max_rxq_log = RX_QUEUE_SIZE_LOG;
  1238. if (priv->cfg->mod_params->amsdu_size_8K)
  1239. priv->hw_params.rx_buf_size = IWL_RX_BUF_SIZE_8K;
  1240. else
  1241. priv->hw_params.rx_buf_size = IWL_RX_BUF_SIZE_4K;
  1242. priv->hw_params.max_pkt_size = priv->hw_params.rx_buf_size - 256;
  1243. priv->hw_params.max_beacon_itrvl = IWL_MAX_UCODE_BEACON_INTERVAL;
  1244. if (priv->cfg->mod_params->disable_11n)
  1245. priv->cfg->sku &= ~IWL_SKU_N;
  1246. /* Device-specific setup */
  1247. return priv->cfg->ops->lib->set_hw_params(priv);
  1248. }
  1249. EXPORT_SYMBOL(iwl_set_hw_params);
  1250. int iwl_init_drv(struct iwl_priv *priv)
  1251. {
  1252. int ret;
  1253. priv->ibss_beacon = NULL;
  1254. spin_lock_init(&priv->lock);
  1255. spin_lock_init(&priv->sta_lock);
  1256. spin_lock_init(&priv->hcmd_lock);
  1257. INIT_LIST_HEAD(&priv->free_frames);
  1258. mutex_init(&priv->mutex);
  1259. /* Clear the driver's (not device's) station table */
  1260. iwl_clear_stations_table(priv);
  1261. priv->data_retry_limit = -1;
  1262. priv->ieee_channels = NULL;
  1263. priv->ieee_rates = NULL;
  1264. priv->band = IEEE80211_BAND_2GHZ;
  1265. priv->iw_mode = NL80211_IFTYPE_STATION;
  1266. priv->current_ht_config.sm_ps = WLAN_HT_CAP_SM_PS_DISABLED;
  1267. /* Choose which receivers/antennas to use */
  1268. if (priv->cfg->ops->hcmd->set_rxon_chain)
  1269. priv->cfg->ops->hcmd->set_rxon_chain(priv);
  1270. iwl_init_scan_params(priv);
  1271. iwl_reset_qos(priv);
  1272. priv->qos_data.qos_active = 0;
  1273. priv->qos_data.qos_cap.val = 0;
  1274. priv->rates_mask = IWL_RATES_MASK;
  1275. /* Set the tx_power_user_lmt to the lowest power level
  1276. * this value will get overwritten by channel max power avg
  1277. * from eeprom */
  1278. priv->tx_power_user_lmt = IWL_TX_POWER_TARGET_POWER_MIN;
  1279. ret = iwl_init_channel_map(priv);
  1280. if (ret) {
  1281. IWL_ERR(priv, "initializing regulatory failed: %d\n", ret);
  1282. goto err;
  1283. }
  1284. ret = iwlcore_init_geos(priv);
  1285. if (ret) {
  1286. IWL_ERR(priv, "initializing geos failed: %d\n", ret);
  1287. goto err_free_channel_map;
  1288. }
  1289. iwlcore_init_hw_rates(priv, priv->ieee_rates);
  1290. return 0;
  1291. err_free_channel_map:
  1292. iwl_free_channel_map(priv);
  1293. err:
  1294. return ret;
  1295. }
  1296. EXPORT_SYMBOL(iwl_init_drv);
  1297. int iwl_set_tx_power(struct iwl_priv *priv, s8 tx_power, bool force)
  1298. {
  1299. int ret = 0;
  1300. s8 prev_tx_power = priv->tx_power_user_lmt;
  1301. if (tx_power < IWL_TX_POWER_TARGET_POWER_MIN) {
  1302. IWL_WARN(priv, "Requested user TXPOWER %d below lower limit %d.\n",
  1303. tx_power,
  1304. IWL_TX_POWER_TARGET_POWER_MIN);
  1305. return -EINVAL;
  1306. }
  1307. if (tx_power > priv->tx_power_device_lmt) {
  1308. IWL_WARN(priv,
  1309. "Requested user TXPOWER %d above upper limit %d.\n",
  1310. tx_power, priv->tx_power_device_lmt);
  1311. return -EINVAL;
  1312. }
  1313. if (priv->tx_power_user_lmt != tx_power)
  1314. force = true;
  1315. /* if nic is not up don't send command */
  1316. if (iwl_is_ready_rf(priv)) {
  1317. priv->tx_power_user_lmt = tx_power;
  1318. if (force && priv->cfg->ops->lib->send_tx_power)
  1319. ret = priv->cfg->ops->lib->send_tx_power(priv);
  1320. else if (!priv->cfg->ops->lib->send_tx_power)
  1321. ret = -EOPNOTSUPP;
  1322. /*
  1323. * if fail to set tx_power, restore the orig. tx power
  1324. */
  1325. if (ret)
  1326. priv->tx_power_user_lmt = prev_tx_power;
  1327. }
  1328. /*
  1329. * Even this is an async host command, the command
  1330. * will always report success from uCode
  1331. * So once driver can placing the command into the queue
  1332. * successfully, driver can use priv->tx_power_user_lmt
  1333. * to reflect the current tx power
  1334. */
  1335. return ret;
  1336. }
  1337. EXPORT_SYMBOL(iwl_set_tx_power);
  1338. void iwl_uninit_drv(struct iwl_priv *priv)
  1339. {
  1340. iwl_calib_free_results(priv);
  1341. iwlcore_free_geos(priv);
  1342. iwl_free_channel_map(priv);
  1343. kfree(priv->scan);
  1344. }
  1345. EXPORT_SYMBOL(iwl_uninit_drv);
  1346. #define ICT_COUNT (PAGE_SIZE/sizeof(u32))
  1347. /* Free dram table */
  1348. void iwl_free_isr_ict(struct iwl_priv *priv)
  1349. {
  1350. if (priv->ict_tbl_vir) {
  1351. pci_free_consistent(priv->pci_dev, (sizeof(u32) * ICT_COUNT) +
  1352. PAGE_SIZE, priv->ict_tbl_vir,
  1353. priv->ict_tbl_dma);
  1354. priv->ict_tbl_vir = NULL;
  1355. }
  1356. }
  1357. EXPORT_SYMBOL(iwl_free_isr_ict);
  1358. /* allocate dram shared table it is a PAGE_SIZE aligned
  1359. * also reset all data related to ICT table interrupt.
  1360. */
  1361. int iwl_alloc_isr_ict(struct iwl_priv *priv)
  1362. {
  1363. if (priv->cfg->use_isr_legacy)
  1364. return 0;
  1365. /* allocate shrared data table */
  1366. priv->ict_tbl_vir = pci_alloc_consistent(priv->pci_dev, (sizeof(u32) *
  1367. ICT_COUNT) + PAGE_SIZE,
  1368. &priv->ict_tbl_dma);
  1369. if (!priv->ict_tbl_vir)
  1370. return -ENOMEM;
  1371. /* align table to PAGE_SIZE boundry */
  1372. priv->aligned_ict_tbl_dma = ALIGN(priv->ict_tbl_dma, PAGE_SIZE);
  1373. IWL_DEBUG_ISR(priv, "ict dma addr %Lx dma aligned %Lx diff %d\n",
  1374. (unsigned long long)priv->ict_tbl_dma,
  1375. (unsigned long long)priv->aligned_ict_tbl_dma,
  1376. (int)(priv->aligned_ict_tbl_dma - priv->ict_tbl_dma));
  1377. priv->ict_tbl = priv->ict_tbl_vir +
  1378. (priv->aligned_ict_tbl_dma - priv->ict_tbl_dma);
  1379. IWL_DEBUG_ISR(priv, "ict vir addr %p vir aligned %p diff %d\n",
  1380. priv->ict_tbl, priv->ict_tbl_vir,
  1381. (int)(priv->aligned_ict_tbl_dma - priv->ict_tbl_dma));
  1382. /* reset table and index to all 0 */
  1383. memset(priv->ict_tbl_vir,0, (sizeof(u32) * ICT_COUNT) + PAGE_SIZE);
  1384. priv->ict_index = 0;
  1385. /* add periodic RX interrupt */
  1386. priv->inta_mask |= CSR_INT_BIT_RX_PERIODIC;
  1387. return 0;
  1388. }
  1389. EXPORT_SYMBOL(iwl_alloc_isr_ict);
  1390. /* Device is going up inform it about using ICT interrupt table,
  1391. * also we need to tell the driver to start using ICT interrupt.
  1392. */
  1393. int iwl_reset_ict(struct iwl_priv *priv)
  1394. {
  1395. u32 val;
  1396. unsigned long flags;
  1397. if (!priv->ict_tbl_vir)
  1398. return 0;
  1399. spin_lock_irqsave(&priv->lock, flags);
  1400. iwl_disable_interrupts(priv);
  1401. memset(&priv->ict_tbl[0], 0, sizeof(u32) * ICT_COUNT);
  1402. val = priv->aligned_ict_tbl_dma >> PAGE_SHIFT;
  1403. val |= CSR_DRAM_INT_TBL_ENABLE;
  1404. val |= CSR_DRAM_INIT_TBL_WRAP_CHECK;
  1405. IWL_DEBUG_ISR(priv, "CSR_DRAM_INT_TBL_REG =0x%X "
  1406. "aligned dma address %Lx\n",
  1407. val, (unsigned long long)priv->aligned_ict_tbl_dma);
  1408. iwl_write32(priv, CSR_DRAM_INT_TBL_REG, val);
  1409. priv->use_ict = true;
  1410. priv->ict_index = 0;
  1411. iwl_write32(priv, CSR_INT, priv->inta_mask);
  1412. iwl_enable_interrupts(priv);
  1413. spin_unlock_irqrestore(&priv->lock, flags);
  1414. return 0;
  1415. }
  1416. EXPORT_SYMBOL(iwl_reset_ict);
  1417. /* Device is going down disable ict interrupt usage */
  1418. void iwl_disable_ict(struct iwl_priv *priv)
  1419. {
  1420. unsigned long flags;
  1421. spin_lock_irqsave(&priv->lock, flags);
  1422. priv->use_ict = false;
  1423. spin_unlock_irqrestore(&priv->lock, flags);
  1424. }
  1425. EXPORT_SYMBOL(iwl_disable_ict);
  1426. /* interrupt handler using ict table, with this interrupt driver will
  1427. * stop using INTA register to get device's interrupt, reading this register
  1428. * is expensive, device will write interrupts in ICT dram table, increment
  1429. * index then will fire interrupt to driver, driver will OR all ICT table
  1430. * entries from current index up to table entry with 0 value. the result is
  1431. * the interrupt we need to service, driver will set the entries back to 0 and
  1432. * set index.
  1433. */
  1434. irqreturn_t iwl_isr_ict(int irq, void *data)
  1435. {
  1436. struct iwl_priv *priv = data;
  1437. u32 inta, inta_mask;
  1438. u32 val = 0;
  1439. if (!priv)
  1440. return IRQ_NONE;
  1441. /* dram interrupt table not set yet,
  1442. * use legacy interrupt.
  1443. */
  1444. if (!priv->use_ict)
  1445. return iwl_isr(irq, data);
  1446. spin_lock(&priv->lock);
  1447. /* Disable (but don't clear!) interrupts here to avoid
  1448. * back-to-back ISRs and sporadic interrupts from our NIC.
  1449. * If we have something to service, the tasklet will re-enable ints.
  1450. * If we *don't* have something, we'll re-enable before leaving here.
  1451. */
  1452. inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */
  1453. iwl_write32(priv, CSR_INT_MASK, 0x00000000);
  1454. /* Ignore interrupt if there's nothing in NIC to service.
  1455. * This may be due to IRQ shared with another device,
  1456. * or due to sporadic interrupts thrown from our NIC. */
  1457. if (!priv->ict_tbl[priv->ict_index]) {
  1458. IWL_DEBUG_ISR(priv, "Ignore interrupt, inta == 0\n");
  1459. goto none;
  1460. }
  1461. /* read all entries that not 0 start with ict_index */
  1462. while (priv->ict_tbl[priv->ict_index]) {
  1463. val |= le32_to_cpu(priv->ict_tbl[priv->ict_index]);
  1464. IWL_DEBUG_ISR(priv, "ICT index %d value 0x%08X\n",
  1465. priv->ict_index,
  1466. le32_to_cpu(priv->ict_tbl[priv->ict_index]));
  1467. priv->ict_tbl[priv->ict_index] = 0;
  1468. priv->ict_index = iwl_queue_inc_wrap(priv->ict_index,
  1469. ICT_COUNT);
  1470. }
  1471. /* We should not get this value, just ignore it. */
  1472. if (val == 0xffffffff)
  1473. val = 0;
  1474. inta = (0xff & val) | ((0xff00 & val) << 16);
  1475. IWL_DEBUG_ISR(priv, "ISR inta 0x%08x, enabled 0x%08x ict 0x%08x\n",
  1476. inta, inta_mask, val);
  1477. inta &= priv->inta_mask;
  1478. priv->inta |= inta;
  1479. /* iwl_irq_tasklet() will service interrupts and re-enable them */
  1480. if (likely(inta))
  1481. tasklet_schedule(&priv->irq_tasklet);
  1482. else if (test_bit(STATUS_INT_ENABLED, &priv->status) && !priv->inta) {
  1483. /* Allow interrupt if was disabled by this handler and
  1484. * no tasklet was schedules, We should not enable interrupt,
  1485. * tasklet will enable it.
  1486. */
  1487. iwl_enable_interrupts(priv);
  1488. }
  1489. spin_unlock(&priv->lock);
  1490. return IRQ_HANDLED;
  1491. none:
  1492. /* re-enable interrupts here since we don't have anything to service.
  1493. * only Re-enable if disabled by irq.
  1494. */
  1495. if (test_bit(STATUS_INT_ENABLED, &priv->status) && !priv->inta)
  1496. iwl_enable_interrupts(priv);
  1497. spin_unlock(&priv->lock);
  1498. return IRQ_NONE;
  1499. }
  1500. EXPORT_SYMBOL(iwl_isr_ict);
  1501. static irqreturn_t iwl_isr(int irq, void *data)
  1502. {
  1503. struct iwl_priv *priv = data;
  1504. u32 inta, inta_mask;
  1505. #ifdef CONFIG_IWLWIFI_DEBUG
  1506. u32 inta_fh;
  1507. #endif
  1508. if (!priv)
  1509. return IRQ_NONE;
  1510. spin_lock(&priv->lock);
  1511. /* Disable (but don't clear!) interrupts here to avoid
  1512. * back-to-back ISRs and sporadic interrupts from our NIC.
  1513. * If we have something to service, the tasklet will re-enable ints.
  1514. * If we *don't* have something, we'll re-enable before leaving here. */
  1515. inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */
  1516. iwl_write32(priv, CSR_INT_MASK, 0x00000000);
  1517. /* Discover which interrupts are active/pending */
  1518. inta = iwl_read32(priv, CSR_INT);
  1519. /* Ignore interrupt if there's nothing in NIC to service.
  1520. * This may be due to IRQ shared with another device,
  1521. * or due to sporadic interrupts thrown from our NIC. */
  1522. if (!inta) {
  1523. IWL_DEBUG_ISR(priv, "Ignore interrupt, inta == 0\n");
  1524. goto none;
  1525. }
  1526. if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
  1527. /* Hardware disappeared. It might have already raised
  1528. * an interrupt */
  1529. IWL_WARN(priv, "HARDWARE GONE?? INTA == 0x%08x\n", inta);
  1530. goto unplugged;
  1531. }
  1532. #ifdef CONFIG_IWLWIFI_DEBUG
  1533. if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
  1534. inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
  1535. IWL_DEBUG_ISR(priv, "ISR inta 0x%08x, enabled 0x%08x, "
  1536. "fh 0x%08x\n", inta, inta_mask, inta_fh);
  1537. }
  1538. #endif
  1539. priv->inta |= inta;
  1540. /* iwl_irq_tasklet() will service interrupts and re-enable them */
  1541. if (likely(inta))
  1542. tasklet_schedule(&priv->irq_tasklet);
  1543. else if (test_bit(STATUS_INT_ENABLED, &priv->status) && !priv->inta)
  1544. iwl_enable_interrupts(priv);
  1545. unplugged:
  1546. spin_unlock(&priv->lock);
  1547. return IRQ_HANDLED;
  1548. none:
  1549. /* re-enable interrupts here since we don't have anything to service. */
  1550. /* only Re-enable if diabled by irq and no schedules tasklet. */
  1551. if (test_bit(STATUS_INT_ENABLED, &priv->status) && !priv->inta)
  1552. iwl_enable_interrupts(priv);
  1553. spin_unlock(&priv->lock);
  1554. return IRQ_NONE;
  1555. }
  1556. irqreturn_t iwl_isr_legacy(int irq, void *data)
  1557. {
  1558. struct iwl_priv *priv = data;
  1559. u32 inta, inta_mask;
  1560. u32 inta_fh;
  1561. if (!priv)
  1562. return IRQ_NONE;
  1563. spin_lock(&priv->lock);
  1564. /* Disable (but don't clear!) interrupts here to avoid
  1565. * back-to-back ISRs and sporadic interrupts from our NIC.
  1566. * If we have something to service, the tasklet will re-enable ints.
  1567. * If we *don't* have something, we'll re-enable before leaving here. */
  1568. inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */
  1569. iwl_write32(priv, CSR_INT_MASK, 0x00000000);
  1570. /* Discover which interrupts are active/pending */
  1571. inta = iwl_read32(priv, CSR_INT);
  1572. inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
  1573. /* Ignore interrupt if there's nothing in NIC to service.
  1574. * This may be due to IRQ shared with another device,
  1575. * or due to sporadic interrupts thrown from our NIC. */
  1576. if (!inta && !inta_fh) {
  1577. IWL_DEBUG_ISR(priv, "Ignore interrupt, inta == 0, inta_fh == 0\n");
  1578. goto none;
  1579. }
  1580. if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
  1581. /* Hardware disappeared. It might have already raised
  1582. * an interrupt */
  1583. IWL_WARN(priv, "HARDWARE GONE?? INTA == 0x%08x\n", inta);
  1584. goto unplugged;
  1585. }
  1586. IWL_DEBUG_ISR(priv, "ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
  1587. inta, inta_mask, inta_fh);
  1588. inta &= ~CSR_INT_BIT_SCD;
  1589. /* iwl_irq_tasklet() will service interrupts and re-enable them */
  1590. if (likely(inta || inta_fh))
  1591. tasklet_schedule(&priv->irq_tasklet);
  1592. unplugged:
  1593. spin_unlock(&priv->lock);
  1594. return IRQ_HANDLED;
  1595. none:
  1596. /* re-enable interrupts here since we don't have anything to service. */
  1597. /* only Re-enable if diabled by irq */
  1598. if (test_bit(STATUS_INT_ENABLED, &priv->status))
  1599. iwl_enable_interrupts(priv);
  1600. spin_unlock(&priv->lock);
  1601. return IRQ_NONE;
  1602. }
  1603. EXPORT_SYMBOL(iwl_isr_legacy);
  1604. int iwl_send_bt_config(struct iwl_priv *priv)
  1605. {
  1606. struct iwl_bt_cmd bt_cmd = {
  1607. .flags = 3,
  1608. .lead_time = 0xAA,
  1609. .max_kill = 1,
  1610. .kill_ack_mask = 0,
  1611. .kill_cts_mask = 0,
  1612. };
  1613. return iwl_send_cmd_pdu(priv, REPLY_BT_CONFIG,
  1614. sizeof(struct iwl_bt_cmd), &bt_cmd);
  1615. }
  1616. EXPORT_SYMBOL(iwl_send_bt_config);
  1617. int iwl_send_statistics_request(struct iwl_priv *priv, u8 flags)
  1618. {
  1619. u32 stat_flags = 0;
  1620. struct iwl_host_cmd cmd = {
  1621. .id = REPLY_STATISTICS_CMD,
  1622. .flags = flags,
  1623. .len = sizeof(stat_flags),
  1624. .data = (u8 *) &stat_flags,
  1625. };
  1626. return iwl_send_cmd(priv, &cmd);
  1627. }
  1628. EXPORT_SYMBOL(iwl_send_statistics_request);
  1629. /**
  1630. * iwl_verify_inst_sparse - verify runtime uCode image in card vs. host,
  1631. * using sample data 100 bytes apart. If these sample points are good,
  1632. * it's a pretty good bet that everything between them is good, too.
  1633. */
  1634. static int iwlcore_verify_inst_sparse(struct iwl_priv *priv, __le32 *image, u32 len)
  1635. {
  1636. u32 val;
  1637. int ret = 0;
  1638. u32 errcnt = 0;
  1639. u32 i;
  1640. IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
  1641. for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
  1642. /* read data comes through single port, auto-incr addr */
  1643. /* NOTE: Use the debugless read so we don't flood kernel log
  1644. * if IWL_DL_IO is set */
  1645. iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
  1646. i + IWL49_RTC_INST_LOWER_BOUND);
  1647. val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  1648. if (val != le32_to_cpu(*image)) {
  1649. ret = -EIO;
  1650. errcnt++;
  1651. if (errcnt >= 3)
  1652. break;
  1653. }
  1654. }
  1655. return ret;
  1656. }
  1657. /**
  1658. * iwlcore_verify_inst_full - verify runtime uCode image in card vs. host,
  1659. * looking at all data.
  1660. */
  1661. static int iwl_verify_inst_full(struct iwl_priv *priv, __le32 *image,
  1662. u32 len)
  1663. {
  1664. u32 val;
  1665. u32 save_len = len;
  1666. int ret = 0;
  1667. u32 errcnt;
  1668. IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
  1669. iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
  1670. IWL49_RTC_INST_LOWER_BOUND);
  1671. errcnt = 0;
  1672. for (; len > 0; len -= sizeof(u32), image++) {
  1673. /* read data comes through single port, auto-incr addr */
  1674. /* NOTE: Use the debugless read so we don't flood kernel log
  1675. * if IWL_DL_IO is set */
  1676. val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  1677. if (val != le32_to_cpu(*image)) {
  1678. IWL_ERR(priv, "uCode INST section is invalid at "
  1679. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  1680. save_len - len, val, le32_to_cpu(*image));
  1681. ret = -EIO;
  1682. errcnt++;
  1683. if (errcnt >= 20)
  1684. break;
  1685. }
  1686. }
  1687. if (!errcnt)
  1688. IWL_DEBUG_INFO(priv,
  1689. "ucode image in INSTRUCTION memory is good\n");
  1690. return ret;
  1691. }
  1692. /**
  1693. * iwl_verify_ucode - determine which instruction image is in SRAM,
  1694. * and verify its contents
  1695. */
  1696. int iwl_verify_ucode(struct iwl_priv *priv)
  1697. {
  1698. __le32 *image;
  1699. u32 len;
  1700. int ret;
  1701. /* Try bootstrap */
  1702. image = (__le32 *)priv->ucode_boot.v_addr;
  1703. len = priv->ucode_boot.len;
  1704. ret = iwlcore_verify_inst_sparse(priv, image, len);
  1705. if (!ret) {
  1706. IWL_DEBUG_INFO(priv, "Bootstrap uCode is good in inst SRAM\n");
  1707. return 0;
  1708. }
  1709. /* Try initialize */
  1710. image = (__le32 *)priv->ucode_init.v_addr;
  1711. len = priv->ucode_init.len;
  1712. ret = iwlcore_verify_inst_sparse(priv, image, len);
  1713. if (!ret) {
  1714. IWL_DEBUG_INFO(priv, "Initialize uCode is good in inst SRAM\n");
  1715. return 0;
  1716. }
  1717. /* Try runtime/protocol */
  1718. image = (__le32 *)priv->ucode_code.v_addr;
  1719. len = priv->ucode_code.len;
  1720. ret = iwlcore_verify_inst_sparse(priv, image, len);
  1721. if (!ret) {
  1722. IWL_DEBUG_INFO(priv, "Runtime uCode is good in inst SRAM\n");
  1723. return 0;
  1724. }
  1725. IWL_ERR(priv, "NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
  1726. /* Since nothing seems to match, show first several data entries in
  1727. * instruction SRAM, so maybe visual inspection will give a clue.
  1728. * Selection of bootstrap image (vs. other images) is arbitrary. */
  1729. image = (__le32 *)priv->ucode_boot.v_addr;
  1730. len = priv->ucode_boot.len;
  1731. ret = iwl_verify_inst_full(priv, image, len);
  1732. return ret;
  1733. }
  1734. EXPORT_SYMBOL(iwl_verify_ucode);
  1735. void iwl_rf_kill_ct_config(struct iwl_priv *priv)
  1736. {
  1737. struct iwl_ct_kill_config cmd;
  1738. struct iwl_ct_kill_throttling_config adv_cmd;
  1739. unsigned long flags;
  1740. int ret = 0;
  1741. spin_lock_irqsave(&priv->lock, flags);
  1742. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
  1743. CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
  1744. spin_unlock_irqrestore(&priv->lock, flags);
  1745. priv->thermal_throttle.ct_kill_toggle = false;
  1746. switch (priv->hw_rev & CSR_HW_REV_TYPE_MSK) {
  1747. case CSR_HW_REV_TYPE_1000:
  1748. case CSR_HW_REV_TYPE_6x00:
  1749. case CSR_HW_REV_TYPE_6x50:
  1750. adv_cmd.critical_temperature_enter =
  1751. cpu_to_le32(priv->hw_params.ct_kill_threshold);
  1752. adv_cmd.critical_temperature_exit =
  1753. cpu_to_le32(priv->hw_params.ct_kill_exit_threshold);
  1754. ret = iwl_send_cmd_pdu(priv, REPLY_CT_KILL_CONFIG_CMD,
  1755. sizeof(adv_cmd), &adv_cmd);
  1756. if (ret)
  1757. IWL_ERR(priv, "REPLY_CT_KILL_CONFIG_CMD failed\n");
  1758. else
  1759. IWL_DEBUG_INFO(priv, "REPLY_CT_KILL_CONFIG_CMD "
  1760. "succeeded, "
  1761. "critical temperature enter is %d,"
  1762. "exit is %d\n",
  1763. priv->hw_params.ct_kill_threshold,
  1764. priv->hw_params.ct_kill_exit_threshold);
  1765. break;
  1766. default:
  1767. cmd.critical_temperature_R =
  1768. cpu_to_le32(priv->hw_params.ct_kill_threshold);
  1769. ret = iwl_send_cmd_pdu(priv, REPLY_CT_KILL_CONFIG_CMD,
  1770. sizeof(cmd), &cmd);
  1771. if (ret)
  1772. IWL_ERR(priv, "REPLY_CT_KILL_CONFIG_CMD failed\n");
  1773. else
  1774. IWL_DEBUG_INFO(priv, "REPLY_CT_KILL_CONFIG_CMD "
  1775. "succeeded, "
  1776. "critical temperature is %d\n",
  1777. priv->hw_params.ct_kill_threshold);
  1778. break;
  1779. }
  1780. }
  1781. EXPORT_SYMBOL(iwl_rf_kill_ct_config);
  1782. /*
  1783. * CARD_STATE_CMD
  1784. *
  1785. * Use: Sets the device's internal card state to enable, disable, or halt
  1786. *
  1787. * When in the 'enable' state the card operates as normal.
  1788. * When in the 'disable' state, the card enters into a low power mode.
  1789. * When in the 'halt' state, the card is shut down and must be fully
  1790. * restarted to come back on.
  1791. */
  1792. int iwl_send_card_state(struct iwl_priv *priv, u32 flags, u8 meta_flag)
  1793. {
  1794. struct iwl_host_cmd cmd = {
  1795. .id = REPLY_CARD_STATE_CMD,
  1796. .len = sizeof(u32),
  1797. .data = &flags,
  1798. .flags = meta_flag,
  1799. };
  1800. return iwl_send_cmd(priv, &cmd);
  1801. }
  1802. void iwl_rx_pm_sleep_notif(struct iwl_priv *priv,
  1803. struct iwl_rx_mem_buffer *rxb)
  1804. {
  1805. #ifdef CONFIG_IWLWIFI_DEBUG
  1806. struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
  1807. struct iwl_sleep_notification *sleep = &(pkt->u.sleep_notif);
  1808. IWL_DEBUG_RX(priv, "sleep mode: %d, src: %d\n",
  1809. sleep->pm_sleep_mode, sleep->pm_wakeup_src);
  1810. #endif
  1811. }
  1812. EXPORT_SYMBOL(iwl_rx_pm_sleep_notif);
  1813. void iwl_rx_pm_debug_statistics_notif(struct iwl_priv *priv,
  1814. struct iwl_rx_mem_buffer *rxb)
  1815. {
  1816. struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
  1817. u32 len = le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK;
  1818. IWL_DEBUG_RADIO(priv, "Dumping %d bytes of unhandled "
  1819. "notification for %s:\n", len,
  1820. get_cmd_string(pkt->hdr.cmd));
  1821. iwl_print_hex_dump(priv, IWL_DL_RADIO, pkt->u.raw, len);
  1822. }
  1823. EXPORT_SYMBOL(iwl_rx_pm_debug_statistics_notif);
  1824. void iwl_rx_reply_error(struct iwl_priv *priv,
  1825. struct iwl_rx_mem_buffer *rxb)
  1826. {
  1827. struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
  1828. IWL_ERR(priv, "Error Reply type 0x%08X cmd %s (0x%02X) "
  1829. "seq 0x%04X ser 0x%08X\n",
  1830. le32_to_cpu(pkt->u.err_resp.error_type),
  1831. get_cmd_string(pkt->u.err_resp.cmd_id),
  1832. pkt->u.err_resp.cmd_id,
  1833. le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
  1834. le32_to_cpu(pkt->u.err_resp.error_info));
  1835. }
  1836. EXPORT_SYMBOL(iwl_rx_reply_error);
  1837. void iwl_clear_isr_stats(struct iwl_priv *priv)
  1838. {
  1839. memset(&priv->isr_stats, 0, sizeof(priv->isr_stats));
  1840. }
  1841. int iwl_mac_conf_tx(struct ieee80211_hw *hw, u16 queue,
  1842. const struct ieee80211_tx_queue_params *params)
  1843. {
  1844. struct iwl_priv *priv = hw->priv;
  1845. unsigned long flags;
  1846. int q;
  1847. IWL_DEBUG_MAC80211(priv, "enter\n");
  1848. if (!iwl_is_ready_rf(priv)) {
  1849. IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
  1850. return -EIO;
  1851. }
  1852. if (queue >= AC_NUM) {
  1853. IWL_DEBUG_MAC80211(priv, "leave - queue >= AC_NUM %d\n", queue);
  1854. return 0;
  1855. }
  1856. q = AC_NUM - 1 - queue;
  1857. spin_lock_irqsave(&priv->lock, flags);
  1858. priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
  1859. priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
  1860. priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
  1861. priv->qos_data.def_qos_parm.ac[q].edca_txop =
  1862. cpu_to_le16((params->txop * 32));
  1863. priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
  1864. priv->qos_data.qos_active = 1;
  1865. if (priv->iw_mode == NL80211_IFTYPE_AP)
  1866. iwl_activate_qos(priv, 1);
  1867. else if (priv->assoc_id && iwl_is_associated(priv))
  1868. iwl_activate_qos(priv, 0);
  1869. spin_unlock_irqrestore(&priv->lock, flags);
  1870. IWL_DEBUG_MAC80211(priv, "leave\n");
  1871. return 0;
  1872. }
  1873. EXPORT_SYMBOL(iwl_mac_conf_tx);
  1874. static void iwl_ht_conf(struct iwl_priv *priv,
  1875. struct ieee80211_bss_conf *bss_conf)
  1876. {
  1877. struct ieee80211_sta_ht_cap *ht_conf;
  1878. struct iwl_ht_info *iwl_conf = &priv->current_ht_config;
  1879. struct ieee80211_sta *sta;
  1880. IWL_DEBUG_MAC80211(priv, "enter: \n");
  1881. if (!iwl_conf->is_ht)
  1882. return;
  1883. /*
  1884. * It is totally wrong to base global information on something
  1885. * that is valid only when associated, alas, this driver works
  1886. * that way and I don't know how to fix it.
  1887. */
  1888. rcu_read_lock();
  1889. sta = ieee80211_find_sta(priv->hw, priv->bssid);
  1890. if (!sta) {
  1891. rcu_read_unlock();
  1892. return;
  1893. }
  1894. ht_conf = &sta->ht_cap;
  1895. iwl_conf->sm_ps = (u8)((ht_conf->cap & IEEE80211_HT_CAP_SM_PS) >> 2);
  1896. memcpy(&iwl_conf->mcs, &ht_conf->mcs, 16);
  1897. iwl_conf->ht_protection =
  1898. bss_conf->ht_operation_mode & IEEE80211_HT_OP_MODE_PROTECTION;
  1899. iwl_conf->non_GF_STA_present =
  1900. !!(bss_conf->ht_operation_mode & IEEE80211_HT_OP_MODE_NON_GF_STA_PRSNT);
  1901. rcu_read_unlock();
  1902. IWL_DEBUG_MAC80211(priv, "leave\n");
  1903. }
  1904. #define IWL_DELAY_NEXT_SCAN_AFTER_ASSOC (HZ*6)
  1905. void iwl_bss_info_changed(struct ieee80211_hw *hw,
  1906. struct ieee80211_vif *vif,
  1907. struct ieee80211_bss_conf *bss_conf,
  1908. u32 changes)
  1909. {
  1910. struct iwl_priv *priv = hw->priv;
  1911. int ret;
  1912. IWL_DEBUG_MAC80211(priv, "changes = 0x%X\n", changes);
  1913. if (!iwl_is_alive(priv))
  1914. return;
  1915. mutex_lock(&priv->mutex);
  1916. if (changes & BSS_CHANGED_BEACON &&
  1917. priv->iw_mode == NL80211_IFTYPE_AP) {
  1918. dev_kfree_skb(priv->ibss_beacon);
  1919. priv->ibss_beacon = ieee80211_beacon_get(hw, vif);
  1920. }
  1921. if (changes & BSS_CHANGED_BEACON_INT) {
  1922. priv->beacon_int = bss_conf->beacon_int;
  1923. /* TODO: in AP mode, do something to make this take effect */
  1924. }
  1925. if (changes & BSS_CHANGED_BSSID) {
  1926. IWL_DEBUG_MAC80211(priv, "BSSID %pM\n", bss_conf->bssid);
  1927. /*
  1928. * If there is currently a HW scan going on in the
  1929. * background then we need to cancel it else the RXON
  1930. * below/in post_associate will fail.
  1931. */
  1932. if (iwl_scan_cancel_timeout(priv, 100)) {
  1933. IWL_WARN(priv, "Aborted scan still in progress after 100ms\n");
  1934. IWL_DEBUG_MAC80211(priv, "leaving - scan abort failed.\n");
  1935. mutex_unlock(&priv->mutex);
  1936. return;
  1937. }
  1938. /* mac80211 only sets assoc when in STATION mode */
  1939. if (priv->iw_mode == NL80211_IFTYPE_ADHOC ||
  1940. bss_conf->assoc) {
  1941. memcpy(priv->staging_rxon.bssid_addr,
  1942. bss_conf->bssid, ETH_ALEN);
  1943. /* currently needed in a few places */
  1944. memcpy(priv->bssid, bss_conf->bssid, ETH_ALEN);
  1945. } else {
  1946. priv->staging_rxon.filter_flags &=
  1947. ~RXON_FILTER_ASSOC_MSK;
  1948. }
  1949. }
  1950. /*
  1951. * This needs to be after setting the BSSID in case
  1952. * mac80211 decides to do both changes at once because
  1953. * it will invoke post_associate.
  1954. */
  1955. if (priv->iw_mode == NL80211_IFTYPE_ADHOC &&
  1956. changes & BSS_CHANGED_BEACON) {
  1957. struct sk_buff *beacon = ieee80211_beacon_get(hw, vif);
  1958. if (beacon)
  1959. iwl_mac_beacon_update(hw, beacon);
  1960. }
  1961. if (changes & BSS_CHANGED_ERP_PREAMBLE) {
  1962. IWL_DEBUG_MAC80211(priv, "ERP_PREAMBLE %d\n",
  1963. bss_conf->use_short_preamble);
  1964. if (bss_conf->use_short_preamble)
  1965. priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  1966. else
  1967. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  1968. }
  1969. if (changes & BSS_CHANGED_ERP_CTS_PROT) {
  1970. IWL_DEBUG_MAC80211(priv, "ERP_CTS %d\n", bss_conf->use_cts_prot);
  1971. if (bss_conf->use_cts_prot && (priv->band != IEEE80211_BAND_5GHZ))
  1972. priv->staging_rxon.flags |= RXON_FLG_TGG_PROTECT_MSK;
  1973. else
  1974. priv->staging_rxon.flags &= ~RXON_FLG_TGG_PROTECT_MSK;
  1975. }
  1976. if (changes & BSS_CHANGED_BASIC_RATES) {
  1977. /* XXX use this information
  1978. *
  1979. * To do that, remove code from iwl_set_rate() and put something
  1980. * like this here:
  1981. *
  1982. if (A-band)
  1983. priv->staging_rxon.ofdm_basic_rates =
  1984. bss_conf->basic_rates;
  1985. else
  1986. priv->staging_rxon.ofdm_basic_rates =
  1987. bss_conf->basic_rates >> 4;
  1988. priv->staging_rxon.cck_basic_rates =
  1989. bss_conf->basic_rates & 0xF;
  1990. */
  1991. }
  1992. if (changes & BSS_CHANGED_HT) {
  1993. iwl_ht_conf(priv, bss_conf);
  1994. if (priv->cfg->ops->hcmd->set_rxon_chain)
  1995. priv->cfg->ops->hcmd->set_rxon_chain(priv);
  1996. }
  1997. if (changes & BSS_CHANGED_ASSOC) {
  1998. IWL_DEBUG_MAC80211(priv, "ASSOC %d\n", bss_conf->assoc);
  1999. if (bss_conf->assoc) {
  2000. priv->assoc_id = bss_conf->aid;
  2001. priv->beacon_int = bss_conf->beacon_int;
  2002. priv->timestamp = bss_conf->timestamp;
  2003. priv->assoc_capability = bss_conf->assoc_capability;
  2004. /*
  2005. * We have just associated, don't start scan too early
  2006. * leave time for EAPOL exchange to complete.
  2007. *
  2008. * XXX: do this in mac80211
  2009. */
  2010. priv->next_scan_jiffies = jiffies +
  2011. IWL_DELAY_NEXT_SCAN_AFTER_ASSOC;
  2012. if (!iwl_is_rfkill(priv))
  2013. priv->cfg->ops->lib->post_associate(priv);
  2014. } else
  2015. priv->assoc_id = 0;
  2016. }
  2017. if (changes && iwl_is_associated(priv) && priv->assoc_id) {
  2018. IWL_DEBUG_MAC80211(priv, "Changes (%#x) while associated\n",
  2019. changes);
  2020. ret = iwl_send_rxon_assoc(priv);
  2021. if (!ret) {
  2022. /* Sync active_rxon with latest change. */
  2023. memcpy((void *)&priv->active_rxon,
  2024. &priv->staging_rxon,
  2025. sizeof(struct iwl_rxon_cmd));
  2026. }
  2027. }
  2028. mutex_unlock(&priv->mutex);
  2029. IWL_DEBUG_MAC80211(priv, "leave\n");
  2030. }
  2031. EXPORT_SYMBOL(iwl_bss_info_changed);
  2032. int iwl_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb)
  2033. {
  2034. struct iwl_priv *priv = hw->priv;
  2035. unsigned long flags;
  2036. __le64 timestamp;
  2037. IWL_DEBUG_MAC80211(priv, "enter\n");
  2038. if (!iwl_is_ready_rf(priv)) {
  2039. IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
  2040. return -EIO;
  2041. }
  2042. if (priv->iw_mode != NL80211_IFTYPE_ADHOC) {
  2043. IWL_DEBUG_MAC80211(priv, "leave - not IBSS\n");
  2044. return -EIO;
  2045. }
  2046. spin_lock_irqsave(&priv->lock, flags);
  2047. if (priv->ibss_beacon)
  2048. dev_kfree_skb(priv->ibss_beacon);
  2049. priv->ibss_beacon = skb;
  2050. priv->assoc_id = 0;
  2051. timestamp = ((struct ieee80211_mgmt *)skb->data)->u.beacon.timestamp;
  2052. priv->timestamp = le64_to_cpu(timestamp);
  2053. IWL_DEBUG_MAC80211(priv, "leave\n");
  2054. spin_unlock_irqrestore(&priv->lock, flags);
  2055. iwl_reset_qos(priv);
  2056. priv->cfg->ops->lib->post_associate(priv);
  2057. return 0;
  2058. }
  2059. EXPORT_SYMBOL(iwl_mac_beacon_update);
  2060. int iwl_set_mode(struct iwl_priv *priv, int mode)
  2061. {
  2062. if (mode == NL80211_IFTYPE_ADHOC) {
  2063. const struct iwl_channel_info *ch_info;
  2064. ch_info = iwl_get_channel_info(priv,
  2065. priv->band,
  2066. le16_to_cpu(priv->staging_rxon.channel));
  2067. if (!ch_info || !is_channel_ibss(ch_info)) {
  2068. IWL_ERR(priv, "channel %d not IBSS channel\n",
  2069. le16_to_cpu(priv->staging_rxon.channel));
  2070. return -EINVAL;
  2071. }
  2072. }
  2073. iwl_connection_init_rx_config(priv, mode);
  2074. if (priv->cfg->ops->hcmd->set_rxon_chain)
  2075. priv->cfg->ops->hcmd->set_rxon_chain(priv);
  2076. memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
  2077. iwl_clear_stations_table(priv);
  2078. /* dont commit rxon if rf-kill is on*/
  2079. if (!iwl_is_ready_rf(priv))
  2080. return -EAGAIN;
  2081. iwlcore_commit_rxon(priv);
  2082. return 0;
  2083. }
  2084. EXPORT_SYMBOL(iwl_set_mode);
  2085. int iwl_mac_add_interface(struct ieee80211_hw *hw,
  2086. struct ieee80211_if_init_conf *conf)
  2087. {
  2088. struct iwl_priv *priv = hw->priv;
  2089. unsigned long flags;
  2090. IWL_DEBUG_MAC80211(priv, "enter: type %d\n", conf->type);
  2091. if (priv->vif) {
  2092. IWL_DEBUG_MAC80211(priv, "leave - vif != NULL\n");
  2093. return -EOPNOTSUPP;
  2094. }
  2095. spin_lock_irqsave(&priv->lock, flags);
  2096. priv->vif = conf->vif;
  2097. priv->iw_mode = conf->type;
  2098. spin_unlock_irqrestore(&priv->lock, flags);
  2099. mutex_lock(&priv->mutex);
  2100. if (conf->mac_addr) {
  2101. IWL_DEBUG_MAC80211(priv, "Set %pM\n", conf->mac_addr);
  2102. memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
  2103. }
  2104. if (iwl_set_mode(priv, conf->type) == -EAGAIN)
  2105. /* we are not ready, will run again when ready */
  2106. set_bit(STATUS_MODE_PENDING, &priv->status);
  2107. mutex_unlock(&priv->mutex);
  2108. IWL_DEBUG_MAC80211(priv, "leave\n");
  2109. return 0;
  2110. }
  2111. EXPORT_SYMBOL(iwl_mac_add_interface);
  2112. void iwl_mac_remove_interface(struct ieee80211_hw *hw,
  2113. struct ieee80211_if_init_conf *conf)
  2114. {
  2115. struct iwl_priv *priv = hw->priv;
  2116. IWL_DEBUG_MAC80211(priv, "enter\n");
  2117. mutex_lock(&priv->mutex);
  2118. if (iwl_is_ready_rf(priv)) {
  2119. iwl_scan_cancel_timeout(priv, 100);
  2120. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  2121. iwlcore_commit_rxon(priv);
  2122. }
  2123. if (priv->vif == conf->vif) {
  2124. priv->vif = NULL;
  2125. memset(priv->bssid, 0, ETH_ALEN);
  2126. }
  2127. mutex_unlock(&priv->mutex);
  2128. IWL_DEBUG_MAC80211(priv, "leave\n");
  2129. }
  2130. EXPORT_SYMBOL(iwl_mac_remove_interface);
  2131. /**
  2132. * iwl_mac_config - mac80211 config callback
  2133. *
  2134. * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to
  2135. * be set inappropriately and the driver currently sets the hardware up to
  2136. * use it whenever needed.
  2137. */
  2138. int iwl_mac_config(struct ieee80211_hw *hw, u32 changed)
  2139. {
  2140. struct iwl_priv *priv = hw->priv;
  2141. const struct iwl_channel_info *ch_info;
  2142. struct ieee80211_conf *conf = &hw->conf;
  2143. struct iwl_ht_info *ht_conf = &priv->current_ht_config;
  2144. unsigned long flags = 0;
  2145. int ret = 0;
  2146. u16 ch;
  2147. int scan_active = 0;
  2148. mutex_lock(&priv->mutex);
  2149. IWL_DEBUG_MAC80211(priv, "enter to channel %d changed 0x%X\n",
  2150. conf->channel->hw_value, changed);
  2151. if (unlikely(!priv->cfg->mod_params->disable_hw_scan &&
  2152. test_bit(STATUS_SCANNING, &priv->status))) {
  2153. scan_active = 1;
  2154. IWL_DEBUG_MAC80211(priv, "leave - scanning\n");
  2155. }
  2156. /* during scanning mac80211 will delay channel setting until
  2157. * scan finish with changed = 0
  2158. */
  2159. if (!changed || (changed & IEEE80211_CONF_CHANGE_CHANNEL)) {
  2160. if (scan_active)
  2161. goto set_ch_out;
  2162. ch = ieee80211_frequency_to_channel(conf->channel->center_freq);
  2163. ch_info = iwl_get_channel_info(priv, conf->channel->band, ch);
  2164. if (!is_channel_valid(ch_info)) {
  2165. IWL_DEBUG_MAC80211(priv, "leave - invalid channel\n");
  2166. ret = -EINVAL;
  2167. goto set_ch_out;
  2168. }
  2169. if (priv->iw_mode == NL80211_IFTYPE_ADHOC &&
  2170. !is_channel_ibss(ch_info)) {
  2171. IWL_ERR(priv, "channel %d in band %d not "
  2172. "IBSS channel\n",
  2173. conf->channel->hw_value, conf->channel->band);
  2174. ret = -EINVAL;
  2175. goto set_ch_out;
  2176. }
  2177. spin_lock_irqsave(&priv->lock, flags);
  2178. /* Configure HT40 channels */
  2179. ht_conf->is_ht = conf_is_ht(conf);
  2180. if (ht_conf->is_ht) {
  2181. if (conf_is_ht40_minus(conf)) {
  2182. ht_conf->extension_chan_offset =
  2183. IEEE80211_HT_PARAM_CHA_SEC_BELOW;
  2184. ht_conf->supported_chan_width =
  2185. IWL_CHANNEL_WIDTH_40MHZ;
  2186. } else if (conf_is_ht40_plus(conf)) {
  2187. ht_conf->extension_chan_offset =
  2188. IEEE80211_HT_PARAM_CHA_SEC_ABOVE;
  2189. ht_conf->supported_chan_width =
  2190. IWL_CHANNEL_WIDTH_40MHZ;
  2191. } else {
  2192. ht_conf->extension_chan_offset =
  2193. IEEE80211_HT_PARAM_CHA_SEC_NONE;
  2194. ht_conf->supported_chan_width =
  2195. IWL_CHANNEL_WIDTH_20MHZ;
  2196. }
  2197. } else
  2198. ht_conf->supported_chan_width = IWL_CHANNEL_WIDTH_20MHZ;
  2199. /* Default to no protection. Protection mode will later be set
  2200. * from BSS config in iwl_ht_conf */
  2201. ht_conf->ht_protection = IEEE80211_HT_OP_MODE_PROTECTION_NONE;
  2202. /* if we are switching from ht to 2.4 clear flags
  2203. * from any ht related info since 2.4 does not
  2204. * support ht */
  2205. if ((le16_to_cpu(priv->staging_rxon.channel) != ch))
  2206. priv->staging_rxon.flags = 0;
  2207. iwl_set_rxon_channel(priv, conf->channel);
  2208. iwl_set_flags_for_band(priv, conf->channel->band);
  2209. spin_unlock_irqrestore(&priv->lock, flags);
  2210. set_ch_out:
  2211. /* The list of supported rates and rate mask can be different
  2212. * for each band; since the band may have changed, reset
  2213. * the rate mask to what mac80211 lists */
  2214. iwl_set_rate(priv);
  2215. }
  2216. if (changed & IEEE80211_CONF_CHANGE_PS) {
  2217. ret = iwl_power_update_mode(priv, false);
  2218. if (ret)
  2219. IWL_DEBUG_MAC80211(priv, "Error setting sleep level\n");
  2220. }
  2221. if (changed & IEEE80211_CONF_CHANGE_POWER) {
  2222. IWL_DEBUG_MAC80211(priv, "TX Power old=%d new=%d\n",
  2223. priv->tx_power_user_lmt, conf->power_level);
  2224. iwl_set_tx_power(priv, conf->power_level, false);
  2225. }
  2226. /* call to ensure that 4965 rx_chain is set properly in monitor mode */
  2227. if (priv->cfg->ops->hcmd->set_rxon_chain)
  2228. priv->cfg->ops->hcmd->set_rxon_chain(priv);
  2229. if (!iwl_is_ready(priv)) {
  2230. IWL_DEBUG_MAC80211(priv, "leave - not ready\n");
  2231. goto out;
  2232. }
  2233. if (scan_active)
  2234. goto out;
  2235. if (memcmp(&priv->active_rxon,
  2236. &priv->staging_rxon, sizeof(priv->staging_rxon)))
  2237. iwlcore_commit_rxon(priv);
  2238. else
  2239. IWL_DEBUG_INFO(priv, "Not re-sending same RXON configuration.\n");
  2240. out:
  2241. IWL_DEBUG_MAC80211(priv, "leave\n");
  2242. mutex_unlock(&priv->mutex);
  2243. return ret;
  2244. }
  2245. EXPORT_SYMBOL(iwl_mac_config);
  2246. int iwl_mac_get_tx_stats(struct ieee80211_hw *hw,
  2247. struct ieee80211_tx_queue_stats *stats)
  2248. {
  2249. struct iwl_priv *priv = hw->priv;
  2250. int i, avail;
  2251. struct iwl_tx_queue *txq;
  2252. struct iwl_queue *q;
  2253. unsigned long flags;
  2254. IWL_DEBUG_MAC80211(priv, "enter\n");
  2255. if (!iwl_is_ready_rf(priv)) {
  2256. IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
  2257. return -EIO;
  2258. }
  2259. spin_lock_irqsave(&priv->lock, flags);
  2260. for (i = 0; i < AC_NUM; i++) {
  2261. txq = &priv->txq[i];
  2262. q = &txq->q;
  2263. avail = iwl_queue_space(q);
  2264. stats[i].len = q->n_window - avail;
  2265. stats[i].limit = q->n_window - q->high_mark;
  2266. stats[i].count = q->n_window;
  2267. }
  2268. spin_unlock_irqrestore(&priv->lock, flags);
  2269. IWL_DEBUG_MAC80211(priv, "leave\n");
  2270. return 0;
  2271. }
  2272. EXPORT_SYMBOL(iwl_mac_get_tx_stats);
  2273. void iwl_mac_reset_tsf(struct ieee80211_hw *hw)
  2274. {
  2275. struct iwl_priv *priv = hw->priv;
  2276. unsigned long flags;
  2277. mutex_lock(&priv->mutex);
  2278. IWL_DEBUG_MAC80211(priv, "enter\n");
  2279. spin_lock_irqsave(&priv->lock, flags);
  2280. memset(&priv->current_ht_config, 0, sizeof(struct iwl_ht_info));
  2281. spin_unlock_irqrestore(&priv->lock, flags);
  2282. iwl_reset_qos(priv);
  2283. spin_lock_irqsave(&priv->lock, flags);
  2284. priv->assoc_id = 0;
  2285. priv->assoc_capability = 0;
  2286. priv->assoc_station_added = 0;
  2287. /* new association get rid of ibss beacon skb */
  2288. if (priv->ibss_beacon)
  2289. dev_kfree_skb(priv->ibss_beacon);
  2290. priv->ibss_beacon = NULL;
  2291. priv->beacon_int = priv->vif->bss_conf.beacon_int;
  2292. priv->timestamp = 0;
  2293. if ((priv->iw_mode == NL80211_IFTYPE_STATION))
  2294. priv->beacon_int = 0;
  2295. spin_unlock_irqrestore(&priv->lock, flags);
  2296. if (!iwl_is_ready_rf(priv)) {
  2297. IWL_DEBUG_MAC80211(priv, "leave - not ready\n");
  2298. mutex_unlock(&priv->mutex);
  2299. return;
  2300. }
  2301. /* we are restarting association process
  2302. * clear RXON_FILTER_ASSOC_MSK bit
  2303. */
  2304. if (priv->iw_mode != NL80211_IFTYPE_AP) {
  2305. iwl_scan_cancel_timeout(priv, 100);
  2306. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  2307. iwlcore_commit_rxon(priv);
  2308. }
  2309. if (priv->iw_mode != NL80211_IFTYPE_ADHOC) {
  2310. IWL_DEBUG_MAC80211(priv, "leave - not in IBSS\n");
  2311. mutex_unlock(&priv->mutex);
  2312. return;
  2313. }
  2314. iwl_set_rate(priv);
  2315. mutex_unlock(&priv->mutex);
  2316. IWL_DEBUG_MAC80211(priv, "leave\n");
  2317. }
  2318. EXPORT_SYMBOL(iwl_mac_reset_tsf);
  2319. #ifdef CONFIG_IWLWIFI_DEBUGFS
  2320. #define IWL_TRAFFIC_DUMP_SIZE (IWL_TRAFFIC_ENTRY_SIZE * IWL_TRAFFIC_ENTRIES)
  2321. void iwl_reset_traffic_log(struct iwl_priv *priv)
  2322. {
  2323. priv->tx_traffic_idx = 0;
  2324. priv->rx_traffic_idx = 0;
  2325. if (priv->tx_traffic)
  2326. memset(priv->tx_traffic, 0, IWL_TRAFFIC_DUMP_SIZE);
  2327. if (priv->rx_traffic)
  2328. memset(priv->rx_traffic, 0, IWL_TRAFFIC_DUMP_SIZE);
  2329. }
  2330. int iwl_alloc_traffic_mem(struct iwl_priv *priv)
  2331. {
  2332. u32 traffic_size = IWL_TRAFFIC_DUMP_SIZE;
  2333. if (iwl_debug_level & IWL_DL_TX) {
  2334. if (!priv->tx_traffic) {
  2335. priv->tx_traffic =
  2336. kzalloc(traffic_size, GFP_KERNEL);
  2337. if (!priv->tx_traffic)
  2338. return -ENOMEM;
  2339. }
  2340. }
  2341. if (iwl_debug_level & IWL_DL_RX) {
  2342. if (!priv->rx_traffic) {
  2343. priv->rx_traffic =
  2344. kzalloc(traffic_size, GFP_KERNEL);
  2345. if (!priv->rx_traffic)
  2346. return -ENOMEM;
  2347. }
  2348. }
  2349. iwl_reset_traffic_log(priv);
  2350. return 0;
  2351. }
  2352. EXPORT_SYMBOL(iwl_alloc_traffic_mem);
  2353. void iwl_free_traffic_mem(struct iwl_priv *priv)
  2354. {
  2355. kfree(priv->tx_traffic);
  2356. priv->tx_traffic = NULL;
  2357. kfree(priv->rx_traffic);
  2358. priv->rx_traffic = NULL;
  2359. }
  2360. EXPORT_SYMBOL(iwl_free_traffic_mem);
  2361. void iwl_dbg_log_tx_data_frame(struct iwl_priv *priv,
  2362. u16 length, struct ieee80211_hdr *header)
  2363. {
  2364. __le16 fc;
  2365. u16 len;
  2366. if (likely(!(iwl_debug_level & IWL_DL_TX)))
  2367. return;
  2368. if (!priv->tx_traffic)
  2369. return;
  2370. fc = header->frame_control;
  2371. if (ieee80211_is_data(fc)) {
  2372. len = (length > IWL_TRAFFIC_ENTRY_SIZE)
  2373. ? IWL_TRAFFIC_ENTRY_SIZE : length;
  2374. memcpy((priv->tx_traffic +
  2375. (priv->tx_traffic_idx * IWL_TRAFFIC_ENTRY_SIZE)),
  2376. header, len);
  2377. priv->tx_traffic_idx =
  2378. (priv->tx_traffic_idx + 1) % IWL_TRAFFIC_ENTRIES;
  2379. }
  2380. }
  2381. EXPORT_SYMBOL(iwl_dbg_log_tx_data_frame);
  2382. void iwl_dbg_log_rx_data_frame(struct iwl_priv *priv,
  2383. u16 length, struct ieee80211_hdr *header)
  2384. {
  2385. __le16 fc;
  2386. u16 len;
  2387. if (likely(!(iwl_debug_level & IWL_DL_RX)))
  2388. return;
  2389. if (!priv->rx_traffic)
  2390. return;
  2391. fc = header->frame_control;
  2392. if (ieee80211_is_data(fc)) {
  2393. len = (length > IWL_TRAFFIC_ENTRY_SIZE)
  2394. ? IWL_TRAFFIC_ENTRY_SIZE : length;
  2395. memcpy((priv->rx_traffic +
  2396. (priv->rx_traffic_idx * IWL_TRAFFIC_ENTRY_SIZE)),
  2397. header, len);
  2398. priv->rx_traffic_idx =
  2399. (priv->rx_traffic_idx + 1) % IWL_TRAFFIC_ENTRIES;
  2400. }
  2401. }
  2402. EXPORT_SYMBOL(iwl_dbg_log_rx_data_frame);
  2403. const char *get_mgmt_string(int cmd)
  2404. {
  2405. switch (cmd) {
  2406. IWL_CMD(MANAGEMENT_ASSOC_REQ);
  2407. IWL_CMD(MANAGEMENT_ASSOC_RESP);
  2408. IWL_CMD(MANAGEMENT_REASSOC_REQ);
  2409. IWL_CMD(MANAGEMENT_REASSOC_RESP);
  2410. IWL_CMD(MANAGEMENT_PROBE_REQ);
  2411. IWL_CMD(MANAGEMENT_PROBE_RESP);
  2412. IWL_CMD(MANAGEMENT_BEACON);
  2413. IWL_CMD(MANAGEMENT_ATIM);
  2414. IWL_CMD(MANAGEMENT_DISASSOC);
  2415. IWL_CMD(MANAGEMENT_AUTH);
  2416. IWL_CMD(MANAGEMENT_DEAUTH);
  2417. IWL_CMD(MANAGEMENT_ACTION);
  2418. default:
  2419. return "UNKNOWN";
  2420. }
  2421. }
  2422. const char *get_ctrl_string(int cmd)
  2423. {
  2424. switch (cmd) {
  2425. IWL_CMD(CONTROL_BACK_REQ);
  2426. IWL_CMD(CONTROL_BACK);
  2427. IWL_CMD(CONTROL_PSPOLL);
  2428. IWL_CMD(CONTROL_RTS);
  2429. IWL_CMD(CONTROL_CTS);
  2430. IWL_CMD(CONTROL_ACK);
  2431. IWL_CMD(CONTROL_CFEND);
  2432. IWL_CMD(CONTROL_CFENDACK);
  2433. default:
  2434. return "UNKNOWN";
  2435. }
  2436. }
  2437. void iwl_clear_tx_stats(struct iwl_priv *priv)
  2438. {
  2439. memset(&priv->tx_stats, 0, sizeof(struct traffic_stats));
  2440. }
  2441. void iwl_clear_rx_stats(struct iwl_priv *priv)
  2442. {
  2443. memset(&priv->rx_stats, 0, sizeof(struct traffic_stats));
  2444. }
  2445. /*
  2446. * if CONFIG_IWLWIFI_DEBUGFS defined, iwl_update_stats function will
  2447. * record all the MGMT, CTRL and DATA pkt for both TX and Rx pass.
  2448. * Use debugFs to display the rx/rx_statistics
  2449. * if CONFIG_IWLWIFI_DEBUGFS not being defined, then no MGMT and CTRL
  2450. * information will be recorded, but DATA pkt still will be recorded
  2451. * for the reason of iwl_led.c need to control the led blinking based on
  2452. * number of tx and rx data.
  2453. *
  2454. */
  2455. void iwl_update_stats(struct iwl_priv *priv, bool is_tx, __le16 fc, u16 len)
  2456. {
  2457. struct traffic_stats *stats;
  2458. if (is_tx)
  2459. stats = &priv->tx_stats;
  2460. else
  2461. stats = &priv->rx_stats;
  2462. if (ieee80211_is_mgmt(fc)) {
  2463. switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) {
  2464. case cpu_to_le16(IEEE80211_STYPE_ASSOC_REQ):
  2465. stats->mgmt[MANAGEMENT_ASSOC_REQ]++;
  2466. break;
  2467. case cpu_to_le16(IEEE80211_STYPE_ASSOC_RESP):
  2468. stats->mgmt[MANAGEMENT_ASSOC_RESP]++;
  2469. break;
  2470. case cpu_to_le16(IEEE80211_STYPE_REASSOC_REQ):
  2471. stats->mgmt[MANAGEMENT_REASSOC_REQ]++;
  2472. break;
  2473. case cpu_to_le16(IEEE80211_STYPE_REASSOC_RESP):
  2474. stats->mgmt[MANAGEMENT_REASSOC_RESP]++;
  2475. break;
  2476. case cpu_to_le16(IEEE80211_STYPE_PROBE_REQ):
  2477. stats->mgmt[MANAGEMENT_PROBE_REQ]++;
  2478. break;
  2479. case cpu_to_le16(IEEE80211_STYPE_PROBE_RESP):
  2480. stats->mgmt[MANAGEMENT_PROBE_RESP]++;
  2481. break;
  2482. case cpu_to_le16(IEEE80211_STYPE_BEACON):
  2483. stats->mgmt[MANAGEMENT_BEACON]++;
  2484. break;
  2485. case cpu_to_le16(IEEE80211_STYPE_ATIM):
  2486. stats->mgmt[MANAGEMENT_ATIM]++;
  2487. break;
  2488. case cpu_to_le16(IEEE80211_STYPE_DISASSOC):
  2489. stats->mgmt[MANAGEMENT_DISASSOC]++;
  2490. break;
  2491. case cpu_to_le16(IEEE80211_STYPE_AUTH):
  2492. stats->mgmt[MANAGEMENT_AUTH]++;
  2493. break;
  2494. case cpu_to_le16(IEEE80211_STYPE_DEAUTH):
  2495. stats->mgmt[MANAGEMENT_DEAUTH]++;
  2496. break;
  2497. case cpu_to_le16(IEEE80211_STYPE_ACTION):
  2498. stats->mgmt[MANAGEMENT_ACTION]++;
  2499. break;
  2500. }
  2501. } else if (ieee80211_is_ctl(fc)) {
  2502. switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) {
  2503. case cpu_to_le16(IEEE80211_STYPE_BACK_REQ):
  2504. stats->ctrl[CONTROL_BACK_REQ]++;
  2505. break;
  2506. case cpu_to_le16(IEEE80211_STYPE_BACK):
  2507. stats->ctrl[CONTROL_BACK]++;
  2508. break;
  2509. case cpu_to_le16(IEEE80211_STYPE_PSPOLL):
  2510. stats->ctrl[CONTROL_PSPOLL]++;
  2511. break;
  2512. case cpu_to_le16(IEEE80211_STYPE_RTS):
  2513. stats->ctrl[CONTROL_RTS]++;
  2514. break;
  2515. case cpu_to_le16(IEEE80211_STYPE_CTS):
  2516. stats->ctrl[CONTROL_CTS]++;
  2517. break;
  2518. case cpu_to_le16(IEEE80211_STYPE_ACK):
  2519. stats->ctrl[CONTROL_ACK]++;
  2520. break;
  2521. case cpu_to_le16(IEEE80211_STYPE_CFEND):
  2522. stats->ctrl[CONTROL_CFEND]++;
  2523. break;
  2524. case cpu_to_le16(IEEE80211_STYPE_CFENDACK):
  2525. stats->ctrl[CONTROL_CFENDACK]++;
  2526. break;
  2527. }
  2528. } else {
  2529. /* data */
  2530. stats->data_cnt++;
  2531. stats->data_bytes += len;
  2532. }
  2533. }
  2534. EXPORT_SYMBOL(iwl_update_stats);
  2535. #endif
  2536. #ifdef CONFIG_PM
  2537. int iwl_pci_suspend(struct pci_dev *pdev, pm_message_t state)
  2538. {
  2539. struct iwl_priv *priv = pci_get_drvdata(pdev);
  2540. /*
  2541. * This function is called when system goes into suspend state
  2542. * mac80211 will call iwl_mac_stop() from the mac80211 suspend function
  2543. * first but since iwl_mac_stop() has no knowledge of who the caller is,
  2544. * it will not call apm_ops.stop() to stop the DMA operation.
  2545. * Calling apm_ops.stop here to make sure we stop the DMA.
  2546. */
  2547. priv->cfg->ops->lib->apm_ops.stop(priv);
  2548. pci_save_state(pdev);
  2549. pci_disable_device(pdev);
  2550. pci_set_power_state(pdev, PCI_D3hot);
  2551. return 0;
  2552. }
  2553. EXPORT_SYMBOL(iwl_pci_suspend);
  2554. int iwl_pci_resume(struct pci_dev *pdev)
  2555. {
  2556. struct iwl_priv *priv = pci_get_drvdata(pdev);
  2557. int ret;
  2558. pci_set_power_state(pdev, PCI_D0);
  2559. ret = pci_enable_device(pdev);
  2560. if (ret)
  2561. return ret;
  2562. pci_restore_state(pdev);
  2563. iwl_enable_interrupts(priv);
  2564. return 0;
  2565. }
  2566. EXPORT_SYMBOL(iwl_pci_resume);
  2567. #endif /* CONFIG_PM */