phy.c 65 KB

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  1. /*
  2. Broadcom B43legacy wireless driver
  3. Copyright (c) 2005 Martin Langer <martin-langer@gmx.de>,
  4. Stefano Brivio <stefano.brivio@polimi.it>
  5. Michael Buesch <mbuesch@freenet.de>
  6. Danny van Dyk <kugelfang@gentoo.org>
  7. Andreas Jaggi <andreas.jaggi@waterwave.ch>
  8. Copyright (c) 2007 Larry Finger <Larry.Finger@lwfinger.net>
  9. Some parts of the code in this file are derived from the ipw2200
  10. driver Copyright(c) 2003 - 2004 Intel Corporation.
  11. This program is free software; you can redistribute it and/or modify
  12. it under the terms of the GNU General Public License as published by
  13. the Free Software Foundation; either version 2 of the License, or
  14. (at your option) any later version.
  15. This program is distributed in the hope that it will be useful,
  16. but WITHOUT ANY WARRANTY; without even the implied warranty of
  17. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  18. GNU General Public License for more details.
  19. You should have received a copy of the GNU General Public License
  20. along with this program; see the file COPYING. If not, write to
  21. the Free Software Foundation, Inc., 51 Franklin Steet, Fifth Floor,
  22. Boston, MA 02110-1301, USA.
  23. */
  24. #include <linux/delay.h>
  25. #include <linux/pci.h>
  26. #include <linux/sched.h>
  27. #include <linux/types.h>
  28. #include "b43legacy.h"
  29. #include "phy.h"
  30. #include "main.h"
  31. #include "radio.h"
  32. #include "ilt.h"
  33. static const s8 b43legacy_tssi2dbm_b_table[] = {
  34. 0x4D, 0x4C, 0x4B, 0x4A,
  35. 0x4A, 0x49, 0x48, 0x47,
  36. 0x47, 0x46, 0x45, 0x45,
  37. 0x44, 0x43, 0x42, 0x42,
  38. 0x41, 0x40, 0x3F, 0x3E,
  39. 0x3D, 0x3C, 0x3B, 0x3A,
  40. 0x39, 0x38, 0x37, 0x36,
  41. 0x35, 0x34, 0x32, 0x31,
  42. 0x30, 0x2F, 0x2D, 0x2C,
  43. 0x2B, 0x29, 0x28, 0x26,
  44. 0x25, 0x23, 0x21, 0x1F,
  45. 0x1D, 0x1A, 0x17, 0x14,
  46. 0x10, 0x0C, 0x06, 0x00,
  47. -7, -7, -7, -7,
  48. -7, -7, -7, -7,
  49. -7, -7, -7, -7,
  50. };
  51. static const s8 b43legacy_tssi2dbm_g_table[] = {
  52. 77, 77, 77, 76,
  53. 76, 76, 75, 75,
  54. 74, 74, 73, 73,
  55. 73, 72, 72, 71,
  56. 71, 70, 70, 69,
  57. 68, 68, 67, 67,
  58. 66, 65, 65, 64,
  59. 63, 63, 62, 61,
  60. 60, 59, 58, 57,
  61. 56, 55, 54, 53,
  62. 52, 50, 49, 47,
  63. 45, 43, 40, 37,
  64. 33, 28, 22, 14,
  65. 5, -7, -20, -20,
  66. -20, -20, -20, -20,
  67. -20, -20, -20, -20,
  68. };
  69. static void b43legacy_phy_initg(struct b43legacy_wldev *dev);
  70. static inline
  71. void b43legacy_voluntary_preempt(void)
  72. {
  73. B43legacy_BUG_ON(!(!in_atomic() && !in_irq() &&
  74. !in_interrupt() && !irqs_disabled()));
  75. #ifndef CONFIG_PREEMPT
  76. cond_resched();
  77. #endif /* CONFIG_PREEMPT */
  78. }
  79. /* Lock the PHY registers against concurrent access from the microcode.
  80. * This lock is nonrecursive. */
  81. void b43legacy_phy_lock(struct b43legacy_wldev *dev)
  82. {
  83. #if B43legacy_DEBUG
  84. B43legacy_WARN_ON(dev->phy.phy_locked);
  85. dev->phy.phy_locked = 1;
  86. #endif
  87. if (dev->dev->id.revision < 3) {
  88. b43legacy_mac_suspend(dev);
  89. } else {
  90. if (!b43legacy_is_mode(dev->wl, NL80211_IFTYPE_AP))
  91. b43legacy_power_saving_ctl_bits(dev, -1, 1);
  92. }
  93. }
  94. void b43legacy_phy_unlock(struct b43legacy_wldev *dev)
  95. {
  96. #if B43legacy_DEBUG
  97. B43legacy_WARN_ON(!dev->phy.phy_locked);
  98. dev->phy.phy_locked = 0;
  99. #endif
  100. if (dev->dev->id.revision < 3) {
  101. b43legacy_mac_enable(dev);
  102. } else {
  103. if (!b43legacy_is_mode(dev->wl, NL80211_IFTYPE_AP))
  104. b43legacy_power_saving_ctl_bits(dev, -1, -1);
  105. }
  106. }
  107. u16 b43legacy_phy_read(struct b43legacy_wldev *dev, u16 offset)
  108. {
  109. b43legacy_write16(dev, B43legacy_MMIO_PHY_CONTROL, offset);
  110. return b43legacy_read16(dev, B43legacy_MMIO_PHY_DATA);
  111. }
  112. void b43legacy_phy_write(struct b43legacy_wldev *dev, u16 offset, u16 val)
  113. {
  114. b43legacy_write16(dev, B43legacy_MMIO_PHY_CONTROL, offset);
  115. mmiowb();
  116. b43legacy_write16(dev, B43legacy_MMIO_PHY_DATA, val);
  117. }
  118. void b43legacy_phy_calibrate(struct b43legacy_wldev *dev)
  119. {
  120. struct b43legacy_phy *phy = &dev->phy;
  121. b43legacy_read32(dev, B43legacy_MMIO_MACCTL); /* Dummy read. */
  122. if (phy->calibrated)
  123. return;
  124. if (phy->type == B43legacy_PHYTYPE_G && phy->rev == 1) {
  125. b43legacy_wireless_core_reset(dev, 0);
  126. b43legacy_phy_initg(dev);
  127. b43legacy_wireless_core_reset(dev, B43legacy_TMSLOW_GMODE);
  128. }
  129. phy->calibrated = 1;
  130. }
  131. /* intialize B PHY power control
  132. * as described in http://bcm-specs.sipsolutions.net/InitPowerControl
  133. */
  134. static void b43legacy_phy_init_pctl(struct b43legacy_wldev *dev)
  135. {
  136. struct b43legacy_phy *phy = &dev->phy;
  137. u16 saved_batt = 0;
  138. u16 saved_ratt = 0;
  139. u16 saved_txctl1 = 0;
  140. int must_reset_txpower = 0;
  141. B43legacy_BUG_ON(!(phy->type == B43legacy_PHYTYPE_B ||
  142. phy->type == B43legacy_PHYTYPE_G));
  143. if (is_bcm_board_vendor(dev) &&
  144. (dev->dev->bus->boardinfo.type == 0x0416))
  145. return;
  146. b43legacy_phy_write(dev, 0x0028, 0x8018);
  147. b43legacy_write16(dev, 0x03E6, b43legacy_read16(dev, 0x03E6) & 0xFFDF);
  148. if (phy->type == B43legacy_PHYTYPE_G) {
  149. if (!phy->gmode)
  150. return;
  151. b43legacy_phy_write(dev, 0x047A, 0xC111);
  152. }
  153. if (phy->savedpctlreg != 0xFFFF)
  154. return;
  155. #ifdef CONFIG_B43LEGACY_DEBUG
  156. if (phy->manual_txpower_control)
  157. return;
  158. #endif
  159. if (phy->type == B43legacy_PHYTYPE_B &&
  160. phy->rev >= 2 &&
  161. phy->radio_ver == 0x2050)
  162. b43legacy_radio_write16(dev, 0x0076,
  163. b43legacy_radio_read16(dev, 0x0076)
  164. | 0x0084);
  165. else {
  166. saved_batt = phy->bbatt;
  167. saved_ratt = phy->rfatt;
  168. saved_txctl1 = phy->txctl1;
  169. if ((phy->radio_rev >= 6) && (phy->radio_rev <= 8)
  170. && /*FIXME: incomplete specs for 5 < revision < 9 */ 0)
  171. b43legacy_radio_set_txpower_bg(dev, 0xB, 0x1F, 0);
  172. else
  173. b43legacy_radio_set_txpower_bg(dev, 0xB, 9, 0);
  174. must_reset_txpower = 1;
  175. }
  176. b43legacy_dummy_transmission(dev);
  177. phy->savedpctlreg = b43legacy_phy_read(dev, B43legacy_PHY_G_PCTL);
  178. if (must_reset_txpower)
  179. b43legacy_radio_set_txpower_bg(dev, saved_batt, saved_ratt,
  180. saved_txctl1);
  181. else
  182. b43legacy_radio_write16(dev, 0x0076, b43legacy_radio_read16(dev,
  183. 0x0076) & 0xFF7B);
  184. b43legacy_radio_clear_tssi(dev);
  185. }
  186. static void b43legacy_phy_agcsetup(struct b43legacy_wldev *dev)
  187. {
  188. struct b43legacy_phy *phy = &dev->phy;
  189. u16 offset = 0x0000;
  190. if (phy->rev == 1)
  191. offset = 0x4C00;
  192. b43legacy_ilt_write(dev, offset, 0x00FE);
  193. b43legacy_ilt_write(dev, offset + 1, 0x000D);
  194. b43legacy_ilt_write(dev, offset + 2, 0x0013);
  195. b43legacy_ilt_write(dev, offset + 3, 0x0019);
  196. if (phy->rev == 1) {
  197. b43legacy_ilt_write(dev, 0x1800, 0x2710);
  198. b43legacy_ilt_write(dev, 0x1801, 0x9B83);
  199. b43legacy_ilt_write(dev, 0x1802, 0x9B83);
  200. b43legacy_ilt_write(dev, 0x1803, 0x0F8D);
  201. b43legacy_phy_write(dev, 0x0455, 0x0004);
  202. }
  203. b43legacy_phy_write(dev, 0x04A5, (b43legacy_phy_read(dev, 0x04A5)
  204. & 0x00FF) | 0x5700);
  205. b43legacy_phy_write(dev, 0x041A, (b43legacy_phy_read(dev, 0x041A)
  206. & 0xFF80) | 0x000F);
  207. b43legacy_phy_write(dev, 0x041A, (b43legacy_phy_read(dev, 0x041A)
  208. & 0xC07F) | 0x2B80);
  209. b43legacy_phy_write(dev, 0x048C, (b43legacy_phy_read(dev, 0x048C)
  210. & 0xF0FF) | 0x0300);
  211. b43legacy_radio_write16(dev, 0x007A,
  212. b43legacy_radio_read16(dev, 0x007A)
  213. | 0x0008);
  214. b43legacy_phy_write(dev, 0x04A0, (b43legacy_phy_read(dev, 0x04A0)
  215. & 0xFFF0) | 0x0008);
  216. b43legacy_phy_write(dev, 0x04A1, (b43legacy_phy_read(dev, 0x04A1)
  217. & 0xF0FF) | 0x0600);
  218. b43legacy_phy_write(dev, 0x04A2, (b43legacy_phy_read(dev, 0x04A2)
  219. & 0xF0FF) | 0x0700);
  220. b43legacy_phy_write(dev, 0x04A0, (b43legacy_phy_read(dev, 0x04A0)
  221. & 0xF0FF) | 0x0100);
  222. if (phy->rev == 1)
  223. b43legacy_phy_write(dev, 0x04A2,
  224. (b43legacy_phy_read(dev, 0x04A2)
  225. & 0xFFF0) | 0x0007);
  226. b43legacy_phy_write(dev, 0x0488, (b43legacy_phy_read(dev, 0x0488)
  227. & 0xFF00) | 0x001C);
  228. b43legacy_phy_write(dev, 0x0488, (b43legacy_phy_read(dev, 0x0488)
  229. & 0xC0FF) | 0x0200);
  230. b43legacy_phy_write(dev, 0x0496, (b43legacy_phy_read(dev, 0x0496)
  231. & 0xFF00) | 0x001C);
  232. b43legacy_phy_write(dev, 0x0489, (b43legacy_phy_read(dev, 0x0489)
  233. & 0xFF00) | 0x0020);
  234. b43legacy_phy_write(dev, 0x0489, (b43legacy_phy_read(dev, 0x0489)
  235. & 0xC0FF) | 0x0200);
  236. b43legacy_phy_write(dev, 0x0482, (b43legacy_phy_read(dev, 0x0482)
  237. & 0xFF00) | 0x002E);
  238. b43legacy_phy_write(dev, 0x0496, (b43legacy_phy_read(dev, 0x0496)
  239. & 0x00FF) | 0x1A00);
  240. b43legacy_phy_write(dev, 0x0481, (b43legacy_phy_read(dev, 0x0481)
  241. & 0xFF00) | 0x0028);
  242. b43legacy_phy_write(dev, 0x0481, (b43legacy_phy_read(dev, 0x0481)
  243. & 0x00FF) | 0x2C00);
  244. if (phy->rev == 1) {
  245. b43legacy_phy_write(dev, 0x0430, 0x092B);
  246. b43legacy_phy_write(dev, 0x041B,
  247. (b43legacy_phy_read(dev, 0x041B)
  248. & 0xFFE1) | 0x0002);
  249. } else {
  250. b43legacy_phy_write(dev, 0x041B,
  251. b43legacy_phy_read(dev, 0x041B) & 0xFFE1);
  252. b43legacy_phy_write(dev, 0x041F, 0x287A);
  253. b43legacy_phy_write(dev, 0x0420,
  254. (b43legacy_phy_read(dev, 0x0420)
  255. & 0xFFF0) | 0x0004);
  256. }
  257. if (phy->rev > 2) {
  258. b43legacy_phy_write(dev, 0x0422, 0x287A);
  259. b43legacy_phy_write(dev, 0x0420,
  260. (b43legacy_phy_read(dev, 0x0420)
  261. & 0x0FFF) | 0x3000);
  262. }
  263. b43legacy_phy_write(dev, 0x04A8, (b43legacy_phy_read(dev, 0x04A8)
  264. & 0x8080) | 0x7874);
  265. b43legacy_phy_write(dev, 0x048E, 0x1C00);
  266. if (phy->rev == 1) {
  267. b43legacy_phy_write(dev, 0x04AB,
  268. (b43legacy_phy_read(dev, 0x04AB)
  269. & 0xF0FF) | 0x0600);
  270. b43legacy_phy_write(dev, 0x048B, 0x005E);
  271. b43legacy_phy_write(dev, 0x048C,
  272. (b43legacy_phy_read(dev, 0x048C) & 0xFF00)
  273. | 0x001E);
  274. b43legacy_phy_write(dev, 0x048D, 0x0002);
  275. }
  276. b43legacy_ilt_write(dev, offset + 0x0800, 0);
  277. b43legacy_ilt_write(dev, offset + 0x0801, 7);
  278. b43legacy_ilt_write(dev, offset + 0x0802, 16);
  279. b43legacy_ilt_write(dev, offset + 0x0803, 28);
  280. if (phy->rev >= 6) {
  281. b43legacy_phy_write(dev, 0x0426,
  282. (b43legacy_phy_read(dev, 0x0426) & 0xFFFC));
  283. b43legacy_phy_write(dev, 0x0426,
  284. (b43legacy_phy_read(dev, 0x0426) & 0xEFFF));
  285. }
  286. }
  287. static void b43legacy_phy_setupg(struct b43legacy_wldev *dev)
  288. {
  289. struct b43legacy_phy *phy = &dev->phy;
  290. u16 i;
  291. B43legacy_BUG_ON(phy->type != B43legacy_PHYTYPE_G);
  292. if (phy->rev == 1) {
  293. b43legacy_phy_write(dev, 0x0406, 0x4F19);
  294. b43legacy_phy_write(dev, B43legacy_PHY_G_CRS,
  295. (b43legacy_phy_read(dev,
  296. B43legacy_PHY_G_CRS) & 0xFC3F) | 0x0340);
  297. b43legacy_phy_write(dev, 0x042C, 0x005A);
  298. b43legacy_phy_write(dev, 0x0427, 0x001A);
  299. for (i = 0; i < B43legacy_ILT_FINEFREQG_SIZE; i++)
  300. b43legacy_ilt_write(dev, 0x5800 + i,
  301. b43legacy_ilt_finefreqg[i]);
  302. for (i = 0; i < B43legacy_ILT_NOISEG1_SIZE; i++)
  303. b43legacy_ilt_write(dev, 0x1800 + i,
  304. b43legacy_ilt_noiseg1[i]);
  305. for (i = 0; i < B43legacy_ILT_ROTOR_SIZE; i++)
  306. b43legacy_ilt_write32(dev, 0x2000 + i,
  307. b43legacy_ilt_rotor[i]);
  308. } else {
  309. /* nrssi values are signed 6-bit values. Why 0x7654 here? */
  310. b43legacy_nrssi_hw_write(dev, 0xBA98, (s16)0x7654);
  311. if (phy->rev == 2) {
  312. b43legacy_phy_write(dev, 0x04C0, 0x1861);
  313. b43legacy_phy_write(dev, 0x04C1, 0x0271);
  314. } else if (phy->rev > 2) {
  315. b43legacy_phy_write(dev, 0x04C0, 0x0098);
  316. b43legacy_phy_write(dev, 0x04C1, 0x0070);
  317. b43legacy_phy_write(dev, 0x04C9, 0x0080);
  318. }
  319. b43legacy_phy_write(dev, 0x042B, b43legacy_phy_read(dev,
  320. 0x042B) | 0x800);
  321. for (i = 0; i < 64; i++)
  322. b43legacy_ilt_write(dev, 0x4000 + i, i);
  323. for (i = 0; i < B43legacy_ILT_NOISEG2_SIZE; i++)
  324. b43legacy_ilt_write(dev, 0x1800 + i,
  325. b43legacy_ilt_noiseg2[i]);
  326. }
  327. if (phy->rev <= 2)
  328. for (i = 0; i < B43legacy_ILT_NOISESCALEG_SIZE; i++)
  329. b43legacy_ilt_write(dev, 0x1400 + i,
  330. b43legacy_ilt_noisescaleg1[i]);
  331. else if ((phy->rev >= 7) && (b43legacy_phy_read(dev, 0x0449) & 0x0200))
  332. for (i = 0; i < B43legacy_ILT_NOISESCALEG_SIZE; i++)
  333. b43legacy_ilt_write(dev, 0x1400 + i,
  334. b43legacy_ilt_noisescaleg3[i]);
  335. else
  336. for (i = 0; i < B43legacy_ILT_NOISESCALEG_SIZE; i++)
  337. b43legacy_ilt_write(dev, 0x1400 + i,
  338. b43legacy_ilt_noisescaleg2[i]);
  339. if (phy->rev == 2)
  340. for (i = 0; i < B43legacy_ILT_SIGMASQR_SIZE; i++)
  341. b43legacy_ilt_write(dev, 0x5000 + i,
  342. b43legacy_ilt_sigmasqr1[i]);
  343. else if ((phy->rev > 2) && (phy->rev <= 8))
  344. for (i = 0; i < B43legacy_ILT_SIGMASQR_SIZE; i++)
  345. b43legacy_ilt_write(dev, 0x5000 + i,
  346. b43legacy_ilt_sigmasqr2[i]);
  347. if (phy->rev == 1) {
  348. for (i = 0; i < B43legacy_ILT_RETARD_SIZE; i++)
  349. b43legacy_ilt_write32(dev, 0x2400 + i,
  350. b43legacy_ilt_retard[i]);
  351. for (i = 4; i < 20; i++)
  352. b43legacy_ilt_write(dev, 0x5400 + i, 0x0020);
  353. b43legacy_phy_agcsetup(dev);
  354. if (is_bcm_board_vendor(dev) &&
  355. (dev->dev->bus->boardinfo.type == 0x0416) &&
  356. (dev->dev->bus->boardinfo.rev == 0x0017))
  357. return;
  358. b43legacy_ilt_write(dev, 0x5001, 0x0002);
  359. b43legacy_ilt_write(dev, 0x5002, 0x0001);
  360. } else {
  361. for (i = 0; i <= 0x20; i++)
  362. b43legacy_ilt_write(dev, 0x1000 + i, 0x0820);
  363. b43legacy_phy_agcsetup(dev);
  364. b43legacy_phy_read(dev, 0x0400); /* dummy read */
  365. b43legacy_phy_write(dev, 0x0403, 0x1000);
  366. b43legacy_ilt_write(dev, 0x3C02, 0x000F);
  367. b43legacy_ilt_write(dev, 0x3C03, 0x0014);
  368. if (is_bcm_board_vendor(dev) &&
  369. (dev->dev->bus->boardinfo.type == 0x0416) &&
  370. (dev->dev->bus->boardinfo.rev == 0x0017))
  371. return;
  372. b43legacy_ilt_write(dev, 0x0401, 0x0002);
  373. b43legacy_ilt_write(dev, 0x0402, 0x0001);
  374. }
  375. }
  376. /* Initialize the APHY portion of a GPHY. */
  377. static void b43legacy_phy_inita(struct b43legacy_wldev *dev)
  378. {
  379. might_sleep();
  380. b43legacy_phy_setupg(dev);
  381. if (dev->dev->bus->sprom.boardflags_lo & B43legacy_BFL_PACTRL)
  382. b43legacy_phy_write(dev, 0x046E, 0x03CF);
  383. }
  384. static void b43legacy_phy_initb2(struct b43legacy_wldev *dev)
  385. {
  386. struct b43legacy_phy *phy = &dev->phy;
  387. u16 offset;
  388. int val;
  389. b43legacy_write16(dev, 0x03EC, 0x3F22);
  390. b43legacy_phy_write(dev, 0x0020, 0x301C);
  391. b43legacy_phy_write(dev, 0x0026, 0x0000);
  392. b43legacy_phy_write(dev, 0x0030, 0x00C6);
  393. b43legacy_phy_write(dev, 0x0088, 0x3E00);
  394. val = 0x3C3D;
  395. for (offset = 0x0089; offset < 0x00A7; offset++) {
  396. b43legacy_phy_write(dev, offset, val);
  397. val -= 0x0202;
  398. }
  399. b43legacy_phy_write(dev, 0x03E4, 0x3000);
  400. b43legacy_radio_selectchannel(dev, phy->channel, 0);
  401. if (phy->radio_ver != 0x2050) {
  402. b43legacy_radio_write16(dev, 0x0075, 0x0080);
  403. b43legacy_radio_write16(dev, 0x0079, 0x0081);
  404. }
  405. b43legacy_radio_write16(dev, 0x0050, 0x0020);
  406. b43legacy_radio_write16(dev, 0x0050, 0x0023);
  407. if (phy->radio_ver == 0x2050) {
  408. b43legacy_radio_write16(dev, 0x0050, 0x0020);
  409. b43legacy_radio_write16(dev, 0x005A, 0x0070);
  410. b43legacy_radio_write16(dev, 0x005B, 0x007B);
  411. b43legacy_radio_write16(dev, 0x005C, 0x00B0);
  412. b43legacy_radio_write16(dev, 0x007A, 0x000F);
  413. b43legacy_phy_write(dev, 0x0038, 0x0677);
  414. b43legacy_radio_init2050(dev);
  415. }
  416. b43legacy_phy_write(dev, 0x0014, 0x0080);
  417. b43legacy_phy_write(dev, 0x0032, 0x00CA);
  418. b43legacy_phy_write(dev, 0x0032, 0x00CC);
  419. b43legacy_phy_write(dev, 0x0035, 0x07C2);
  420. b43legacy_phy_lo_b_measure(dev);
  421. b43legacy_phy_write(dev, 0x0026, 0xCC00);
  422. if (phy->radio_ver != 0x2050)
  423. b43legacy_phy_write(dev, 0x0026, 0xCE00);
  424. b43legacy_write16(dev, B43legacy_MMIO_CHANNEL_EXT, 0x1000);
  425. b43legacy_phy_write(dev, 0x002A, 0x88A3);
  426. if (phy->radio_ver != 0x2050)
  427. b43legacy_phy_write(dev, 0x002A, 0x88C2);
  428. b43legacy_radio_set_txpower_bg(dev, 0xFFFF, 0xFFFF, 0xFFFF);
  429. b43legacy_phy_init_pctl(dev);
  430. }
  431. static void b43legacy_phy_initb4(struct b43legacy_wldev *dev)
  432. {
  433. struct b43legacy_phy *phy = &dev->phy;
  434. u16 offset;
  435. u16 val;
  436. b43legacy_write16(dev, 0x03EC, 0x3F22);
  437. b43legacy_phy_write(dev, 0x0020, 0x301C);
  438. b43legacy_phy_write(dev, 0x0026, 0x0000);
  439. b43legacy_phy_write(dev, 0x0030, 0x00C6);
  440. b43legacy_phy_write(dev, 0x0088, 0x3E00);
  441. val = 0x3C3D;
  442. for (offset = 0x0089; offset < 0x00A7; offset++) {
  443. b43legacy_phy_write(dev, offset, val);
  444. val -= 0x0202;
  445. }
  446. b43legacy_phy_write(dev, 0x03E4, 0x3000);
  447. b43legacy_radio_selectchannel(dev, phy->channel, 0);
  448. if (phy->radio_ver != 0x2050) {
  449. b43legacy_radio_write16(dev, 0x0075, 0x0080);
  450. b43legacy_radio_write16(dev, 0x0079, 0x0081);
  451. }
  452. b43legacy_radio_write16(dev, 0x0050, 0x0020);
  453. b43legacy_radio_write16(dev, 0x0050, 0x0023);
  454. if (phy->radio_ver == 0x2050) {
  455. b43legacy_radio_write16(dev, 0x0050, 0x0020);
  456. b43legacy_radio_write16(dev, 0x005A, 0x0070);
  457. b43legacy_radio_write16(dev, 0x005B, 0x007B);
  458. b43legacy_radio_write16(dev, 0x005C, 0x00B0);
  459. b43legacy_radio_write16(dev, 0x007A, 0x000F);
  460. b43legacy_phy_write(dev, 0x0038, 0x0677);
  461. b43legacy_radio_init2050(dev);
  462. }
  463. b43legacy_phy_write(dev, 0x0014, 0x0080);
  464. b43legacy_phy_write(dev, 0x0032, 0x00CA);
  465. if (phy->radio_ver == 0x2050)
  466. b43legacy_phy_write(dev, 0x0032, 0x00E0);
  467. b43legacy_phy_write(dev, 0x0035, 0x07C2);
  468. b43legacy_phy_lo_b_measure(dev);
  469. b43legacy_phy_write(dev, 0x0026, 0xCC00);
  470. if (phy->radio_ver == 0x2050)
  471. b43legacy_phy_write(dev, 0x0026, 0xCE00);
  472. b43legacy_write16(dev, B43legacy_MMIO_CHANNEL_EXT, 0x1100);
  473. b43legacy_phy_write(dev, 0x002A, 0x88A3);
  474. if (phy->radio_ver == 0x2050)
  475. b43legacy_phy_write(dev, 0x002A, 0x88C2);
  476. b43legacy_radio_set_txpower_bg(dev, 0xFFFF, 0xFFFF, 0xFFFF);
  477. if (dev->dev->bus->sprom.boardflags_lo & B43legacy_BFL_RSSI) {
  478. b43legacy_calc_nrssi_slope(dev);
  479. b43legacy_calc_nrssi_threshold(dev);
  480. }
  481. b43legacy_phy_init_pctl(dev);
  482. }
  483. static void b43legacy_phy_initb5(struct b43legacy_wldev *dev)
  484. {
  485. struct b43legacy_phy *phy = &dev->phy;
  486. u16 offset;
  487. u16 value;
  488. u8 old_channel;
  489. if (phy->analog == 1)
  490. b43legacy_radio_write16(dev, 0x007A,
  491. b43legacy_radio_read16(dev, 0x007A)
  492. | 0x0050);
  493. if (!is_bcm_board_vendor(dev) &&
  494. (dev->dev->bus->boardinfo.type != 0x0416)) {
  495. value = 0x2120;
  496. for (offset = 0x00A8 ; offset < 0x00C7; offset++) {
  497. b43legacy_phy_write(dev, offset, value);
  498. value += 0x0202;
  499. }
  500. }
  501. b43legacy_phy_write(dev, 0x0035,
  502. (b43legacy_phy_read(dev, 0x0035) & 0xF0FF)
  503. | 0x0700);
  504. if (phy->radio_ver == 0x2050)
  505. b43legacy_phy_write(dev, 0x0038, 0x0667);
  506. if (phy->gmode) {
  507. if (phy->radio_ver == 0x2050) {
  508. b43legacy_radio_write16(dev, 0x007A,
  509. b43legacy_radio_read16(dev, 0x007A)
  510. | 0x0020);
  511. b43legacy_radio_write16(dev, 0x0051,
  512. b43legacy_radio_read16(dev, 0x0051)
  513. | 0x0004);
  514. }
  515. b43legacy_write16(dev, B43legacy_MMIO_PHY_RADIO, 0x0000);
  516. b43legacy_phy_write(dev, 0x0802, b43legacy_phy_read(dev, 0x0802)
  517. | 0x0100);
  518. b43legacy_phy_write(dev, 0x042B, b43legacy_phy_read(dev, 0x042B)
  519. | 0x2000);
  520. b43legacy_phy_write(dev, 0x001C, 0x186A);
  521. b43legacy_phy_write(dev, 0x0013, (b43legacy_phy_read(dev,
  522. 0x0013) & 0x00FF) | 0x1900);
  523. b43legacy_phy_write(dev, 0x0035, (b43legacy_phy_read(dev,
  524. 0x0035) & 0xFFC0) | 0x0064);
  525. b43legacy_phy_write(dev, 0x005D, (b43legacy_phy_read(dev,
  526. 0x005D) & 0xFF80) | 0x000A);
  527. b43legacy_phy_write(dev, 0x5B, 0x0000);
  528. b43legacy_phy_write(dev, 0x5C, 0x0000);
  529. }
  530. if (dev->bad_frames_preempt)
  531. b43legacy_phy_write(dev, B43legacy_PHY_RADIO_BITFIELD,
  532. b43legacy_phy_read(dev,
  533. B43legacy_PHY_RADIO_BITFIELD) | (1 << 12));
  534. if (phy->analog == 1) {
  535. b43legacy_phy_write(dev, 0x0026, 0xCE00);
  536. b43legacy_phy_write(dev, 0x0021, 0x3763);
  537. b43legacy_phy_write(dev, 0x0022, 0x1BC3);
  538. b43legacy_phy_write(dev, 0x0023, 0x06F9);
  539. b43legacy_phy_write(dev, 0x0024, 0x037E);
  540. } else
  541. b43legacy_phy_write(dev, 0x0026, 0xCC00);
  542. b43legacy_phy_write(dev, 0x0030, 0x00C6);
  543. b43legacy_write16(dev, 0x03EC, 0x3F22);
  544. if (phy->analog == 1)
  545. b43legacy_phy_write(dev, 0x0020, 0x3E1C);
  546. else
  547. b43legacy_phy_write(dev, 0x0020, 0x301C);
  548. if (phy->analog == 0)
  549. b43legacy_write16(dev, 0x03E4, 0x3000);
  550. old_channel = (phy->channel == 0xFF) ? 1 : phy->channel;
  551. /* Force to channel 7, even if not supported. */
  552. b43legacy_radio_selectchannel(dev, 7, 0);
  553. if (phy->radio_ver != 0x2050) {
  554. b43legacy_radio_write16(dev, 0x0075, 0x0080);
  555. b43legacy_radio_write16(dev, 0x0079, 0x0081);
  556. }
  557. b43legacy_radio_write16(dev, 0x0050, 0x0020);
  558. b43legacy_radio_write16(dev, 0x0050, 0x0023);
  559. if (phy->radio_ver == 0x2050) {
  560. b43legacy_radio_write16(dev, 0x0050, 0x0020);
  561. b43legacy_radio_write16(dev, 0x005A, 0x0070);
  562. }
  563. b43legacy_radio_write16(dev, 0x005B, 0x007B);
  564. b43legacy_radio_write16(dev, 0x005C, 0x00B0);
  565. b43legacy_radio_write16(dev, 0x007A, b43legacy_radio_read16(dev,
  566. 0x007A) | 0x0007);
  567. b43legacy_radio_selectchannel(dev, old_channel, 0);
  568. b43legacy_phy_write(dev, 0x0014, 0x0080);
  569. b43legacy_phy_write(dev, 0x0032, 0x00CA);
  570. b43legacy_phy_write(dev, 0x002A, 0x88A3);
  571. b43legacy_radio_set_txpower_bg(dev, 0xFFFF, 0xFFFF, 0xFFFF);
  572. if (phy->radio_ver == 0x2050)
  573. b43legacy_radio_write16(dev, 0x005D, 0x000D);
  574. b43legacy_write16(dev, 0x03E4, (b43legacy_read16(dev, 0x03E4) &
  575. 0xFFC0) | 0x0004);
  576. }
  577. static void b43legacy_phy_initb6(struct b43legacy_wldev *dev)
  578. {
  579. struct b43legacy_phy *phy = &dev->phy;
  580. u16 offset;
  581. u16 val;
  582. u8 old_channel;
  583. b43legacy_phy_write(dev, 0x003E, 0x817A);
  584. b43legacy_radio_write16(dev, 0x007A,
  585. (b43legacy_radio_read16(dev, 0x007A) | 0x0058));
  586. if (phy->radio_rev == 4 ||
  587. phy->radio_rev == 5) {
  588. b43legacy_radio_write16(dev, 0x0051, 0x0037);
  589. b43legacy_radio_write16(dev, 0x0052, 0x0070);
  590. b43legacy_radio_write16(dev, 0x0053, 0x00B3);
  591. b43legacy_radio_write16(dev, 0x0054, 0x009B);
  592. b43legacy_radio_write16(dev, 0x005A, 0x0088);
  593. b43legacy_radio_write16(dev, 0x005B, 0x0088);
  594. b43legacy_radio_write16(dev, 0x005D, 0x0088);
  595. b43legacy_radio_write16(dev, 0x005E, 0x0088);
  596. b43legacy_radio_write16(dev, 0x007D, 0x0088);
  597. b43legacy_shm_write32(dev, B43legacy_SHM_SHARED,
  598. B43legacy_UCODEFLAGS_OFFSET,
  599. (b43legacy_shm_read32(dev,
  600. B43legacy_SHM_SHARED,
  601. B43legacy_UCODEFLAGS_OFFSET)
  602. | 0x00000200));
  603. }
  604. if (phy->radio_rev == 8) {
  605. b43legacy_radio_write16(dev, 0x0051, 0x0000);
  606. b43legacy_radio_write16(dev, 0x0052, 0x0040);
  607. b43legacy_radio_write16(dev, 0x0053, 0x00B7);
  608. b43legacy_radio_write16(dev, 0x0054, 0x0098);
  609. b43legacy_radio_write16(dev, 0x005A, 0x0088);
  610. b43legacy_radio_write16(dev, 0x005B, 0x006B);
  611. b43legacy_radio_write16(dev, 0x005C, 0x000F);
  612. if (dev->dev->bus->sprom.boardflags_lo & 0x8000) {
  613. b43legacy_radio_write16(dev, 0x005D, 0x00FA);
  614. b43legacy_radio_write16(dev, 0x005E, 0x00D8);
  615. } else {
  616. b43legacy_radio_write16(dev, 0x005D, 0x00F5);
  617. b43legacy_radio_write16(dev, 0x005E, 0x00B8);
  618. }
  619. b43legacy_radio_write16(dev, 0x0073, 0x0003);
  620. b43legacy_radio_write16(dev, 0x007D, 0x00A8);
  621. b43legacy_radio_write16(dev, 0x007C, 0x0001);
  622. b43legacy_radio_write16(dev, 0x007E, 0x0008);
  623. }
  624. val = 0x1E1F;
  625. for (offset = 0x0088; offset < 0x0098; offset++) {
  626. b43legacy_phy_write(dev, offset, val);
  627. val -= 0x0202;
  628. }
  629. val = 0x3E3F;
  630. for (offset = 0x0098; offset < 0x00A8; offset++) {
  631. b43legacy_phy_write(dev, offset, val);
  632. val -= 0x0202;
  633. }
  634. val = 0x2120;
  635. for (offset = 0x00A8; offset < 0x00C8; offset++) {
  636. b43legacy_phy_write(dev, offset, (val & 0x3F3F));
  637. val += 0x0202;
  638. }
  639. if (phy->type == B43legacy_PHYTYPE_G) {
  640. b43legacy_radio_write16(dev, 0x007A,
  641. b43legacy_radio_read16(dev, 0x007A) |
  642. 0x0020);
  643. b43legacy_radio_write16(dev, 0x0051,
  644. b43legacy_radio_read16(dev, 0x0051) |
  645. 0x0004);
  646. b43legacy_phy_write(dev, 0x0802,
  647. b43legacy_phy_read(dev, 0x0802) | 0x0100);
  648. b43legacy_phy_write(dev, 0x042B,
  649. b43legacy_phy_read(dev, 0x042B) | 0x2000);
  650. b43legacy_phy_write(dev, 0x5B, 0x0000);
  651. b43legacy_phy_write(dev, 0x5C, 0x0000);
  652. }
  653. old_channel = phy->channel;
  654. if (old_channel >= 8)
  655. b43legacy_radio_selectchannel(dev, 1, 0);
  656. else
  657. b43legacy_radio_selectchannel(dev, 13, 0);
  658. b43legacy_radio_write16(dev, 0x0050, 0x0020);
  659. b43legacy_radio_write16(dev, 0x0050, 0x0023);
  660. udelay(40);
  661. if (phy->radio_rev < 6 || phy->radio_rev == 8) {
  662. b43legacy_radio_write16(dev, 0x007C,
  663. (b43legacy_radio_read16(dev, 0x007C)
  664. | 0x0002));
  665. b43legacy_radio_write16(dev, 0x0050, 0x0020);
  666. }
  667. if (phy->radio_rev <= 2) {
  668. b43legacy_radio_write16(dev, 0x0050, 0x0020);
  669. b43legacy_radio_write16(dev, 0x005A, 0x0070);
  670. b43legacy_radio_write16(dev, 0x005B, 0x007B);
  671. b43legacy_radio_write16(dev, 0x005C, 0x00B0);
  672. }
  673. b43legacy_radio_write16(dev, 0x007A,
  674. (b43legacy_radio_read16(dev,
  675. 0x007A) & 0x00F8) | 0x0007);
  676. b43legacy_radio_selectchannel(dev, old_channel, 0);
  677. b43legacy_phy_write(dev, 0x0014, 0x0200);
  678. if (phy->radio_rev >= 6)
  679. b43legacy_phy_write(dev, 0x002A, 0x88C2);
  680. else
  681. b43legacy_phy_write(dev, 0x002A, 0x8AC0);
  682. b43legacy_phy_write(dev, 0x0038, 0x0668);
  683. b43legacy_radio_set_txpower_bg(dev, 0xFFFF, 0xFFFF, 0xFFFF);
  684. if (phy->radio_rev == 4 || phy->radio_rev == 5)
  685. b43legacy_phy_write(dev, 0x005D, (b43legacy_phy_read(dev,
  686. 0x005D) & 0xFF80) | 0x0003);
  687. if (phy->radio_rev <= 2)
  688. b43legacy_radio_write16(dev, 0x005D, 0x000D);
  689. if (phy->analog == 4) {
  690. b43legacy_write16(dev, 0x03E4, 0x0009);
  691. b43legacy_phy_write(dev, 0x61, b43legacy_phy_read(dev, 0x61)
  692. & 0xFFF);
  693. } else
  694. b43legacy_phy_write(dev, 0x0002, (b43legacy_phy_read(dev,
  695. 0x0002) & 0xFFC0) | 0x0004);
  696. if (phy->type == B43legacy_PHYTYPE_G)
  697. b43legacy_write16(dev, 0x03E6, 0x0);
  698. if (phy->type == B43legacy_PHYTYPE_B) {
  699. b43legacy_write16(dev, 0x03E6, 0x8140);
  700. b43legacy_phy_write(dev, 0x0016, 0x0410);
  701. b43legacy_phy_write(dev, 0x0017, 0x0820);
  702. b43legacy_phy_write(dev, 0x0062, 0x0007);
  703. b43legacy_radio_init2050(dev);
  704. b43legacy_phy_lo_g_measure(dev);
  705. if (dev->dev->bus->sprom.boardflags_lo &
  706. B43legacy_BFL_RSSI) {
  707. b43legacy_calc_nrssi_slope(dev);
  708. b43legacy_calc_nrssi_threshold(dev);
  709. }
  710. b43legacy_phy_init_pctl(dev);
  711. }
  712. }
  713. static void b43legacy_calc_loopback_gain(struct b43legacy_wldev *dev)
  714. {
  715. struct b43legacy_phy *phy = &dev->phy;
  716. u16 backup_phy[15] = {0};
  717. u16 backup_radio[3];
  718. u16 backup_bband;
  719. u16 i;
  720. u16 loop1_cnt;
  721. u16 loop1_done;
  722. u16 loop1_omitted;
  723. u16 loop2_done;
  724. backup_phy[0] = b43legacy_phy_read(dev, 0x0429);
  725. backup_phy[1] = b43legacy_phy_read(dev, 0x0001);
  726. backup_phy[2] = b43legacy_phy_read(dev, 0x0811);
  727. backup_phy[3] = b43legacy_phy_read(dev, 0x0812);
  728. if (phy->rev != 1) {
  729. backup_phy[4] = b43legacy_phy_read(dev, 0x0814);
  730. backup_phy[5] = b43legacy_phy_read(dev, 0x0815);
  731. }
  732. backup_phy[6] = b43legacy_phy_read(dev, 0x005A);
  733. backup_phy[7] = b43legacy_phy_read(dev, 0x0059);
  734. backup_phy[8] = b43legacy_phy_read(dev, 0x0058);
  735. backup_phy[9] = b43legacy_phy_read(dev, 0x000A);
  736. backup_phy[10] = b43legacy_phy_read(dev, 0x0003);
  737. backup_phy[11] = b43legacy_phy_read(dev, 0x080F);
  738. backup_phy[12] = b43legacy_phy_read(dev, 0x0810);
  739. backup_phy[13] = b43legacy_phy_read(dev, 0x002B);
  740. backup_phy[14] = b43legacy_phy_read(dev, 0x0015);
  741. b43legacy_phy_read(dev, 0x002D); /* dummy read */
  742. backup_bband = phy->bbatt;
  743. backup_radio[0] = b43legacy_radio_read16(dev, 0x0052);
  744. backup_radio[1] = b43legacy_radio_read16(dev, 0x0043);
  745. backup_radio[2] = b43legacy_radio_read16(dev, 0x007A);
  746. b43legacy_phy_write(dev, 0x0429,
  747. b43legacy_phy_read(dev, 0x0429) & 0x3FFF);
  748. b43legacy_phy_write(dev, 0x0001,
  749. b43legacy_phy_read(dev, 0x0001) & 0x8000);
  750. b43legacy_phy_write(dev, 0x0811,
  751. b43legacy_phy_read(dev, 0x0811) | 0x0002);
  752. b43legacy_phy_write(dev, 0x0812,
  753. b43legacy_phy_read(dev, 0x0812) & 0xFFFD);
  754. b43legacy_phy_write(dev, 0x0811,
  755. b43legacy_phy_read(dev, 0x0811) | 0x0001);
  756. b43legacy_phy_write(dev, 0x0812,
  757. b43legacy_phy_read(dev, 0x0812) & 0xFFFE);
  758. if (phy->rev != 1) {
  759. b43legacy_phy_write(dev, 0x0814,
  760. b43legacy_phy_read(dev, 0x0814) | 0x0001);
  761. b43legacy_phy_write(dev, 0x0815,
  762. b43legacy_phy_read(dev, 0x0815) & 0xFFFE);
  763. b43legacy_phy_write(dev, 0x0814,
  764. b43legacy_phy_read(dev, 0x0814) | 0x0002);
  765. b43legacy_phy_write(dev, 0x0815,
  766. b43legacy_phy_read(dev, 0x0815) & 0xFFFD);
  767. }
  768. b43legacy_phy_write(dev, 0x0811, b43legacy_phy_read(dev, 0x0811) |
  769. 0x000C);
  770. b43legacy_phy_write(dev, 0x0812, b43legacy_phy_read(dev, 0x0812) |
  771. 0x000C);
  772. b43legacy_phy_write(dev, 0x0811, (b43legacy_phy_read(dev, 0x0811)
  773. & 0xFFCF) | 0x0030);
  774. b43legacy_phy_write(dev, 0x0812, (b43legacy_phy_read(dev, 0x0812)
  775. & 0xFFCF) | 0x0010);
  776. b43legacy_phy_write(dev, 0x005A, 0x0780);
  777. b43legacy_phy_write(dev, 0x0059, 0xC810);
  778. b43legacy_phy_write(dev, 0x0058, 0x000D);
  779. if (phy->analog == 0)
  780. b43legacy_phy_write(dev, 0x0003, 0x0122);
  781. else
  782. b43legacy_phy_write(dev, 0x000A,
  783. b43legacy_phy_read(dev, 0x000A)
  784. | 0x2000);
  785. if (phy->rev != 1) {
  786. b43legacy_phy_write(dev, 0x0814,
  787. b43legacy_phy_read(dev, 0x0814) | 0x0004);
  788. b43legacy_phy_write(dev, 0x0815,
  789. b43legacy_phy_read(dev, 0x0815) & 0xFFFB);
  790. }
  791. b43legacy_phy_write(dev, 0x0003,
  792. (b43legacy_phy_read(dev, 0x0003)
  793. & 0xFF9F) | 0x0040);
  794. if (phy->radio_ver == 0x2050 && phy->radio_rev == 2) {
  795. b43legacy_radio_write16(dev, 0x0052, 0x0000);
  796. b43legacy_radio_write16(dev, 0x0043,
  797. (b43legacy_radio_read16(dev, 0x0043)
  798. & 0xFFF0) | 0x0009);
  799. loop1_cnt = 9;
  800. } else if (phy->radio_rev == 8) {
  801. b43legacy_radio_write16(dev, 0x0043, 0x000F);
  802. loop1_cnt = 15;
  803. } else
  804. loop1_cnt = 0;
  805. b43legacy_phy_set_baseband_attenuation(dev, 11);
  806. if (phy->rev >= 3)
  807. b43legacy_phy_write(dev, 0x080F, 0xC020);
  808. else
  809. b43legacy_phy_write(dev, 0x080F, 0x8020);
  810. b43legacy_phy_write(dev, 0x0810, 0x0000);
  811. b43legacy_phy_write(dev, 0x002B,
  812. (b43legacy_phy_read(dev, 0x002B)
  813. & 0xFFC0) | 0x0001);
  814. b43legacy_phy_write(dev, 0x002B,
  815. (b43legacy_phy_read(dev, 0x002B)
  816. & 0xC0FF) | 0x0800);
  817. b43legacy_phy_write(dev, 0x0811,
  818. b43legacy_phy_read(dev, 0x0811) | 0x0100);
  819. b43legacy_phy_write(dev, 0x0812,
  820. b43legacy_phy_read(dev, 0x0812) & 0xCFFF);
  821. if (dev->dev->bus->sprom.boardflags_lo & B43legacy_BFL_EXTLNA) {
  822. if (phy->rev >= 7) {
  823. b43legacy_phy_write(dev, 0x0811,
  824. b43legacy_phy_read(dev, 0x0811)
  825. | 0x0800);
  826. b43legacy_phy_write(dev, 0x0812,
  827. b43legacy_phy_read(dev, 0x0812)
  828. | 0x8000);
  829. }
  830. }
  831. b43legacy_radio_write16(dev, 0x007A,
  832. b43legacy_radio_read16(dev, 0x007A)
  833. & 0x00F7);
  834. for (i = 0; i < loop1_cnt; i++) {
  835. b43legacy_radio_write16(dev, 0x0043, loop1_cnt);
  836. b43legacy_phy_write(dev, 0x0812,
  837. (b43legacy_phy_read(dev, 0x0812)
  838. & 0xF0FF) | (i << 8));
  839. b43legacy_phy_write(dev, 0x0015,
  840. (b43legacy_phy_read(dev, 0x0015)
  841. & 0x0FFF) | 0xA000);
  842. b43legacy_phy_write(dev, 0x0015,
  843. (b43legacy_phy_read(dev, 0x0015)
  844. & 0x0FFF) | 0xF000);
  845. udelay(20);
  846. if (b43legacy_phy_read(dev, 0x002D) >= 0x0DFC)
  847. break;
  848. }
  849. loop1_done = i;
  850. loop1_omitted = loop1_cnt - loop1_done;
  851. loop2_done = 0;
  852. if (loop1_done >= 8) {
  853. b43legacy_phy_write(dev, 0x0812,
  854. b43legacy_phy_read(dev, 0x0812)
  855. | 0x0030);
  856. for (i = loop1_done - 8; i < 16; i++) {
  857. b43legacy_phy_write(dev, 0x0812,
  858. (b43legacy_phy_read(dev, 0x0812)
  859. & 0xF0FF) | (i << 8));
  860. b43legacy_phy_write(dev, 0x0015,
  861. (b43legacy_phy_read(dev, 0x0015)
  862. & 0x0FFF) | 0xA000);
  863. b43legacy_phy_write(dev, 0x0015,
  864. (b43legacy_phy_read(dev, 0x0015)
  865. & 0x0FFF) | 0xF000);
  866. udelay(20);
  867. if (b43legacy_phy_read(dev, 0x002D) >= 0x0DFC)
  868. break;
  869. }
  870. }
  871. if (phy->rev != 1) {
  872. b43legacy_phy_write(dev, 0x0814, backup_phy[4]);
  873. b43legacy_phy_write(dev, 0x0815, backup_phy[5]);
  874. }
  875. b43legacy_phy_write(dev, 0x005A, backup_phy[6]);
  876. b43legacy_phy_write(dev, 0x0059, backup_phy[7]);
  877. b43legacy_phy_write(dev, 0x0058, backup_phy[8]);
  878. b43legacy_phy_write(dev, 0x000A, backup_phy[9]);
  879. b43legacy_phy_write(dev, 0x0003, backup_phy[10]);
  880. b43legacy_phy_write(dev, 0x080F, backup_phy[11]);
  881. b43legacy_phy_write(dev, 0x0810, backup_phy[12]);
  882. b43legacy_phy_write(dev, 0x002B, backup_phy[13]);
  883. b43legacy_phy_write(dev, 0x0015, backup_phy[14]);
  884. b43legacy_phy_set_baseband_attenuation(dev, backup_bband);
  885. b43legacy_radio_write16(dev, 0x0052, backup_radio[0]);
  886. b43legacy_radio_write16(dev, 0x0043, backup_radio[1]);
  887. b43legacy_radio_write16(dev, 0x007A, backup_radio[2]);
  888. b43legacy_phy_write(dev, 0x0811, backup_phy[2] | 0x0003);
  889. udelay(10);
  890. b43legacy_phy_write(dev, 0x0811, backup_phy[2]);
  891. b43legacy_phy_write(dev, 0x0812, backup_phy[3]);
  892. b43legacy_phy_write(dev, 0x0429, backup_phy[0]);
  893. b43legacy_phy_write(dev, 0x0001, backup_phy[1]);
  894. phy->loopback_gain[0] = ((loop1_done * 6) - (loop1_omitted * 4)) - 11;
  895. phy->loopback_gain[1] = (24 - (3 * loop2_done)) * 2;
  896. }
  897. static void b43legacy_phy_initg(struct b43legacy_wldev *dev)
  898. {
  899. struct b43legacy_phy *phy = &dev->phy;
  900. u16 tmp;
  901. if (phy->rev == 1)
  902. b43legacy_phy_initb5(dev);
  903. else
  904. b43legacy_phy_initb6(dev);
  905. if (phy->rev >= 2 && phy->gmode)
  906. b43legacy_phy_inita(dev);
  907. if (phy->rev >= 2) {
  908. b43legacy_phy_write(dev, 0x0814, 0x0000);
  909. b43legacy_phy_write(dev, 0x0815, 0x0000);
  910. }
  911. if (phy->rev == 2) {
  912. b43legacy_phy_write(dev, 0x0811, 0x0000);
  913. b43legacy_phy_write(dev, 0x0015, 0x00C0);
  914. }
  915. if (phy->rev > 5) {
  916. b43legacy_phy_write(dev, 0x0811, 0x0400);
  917. b43legacy_phy_write(dev, 0x0015, 0x00C0);
  918. }
  919. if (phy->gmode) {
  920. tmp = b43legacy_phy_read(dev, 0x0400) & 0xFF;
  921. if (tmp == 3) {
  922. b43legacy_phy_write(dev, 0x04C2, 0x1816);
  923. b43legacy_phy_write(dev, 0x04C3, 0x8606);
  924. }
  925. if (tmp == 4 || tmp == 5) {
  926. b43legacy_phy_write(dev, 0x04C2, 0x1816);
  927. b43legacy_phy_write(dev, 0x04C3, 0x8006);
  928. b43legacy_phy_write(dev, 0x04CC,
  929. (b43legacy_phy_read(dev,
  930. 0x04CC) & 0x00FF) |
  931. 0x1F00);
  932. }
  933. if (phy->rev >= 2)
  934. b43legacy_phy_write(dev, 0x047E, 0x0078);
  935. }
  936. if (phy->radio_rev == 8) {
  937. b43legacy_phy_write(dev, 0x0801, b43legacy_phy_read(dev, 0x0801)
  938. | 0x0080);
  939. b43legacy_phy_write(dev, 0x043E, b43legacy_phy_read(dev, 0x043E)
  940. | 0x0004);
  941. }
  942. if (phy->rev >= 2 && phy->gmode)
  943. b43legacy_calc_loopback_gain(dev);
  944. if (phy->radio_rev != 8) {
  945. if (phy->initval == 0xFFFF)
  946. phy->initval = b43legacy_radio_init2050(dev);
  947. else
  948. b43legacy_radio_write16(dev, 0x0078, phy->initval);
  949. }
  950. if (phy->txctl2 == 0xFFFF)
  951. b43legacy_phy_lo_g_measure(dev);
  952. else {
  953. if (phy->radio_ver == 0x2050 && phy->radio_rev == 8)
  954. b43legacy_radio_write16(dev, 0x0052,
  955. (phy->txctl1 << 4) |
  956. phy->txctl2);
  957. else
  958. b43legacy_radio_write16(dev, 0x0052,
  959. (b43legacy_radio_read16(dev,
  960. 0x0052) & 0xFFF0) |
  961. phy->txctl1);
  962. if (phy->rev >= 6)
  963. b43legacy_phy_write(dev, 0x0036,
  964. (b43legacy_phy_read(dev, 0x0036)
  965. & 0x0FFF) | (phy->txctl2 << 12));
  966. if (dev->dev->bus->sprom.boardflags_lo &
  967. B43legacy_BFL_PACTRL)
  968. b43legacy_phy_write(dev, 0x002E, 0x8075);
  969. else
  970. b43legacy_phy_write(dev, 0x002E, 0x807F);
  971. if (phy->rev < 2)
  972. b43legacy_phy_write(dev, 0x002F, 0x0101);
  973. else
  974. b43legacy_phy_write(dev, 0x002F, 0x0202);
  975. }
  976. if (phy->gmode) {
  977. b43legacy_phy_lo_adjust(dev, 0);
  978. b43legacy_phy_write(dev, 0x080F, 0x8078);
  979. }
  980. if (!(dev->dev->bus->sprom.boardflags_lo & B43legacy_BFL_RSSI)) {
  981. /* The specs state to update the NRSSI LT with
  982. * the value 0x7FFFFFFF here. I think that is some weird
  983. * compiler optimization in the original driver.
  984. * Essentially, what we do here is resetting all NRSSI LT
  985. * entries to -32 (see the clamp_val() in nrssi_hw_update())
  986. */
  987. b43legacy_nrssi_hw_update(dev, 0xFFFF);
  988. b43legacy_calc_nrssi_threshold(dev);
  989. } else if (phy->gmode || phy->rev >= 2) {
  990. if (phy->nrssi[0] == -1000) {
  991. B43legacy_WARN_ON(phy->nrssi[1] != -1000);
  992. b43legacy_calc_nrssi_slope(dev);
  993. } else {
  994. B43legacy_WARN_ON(phy->nrssi[1] == -1000);
  995. b43legacy_calc_nrssi_threshold(dev);
  996. }
  997. }
  998. if (phy->radio_rev == 8)
  999. b43legacy_phy_write(dev, 0x0805, 0x3230);
  1000. b43legacy_phy_init_pctl(dev);
  1001. if (dev->dev->bus->chip_id == 0x4306
  1002. && dev->dev->bus->chip_package == 2) {
  1003. b43legacy_phy_write(dev, 0x0429,
  1004. b43legacy_phy_read(dev, 0x0429) & 0xBFFF);
  1005. b43legacy_phy_write(dev, 0x04C3,
  1006. b43legacy_phy_read(dev, 0x04C3) & 0x7FFF);
  1007. }
  1008. }
  1009. static u16 b43legacy_phy_lo_b_r15_loop(struct b43legacy_wldev *dev)
  1010. {
  1011. int i;
  1012. u16 ret = 0;
  1013. unsigned long flags;
  1014. local_irq_save(flags);
  1015. for (i = 0; i < 10; i++) {
  1016. b43legacy_phy_write(dev, 0x0015, 0xAFA0);
  1017. udelay(1);
  1018. b43legacy_phy_write(dev, 0x0015, 0xEFA0);
  1019. udelay(10);
  1020. b43legacy_phy_write(dev, 0x0015, 0xFFA0);
  1021. udelay(40);
  1022. ret += b43legacy_phy_read(dev, 0x002C);
  1023. }
  1024. local_irq_restore(flags);
  1025. b43legacy_voluntary_preempt();
  1026. return ret;
  1027. }
  1028. void b43legacy_phy_lo_b_measure(struct b43legacy_wldev *dev)
  1029. {
  1030. struct b43legacy_phy *phy = &dev->phy;
  1031. u16 regstack[12] = { 0 };
  1032. u16 mls;
  1033. u16 fval;
  1034. int i;
  1035. int j;
  1036. regstack[0] = b43legacy_phy_read(dev, 0x0015);
  1037. regstack[1] = b43legacy_radio_read16(dev, 0x0052) & 0xFFF0;
  1038. if (phy->radio_ver == 0x2053) {
  1039. regstack[2] = b43legacy_phy_read(dev, 0x000A);
  1040. regstack[3] = b43legacy_phy_read(dev, 0x002A);
  1041. regstack[4] = b43legacy_phy_read(dev, 0x0035);
  1042. regstack[5] = b43legacy_phy_read(dev, 0x0003);
  1043. regstack[6] = b43legacy_phy_read(dev, 0x0001);
  1044. regstack[7] = b43legacy_phy_read(dev, 0x0030);
  1045. regstack[8] = b43legacy_radio_read16(dev, 0x0043);
  1046. regstack[9] = b43legacy_radio_read16(dev, 0x007A);
  1047. regstack[10] = b43legacy_read16(dev, 0x03EC);
  1048. regstack[11] = b43legacy_radio_read16(dev, 0x0052) & 0x00F0;
  1049. b43legacy_phy_write(dev, 0x0030, 0x00FF);
  1050. b43legacy_write16(dev, 0x03EC, 0x3F3F);
  1051. b43legacy_phy_write(dev, 0x0035, regstack[4] & 0xFF7F);
  1052. b43legacy_radio_write16(dev, 0x007A, regstack[9] & 0xFFF0);
  1053. }
  1054. b43legacy_phy_write(dev, 0x0015, 0xB000);
  1055. b43legacy_phy_write(dev, 0x002B, 0x0004);
  1056. if (phy->radio_ver == 0x2053) {
  1057. b43legacy_phy_write(dev, 0x002B, 0x0203);
  1058. b43legacy_phy_write(dev, 0x002A, 0x08A3);
  1059. }
  1060. phy->minlowsig[0] = 0xFFFF;
  1061. for (i = 0; i < 4; i++) {
  1062. b43legacy_radio_write16(dev, 0x0052, regstack[1] | i);
  1063. b43legacy_phy_lo_b_r15_loop(dev);
  1064. }
  1065. for (i = 0; i < 10; i++) {
  1066. b43legacy_radio_write16(dev, 0x0052, regstack[1] | i);
  1067. mls = b43legacy_phy_lo_b_r15_loop(dev) / 10;
  1068. if (mls < phy->minlowsig[0]) {
  1069. phy->minlowsig[0] = mls;
  1070. phy->minlowsigpos[0] = i;
  1071. }
  1072. }
  1073. b43legacy_radio_write16(dev, 0x0052, regstack[1]
  1074. | phy->minlowsigpos[0]);
  1075. phy->minlowsig[1] = 0xFFFF;
  1076. for (i = -4; i < 5; i += 2) {
  1077. for (j = -4; j < 5; j += 2) {
  1078. if (j < 0)
  1079. fval = (0x0100 * i) + j + 0x0100;
  1080. else
  1081. fval = (0x0100 * i) + j;
  1082. b43legacy_phy_write(dev, 0x002F, fval);
  1083. mls = b43legacy_phy_lo_b_r15_loop(dev) / 10;
  1084. if (mls < phy->minlowsig[1]) {
  1085. phy->minlowsig[1] = mls;
  1086. phy->minlowsigpos[1] = fval;
  1087. }
  1088. }
  1089. }
  1090. phy->minlowsigpos[1] += 0x0101;
  1091. b43legacy_phy_write(dev, 0x002F, phy->minlowsigpos[1]);
  1092. if (phy->radio_ver == 0x2053) {
  1093. b43legacy_phy_write(dev, 0x000A, regstack[2]);
  1094. b43legacy_phy_write(dev, 0x002A, regstack[3]);
  1095. b43legacy_phy_write(dev, 0x0035, regstack[4]);
  1096. b43legacy_phy_write(dev, 0x0003, regstack[5]);
  1097. b43legacy_phy_write(dev, 0x0001, regstack[6]);
  1098. b43legacy_phy_write(dev, 0x0030, regstack[7]);
  1099. b43legacy_radio_write16(dev, 0x0043, regstack[8]);
  1100. b43legacy_radio_write16(dev, 0x007A, regstack[9]);
  1101. b43legacy_radio_write16(dev, 0x0052,
  1102. (b43legacy_radio_read16(dev, 0x0052)
  1103. & 0x000F) | regstack[11]);
  1104. b43legacy_write16(dev, 0x03EC, regstack[10]);
  1105. }
  1106. b43legacy_phy_write(dev, 0x0015, regstack[0]);
  1107. }
  1108. static inline
  1109. u16 b43legacy_phy_lo_g_deviation_subval(struct b43legacy_wldev *dev,
  1110. u16 control)
  1111. {
  1112. struct b43legacy_phy *phy = &dev->phy;
  1113. u16 ret;
  1114. unsigned long flags;
  1115. local_irq_save(flags);
  1116. if (phy->gmode) {
  1117. b43legacy_phy_write(dev, 0x15, 0xE300);
  1118. control <<= 8;
  1119. b43legacy_phy_write(dev, 0x0812, control | 0x00B0);
  1120. udelay(5);
  1121. b43legacy_phy_write(dev, 0x0812, control | 0x00B2);
  1122. udelay(2);
  1123. b43legacy_phy_write(dev, 0x0812, control | 0x00B3);
  1124. udelay(4);
  1125. b43legacy_phy_write(dev, 0x0015, 0xF300);
  1126. udelay(8);
  1127. } else {
  1128. b43legacy_phy_write(dev, 0x0015, control | 0xEFA0);
  1129. udelay(2);
  1130. b43legacy_phy_write(dev, 0x0015, control | 0xEFE0);
  1131. udelay(4);
  1132. b43legacy_phy_write(dev, 0x0015, control | 0xFFE0);
  1133. udelay(8);
  1134. }
  1135. ret = b43legacy_phy_read(dev, 0x002D);
  1136. local_irq_restore(flags);
  1137. b43legacy_voluntary_preempt();
  1138. return ret;
  1139. }
  1140. static u32 b43legacy_phy_lo_g_singledeviation(struct b43legacy_wldev *dev,
  1141. u16 control)
  1142. {
  1143. int i;
  1144. u32 ret = 0;
  1145. for (i = 0; i < 8; i++)
  1146. ret += b43legacy_phy_lo_g_deviation_subval(dev, control);
  1147. return ret;
  1148. }
  1149. /* Write the LocalOscillator CONTROL */
  1150. static inline
  1151. void b43legacy_lo_write(struct b43legacy_wldev *dev,
  1152. struct b43legacy_lopair *pair)
  1153. {
  1154. u16 value;
  1155. value = (u8)(pair->low);
  1156. value |= ((u8)(pair->high)) << 8;
  1157. #ifdef CONFIG_B43LEGACY_DEBUG
  1158. /* Sanity check. */
  1159. if (pair->low < -8 || pair->low > 8 ||
  1160. pair->high < -8 || pair->high > 8) {
  1161. b43legacydbg(dev->wl,
  1162. "WARNING: Writing invalid LOpair "
  1163. "(low: %d, high: %d)\n",
  1164. pair->low, pair->high);
  1165. dump_stack();
  1166. }
  1167. #endif
  1168. b43legacy_phy_write(dev, B43legacy_PHY_G_LO_CONTROL, value);
  1169. }
  1170. static inline
  1171. struct b43legacy_lopair *b43legacy_find_lopair(struct b43legacy_wldev *dev,
  1172. u16 bbatt,
  1173. u16 rfatt,
  1174. u16 tx)
  1175. {
  1176. static const u8 dict[10] = { 11, 10, 11, 12, 13, 12, 13, 12, 13, 12 };
  1177. struct b43legacy_phy *phy = &dev->phy;
  1178. if (bbatt > 6)
  1179. bbatt = 6;
  1180. B43legacy_WARN_ON(rfatt >= 10);
  1181. if (tx == 3)
  1182. return b43legacy_get_lopair(phy, rfatt, bbatt);
  1183. return b43legacy_get_lopair(phy, dict[rfatt], bbatt);
  1184. }
  1185. static inline
  1186. struct b43legacy_lopair *b43legacy_current_lopair(struct b43legacy_wldev *dev)
  1187. {
  1188. struct b43legacy_phy *phy = &dev->phy;
  1189. return b43legacy_find_lopair(dev, phy->bbatt,
  1190. phy->rfatt, phy->txctl1);
  1191. }
  1192. /* Adjust B/G LO */
  1193. void b43legacy_phy_lo_adjust(struct b43legacy_wldev *dev, int fixed)
  1194. {
  1195. struct b43legacy_lopair *pair;
  1196. if (fixed) {
  1197. /* Use fixed values. Only for initialization. */
  1198. pair = b43legacy_find_lopair(dev, 2, 3, 0);
  1199. } else
  1200. pair = b43legacy_current_lopair(dev);
  1201. b43legacy_lo_write(dev, pair);
  1202. }
  1203. static void b43legacy_phy_lo_g_measure_txctl2(struct b43legacy_wldev *dev)
  1204. {
  1205. struct b43legacy_phy *phy = &dev->phy;
  1206. u16 txctl2 = 0;
  1207. u16 i;
  1208. u32 smallest;
  1209. u32 tmp;
  1210. b43legacy_radio_write16(dev, 0x0052, 0x0000);
  1211. udelay(10);
  1212. smallest = b43legacy_phy_lo_g_singledeviation(dev, 0);
  1213. for (i = 0; i < 16; i++) {
  1214. b43legacy_radio_write16(dev, 0x0052, i);
  1215. udelay(10);
  1216. tmp = b43legacy_phy_lo_g_singledeviation(dev, 0);
  1217. if (tmp < smallest) {
  1218. smallest = tmp;
  1219. txctl2 = i;
  1220. }
  1221. }
  1222. phy->txctl2 = txctl2;
  1223. }
  1224. static
  1225. void b43legacy_phy_lo_g_state(struct b43legacy_wldev *dev,
  1226. const struct b43legacy_lopair *in_pair,
  1227. struct b43legacy_lopair *out_pair,
  1228. u16 r27)
  1229. {
  1230. static const struct b43legacy_lopair transitions[8] = {
  1231. { .high = 1, .low = 1, },
  1232. { .high = 1, .low = 0, },
  1233. { .high = 1, .low = -1, },
  1234. { .high = 0, .low = -1, },
  1235. { .high = -1, .low = -1, },
  1236. { .high = -1, .low = 0, },
  1237. { .high = -1, .low = 1, },
  1238. { .high = 0, .low = 1, },
  1239. };
  1240. struct b43legacy_lopair lowest_transition = {
  1241. .high = in_pair->high,
  1242. .low = in_pair->low,
  1243. };
  1244. struct b43legacy_lopair tmp_pair;
  1245. struct b43legacy_lopair transition;
  1246. int i = 12;
  1247. int state = 0;
  1248. int found_lower;
  1249. int j;
  1250. int begin;
  1251. int end;
  1252. u32 lowest_deviation;
  1253. u32 tmp;
  1254. /* Note that in_pair and out_pair can point to the same pair.
  1255. * Be careful. */
  1256. b43legacy_lo_write(dev, &lowest_transition);
  1257. lowest_deviation = b43legacy_phy_lo_g_singledeviation(dev, r27);
  1258. do {
  1259. found_lower = 0;
  1260. B43legacy_WARN_ON(!(state >= 0 && state <= 8));
  1261. if (state == 0) {
  1262. begin = 1;
  1263. end = 8;
  1264. } else if (state % 2 == 0) {
  1265. begin = state - 1;
  1266. end = state + 1;
  1267. } else {
  1268. begin = state - 2;
  1269. end = state + 2;
  1270. }
  1271. if (begin < 1)
  1272. begin += 8;
  1273. if (end > 8)
  1274. end -= 8;
  1275. j = begin;
  1276. tmp_pair.high = lowest_transition.high;
  1277. tmp_pair.low = lowest_transition.low;
  1278. while (1) {
  1279. B43legacy_WARN_ON(!(j >= 1 && j <= 8));
  1280. transition.high = tmp_pair.high +
  1281. transitions[j - 1].high;
  1282. transition.low = tmp_pair.low + transitions[j - 1].low;
  1283. if ((abs(transition.low) < 9)
  1284. && (abs(transition.high) < 9)) {
  1285. b43legacy_lo_write(dev, &transition);
  1286. tmp = b43legacy_phy_lo_g_singledeviation(dev,
  1287. r27);
  1288. if (tmp < lowest_deviation) {
  1289. lowest_deviation = tmp;
  1290. state = j;
  1291. found_lower = 1;
  1292. lowest_transition.high =
  1293. transition.high;
  1294. lowest_transition.low = transition.low;
  1295. }
  1296. }
  1297. if (j == end)
  1298. break;
  1299. if (j == 8)
  1300. j = 1;
  1301. else
  1302. j++;
  1303. }
  1304. } while (i-- && found_lower);
  1305. out_pair->high = lowest_transition.high;
  1306. out_pair->low = lowest_transition.low;
  1307. }
  1308. /* Set the baseband attenuation value on chip. */
  1309. void b43legacy_phy_set_baseband_attenuation(struct b43legacy_wldev *dev,
  1310. u16 bbatt)
  1311. {
  1312. struct b43legacy_phy *phy = &dev->phy;
  1313. u16 value;
  1314. if (phy->analog == 0) {
  1315. value = (b43legacy_read16(dev, 0x03E6) & 0xFFF0);
  1316. value |= (bbatt & 0x000F);
  1317. b43legacy_write16(dev, 0x03E6, value);
  1318. return;
  1319. }
  1320. if (phy->analog > 1) {
  1321. value = b43legacy_phy_read(dev, 0x0060) & 0xFFC3;
  1322. value |= (bbatt << 2) & 0x003C;
  1323. } else {
  1324. value = b43legacy_phy_read(dev, 0x0060) & 0xFF87;
  1325. value |= (bbatt << 3) & 0x0078;
  1326. }
  1327. b43legacy_phy_write(dev, 0x0060, value);
  1328. }
  1329. /* http://bcm-specs.sipsolutions.net/LocalOscillator/Measure */
  1330. void b43legacy_phy_lo_g_measure(struct b43legacy_wldev *dev)
  1331. {
  1332. static const u8 pairorder[10] = { 3, 1, 5, 7, 9, 2, 0, 4, 6, 8 };
  1333. const int is_initializing = (b43legacy_status(dev)
  1334. < B43legacy_STAT_STARTED);
  1335. struct b43legacy_phy *phy = &dev->phy;
  1336. u16 h;
  1337. u16 i;
  1338. u16 oldi = 0;
  1339. u16 j;
  1340. struct b43legacy_lopair control;
  1341. struct b43legacy_lopair *tmp_control;
  1342. u16 tmp;
  1343. u16 regstack[16] = { 0 };
  1344. u8 oldchannel;
  1345. /* XXX: What are these? */
  1346. u8 r27 = 0;
  1347. u16 r31;
  1348. oldchannel = phy->channel;
  1349. /* Setup */
  1350. if (phy->gmode) {
  1351. regstack[0] = b43legacy_phy_read(dev, B43legacy_PHY_G_CRS);
  1352. regstack[1] = b43legacy_phy_read(dev, 0x0802);
  1353. b43legacy_phy_write(dev, B43legacy_PHY_G_CRS, regstack[0]
  1354. & 0x7FFF);
  1355. b43legacy_phy_write(dev, 0x0802, regstack[1] & 0xFFFC);
  1356. }
  1357. regstack[3] = b43legacy_read16(dev, 0x03E2);
  1358. b43legacy_write16(dev, 0x03E2, regstack[3] | 0x8000);
  1359. regstack[4] = b43legacy_read16(dev, B43legacy_MMIO_CHANNEL_EXT);
  1360. regstack[5] = b43legacy_phy_read(dev, 0x15);
  1361. regstack[6] = b43legacy_phy_read(dev, 0x2A);
  1362. regstack[7] = b43legacy_phy_read(dev, 0x35);
  1363. regstack[8] = b43legacy_phy_read(dev, 0x60);
  1364. regstack[9] = b43legacy_radio_read16(dev, 0x43);
  1365. regstack[10] = b43legacy_radio_read16(dev, 0x7A);
  1366. regstack[11] = b43legacy_radio_read16(dev, 0x52);
  1367. if (phy->gmode) {
  1368. regstack[12] = b43legacy_phy_read(dev, 0x0811);
  1369. regstack[13] = b43legacy_phy_read(dev, 0x0812);
  1370. regstack[14] = b43legacy_phy_read(dev, 0x0814);
  1371. regstack[15] = b43legacy_phy_read(dev, 0x0815);
  1372. }
  1373. b43legacy_radio_selectchannel(dev, 6, 0);
  1374. if (phy->gmode) {
  1375. b43legacy_phy_write(dev, B43legacy_PHY_G_CRS, regstack[0]
  1376. & 0x7FFF);
  1377. b43legacy_phy_write(dev, 0x0802, regstack[1] & 0xFFFC);
  1378. b43legacy_dummy_transmission(dev);
  1379. }
  1380. b43legacy_radio_write16(dev, 0x0043, 0x0006);
  1381. b43legacy_phy_set_baseband_attenuation(dev, 2);
  1382. b43legacy_write16(dev, B43legacy_MMIO_CHANNEL_EXT, 0x0000);
  1383. b43legacy_phy_write(dev, 0x002E, 0x007F);
  1384. b43legacy_phy_write(dev, 0x080F, 0x0078);
  1385. b43legacy_phy_write(dev, 0x0035, regstack[7] & ~(1 << 7));
  1386. b43legacy_radio_write16(dev, 0x007A, regstack[10] & 0xFFF0);
  1387. b43legacy_phy_write(dev, 0x002B, 0x0203);
  1388. b43legacy_phy_write(dev, 0x002A, 0x08A3);
  1389. if (phy->gmode) {
  1390. b43legacy_phy_write(dev, 0x0814, regstack[14] | 0x0003);
  1391. b43legacy_phy_write(dev, 0x0815, regstack[15] & 0xFFFC);
  1392. b43legacy_phy_write(dev, 0x0811, 0x01B3);
  1393. b43legacy_phy_write(dev, 0x0812, 0x00B2);
  1394. }
  1395. if (is_initializing)
  1396. b43legacy_phy_lo_g_measure_txctl2(dev);
  1397. b43legacy_phy_write(dev, 0x080F, 0x8078);
  1398. /* Measure */
  1399. control.low = 0;
  1400. control.high = 0;
  1401. for (h = 0; h < 10; h++) {
  1402. /* Loop over each possible RadioAttenuation (0-9) */
  1403. i = pairorder[h];
  1404. if (is_initializing) {
  1405. if (i == 3) {
  1406. control.low = 0;
  1407. control.high = 0;
  1408. } else if (((i % 2 == 1) && (oldi % 2 == 1)) ||
  1409. ((i % 2 == 0) && (oldi % 2 == 0))) {
  1410. tmp_control = b43legacy_get_lopair(phy, oldi,
  1411. 0);
  1412. memcpy(&control, tmp_control, sizeof(control));
  1413. } else {
  1414. tmp_control = b43legacy_get_lopair(phy, 3, 0);
  1415. memcpy(&control, tmp_control, sizeof(control));
  1416. }
  1417. }
  1418. /* Loop over each possible BasebandAttenuation/2 */
  1419. for (j = 0; j < 4; j++) {
  1420. if (is_initializing) {
  1421. tmp = i * 2 + j;
  1422. r27 = 0;
  1423. r31 = 0;
  1424. if (tmp > 14) {
  1425. r31 = 1;
  1426. if (tmp > 17)
  1427. r27 = 1;
  1428. if (tmp > 19)
  1429. r27 = 2;
  1430. }
  1431. } else {
  1432. tmp_control = b43legacy_get_lopair(phy, i,
  1433. j * 2);
  1434. if (!tmp_control->used)
  1435. continue;
  1436. memcpy(&control, tmp_control, sizeof(control));
  1437. r27 = 3;
  1438. r31 = 0;
  1439. }
  1440. b43legacy_radio_write16(dev, 0x43, i);
  1441. b43legacy_radio_write16(dev, 0x52, phy->txctl2);
  1442. udelay(10);
  1443. b43legacy_voluntary_preempt();
  1444. b43legacy_phy_set_baseband_attenuation(dev, j * 2);
  1445. tmp = (regstack[10] & 0xFFF0);
  1446. if (r31)
  1447. tmp |= 0x0008;
  1448. b43legacy_radio_write16(dev, 0x007A, tmp);
  1449. tmp_control = b43legacy_get_lopair(phy, i, j * 2);
  1450. b43legacy_phy_lo_g_state(dev, &control, tmp_control,
  1451. r27);
  1452. }
  1453. oldi = i;
  1454. }
  1455. /* Loop over each possible RadioAttenuation (10-13) */
  1456. for (i = 10; i < 14; i++) {
  1457. /* Loop over each possible BasebandAttenuation/2 */
  1458. for (j = 0; j < 4; j++) {
  1459. if (is_initializing) {
  1460. tmp_control = b43legacy_get_lopair(phy, i - 9,
  1461. j * 2);
  1462. memcpy(&control, tmp_control, sizeof(control));
  1463. /* FIXME: The next line is wrong, as the
  1464. * following if statement can never trigger. */
  1465. tmp = (i - 9) * 2 + j - 5;
  1466. r27 = 0;
  1467. r31 = 0;
  1468. if (tmp > 14) {
  1469. r31 = 1;
  1470. if (tmp > 17)
  1471. r27 = 1;
  1472. if (tmp > 19)
  1473. r27 = 2;
  1474. }
  1475. } else {
  1476. tmp_control = b43legacy_get_lopair(phy, i - 9,
  1477. j * 2);
  1478. if (!tmp_control->used)
  1479. continue;
  1480. memcpy(&control, tmp_control, sizeof(control));
  1481. r27 = 3;
  1482. r31 = 0;
  1483. }
  1484. b43legacy_radio_write16(dev, 0x43, i - 9);
  1485. /* FIXME: shouldn't txctl1 be zero in the next line
  1486. * and 3 in the loop above? */
  1487. b43legacy_radio_write16(dev, 0x52,
  1488. phy->txctl2
  1489. | (3/*txctl1*/ << 4));
  1490. udelay(10);
  1491. b43legacy_voluntary_preempt();
  1492. b43legacy_phy_set_baseband_attenuation(dev, j * 2);
  1493. tmp = (regstack[10] & 0xFFF0);
  1494. if (r31)
  1495. tmp |= 0x0008;
  1496. b43legacy_radio_write16(dev, 0x7A, tmp);
  1497. tmp_control = b43legacy_get_lopair(phy, i, j * 2);
  1498. b43legacy_phy_lo_g_state(dev, &control, tmp_control,
  1499. r27);
  1500. }
  1501. }
  1502. /* Restoration */
  1503. if (phy->gmode) {
  1504. b43legacy_phy_write(dev, 0x0015, 0xE300);
  1505. b43legacy_phy_write(dev, 0x0812, (r27 << 8) | 0xA0);
  1506. udelay(5);
  1507. b43legacy_phy_write(dev, 0x0812, (r27 << 8) | 0xA2);
  1508. udelay(2);
  1509. b43legacy_phy_write(dev, 0x0812, (r27 << 8) | 0xA3);
  1510. b43legacy_voluntary_preempt();
  1511. } else
  1512. b43legacy_phy_write(dev, 0x0015, r27 | 0xEFA0);
  1513. b43legacy_phy_lo_adjust(dev, is_initializing);
  1514. b43legacy_phy_write(dev, 0x002E, 0x807F);
  1515. if (phy->gmode)
  1516. b43legacy_phy_write(dev, 0x002F, 0x0202);
  1517. else
  1518. b43legacy_phy_write(dev, 0x002F, 0x0101);
  1519. b43legacy_write16(dev, B43legacy_MMIO_CHANNEL_EXT, regstack[4]);
  1520. b43legacy_phy_write(dev, 0x0015, regstack[5]);
  1521. b43legacy_phy_write(dev, 0x002A, regstack[6]);
  1522. b43legacy_phy_write(dev, 0x0035, regstack[7]);
  1523. b43legacy_phy_write(dev, 0x0060, regstack[8]);
  1524. b43legacy_radio_write16(dev, 0x0043, regstack[9]);
  1525. b43legacy_radio_write16(dev, 0x007A, regstack[10]);
  1526. regstack[11] &= 0x00F0;
  1527. regstack[11] |= (b43legacy_radio_read16(dev, 0x52) & 0x000F);
  1528. b43legacy_radio_write16(dev, 0x52, regstack[11]);
  1529. b43legacy_write16(dev, 0x03E2, regstack[3]);
  1530. if (phy->gmode) {
  1531. b43legacy_phy_write(dev, 0x0811, regstack[12]);
  1532. b43legacy_phy_write(dev, 0x0812, regstack[13]);
  1533. b43legacy_phy_write(dev, 0x0814, regstack[14]);
  1534. b43legacy_phy_write(dev, 0x0815, regstack[15]);
  1535. b43legacy_phy_write(dev, B43legacy_PHY_G_CRS, regstack[0]);
  1536. b43legacy_phy_write(dev, 0x0802, regstack[1]);
  1537. }
  1538. b43legacy_radio_selectchannel(dev, oldchannel, 1);
  1539. #ifdef CONFIG_B43LEGACY_DEBUG
  1540. {
  1541. /* Sanity check for all lopairs. */
  1542. for (i = 0; i < B43legacy_LO_COUNT; i++) {
  1543. tmp_control = phy->_lo_pairs + i;
  1544. if (tmp_control->low < -8 || tmp_control->low > 8 ||
  1545. tmp_control->high < -8 || tmp_control->high > 8)
  1546. b43legacywarn(dev->wl,
  1547. "WARNING: Invalid LOpair (low: %d, high:"
  1548. " %d, index: %d)\n",
  1549. tmp_control->low, tmp_control->high, i);
  1550. }
  1551. }
  1552. #endif /* CONFIG_B43LEGACY_DEBUG */
  1553. }
  1554. static
  1555. void b43legacy_phy_lo_mark_current_used(struct b43legacy_wldev *dev)
  1556. {
  1557. struct b43legacy_lopair *pair;
  1558. pair = b43legacy_current_lopair(dev);
  1559. pair->used = 1;
  1560. }
  1561. void b43legacy_phy_lo_mark_all_unused(struct b43legacy_wldev *dev)
  1562. {
  1563. struct b43legacy_phy *phy = &dev->phy;
  1564. struct b43legacy_lopair *pair;
  1565. int i;
  1566. for (i = 0; i < B43legacy_LO_COUNT; i++) {
  1567. pair = phy->_lo_pairs + i;
  1568. pair->used = 0;
  1569. }
  1570. }
  1571. /* http://bcm-specs.sipsolutions.net/EstimatePowerOut
  1572. * This function converts a TSSI value to dBm in Q5.2
  1573. */
  1574. static s8 b43legacy_phy_estimate_power_out(struct b43legacy_wldev *dev, s8 tssi)
  1575. {
  1576. struct b43legacy_phy *phy = &dev->phy;
  1577. s8 dbm = 0;
  1578. s32 tmp;
  1579. tmp = phy->idle_tssi;
  1580. tmp += tssi;
  1581. tmp -= phy->savedpctlreg;
  1582. switch (phy->type) {
  1583. case B43legacy_PHYTYPE_B:
  1584. case B43legacy_PHYTYPE_G:
  1585. tmp = clamp_val(tmp, 0x00, 0x3F);
  1586. dbm = phy->tssi2dbm[tmp];
  1587. break;
  1588. default:
  1589. B43legacy_BUG_ON(1);
  1590. }
  1591. return dbm;
  1592. }
  1593. /* http://bcm-specs.sipsolutions.net/RecalculateTransmissionPower */
  1594. void b43legacy_phy_xmitpower(struct b43legacy_wldev *dev)
  1595. {
  1596. struct b43legacy_phy *phy = &dev->phy;
  1597. u16 tmp;
  1598. u16 txpower;
  1599. s8 v0;
  1600. s8 v1;
  1601. s8 v2;
  1602. s8 v3;
  1603. s8 average;
  1604. int max_pwr;
  1605. s16 desired_pwr;
  1606. s16 estimated_pwr;
  1607. s16 pwr_adjust;
  1608. s16 radio_att_delta;
  1609. s16 baseband_att_delta;
  1610. s16 radio_attenuation;
  1611. s16 baseband_attenuation;
  1612. if (phy->savedpctlreg == 0xFFFF)
  1613. return;
  1614. if ((dev->dev->bus->boardinfo.type == 0x0416) &&
  1615. is_bcm_board_vendor(dev))
  1616. return;
  1617. #ifdef CONFIG_B43LEGACY_DEBUG
  1618. if (phy->manual_txpower_control)
  1619. return;
  1620. #endif
  1621. B43legacy_BUG_ON(!(phy->type == B43legacy_PHYTYPE_B ||
  1622. phy->type == B43legacy_PHYTYPE_G));
  1623. tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, 0x0058);
  1624. v0 = (s8)(tmp & 0x00FF);
  1625. v1 = (s8)((tmp & 0xFF00) >> 8);
  1626. tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, 0x005A);
  1627. v2 = (s8)(tmp & 0x00FF);
  1628. v3 = (s8)((tmp & 0xFF00) >> 8);
  1629. tmp = 0;
  1630. if (v0 == 0x7F || v1 == 0x7F || v2 == 0x7F || v3 == 0x7F) {
  1631. tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
  1632. 0x0070);
  1633. v0 = (s8)(tmp & 0x00FF);
  1634. v1 = (s8)((tmp & 0xFF00) >> 8);
  1635. tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
  1636. 0x0072);
  1637. v2 = (s8)(tmp & 0x00FF);
  1638. v3 = (s8)((tmp & 0xFF00) >> 8);
  1639. if (v0 == 0x7F || v1 == 0x7F || v2 == 0x7F || v3 == 0x7F)
  1640. return;
  1641. v0 = (v0 + 0x20) & 0x3F;
  1642. v1 = (v1 + 0x20) & 0x3F;
  1643. v2 = (v2 + 0x20) & 0x3F;
  1644. v3 = (v3 + 0x20) & 0x3F;
  1645. tmp = 1;
  1646. }
  1647. b43legacy_radio_clear_tssi(dev);
  1648. average = (v0 + v1 + v2 + v3 + 2) / 4;
  1649. if (tmp && (b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, 0x005E)
  1650. & 0x8))
  1651. average -= 13;
  1652. estimated_pwr = b43legacy_phy_estimate_power_out(dev, average);
  1653. max_pwr = dev->dev->bus->sprom.maxpwr_bg;
  1654. if ((dev->dev->bus->sprom.boardflags_lo
  1655. & B43legacy_BFL_PACTRL) &&
  1656. (phy->type == B43legacy_PHYTYPE_G))
  1657. max_pwr -= 0x3;
  1658. if (unlikely(max_pwr <= 0)) {
  1659. b43legacywarn(dev->wl, "Invalid max-TX-power value in SPROM."
  1660. "\n");
  1661. max_pwr = 74; /* fake it */
  1662. dev->dev->bus->sprom.maxpwr_bg = max_pwr;
  1663. }
  1664. /* Use regulatory information to get the maximum power.
  1665. * In the absence of such data from mac80211, we will use 20 dBm, which
  1666. * is the value for the EU, US, Canada, and most of the world.
  1667. * The regulatory maximum is reduced by the antenna gain (from sprom)
  1668. * and 1.5 dBm (a safety factor??). The result is in Q5.2 format
  1669. * which accounts for the factor of 4 */
  1670. #define REG_MAX_PWR 20
  1671. max_pwr = min(REG_MAX_PWR * 4
  1672. - dev->dev->bus->sprom.antenna_gain.ghz24.a0
  1673. - 0x6, max_pwr);
  1674. /* find the desired power in Q5.2 - power_level is in dBm
  1675. * and limit it - max_pwr is already in Q5.2 */
  1676. desired_pwr = clamp_val(phy->power_level << 2, 0, max_pwr);
  1677. if (b43legacy_debug(dev, B43legacy_DBG_XMITPOWER))
  1678. b43legacydbg(dev->wl, "Current TX power output: " Q52_FMT
  1679. " dBm, Desired TX power output: " Q52_FMT
  1680. " dBm\n", Q52_ARG(estimated_pwr),
  1681. Q52_ARG(desired_pwr));
  1682. /* Check if we need to adjust the current power. The factor of 2 is
  1683. * for damping */
  1684. pwr_adjust = (desired_pwr - estimated_pwr) / 2;
  1685. /* RF attenuation delta
  1686. * The minus sign is because lower attenuation => more power */
  1687. radio_att_delta = -(pwr_adjust + 7) >> 3;
  1688. /* Baseband attenuation delta */
  1689. baseband_att_delta = -(pwr_adjust >> 1) - (4 * radio_att_delta);
  1690. /* Do we need to adjust anything? */
  1691. if ((radio_att_delta == 0) && (baseband_att_delta == 0)) {
  1692. b43legacy_phy_lo_mark_current_used(dev);
  1693. return;
  1694. }
  1695. /* Calculate the new attenuation values. */
  1696. baseband_attenuation = phy->bbatt;
  1697. baseband_attenuation += baseband_att_delta;
  1698. radio_attenuation = phy->rfatt;
  1699. radio_attenuation += radio_att_delta;
  1700. /* Get baseband and radio attenuation values into permitted ranges.
  1701. * baseband 0-11, radio 0-9.
  1702. * Radio attenuation affects power level 4 times as much as baseband.
  1703. */
  1704. if (radio_attenuation < 0) {
  1705. baseband_attenuation -= (4 * -radio_attenuation);
  1706. radio_attenuation = 0;
  1707. } else if (radio_attenuation > 9) {
  1708. baseband_attenuation += (4 * (radio_attenuation - 9));
  1709. radio_attenuation = 9;
  1710. } else {
  1711. while (baseband_attenuation < 0 && radio_attenuation > 0) {
  1712. baseband_attenuation += 4;
  1713. radio_attenuation--;
  1714. }
  1715. while (baseband_attenuation > 11 && radio_attenuation < 9) {
  1716. baseband_attenuation -= 4;
  1717. radio_attenuation++;
  1718. }
  1719. }
  1720. baseband_attenuation = clamp_val(baseband_attenuation, 0, 11);
  1721. txpower = phy->txctl1;
  1722. if ((phy->radio_ver == 0x2050) && (phy->radio_rev == 2)) {
  1723. if (radio_attenuation <= 1) {
  1724. if (txpower == 0) {
  1725. txpower = 3;
  1726. radio_attenuation += 2;
  1727. baseband_attenuation += 2;
  1728. } else if (dev->dev->bus->sprom.boardflags_lo
  1729. & B43legacy_BFL_PACTRL) {
  1730. baseband_attenuation += 4 *
  1731. (radio_attenuation - 2);
  1732. radio_attenuation = 2;
  1733. }
  1734. } else if (radio_attenuation > 4 && txpower != 0) {
  1735. txpower = 0;
  1736. if (baseband_attenuation < 3) {
  1737. radio_attenuation -= 3;
  1738. baseband_attenuation += 2;
  1739. } else {
  1740. radio_attenuation -= 2;
  1741. baseband_attenuation -= 2;
  1742. }
  1743. }
  1744. }
  1745. /* Save the control values */
  1746. phy->txctl1 = txpower;
  1747. baseband_attenuation = clamp_val(baseband_attenuation, 0, 11);
  1748. radio_attenuation = clamp_val(radio_attenuation, 0, 9);
  1749. phy->rfatt = radio_attenuation;
  1750. phy->bbatt = baseband_attenuation;
  1751. /* Adjust the hardware */
  1752. b43legacy_phy_lock(dev);
  1753. b43legacy_radio_lock(dev);
  1754. b43legacy_radio_set_txpower_bg(dev, baseband_attenuation,
  1755. radio_attenuation, txpower);
  1756. b43legacy_phy_lo_mark_current_used(dev);
  1757. b43legacy_radio_unlock(dev);
  1758. b43legacy_phy_unlock(dev);
  1759. }
  1760. static inline
  1761. s32 b43legacy_tssi2dbm_ad(s32 num, s32 den)
  1762. {
  1763. if (num < 0)
  1764. return num/den;
  1765. else
  1766. return (num+den/2)/den;
  1767. }
  1768. static inline
  1769. s8 b43legacy_tssi2dbm_entry(s8 entry [], u8 index, s16 pab0, s16 pab1, s16 pab2)
  1770. {
  1771. s32 m1;
  1772. s32 m2;
  1773. s32 f = 256;
  1774. s32 q;
  1775. s32 delta;
  1776. s8 i = 0;
  1777. m1 = b43legacy_tssi2dbm_ad(16 * pab0 + index * pab1, 32);
  1778. m2 = max(b43legacy_tssi2dbm_ad(32768 + index * pab2, 256), 1);
  1779. do {
  1780. if (i > 15)
  1781. return -EINVAL;
  1782. q = b43legacy_tssi2dbm_ad(f * 4096 -
  1783. b43legacy_tssi2dbm_ad(m2 * f, 16) *
  1784. f, 2048);
  1785. delta = abs(q - f);
  1786. f = q;
  1787. i++;
  1788. } while (delta >= 2);
  1789. entry[index] = clamp_val(b43legacy_tssi2dbm_ad(m1 * f, 8192),
  1790. -127, 128);
  1791. return 0;
  1792. }
  1793. /* http://bcm-specs.sipsolutions.net/TSSI_to_DBM_Table */
  1794. int b43legacy_phy_init_tssi2dbm_table(struct b43legacy_wldev *dev)
  1795. {
  1796. struct b43legacy_phy *phy = &dev->phy;
  1797. s16 pab0;
  1798. s16 pab1;
  1799. s16 pab2;
  1800. u8 idx;
  1801. s8 *dyn_tssi2dbm;
  1802. B43legacy_WARN_ON(!(phy->type == B43legacy_PHYTYPE_B ||
  1803. phy->type == B43legacy_PHYTYPE_G));
  1804. pab0 = (s16)(dev->dev->bus->sprom.pa0b0);
  1805. pab1 = (s16)(dev->dev->bus->sprom.pa0b1);
  1806. pab2 = (s16)(dev->dev->bus->sprom.pa0b2);
  1807. if ((dev->dev->bus->chip_id == 0x4301) && (phy->radio_ver != 0x2050)) {
  1808. phy->idle_tssi = 0x34;
  1809. phy->tssi2dbm = b43legacy_tssi2dbm_b_table;
  1810. return 0;
  1811. }
  1812. if (pab0 != 0 && pab1 != 0 && pab2 != 0 &&
  1813. pab0 != -1 && pab1 != -1 && pab2 != -1) {
  1814. /* The pabX values are set in SPROM. Use them. */
  1815. if ((s8)dev->dev->bus->sprom.itssi_bg != 0 &&
  1816. (s8)dev->dev->bus->sprom.itssi_bg != -1)
  1817. phy->idle_tssi = (s8)(dev->dev->bus->sprom.
  1818. itssi_bg);
  1819. else
  1820. phy->idle_tssi = 62;
  1821. dyn_tssi2dbm = kmalloc(64, GFP_KERNEL);
  1822. if (dyn_tssi2dbm == NULL) {
  1823. b43legacyerr(dev->wl, "Could not allocate memory "
  1824. "for tssi2dbm table\n");
  1825. return -ENOMEM;
  1826. }
  1827. for (idx = 0; idx < 64; idx++)
  1828. if (b43legacy_tssi2dbm_entry(dyn_tssi2dbm, idx, pab0,
  1829. pab1, pab2)) {
  1830. phy->tssi2dbm = NULL;
  1831. b43legacyerr(dev->wl, "Could not generate "
  1832. "tssi2dBm table\n");
  1833. kfree(dyn_tssi2dbm);
  1834. return -ENODEV;
  1835. }
  1836. phy->tssi2dbm = dyn_tssi2dbm;
  1837. phy->dyn_tssi_tbl = 1;
  1838. } else {
  1839. /* pabX values not set in SPROM. */
  1840. switch (phy->type) {
  1841. case B43legacy_PHYTYPE_B:
  1842. phy->idle_tssi = 0x34;
  1843. phy->tssi2dbm = b43legacy_tssi2dbm_b_table;
  1844. break;
  1845. case B43legacy_PHYTYPE_G:
  1846. phy->idle_tssi = 0x34;
  1847. phy->tssi2dbm = b43legacy_tssi2dbm_g_table;
  1848. break;
  1849. }
  1850. }
  1851. return 0;
  1852. }
  1853. int b43legacy_phy_init(struct b43legacy_wldev *dev)
  1854. {
  1855. struct b43legacy_phy *phy = &dev->phy;
  1856. int err = -ENODEV;
  1857. switch (phy->type) {
  1858. case B43legacy_PHYTYPE_B:
  1859. switch (phy->rev) {
  1860. case 2:
  1861. b43legacy_phy_initb2(dev);
  1862. err = 0;
  1863. break;
  1864. case 4:
  1865. b43legacy_phy_initb4(dev);
  1866. err = 0;
  1867. break;
  1868. case 5:
  1869. b43legacy_phy_initb5(dev);
  1870. err = 0;
  1871. break;
  1872. case 6:
  1873. b43legacy_phy_initb6(dev);
  1874. err = 0;
  1875. break;
  1876. }
  1877. break;
  1878. case B43legacy_PHYTYPE_G:
  1879. b43legacy_phy_initg(dev);
  1880. err = 0;
  1881. break;
  1882. }
  1883. if (err)
  1884. b43legacyerr(dev->wl, "Unknown PHYTYPE found\n");
  1885. return err;
  1886. }
  1887. void b43legacy_phy_set_antenna_diversity(struct b43legacy_wldev *dev)
  1888. {
  1889. struct b43legacy_phy *phy = &dev->phy;
  1890. u16 antennadiv;
  1891. u16 offset;
  1892. u16 value;
  1893. u32 ucodeflags;
  1894. antennadiv = phy->antenna_diversity;
  1895. if (antennadiv == 0xFFFF)
  1896. antennadiv = 3;
  1897. B43legacy_WARN_ON(antennadiv > 3);
  1898. ucodeflags = b43legacy_shm_read32(dev, B43legacy_SHM_SHARED,
  1899. B43legacy_UCODEFLAGS_OFFSET);
  1900. b43legacy_shm_write32(dev, B43legacy_SHM_SHARED,
  1901. B43legacy_UCODEFLAGS_OFFSET,
  1902. ucodeflags & ~B43legacy_UCODEFLAG_AUTODIV);
  1903. switch (phy->type) {
  1904. case B43legacy_PHYTYPE_G:
  1905. offset = 0x0400;
  1906. if (antennadiv == 2)
  1907. value = (3/*automatic*/ << 7);
  1908. else
  1909. value = (antennadiv << 7);
  1910. b43legacy_phy_write(dev, offset + 1,
  1911. (b43legacy_phy_read(dev, offset + 1)
  1912. & 0x7E7F) | value);
  1913. if (antennadiv >= 2) {
  1914. if (antennadiv == 2)
  1915. value = (antennadiv << 7);
  1916. else
  1917. value = (0/*force0*/ << 7);
  1918. b43legacy_phy_write(dev, offset + 0x2B,
  1919. (b43legacy_phy_read(dev,
  1920. offset + 0x2B)
  1921. & 0xFEFF) | value);
  1922. }
  1923. if (phy->type == B43legacy_PHYTYPE_G) {
  1924. if (antennadiv >= 2)
  1925. b43legacy_phy_write(dev, 0x048C,
  1926. b43legacy_phy_read(dev,
  1927. 0x048C) | 0x2000);
  1928. else
  1929. b43legacy_phy_write(dev, 0x048C,
  1930. b43legacy_phy_read(dev,
  1931. 0x048C) & ~0x2000);
  1932. if (phy->rev >= 2) {
  1933. b43legacy_phy_write(dev, 0x0461,
  1934. b43legacy_phy_read(dev,
  1935. 0x0461) | 0x0010);
  1936. b43legacy_phy_write(dev, 0x04AD,
  1937. (b43legacy_phy_read(dev,
  1938. 0x04AD)
  1939. & 0x00FF) | 0x0015);
  1940. if (phy->rev == 2)
  1941. b43legacy_phy_write(dev, 0x0427,
  1942. 0x0008);
  1943. else
  1944. b43legacy_phy_write(dev, 0x0427,
  1945. (b43legacy_phy_read(dev, 0x0427)
  1946. & 0x00FF) | 0x0008);
  1947. } else if (phy->rev >= 6)
  1948. b43legacy_phy_write(dev, 0x049B, 0x00DC);
  1949. } else {
  1950. if (phy->rev < 3)
  1951. b43legacy_phy_write(dev, 0x002B,
  1952. (b43legacy_phy_read(dev,
  1953. 0x002B) & 0x00FF)
  1954. | 0x0024);
  1955. else {
  1956. b43legacy_phy_write(dev, 0x0061,
  1957. b43legacy_phy_read(dev,
  1958. 0x0061) | 0x0010);
  1959. if (phy->rev == 3) {
  1960. b43legacy_phy_write(dev, 0x0093,
  1961. 0x001D);
  1962. b43legacy_phy_write(dev, 0x0027,
  1963. 0x0008);
  1964. } else {
  1965. b43legacy_phy_write(dev, 0x0093,
  1966. 0x003A);
  1967. b43legacy_phy_write(dev, 0x0027,
  1968. (b43legacy_phy_read(dev, 0x0027)
  1969. & 0x00FF) | 0x0008);
  1970. }
  1971. }
  1972. }
  1973. break;
  1974. case B43legacy_PHYTYPE_B:
  1975. if (dev->dev->id.revision == 2)
  1976. value = (3/*automatic*/ << 7);
  1977. else
  1978. value = (antennadiv << 7);
  1979. b43legacy_phy_write(dev, 0x03E2,
  1980. (b43legacy_phy_read(dev, 0x03E2)
  1981. & 0xFE7F) | value);
  1982. break;
  1983. default:
  1984. B43legacy_WARN_ON(1);
  1985. }
  1986. if (antennadiv >= 2) {
  1987. ucodeflags = b43legacy_shm_read32(dev, B43legacy_SHM_SHARED,
  1988. B43legacy_UCODEFLAGS_OFFSET);
  1989. b43legacy_shm_write32(dev, B43legacy_SHM_SHARED,
  1990. B43legacy_UCODEFLAGS_OFFSET,
  1991. ucodeflags | B43legacy_UCODEFLAG_AUTODIV);
  1992. }
  1993. phy->antenna_diversity = antennadiv;
  1994. }
  1995. /* Set the PowerSavingControlBits.
  1996. * Bitvalues:
  1997. * 0 => unset the bit
  1998. * 1 => set the bit
  1999. * -1 => calculate the bit
  2000. */
  2001. void b43legacy_power_saving_ctl_bits(struct b43legacy_wldev *dev,
  2002. int bit25, int bit26)
  2003. {
  2004. int i;
  2005. u32 status;
  2006. /* FIXME: Force 25 to off and 26 to on for now: */
  2007. bit25 = 0;
  2008. bit26 = 1;
  2009. if (bit25 == -1) {
  2010. /* TODO: If powersave is not off and FIXME is not set and we
  2011. * are not in adhoc and thus is not an AP and we arei
  2012. * associated, set bit 25 */
  2013. }
  2014. if (bit26 == -1) {
  2015. /* TODO: If the device is awake or this is an AP, or we are
  2016. * scanning, or FIXME, or we are associated, or FIXME,
  2017. * or the latest PS-Poll packet sent was successful,
  2018. * set bit26 */
  2019. }
  2020. status = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
  2021. if (bit25)
  2022. status |= B43legacy_MACCTL_HWPS;
  2023. else
  2024. status &= ~B43legacy_MACCTL_HWPS;
  2025. if (bit26)
  2026. status |= B43legacy_MACCTL_AWAKE;
  2027. else
  2028. status &= ~B43legacy_MACCTL_AWAKE;
  2029. b43legacy_write32(dev, B43legacy_MMIO_MACCTL, status);
  2030. if (bit26 && dev->dev->id.revision >= 5) {
  2031. for (i = 0; i < 100; i++) {
  2032. if (b43legacy_shm_read32(dev, B43legacy_SHM_SHARED,
  2033. 0x0040) != 4)
  2034. break;
  2035. udelay(10);
  2036. }
  2037. }
  2038. }