vxge-main.c 119 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091929394959697989910010110210310410510610710810911011111211311411511611711811912012112212312412512612712812913013113213313413513613713813914014114214314414514614714814915015115215315415515615715815916016116216316416516616716816917017117217317417517617717817918018118218318418518618718818919019119219319419519619719819920020120220320420520620720820921021121221321421521621721821922022122222322422522622722822923023123223323423523623723823924024124224324424524624724824925025125225325425525625725825926026126226326426526626726826927027127227327427527627727827928028128228328428528628728828929029129229329429529629729829930030130230330430530630730830931031131231331431531631731831932032132232332432532632732832933033133233333433533633733833934034134234334434534634734834935035135235335435535635735835936036136236336436536636736836937037137237337437537637737837938038138238338438538638738838939039139239339439539639739839940040140240340440540640740840941041141241341441541641741841942042142242342442542642742842943043143243343443543643743843944044144244344444544644744844945045145245345445545645745845946046146246346446546646746846947047147247347447547647747847948048148248348448548648748848949049149249349449549649749849950050150250350450550650750850951051151251351451551651751851952052152252352452552652752852953053153253353453553653753853954054154254354454554654754854955055155255355455555655755855956056156256356456556656756856957057157257357457557657757857958058158258358458558658758858959059159259359459559659759859960060160260360460560660760860961061161261361461561661761861962062162262362462562662762862963063163263363463563663763863964064164264364464564664764864965065165265365465565665765865966066166266366466566666766866967067167267367467567667767867968068168268368468568668768868969069169269369469569669769869970070170270370470570670770870971071171271371471571671771871972072172272372472572672772872973073173273373473573673773873974074174274374474574674774874975075175275375475575675775875976076176276376476576676776876977077177277377477577677777877978078178278378478578678778878979079179279379479579679779879980080180280380480580680780880981081181281381481581681781881982082182282382482582682782882983083183283383483583683783883984084184284384484584684784884985085185285385485585685785885986086186286386486586686786886987087187287387487587687787887988088188288388488588688788888989089189289389489589689789889990090190290390490590690790890991091191291391491591691791891992092192292392492592692792892993093193293393493593693793893994094194294394494594694794894995095195295395495595695795895996096196296396496596696796896997097197297397497597697797897998098198298398498598698798898999099199299399499599699799899910001001100210031004100510061007100810091010101110121013101410151016101710181019102010211022102310241025102610271028102910301031103210331034103510361037103810391040104110421043104410451046104710481049105010511052105310541055105610571058105910601061106210631064106510661067106810691070107110721073107410751076107710781079108010811082108310841085108610871088108910901091109210931094109510961097109810991100110111021103110411051106110711081109111011111112111311141115111611171118111911201121112211231124112511261127112811291130113111321133113411351136113711381139114011411142114311441145114611471148114911501151115211531154115511561157115811591160116111621163116411651166116711681169117011711172117311741175117611771178117911801181118211831184118511861187118811891190119111921193119411951196119711981199120012011202120312041205120612071208120912101211121212131214121512161217121812191220122112221223122412251226122712281229123012311232123312341235123612371238123912401241124212431244124512461247124812491250125112521253125412551256125712581259126012611262126312641265126612671268126912701271127212731274127512761277127812791280128112821283128412851286128712881289129012911292129312941295129612971298129913001301130213031304130513061307130813091310131113121313131413151316131713181319132013211322132313241325132613271328132913301331133213331334133513361337133813391340134113421343134413451346134713481349135013511352135313541355135613571358135913601361136213631364136513661367136813691370137113721373137413751376137713781379138013811382138313841385138613871388138913901391139213931394139513961397139813991400140114021403140414051406140714081409141014111412141314141415141614171418141914201421142214231424142514261427142814291430143114321433143414351436143714381439144014411442144314441445144614471448144914501451145214531454145514561457145814591460146114621463146414651466146714681469147014711472147314741475147614771478147914801481148214831484148514861487148814891490149114921493149414951496149714981499150015011502150315041505150615071508150915101511151215131514151515161517151815191520152115221523152415251526152715281529153015311532153315341535153615371538153915401541154215431544154515461547154815491550155115521553155415551556155715581559156015611562156315641565156615671568156915701571157215731574157515761577157815791580158115821583158415851586158715881589159015911592159315941595159615971598159916001601160216031604160516061607160816091610161116121613161416151616161716181619162016211622162316241625162616271628162916301631163216331634163516361637163816391640164116421643164416451646164716481649165016511652165316541655165616571658165916601661166216631664166516661667166816691670167116721673167416751676167716781679168016811682168316841685168616871688168916901691169216931694169516961697169816991700170117021703170417051706170717081709171017111712171317141715171617171718171917201721172217231724172517261727172817291730173117321733173417351736173717381739174017411742174317441745174617471748174917501751175217531754175517561757175817591760176117621763176417651766176717681769177017711772177317741775177617771778177917801781178217831784178517861787178817891790179117921793179417951796179717981799180018011802180318041805180618071808180918101811181218131814181518161817181818191820182118221823182418251826182718281829183018311832183318341835183618371838183918401841184218431844184518461847184818491850185118521853185418551856185718581859186018611862186318641865186618671868186918701871187218731874187518761877187818791880188118821883188418851886188718881889189018911892189318941895189618971898189919001901190219031904190519061907190819091910191119121913191419151916191719181919192019211922192319241925192619271928192919301931193219331934193519361937193819391940194119421943194419451946194719481949195019511952195319541955195619571958195919601961196219631964196519661967196819691970197119721973197419751976197719781979198019811982198319841985198619871988198919901991199219931994199519961997199819992000200120022003200420052006200720082009201020112012201320142015201620172018201920202021202220232024202520262027202820292030203120322033203420352036203720382039204020412042204320442045204620472048204920502051205220532054205520562057205820592060206120622063206420652066206720682069207020712072207320742075207620772078207920802081208220832084208520862087208820892090209120922093209420952096209720982099210021012102210321042105210621072108210921102111211221132114211521162117211821192120212121222123212421252126212721282129213021312132213321342135213621372138213921402141214221432144214521462147214821492150215121522153215421552156215721582159216021612162216321642165216621672168216921702171217221732174217521762177217821792180218121822183218421852186218721882189219021912192219321942195219621972198219922002201220222032204220522062207220822092210221122122213221422152216221722182219222022212222222322242225222622272228222922302231223222332234223522362237223822392240224122422243224422452246224722482249225022512252225322542255225622572258225922602261226222632264226522662267226822692270227122722273227422752276227722782279228022812282228322842285228622872288228922902291229222932294229522962297229822992300230123022303230423052306230723082309231023112312231323142315231623172318231923202321232223232324232523262327232823292330233123322333233423352336233723382339234023412342234323442345234623472348234923502351235223532354235523562357235823592360236123622363236423652366236723682369237023712372237323742375237623772378237923802381238223832384238523862387238823892390239123922393239423952396239723982399240024012402240324042405240624072408240924102411241224132414241524162417241824192420242124222423242424252426242724282429243024312432243324342435243624372438243924402441244224432444244524462447244824492450245124522453245424552456245724582459246024612462246324642465246624672468246924702471247224732474247524762477247824792480248124822483248424852486248724882489249024912492249324942495249624972498249925002501250225032504250525062507250825092510251125122513251425152516251725182519252025212522252325242525252625272528252925302531253225332534253525362537253825392540254125422543254425452546254725482549255025512552255325542555255625572558255925602561256225632564256525662567256825692570257125722573257425752576257725782579258025812582258325842585258625872588258925902591259225932594259525962597259825992600260126022603260426052606260726082609261026112612261326142615261626172618261926202621262226232624262526262627262826292630263126322633263426352636263726382639264026412642264326442645264626472648264926502651265226532654265526562657265826592660266126622663266426652666266726682669267026712672267326742675267626772678267926802681268226832684268526862687268826892690269126922693269426952696269726982699270027012702270327042705270627072708270927102711271227132714271527162717271827192720272127222723272427252726272727282729273027312732273327342735273627372738273927402741274227432744274527462747274827492750275127522753275427552756275727582759276027612762276327642765276627672768276927702771277227732774277527762777277827792780278127822783278427852786278727882789279027912792279327942795279627972798279928002801280228032804280528062807280828092810281128122813281428152816281728182819282028212822282328242825282628272828282928302831283228332834283528362837283828392840284128422843284428452846284728482849285028512852285328542855285628572858285928602861286228632864286528662867286828692870287128722873287428752876287728782879288028812882288328842885288628872888288928902891289228932894289528962897289828992900290129022903290429052906290729082909291029112912291329142915291629172918291929202921292229232924292529262927292829292930293129322933293429352936293729382939294029412942294329442945294629472948294929502951295229532954295529562957295829592960296129622963296429652966296729682969297029712972297329742975297629772978297929802981298229832984298529862987298829892990299129922993299429952996299729982999300030013002300330043005300630073008300930103011301230133014301530163017301830193020302130223023302430253026302730283029303030313032303330343035303630373038303930403041304230433044304530463047304830493050305130523053305430553056305730583059306030613062306330643065306630673068306930703071307230733074307530763077307830793080308130823083308430853086308730883089309030913092309330943095309630973098309931003101310231033104310531063107310831093110311131123113311431153116311731183119312031213122312331243125312631273128312931303131313231333134313531363137313831393140314131423143314431453146314731483149315031513152315331543155315631573158315931603161316231633164316531663167316831693170317131723173317431753176317731783179318031813182318331843185318631873188318931903191319231933194319531963197319831993200320132023203320432053206320732083209321032113212321332143215321632173218321932203221322232233224322532263227322832293230323132323233323432353236323732383239324032413242324332443245324632473248324932503251325232533254325532563257325832593260326132623263326432653266326732683269327032713272327332743275327632773278327932803281328232833284328532863287328832893290329132923293329432953296329732983299330033013302330333043305330633073308330933103311331233133314331533163317331833193320332133223323332433253326332733283329333033313332333333343335333633373338333933403341334233433344334533463347334833493350335133523353335433553356335733583359336033613362336333643365336633673368336933703371337233733374337533763377337833793380338133823383338433853386338733883389339033913392339333943395339633973398339934003401340234033404340534063407340834093410341134123413341434153416341734183419342034213422342334243425342634273428342934303431343234333434343534363437343834393440344134423443344434453446344734483449345034513452345334543455345634573458345934603461346234633464346534663467346834693470347134723473347434753476347734783479348034813482348334843485348634873488348934903491349234933494349534963497349834993500350135023503350435053506350735083509351035113512351335143515351635173518351935203521352235233524352535263527352835293530353135323533353435353536353735383539354035413542354335443545354635473548354935503551355235533554355535563557355835593560356135623563356435653566356735683569357035713572357335743575357635773578357935803581358235833584358535863587358835893590359135923593359435953596359735983599360036013602360336043605360636073608360936103611361236133614361536163617361836193620362136223623362436253626362736283629363036313632363336343635363636373638363936403641364236433644364536463647364836493650365136523653365436553656365736583659366036613662366336643665366636673668366936703671367236733674367536763677367836793680368136823683368436853686368736883689369036913692369336943695369636973698369937003701370237033704370537063707370837093710371137123713371437153716371737183719372037213722372337243725372637273728372937303731373237333734373537363737373837393740374137423743374437453746374737483749375037513752375337543755375637573758375937603761376237633764376537663767376837693770377137723773377437753776377737783779378037813782378337843785378637873788378937903791379237933794379537963797379837993800380138023803380438053806380738083809381038113812381338143815381638173818381938203821382238233824382538263827382838293830383138323833383438353836383738383839384038413842384338443845384638473848384938503851385238533854385538563857385838593860386138623863386438653866386738683869387038713872387338743875387638773878387938803881388238833884388538863887388838893890389138923893389438953896389738983899390039013902390339043905390639073908390939103911391239133914391539163917391839193920392139223923392439253926392739283929393039313932393339343935393639373938393939403941394239433944394539463947394839493950395139523953395439553956395739583959396039613962396339643965396639673968396939703971397239733974397539763977397839793980398139823983398439853986398739883989399039913992399339943995399639973998399940004001400240034004400540064007400840094010401140124013401440154016401740184019402040214022402340244025402640274028402940304031403240334034403540364037403840394040404140424043404440454046404740484049405040514052405340544055405640574058405940604061406240634064406540664067406840694070407140724073407440754076407740784079408040814082408340844085408640874088408940904091409240934094409540964097409840994100410141024103410441054106410741084109411041114112411341144115411641174118411941204121412241234124412541264127412841294130413141324133413441354136413741384139414041414142414341444145414641474148414941504151415241534154415541564157415841594160416141624163416441654166416741684169417041714172417341744175417641774178417941804181418241834184418541864187418841894190419141924193419441954196419741984199420042014202420342044205420642074208420942104211421242134214421542164217421842194220422142224223422442254226422742284229423042314232423342344235423642374238423942404241424242434244424542464247424842494250425142524253425442554256425742584259426042614262426342644265426642674268426942704271427242734274427542764277427842794280428142824283428442854286428742884289429042914292429342944295429642974298429943004301430243034304430543064307430843094310431143124313431443154316431743184319432043214322432343244325432643274328432943304331433243334334433543364337433843394340434143424343434443454346434743484349435043514352435343544355435643574358435943604361436243634364436543664367436843694370437143724373437443754376437743784379438043814382438343844385438643874388438943904391439243934394439543964397439843994400440144024403440444054406440744084409441044114412441344144415441644174418441944204421442244234424442544264427442844294430443144324433443444354436443744384439444044414442444344444445444644474448444944504451445244534454445544564457445844594460446144624463446444654466446744684469447044714472447344744475447644774478447944804481448244834484448544864487448844894490449144924493449444954496449744984499450045014502450345044505450645074508450945104511451245134514451545164517451845194520452145224523452445254526452745284529453045314532453345344535453645374538453945404541
  1. /******************************************************************************
  2. * This software may be used and distributed according to the terms of
  3. * the GNU General Public License (GPL), incorporated herein by reference.
  4. * Drivers based on or derived from this code fall under the GPL and must
  5. * retain the authorship, copyright and license notice. This file is not
  6. * a complete program and may only be used when the entire operating
  7. * system is licensed under the GPL.
  8. * See the file COPYING in this distribution for more information.
  9. *
  10. * vxge-main.c: Driver for Neterion Inc's X3100 Series 10GbE PCIe I/O
  11. * Virtualized Server Adapter.
  12. * Copyright(c) 2002-2009 Neterion Inc.
  13. *
  14. * The module loadable parameters that are supported by the driver and a brief
  15. * explanation of all the variables:
  16. * vlan_tag_strip:
  17. * Strip VLAN Tag enable/disable. Instructs the device to remove
  18. * the VLAN tag from all received tagged frames that are not
  19. * replicated at the internal L2 switch.
  20. * 0 - Do not strip the VLAN tag.
  21. * 1 - Strip the VLAN tag.
  22. *
  23. * addr_learn_en:
  24. * Enable learning the mac address of the guest OS interface in
  25. * a virtualization environment.
  26. * 0 - DISABLE
  27. * 1 - ENABLE
  28. *
  29. * max_config_port:
  30. * Maximum number of port to be supported.
  31. * MIN -1 and MAX - 2
  32. *
  33. * max_config_vpath:
  34. * This configures the maximum no of VPATH configures for each
  35. * device function.
  36. * MIN - 1 and MAX - 17
  37. *
  38. * max_config_dev:
  39. * This configures maximum no of Device function to be enabled.
  40. * MIN - 1 and MAX - 17
  41. *
  42. ******************************************************************************/
  43. #include <linux/if_vlan.h>
  44. #include <linux/pci.h>
  45. #include <linux/tcp.h>
  46. #include <net/ip.h>
  47. #include <linux/netdevice.h>
  48. #include <linux/etherdevice.h>
  49. #include "vxge-main.h"
  50. #include "vxge-reg.h"
  51. MODULE_LICENSE("Dual BSD/GPL");
  52. MODULE_DESCRIPTION("Neterion's X3100 Series 10GbE PCIe I/O"
  53. "Virtualized Server Adapter");
  54. static struct pci_device_id vxge_id_table[] __devinitdata = {
  55. {PCI_VENDOR_ID_S2IO, PCI_DEVICE_ID_TITAN_WIN, PCI_ANY_ID,
  56. PCI_ANY_ID},
  57. {PCI_VENDOR_ID_S2IO, PCI_DEVICE_ID_TITAN_UNI, PCI_ANY_ID,
  58. PCI_ANY_ID},
  59. {0}
  60. };
  61. MODULE_DEVICE_TABLE(pci, vxge_id_table);
  62. VXGE_MODULE_PARAM_INT(vlan_tag_strip, VXGE_HW_VPATH_RPA_STRIP_VLAN_TAG_ENABLE);
  63. VXGE_MODULE_PARAM_INT(addr_learn_en, VXGE_HW_MAC_ADDR_LEARN_DEFAULT);
  64. VXGE_MODULE_PARAM_INT(max_config_port, VXGE_MAX_CONFIG_PORT);
  65. VXGE_MODULE_PARAM_INT(max_config_vpath, VXGE_USE_DEFAULT);
  66. VXGE_MODULE_PARAM_INT(max_mac_vpath, VXGE_MAX_MAC_ADDR_COUNT);
  67. VXGE_MODULE_PARAM_INT(max_config_dev, VXGE_MAX_CONFIG_DEV);
  68. static u16 vpath_selector[VXGE_HW_MAX_VIRTUAL_PATHS] =
  69. {0, 1, 3, 3, 7, 7, 7, 7, 15, 15, 15, 15, 15, 15, 15, 15, 31};
  70. static unsigned int bw_percentage[VXGE_HW_MAX_VIRTUAL_PATHS] =
  71. {[0 ...(VXGE_HW_MAX_VIRTUAL_PATHS - 1)] = 0xFF};
  72. module_param_array(bw_percentage, uint, NULL, 0);
  73. static struct vxge_drv_config *driver_config;
  74. static inline int is_vxge_card_up(struct vxgedev *vdev)
  75. {
  76. return test_bit(__VXGE_STATE_CARD_UP, &vdev->state);
  77. }
  78. static inline void VXGE_COMPLETE_VPATH_TX(struct vxge_fifo *fifo)
  79. {
  80. unsigned long flags = 0;
  81. struct sk_buff **skb_ptr = NULL;
  82. struct sk_buff **temp;
  83. #define NR_SKB_COMPLETED 128
  84. struct sk_buff *completed[NR_SKB_COMPLETED];
  85. int more;
  86. do {
  87. more = 0;
  88. skb_ptr = completed;
  89. if (spin_trylock_irqsave(&fifo->tx_lock, flags)) {
  90. vxge_hw_vpath_poll_tx(fifo->handle, &skb_ptr,
  91. NR_SKB_COMPLETED, &more);
  92. spin_unlock_irqrestore(&fifo->tx_lock, flags);
  93. }
  94. /* free SKBs */
  95. for (temp = completed; temp != skb_ptr; temp++)
  96. dev_kfree_skb_irq(*temp);
  97. } while (more) ;
  98. }
  99. static inline void VXGE_COMPLETE_ALL_TX(struct vxgedev *vdev)
  100. {
  101. int i;
  102. /* Complete all transmits */
  103. for (i = 0; i < vdev->no_of_vpath; i++)
  104. VXGE_COMPLETE_VPATH_TX(&vdev->vpaths[i].fifo);
  105. }
  106. static inline void VXGE_COMPLETE_ALL_RX(struct vxgedev *vdev)
  107. {
  108. int i;
  109. struct vxge_ring *ring;
  110. /* Complete all receives*/
  111. for (i = 0; i < vdev->no_of_vpath; i++) {
  112. ring = &vdev->vpaths[i].ring;
  113. vxge_hw_vpath_poll_rx(ring->handle);
  114. }
  115. }
  116. /*
  117. * MultiQ manipulation helper functions
  118. */
  119. void vxge_stop_all_tx_queue(struct vxgedev *vdev)
  120. {
  121. int i;
  122. struct net_device *dev = vdev->ndev;
  123. if (vdev->config.tx_steering_type != TX_MULTIQ_STEERING) {
  124. for (i = 0; i < vdev->no_of_vpath; i++)
  125. vdev->vpaths[i].fifo.queue_state = VPATH_QUEUE_STOP;
  126. }
  127. netif_tx_stop_all_queues(dev);
  128. }
  129. void vxge_stop_tx_queue(struct vxge_fifo *fifo)
  130. {
  131. struct net_device *dev = fifo->ndev;
  132. struct netdev_queue *txq = NULL;
  133. if (fifo->tx_steering_type == TX_MULTIQ_STEERING)
  134. txq = netdev_get_tx_queue(dev, fifo->driver_id);
  135. else {
  136. txq = netdev_get_tx_queue(dev, 0);
  137. fifo->queue_state = VPATH_QUEUE_STOP;
  138. }
  139. netif_tx_stop_queue(txq);
  140. }
  141. void vxge_start_all_tx_queue(struct vxgedev *vdev)
  142. {
  143. int i;
  144. struct net_device *dev = vdev->ndev;
  145. if (vdev->config.tx_steering_type != TX_MULTIQ_STEERING) {
  146. for (i = 0; i < vdev->no_of_vpath; i++)
  147. vdev->vpaths[i].fifo.queue_state = VPATH_QUEUE_START;
  148. }
  149. netif_tx_start_all_queues(dev);
  150. }
  151. static void vxge_wake_all_tx_queue(struct vxgedev *vdev)
  152. {
  153. int i;
  154. struct net_device *dev = vdev->ndev;
  155. if (vdev->config.tx_steering_type != TX_MULTIQ_STEERING) {
  156. for (i = 0; i < vdev->no_of_vpath; i++)
  157. vdev->vpaths[i].fifo.queue_state = VPATH_QUEUE_START;
  158. }
  159. netif_tx_wake_all_queues(dev);
  160. }
  161. void vxge_wake_tx_queue(struct vxge_fifo *fifo, struct sk_buff *skb)
  162. {
  163. struct net_device *dev = fifo->ndev;
  164. int vpath_no = fifo->driver_id;
  165. struct netdev_queue *txq = NULL;
  166. if (fifo->tx_steering_type == TX_MULTIQ_STEERING) {
  167. txq = netdev_get_tx_queue(dev, vpath_no);
  168. if (netif_tx_queue_stopped(txq))
  169. netif_tx_wake_queue(txq);
  170. } else {
  171. txq = netdev_get_tx_queue(dev, 0);
  172. if (fifo->queue_state == VPATH_QUEUE_STOP)
  173. if (netif_tx_queue_stopped(txq)) {
  174. fifo->queue_state = VPATH_QUEUE_START;
  175. netif_tx_wake_queue(txq);
  176. }
  177. }
  178. }
  179. /*
  180. * vxge_callback_link_up
  181. *
  182. * This function is called during interrupt context to notify link up state
  183. * change.
  184. */
  185. void
  186. vxge_callback_link_up(struct __vxge_hw_device *hldev)
  187. {
  188. struct net_device *dev = hldev->ndev;
  189. struct vxgedev *vdev = (struct vxgedev *)netdev_priv(dev);
  190. vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d",
  191. vdev->ndev->name, __func__, __LINE__);
  192. printk(KERN_NOTICE "%s: Link Up\n", vdev->ndev->name);
  193. vdev->stats.link_up++;
  194. netif_carrier_on(vdev->ndev);
  195. vxge_wake_all_tx_queue(vdev);
  196. vxge_debug_entryexit(VXGE_TRACE,
  197. "%s: %s:%d Exiting...", vdev->ndev->name, __func__, __LINE__);
  198. }
  199. /*
  200. * vxge_callback_link_down
  201. *
  202. * This function is called during interrupt context to notify link down state
  203. * change.
  204. */
  205. void
  206. vxge_callback_link_down(struct __vxge_hw_device *hldev)
  207. {
  208. struct net_device *dev = hldev->ndev;
  209. struct vxgedev *vdev = (struct vxgedev *)netdev_priv(dev);
  210. vxge_debug_entryexit(VXGE_TRACE,
  211. "%s: %s:%d", vdev->ndev->name, __func__, __LINE__);
  212. printk(KERN_NOTICE "%s: Link Down\n", vdev->ndev->name);
  213. vdev->stats.link_down++;
  214. netif_carrier_off(vdev->ndev);
  215. vxge_stop_all_tx_queue(vdev);
  216. vxge_debug_entryexit(VXGE_TRACE,
  217. "%s: %s:%d Exiting...", vdev->ndev->name, __func__, __LINE__);
  218. }
  219. /*
  220. * vxge_rx_alloc
  221. *
  222. * Allocate SKB.
  223. */
  224. static struct sk_buff*
  225. vxge_rx_alloc(void *dtrh, struct vxge_ring *ring, const int skb_size)
  226. {
  227. struct net_device *dev;
  228. struct sk_buff *skb;
  229. struct vxge_rx_priv *rx_priv;
  230. dev = ring->ndev;
  231. vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d",
  232. ring->ndev->name, __func__, __LINE__);
  233. rx_priv = vxge_hw_ring_rxd_private_get(dtrh);
  234. /* try to allocate skb first. this one may fail */
  235. skb = netdev_alloc_skb(dev, skb_size +
  236. VXGE_HW_HEADER_ETHERNET_II_802_3_ALIGN);
  237. if (skb == NULL) {
  238. vxge_debug_mem(VXGE_ERR,
  239. "%s: out of memory to allocate SKB", dev->name);
  240. ring->stats.skb_alloc_fail++;
  241. return NULL;
  242. }
  243. vxge_debug_mem(VXGE_TRACE,
  244. "%s: %s:%d Skb : 0x%p", ring->ndev->name,
  245. __func__, __LINE__, skb);
  246. skb_reserve(skb, VXGE_HW_HEADER_ETHERNET_II_802_3_ALIGN);
  247. rx_priv->skb = skb;
  248. rx_priv->skb_data = NULL;
  249. rx_priv->data_size = skb_size;
  250. vxge_debug_entryexit(VXGE_TRACE,
  251. "%s: %s:%d Exiting...", ring->ndev->name, __func__, __LINE__);
  252. return skb;
  253. }
  254. /*
  255. * vxge_rx_map
  256. */
  257. static int vxge_rx_map(void *dtrh, struct vxge_ring *ring)
  258. {
  259. struct vxge_rx_priv *rx_priv;
  260. dma_addr_t dma_addr;
  261. vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d",
  262. ring->ndev->name, __func__, __LINE__);
  263. rx_priv = vxge_hw_ring_rxd_private_get(dtrh);
  264. rx_priv->skb_data = rx_priv->skb->data;
  265. dma_addr = pci_map_single(ring->pdev, rx_priv->skb_data,
  266. rx_priv->data_size, PCI_DMA_FROMDEVICE);
  267. if (dma_addr == 0) {
  268. ring->stats.pci_map_fail++;
  269. return -EIO;
  270. }
  271. vxge_debug_mem(VXGE_TRACE,
  272. "%s: %s:%d 1 buffer mode dma_addr = 0x%llx",
  273. ring->ndev->name, __func__, __LINE__,
  274. (unsigned long long)dma_addr);
  275. vxge_hw_ring_rxd_1b_set(dtrh, dma_addr, rx_priv->data_size);
  276. rx_priv->data_dma = dma_addr;
  277. vxge_debug_entryexit(VXGE_TRACE,
  278. "%s: %s:%d Exiting...", ring->ndev->name, __func__, __LINE__);
  279. return 0;
  280. }
  281. /*
  282. * vxge_rx_initial_replenish
  283. * Allocation of RxD as an initial replenish procedure.
  284. */
  285. static enum vxge_hw_status
  286. vxge_rx_initial_replenish(void *dtrh, void *userdata)
  287. {
  288. struct vxge_ring *ring = (struct vxge_ring *)userdata;
  289. struct vxge_rx_priv *rx_priv;
  290. vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d",
  291. ring->ndev->name, __func__, __LINE__);
  292. if (vxge_rx_alloc(dtrh, ring,
  293. VXGE_LL_MAX_FRAME_SIZE(ring->ndev)) == NULL)
  294. return VXGE_HW_FAIL;
  295. if (vxge_rx_map(dtrh, ring)) {
  296. rx_priv = vxge_hw_ring_rxd_private_get(dtrh);
  297. dev_kfree_skb(rx_priv->skb);
  298. return VXGE_HW_FAIL;
  299. }
  300. vxge_debug_entryexit(VXGE_TRACE,
  301. "%s: %s:%d Exiting...", ring->ndev->name, __func__, __LINE__);
  302. return VXGE_HW_OK;
  303. }
  304. static inline void
  305. vxge_rx_complete(struct vxge_ring *ring, struct sk_buff *skb, u16 vlan,
  306. int pkt_length, struct vxge_hw_ring_rxd_info *ext_info)
  307. {
  308. vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d",
  309. ring->ndev->name, __func__, __LINE__);
  310. skb_record_rx_queue(skb, ring->driver_id);
  311. skb->protocol = eth_type_trans(skb, ring->ndev);
  312. ring->stats.rx_frms++;
  313. ring->stats.rx_bytes += pkt_length;
  314. if (skb->pkt_type == PACKET_MULTICAST)
  315. ring->stats.rx_mcast++;
  316. vxge_debug_rx(VXGE_TRACE,
  317. "%s: %s:%d skb protocol = %d",
  318. ring->ndev->name, __func__, __LINE__, skb->protocol);
  319. if (ring->gro_enable) {
  320. if (ring->vlgrp && ext_info->vlan &&
  321. (ring->vlan_tag_strip ==
  322. VXGE_HW_VPATH_RPA_STRIP_VLAN_TAG_ENABLE))
  323. vlan_gro_receive(ring->napi_p, ring->vlgrp,
  324. ext_info->vlan, skb);
  325. else
  326. napi_gro_receive(ring->napi_p, skb);
  327. } else {
  328. if (ring->vlgrp && vlan &&
  329. (ring->vlan_tag_strip ==
  330. VXGE_HW_VPATH_RPA_STRIP_VLAN_TAG_ENABLE))
  331. vlan_hwaccel_receive_skb(skb, ring->vlgrp, vlan);
  332. else
  333. netif_receive_skb(skb);
  334. }
  335. vxge_debug_entryexit(VXGE_TRACE,
  336. "%s: %s:%d Exiting...", ring->ndev->name, __func__, __LINE__);
  337. }
  338. static inline void vxge_re_pre_post(void *dtr, struct vxge_ring *ring,
  339. struct vxge_rx_priv *rx_priv)
  340. {
  341. pci_dma_sync_single_for_device(ring->pdev,
  342. rx_priv->data_dma, rx_priv->data_size, PCI_DMA_FROMDEVICE);
  343. vxge_hw_ring_rxd_1b_set(dtr, rx_priv->data_dma, rx_priv->data_size);
  344. vxge_hw_ring_rxd_pre_post(ring->handle, dtr);
  345. }
  346. static inline void vxge_post(int *dtr_cnt, void **first_dtr,
  347. void *post_dtr, struct __vxge_hw_ring *ringh)
  348. {
  349. int dtr_count = *dtr_cnt;
  350. if ((*dtr_cnt % VXGE_HW_RXSYNC_FREQ_CNT) == 0) {
  351. if (*first_dtr)
  352. vxge_hw_ring_rxd_post_post_wmb(ringh, *first_dtr);
  353. *first_dtr = post_dtr;
  354. } else
  355. vxge_hw_ring_rxd_post_post(ringh, post_dtr);
  356. dtr_count++;
  357. *dtr_cnt = dtr_count;
  358. }
  359. /*
  360. * vxge_rx_1b_compl
  361. *
  362. * If the interrupt is because of a received frame or if the receive ring
  363. * contains fresh as yet un-processed frames, this function is called.
  364. */
  365. enum vxge_hw_status
  366. vxge_rx_1b_compl(struct __vxge_hw_ring *ringh, void *dtr,
  367. u8 t_code, void *userdata)
  368. {
  369. struct vxge_ring *ring = (struct vxge_ring *)userdata;
  370. struct net_device *dev = ring->ndev;
  371. unsigned int dma_sizes;
  372. void *first_dtr = NULL;
  373. int dtr_cnt = 0;
  374. int data_size;
  375. dma_addr_t data_dma;
  376. int pkt_length;
  377. struct sk_buff *skb;
  378. struct vxge_rx_priv *rx_priv;
  379. struct vxge_hw_ring_rxd_info ext_info;
  380. vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d",
  381. ring->ndev->name, __func__, __LINE__);
  382. ring->pkts_processed = 0;
  383. vxge_hw_ring_replenish(ringh, 0);
  384. do {
  385. prefetch((char *)dtr + L1_CACHE_BYTES);
  386. rx_priv = vxge_hw_ring_rxd_private_get(dtr);
  387. skb = rx_priv->skb;
  388. data_size = rx_priv->data_size;
  389. data_dma = rx_priv->data_dma;
  390. prefetch(rx_priv->skb_data);
  391. vxge_debug_rx(VXGE_TRACE,
  392. "%s: %s:%d skb = 0x%p",
  393. ring->ndev->name, __func__, __LINE__, skb);
  394. vxge_hw_ring_rxd_1b_get(ringh, dtr, &dma_sizes);
  395. pkt_length = dma_sizes;
  396. pkt_length -= ETH_FCS_LEN;
  397. vxge_debug_rx(VXGE_TRACE,
  398. "%s: %s:%d Packet Length = %d",
  399. ring->ndev->name, __func__, __LINE__, pkt_length);
  400. vxge_hw_ring_rxd_1b_info_get(ringh, dtr, &ext_info);
  401. /* check skb validity */
  402. vxge_assert(skb);
  403. prefetch((char *)skb + L1_CACHE_BYTES);
  404. if (unlikely(t_code)) {
  405. if (vxge_hw_ring_handle_tcode(ringh, dtr, t_code) !=
  406. VXGE_HW_OK) {
  407. ring->stats.rx_errors++;
  408. vxge_debug_rx(VXGE_TRACE,
  409. "%s: %s :%d Rx T_code is %d",
  410. ring->ndev->name, __func__,
  411. __LINE__, t_code);
  412. /* If the t_code is not supported and if the
  413. * t_code is other than 0x5 (unparseable packet
  414. * such as unknown UPV6 header), Drop it !!!
  415. */
  416. vxge_re_pre_post(dtr, ring, rx_priv);
  417. vxge_post(&dtr_cnt, &first_dtr, dtr, ringh);
  418. ring->stats.rx_dropped++;
  419. continue;
  420. }
  421. }
  422. if (pkt_length > VXGE_LL_RX_COPY_THRESHOLD) {
  423. if (vxge_rx_alloc(dtr, ring, data_size) != NULL) {
  424. if (!vxge_rx_map(dtr, ring)) {
  425. skb_put(skb, pkt_length);
  426. pci_unmap_single(ring->pdev, data_dma,
  427. data_size, PCI_DMA_FROMDEVICE);
  428. vxge_hw_ring_rxd_pre_post(ringh, dtr);
  429. vxge_post(&dtr_cnt, &first_dtr, dtr,
  430. ringh);
  431. } else {
  432. dev_kfree_skb(rx_priv->skb);
  433. rx_priv->skb = skb;
  434. rx_priv->data_size = data_size;
  435. vxge_re_pre_post(dtr, ring, rx_priv);
  436. vxge_post(&dtr_cnt, &first_dtr, dtr,
  437. ringh);
  438. ring->stats.rx_dropped++;
  439. break;
  440. }
  441. } else {
  442. vxge_re_pre_post(dtr, ring, rx_priv);
  443. vxge_post(&dtr_cnt, &first_dtr, dtr, ringh);
  444. ring->stats.rx_dropped++;
  445. break;
  446. }
  447. } else {
  448. struct sk_buff *skb_up;
  449. skb_up = netdev_alloc_skb(dev, pkt_length +
  450. VXGE_HW_HEADER_ETHERNET_II_802_3_ALIGN);
  451. if (skb_up != NULL) {
  452. skb_reserve(skb_up,
  453. VXGE_HW_HEADER_ETHERNET_II_802_3_ALIGN);
  454. pci_dma_sync_single_for_cpu(ring->pdev,
  455. data_dma, data_size,
  456. PCI_DMA_FROMDEVICE);
  457. vxge_debug_mem(VXGE_TRACE,
  458. "%s: %s:%d skb_up = %p",
  459. ring->ndev->name, __func__,
  460. __LINE__, skb);
  461. memcpy(skb_up->data, skb->data, pkt_length);
  462. vxge_re_pre_post(dtr, ring, rx_priv);
  463. vxge_post(&dtr_cnt, &first_dtr, dtr,
  464. ringh);
  465. /* will netif_rx small SKB instead */
  466. skb = skb_up;
  467. skb_put(skb, pkt_length);
  468. } else {
  469. vxge_re_pre_post(dtr, ring, rx_priv);
  470. vxge_post(&dtr_cnt, &first_dtr, dtr, ringh);
  471. vxge_debug_rx(VXGE_ERR,
  472. "%s: vxge_rx_1b_compl: out of "
  473. "memory", dev->name);
  474. ring->stats.skb_alloc_fail++;
  475. break;
  476. }
  477. }
  478. if ((ext_info.proto & VXGE_HW_FRAME_PROTO_TCP_OR_UDP) &&
  479. !(ext_info.proto & VXGE_HW_FRAME_PROTO_IP_FRAG) &&
  480. ring->rx_csum && /* Offload Rx side CSUM */
  481. ext_info.l3_cksum == VXGE_HW_L3_CKSUM_OK &&
  482. ext_info.l4_cksum == VXGE_HW_L4_CKSUM_OK)
  483. skb->ip_summed = CHECKSUM_UNNECESSARY;
  484. else
  485. skb->ip_summed = CHECKSUM_NONE;
  486. vxge_rx_complete(ring, skb, ext_info.vlan,
  487. pkt_length, &ext_info);
  488. ring->budget--;
  489. ring->pkts_processed++;
  490. if (!ring->budget)
  491. break;
  492. } while (vxge_hw_ring_rxd_next_completed(ringh, &dtr,
  493. &t_code) == VXGE_HW_OK);
  494. if (first_dtr)
  495. vxge_hw_ring_rxd_post_post_wmb(ringh, first_dtr);
  496. vxge_debug_entryexit(VXGE_TRACE,
  497. "%s:%d Exiting...",
  498. __func__, __LINE__);
  499. return VXGE_HW_OK;
  500. }
  501. /*
  502. * vxge_xmit_compl
  503. *
  504. * If an interrupt was raised to indicate DMA complete of the Tx packet,
  505. * this function is called. It identifies the last TxD whose buffer was
  506. * freed and frees all skbs whose data have already DMA'ed into the NICs
  507. * internal memory.
  508. */
  509. enum vxge_hw_status
  510. vxge_xmit_compl(struct __vxge_hw_fifo *fifo_hw, void *dtr,
  511. enum vxge_hw_fifo_tcode t_code, void *userdata,
  512. struct sk_buff ***skb_ptr, int nr_skb, int *more)
  513. {
  514. struct vxge_fifo *fifo = (struct vxge_fifo *)userdata;
  515. struct sk_buff *skb, **done_skb = *skb_ptr;
  516. int pkt_cnt = 0;
  517. vxge_debug_entryexit(VXGE_TRACE,
  518. "%s:%d Entered....", __func__, __LINE__);
  519. do {
  520. int frg_cnt;
  521. skb_frag_t *frag;
  522. int i = 0, j;
  523. struct vxge_tx_priv *txd_priv =
  524. vxge_hw_fifo_txdl_private_get(dtr);
  525. skb = txd_priv->skb;
  526. frg_cnt = skb_shinfo(skb)->nr_frags;
  527. frag = &skb_shinfo(skb)->frags[0];
  528. vxge_debug_tx(VXGE_TRACE,
  529. "%s: %s:%d fifo_hw = %p dtr = %p "
  530. "tcode = 0x%x", fifo->ndev->name, __func__,
  531. __LINE__, fifo_hw, dtr, t_code);
  532. /* check skb validity */
  533. vxge_assert(skb);
  534. vxge_debug_tx(VXGE_TRACE,
  535. "%s: %s:%d skb = %p itxd_priv = %p frg_cnt = %d",
  536. fifo->ndev->name, __func__, __LINE__,
  537. skb, txd_priv, frg_cnt);
  538. if (unlikely(t_code)) {
  539. fifo->stats.tx_errors++;
  540. vxge_debug_tx(VXGE_ERR,
  541. "%s: tx: dtr %p completed due to "
  542. "error t_code %01x", fifo->ndev->name,
  543. dtr, t_code);
  544. vxge_hw_fifo_handle_tcode(fifo_hw, dtr, t_code);
  545. }
  546. /* for unfragmented skb */
  547. pci_unmap_single(fifo->pdev, txd_priv->dma_buffers[i++],
  548. skb_headlen(skb), PCI_DMA_TODEVICE);
  549. for (j = 0; j < frg_cnt; j++) {
  550. pci_unmap_page(fifo->pdev,
  551. txd_priv->dma_buffers[i++],
  552. frag->size, PCI_DMA_TODEVICE);
  553. frag += 1;
  554. }
  555. vxge_hw_fifo_txdl_free(fifo_hw, dtr);
  556. /* Updating the statistics block */
  557. fifo->stats.tx_frms++;
  558. fifo->stats.tx_bytes += skb->len;
  559. *done_skb++ = skb;
  560. if (--nr_skb <= 0) {
  561. *more = 1;
  562. break;
  563. }
  564. pkt_cnt++;
  565. if (pkt_cnt > fifo->indicate_max_pkts)
  566. break;
  567. } while (vxge_hw_fifo_txdl_next_completed(fifo_hw,
  568. &dtr, &t_code) == VXGE_HW_OK);
  569. *skb_ptr = done_skb;
  570. vxge_wake_tx_queue(fifo, skb);
  571. vxge_debug_entryexit(VXGE_TRACE,
  572. "%s: %s:%d Exiting...",
  573. fifo->ndev->name, __func__, __LINE__);
  574. return VXGE_HW_OK;
  575. }
  576. /* select a vpath to transmit the packet */
  577. static u32 vxge_get_vpath_no(struct vxgedev *vdev, struct sk_buff *skb,
  578. int *do_lock)
  579. {
  580. u16 queue_len, counter = 0;
  581. if (skb->protocol == htons(ETH_P_IP)) {
  582. struct iphdr *ip;
  583. struct tcphdr *th;
  584. ip = ip_hdr(skb);
  585. if ((ip->frag_off & htons(IP_OFFSET|IP_MF)) == 0) {
  586. th = (struct tcphdr *)(((unsigned char *)ip) +
  587. ip->ihl*4);
  588. queue_len = vdev->no_of_vpath;
  589. counter = (ntohs(th->source) +
  590. ntohs(th->dest)) &
  591. vdev->vpath_selector[queue_len - 1];
  592. if (counter >= queue_len)
  593. counter = queue_len - 1;
  594. if (ip->protocol == IPPROTO_UDP) {
  595. #ifdef NETIF_F_LLTX
  596. *do_lock = 0;
  597. #endif
  598. }
  599. }
  600. }
  601. return counter;
  602. }
  603. static enum vxge_hw_status vxge_search_mac_addr_in_list(
  604. struct vxge_vpath *vpath, u64 del_mac)
  605. {
  606. struct list_head *entry, *next;
  607. list_for_each_safe(entry, next, &vpath->mac_addr_list) {
  608. if (((struct vxge_mac_addrs *)entry)->macaddr == del_mac)
  609. return TRUE;
  610. }
  611. return FALSE;
  612. }
  613. static int vxge_learn_mac(struct vxgedev *vdev, u8 *mac_header)
  614. {
  615. struct macInfo mac_info;
  616. u8 *mac_address = NULL;
  617. u64 mac_addr = 0, vpath_vector = 0;
  618. int vpath_idx = 0;
  619. enum vxge_hw_status status = VXGE_HW_OK;
  620. struct vxge_vpath *vpath = NULL;
  621. struct __vxge_hw_device *hldev;
  622. hldev = (struct __vxge_hw_device *) pci_get_drvdata(vdev->pdev);
  623. mac_address = (u8 *)&mac_addr;
  624. memcpy(mac_address, mac_header, ETH_ALEN);
  625. /* Is this mac address already in the list? */
  626. for (vpath_idx = 0; vpath_idx < vdev->no_of_vpath; vpath_idx++) {
  627. vpath = &vdev->vpaths[vpath_idx];
  628. if (vxge_search_mac_addr_in_list(vpath, mac_addr))
  629. return vpath_idx;
  630. }
  631. memset(&mac_info, 0, sizeof(struct macInfo));
  632. memcpy(mac_info.macaddr, mac_header, ETH_ALEN);
  633. /* Any vpath has room to add mac address to its da table? */
  634. for (vpath_idx = 0; vpath_idx < vdev->no_of_vpath; vpath_idx++) {
  635. vpath = &vdev->vpaths[vpath_idx];
  636. if (vpath->mac_addr_cnt < vpath->max_mac_addr_cnt) {
  637. /* Add this mac address to this vpath */
  638. mac_info.vpath_no = vpath_idx;
  639. mac_info.state = VXGE_LL_MAC_ADDR_IN_DA_TABLE;
  640. status = vxge_add_mac_addr(vdev, &mac_info);
  641. if (status != VXGE_HW_OK)
  642. return -EPERM;
  643. return vpath_idx;
  644. }
  645. }
  646. mac_info.state = VXGE_LL_MAC_ADDR_IN_LIST;
  647. vpath_idx = 0;
  648. mac_info.vpath_no = vpath_idx;
  649. /* Is the first vpath already selected as catch-basin ? */
  650. vpath = &vdev->vpaths[vpath_idx];
  651. if (vpath->mac_addr_cnt > vpath->max_mac_addr_cnt) {
  652. /* Add this mac address to this vpath */
  653. if (FALSE == vxge_mac_list_add(vpath, &mac_info))
  654. return -EPERM;
  655. return vpath_idx;
  656. }
  657. /* Select first vpath as catch-basin */
  658. vpath_vector = vxge_mBIT(vpath->device_id);
  659. status = vxge_hw_mgmt_reg_write(vpath->vdev->devh,
  660. vxge_hw_mgmt_reg_type_mrpcim,
  661. 0,
  662. (ulong)offsetof(
  663. struct vxge_hw_mrpcim_reg,
  664. rts_mgr_cbasin_cfg),
  665. vpath_vector);
  666. if (status != VXGE_HW_OK) {
  667. vxge_debug_tx(VXGE_ERR,
  668. "%s: Unable to set the vpath-%d in catch-basin mode",
  669. VXGE_DRIVER_NAME, vpath->device_id);
  670. return -EPERM;
  671. }
  672. if (FALSE == vxge_mac_list_add(vpath, &mac_info))
  673. return -EPERM;
  674. return vpath_idx;
  675. }
  676. /**
  677. * vxge_xmit
  678. * @skb : the socket buffer containing the Tx data.
  679. * @dev : device pointer.
  680. *
  681. * This function is the Tx entry point of the driver. Neterion NIC supports
  682. * certain protocol assist features on Tx side, namely CSO, S/G, LSO.
  683. * NOTE: when device cant queue the pkt, just the trans_start variable will
  684. * not be upadted.
  685. */
  686. static netdev_tx_t
  687. vxge_xmit(struct sk_buff *skb, struct net_device *dev)
  688. {
  689. struct vxge_fifo *fifo = NULL;
  690. void *dtr_priv;
  691. void *dtr = NULL;
  692. struct vxgedev *vdev = NULL;
  693. enum vxge_hw_status status;
  694. int frg_cnt, first_frg_len;
  695. skb_frag_t *frag;
  696. int i = 0, j = 0, avail;
  697. u64 dma_pointer;
  698. struct vxge_tx_priv *txdl_priv = NULL;
  699. struct __vxge_hw_fifo *fifo_hw;
  700. int offload_type;
  701. unsigned long flags = 0;
  702. int vpath_no = 0;
  703. int do_spin_tx_lock = 1;
  704. vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d",
  705. dev->name, __func__, __LINE__);
  706. /* A buffer with no data will be dropped */
  707. if (unlikely(skb->len <= 0)) {
  708. vxge_debug_tx(VXGE_ERR,
  709. "%s: Buffer has no data..", dev->name);
  710. dev_kfree_skb(skb);
  711. return NETDEV_TX_OK;
  712. }
  713. vdev = (struct vxgedev *)netdev_priv(dev);
  714. if (unlikely(!is_vxge_card_up(vdev))) {
  715. vxge_debug_tx(VXGE_ERR,
  716. "%s: vdev not initialized", dev->name);
  717. dev_kfree_skb(skb);
  718. return NETDEV_TX_OK;
  719. }
  720. if (vdev->config.addr_learn_en) {
  721. vpath_no = vxge_learn_mac(vdev, skb->data + ETH_ALEN);
  722. if (vpath_no == -EPERM) {
  723. vxge_debug_tx(VXGE_ERR,
  724. "%s: Failed to store the mac address",
  725. dev->name);
  726. dev_kfree_skb(skb);
  727. return NETDEV_TX_OK;
  728. }
  729. }
  730. if (vdev->config.tx_steering_type == TX_MULTIQ_STEERING)
  731. vpath_no = skb_get_queue_mapping(skb);
  732. else if (vdev->config.tx_steering_type == TX_PORT_STEERING)
  733. vpath_no = vxge_get_vpath_no(vdev, skb, &do_spin_tx_lock);
  734. vxge_debug_tx(VXGE_TRACE, "%s: vpath_no= %d", dev->name, vpath_no);
  735. if (vpath_no >= vdev->no_of_vpath)
  736. vpath_no = 0;
  737. fifo = &vdev->vpaths[vpath_no].fifo;
  738. fifo_hw = fifo->handle;
  739. if (do_spin_tx_lock)
  740. spin_lock_irqsave(&fifo->tx_lock, flags);
  741. else {
  742. if (unlikely(!spin_trylock_irqsave(&fifo->tx_lock, flags)))
  743. return NETDEV_TX_LOCKED;
  744. }
  745. if (vdev->config.tx_steering_type == TX_MULTIQ_STEERING) {
  746. if (netif_subqueue_stopped(dev, skb)) {
  747. spin_unlock_irqrestore(&fifo->tx_lock, flags);
  748. return NETDEV_TX_BUSY;
  749. }
  750. } else if (unlikely(fifo->queue_state == VPATH_QUEUE_STOP)) {
  751. if (netif_queue_stopped(dev)) {
  752. spin_unlock_irqrestore(&fifo->tx_lock, flags);
  753. return NETDEV_TX_BUSY;
  754. }
  755. }
  756. avail = vxge_hw_fifo_free_txdl_count_get(fifo_hw);
  757. if (avail == 0) {
  758. vxge_debug_tx(VXGE_ERR,
  759. "%s: No free TXDs available", dev->name);
  760. fifo->stats.txd_not_free++;
  761. vxge_stop_tx_queue(fifo);
  762. goto _exit2;
  763. }
  764. /* Last TXD? Stop tx queue to avoid dropping packets. TX
  765. * completion will resume the queue.
  766. */
  767. if (avail == 1)
  768. vxge_stop_tx_queue(fifo);
  769. status = vxge_hw_fifo_txdl_reserve(fifo_hw, &dtr, &dtr_priv);
  770. if (unlikely(status != VXGE_HW_OK)) {
  771. vxge_debug_tx(VXGE_ERR,
  772. "%s: Out of descriptors .", dev->name);
  773. fifo->stats.txd_out_of_desc++;
  774. vxge_stop_tx_queue(fifo);
  775. goto _exit2;
  776. }
  777. vxge_debug_tx(VXGE_TRACE,
  778. "%s: %s:%d fifo_hw = %p dtr = %p dtr_priv = %p",
  779. dev->name, __func__, __LINE__,
  780. fifo_hw, dtr, dtr_priv);
  781. if (vdev->vlgrp && vlan_tx_tag_present(skb)) {
  782. u16 vlan_tag = vlan_tx_tag_get(skb);
  783. vxge_hw_fifo_txdl_vlan_set(dtr, vlan_tag);
  784. }
  785. first_frg_len = skb_headlen(skb);
  786. dma_pointer = pci_map_single(fifo->pdev, skb->data, first_frg_len,
  787. PCI_DMA_TODEVICE);
  788. if (unlikely(pci_dma_mapping_error(fifo->pdev, dma_pointer))) {
  789. vxge_hw_fifo_txdl_free(fifo_hw, dtr);
  790. vxge_stop_tx_queue(fifo);
  791. fifo->stats.pci_map_fail++;
  792. goto _exit2;
  793. }
  794. txdl_priv = vxge_hw_fifo_txdl_private_get(dtr);
  795. txdl_priv->skb = skb;
  796. txdl_priv->dma_buffers[j] = dma_pointer;
  797. frg_cnt = skb_shinfo(skb)->nr_frags;
  798. vxge_debug_tx(VXGE_TRACE,
  799. "%s: %s:%d skb = %p txdl_priv = %p "
  800. "frag_cnt = %d dma_pointer = 0x%llx", dev->name,
  801. __func__, __LINE__, skb, txdl_priv,
  802. frg_cnt, (unsigned long long)dma_pointer);
  803. vxge_hw_fifo_txdl_buffer_set(fifo_hw, dtr, j++, dma_pointer,
  804. first_frg_len);
  805. frag = &skb_shinfo(skb)->frags[0];
  806. for (i = 0; i < frg_cnt; i++) {
  807. /* ignore 0 length fragment */
  808. if (!frag->size)
  809. continue;
  810. dma_pointer =
  811. (u64)pci_map_page(fifo->pdev, frag->page,
  812. frag->page_offset, frag->size,
  813. PCI_DMA_TODEVICE);
  814. if (unlikely(pci_dma_mapping_error(fifo->pdev, dma_pointer)))
  815. goto _exit0;
  816. vxge_debug_tx(VXGE_TRACE,
  817. "%s: %s:%d frag = %d dma_pointer = 0x%llx",
  818. dev->name, __func__, __LINE__, i,
  819. (unsigned long long)dma_pointer);
  820. txdl_priv->dma_buffers[j] = dma_pointer;
  821. vxge_hw_fifo_txdl_buffer_set(fifo_hw, dtr, j++, dma_pointer,
  822. frag->size);
  823. frag += 1;
  824. }
  825. offload_type = vxge_offload_type(skb);
  826. if (offload_type & (SKB_GSO_TCPV4 | SKB_GSO_TCPV6)) {
  827. int mss = vxge_tcp_mss(skb);
  828. if (mss) {
  829. vxge_debug_tx(VXGE_TRACE,
  830. "%s: %s:%d mss = %d",
  831. dev->name, __func__, __LINE__, mss);
  832. vxge_hw_fifo_txdl_mss_set(dtr, mss);
  833. } else {
  834. vxge_assert(skb->len <=
  835. dev->mtu + VXGE_HW_MAC_HEADER_MAX_SIZE);
  836. vxge_assert(0);
  837. goto _exit1;
  838. }
  839. }
  840. if (skb->ip_summed == CHECKSUM_PARTIAL)
  841. vxge_hw_fifo_txdl_cksum_set_bits(dtr,
  842. VXGE_HW_FIFO_TXD_TX_CKO_IPV4_EN |
  843. VXGE_HW_FIFO_TXD_TX_CKO_TCP_EN |
  844. VXGE_HW_FIFO_TXD_TX_CKO_UDP_EN);
  845. vxge_hw_fifo_txdl_post(fifo_hw, dtr);
  846. #ifdef NETIF_F_LLTX
  847. dev->trans_start = jiffies; /* NETIF_F_LLTX driver :( */
  848. #endif
  849. spin_unlock_irqrestore(&fifo->tx_lock, flags);
  850. VXGE_COMPLETE_VPATH_TX(fifo);
  851. vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d Exiting...",
  852. dev->name, __func__, __LINE__);
  853. return NETDEV_TX_OK;
  854. _exit0:
  855. vxge_debug_tx(VXGE_TRACE, "%s: pci_map_page failed", dev->name);
  856. _exit1:
  857. j = 0;
  858. frag = &skb_shinfo(skb)->frags[0];
  859. pci_unmap_single(fifo->pdev, txdl_priv->dma_buffers[j++],
  860. skb_headlen(skb), PCI_DMA_TODEVICE);
  861. for (; j < i; j++) {
  862. pci_unmap_page(fifo->pdev, txdl_priv->dma_buffers[j],
  863. frag->size, PCI_DMA_TODEVICE);
  864. frag += 1;
  865. }
  866. vxge_hw_fifo_txdl_free(fifo_hw, dtr);
  867. _exit2:
  868. dev_kfree_skb(skb);
  869. spin_unlock_irqrestore(&fifo->tx_lock, flags);
  870. VXGE_COMPLETE_VPATH_TX(fifo);
  871. return NETDEV_TX_OK;
  872. }
  873. /*
  874. * vxge_rx_term
  875. *
  876. * Function will be called by hw function to abort all outstanding receive
  877. * descriptors.
  878. */
  879. static void
  880. vxge_rx_term(void *dtrh, enum vxge_hw_rxd_state state, void *userdata)
  881. {
  882. struct vxge_ring *ring = (struct vxge_ring *)userdata;
  883. struct vxge_rx_priv *rx_priv =
  884. vxge_hw_ring_rxd_private_get(dtrh);
  885. vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d",
  886. ring->ndev->name, __func__, __LINE__);
  887. if (state != VXGE_HW_RXD_STATE_POSTED)
  888. return;
  889. pci_unmap_single(ring->pdev, rx_priv->data_dma,
  890. rx_priv->data_size, PCI_DMA_FROMDEVICE);
  891. dev_kfree_skb(rx_priv->skb);
  892. rx_priv->skb_data = NULL;
  893. vxge_debug_entryexit(VXGE_TRACE,
  894. "%s: %s:%d Exiting...",
  895. ring->ndev->name, __func__, __LINE__);
  896. }
  897. /*
  898. * vxge_tx_term
  899. *
  900. * Function will be called to abort all outstanding tx descriptors
  901. */
  902. static void
  903. vxge_tx_term(void *dtrh, enum vxge_hw_txdl_state state, void *userdata)
  904. {
  905. struct vxge_fifo *fifo = (struct vxge_fifo *)userdata;
  906. skb_frag_t *frag;
  907. int i = 0, j, frg_cnt;
  908. struct vxge_tx_priv *txd_priv = vxge_hw_fifo_txdl_private_get(dtrh);
  909. struct sk_buff *skb = txd_priv->skb;
  910. vxge_debug_entryexit(VXGE_TRACE, "%s:%d", __func__, __LINE__);
  911. if (state != VXGE_HW_TXDL_STATE_POSTED)
  912. return;
  913. /* check skb validity */
  914. vxge_assert(skb);
  915. frg_cnt = skb_shinfo(skb)->nr_frags;
  916. frag = &skb_shinfo(skb)->frags[0];
  917. /* for unfragmented skb */
  918. pci_unmap_single(fifo->pdev, txd_priv->dma_buffers[i++],
  919. skb_headlen(skb), PCI_DMA_TODEVICE);
  920. for (j = 0; j < frg_cnt; j++) {
  921. pci_unmap_page(fifo->pdev, txd_priv->dma_buffers[i++],
  922. frag->size, PCI_DMA_TODEVICE);
  923. frag += 1;
  924. }
  925. dev_kfree_skb(skb);
  926. vxge_debug_entryexit(VXGE_TRACE,
  927. "%s:%d Exiting...", __func__, __LINE__);
  928. }
  929. /**
  930. * vxge_set_multicast
  931. * @dev: pointer to the device structure
  932. *
  933. * Entry point for multicast address enable/disable
  934. * This function is a driver entry point which gets called by the kernel
  935. * whenever multicast addresses must be enabled/disabled. This also gets
  936. * called to set/reset promiscuous mode. Depending on the deivce flag, we
  937. * determine, if multicast address must be enabled or if promiscuous mode
  938. * is to be disabled etc.
  939. */
  940. static void vxge_set_multicast(struct net_device *dev)
  941. {
  942. struct dev_mc_list *mclist;
  943. struct vxgedev *vdev;
  944. int i, mcast_cnt = 0;
  945. struct __vxge_hw_device *hldev;
  946. enum vxge_hw_status status = VXGE_HW_OK;
  947. struct macInfo mac_info;
  948. int vpath_idx = 0;
  949. struct vxge_mac_addrs *mac_entry;
  950. struct list_head *list_head;
  951. struct list_head *entry, *next;
  952. u8 *mac_address = NULL;
  953. vxge_debug_entryexit(VXGE_TRACE,
  954. "%s:%d", __func__, __LINE__);
  955. vdev = (struct vxgedev *)netdev_priv(dev);
  956. hldev = (struct __vxge_hw_device *)vdev->devh;
  957. if (unlikely(!is_vxge_card_up(vdev)))
  958. return;
  959. if ((dev->flags & IFF_ALLMULTI) && (!vdev->all_multi_flg)) {
  960. for (i = 0; i < vdev->no_of_vpath; i++) {
  961. vxge_assert(vdev->vpaths[i].is_open);
  962. status = vxge_hw_vpath_mcast_enable(
  963. vdev->vpaths[i].handle);
  964. vdev->all_multi_flg = 1;
  965. }
  966. } else if ((dev->flags & IFF_ALLMULTI) && (vdev->all_multi_flg)) {
  967. for (i = 0; i < vdev->no_of_vpath; i++) {
  968. vxge_assert(vdev->vpaths[i].is_open);
  969. status = vxge_hw_vpath_mcast_disable(
  970. vdev->vpaths[i].handle);
  971. vdev->all_multi_flg = 1;
  972. }
  973. }
  974. if (status != VXGE_HW_OK)
  975. vxge_debug_init(VXGE_ERR,
  976. "failed to %s multicast, status %d",
  977. dev->flags & IFF_ALLMULTI ?
  978. "enable" : "disable", status);
  979. if (!vdev->config.addr_learn_en) {
  980. if (dev->flags & IFF_PROMISC) {
  981. for (i = 0; i < vdev->no_of_vpath; i++) {
  982. vxge_assert(vdev->vpaths[i].is_open);
  983. status = vxge_hw_vpath_promisc_enable(
  984. vdev->vpaths[i].handle);
  985. }
  986. } else {
  987. for (i = 0; i < vdev->no_of_vpath; i++) {
  988. vxge_assert(vdev->vpaths[i].is_open);
  989. status = vxge_hw_vpath_promisc_disable(
  990. vdev->vpaths[i].handle);
  991. }
  992. }
  993. }
  994. memset(&mac_info, 0, sizeof(struct macInfo));
  995. /* Update individual M_CAST address list */
  996. if ((!vdev->all_multi_flg) && dev->mc_count) {
  997. mcast_cnt = vdev->vpaths[0].mcast_addr_cnt;
  998. list_head = &vdev->vpaths[0].mac_addr_list;
  999. if ((dev->mc_count +
  1000. (vdev->vpaths[0].mac_addr_cnt - mcast_cnt)) >
  1001. vdev->vpaths[0].max_mac_addr_cnt)
  1002. goto _set_all_mcast;
  1003. /* Delete previous MC's */
  1004. for (i = 0; i < mcast_cnt; i++) {
  1005. if (!list_empty(list_head))
  1006. mac_entry = (struct vxge_mac_addrs *)
  1007. list_first_entry(list_head,
  1008. struct vxge_mac_addrs,
  1009. item);
  1010. list_for_each_safe(entry, next, list_head) {
  1011. mac_entry = (struct vxge_mac_addrs *) entry;
  1012. /* Copy the mac address to delete */
  1013. mac_address = (u8 *)&mac_entry->macaddr;
  1014. memcpy(mac_info.macaddr, mac_address, ETH_ALEN);
  1015. /* Is this a multicast address */
  1016. if (0x01 & mac_info.macaddr[0]) {
  1017. for (vpath_idx = 0; vpath_idx <
  1018. vdev->no_of_vpath;
  1019. vpath_idx++) {
  1020. mac_info.vpath_no = vpath_idx;
  1021. status = vxge_del_mac_addr(
  1022. vdev,
  1023. &mac_info);
  1024. }
  1025. }
  1026. }
  1027. }
  1028. /* Add new ones */
  1029. for (i = 0, mclist = dev->mc_list; i < dev->mc_count;
  1030. i++, mclist = mclist->next) {
  1031. memcpy(mac_info.macaddr, mclist->dmi_addr, ETH_ALEN);
  1032. for (vpath_idx = 0; vpath_idx < vdev->no_of_vpath;
  1033. vpath_idx++) {
  1034. mac_info.vpath_no = vpath_idx;
  1035. mac_info.state = VXGE_LL_MAC_ADDR_IN_DA_TABLE;
  1036. status = vxge_add_mac_addr(vdev, &mac_info);
  1037. if (status != VXGE_HW_OK) {
  1038. vxge_debug_init(VXGE_ERR,
  1039. "%s:%d Setting individual"
  1040. "multicast address failed",
  1041. __func__, __LINE__);
  1042. goto _set_all_mcast;
  1043. }
  1044. }
  1045. }
  1046. return;
  1047. _set_all_mcast:
  1048. mcast_cnt = vdev->vpaths[0].mcast_addr_cnt;
  1049. /* Delete previous MC's */
  1050. for (i = 0; i < mcast_cnt; i++) {
  1051. list_for_each_safe(entry, next, list_head) {
  1052. mac_entry = (struct vxge_mac_addrs *) entry;
  1053. /* Copy the mac address to delete */
  1054. mac_address = (u8 *)&mac_entry->macaddr;
  1055. memcpy(mac_info.macaddr, mac_address, ETH_ALEN);
  1056. /* Is this a multicast address */
  1057. if (0x01 & mac_info.macaddr[0])
  1058. break;
  1059. }
  1060. for (vpath_idx = 0; vpath_idx < vdev->no_of_vpath;
  1061. vpath_idx++) {
  1062. mac_info.vpath_no = vpath_idx;
  1063. status = vxge_del_mac_addr(vdev, &mac_info);
  1064. }
  1065. }
  1066. /* Enable all multicast */
  1067. for (i = 0; i < vdev->no_of_vpath; i++) {
  1068. vxge_assert(vdev->vpaths[i].is_open);
  1069. status = vxge_hw_vpath_mcast_enable(
  1070. vdev->vpaths[i].handle);
  1071. if (status != VXGE_HW_OK) {
  1072. vxge_debug_init(VXGE_ERR,
  1073. "%s:%d Enabling all multicasts failed",
  1074. __func__, __LINE__);
  1075. }
  1076. vdev->all_multi_flg = 1;
  1077. }
  1078. dev->flags |= IFF_ALLMULTI;
  1079. }
  1080. vxge_debug_entryexit(VXGE_TRACE,
  1081. "%s:%d Exiting...", __func__, __LINE__);
  1082. }
  1083. /**
  1084. * vxge_set_mac_addr
  1085. * @dev: pointer to the device structure
  1086. *
  1087. * Update entry "0" (default MAC addr)
  1088. */
  1089. static int vxge_set_mac_addr(struct net_device *dev, void *p)
  1090. {
  1091. struct sockaddr *addr = p;
  1092. struct vxgedev *vdev;
  1093. struct __vxge_hw_device *hldev;
  1094. enum vxge_hw_status status = VXGE_HW_OK;
  1095. struct macInfo mac_info_new, mac_info_old;
  1096. int vpath_idx = 0;
  1097. vxge_debug_entryexit(VXGE_TRACE, "%s:%d", __func__, __LINE__);
  1098. vdev = (struct vxgedev *)netdev_priv(dev);
  1099. hldev = vdev->devh;
  1100. if (!is_valid_ether_addr(addr->sa_data))
  1101. return -EINVAL;
  1102. memset(&mac_info_new, 0, sizeof(struct macInfo));
  1103. memset(&mac_info_old, 0, sizeof(struct macInfo));
  1104. vxge_debug_entryexit(VXGE_TRACE, "%s:%d Exiting...",
  1105. __func__, __LINE__);
  1106. /* Get the old address */
  1107. memcpy(mac_info_old.macaddr, dev->dev_addr, dev->addr_len);
  1108. /* Copy the new address */
  1109. memcpy(mac_info_new.macaddr, addr->sa_data, dev->addr_len);
  1110. /* First delete the old mac address from all the vpaths
  1111. as we can't specify the index while adding new mac address */
  1112. for (vpath_idx = 0; vpath_idx < vdev->no_of_vpath; vpath_idx++) {
  1113. struct vxge_vpath *vpath = &vdev->vpaths[vpath_idx];
  1114. if (!vpath->is_open) {
  1115. /* This can happen when this interface is added/removed
  1116. to the bonding interface. Delete this station address
  1117. from the linked list */
  1118. vxge_mac_list_del(vpath, &mac_info_old);
  1119. /* Add this new address to the linked list
  1120. for later restoring */
  1121. vxge_mac_list_add(vpath, &mac_info_new);
  1122. continue;
  1123. }
  1124. /* Delete the station address */
  1125. mac_info_old.vpath_no = vpath_idx;
  1126. status = vxge_del_mac_addr(vdev, &mac_info_old);
  1127. }
  1128. if (unlikely(!is_vxge_card_up(vdev))) {
  1129. memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
  1130. return VXGE_HW_OK;
  1131. }
  1132. /* Set this mac address to all the vpaths */
  1133. for (vpath_idx = 0; vpath_idx < vdev->no_of_vpath; vpath_idx++) {
  1134. mac_info_new.vpath_no = vpath_idx;
  1135. mac_info_new.state = VXGE_LL_MAC_ADDR_IN_DA_TABLE;
  1136. status = vxge_add_mac_addr(vdev, &mac_info_new);
  1137. if (status != VXGE_HW_OK)
  1138. return -EINVAL;
  1139. }
  1140. memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
  1141. return status;
  1142. }
  1143. /*
  1144. * vxge_vpath_intr_enable
  1145. * @vdev: pointer to vdev
  1146. * @vp_id: vpath for which to enable the interrupts
  1147. *
  1148. * Enables the interrupts for the vpath
  1149. */
  1150. void vxge_vpath_intr_enable(struct vxgedev *vdev, int vp_id)
  1151. {
  1152. struct vxge_vpath *vpath = &vdev->vpaths[vp_id];
  1153. int msix_id, alarm_msix_id;
  1154. int tim_msix_id[4] = {[0 ...3] = 0};
  1155. vxge_hw_vpath_intr_enable(vpath->handle);
  1156. if (vdev->config.intr_type == INTA)
  1157. vxge_hw_vpath_inta_unmask_tx_rx(vpath->handle);
  1158. else {
  1159. msix_id = vp_id * VXGE_HW_VPATH_MSIX_ACTIVE;
  1160. alarm_msix_id =
  1161. VXGE_HW_VPATH_MSIX_ACTIVE * vdev->no_of_vpath - 2;
  1162. tim_msix_id[0] = msix_id;
  1163. tim_msix_id[1] = msix_id + 1;
  1164. vxge_hw_vpath_msix_set(vpath->handle, tim_msix_id,
  1165. alarm_msix_id);
  1166. vxge_hw_vpath_msix_unmask(vpath->handle, msix_id);
  1167. vxge_hw_vpath_msix_unmask(vpath->handle, msix_id + 1);
  1168. /* enable the alarm vector */
  1169. vxge_hw_vpath_msix_unmask(vpath->handle, alarm_msix_id);
  1170. }
  1171. }
  1172. /*
  1173. * vxge_vpath_intr_disable
  1174. * @vdev: pointer to vdev
  1175. * @vp_id: vpath for which to disable the interrupts
  1176. *
  1177. * Disables the interrupts for the vpath
  1178. */
  1179. void vxge_vpath_intr_disable(struct vxgedev *vdev, int vp_id)
  1180. {
  1181. struct vxge_vpath *vpath = &vdev->vpaths[vp_id];
  1182. int msix_id;
  1183. vxge_hw_vpath_intr_disable(vpath->handle);
  1184. if (vdev->config.intr_type == INTA)
  1185. vxge_hw_vpath_inta_mask_tx_rx(vpath->handle);
  1186. else {
  1187. msix_id = vp_id * VXGE_HW_VPATH_MSIX_ACTIVE;
  1188. vxge_hw_vpath_msix_mask(vpath->handle, msix_id);
  1189. vxge_hw_vpath_msix_mask(vpath->handle, msix_id + 1);
  1190. /* disable the alarm vector */
  1191. msix_id = VXGE_HW_VPATH_MSIX_ACTIVE * vdev->no_of_vpath - 2;
  1192. vxge_hw_vpath_msix_mask(vpath->handle, msix_id);
  1193. }
  1194. }
  1195. /*
  1196. * vxge_reset_vpath
  1197. * @vdev: pointer to vdev
  1198. * @vp_id: vpath to reset
  1199. *
  1200. * Resets the vpath
  1201. */
  1202. static int vxge_reset_vpath(struct vxgedev *vdev, int vp_id)
  1203. {
  1204. enum vxge_hw_status status = VXGE_HW_OK;
  1205. int ret = 0;
  1206. /* check if device is down already */
  1207. if (unlikely(!is_vxge_card_up(vdev)))
  1208. return 0;
  1209. /* is device reset already scheduled */
  1210. if (test_bit(__VXGE_STATE_RESET_CARD, &vdev->state))
  1211. return 0;
  1212. if (vdev->vpaths[vp_id].handle) {
  1213. if (vxge_hw_vpath_reset(vdev->vpaths[vp_id].handle)
  1214. == VXGE_HW_OK) {
  1215. if (is_vxge_card_up(vdev) &&
  1216. vxge_hw_vpath_recover_from_reset(
  1217. vdev->vpaths[vp_id].handle)
  1218. != VXGE_HW_OK) {
  1219. vxge_debug_init(VXGE_ERR,
  1220. "vxge_hw_vpath_recover_from_reset"
  1221. "failed for vpath:%d", vp_id);
  1222. return status;
  1223. }
  1224. } else {
  1225. vxge_debug_init(VXGE_ERR,
  1226. "vxge_hw_vpath_reset failed for"
  1227. "vpath:%d", vp_id);
  1228. return status;
  1229. }
  1230. } else
  1231. return VXGE_HW_FAIL;
  1232. vxge_restore_vpath_mac_addr(&vdev->vpaths[vp_id]);
  1233. vxge_restore_vpath_vid_table(&vdev->vpaths[vp_id]);
  1234. /* Enable all broadcast */
  1235. vxge_hw_vpath_bcast_enable(vdev->vpaths[vp_id].handle);
  1236. /* Enable the interrupts */
  1237. vxge_vpath_intr_enable(vdev, vp_id);
  1238. smp_wmb();
  1239. /* Enable the flow of traffic through the vpath */
  1240. vxge_hw_vpath_enable(vdev->vpaths[vp_id].handle);
  1241. smp_wmb();
  1242. vxge_hw_vpath_rx_doorbell_init(vdev->vpaths[vp_id].handle);
  1243. vdev->vpaths[vp_id].ring.last_status = VXGE_HW_OK;
  1244. /* Vpath reset done */
  1245. clear_bit(vp_id, &vdev->vp_reset);
  1246. /* Start the vpath queue */
  1247. vxge_wake_tx_queue(&vdev->vpaths[vp_id].fifo, NULL);
  1248. return ret;
  1249. }
  1250. static int do_vxge_reset(struct vxgedev *vdev, int event)
  1251. {
  1252. enum vxge_hw_status status;
  1253. int ret = 0, vp_id, i;
  1254. vxge_debug_entryexit(VXGE_TRACE, "%s:%d", __func__, __LINE__);
  1255. if ((event == VXGE_LL_FULL_RESET) || (event == VXGE_LL_START_RESET)) {
  1256. /* check if device is down already */
  1257. if (unlikely(!is_vxge_card_up(vdev)))
  1258. return 0;
  1259. /* is reset already scheduled */
  1260. if (test_and_set_bit(__VXGE_STATE_RESET_CARD, &vdev->state))
  1261. return 0;
  1262. }
  1263. if (event == VXGE_LL_FULL_RESET) {
  1264. /* wait for all the vpath reset to complete */
  1265. for (vp_id = 0; vp_id < vdev->no_of_vpath; vp_id++) {
  1266. while (test_bit(vp_id, &vdev->vp_reset))
  1267. msleep(50);
  1268. }
  1269. /* if execution mode is set to debug, don't reset the adapter */
  1270. if (unlikely(vdev->exec_mode)) {
  1271. vxge_debug_init(VXGE_ERR,
  1272. "%s: execution mode is debug, returning..",
  1273. vdev->ndev->name);
  1274. clear_bit(__VXGE_STATE_CARD_UP, &vdev->state);
  1275. vxge_stop_all_tx_queue(vdev);
  1276. return 0;
  1277. }
  1278. }
  1279. if (event == VXGE_LL_FULL_RESET) {
  1280. vxge_hw_device_intr_disable(vdev->devh);
  1281. switch (vdev->cric_err_event) {
  1282. case VXGE_HW_EVENT_UNKNOWN:
  1283. vxge_stop_all_tx_queue(vdev);
  1284. vxge_debug_init(VXGE_ERR,
  1285. "fatal: %s: Disabling device due to"
  1286. "unknown error",
  1287. vdev->ndev->name);
  1288. ret = -EPERM;
  1289. goto out;
  1290. case VXGE_HW_EVENT_RESET_START:
  1291. break;
  1292. case VXGE_HW_EVENT_RESET_COMPLETE:
  1293. case VXGE_HW_EVENT_LINK_DOWN:
  1294. case VXGE_HW_EVENT_LINK_UP:
  1295. case VXGE_HW_EVENT_ALARM_CLEARED:
  1296. case VXGE_HW_EVENT_ECCERR:
  1297. case VXGE_HW_EVENT_MRPCIM_ECCERR:
  1298. ret = -EPERM;
  1299. goto out;
  1300. case VXGE_HW_EVENT_FIFO_ERR:
  1301. case VXGE_HW_EVENT_VPATH_ERR:
  1302. break;
  1303. case VXGE_HW_EVENT_CRITICAL_ERR:
  1304. vxge_stop_all_tx_queue(vdev);
  1305. vxge_debug_init(VXGE_ERR,
  1306. "fatal: %s: Disabling device due to"
  1307. "serious error",
  1308. vdev->ndev->name);
  1309. /* SOP or device reset required */
  1310. /* This event is not currently used */
  1311. ret = -EPERM;
  1312. goto out;
  1313. case VXGE_HW_EVENT_SERR:
  1314. vxge_stop_all_tx_queue(vdev);
  1315. vxge_debug_init(VXGE_ERR,
  1316. "fatal: %s: Disabling device due to"
  1317. "serious error",
  1318. vdev->ndev->name);
  1319. ret = -EPERM;
  1320. goto out;
  1321. case VXGE_HW_EVENT_SRPCIM_SERR:
  1322. case VXGE_HW_EVENT_MRPCIM_SERR:
  1323. ret = -EPERM;
  1324. goto out;
  1325. case VXGE_HW_EVENT_SLOT_FREEZE:
  1326. vxge_stop_all_tx_queue(vdev);
  1327. vxge_debug_init(VXGE_ERR,
  1328. "fatal: %s: Disabling device due to"
  1329. "slot freeze",
  1330. vdev->ndev->name);
  1331. ret = -EPERM;
  1332. goto out;
  1333. default:
  1334. break;
  1335. }
  1336. }
  1337. if ((event == VXGE_LL_FULL_RESET) || (event == VXGE_LL_START_RESET))
  1338. vxge_stop_all_tx_queue(vdev);
  1339. if (event == VXGE_LL_FULL_RESET) {
  1340. status = vxge_reset_all_vpaths(vdev);
  1341. if (status != VXGE_HW_OK) {
  1342. vxge_debug_init(VXGE_ERR,
  1343. "fatal: %s: can not reset vpaths",
  1344. vdev->ndev->name);
  1345. ret = -EPERM;
  1346. goto out;
  1347. }
  1348. }
  1349. if (event == VXGE_LL_COMPL_RESET) {
  1350. for (i = 0; i < vdev->no_of_vpath; i++)
  1351. if (vdev->vpaths[i].handle) {
  1352. if (vxge_hw_vpath_recover_from_reset(
  1353. vdev->vpaths[i].handle)
  1354. != VXGE_HW_OK) {
  1355. vxge_debug_init(VXGE_ERR,
  1356. "vxge_hw_vpath_recover_"
  1357. "from_reset failed for vpath: "
  1358. "%d", i);
  1359. ret = -EPERM;
  1360. goto out;
  1361. }
  1362. } else {
  1363. vxge_debug_init(VXGE_ERR,
  1364. "vxge_hw_vpath_reset failed for "
  1365. "vpath:%d", i);
  1366. ret = -EPERM;
  1367. goto out;
  1368. }
  1369. }
  1370. if ((event == VXGE_LL_FULL_RESET) || (event == VXGE_LL_COMPL_RESET)) {
  1371. /* Reprogram the DA table with populated mac addresses */
  1372. for (vp_id = 0; vp_id < vdev->no_of_vpath; vp_id++) {
  1373. vxge_restore_vpath_mac_addr(&vdev->vpaths[vp_id]);
  1374. vxge_restore_vpath_vid_table(&vdev->vpaths[vp_id]);
  1375. }
  1376. /* enable vpath interrupts */
  1377. for (i = 0; i < vdev->no_of_vpath; i++)
  1378. vxge_vpath_intr_enable(vdev, i);
  1379. vxge_hw_device_intr_enable(vdev->devh);
  1380. smp_wmb();
  1381. /* Indicate card up */
  1382. set_bit(__VXGE_STATE_CARD_UP, &vdev->state);
  1383. /* Get the traffic to flow through the vpaths */
  1384. for (i = 0; i < vdev->no_of_vpath; i++) {
  1385. vxge_hw_vpath_enable(vdev->vpaths[i].handle);
  1386. smp_wmb();
  1387. vxge_hw_vpath_rx_doorbell_init(vdev->vpaths[i].handle);
  1388. }
  1389. vxge_wake_all_tx_queue(vdev);
  1390. }
  1391. out:
  1392. vxge_debug_entryexit(VXGE_TRACE,
  1393. "%s:%d Exiting...", __func__, __LINE__);
  1394. /* Indicate reset done */
  1395. if ((event == VXGE_LL_FULL_RESET) || (event == VXGE_LL_COMPL_RESET))
  1396. clear_bit(__VXGE_STATE_RESET_CARD, &vdev->state);
  1397. return ret;
  1398. }
  1399. /*
  1400. * vxge_reset
  1401. * @vdev: pointer to ll device
  1402. *
  1403. * driver may reset the chip on events of serr, eccerr, etc
  1404. */
  1405. int vxge_reset(struct vxgedev *vdev)
  1406. {
  1407. do_vxge_reset(vdev, VXGE_LL_FULL_RESET);
  1408. return 0;
  1409. }
  1410. /**
  1411. * vxge_poll - Receive handler when Receive Polling is used.
  1412. * @dev: pointer to the device structure.
  1413. * @budget: Number of packets budgeted to be processed in this iteration.
  1414. *
  1415. * This function comes into picture only if Receive side is being handled
  1416. * through polling (called NAPI in linux). It mostly does what the normal
  1417. * Rx interrupt handler does in terms of descriptor and packet processing
  1418. * but not in an interrupt context. Also it will process a specified number
  1419. * of packets at most in one iteration. This value is passed down by the
  1420. * kernel as the function argument 'budget'.
  1421. */
  1422. static int vxge_poll_msix(struct napi_struct *napi, int budget)
  1423. {
  1424. struct vxge_ring *ring =
  1425. container_of(napi, struct vxge_ring, napi);
  1426. int budget_org = budget;
  1427. ring->budget = budget;
  1428. vxge_hw_vpath_poll_rx(ring->handle);
  1429. if (ring->pkts_processed < budget_org) {
  1430. napi_complete(napi);
  1431. /* Re enable the Rx interrupts for the vpath */
  1432. vxge_hw_channel_msix_unmask(
  1433. (struct __vxge_hw_channel *)ring->handle,
  1434. ring->rx_vector_no);
  1435. }
  1436. return ring->pkts_processed;
  1437. }
  1438. static int vxge_poll_inta(struct napi_struct *napi, int budget)
  1439. {
  1440. struct vxgedev *vdev = container_of(napi, struct vxgedev, napi);
  1441. int pkts_processed = 0;
  1442. int i;
  1443. int budget_org = budget;
  1444. struct vxge_ring *ring;
  1445. struct __vxge_hw_device *hldev = (struct __vxge_hw_device *)
  1446. pci_get_drvdata(vdev->pdev);
  1447. for (i = 0; i < vdev->no_of_vpath; i++) {
  1448. ring = &vdev->vpaths[i].ring;
  1449. ring->budget = budget;
  1450. vxge_hw_vpath_poll_rx(ring->handle);
  1451. pkts_processed += ring->pkts_processed;
  1452. budget -= ring->pkts_processed;
  1453. if (budget <= 0)
  1454. break;
  1455. }
  1456. VXGE_COMPLETE_ALL_TX(vdev);
  1457. if (pkts_processed < budget_org) {
  1458. napi_complete(napi);
  1459. /* Re enable the Rx interrupts for the ring */
  1460. vxge_hw_device_unmask_all(hldev);
  1461. vxge_hw_device_flush_io(hldev);
  1462. }
  1463. return pkts_processed;
  1464. }
  1465. #ifdef CONFIG_NET_POLL_CONTROLLER
  1466. /**
  1467. * vxge_netpoll - netpoll event handler entry point
  1468. * @dev : pointer to the device structure.
  1469. * Description:
  1470. * This function will be called by upper layer to check for events on the
  1471. * interface in situations where interrupts are disabled. It is used for
  1472. * specific in-kernel networking tasks, such as remote consoles and kernel
  1473. * debugging over the network (example netdump in RedHat).
  1474. */
  1475. static void vxge_netpoll(struct net_device *dev)
  1476. {
  1477. struct __vxge_hw_device *hldev;
  1478. struct vxgedev *vdev;
  1479. vdev = (struct vxgedev *)netdev_priv(dev);
  1480. hldev = (struct __vxge_hw_device *)pci_get_drvdata(vdev->pdev);
  1481. vxge_debug_entryexit(VXGE_TRACE, "%s:%d", __func__, __LINE__);
  1482. if (pci_channel_offline(vdev->pdev))
  1483. return;
  1484. disable_irq(dev->irq);
  1485. vxge_hw_device_clear_tx_rx(hldev);
  1486. vxge_hw_device_clear_tx_rx(hldev);
  1487. VXGE_COMPLETE_ALL_RX(vdev);
  1488. VXGE_COMPLETE_ALL_TX(vdev);
  1489. enable_irq(dev->irq);
  1490. vxge_debug_entryexit(VXGE_TRACE,
  1491. "%s:%d Exiting...", __func__, __LINE__);
  1492. return;
  1493. }
  1494. #endif
  1495. /* RTH configuration */
  1496. static enum vxge_hw_status vxge_rth_configure(struct vxgedev *vdev)
  1497. {
  1498. enum vxge_hw_status status = VXGE_HW_OK;
  1499. struct vxge_hw_rth_hash_types hash_types;
  1500. u8 itable[256] = {0}; /* indirection table */
  1501. u8 mtable[256] = {0}; /* CPU to vpath mapping */
  1502. int index;
  1503. /*
  1504. * Filling
  1505. * - itable with bucket numbers
  1506. * - mtable with bucket-to-vpath mapping
  1507. */
  1508. for (index = 0; index < (1 << vdev->config.rth_bkt_sz); index++) {
  1509. itable[index] = index;
  1510. mtable[index] = index % vdev->no_of_vpath;
  1511. }
  1512. /* Fill RTH hash types */
  1513. hash_types.hash_type_tcpipv4_en = vdev->config.rth_hash_type_tcpipv4;
  1514. hash_types.hash_type_ipv4_en = vdev->config.rth_hash_type_ipv4;
  1515. hash_types.hash_type_tcpipv6_en = vdev->config.rth_hash_type_tcpipv6;
  1516. hash_types.hash_type_ipv6_en = vdev->config.rth_hash_type_ipv6;
  1517. hash_types.hash_type_tcpipv6ex_en =
  1518. vdev->config.rth_hash_type_tcpipv6ex;
  1519. hash_types.hash_type_ipv6ex_en = vdev->config.rth_hash_type_ipv6ex;
  1520. /* set indirection table, bucket-to-vpath mapping */
  1521. status = vxge_hw_vpath_rts_rth_itable_set(vdev->vp_handles,
  1522. vdev->no_of_vpath,
  1523. mtable, itable,
  1524. vdev->config.rth_bkt_sz);
  1525. if (status != VXGE_HW_OK) {
  1526. vxge_debug_init(VXGE_ERR,
  1527. "RTH indirection table configuration failed "
  1528. "for vpath:%d", vdev->vpaths[0].device_id);
  1529. return status;
  1530. }
  1531. /*
  1532. * Because the itable_set() method uses the active_table field
  1533. * for the target virtual path the RTH config should be updated
  1534. * for all VPATHs. The h/w only uses the lowest numbered VPATH
  1535. * when steering frames.
  1536. */
  1537. for (index = 0; index < vdev->no_of_vpath; index++) {
  1538. status = vxge_hw_vpath_rts_rth_set(
  1539. vdev->vpaths[index].handle,
  1540. vdev->config.rth_algorithm,
  1541. &hash_types,
  1542. vdev->config.rth_bkt_sz);
  1543. if (status != VXGE_HW_OK) {
  1544. vxge_debug_init(VXGE_ERR,
  1545. "RTH configuration failed for vpath:%d",
  1546. vdev->vpaths[index].device_id);
  1547. return status;
  1548. }
  1549. }
  1550. return status;
  1551. }
  1552. int vxge_mac_list_add(struct vxge_vpath *vpath, struct macInfo *mac)
  1553. {
  1554. struct vxge_mac_addrs *new_mac_entry;
  1555. u8 *mac_address = NULL;
  1556. if (vpath->mac_addr_cnt >= VXGE_MAX_LEARN_MAC_ADDR_CNT)
  1557. return TRUE;
  1558. new_mac_entry = kzalloc(sizeof(struct vxge_mac_addrs), GFP_ATOMIC);
  1559. if (!new_mac_entry) {
  1560. vxge_debug_mem(VXGE_ERR,
  1561. "%s: memory allocation failed",
  1562. VXGE_DRIVER_NAME);
  1563. return FALSE;
  1564. }
  1565. list_add(&new_mac_entry->item, &vpath->mac_addr_list);
  1566. /* Copy the new mac address to the list */
  1567. mac_address = (u8 *)&new_mac_entry->macaddr;
  1568. memcpy(mac_address, mac->macaddr, ETH_ALEN);
  1569. new_mac_entry->state = mac->state;
  1570. vpath->mac_addr_cnt++;
  1571. /* Is this a multicast address */
  1572. if (0x01 & mac->macaddr[0])
  1573. vpath->mcast_addr_cnt++;
  1574. return TRUE;
  1575. }
  1576. /* Add a mac address to DA table */
  1577. enum vxge_hw_status vxge_add_mac_addr(struct vxgedev *vdev, struct macInfo *mac)
  1578. {
  1579. enum vxge_hw_status status = VXGE_HW_OK;
  1580. struct vxge_vpath *vpath;
  1581. enum vxge_hw_vpath_mac_addr_add_mode duplicate_mode;
  1582. if (0x01 & mac->macaddr[0]) /* multicast address */
  1583. duplicate_mode = VXGE_HW_VPATH_MAC_ADDR_ADD_DUPLICATE;
  1584. else
  1585. duplicate_mode = VXGE_HW_VPATH_MAC_ADDR_REPLACE_DUPLICATE;
  1586. vpath = &vdev->vpaths[mac->vpath_no];
  1587. status = vxge_hw_vpath_mac_addr_add(vpath->handle, mac->macaddr,
  1588. mac->macmask, duplicate_mode);
  1589. if (status != VXGE_HW_OK) {
  1590. vxge_debug_init(VXGE_ERR,
  1591. "DA config add entry failed for vpath:%d",
  1592. vpath->device_id);
  1593. } else
  1594. if (FALSE == vxge_mac_list_add(vpath, mac))
  1595. status = -EPERM;
  1596. return status;
  1597. }
  1598. int vxge_mac_list_del(struct vxge_vpath *vpath, struct macInfo *mac)
  1599. {
  1600. struct list_head *entry, *next;
  1601. u64 del_mac = 0;
  1602. u8 *mac_address = (u8 *) (&del_mac);
  1603. /* Copy the mac address to delete from the list */
  1604. memcpy(mac_address, mac->macaddr, ETH_ALEN);
  1605. list_for_each_safe(entry, next, &vpath->mac_addr_list) {
  1606. if (((struct vxge_mac_addrs *)entry)->macaddr == del_mac) {
  1607. list_del(entry);
  1608. kfree((struct vxge_mac_addrs *)entry);
  1609. vpath->mac_addr_cnt--;
  1610. /* Is this a multicast address */
  1611. if (0x01 & mac->macaddr[0])
  1612. vpath->mcast_addr_cnt--;
  1613. return TRUE;
  1614. }
  1615. }
  1616. return FALSE;
  1617. }
  1618. /* delete a mac address from DA table */
  1619. enum vxge_hw_status vxge_del_mac_addr(struct vxgedev *vdev, struct macInfo *mac)
  1620. {
  1621. enum vxge_hw_status status = VXGE_HW_OK;
  1622. struct vxge_vpath *vpath;
  1623. vpath = &vdev->vpaths[mac->vpath_no];
  1624. status = vxge_hw_vpath_mac_addr_delete(vpath->handle, mac->macaddr,
  1625. mac->macmask);
  1626. if (status != VXGE_HW_OK) {
  1627. vxge_debug_init(VXGE_ERR,
  1628. "DA config delete entry failed for vpath:%d",
  1629. vpath->device_id);
  1630. } else
  1631. vxge_mac_list_del(vpath, mac);
  1632. return status;
  1633. }
  1634. /* list all mac addresses from DA table */
  1635. enum vxge_hw_status
  1636. static vxge_search_mac_addr_in_da_table(struct vxge_vpath *vpath,
  1637. struct macInfo *mac)
  1638. {
  1639. enum vxge_hw_status status = VXGE_HW_OK;
  1640. unsigned char macmask[ETH_ALEN];
  1641. unsigned char macaddr[ETH_ALEN];
  1642. status = vxge_hw_vpath_mac_addr_get(vpath->handle,
  1643. macaddr, macmask);
  1644. if (status != VXGE_HW_OK) {
  1645. vxge_debug_init(VXGE_ERR,
  1646. "DA config list entry failed for vpath:%d",
  1647. vpath->device_id);
  1648. return status;
  1649. }
  1650. while (memcmp(mac->macaddr, macaddr, ETH_ALEN)) {
  1651. status = vxge_hw_vpath_mac_addr_get_next(vpath->handle,
  1652. macaddr, macmask);
  1653. if (status != VXGE_HW_OK)
  1654. break;
  1655. }
  1656. return status;
  1657. }
  1658. /* Store all vlan ids from the list to the vid table */
  1659. enum vxge_hw_status vxge_restore_vpath_vid_table(struct vxge_vpath *vpath)
  1660. {
  1661. enum vxge_hw_status status = VXGE_HW_OK;
  1662. struct vxgedev *vdev = vpath->vdev;
  1663. u16 vid;
  1664. if (vdev->vlgrp && vpath->is_open) {
  1665. for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
  1666. if (!vlan_group_get_device(vdev->vlgrp, vid))
  1667. continue;
  1668. /* Add these vlan to the vid table */
  1669. status = vxge_hw_vpath_vid_add(vpath->handle, vid);
  1670. }
  1671. }
  1672. return status;
  1673. }
  1674. /* Store all mac addresses from the list to the DA table */
  1675. enum vxge_hw_status vxge_restore_vpath_mac_addr(struct vxge_vpath *vpath)
  1676. {
  1677. enum vxge_hw_status status = VXGE_HW_OK;
  1678. struct macInfo mac_info;
  1679. u8 *mac_address = NULL;
  1680. struct list_head *entry, *next;
  1681. memset(&mac_info, 0, sizeof(struct macInfo));
  1682. if (vpath->is_open) {
  1683. list_for_each_safe(entry, next, &vpath->mac_addr_list) {
  1684. mac_address =
  1685. (u8 *)&
  1686. ((struct vxge_mac_addrs *)entry)->macaddr;
  1687. memcpy(mac_info.macaddr, mac_address, ETH_ALEN);
  1688. ((struct vxge_mac_addrs *)entry)->state =
  1689. VXGE_LL_MAC_ADDR_IN_DA_TABLE;
  1690. /* does this mac address already exist in da table? */
  1691. status = vxge_search_mac_addr_in_da_table(vpath,
  1692. &mac_info);
  1693. if (status != VXGE_HW_OK) {
  1694. /* Add this mac address to the DA table */
  1695. status = vxge_hw_vpath_mac_addr_add(
  1696. vpath->handle, mac_info.macaddr,
  1697. mac_info.macmask,
  1698. VXGE_HW_VPATH_MAC_ADDR_ADD_DUPLICATE);
  1699. if (status != VXGE_HW_OK) {
  1700. vxge_debug_init(VXGE_ERR,
  1701. "DA add entry failed for vpath:%d",
  1702. vpath->device_id);
  1703. ((struct vxge_mac_addrs *)entry)->state
  1704. = VXGE_LL_MAC_ADDR_IN_LIST;
  1705. }
  1706. }
  1707. }
  1708. }
  1709. return status;
  1710. }
  1711. /* reset vpaths */
  1712. enum vxge_hw_status vxge_reset_all_vpaths(struct vxgedev *vdev)
  1713. {
  1714. int i;
  1715. enum vxge_hw_status status = VXGE_HW_OK;
  1716. for (i = 0; i < vdev->no_of_vpath; i++)
  1717. if (vdev->vpaths[i].handle) {
  1718. if (vxge_hw_vpath_reset(vdev->vpaths[i].handle)
  1719. == VXGE_HW_OK) {
  1720. if (is_vxge_card_up(vdev) &&
  1721. vxge_hw_vpath_recover_from_reset(
  1722. vdev->vpaths[i].handle)
  1723. != VXGE_HW_OK) {
  1724. vxge_debug_init(VXGE_ERR,
  1725. "vxge_hw_vpath_recover_"
  1726. "from_reset failed for vpath: "
  1727. "%d", i);
  1728. return status;
  1729. }
  1730. } else {
  1731. vxge_debug_init(VXGE_ERR,
  1732. "vxge_hw_vpath_reset failed for "
  1733. "vpath:%d", i);
  1734. return status;
  1735. }
  1736. }
  1737. return status;
  1738. }
  1739. /* close vpaths */
  1740. void vxge_close_vpaths(struct vxgedev *vdev, int index)
  1741. {
  1742. int i;
  1743. for (i = index; i < vdev->no_of_vpath; i++) {
  1744. if (vdev->vpaths[i].handle && vdev->vpaths[i].is_open) {
  1745. vxge_hw_vpath_close(vdev->vpaths[i].handle);
  1746. vdev->stats.vpaths_open--;
  1747. }
  1748. vdev->vpaths[i].is_open = 0;
  1749. vdev->vpaths[i].handle = NULL;
  1750. }
  1751. }
  1752. /* open vpaths */
  1753. int vxge_open_vpaths(struct vxgedev *vdev)
  1754. {
  1755. enum vxge_hw_status status;
  1756. int i;
  1757. u32 vp_id = 0;
  1758. struct vxge_hw_vpath_attr attr;
  1759. for (i = 0; i < vdev->no_of_vpath; i++) {
  1760. vxge_assert(vdev->vpaths[i].is_configured);
  1761. attr.vp_id = vdev->vpaths[i].device_id;
  1762. attr.fifo_attr.callback = vxge_xmit_compl;
  1763. attr.fifo_attr.txdl_term = vxge_tx_term;
  1764. attr.fifo_attr.per_txdl_space = sizeof(struct vxge_tx_priv);
  1765. attr.fifo_attr.userdata = (void *)&vdev->vpaths[i].fifo;
  1766. attr.ring_attr.callback = vxge_rx_1b_compl;
  1767. attr.ring_attr.rxd_init = vxge_rx_initial_replenish;
  1768. attr.ring_attr.rxd_term = vxge_rx_term;
  1769. attr.ring_attr.per_rxd_space = sizeof(struct vxge_rx_priv);
  1770. attr.ring_attr.userdata = (void *)&vdev->vpaths[i].ring;
  1771. vdev->vpaths[i].ring.ndev = vdev->ndev;
  1772. vdev->vpaths[i].ring.pdev = vdev->pdev;
  1773. status = vxge_hw_vpath_open(vdev->devh, &attr,
  1774. &(vdev->vpaths[i].handle));
  1775. if (status == VXGE_HW_OK) {
  1776. vdev->vpaths[i].fifo.handle =
  1777. (struct __vxge_hw_fifo *)attr.fifo_attr.userdata;
  1778. vdev->vpaths[i].ring.handle =
  1779. (struct __vxge_hw_ring *)attr.ring_attr.userdata;
  1780. vdev->vpaths[i].fifo.tx_steering_type =
  1781. vdev->config.tx_steering_type;
  1782. vdev->vpaths[i].fifo.ndev = vdev->ndev;
  1783. vdev->vpaths[i].fifo.pdev = vdev->pdev;
  1784. vdev->vpaths[i].fifo.indicate_max_pkts =
  1785. vdev->config.fifo_indicate_max_pkts;
  1786. vdev->vpaths[i].ring.rx_vector_no = 0;
  1787. vdev->vpaths[i].ring.rx_csum = vdev->rx_csum;
  1788. vdev->vpaths[i].is_open = 1;
  1789. vdev->vp_handles[i] = vdev->vpaths[i].handle;
  1790. vdev->vpaths[i].ring.gro_enable =
  1791. vdev->config.gro_enable;
  1792. vdev->vpaths[i].ring.vlan_tag_strip =
  1793. vdev->vlan_tag_strip;
  1794. vdev->stats.vpaths_open++;
  1795. } else {
  1796. vdev->stats.vpath_open_fail++;
  1797. vxge_debug_init(VXGE_ERR,
  1798. "%s: vpath: %d failed to open "
  1799. "with status: %d",
  1800. vdev->ndev->name, vdev->vpaths[i].device_id,
  1801. status);
  1802. vxge_close_vpaths(vdev, 0);
  1803. return -EPERM;
  1804. }
  1805. vp_id =
  1806. ((struct __vxge_hw_vpath_handle *)vdev->vpaths[i].handle)->
  1807. vpath->vp_id;
  1808. vdev->vpaths_deployed |= vxge_mBIT(vp_id);
  1809. }
  1810. return VXGE_HW_OK;
  1811. }
  1812. /*
  1813. * vxge_isr_napi
  1814. * @irq: the irq of the device.
  1815. * @dev_id: a void pointer to the hldev structure of the Titan device
  1816. * @ptregs: pointer to the registers pushed on the stack.
  1817. *
  1818. * This function is the ISR handler of the device when napi is enabled. It
  1819. * identifies the reason for the interrupt and calls the relevant service
  1820. * routines.
  1821. */
  1822. static irqreturn_t vxge_isr_napi(int irq, void *dev_id)
  1823. {
  1824. struct net_device *dev;
  1825. struct __vxge_hw_device *hldev;
  1826. u64 reason;
  1827. enum vxge_hw_status status;
  1828. struct vxgedev *vdev = (struct vxgedev *) dev_id;;
  1829. vxge_debug_intr(VXGE_TRACE, "%s:%d", __func__, __LINE__);
  1830. dev = vdev->ndev;
  1831. hldev = (struct __vxge_hw_device *)pci_get_drvdata(vdev->pdev);
  1832. if (pci_channel_offline(vdev->pdev))
  1833. return IRQ_NONE;
  1834. if (unlikely(!is_vxge_card_up(vdev)))
  1835. return IRQ_NONE;
  1836. status = vxge_hw_device_begin_irq(hldev, vdev->exec_mode,
  1837. &reason);
  1838. if (status == VXGE_HW_OK) {
  1839. vxge_hw_device_mask_all(hldev);
  1840. if (reason &
  1841. VXGE_HW_TITAN_GENERAL_INT_STATUS_VPATH_TRAFFIC_INT(
  1842. vdev->vpaths_deployed >>
  1843. (64 - VXGE_HW_MAX_VIRTUAL_PATHS))) {
  1844. vxge_hw_device_clear_tx_rx(hldev);
  1845. napi_schedule(&vdev->napi);
  1846. vxge_debug_intr(VXGE_TRACE,
  1847. "%s:%d Exiting...", __func__, __LINE__);
  1848. return IRQ_HANDLED;
  1849. } else
  1850. vxge_hw_device_unmask_all(hldev);
  1851. } else if (unlikely((status == VXGE_HW_ERR_VPATH) ||
  1852. (status == VXGE_HW_ERR_CRITICAL) ||
  1853. (status == VXGE_HW_ERR_FIFO))) {
  1854. vxge_hw_device_mask_all(hldev);
  1855. vxge_hw_device_flush_io(hldev);
  1856. return IRQ_HANDLED;
  1857. } else if (unlikely(status == VXGE_HW_ERR_SLOT_FREEZE))
  1858. return IRQ_HANDLED;
  1859. vxge_debug_intr(VXGE_TRACE, "%s:%d Exiting...", __func__, __LINE__);
  1860. return IRQ_NONE;
  1861. }
  1862. #ifdef CONFIG_PCI_MSI
  1863. static irqreturn_t
  1864. vxge_tx_msix_handle(int irq, void *dev_id)
  1865. {
  1866. struct vxge_fifo *fifo = (struct vxge_fifo *)dev_id;
  1867. VXGE_COMPLETE_VPATH_TX(fifo);
  1868. return IRQ_HANDLED;
  1869. }
  1870. static irqreturn_t
  1871. vxge_rx_msix_napi_handle(int irq, void *dev_id)
  1872. {
  1873. struct vxge_ring *ring = (struct vxge_ring *)dev_id;
  1874. /* MSIX_IDX for Rx is 1 */
  1875. vxge_hw_channel_msix_mask((struct __vxge_hw_channel *)ring->handle,
  1876. ring->rx_vector_no);
  1877. napi_schedule(&ring->napi);
  1878. return IRQ_HANDLED;
  1879. }
  1880. static irqreturn_t
  1881. vxge_alarm_msix_handle(int irq, void *dev_id)
  1882. {
  1883. int i;
  1884. enum vxge_hw_status status;
  1885. struct vxge_vpath *vpath = (struct vxge_vpath *)dev_id;
  1886. struct vxgedev *vdev = vpath->vdev;
  1887. int alarm_msix_id =
  1888. VXGE_HW_VPATH_MSIX_ACTIVE * vdev->no_of_vpath - 2;
  1889. for (i = 0; i < vdev->no_of_vpath; i++) {
  1890. vxge_hw_vpath_msix_mask(vdev->vpaths[i].handle,
  1891. alarm_msix_id);
  1892. status = vxge_hw_vpath_alarm_process(vdev->vpaths[i].handle,
  1893. vdev->exec_mode);
  1894. if (status == VXGE_HW_OK) {
  1895. vxge_hw_vpath_msix_unmask(vdev->vpaths[i].handle,
  1896. alarm_msix_id);
  1897. continue;
  1898. }
  1899. vxge_debug_intr(VXGE_ERR,
  1900. "%s: vxge_hw_vpath_alarm_process failed %x ",
  1901. VXGE_DRIVER_NAME, status);
  1902. }
  1903. return IRQ_HANDLED;
  1904. }
  1905. static int vxge_alloc_msix(struct vxgedev *vdev)
  1906. {
  1907. int j, i, ret = 0;
  1908. int intr_cnt = 0;
  1909. int alarm_msix_id = 0, msix_intr_vect = 0;
  1910. vdev->intr_cnt = 0;
  1911. /* Tx/Rx MSIX Vectors count */
  1912. vdev->intr_cnt = vdev->no_of_vpath * 2;
  1913. /* Alarm MSIX Vectors count */
  1914. vdev->intr_cnt++;
  1915. intr_cnt = (vdev->max_vpath_supported * 2) + 1;
  1916. vdev->entries = kzalloc(intr_cnt * sizeof(struct msix_entry),
  1917. GFP_KERNEL);
  1918. if (!vdev->entries) {
  1919. vxge_debug_init(VXGE_ERR,
  1920. "%s: memory allocation failed",
  1921. VXGE_DRIVER_NAME);
  1922. return -ENOMEM;
  1923. }
  1924. vdev->vxge_entries = kzalloc(intr_cnt * sizeof(struct vxge_msix_entry),
  1925. GFP_KERNEL);
  1926. if (!vdev->vxge_entries) {
  1927. vxge_debug_init(VXGE_ERR, "%s: memory allocation failed",
  1928. VXGE_DRIVER_NAME);
  1929. kfree(vdev->entries);
  1930. return -ENOMEM;
  1931. }
  1932. /* Last vector in the list is used for alarm */
  1933. alarm_msix_id = VXGE_HW_VPATH_MSIX_ACTIVE * vdev->no_of_vpath - 2;
  1934. for (i = 0, j = 0; i < vdev->max_vpath_supported; i++) {
  1935. msix_intr_vect = i * VXGE_HW_VPATH_MSIX_ACTIVE;
  1936. /* Initialize the fifo vector */
  1937. vdev->entries[j].entry = msix_intr_vect;
  1938. vdev->vxge_entries[j].entry = msix_intr_vect;
  1939. vdev->vxge_entries[j].in_use = 0;
  1940. j++;
  1941. /* Initialize the ring vector */
  1942. vdev->entries[j].entry = msix_intr_vect + 1;
  1943. vdev->vxge_entries[j].entry = msix_intr_vect + 1;
  1944. vdev->vxge_entries[j].in_use = 0;
  1945. j++;
  1946. }
  1947. /* Initialize the alarm vector */
  1948. vdev->entries[j].entry = alarm_msix_id;
  1949. vdev->vxge_entries[j].entry = alarm_msix_id;
  1950. vdev->vxge_entries[j].in_use = 0;
  1951. ret = pci_enable_msix(vdev->pdev, vdev->entries, intr_cnt);
  1952. /* if driver request exceeeds available irq's, request with a small
  1953. * number.
  1954. */
  1955. if (ret > 0) {
  1956. vxge_debug_init(VXGE_ERR,
  1957. "%s: MSI-X enable failed for %d vectors, available: %d",
  1958. VXGE_DRIVER_NAME, intr_cnt, ret);
  1959. vdev->max_vpath_supported = vdev->no_of_vpath;
  1960. intr_cnt = (vdev->max_vpath_supported * 2) + 1;
  1961. /* Reset the alarm vector setting */
  1962. vdev->entries[j].entry = 0;
  1963. vdev->vxge_entries[j].entry = 0;
  1964. /* Initialize the alarm vector with new setting */
  1965. vdev->entries[intr_cnt - 1].entry = alarm_msix_id;
  1966. vdev->vxge_entries[intr_cnt - 1].entry = alarm_msix_id;
  1967. vdev->vxge_entries[intr_cnt - 1].in_use = 0;
  1968. ret = pci_enable_msix(vdev->pdev, vdev->entries, intr_cnt);
  1969. if (!ret)
  1970. vxge_debug_init(VXGE_ERR,
  1971. "%s: MSI-X enabled for %d vectors",
  1972. VXGE_DRIVER_NAME, intr_cnt);
  1973. }
  1974. if (ret) {
  1975. vxge_debug_init(VXGE_ERR,
  1976. "%s: MSI-X enable failed for %d vectors, ret: %d",
  1977. VXGE_DRIVER_NAME, intr_cnt, ret);
  1978. kfree(vdev->entries);
  1979. kfree(vdev->vxge_entries);
  1980. vdev->entries = NULL;
  1981. vdev->vxge_entries = NULL;
  1982. return -ENODEV;
  1983. }
  1984. return 0;
  1985. }
  1986. static int vxge_enable_msix(struct vxgedev *vdev)
  1987. {
  1988. int i, ret = 0;
  1989. enum vxge_hw_status status;
  1990. /* 0 - Tx, 1 - Rx */
  1991. int tim_msix_id[4];
  1992. int alarm_msix_id = 0, msix_intr_vect = 0;
  1993. vdev->intr_cnt = 0;
  1994. /* allocate msix vectors */
  1995. ret = vxge_alloc_msix(vdev);
  1996. if (!ret) {
  1997. /* Last vector in the list is used for alarm */
  1998. alarm_msix_id =
  1999. VXGE_HW_VPATH_MSIX_ACTIVE * vdev->no_of_vpath - 2;
  2000. for (i = 0; i < vdev->no_of_vpath; i++) {
  2001. /* If fifo or ring are not enabled
  2002. the MSIX vector for that should be set to 0
  2003. Hence initializeing this array to all 0s.
  2004. */
  2005. memset(tim_msix_id, 0, sizeof(tim_msix_id));
  2006. msix_intr_vect = i * VXGE_HW_VPATH_MSIX_ACTIVE;
  2007. tim_msix_id[0] = msix_intr_vect;
  2008. tim_msix_id[1] = msix_intr_vect + 1;
  2009. vdev->vpaths[i].ring.rx_vector_no = tim_msix_id[1];
  2010. status = vxge_hw_vpath_msix_set(
  2011. vdev->vpaths[i].handle,
  2012. tim_msix_id, alarm_msix_id);
  2013. if (status != VXGE_HW_OK) {
  2014. vxge_debug_init(VXGE_ERR,
  2015. "vxge_hw_vpath_msix_set "
  2016. "failed with status : %x", status);
  2017. kfree(vdev->entries);
  2018. kfree(vdev->vxge_entries);
  2019. pci_disable_msix(vdev->pdev);
  2020. return -ENODEV;
  2021. }
  2022. }
  2023. }
  2024. return ret;
  2025. }
  2026. static void vxge_rem_msix_isr(struct vxgedev *vdev)
  2027. {
  2028. int intr_cnt;
  2029. for (intr_cnt = 0; intr_cnt < (vdev->max_vpath_supported * 2 + 1);
  2030. intr_cnt++) {
  2031. if (vdev->vxge_entries[intr_cnt].in_use) {
  2032. synchronize_irq(vdev->entries[intr_cnt].vector);
  2033. free_irq(vdev->entries[intr_cnt].vector,
  2034. vdev->vxge_entries[intr_cnt].arg);
  2035. vdev->vxge_entries[intr_cnt].in_use = 0;
  2036. }
  2037. }
  2038. kfree(vdev->entries);
  2039. kfree(vdev->vxge_entries);
  2040. vdev->entries = NULL;
  2041. vdev->vxge_entries = NULL;
  2042. if (vdev->config.intr_type == MSI_X)
  2043. pci_disable_msix(vdev->pdev);
  2044. }
  2045. #endif
  2046. static void vxge_rem_isr(struct vxgedev *vdev)
  2047. {
  2048. struct __vxge_hw_device *hldev;
  2049. hldev = (struct __vxge_hw_device *) pci_get_drvdata(vdev->pdev);
  2050. #ifdef CONFIG_PCI_MSI
  2051. if (vdev->config.intr_type == MSI_X) {
  2052. vxge_rem_msix_isr(vdev);
  2053. } else
  2054. #endif
  2055. if (vdev->config.intr_type == INTA) {
  2056. synchronize_irq(vdev->pdev->irq);
  2057. free_irq(vdev->pdev->irq, vdev);
  2058. }
  2059. }
  2060. static int vxge_add_isr(struct vxgedev *vdev)
  2061. {
  2062. int ret = 0;
  2063. #ifdef CONFIG_PCI_MSI
  2064. int vp_idx = 0, intr_idx = 0, intr_cnt = 0, msix_idx = 0, irq_req = 0;
  2065. u64 function_mode = vdev->config.device_hw_info.function_mode;
  2066. int pci_fun = PCI_FUNC(vdev->pdev->devfn);
  2067. if (vdev->config.intr_type == MSI_X)
  2068. ret = vxge_enable_msix(vdev);
  2069. if (ret) {
  2070. vxge_debug_init(VXGE_ERR,
  2071. "%s: Enabling MSI-X Failed", VXGE_DRIVER_NAME);
  2072. if ((function_mode == VXGE_HW_FUNCTION_MODE_MULTI_FUNCTION) &&
  2073. test_and_set_bit(__VXGE_STATE_CARD_UP,
  2074. &driver_config->inta_dev_open))
  2075. return VXGE_HW_FAIL;
  2076. else {
  2077. vxge_debug_init(VXGE_ERR,
  2078. "%s: Defaulting to INTA", VXGE_DRIVER_NAME);
  2079. vdev->config.intr_type = INTA;
  2080. vxge_hw_device_set_intr_type(vdev->devh,
  2081. VXGE_HW_INTR_MODE_IRQLINE);
  2082. vxge_close_vpaths(vdev, 1);
  2083. vdev->no_of_vpath = 1;
  2084. vdev->stats.vpaths_open = 1;
  2085. }
  2086. }
  2087. if (vdev->config.intr_type == MSI_X) {
  2088. for (intr_idx = 0;
  2089. intr_idx < (vdev->no_of_vpath *
  2090. VXGE_HW_VPATH_MSIX_ACTIVE); intr_idx++) {
  2091. msix_idx = intr_idx % VXGE_HW_VPATH_MSIX_ACTIVE;
  2092. irq_req = 0;
  2093. switch (msix_idx) {
  2094. case 0:
  2095. snprintf(vdev->desc[intr_cnt], VXGE_INTR_STRLEN,
  2096. "%s:vxge fn: %d vpath: %d Tx MSI-X: %d",
  2097. vdev->ndev->name, pci_fun, vp_idx,
  2098. vdev->entries[intr_cnt].entry);
  2099. ret = request_irq(
  2100. vdev->entries[intr_cnt].vector,
  2101. vxge_tx_msix_handle, 0,
  2102. vdev->desc[intr_cnt],
  2103. &vdev->vpaths[vp_idx].fifo);
  2104. vdev->vxge_entries[intr_cnt].arg =
  2105. &vdev->vpaths[vp_idx].fifo;
  2106. irq_req = 1;
  2107. break;
  2108. case 1:
  2109. snprintf(vdev->desc[intr_cnt], VXGE_INTR_STRLEN,
  2110. "%s:vxge fn: %d vpath: %d Rx MSI-X: %d",
  2111. vdev->ndev->name, pci_fun, vp_idx,
  2112. vdev->entries[intr_cnt].entry);
  2113. ret = request_irq(
  2114. vdev->entries[intr_cnt].vector,
  2115. vxge_rx_msix_napi_handle,
  2116. 0,
  2117. vdev->desc[intr_cnt],
  2118. &vdev->vpaths[vp_idx].ring);
  2119. vdev->vxge_entries[intr_cnt].arg =
  2120. &vdev->vpaths[vp_idx].ring;
  2121. irq_req = 1;
  2122. break;
  2123. }
  2124. if (ret) {
  2125. vxge_debug_init(VXGE_ERR,
  2126. "%s: MSIX - %d Registration failed",
  2127. vdev->ndev->name, intr_cnt);
  2128. vxge_rem_msix_isr(vdev);
  2129. if ((function_mode ==
  2130. VXGE_HW_FUNCTION_MODE_MULTI_FUNCTION) &&
  2131. test_and_set_bit(__VXGE_STATE_CARD_UP,
  2132. &driver_config->inta_dev_open))
  2133. return VXGE_HW_FAIL;
  2134. else {
  2135. vxge_hw_device_set_intr_type(
  2136. vdev->devh,
  2137. VXGE_HW_INTR_MODE_IRQLINE);
  2138. vdev->config.intr_type = INTA;
  2139. vxge_debug_init(VXGE_ERR,
  2140. "%s: Defaulting to INTA"
  2141. , vdev->ndev->name);
  2142. vxge_close_vpaths(vdev, 1);
  2143. vdev->no_of_vpath = 1;
  2144. vdev->stats.vpaths_open = 1;
  2145. goto INTA_MODE;
  2146. }
  2147. }
  2148. if (irq_req) {
  2149. /* We requested for this msix interrupt */
  2150. vdev->vxge_entries[intr_cnt].in_use = 1;
  2151. vxge_hw_vpath_msix_unmask(
  2152. vdev->vpaths[vp_idx].handle,
  2153. intr_idx);
  2154. intr_cnt++;
  2155. }
  2156. /* Point to next vpath handler */
  2157. if (((intr_idx + 1) % VXGE_HW_VPATH_MSIX_ACTIVE == 0)
  2158. && (vp_idx < (vdev->no_of_vpath - 1)))
  2159. vp_idx++;
  2160. }
  2161. intr_cnt = vdev->max_vpath_supported * 2;
  2162. snprintf(vdev->desc[intr_cnt], VXGE_INTR_STRLEN,
  2163. "%s:vxge Alarm fn: %d MSI-X: %d",
  2164. vdev->ndev->name, pci_fun,
  2165. vdev->entries[intr_cnt].entry);
  2166. /* For Alarm interrupts */
  2167. ret = request_irq(vdev->entries[intr_cnt].vector,
  2168. vxge_alarm_msix_handle, 0,
  2169. vdev->desc[intr_cnt],
  2170. &vdev->vpaths[vp_idx]);
  2171. if (ret) {
  2172. vxge_debug_init(VXGE_ERR,
  2173. "%s: MSIX - %d Registration failed",
  2174. vdev->ndev->name, intr_cnt);
  2175. vxge_rem_msix_isr(vdev);
  2176. if ((function_mode ==
  2177. VXGE_HW_FUNCTION_MODE_MULTI_FUNCTION) &&
  2178. test_and_set_bit(__VXGE_STATE_CARD_UP,
  2179. &driver_config->inta_dev_open))
  2180. return VXGE_HW_FAIL;
  2181. else {
  2182. vxge_hw_device_set_intr_type(vdev->devh,
  2183. VXGE_HW_INTR_MODE_IRQLINE);
  2184. vdev->config.intr_type = INTA;
  2185. vxge_debug_init(VXGE_ERR,
  2186. "%s: Defaulting to INTA",
  2187. vdev->ndev->name);
  2188. vxge_close_vpaths(vdev, 1);
  2189. vdev->no_of_vpath = 1;
  2190. vdev->stats.vpaths_open = 1;
  2191. goto INTA_MODE;
  2192. }
  2193. }
  2194. vxge_hw_vpath_msix_unmask(vdev->vpaths[vp_idx].handle,
  2195. intr_idx - 2);
  2196. vdev->vxge_entries[intr_cnt].in_use = 1;
  2197. vdev->vxge_entries[intr_cnt].arg = &vdev->vpaths[vp_idx];
  2198. }
  2199. INTA_MODE:
  2200. #endif
  2201. snprintf(vdev->desc[0], VXGE_INTR_STRLEN, "%s:vxge", vdev->ndev->name);
  2202. if (vdev->config.intr_type == INTA) {
  2203. ret = request_irq((int) vdev->pdev->irq,
  2204. vxge_isr_napi,
  2205. IRQF_SHARED, vdev->desc[0], vdev);
  2206. if (ret) {
  2207. vxge_debug_init(VXGE_ERR,
  2208. "%s %s-%d: ISR registration failed",
  2209. VXGE_DRIVER_NAME, "IRQ", vdev->pdev->irq);
  2210. return -ENODEV;
  2211. }
  2212. vxge_debug_init(VXGE_TRACE,
  2213. "new %s-%d line allocated",
  2214. "IRQ", vdev->pdev->irq);
  2215. }
  2216. return VXGE_HW_OK;
  2217. }
  2218. static void vxge_poll_vp_reset(unsigned long data)
  2219. {
  2220. struct vxgedev *vdev = (struct vxgedev *)data;
  2221. int i, j = 0;
  2222. for (i = 0; i < vdev->no_of_vpath; i++) {
  2223. if (test_bit(i, &vdev->vp_reset)) {
  2224. vxge_reset_vpath(vdev, i);
  2225. j++;
  2226. }
  2227. }
  2228. if (j && (vdev->config.intr_type != MSI_X)) {
  2229. vxge_hw_device_unmask_all(vdev->devh);
  2230. vxge_hw_device_flush_io(vdev->devh);
  2231. }
  2232. mod_timer(&vdev->vp_reset_timer, jiffies + HZ / 2);
  2233. }
  2234. static void vxge_poll_vp_lockup(unsigned long data)
  2235. {
  2236. struct vxgedev *vdev = (struct vxgedev *)data;
  2237. int i;
  2238. struct vxge_ring *ring;
  2239. enum vxge_hw_status status = VXGE_HW_OK;
  2240. for (i = 0; i < vdev->no_of_vpath; i++) {
  2241. ring = &vdev->vpaths[i].ring;
  2242. /* Did this vpath received any packets */
  2243. if (ring->stats.prev_rx_frms == ring->stats.rx_frms) {
  2244. status = vxge_hw_vpath_check_leak(ring->handle);
  2245. /* Did it received any packets last time */
  2246. if ((VXGE_HW_FAIL == status) &&
  2247. (VXGE_HW_FAIL == ring->last_status)) {
  2248. /* schedule vpath reset */
  2249. if (!test_and_set_bit(i, &vdev->vp_reset)) {
  2250. /* disable interrupts for this vpath */
  2251. vxge_vpath_intr_disable(vdev, i);
  2252. /* stop the queue for this vpath */
  2253. vxge_stop_tx_queue(&vdev->vpaths[i].
  2254. fifo);
  2255. continue;
  2256. }
  2257. }
  2258. }
  2259. ring->stats.prev_rx_frms = ring->stats.rx_frms;
  2260. ring->last_status = status;
  2261. }
  2262. /* Check every 1 milli second */
  2263. mod_timer(&vdev->vp_lockup_timer, jiffies + HZ / 1000);
  2264. }
  2265. /**
  2266. * vxge_open
  2267. * @dev: pointer to the device structure.
  2268. *
  2269. * This function is the open entry point of the driver. It mainly calls a
  2270. * function to allocate Rx buffers and inserts them into the buffer
  2271. * descriptors and then enables the Rx part of the NIC.
  2272. * Return value: '0' on success and an appropriate (-)ve integer as
  2273. * defined in errno.h file on failure.
  2274. */
  2275. int
  2276. vxge_open(struct net_device *dev)
  2277. {
  2278. enum vxge_hw_status status;
  2279. struct vxgedev *vdev;
  2280. struct __vxge_hw_device *hldev;
  2281. int ret = 0;
  2282. int i;
  2283. u64 val64, function_mode;
  2284. vxge_debug_entryexit(VXGE_TRACE,
  2285. "%s: %s:%d", dev->name, __func__, __LINE__);
  2286. vdev = (struct vxgedev *)netdev_priv(dev);
  2287. hldev = (struct __vxge_hw_device *) pci_get_drvdata(vdev->pdev);
  2288. function_mode = vdev->config.device_hw_info.function_mode;
  2289. /* make sure you have link off by default every time Nic is
  2290. * initialized */
  2291. netif_carrier_off(dev);
  2292. /* Check for another device already opn with INTA */
  2293. if ((function_mode == VXGE_HW_FUNCTION_MODE_MULTI_FUNCTION) &&
  2294. test_bit(__VXGE_STATE_CARD_UP, &driver_config->inta_dev_open)) {
  2295. ret = -EPERM;
  2296. goto out0;
  2297. }
  2298. /* Open VPATHs */
  2299. status = vxge_open_vpaths(vdev);
  2300. if (status != VXGE_HW_OK) {
  2301. vxge_debug_init(VXGE_ERR,
  2302. "%s: fatal: Vpath open failed", vdev->ndev->name);
  2303. ret = -EPERM;
  2304. goto out0;
  2305. }
  2306. vdev->mtu = dev->mtu;
  2307. status = vxge_add_isr(vdev);
  2308. if (status != VXGE_HW_OK) {
  2309. vxge_debug_init(VXGE_ERR,
  2310. "%s: fatal: ISR add failed", dev->name);
  2311. ret = -EPERM;
  2312. goto out1;
  2313. }
  2314. if (vdev->config.intr_type != MSI_X) {
  2315. netif_napi_add(dev, &vdev->napi, vxge_poll_inta,
  2316. vdev->config.napi_weight);
  2317. napi_enable(&vdev->napi);
  2318. for (i = 0; i < vdev->no_of_vpath; i++)
  2319. vdev->vpaths[i].ring.napi_p = &vdev->napi;
  2320. } else {
  2321. for (i = 0; i < vdev->no_of_vpath; i++) {
  2322. netif_napi_add(dev, &vdev->vpaths[i].ring.napi,
  2323. vxge_poll_msix, vdev->config.napi_weight);
  2324. napi_enable(&vdev->vpaths[i].ring.napi);
  2325. vdev->vpaths[i].ring.napi_p =
  2326. &vdev->vpaths[i].ring.napi;
  2327. }
  2328. }
  2329. /* configure RTH */
  2330. if (vdev->config.rth_steering) {
  2331. status = vxge_rth_configure(vdev);
  2332. if (status != VXGE_HW_OK) {
  2333. vxge_debug_init(VXGE_ERR,
  2334. "%s: fatal: RTH configuration failed",
  2335. dev->name);
  2336. ret = -EPERM;
  2337. goto out2;
  2338. }
  2339. }
  2340. for (i = 0; i < vdev->no_of_vpath; i++) {
  2341. /* set initial mtu before enabling the device */
  2342. status = vxge_hw_vpath_mtu_set(vdev->vpaths[i].handle,
  2343. vdev->mtu);
  2344. if (status != VXGE_HW_OK) {
  2345. vxge_debug_init(VXGE_ERR,
  2346. "%s: fatal: can not set new MTU", dev->name);
  2347. ret = -EPERM;
  2348. goto out2;
  2349. }
  2350. }
  2351. VXGE_DEVICE_DEBUG_LEVEL_SET(VXGE_TRACE, VXGE_COMPONENT_LL, vdev);
  2352. vxge_debug_init(vdev->level_trace,
  2353. "%s: MTU is %d", vdev->ndev->name, vdev->mtu);
  2354. VXGE_DEVICE_DEBUG_LEVEL_SET(VXGE_ERR, VXGE_COMPONENT_LL, vdev);
  2355. /* Reprogram the DA table with populated mac addresses */
  2356. for (i = 0; i < vdev->no_of_vpath; i++) {
  2357. vxge_restore_vpath_mac_addr(&vdev->vpaths[i]);
  2358. vxge_restore_vpath_vid_table(&vdev->vpaths[i]);
  2359. }
  2360. /* Enable vpath to sniff all unicast/multicast traffic that not
  2361. * addressed to them. We allow promiscous mode for PF only
  2362. */
  2363. val64 = 0;
  2364. for (i = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++)
  2365. val64 |= VXGE_HW_RXMAC_AUTHORIZE_ALL_ADDR_VP(i);
  2366. vxge_hw_mgmt_reg_write(vdev->devh,
  2367. vxge_hw_mgmt_reg_type_mrpcim,
  2368. 0,
  2369. (ulong)offsetof(struct vxge_hw_mrpcim_reg,
  2370. rxmac_authorize_all_addr),
  2371. val64);
  2372. vxge_hw_mgmt_reg_write(vdev->devh,
  2373. vxge_hw_mgmt_reg_type_mrpcim,
  2374. 0,
  2375. (ulong)offsetof(struct vxge_hw_mrpcim_reg,
  2376. rxmac_authorize_all_vid),
  2377. val64);
  2378. vxge_set_multicast(dev);
  2379. /* Enabling Bcast and mcast for all vpath */
  2380. for (i = 0; i < vdev->no_of_vpath; i++) {
  2381. status = vxge_hw_vpath_bcast_enable(vdev->vpaths[i].handle);
  2382. if (status != VXGE_HW_OK)
  2383. vxge_debug_init(VXGE_ERR,
  2384. "%s : Can not enable bcast for vpath "
  2385. "id %d", dev->name, i);
  2386. if (vdev->config.addr_learn_en) {
  2387. status =
  2388. vxge_hw_vpath_mcast_enable(vdev->vpaths[i].handle);
  2389. if (status != VXGE_HW_OK)
  2390. vxge_debug_init(VXGE_ERR,
  2391. "%s : Can not enable mcast for vpath "
  2392. "id %d", dev->name, i);
  2393. }
  2394. }
  2395. vxge_hw_device_setpause_data(vdev->devh, 0,
  2396. vdev->config.tx_pause_enable,
  2397. vdev->config.rx_pause_enable);
  2398. if (vdev->vp_reset_timer.function == NULL)
  2399. vxge_os_timer(vdev->vp_reset_timer,
  2400. vxge_poll_vp_reset, vdev, (HZ/2));
  2401. if (vdev->vp_lockup_timer.function == NULL)
  2402. vxge_os_timer(vdev->vp_lockup_timer,
  2403. vxge_poll_vp_lockup, vdev, (HZ/2));
  2404. set_bit(__VXGE_STATE_CARD_UP, &vdev->state);
  2405. smp_wmb();
  2406. if (vxge_hw_device_link_state_get(vdev->devh) == VXGE_HW_LINK_UP) {
  2407. netif_carrier_on(vdev->ndev);
  2408. printk(KERN_NOTICE "%s: Link Up\n", vdev->ndev->name);
  2409. vdev->stats.link_up++;
  2410. }
  2411. vxge_hw_device_intr_enable(vdev->devh);
  2412. smp_wmb();
  2413. for (i = 0; i < vdev->no_of_vpath; i++) {
  2414. vxge_hw_vpath_enable(vdev->vpaths[i].handle);
  2415. smp_wmb();
  2416. vxge_hw_vpath_rx_doorbell_init(vdev->vpaths[i].handle);
  2417. }
  2418. vxge_start_all_tx_queue(vdev);
  2419. goto out0;
  2420. out2:
  2421. vxge_rem_isr(vdev);
  2422. /* Disable napi */
  2423. if (vdev->config.intr_type != MSI_X)
  2424. napi_disable(&vdev->napi);
  2425. else {
  2426. for (i = 0; i < vdev->no_of_vpath; i++)
  2427. napi_disable(&vdev->vpaths[i].ring.napi);
  2428. }
  2429. out1:
  2430. vxge_close_vpaths(vdev, 0);
  2431. out0:
  2432. vxge_debug_entryexit(VXGE_TRACE,
  2433. "%s: %s:%d Exiting...",
  2434. dev->name, __func__, __LINE__);
  2435. return ret;
  2436. }
  2437. /* Loop throught the mac address list and delete all the entries */
  2438. void vxge_free_mac_add_list(struct vxge_vpath *vpath)
  2439. {
  2440. struct list_head *entry, *next;
  2441. if (list_empty(&vpath->mac_addr_list))
  2442. return;
  2443. list_for_each_safe(entry, next, &vpath->mac_addr_list) {
  2444. list_del(entry);
  2445. kfree((struct vxge_mac_addrs *)entry);
  2446. }
  2447. }
  2448. static void vxge_napi_del_all(struct vxgedev *vdev)
  2449. {
  2450. int i;
  2451. if (vdev->config.intr_type != MSI_X)
  2452. netif_napi_del(&vdev->napi);
  2453. else {
  2454. for (i = 0; i < vdev->no_of_vpath; i++)
  2455. netif_napi_del(&vdev->vpaths[i].ring.napi);
  2456. }
  2457. return;
  2458. }
  2459. int do_vxge_close(struct net_device *dev, int do_io)
  2460. {
  2461. enum vxge_hw_status status;
  2462. struct vxgedev *vdev;
  2463. struct __vxge_hw_device *hldev;
  2464. int i;
  2465. u64 val64, vpath_vector;
  2466. vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d",
  2467. dev->name, __func__, __LINE__);
  2468. vdev = (struct vxgedev *)netdev_priv(dev);
  2469. hldev = (struct __vxge_hw_device *) pci_get_drvdata(vdev->pdev);
  2470. if (unlikely(!is_vxge_card_up(vdev)))
  2471. return 0;
  2472. /* If vxge_handle_crit_err task is executing,
  2473. * wait till it completes. */
  2474. while (test_and_set_bit(__VXGE_STATE_RESET_CARD, &vdev->state))
  2475. msleep(50);
  2476. clear_bit(__VXGE_STATE_CARD_UP, &vdev->state);
  2477. if (do_io) {
  2478. /* Put the vpath back in normal mode */
  2479. vpath_vector = vxge_mBIT(vdev->vpaths[0].device_id);
  2480. status = vxge_hw_mgmt_reg_read(vdev->devh,
  2481. vxge_hw_mgmt_reg_type_mrpcim,
  2482. 0,
  2483. (ulong)offsetof(
  2484. struct vxge_hw_mrpcim_reg,
  2485. rts_mgr_cbasin_cfg),
  2486. &val64);
  2487. if (status == VXGE_HW_OK) {
  2488. val64 &= ~vpath_vector;
  2489. status = vxge_hw_mgmt_reg_write(vdev->devh,
  2490. vxge_hw_mgmt_reg_type_mrpcim,
  2491. 0,
  2492. (ulong)offsetof(
  2493. struct vxge_hw_mrpcim_reg,
  2494. rts_mgr_cbasin_cfg),
  2495. val64);
  2496. }
  2497. /* Remove the function 0 from promiscous mode */
  2498. vxge_hw_mgmt_reg_write(vdev->devh,
  2499. vxge_hw_mgmt_reg_type_mrpcim,
  2500. 0,
  2501. (ulong)offsetof(struct vxge_hw_mrpcim_reg,
  2502. rxmac_authorize_all_addr),
  2503. 0);
  2504. vxge_hw_mgmt_reg_write(vdev->devh,
  2505. vxge_hw_mgmt_reg_type_mrpcim,
  2506. 0,
  2507. (ulong)offsetof(struct vxge_hw_mrpcim_reg,
  2508. rxmac_authorize_all_vid),
  2509. 0);
  2510. smp_wmb();
  2511. }
  2512. del_timer_sync(&vdev->vp_lockup_timer);
  2513. del_timer_sync(&vdev->vp_reset_timer);
  2514. /* Disable napi */
  2515. if (vdev->config.intr_type != MSI_X)
  2516. napi_disable(&vdev->napi);
  2517. else {
  2518. for (i = 0; i < vdev->no_of_vpath; i++)
  2519. napi_disable(&vdev->vpaths[i].ring.napi);
  2520. }
  2521. netif_carrier_off(vdev->ndev);
  2522. printk(KERN_NOTICE "%s: Link Down\n", vdev->ndev->name);
  2523. vxge_stop_all_tx_queue(vdev);
  2524. /* Note that at this point xmit() is stopped by upper layer */
  2525. if (do_io)
  2526. vxge_hw_device_intr_disable(vdev->devh);
  2527. mdelay(1000);
  2528. vxge_rem_isr(vdev);
  2529. vxge_napi_del_all(vdev);
  2530. if (do_io)
  2531. vxge_reset_all_vpaths(vdev);
  2532. vxge_close_vpaths(vdev, 0);
  2533. vxge_debug_entryexit(VXGE_TRACE,
  2534. "%s: %s:%d Exiting...", dev->name, __func__, __LINE__);
  2535. clear_bit(__VXGE_STATE_CARD_UP, &driver_config->inta_dev_open);
  2536. clear_bit(__VXGE_STATE_RESET_CARD, &vdev->state);
  2537. return 0;
  2538. }
  2539. /**
  2540. * vxge_close
  2541. * @dev: device pointer.
  2542. *
  2543. * This is the stop entry point of the driver. It needs to undo exactly
  2544. * whatever was done by the open entry point, thus it's usually referred to
  2545. * as the close function.Among other things this function mainly stops the
  2546. * Rx side of the NIC and frees all the Rx buffers in the Rx rings.
  2547. * Return value: '0' on success and an appropriate (-)ve integer as
  2548. * defined in errno.h file on failure.
  2549. */
  2550. int
  2551. vxge_close(struct net_device *dev)
  2552. {
  2553. do_vxge_close(dev, 1);
  2554. return 0;
  2555. }
  2556. /**
  2557. * vxge_change_mtu
  2558. * @dev: net device pointer.
  2559. * @new_mtu :the new MTU size for the device.
  2560. *
  2561. * A driver entry point to change MTU size for the device. Before changing
  2562. * the MTU the device must be stopped.
  2563. */
  2564. static int vxge_change_mtu(struct net_device *dev, int new_mtu)
  2565. {
  2566. struct vxgedev *vdev = netdev_priv(dev);
  2567. vxge_debug_entryexit(vdev->level_trace,
  2568. "%s:%d", __func__, __LINE__);
  2569. if ((new_mtu < VXGE_HW_MIN_MTU) || (new_mtu > VXGE_HW_MAX_MTU)) {
  2570. vxge_debug_init(vdev->level_err,
  2571. "%s: mtu size is invalid", dev->name);
  2572. return -EPERM;
  2573. }
  2574. /* check if device is down already */
  2575. if (unlikely(!is_vxge_card_up(vdev))) {
  2576. /* just store new value, will use later on open() */
  2577. dev->mtu = new_mtu;
  2578. vxge_debug_init(vdev->level_err,
  2579. "%s", "device is down on MTU change");
  2580. return 0;
  2581. }
  2582. vxge_debug_init(vdev->level_trace,
  2583. "trying to apply new MTU %d", new_mtu);
  2584. if (vxge_close(dev))
  2585. return -EIO;
  2586. dev->mtu = new_mtu;
  2587. vdev->mtu = new_mtu;
  2588. if (vxge_open(dev))
  2589. return -EIO;
  2590. vxge_debug_init(vdev->level_trace,
  2591. "%s: MTU changed to %d", vdev->ndev->name, new_mtu);
  2592. vxge_debug_entryexit(vdev->level_trace,
  2593. "%s:%d Exiting...", __func__, __LINE__);
  2594. return 0;
  2595. }
  2596. /**
  2597. * vxge_get_stats
  2598. * @dev: pointer to the device structure
  2599. *
  2600. * Updates the device statistics structure. This function updates the device
  2601. * statistics structure in the net_device structure and returns a pointer
  2602. * to the same.
  2603. */
  2604. static struct net_device_stats *
  2605. vxge_get_stats(struct net_device *dev)
  2606. {
  2607. struct vxgedev *vdev;
  2608. struct net_device_stats *net_stats;
  2609. int k;
  2610. vdev = netdev_priv(dev);
  2611. net_stats = &vdev->stats.net_stats;
  2612. memset(net_stats, 0, sizeof(struct net_device_stats));
  2613. for (k = 0; k < vdev->no_of_vpath; k++) {
  2614. net_stats->rx_packets += vdev->vpaths[k].ring.stats.rx_frms;
  2615. net_stats->rx_bytes += vdev->vpaths[k].ring.stats.rx_bytes;
  2616. net_stats->rx_errors += vdev->vpaths[k].ring.stats.rx_errors;
  2617. net_stats->multicast += vdev->vpaths[k].ring.stats.rx_mcast;
  2618. net_stats->rx_dropped +=
  2619. vdev->vpaths[k].ring.stats.rx_dropped;
  2620. net_stats->tx_packets += vdev->vpaths[k].fifo.stats.tx_frms;
  2621. net_stats->tx_bytes += vdev->vpaths[k].fifo.stats.tx_bytes;
  2622. net_stats->tx_errors += vdev->vpaths[k].fifo.stats.tx_errors;
  2623. }
  2624. return net_stats;
  2625. }
  2626. /**
  2627. * vxge_ioctl
  2628. * @dev: Device pointer.
  2629. * @ifr: An IOCTL specific structure, that can contain a pointer to
  2630. * a proprietary structure used to pass information to the driver.
  2631. * @cmd: This is used to distinguish between the different commands that
  2632. * can be passed to the IOCTL functions.
  2633. *
  2634. * Entry point for the Ioctl.
  2635. */
  2636. static int vxge_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
  2637. {
  2638. return -EOPNOTSUPP;
  2639. }
  2640. /**
  2641. * vxge_tx_watchdog
  2642. * @dev: pointer to net device structure
  2643. *
  2644. * Watchdog for transmit side.
  2645. * This function is triggered if the Tx Queue is stopped
  2646. * for a pre-defined amount of time when the Interface is still up.
  2647. */
  2648. static void
  2649. vxge_tx_watchdog(struct net_device *dev)
  2650. {
  2651. struct vxgedev *vdev;
  2652. vxge_debug_entryexit(VXGE_TRACE, "%s:%d", __func__, __LINE__);
  2653. vdev = (struct vxgedev *)netdev_priv(dev);
  2654. vdev->cric_err_event = VXGE_HW_EVENT_RESET_START;
  2655. vxge_reset(vdev);
  2656. vxge_debug_entryexit(VXGE_TRACE,
  2657. "%s:%d Exiting...", __func__, __LINE__);
  2658. }
  2659. /**
  2660. * vxge_vlan_rx_register
  2661. * @dev: net device pointer.
  2662. * @grp: vlan group
  2663. *
  2664. * Vlan group registration
  2665. */
  2666. static void
  2667. vxge_vlan_rx_register(struct net_device *dev, struct vlan_group *grp)
  2668. {
  2669. struct vxgedev *vdev;
  2670. struct vxge_vpath *vpath;
  2671. int vp;
  2672. u64 vid;
  2673. enum vxge_hw_status status;
  2674. int i;
  2675. vxge_debug_entryexit(VXGE_TRACE, "%s:%d", __func__, __LINE__);
  2676. vdev = (struct vxgedev *)netdev_priv(dev);
  2677. vpath = &vdev->vpaths[0];
  2678. if ((NULL == grp) && (vpath->is_open)) {
  2679. /* Get the first vlan */
  2680. status = vxge_hw_vpath_vid_get(vpath->handle, &vid);
  2681. while (status == VXGE_HW_OK) {
  2682. /* Delete this vlan from the vid table */
  2683. for (vp = 0; vp < vdev->no_of_vpath; vp++) {
  2684. vpath = &vdev->vpaths[vp];
  2685. if (!vpath->is_open)
  2686. continue;
  2687. vxge_hw_vpath_vid_delete(vpath->handle, vid);
  2688. }
  2689. /* Get the next vlan to be deleted */
  2690. vpath = &vdev->vpaths[0];
  2691. status = vxge_hw_vpath_vid_get(vpath->handle, &vid);
  2692. }
  2693. }
  2694. vdev->vlgrp = grp;
  2695. for (i = 0; i < vdev->no_of_vpath; i++) {
  2696. if (vdev->vpaths[i].is_configured)
  2697. vdev->vpaths[i].ring.vlgrp = grp;
  2698. }
  2699. vxge_debug_entryexit(VXGE_TRACE,
  2700. "%s:%d Exiting...", __func__, __LINE__);
  2701. }
  2702. /**
  2703. * vxge_vlan_rx_add_vid
  2704. * @dev: net device pointer.
  2705. * @vid: vid
  2706. *
  2707. * Add the vlan id to the devices vlan id table
  2708. */
  2709. static void
  2710. vxge_vlan_rx_add_vid(struct net_device *dev, unsigned short vid)
  2711. {
  2712. struct vxgedev *vdev;
  2713. struct vxge_vpath *vpath;
  2714. int vp_id;
  2715. vdev = (struct vxgedev *)netdev_priv(dev);
  2716. /* Add these vlan to the vid table */
  2717. for (vp_id = 0; vp_id < vdev->no_of_vpath; vp_id++) {
  2718. vpath = &vdev->vpaths[vp_id];
  2719. if (!vpath->is_open)
  2720. continue;
  2721. vxge_hw_vpath_vid_add(vpath->handle, vid);
  2722. }
  2723. }
  2724. /**
  2725. * vxge_vlan_rx_add_vid
  2726. * @dev: net device pointer.
  2727. * @vid: vid
  2728. *
  2729. * Remove the vlan id from the device's vlan id table
  2730. */
  2731. static void
  2732. vxge_vlan_rx_kill_vid(struct net_device *dev, unsigned short vid)
  2733. {
  2734. struct vxgedev *vdev;
  2735. struct vxge_vpath *vpath;
  2736. int vp_id;
  2737. vxge_debug_entryexit(VXGE_TRACE, "%s:%d", __func__, __LINE__);
  2738. vdev = (struct vxgedev *)netdev_priv(dev);
  2739. vlan_group_set_device(vdev->vlgrp, vid, NULL);
  2740. /* Delete this vlan from the vid table */
  2741. for (vp_id = 0; vp_id < vdev->no_of_vpath; vp_id++) {
  2742. vpath = &vdev->vpaths[vp_id];
  2743. if (!vpath->is_open)
  2744. continue;
  2745. vxge_hw_vpath_vid_delete(vpath->handle, vid);
  2746. }
  2747. vxge_debug_entryexit(VXGE_TRACE,
  2748. "%s:%d Exiting...", __func__, __LINE__);
  2749. }
  2750. static const struct net_device_ops vxge_netdev_ops = {
  2751. .ndo_open = vxge_open,
  2752. .ndo_stop = vxge_close,
  2753. .ndo_get_stats = vxge_get_stats,
  2754. .ndo_start_xmit = vxge_xmit,
  2755. .ndo_validate_addr = eth_validate_addr,
  2756. .ndo_set_multicast_list = vxge_set_multicast,
  2757. .ndo_do_ioctl = vxge_ioctl,
  2758. .ndo_set_mac_address = vxge_set_mac_addr,
  2759. .ndo_change_mtu = vxge_change_mtu,
  2760. .ndo_vlan_rx_register = vxge_vlan_rx_register,
  2761. .ndo_vlan_rx_kill_vid = vxge_vlan_rx_kill_vid,
  2762. .ndo_vlan_rx_add_vid = vxge_vlan_rx_add_vid,
  2763. .ndo_tx_timeout = vxge_tx_watchdog,
  2764. #ifdef CONFIG_NET_POLL_CONTROLLER
  2765. .ndo_poll_controller = vxge_netpoll,
  2766. #endif
  2767. };
  2768. int __devinit vxge_device_register(struct __vxge_hw_device *hldev,
  2769. struct vxge_config *config,
  2770. int high_dma, int no_of_vpath,
  2771. struct vxgedev **vdev_out)
  2772. {
  2773. struct net_device *ndev;
  2774. enum vxge_hw_status status = VXGE_HW_OK;
  2775. struct vxgedev *vdev;
  2776. int i, ret = 0, no_of_queue = 1;
  2777. u64 stat;
  2778. *vdev_out = NULL;
  2779. if (config->tx_steering_type == TX_MULTIQ_STEERING)
  2780. no_of_queue = no_of_vpath;
  2781. ndev = alloc_etherdev_mq(sizeof(struct vxgedev),
  2782. no_of_queue);
  2783. if (ndev == NULL) {
  2784. vxge_debug_init(
  2785. vxge_hw_device_trace_level_get(hldev),
  2786. "%s : device allocation failed", __func__);
  2787. ret = -ENODEV;
  2788. goto _out0;
  2789. }
  2790. vxge_debug_entryexit(
  2791. vxge_hw_device_trace_level_get(hldev),
  2792. "%s: %s:%d Entering...",
  2793. ndev->name, __func__, __LINE__);
  2794. vdev = netdev_priv(ndev);
  2795. memset(vdev, 0, sizeof(struct vxgedev));
  2796. vdev->ndev = ndev;
  2797. vdev->devh = hldev;
  2798. vdev->pdev = hldev->pdev;
  2799. memcpy(&vdev->config, config, sizeof(struct vxge_config));
  2800. vdev->rx_csum = 1; /* Enable Rx CSUM by default. */
  2801. SET_NETDEV_DEV(ndev, &vdev->pdev->dev);
  2802. ndev->features |= NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX |
  2803. NETIF_F_HW_VLAN_FILTER;
  2804. /* Driver entry points */
  2805. ndev->irq = vdev->pdev->irq;
  2806. ndev->base_addr = (unsigned long) hldev->bar0;
  2807. ndev->netdev_ops = &vxge_netdev_ops;
  2808. ndev->watchdog_timeo = VXGE_LL_WATCH_DOG_TIMEOUT;
  2809. initialize_ethtool_ops(ndev);
  2810. /* Allocate memory for vpath */
  2811. vdev->vpaths = kzalloc((sizeof(struct vxge_vpath)) *
  2812. no_of_vpath, GFP_KERNEL);
  2813. if (!vdev->vpaths) {
  2814. vxge_debug_init(VXGE_ERR,
  2815. "%s: vpath memory allocation failed",
  2816. vdev->ndev->name);
  2817. ret = -ENODEV;
  2818. goto _out1;
  2819. }
  2820. ndev->features |= NETIF_F_SG;
  2821. ndev->features |= NETIF_F_HW_CSUM;
  2822. vxge_debug_init(vxge_hw_device_trace_level_get(hldev),
  2823. "%s : checksuming enabled", __func__);
  2824. if (high_dma) {
  2825. ndev->features |= NETIF_F_HIGHDMA;
  2826. vxge_debug_init(vxge_hw_device_trace_level_get(hldev),
  2827. "%s : using High DMA", __func__);
  2828. }
  2829. ndev->features |= NETIF_F_TSO | NETIF_F_TSO6;
  2830. if (vdev->config.gro_enable)
  2831. ndev->features |= NETIF_F_GRO;
  2832. if (vdev->config.tx_steering_type == TX_MULTIQ_STEERING)
  2833. ndev->real_num_tx_queues = no_of_vpath;
  2834. #ifdef NETIF_F_LLTX
  2835. ndev->features |= NETIF_F_LLTX;
  2836. #endif
  2837. for (i = 0; i < no_of_vpath; i++)
  2838. spin_lock_init(&vdev->vpaths[i].fifo.tx_lock);
  2839. if (register_netdev(ndev)) {
  2840. vxge_debug_init(vxge_hw_device_trace_level_get(hldev),
  2841. "%s: %s : device registration failed!",
  2842. ndev->name, __func__);
  2843. ret = -ENODEV;
  2844. goto _out2;
  2845. }
  2846. /* Set the factory defined MAC address initially */
  2847. ndev->addr_len = ETH_ALEN;
  2848. /* Make Link state as off at this point, when the Link change
  2849. * interrupt comes the state will be automatically changed to
  2850. * the right state.
  2851. */
  2852. netif_carrier_off(ndev);
  2853. vxge_debug_init(vxge_hw_device_trace_level_get(hldev),
  2854. "%s: Ethernet device registered",
  2855. ndev->name);
  2856. *vdev_out = vdev;
  2857. /* Resetting the Device stats */
  2858. status = vxge_hw_mrpcim_stats_access(
  2859. hldev,
  2860. VXGE_HW_STATS_OP_CLEAR_ALL_STATS,
  2861. 0,
  2862. 0,
  2863. &stat);
  2864. if (status == VXGE_HW_ERR_PRIVILAGED_OPEARATION)
  2865. vxge_debug_init(
  2866. vxge_hw_device_trace_level_get(hldev),
  2867. "%s: device stats clear returns"
  2868. "VXGE_HW_ERR_PRIVILAGED_OPEARATION", ndev->name);
  2869. vxge_debug_entryexit(vxge_hw_device_trace_level_get(hldev),
  2870. "%s: %s:%d Exiting...",
  2871. ndev->name, __func__, __LINE__);
  2872. return ret;
  2873. _out2:
  2874. kfree(vdev->vpaths);
  2875. _out1:
  2876. free_netdev(ndev);
  2877. _out0:
  2878. return ret;
  2879. }
  2880. /*
  2881. * vxge_device_unregister
  2882. *
  2883. * This function will unregister and free network device
  2884. */
  2885. void
  2886. vxge_device_unregister(struct __vxge_hw_device *hldev)
  2887. {
  2888. struct vxgedev *vdev;
  2889. struct net_device *dev;
  2890. char buf[IFNAMSIZ];
  2891. #if ((VXGE_DEBUG_INIT & VXGE_DEBUG_MASK) || \
  2892. (VXGE_DEBUG_ENTRYEXIT & VXGE_DEBUG_MASK))
  2893. u32 level_trace;
  2894. #endif
  2895. dev = hldev->ndev;
  2896. vdev = netdev_priv(dev);
  2897. #if ((VXGE_DEBUG_INIT & VXGE_DEBUG_MASK) || \
  2898. (VXGE_DEBUG_ENTRYEXIT & VXGE_DEBUG_MASK))
  2899. level_trace = vdev->level_trace;
  2900. #endif
  2901. vxge_debug_entryexit(level_trace,
  2902. "%s: %s:%d", vdev->ndev->name, __func__, __LINE__);
  2903. memcpy(buf, vdev->ndev->name, IFNAMSIZ);
  2904. /* in 2.6 will call stop() if device is up */
  2905. unregister_netdev(dev);
  2906. flush_scheduled_work();
  2907. vxge_debug_init(level_trace, "%s: ethernet device unregistered", buf);
  2908. vxge_debug_entryexit(level_trace,
  2909. "%s: %s:%d Exiting...", buf, __func__, __LINE__);
  2910. }
  2911. /*
  2912. * vxge_callback_crit_err
  2913. *
  2914. * This function is called by the alarm handler in interrupt context.
  2915. * Driver must analyze it based on the event type.
  2916. */
  2917. static void
  2918. vxge_callback_crit_err(struct __vxge_hw_device *hldev,
  2919. enum vxge_hw_event type, u64 vp_id)
  2920. {
  2921. struct net_device *dev = hldev->ndev;
  2922. struct vxgedev *vdev = (struct vxgedev *)netdev_priv(dev);
  2923. int vpath_idx;
  2924. vxge_debug_entryexit(vdev->level_trace,
  2925. "%s: %s:%d", vdev->ndev->name, __func__, __LINE__);
  2926. /* Note: This event type should be used for device wide
  2927. * indications only - Serious errors, Slot freeze and critical errors
  2928. */
  2929. vdev->cric_err_event = type;
  2930. for (vpath_idx = 0; vpath_idx < vdev->no_of_vpath; vpath_idx++)
  2931. if (vdev->vpaths[vpath_idx].device_id == vp_id)
  2932. break;
  2933. if (!test_bit(__VXGE_STATE_RESET_CARD, &vdev->state)) {
  2934. if (type == VXGE_HW_EVENT_SLOT_FREEZE) {
  2935. vxge_debug_init(VXGE_ERR,
  2936. "%s: Slot is frozen", vdev->ndev->name);
  2937. } else if (type == VXGE_HW_EVENT_SERR) {
  2938. vxge_debug_init(VXGE_ERR,
  2939. "%s: Encountered Serious Error",
  2940. vdev->ndev->name);
  2941. } else if (type == VXGE_HW_EVENT_CRITICAL_ERR)
  2942. vxge_debug_init(VXGE_ERR,
  2943. "%s: Encountered Critical Error",
  2944. vdev->ndev->name);
  2945. }
  2946. if ((type == VXGE_HW_EVENT_SERR) ||
  2947. (type == VXGE_HW_EVENT_SLOT_FREEZE)) {
  2948. if (unlikely(vdev->exec_mode))
  2949. clear_bit(__VXGE_STATE_CARD_UP, &vdev->state);
  2950. } else if (type == VXGE_HW_EVENT_CRITICAL_ERR) {
  2951. vxge_hw_device_mask_all(hldev);
  2952. if (unlikely(vdev->exec_mode))
  2953. clear_bit(__VXGE_STATE_CARD_UP, &vdev->state);
  2954. } else if ((type == VXGE_HW_EVENT_FIFO_ERR) ||
  2955. (type == VXGE_HW_EVENT_VPATH_ERR)) {
  2956. if (unlikely(vdev->exec_mode))
  2957. clear_bit(__VXGE_STATE_CARD_UP, &vdev->state);
  2958. else {
  2959. /* check if this vpath is already set for reset */
  2960. if (!test_and_set_bit(vpath_idx, &vdev->vp_reset)) {
  2961. /* disable interrupts for this vpath */
  2962. vxge_vpath_intr_disable(vdev, vpath_idx);
  2963. /* stop the queue for this vpath */
  2964. vxge_stop_tx_queue(&vdev->vpaths[vpath_idx].
  2965. fifo);
  2966. }
  2967. }
  2968. }
  2969. vxge_debug_entryexit(vdev->level_trace,
  2970. "%s: %s:%d Exiting...",
  2971. vdev->ndev->name, __func__, __LINE__);
  2972. }
  2973. static void verify_bandwidth(void)
  2974. {
  2975. int i, band_width, total = 0, equal_priority = 0;
  2976. /* 1. If user enters 0 for some fifo, give equal priority to all */
  2977. for (i = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++) {
  2978. if (bw_percentage[i] == 0) {
  2979. equal_priority = 1;
  2980. break;
  2981. }
  2982. }
  2983. if (!equal_priority) {
  2984. /* 2. If sum exceeds 100, give equal priority to all */
  2985. for (i = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++) {
  2986. if (bw_percentage[i] == 0xFF)
  2987. break;
  2988. total += bw_percentage[i];
  2989. if (total > VXGE_HW_VPATH_BANDWIDTH_MAX) {
  2990. equal_priority = 1;
  2991. break;
  2992. }
  2993. }
  2994. }
  2995. if (!equal_priority) {
  2996. /* Is all the bandwidth consumed? */
  2997. if (total < VXGE_HW_VPATH_BANDWIDTH_MAX) {
  2998. if (i < VXGE_HW_MAX_VIRTUAL_PATHS) {
  2999. /* Split rest of bw equally among next VPs*/
  3000. band_width =
  3001. (VXGE_HW_VPATH_BANDWIDTH_MAX - total) /
  3002. (VXGE_HW_MAX_VIRTUAL_PATHS - i);
  3003. if (band_width < 2) /* min of 2% */
  3004. equal_priority = 1;
  3005. else {
  3006. for (; i < VXGE_HW_MAX_VIRTUAL_PATHS;
  3007. i++)
  3008. bw_percentage[i] =
  3009. band_width;
  3010. }
  3011. }
  3012. } else if (i < VXGE_HW_MAX_VIRTUAL_PATHS)
  3013. equal_priority = 1;
  3014. }
  3015. if (equal_priority) {
  3016. vxge_debug_init(VXGE_ERR,
  3017. "%s: Assigning equal bandwidth to all the vpaths",
  3018. VXGE_DRIVER_NAME);
  3019. bw_percentage[0] = VXGE_HW_VPATH_BANDWIDTH_MAX /
  3020. VXGE_HW_MAX_VIRTUAL_PATHS;
  3021. for (i = 1; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++)
  3022. bw_percentage[i] = bw_percentage[0];
  3023. }
  3024. return;
  3025. }
  3026. /*
  3027. * Vpath configuration
  3028. */
  3029. static int __devinit vxge_config_vpaths(
  3030. struct vxge_hw_device_config *device_config,
  3031. u64 vpath_mask, struct vxge_config *config_param)
  3032. {
  3033. int i, no_of_vpaths = 0, default_no_vpath = 0, temp;
  3034. u32 txdl_size, txdl_per_memblock;
  3035. temp = driver_config->vpath_per_dev;
  3036. if ((driver_config->vpath_per_dev == VXGE_USE_DEFAULT) &&
  3037. (max_config_dev == VXGE_MAX_CONFIG_DEV)) {
  3038. /* No more CPU. Return vpath number as zero.*/
  3039. if (driver_config->g_no_cpus == -1)
  3040. return 0;
  3041. if (!driver_config->g_no_cpus)
  3042. driver_config->g_no_cpus = num_online_cpus();
  3043. driver_config->vpath_per_dev = driver_config->g_no_cpus >> 1;
  3044. if (!driver_config->vpath_per_dev)
  3045. driver_config->vpath_per_dev = 1;
  3046. for (i = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++)
  3047. if (!vxge_bVALn(vpath_mask, i, 1))
  3048. continue;
  3049. else
  3050. default_no_vpath++;
  3051. if (default_no_vpath < driver_config->vpath_per_dev)
  3052. driver_config->vpath_per_dev = default_no_vpath;
  3053. driver_config->g_no_cpus = driver_config->g_no_cpus -
  3054. (driver_config->vpath_per_dev * 2);
  3055. if (driver_config->g_no_cpus <= 0)
  3056. driver_config->g_no_cpus = -1;
  3057. }
  3058. if (driver_config->vpath_per_dev == 1) {
  3059. vxge_debug_ll_config(VXGE_TRACE,
  3060. "%s: Disable tx and rx steering, "
  3061. "as single vpath is configured", VXGE_DRIVER_NAME);
  3062. config_param->rth_steering = NO_STEERING;
  3063. config_param->tx_steering_type = NO_STEERING;
  3064. device_config->rth_en = 0;
  3065. }
  3066. /* configure bandwidth */
  3067. for (i = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++)
  3068. device_config->vp_config[i].min_bandwidth = bw_percentage[i];
  3069. for (i = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++) {
  3070. device_config->vp_config[i].vp_id = i;
  3071. device_config->vp_config[i].mtu = VXGE_HW_DEFAULT_MTU;
  3072. if (no_of_vpaths < driver_config->vpath_per_dev) {
  3073. if (!vxge_bVALn(vpath_mask, i, 1)) {
  3074. vxge_debug_ll_config(VXGE_TRACE,
  3075. "%s: vpath: %d is not available",
  3076. VXGE_DRIVER_NAME, i);
  3077. continue;
  3078. } else {
  3079. vxge_debug_ll_config(VXGE_TRACE,
  3080. "%s: vpath: %d available",
  3081. VXGE_DRIVER_NAME, i);
  3082. no_of_vpaths++;
  3083. }
  3084. } else {
  3085. vxge_debug_ll_config(VXGE_TRACE,
  3086. "%s: vpath: %d is not configured, "
  3087. "max_config_vpath exceeded",
  3088. VXGE_DRIVER_NAME, i);
  3089. break;
  3090. }
  3091. /* Configure Tx fifo's */
  3092. device_config->vp_config[i].fifo.enable =
  3093. VXGE_HW_FIFO_ENABLE;
  3094. device_config->vp_config[i].fifo.max_frags =
  3095. MAX_SKB_FRAGS;
  3096. device_config->vp_config[i].fifo.memblock_size =
  3097. VXGE_HW_MIN_FIFO_MEMBLOCK_SIZE;
  3098. txdl_size = MAX_SKB_FRAGS * sizeof(struct vxge_hw_fifo_txd);
  3099. txdl_per_memblock = VXGE_HW_MIN_FIFO_MEMBLOCK_SIZE / txdl_size;
  3100. device_config->vp_config[i].fifo.fifo_blocks =
  3101. ((VXGE_DEF_FIFO_LENGTH - 1) / txdl_per_memblock) + 1;
  3102. device_config->vp_config[i].fifo.intr =
  3103. VXGE_HW_FIFO_QUEUE_INTR_DISABLE;
  3104. /* Configure tti properties */
  3105. device_config->vp_config[i].tti.intr_enable =
  3106. VXGE_HW_TIM_INTR_ENABLE;
  3107. device_config->vp_config[i].tti.btimer_val =
  3108. (VXGE_TTI_BTIMER_VAL * 1000) / 272;
  3109. device_config->vp_config[i].tti.timer_ac_en =
  3110. VXGE_HW_TIM_TIMER_AC_ENABLE;
  3111. /* For msi-x with napi (each vector
  3112. has a handler of its own) -
  3113. Set CI to OFF for all vpaths */
  3114. device_config->vp_config[i].tti.timer_ci_en =
  3115. VXGE_HW_TIM_TIMER_CI_DISABLE;
  3116. device_config->vp_config[i].tti.timer_ri_en =
  3117. VXGE_HW_TIM_TIMER_RI_DISABLE;
  3118. device_config->vp_config[i].tti.util_sel =
  3119. VXGE_HW_TIM_UTIL_SEL_LEGACY_TX_NET_UTIL;
  3120. device_config->vp_config[i].tti.ltimer_val =
  3121. (VXGE_TTI_LTIMER_VAL * 1000) / 272;
  3122. device_config->vp_config[i].tti.rtimer_val =
  3123. (VXGE_TTI_RTIMER_VAL * 1000) / 272;
  3124. device_config->vp_config[i].tti.urange_a = TTI_TX_URANGE_A;
  3125. device_config->vp_config[i].tti.urange_b = TTI_TX_URANGE_B;
  3126. device_config->vp_config[i].tti.urange_c = TTI_TX_URANGE_C;
  3127. device_config->vp_config[i].tti.uec_a = TTI_TX_UFC_A;
  3128. device_config->vp_config[i].tti.uec_b = TTI_TX_UFC_B;
  3129. device_config->vp_config[i].tti.uec_c = TTI_TX_UFC_C;
  3130. device_config->vp_config[i].tti.uec_d = TTI_TX_UFC_D;
  3131. /* Configure Rx rings */
  3132. device_config->vp_config[i].ring.enable =
  3133. VXGE_HW_RING_ENABLE;
  3134. device_config->vp_config[i].ring.ring_blocks =
  3135. VXGE_HW_DEF_RING_BLOCKS;
  3136. device_config->vp_config[i].ring.buffer_mode =
  3137. VXGE_HW_RING_RXD_BUFFER_MODE_1;
  3138. device_config->vp_config[i].ring.rxds_limit =
  3139. VXGE_HW_DEF_RING_RXDS_LIMIT;
  3140. device_config->vp_config[i].ring.scatter_mode =
  3141. VXGE_HW_RING_SCATTER_MODE_A;
  3142. /* Configure rti properties */
  3143. device_config->vp_config[i].rti.intr_enable =
  3144. VXGE_HW_TIM_INTR_ENABLE;
  3145. device_config->vp_config[i].rti.btimer_val =
  3146. (VXGE_RTI_BTIMER_VAL * 1000)/272;
  3147. device_config->vp_config[i].rti.timer_ac_en =
  3148. VXGE_HW_TIM_TIMER_AC_ENABLE;
  3149. device_config->vp_config[i].rti.timer_ci_en =
  3150. VXGE_HW_TIM_TIMER_CI_DISABLE;
  3151. device_config->vp_config[i].rti.timer_ri_en =
  3152. VXGE_HW_TIM_TIMER_RI_DISABLE;
  3153. device_config->vp_config[i].rti.util_sel =
  3154. VXGE_HW_TIM_UTIL_SEL_LEGACY_RX_NET_UTIL;
  3155. device_config->vp_config[i].rti.urange_a =
  3156. RTI_RX_URANGE_A;
  3157. device_config->vp_config[i].rti.urange_b =
  3158. RTI_RX_URANGE_B;
  3159. device_config->vp_config[i].rti.urange_c =
  3160. RTI_RX_URANGE_C;
  3161. device_config->vp_config[i].rti.uec_a = RTI_RX_UFC_A;
  3162. device_config->vp_config[i].rti.uec_b = RTI_RX_UFC_B;
  3163. device_config->vp_config[i].rti.uec_c = RTI_RX_UFC_C;
  3164. device_config->vp_config[i].rti.uec_d = RTI_RX_UFC_D;
  3165. device_config->vp_config[i].rti.rtimer_val =
  3166. (VXGE_RTI_RTIMER_VAL * 1000) / 272;
  3167. device_config->vp_config[i].rti.ltimer_val =
  3168. (VXGE_RTI_LTIMER_VAL * 1000) / 272;
  3169. device_config->vp_config[i].rpa_strip_vlan_tag =
  3170. vlan_tag_strip;
  3171. }
  3172. driver_config->vpath_per_dev = temp;
  3173. return no_of_vpaths;
  3174. }
  3175. /* initialize device configuratrions */
  3176. static void __devinit vxge_device_config_init(
  3177. struct vxge_hw_device_config *device_config,
  3178. int *intr_type)
  3179. {
  3180. /* Used for CQRQ/SRQ. */
  3181. device_config->dma_blockpool_initial =
  3182. VXGE_HW_INITIAL_DMA_BLOCK_POOL_SIZE;
  3183. device_config->dma_blockpool_max =
  3184. VXGE_HW_MAX_DMA_BLOCK_POOL_SIZE;
  3185. if (max_mac_vpath > VXGE_MAX_MAC_ADDR_COUNT)
  3186. max_mac_vpath = VXGE_MAX_MAC_ADDR_COUNT;
  3187. #ifndef CONFIG_PCI_MSI
  3188. vxge_debug_init(VXGE_ERR,
  3189. "%s: This Kernel does not support "
  3190. "MSI-X. Defaulting to INTA", VXGE_DRIVER_NAME);
  3191. *intr_type = INTA;
  3192. #endif
  3193. /* Configure whether MSI-X or IRQL. */
  3194. switch (*intr_type) {
  3195. case INTA:
  3196. device_config->intr_mode = VXGE_HW_INTR_MODE_IRQLINE;
  3197. break;
  3198. case MSI_X:
  3199. device_config->intr_mode = VXGE_HW_INTR_MODE_MSIX;
  3200. break;
  3201. }
  3202. /* Timer period between device poll */
  3203. device_config->device_poll_millis = VXGE_TIMER_DELAY;
  3204. /* Configure mac based steering. */
  3205. device_config->rts_mac_en = addr_learn_en;
  3206. /* Configure Vpaths */
  3207. device_config->rth_it_type = VXGE_HW_RTH_IT_TYPE_MULTI_IT;
  3208. vxge_debug_ll_config(VXGE_TRACE, "%s : Device Config Params ",
  3209. __func__);
  3210. vxge_debug_ll_config(VXGE_TRACE, "dma_blockpool_initial : %d",
  3211. device_config->dma_blockpool_initial);
  3212. vxge_debug_ll_config(VXGE_TRACE, "dma_blockpool_max : %d",
  3213. device_config->dma_blockpool_max);
  3214. vxge_debug_ll_config(VXGE_TRACE, "intr_mode : %d",
  3215. device_config->intr_mode);
  3216. vxge_debug_ll_config(VXGE_TRACE, "device_poll_millis : %d",
  3217. device_config->device_poll_millis);
  3218. vxge_debug_ll_config(VXGE_TRACE, "rts_mac_en : %d",
  3219. device_config->rts_mac_en);
  3220. vxge_debug_ll_config(VXGE_TRACE, "rth_en : %d",
  3221. device_config->rth_en);
  3222. vxge_debug_ll_config(VXGE_TRACE, "rth_it_type : %d",
  3223. device_config->rth_it_type);
  3224. }
  3225. static void __devinit vxge_print_parm(struct vxgedev *vdev, u64 vpath_mask)
  3226. {
  3227. int i;
  3228. vxge_debug_init(VXGE_TRACE,
  3229. "%s: %d Vpath(s) opened",
  3230. vdev->ndev->name, vdev->no_of_vpath);
  3231. switch (vdev->config.intr_type) {
  3232. case INTA:
  3233. vxge_debug_init(VXGE_TRACE,
  3234. "%s: Interrupt type INTA", vdev->ndev->name);
  3235. break;
  3236. case MSI_X:
  3237. vxge_debug_init(VXGE_TRACE,
  3238. "%s: Interrupt type MSI-X", vdev->ndev->name);
  3239. break;
  3240. }
  3241. if (vdev->config.rth_steering) {
  3242. vxge_debug_init(VXGE_TRACE,
  3243. "%s: RTH steering enabled for TCP_IPV4",
  3244. vdev->ndev->name);
  3245. } else {
  3246. vxge_debug_init(VXGE_TRACE,
  3247. "%s: RTH steering disabled", vdev->ndev->name);
  3248. }
  3249. switch (vdev->config.tx_steering_type) {
  3250. case NO_STEERING:
  3251. vxge_debug_init(VXGE_TRACE,
  3252. "%s: Tx steering disabled", vdev->ndev->name);
  3253. break;
  3254. case TX_PRIORITY_STEERING:
  3255. vxge_debug_init(VXGE_TRACE,
  3256. "%s: Unsupported tx steering option",
  3257. vdev->ndev->name);
  3258. vxge_debug_init(VXGE_TRACE,
  3259. "%s: Tx steering disabled", vdev->ndev->name);
  3260. vdev->config.tx_steering_type = 0;
  3261. break;
  3262. case TX_VLAN_STEERING:
  3263. vxge_debug_init(VXGE_TRACE,
  3264. "%s: Unsupported tx steering option",
  3265. vdev->ndev->name);
  3266. vxge_debug_init(VXGE_TRACE,
  3267. "%s: Tx steering disabled", vdev->ndev->name);
  3268. vdev->config.tx_steering_type = 0;
  3269. break;
  3270. case TX_MULTIQ_STEERING:
  3271. vxge_debug_init(VXGE_TRACE,
  3272. "%s: Tx multiqueue steering enabled",
  3273. vdev->ndev->name);
  3274. break;
  3275. case TX_PORT_STEERING:
  3276. vxge_debug_init(VXGE_TRACE,
  3277. "%s: Tx port steering enabled",
  3278. vdev->ndev->name);
  3279. break;
  3280. default:
  3281. vxge_debug_init(VXGE_ERR,
  3282. "%s: Unsupported tx steering type",
  3283. vdev->ndev->name);
  3284. vxge_debug_init(VXGE_TRACE,
  3285. "%s: Tx steering disabled", vdev->ndev->name);
  3286. vdev->config.tx_steering_type = 0;
  3287. }
  3288. if (vdev->config.gro_enable) {
  3289. vxge_debug_init(VXGE_ERR,
  3290. "%s: Generic receive offload enabled",
  3291. vdev->ndev->name);
  3292. } else
  3293. vxge_debug_init(VXGE_TRACE,
  3294. "%s: Generic receive offload disabled",
  3295. vdev->ndev->name);
  3296. if (vdev->config.addr_learn_en)
  3297. vxge_debug_init(VXGE_TRACE,
  3298. "%s: MAC Address learning enabled", vdev->ndev->name);
  3299. vxge_debug_init(VXGE_TRACE,
  3300. "%s: Rx doorbell mode enabled", vdev->ndev->name);
  3301. for (i = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++) {
  3302. if (!vxge_bVALn(vpath_mask, i, 1))
  3303. continue;
  3304. vxge_debug_ll_config(VXGE_TRACE,
  3305. "%s: MTU size - %d", vdev->ndev->name,
  3306. ((struct __vxge_hw_device *)(vdev->devh))->
  3307. config.vp_config[i].mtu);
  3308. vxge_debug_init(VXGE_TRACE,
  3309. "%s: VLAN tag stripping %s", vdev->ndev->name,
  3310. ((struct __vxge_hw_device *)(vdev->devh))->
  3311. config.vp_config[i].rpa_strip_vlan_tag
  3312. ? "Enabled" : "Disabled");
  3313. vxge_debug_init(VXGE_TRACE,
  3314. "%s: Ring blocks : %d", vdev->ndev->name,
  3315. ((struct __vxge_hw_device *)(vdev->devh))->
  3316. config.vp_config[i].ring.ring_blocks);
  3317. vxge_debug_init(VXGE_TRACE,
  3318. "%s: Fifo blocks : %d", vdev->ndev->name,
  3319. ((struct __vxge_hw_device *)(vdev->devh))->
  3320. config.vp_config[i].fifo.fifo_blocks);
  3321. vxge_debug_ll_config(VXGE_TRACE,
  3322. "%s: Max frags : %d", vdev->ndev->name,
  3323. ((struct __vxge_hw_device *)(vdev->devh))->
  3324. config.vp_config[i].fifo.max_frags);
  3325. break;
  3326. }
  3327. }
  3328. #ifdef CONFIG_PM
  3329. /**
  3330. * vxge_pm_suspend - vxge power management suspend entry point
  3331. *
  3332. */
  3333. static int vxge_pm_suspend(struct pci_dev *pdev, pm_message_t state)
  3334. {
  3335. return -ENOSYS;
  3336. }
  3337. /**
  3338. * vxge_pm_resume - vxge power management resume entry point
  3339. *
  3340. */
  3341. static int vxge_pm_resume(struct pci_dev *pdev)
  3342. {
  3343. return -ENOSYS;
  3344. }
  3345. #endif
  3346. /**
  3347. * vxge_io_error_detected - called when PCI error is detected
  3348. * @pdev: Pointer to PCI device
  3349. * @state: The current pci connection state
  3350. *
  3351. * This function is called after a PCI bus error affecting
  3352. * this device has been detected.
  3353. */
  3354. static pci_ers_result_t vxge_io_error_detected(struct pci_dev *pdev,
  3355. pci_channel_state_t state)
  3356. {
  3357. struct __vxge_hw_device *hldev =
  3358. (struct __vxge_hw_device *) pci_get_drvdata(pdev);
  3359. struct net_device *netdev = hldev->ndev;
  3360. netif_device_detach(netdev);
  3361. if (state == pci_channel_io_perm_failure)
  3362. return PCI_ERS_RESULT_DISCONNECT;
  3363. if (netif_running(netdev)) {
  3364. /* Bring down the card, while avoiding PCI I/O */
  3365. do_vxge_close(netdev, 0);
  3366. }
  3367. pci_disable_device(pdev);
  3368. return PCI_ERS_RESULT_NEED_RESET;
  3369. }
  3370. /**
  3371. * vxge_io_slot_reset - called after the pci bus has been reset.
  3372. * @pdev: Pointer to PCI device
  3373. *
  3374. * Restart the card from scratch, as if from a cold-boot.
  3375. * At this point, the card has exprienced a hard reset,
  3376. * followed by fixups by BIOS, and has its config space
  3377. * set up identically to what it was at cold boot.
  3378. */
  3379. static pci_ers_result_t vxge_io_slot_reset(struct pci_dev *pdev)
  3380. {
  3381. struct __vxge_hw_device *hldev =
  3382. (struct __vxge_hw_device *) pci_get_drvdata(pdev);
  3383. struct net_device *netdev = hldev->ndev;
  3384. struct vxgedev *vdev = netdev_priv(netdev);
  3385. if (pci_enable_device(pdev)) {
  3386. printk(KERN_ERR "%s: "
  3387. "Cannot re-enable device after reset\n",
  3388. VXGE_DRIVER_NAME);
  3389. return PCI_ERS_RESULT_DISCONNECT;
  3390. }
  3391. pci_set_master(pdev);
  3392. vxge_reset(vdev);
  3393. return PCI_ERS_RESULT_RECOVERED;
  3394. }
  3395. /**
  3396. * vxge_io_resume - called when traffic can start flowing again.
  3397. * @pdev: Pointer to PCI device
  3398. *
  3399. * This callback is called when the error recovery driver tells
  3400. * us that its OK to resume normal operation.
  3401. */
  3402. static void vxge_io_resume(struct pci_dev *pdev)
  3403. {
  3404. struct __vxge_hw_device *hldev =
  3405. (struct __vxge_hw_device *) pci_get_drvdata(pdev);
  3406. struct net_device *netdev = hldev->ndev;
  3407. if (netif_running(netdev)) {
  3408. if (vxge_open(netdev)) {
  3409. printk(KERN_ERR "%s: "
  3410. "Can't bring device back up after reset\n",
  3411. VXGE_DRIVER_NAME);
  3412. return;
  3413. }
  3414. }
  3415. netif_device_attach(netdev);
  3416. }
  3417. /**
  3418. * vxge_probe
  3419. * @pdev : structure containing the PCI related information of the device.
  3420. * @pre: List of PCI devices supported by the driver listed in vxge_id_table.
  3421. * Description:
  3422. * This function is called when a new PCI device gets detected and initializes
  3423. * it.
  3424. * Return value:
  3425. * returns 0 on success and negative on failure.
  3426. *
  3427. */
  3428. static int __devinit
  3429. vxge_probe(struct pci_dev *pdev, const struct pci_device_id *pre)
  3430. {
  3431. struct __vxge_hw_device *hldev;
  3432. enum vxge_hw_status status;
  3433. int ret;
  3434. int high_dma = 0;
  3435. u64 vpath_mask = 0;
  3436. struct vxgedev *vdev;
  3437. struct vxge_config ll_config;
  3438. struct vxge_hw_device_config *device_config = NULL;
  3439. struct vxge_hw_device_attr attr;
  3440. int i, j, no_of_vpath = 0, max_vpath_supported = 0;
  3441. u8 *macaddr;
  3442. struct vxge_mac_addrs *entry;
  3443. static int bus = -1, device = -1;
  3444. u8 new_device = 0;
  3445. vxge_debug_entryexit(VXGE_TRACE, "%s:%d", __func__, __LINE__);
  3446. attr.pdev = pdev;
  3447. if (bus != pdev->bus->number)
  3448. new_device = 1;
  3449. if (device != PCI_SLOT(pdev->devfn))
  3450. new_device = 1;
  3451. bus = pdev->bus->number;
  3452. device = PCI_SLOT(pdev->devfn);
  3453. if (new_device) {
  3454. if (driver_config->config_dev_cnt &&
  3455. (driver_config->config_dev_cnt !=
  3456. driver_config->total_dev_cnt))
  3457. vxge_debug_init(VXGE_ERR,
  3458. "%s: Configured %d of %d devices",
  3459. VXGE_DRIVER_NAME,
  3460. driver_config->config_dev_cnt,
  3461. driver_config->total_dev_cnt);
  3462. driver_config->config_dev_cnt = 0;
  3463. driver_config->total_dev_cnt = 0;
  3464. driver_config->g_no_cpus = 0;
  3465. driver_config->vpath_per_dev = max_config_vpath;
  3466. }
  3467. driver_config->total_dev_cnt++;
  3468. if (++driver_config->config_dev_cnt > max_config_dev) {
  3469. ret = 0;
  3470. goto _exit0;
  3471. }
  3472. device_config = kzalloc(sizeof(struct vxge_hw_device_config),
  3473. GFP_KERNEL);
  3474. if (!device_config) {
  3475. ret = -ENOMEM;
  3476. vxge_debug_init(VXGE_ERR,
  3477. "device_config : malloc failed %s %d",
  3478. __FILE__, __LINE__);
  3479. goto _exit0;
  3480. }
  3481. memset(&ll_config, 0, sizeof(struct vxge_config));
  3482. ll_config.tx_steering_type = TX_MULTIQ_STEERING;
  3483. ll_config.intr_type = MSI_X;
  3484. ll_config.napi_weight = NEW_NAPI_WEIGHT;
  3485. ll_config.rth_steering = RTH_STEERING;
  3486. /* get the default configuration parameters */
  3487. vxge_hw_device_config_default_get(device_config);
  3488. /* initialize configuration parameters */
  3489. vxge_device_config_init(device_config, &ll_config.intr_type);
  3490. ret = pci_enable_device(pdev);
  3491. if (ret) {
  3492. vxge_debug_init(VXGE_ERR,
  3493. "%s : can not enable PCI device", __func__);
  3494. goto _exit0;
  3495. }
  3496. if (!pci_set_dma_mask(pdev, 0xffffffffffffffffULL)) {
  3497. vxge_debug_ll_config(VXGE_TRACE,
  3498. "%s : using 64bit DMA", __func__);
  3499. high_dma = 1;
  3500. if (pci_set_consistent_dma_mask(pdev,
  3501. 0xffffffffffffffffULL)) {
  3502. vxge_debug_init(VXGE_ERR,
  3503. "%s : unable to obtain 64bit DMA for "
  3504. "consistent allocations", __func__);
  3505. ret = -ENOMEM;
  3506. goto _exit1;
  3507. }
  3508. } else if (!pci_set_dma_mask(pdev, 0xffffffffUL)) {
  3509. vxge_debug_ll_config(VXGE_TRACE,
  3510. "%s : using 32bit DMA", __func__);
  3511. } else {
  3512. ret = -ENOMEM;
  3513. goto _exit1;
  3514. }
  3515. if (pci_request_regions(pdev, VXGE_DRIVER_NAME)) {
  3516. vxge_debug_init(VXGE_ERR,
  3517. "%s : request regions failed", __func__);
  3518. ret = -ENODEV;
  3519. goto _exit1;
  3520. }
  3521. pci_set_master(pdev);
  3522. attr.bar0 = pci_ioremap_bar(pdev, 0);
  3523. if (!attr.bar0) {
  3524. vxge_debug_init(VXGE_ERR,
  3525. "%s : cannot remap io memory bar0", __func__);
  3526. ret = -ENODEV;
  3527. goto _exit2;
  3528. }
  3529. vxge_debug_ll_config(VXGE_TRACE,
  3530. "pci ioremap bar0: %p:0x%llx",
  3531. attr.bar0,
  3532. (unsigned long long)pci_resource_start(pdev, 0));
  3533. status = vxge_hw_device_hw_info_get(attr.bar0,
  3534. &ll_config.device_hw_info);
  3535. if (status != VXGE_HW_OK) {
  3536. vxge_debug_init(VXGE_ERR,
  3537. "%s: Reading of hardware info failed."
  3538. "Please try upgrading the firmware.", VXGE_DRIVER_NAME);
  3539. ret = -EINVAL;
  3540. goto _exit3;
  3541. }
  3542. if (ll_config.device_hw_info.fw_version.major !=
  3543. VXGE_DRIVER_FW_VERSION_MAJOR) {
  3544. vxge_debug_init(VXGE_ERR,
  3545. "%s: Incorrect firmware version."
  3546. "Please upgrade the firmware to version 1.x.x",
  3547. VXGE_DRIVER_NAME);
  3548. ret = -EINVAL;
  3549. goto _exit3;
  3550. }
  3551. vpath_mask = ll_config.device_hw_info.vpath_mask;
  3552. if (vpath_mask == 0) {
  3553. vxge_debug_ll_config(VXGE_TRACE,
  3554. "%s: No vpaths available in device", VXGE_DRIVER_NAME);
  3555. ret = -EINVAL;
  3556. goto _exit3;
  3557. }
  3558. vxge_debug_ll_config(VXGE_TRACE,
  3559. "%s:%d Vpath mask = %llx", __func__, __LINE__,
  3560. (unsigned long long)vpath_mask);
  3561. /* Check how many vpaths are available */
  3562. for (i = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++) {
  3563. if (!((vpath_mask) & vxge_mBIT(i)))
  3564. continue;
  3565. max_vpath_supported++;
  3566. }
  3567. /* Enable SRIOV mode, if firmware has SRIOV support and if it is a PF */
  3568. if ((VXGE_HW_FUNCTION_MODE_SRIOV ==
  3569. ll_config.device_hw_info.function_mode) &&
  3570. (max_config_dev > 1) && (pdev->is_physfn)) {
  3571. ret = pci_enable_sriov(pdev, max_config_dev - 1);
  3572. if (ret)
  3573. vxge_debug_ll_config(VXGE_ERR,
  3574. "Failed to enable SRIOV: %d \n", ret);
  3575. }
  3576. /*
  3577. * Configure vpaths and get driver configured number of vpaths
  3578. * which is less than or equal to the maximum vpaths per function.
  3579. */
  3580. no_of_vpath = vxge_config_vpaths(device_config, vpath_mask, &ll_config);
  3581. if (!no_of_vpath) {
  3582. vxge_debug_ll_config(VXGE_ERR,
  3583. "%s: No more vpaths to configure", VXGE_DRIVER_NAME);
  3584. ret = 0;
  3585. goto _exit3;
  3586. }
  3587. /* Setting driver callbacks */
  3588. attr.uld_callbacks.link_up = vxge_callback_link_up;
  3589. attr.uld_callbacks.link_down = vxge_callback_link_down;
  3590. attr.uld_callbacks.crit_err = vxge_callback_crit_err;
  3591. status = vxge_hw_device_initialize(&hldev, &attr, device_config);
  3592. if (status != VXGE_HW_OK) {
  3593. vxge_debug_init(VXGE_ERR,
  3594. "Failed to initialize device (%d)", status);
  3595. ret = -EINVAL;
  3596. goto _exit3;
  3597. }
  3598. vxge_hw_device_debug_set(hldev, VXGE_ERR, VXGE_COMPONENT_LL);
  3599. /* set private device info */
  3600. pci_set_drvdata(pdev, hldev);
  3601. ll_config.gro_enable = VXGE_GRO_ALWAYS_AGGREGATE;
  3602. ll_config.fifo_indicate_max_pkts = VXGE_FIFO_INDICATE_MAX_PKTS;
  3603. ll_config.addr_learn_en = addr_learn_en;
  3604. ll_config.rth_algorithm = RTH_ALG_JENKINS;
  3605. ll_config.rth_hash_type_tcpipv4 = VXGE_HW_RING_HASH_TYPE_TCP_IPV4;
  3606. ll_config.rth_hash_type_ipv4 = VXGE_HW_RING_HASH_TYPE_NONE;
  3607. ll_config.rth_hash_type_tcpipv6 = VXGE_HW_RING_HASH_TYPE_NONE;
  3608. ll_config.rth_hash_type_ipv6 = VXGE_HW_RING_HASH_TYPE_NONE;
  3609. ll_config.rth_hash_type_tcpipv6ex = VXGE_HW_RING_HASH_TYPE_NONE;
  3610. ll_config.rth_hash_type_ipv6ex = VXGE_HW_RING_HASH_TYPE_NONE;
  3611. ll_config.rth_bkt_sz = RTH_BUCKET_SIZE;
  3612. ll_config.tx_pause_enable = VXGE_PAUSE_CTRL_ENABLE;
  3613. ll_config.rx_pause_enable = VXGE_PAUSE_CTRL_ENABLE;
  3614. if (vxge_device_register(hldev, &ll_config, high_dma, no_of_vpath,
  3615. &vdev)) {
  3616. ret = -EINVAL;
  3617. goto _exit4;
  3618. }
  3619. vxge_hw_device_debug_set(hldev, VXGE_TRACE, VXGE_COMPONENT_LL);
  3620. VXGE_COPY_DEBUG_INFO_TO_LL(vdev, vxge_hw_device_error_level_get(hldev),
  3621. vxge_hw_device_trace_level_get(hldev));
  3622. /* set private HW device info */
  3623. hldev->ndev = vdev->ndev;
  3624. vdev->mtu = VXGE_HW_DEFAULT_MTU;
  3625. vdev->bar0 = attr.bar0;
  3626. vdev->max_vpath_supported = max_vpath_supported;
  3627. vdev->no_of_vpath = no_of_vpath;
  3628. /* Virtual Path count */
  3629. for (i = 0, j = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++) {
  3630. if (!vxge_bVALn(vpath_mask, i, 1))
  3631. continue;
  3632. if (j >= vdev->no_of_vpath)
  3633. break;
  3634. vdev->vpaths[j].is_configured = 1;
  3635. vdev->vpaths[j].device_id = i;
  3636. vdev->vpaths[j].fifo.driver_id = j;
  3637. vdev->vpaths[j].ring.driver_id = j;
  3638. vdev->vpaths[j].vdev = vdev;
  3639. vdev->vpaths[j].max_mac_addr_cnt = max_mac_vpath;
  3640. memcpy((u8 *)vdev->vpaths[j].macaddr,
  3641. (u8 *)ll_config.device_hw_info.mac_addrs[i],
  3642. ETH_ALEN);
  3643. /* Initialize the mac address list header */
  3644. INIT_LIST_HEAD(&vdev->vpaths[j].mac_addr_list);
  3645. vdev->vpaths[j].mac_addr_cnt = 0;
  3646. vdev->vpaths[j].mcast_addr_cnt = 0;
  3647. j++;
  3648. }
  3649. vdev->exec_mode = VXGE_EXEC_MODE_DISABLE;
  3650. vdev->max_config_port = max_config_port;
  3651. vdev->vlan_tag_strip = vlan_tag_strip;
  3652. /* map the hashing selector table to the configured vpaths */
  3653. for (i = 0; i < vdev->no_of_vpath; i++)
  3654. vdev->vpath_selector[i] = vpath_selector[i];
  3655. macaddr = (u8 *)vdev->vpaths[0].macaddr;
  3656. ll_config.device_hw_info.serial_number[VXGE_HW_INFO_LEN - 1] = '\0';
  3657. ll_config.device_hw_info.product_desc[VXGE_HW_INFO_LEN - 1] = '\0';
  3658. ll_config.device_hw_info.part_number[VXGE_HW_INFO_LEN - 1] = '\0';
  3659. vxge_debug_init(VXGE_TRACE, "%s: SERIAL NUMBER: %s",
  3660. vdev->ndev->name, ll_config.device_hw_info.serial_number);
  3661. vxge_debug_init(VXGE_TRACE, "%s: PART NUMBER: %s",
  3662. vdev->ndev->name, ll_config.device_hw_info.part_number);
  3663. vxge_debug_init(VXGE_TRACE, "%s: Neterion %s Server Adapter",
  3664. vdev->ndev->name, ll_config.device_hw_info.product_desc);
  3665. vxge_debug_init(VXGE_TRACE,
  3666. "%s: MAC ADDR: %02X:%02X:%02X:%02X:%02X:%02X",
  3667. vdev->ndev->name, macaddr[0], macaddr[1], macaddr[2],
  3668. macaddr[3], macaddr[4], macaddr[5]);
  3669. vxge_debug_init(VXGE_TRACE, "%s: Link Width x%d",
  3670. vdev->ndev->name, vxge_hw_device_link_width_get(hldev));
  3671. vxge_debug_init(VXGE_TRACE,
  3672. "%s: Firmware version : %s Date : %s", vdev->ndev->name,
  3673. ll_config.device_hw_info.fw_version.version,
  3674. ll_config.device_hw_info.fw_date.date);
  3675. if (new_device) {
  3676. switch (ll_config.device_hw_info.function_mode) {
  3677. case VXGE_HW_FUNCTION_MODE_SINGLE_FUNCTION:
  3678. vxge_debug_init(VXGE_TRACE,
  3679. "%s: Single Function Mode Enabled", vdev->ndev->name);
  3680. break;
  3681. case VXGE_HW_FUNCTION_MODE_MULTI_FUNCTION:
  3682. vxge_debug_init(VXGE_TRACE,
  3683. "%s: Multi Function Mode Enabled", vdev->ndev->name);
  3684. break;
  3685. case VXGE_HW_FUNCTION_MODE_SRIOV:
  3686. vxge_debug_init(VXGE_TRACE,
  3687. "%s: Single Root IOV Mode Enabled", vdev->ndev->name);
  3688. break;
  3689. case VXGE_HW_FUNCTION_MODE_MRIOV:
  3690. vxge_debug_init(VXGE_TRACE,
  3691. "%s: Multi Root IOV Mode Enabled", vdev->ndev->name);
  3692. break;
  3693. }
  3694. }
  3695. vxge_print_parm(vdev, vpath_mask);
  3696. /* Store the fw version for ethttool option */
  3697. strcpy(vdev->fw_version, ll_config.device_hw_info.fw_version.version);
  3698. memcpy(vdev->ndev->dev_addr, (u8 *)vdev->vpaths[0].macaddr, ETH_ALEN);
  3699. memcpy(vdev->ndev->perm_addr, vdev->ndev->dev_addr, ETH_ALEN);
  3700. /* Copy the station mac address to the list */
  3701. for (i = 0; i < vdev->no_of_vpath; i++) {
  3702. entry = (struct vxge_mac_addrs *)
  3703. kzalloc(sizeof(struct vxge_mac_addrs),
  3704. GFP_KERNEL);
  3705. if (NULL == entry) {
  3706. vxge_debug_init(VXGE_ERR,
  3707. "%s: mac_addr_list : memory allocation failed",
  3708. vdev->ndev->name);
  3709. ret = -EPERM;
  3710. goto _exit5;
  3711. }
  3712. macaddr = (u8 *)&entry->macaddr;
  3713. memcpy(macaddr, vdev->ndev->dev_addr, ETH_ALEN);
  3714. list_add(&entry->item, &vdev->vpaths[i].mac_addr_list);
  3715. vdev->vpaths[i].mac_addr_cnt = 1;
  3716. }
  3717. kfree(device_config);
  3718. vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d Exiting...",
  3719. vdev->ndev->name, __func__, __LINE__);
  3720. vxge_hw_device_debug_set(hldev, VXGE_ERR, VXGE_COMPONENT_LL);
  3721. VXGE_COPY_DEBUG_INFO_TO_LL(vdev, vxge_hw_device_error_level_get(hldev),
  3722. vxge_hw_device_trace_level_get(hldev));
  3723. return 0;
  3724. _exit5:
  3725. for (i = 0; i < vdev->no_of_vpath; i++)
  3726. vxge_free_mac_add_list(&vdev->vpaths[i]);
  3727. vxge_device_unregister(hldev);
  3728. _exit4:
  3729. pci_disable_sriov(pdev);
  3730. vxge_hw_device_terminate(hldev);
  3731. _exit3:
  3732. iounmap(attr.bar0);
  3733. _exit2:
  3734. pci_release_regions(pdev);
  3735. _exit1:
  3736. pci_disable_device(pdev);
  3737. _exit0:
  3738. kfree(device_config);
  3739. driver_config->config_dev_cnt--;
  3740. pci_set_drvdata(pdev, NULL);
  3741. return ret;
  3742. }
  3743. /**
  3744. * vxge_rem_nic - Free the PCI device
  3745. * @pdev: structure containing the PCI related information of the device.
  3746. * Description: This function is called by the Pci subsystem to release a
  3747. * PCI device and free up all resource held up by the device.
  3748. */
  3749. static void __devexit
  3750. vxge_remove(struct pci_dev *pdev)
  3751. {
  3752. struct __vxge_hw_device *hldev;
  3753. struct vxgedev *vdev = NULL;
  3754. struct net_device *dev;
  3755. int i = 0;
  3756. #if ((VXGE_DEBUG_INIT & VXGE_DEBUG_MASK) || \
  3757. (VXGE_DEBUG_ENTRYEXIT & VXGE_DEBUG_MASK))
  3758. u32 level_trace;
  3759. #endif
  3760. hldev = (struct __vxge_hw_device *) pci_get_drvdata(pdev);
  3761. if (hldev == NULL)
  3762. return;
  3763. dev = hldev->ndev;
  3764. vdev = netdev_priv(dev);
  3765. #if ((VXGE_DEBUG_INIT & VXGE_DEBUG_MASK) || \
  3766. (VXGE_DEBUG_ENTRYEXIT & VXGE_DEBUG_MASK))
  3767. level_trace = vdev->level_trace;
  3768. #endif
  3769. vxge_debug_entryexit(level_trace,
  3770. "%s:%d", __func__, __LINE__);
  3771. vxge_debug_init(level_trace,
  3772. "%s : removing PCI device...", __func__);
  3773. vxge_device_unregister(hldev);
  3774. for (i = 0; i < vdev->no_of_vpath; i++) {
  3775. vxge_free_mac_add_list(&vdev->vpaths[i]);
  3776. vdev->vpaths[i].mcast_addr_cnt = 0;
  3777. vdev->vpaths[i].mac_addr_cnt = 0;
  3778. }
  3779. kfree(vdev->vpaths);
  3780. iounmap(vdev->bar0);
  3781. pci_disable_sriov(pdev);
  3782. /* we are safe to free it now */
  3783. free_netdev(dev);
  3784. vxge_debug_init(level_trace,
  3785. "%s:%d Device unregistered", __func__, __LINE__);
  3786. vxge_hw_device_terminate(hldev);
  3787. pci_disable_device(pdev);
  3788. pci_release_regions(pdev);
  3789. pci_set_drvdata(pdev, NULL);
  3790. vxge_debug_entryexit(level_trace,
  3791. "%s:%d Exiting...", __func__, __LINE__);
  3792. }
  3793. static struct pci_error_handlers vxge_err_handler = {
  3794. .error_detected = vxge_io_error_detected,
  3795. .slot_reset = vxge_io_slot_reset,
  3796. .resume = vxge_io_resume,
  3797. };
  3798. static struct pci_driver vxge_driver = {
  3799. .name = VXGE_DRIVER_NAME,
  3800. .id_table = vxge_id_table,
  3801. .probe = vxge_probe,
  3802. .remove = __devexit_p(vxge_remove),
  3803. #ifdef CONFIG_PM
  3804. .suspend = vxge_pm_suspend,
  3805. .resume = vxge_pm_resume,
  3806. #endif
  3807. .err_handler = &vxge_err_handler,
  3808. };
  3809. static int __init
  3810. vxge_starter(void)
  3811. {
  3812. int ret = 0;
  3813. char version[32];
  3814. snprintf(version, 32, "%s", DRV_VERSION);
  3815. printk(KERN_CRIT "%s: Copyright(c) 2002-2009 Neterion Inc\n",
  3816. VXGE_DRIVER_NAME);
  3817. printk(KERN_CRIT "%s: Driver version: %s\n",
  3818. VXGE_DRIVER_NAME, version);
  3819. verify_bandwidth();
  3820. driver_config = kzalloc(sizeof(struct vxge_drv_config), GFP_KERNEL);
  3821. if (!driver_config)
  3822. return -ENOMEM;
  3823. ret = pci_register_driver(&vxge_driver);
  3824. if (driver_config->config_dev_cnt &&
  3825. (driver_config->config_dev_cnt != driver_config->total_dev_cnt))
  3826. vxge_debug_init(VXGE_ERR,
  3827. "%s: Configured %d of %d devices",
  3828. VXGE_DRIVER_NAME, driver_config->config_dev_cnt,
  3829. driver_config->total_dev_cnt);
  3830. if (ret)
  3831. kfree(driver_config);
  3832. return ret;
  3833. }
  3834. static void __exit
  3835. vxge_closer(void)
  3836. {
  3837. pci_unregister_driver(&vxge_driver);
  3838. kfree(driver_config);
  3839. }
  3840. module_init(vxge_starter);
  3841. module_exit(vxge_closer);