ks8842.c 18 KB

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  1. /*
  2. * ks8842_main.c timberdale KS8842 ethernet driver
  3. * Copyright (c) 2009 Intel Corporation
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License version 2 as
  7. * published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope that it will be useful,
  10. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. * GNU General Public License for more details.
  13. *
  14. * You should have received a copy of the GNU General Public License
  15. * along with this program; if not, write to the Free Software
  16. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  17. */
  18. /* Supports:
  19. * The Micrel KS8842 behind the timberdale FPGA
  20. */
  21. #include <linux/kernel.h>
  22. #include <linux/module.h>
  23. #include <linux/platform_device.h>
  24. #include <linux/netdevice.h>
  25. #include <linux/etherdevice.h>
  26. #include <linux/ethtool.h>
  27. #define DRV_NAME "ks8842"
  28. /* Timberdale specific Registers */
  29. #define REG_TIMB_RST 0x1c
  30. /* KS8842 registers */
  31. #define REG_SELECT_BANK 0x0e
  32. /* bank 0 registers */
  33. #define REG_QRFCR 0x04
  34. /* bank 2 registers */
  35. #define REG_MARL 0x00
  36. #define REG_MARM 0x02
  37. #define REG_MARH 0x04
  38. /* bank 3 registers */
  39. #define REG_GRR 0x06
  40. /* bank 16 registers */
  41. #define REG_TXCR 0x00
  42. #define REG_TXSR 0x02
  43. #define REG_RXCR 0x04
  44. #define REG_TXMIR 0x08
  45. #define REG_RXMIR 0x0A
  46. /* bank 17 registers */
  47. #define REG_TXQCR 0x00
  48. #define REG_RXQCR 0x02
  49. #define REG_TXFDPR 0x04
  50. #define REG_RXFDPR 0x06
  51. #define REG_QMU_DATA_LO 0x08
  52. #define REG_QMU_DATA_HI 0x0A
  53. /* bank 18 registers */
  54. #define REG_IER 0x00
  55. #define IRQ_LINK_CHANGE 0x8000
  56. #define IRQ_TX 0x4000
  57. #define IRQ_RX 0x2000
  58. #define IRQ_RX_OVERRUN 0x0800
  59. #define IRQ_TX_STOPPED 0x0200
  60. #define IRQ_RX_STOPPED 0x0100
  61. #define IRQ_RX_ERROR 0x0080
  62. #define ENABLED_IRQS (IRQ_LINK_CHANGE | IRQ_TX | IRQ_RX | IRQ_RX_STOPPED | \
  63. IRQ_TX_STOPPED | IRQ_RX_OVERRUN | IRQ_RX_ERROR)
  64. #define REG_ISR 0x02
  65. #define REG_RXSR 0x04
  66. #define RXSR_VALID 0x8000
  67. #define RXSR_BROADCAST 0x80
  68. #define RXSR_MULTICAST 0x40
  69. #define RXSR_UNICAST 0x20
  70. #define RXSR_FRAMETYPE 0x08
  71. #define RXSR_TOO_LONG 0x04
  72. #define RXSR_RUNT 0x02
  73. #define RXSR_CRC_ERROR 0x01
  74. #define RXSR_ERROR (RXSR_TOO_LONG | RXSR_RUNT | RXSR_CRC_ERROR)
  75. /* bank 32 registers */
  76. #define REG_SW_ID_AND_ENABLE 0x00
  77. #define REG_SGCR1 0x02
  78. #define REG_SGCR2 0x04
  79. #define REG_SGCR3 0x06
  80. /* bank 39 registers */
  81. #define REG_MACAR1 0x00
  82. #define REG_MACAR2 0x02
  83. #define REG_MACAR3 0x04
  84. /* bank 45 registers */
  85. #define REG_P1MBCR 0x00
  86. #define REG_P1MBSR 0x02
  87. /* bank 46 registers */
  88. #define REG_P2MBCR 0x00
  89. #define REG_P2MBSR 0x02
  90. /* bank 48 registers */
  91. #define REG_P1CR2 0x02
  92. /* bank 49 registers */
  93. #define REG_P1CR4 0x02
  94. #define REG_P1SR 0x04
  95. struct ks8842_adapter {
  96. void __iomem *hw_addr;
  97. int irq;
  98. struct tasklet_struct tasklet;
  99. spinlock_t lock; /* spinlock to be interrupt safe */
  100. struct platform_device *pdev;
  101. };
  102. static inline void ks8842_select_bank(struct ks8842_adapter *adapter, u16 bank)
  103. {
  104. iowrite16(bank, adapter->hw_addr + REG_SELECT_BANK);
  105. }
  106. static inline void ks8842_write8(struct ks8842_adapter *adapter, u16 bank,
  107. u8 value, int offset)
  108. {
  109. ks8842_select_bank(adapter, bank);
  110. iowrite8(value, adapter->hw_addr + offset);
  111. }
  112. static inline void ks8842_write16(struct ks8842_adapter *adapter, u16 bank,
  113. u16 value, int offset)
  114. {
  115. ks8842_select_bank(adapter, bank);
  116. iowrite16(value, adapter->hw_addr + offset);
  117. }
  118. static inline void ks8842_enable_bits(struct ks8842_adapter *adapter, u16 bank,
  119. u16 bits, int offset)
  120. {
  121. u16 reg;
  122. ks8842_select_bank(adapter, bank);
  123. reg = ioread16(adapter->hw_addr + offset);
  124. reg |= bits;
  125. iowrite16(reg, adapter->hw_addr + offset);
  126. }
  127. static inline void ks8842_clear_bits(struct ks8842_adapter *adapter, u16 bank,
  128. u16 bits, int offset)
  129. {
  130. u16 reg;
  131. ks8842_select_bank(adapter, bank);
  132. reg = ioread16(adapter->hw_addr + offset);
  133. reg &= ~bits;
  134. iowrite16(reg, adapter->hw_addr + offset);
  135. }
  136. static inline void ks8842_write32(struct ks8842_adapter *adapter, u16 bank,
  137. u32 value, int offset)
  138. {
  139. ks8842_select_bank(adapter, bank);
  140. iowrite32(value, adapter->hw_addr + offset);
  141. }
  142. static inline u8 ks8842_read8(struct ks8842_adapter *adapter, u16 bank,
  143. int offset)
  144. {
  145. ks8842_select_bank(adapter, bank);
  146. return ioread8(adapter->hw_addr + offset);
  147. }
  148. static inline u16 ks8842_read16(struct ks8842_adapter *adapter, u16 bank,
  149. int offset)
  150. {
  151. ks8842_select_bank(adapter, bank);
  152. return ioread16(adapter->hw_addr + offset);
  153. }
  154. static inline u32 ks8842_read32(struct ks8842_adapter *adapter, u16 bank,
  155. int offset)
  156. {
  157. ks8842_select_bank(adapter, bank);
  158. return ioread32(adapter->hw_addr + offset);
  159. }
  160. static void ks8842_reset(struct ks8842_adapter *adapter)
  161. {
  162. /* The KS8842 goes haywire when doing softare reset
  163. * a work around in the timberdale IP is implemented to
  164. * do a hardware reset instead
  165. ks8842_write16(adapter, 3, 1, REG_GRR);
  166. msleep(10);
  167. iowrite16(0, adapter->hw_addr + REG_GRR);
  168. */
  169. iowrite16(32, adapter->hw_addr + REG_SELECT_BANK);
  170. iowrite32(0x1, adapter->hw_addr + REG_TIMB_RST);
  171. msleep(20);
  172. }
  173. static void ks8842_update_link_status(struct net_device *netdev,
  174. struct ks8842_adapter *adapter)
  175. {
  176. /* check the status of the link */
  177. if (ks8842_read16(adapter, 45, REG_P1MBSR) & 0x4) {
  178. netif_carrier_on(netdev);
  179. netif_wake_queue(netdev);
  180. } else {
  181. netif_stop_queue(netdev);
  182. netif_carrier_off(netdev);
  183. }
  184. }
  185. static void ks8842_enable_tx(struct ks8842_adapter *adapter)
  186. {
  187. ks8842_enable_bits(adapter, 16, 0x01, REG_TXCR);
  188. }
  189. static void ks8842_disable_tx(struct ks8842_adapter *adapter)
  190. {
  191. ks8842_clear_bits(adapter, 16, 0x01, REG_TXCR);
  192. }
  193. static void ks8842_enable_rx(struct ks8842_adapter *adapter)
  194. {
  195. ks8842_enable_bits(adapter, 16, 0x01, REG_RXCR);
  196. }
  197. static void ks8842_disable_rx(struct ks8842_adapter *adapter)
  198. {
  199. ks8842_clear_bits(adapter, 16, 0x01, REG_RXCR);
  200. }
  201. static void ks8842_reset_hw(struct ks8842_adapter *adapter)
  202. {
  203. /* reset the HW */
  204. ks8842_reset(adapter);
  205. /* Enable QMU Transmit flow control / transmit padding / Transmit CRC */
  206. ks8842_write16(adapter, 16, 0x000E, REG_TXCR);
  207. /* enable the receiver, uni + multi + broadcast + flow ctrl
  208. + crc strip */
  209. ks8842_write16(adapter, 16, 0x8 | 0x20 | 0x40 | 0x80 | 0x400,
  210. REG_RXCR);
  211. /* TX frame pointer autoincrement */
  212. ks8842_write16(adapter, 17, 0x4000, REG_TXFDPR);
  213. /* RX frame pointer autoincrement */
  214. ks8842_write16(adapter, 17, 0x4000, REG_RXFDPR);
  215. /* RX 2 kb high watermark */
  216. ks8842_write16(adapter, 0, 0x1000, REG_QRFCR);
  217. /* aggresive back off in half duplex */
  218. ks8842_enable_bits(adapter, 32, 1 << 8, REG_SGCR1);
  219. /* enable no excessive collison drop */
  220. ks8842_enable_bits(adapter, 32, 1 << 3, REG_SGCR2);
  221. /* Enable port 1 force flow control / back pressure / transmit / recv */
  222. ks8842_write16(adapter, 48, 0x1E07, REG_P1CR2);
  223. /* restart port auto-negotiation */
  224. ks8842_enable_bits(adapter, 49, 1 << 13, REG_P1CR4);
  225. /* only advertise 10Mbps */
  226. ks8842_clear_bits(adapter, 49, 3 << 2, REG_P1CR4);
  227. /* Enable the transmitter */
  228. ks8842_enable_tx(adapter);
  229. /* Enable the receiver */
  230. ks8842_enable_rx(adapter);
  231. /* clear all interrupts */
  232. ks8842_write16(adapter, 18, 0xffff, REG_ISR);
  233. /* enable interrupts */
  234. ks8842_write16(adapter, 18, ENABLED_IRQS, REG_IER);
  235. /* enable the switch */
  236. ks8842_write16(adapter, 32, 0x1, REG_SW_ID_AND_ENABLE);
  237. }
  238. static void ks8842_read_mac_addr(struct ks8842_adapter *adapter, u8 *dest)
  239. {
  240. int i;
  241. u16 mac;
  242. for (i = 0; i < ETH_ALEN; i++)
  243. dest[ETH_ALEN - i - 1] = ks8842_read8(adapter, 2, REG_MARL + i);
  244. /* make sure the switch port uses the same MAC as the QMU */
  245. mac = ks8842_read16(adapter, 2, REG_MARL);
  246. ks8842_write16(adapter, 39, mac, REG_MACAR1);
  247. mac = ks8842_read16(adapter, 2, REG_MARM);
  248. ks8842_write16(adapter, 39, mac, REG_MACAR2);
  249. mac = ks8842_read16(adapter, 2, REG_MARH);
  250. ks8842_write16(adapter, 39, mac, REG_MACAR3);
  251. }
  252. static inline u16 ks8842_tx_fifo_space(struct ks8842_adapter *adapter)
  253. {
  254. return ks8842_read16(adapter, 16, REG_TXMIR) & 0x1fff;
  255. }
  256. static int ks8842_tx_frame(struct sk_buff *skb, struct net_device *netdev)
  257. {
  258. struct ks8842_adapter *adapter = netdev_priv(netdev);
  259. int len = skb->len;
  260. u32 *ptr = (u32 *)skb->data;
  261. u32 ctrl;
  262. dev_dbg(&adapter->pdev->dev,
  263. "%s: len %u head %p data %p tail %p end %p\n",
  264. __func__, skb->len, skb->head, skb->data,
  265. skb_tail_pointer(skb), skb_end_pointer(skb));
  266. /* check FIFO buffer space, we need space for CRC and command bits */
  267. if (ks8842_tx_fifo_space(adapter) < len + 8)
  268. return NETDEV_TX_BUSY;
  269. /* the control word, enable IRQ, port 1 and the length */
  270. ctrl = 0x8000 | 0x100 | (len << 16);
  271. ks8842_write32(adapter, 17, ctrl, REG_QMU_DATA_LO);
  272. netdev->stats.tx_bytes += len;
  273. /* copy buffer */
  274. while (len > 0) {
  275. iowrite32(*ptr, adapter->hw_addr + REG_QMU_DATA_LO);
  276. len -= sizeof(u32);
  277. ptr++;
  278. }
  279. /* enqueue packet */
  280. ks8842_write16(adapter, 17, 1, REG_TXQCR);
  281. dev_kfree_skb(skb);
  282. return NETDEV_TX_OK;
  283. }
  284. static void ks8842_rx_frame(struct net_device *netdev,
  285. struct ks8842_adapter *adapter)
  286. {
  287. u32 status = ks8842_read32(adapter, 17, REG_QMU_DATA_LO);
  288. int len = (status >> 16) & 0x7ff;
  289. status &= 0xffff;
  290. dev_dbg(&adapter->pdev->dev, "%s - rx_data: status: %x\n",
  291. __func__, status);
  292. /* check the status */
  293. if ((status & RXSR_VALID) && !(status & RXSR_ERROR)) {
  294. struct sk_buff *skb = netdev_alloc_skb(netdev, len + 2);
  295. dev_dbg(&adapter->pdev->dev, "%s, got package, len: %d\n",
  296. __func__, len);
  297. if (skb) {
  298. u32 *data;
  299. netdev->stats.rx_packets++;
  300. netdev->stats.rx_bytes += len;
  301. if (status & RXSR_MULTICAST)
  302. netdev->stats.multicast++;
  303. /* Align socket buffer in 4-byte boundary for
  304. better performance. */
  305. skb_reserve(skb, 2);
  306. data = (u32 *)skb_put(skb, len);
  307. ks8842_select_bank(adapter, 17);
  308. while (len > 0) {
  309. *data++ = ioread32(adapter->hw_addr +
  310. REG_QMU_DATA_LO);
  311. len -= sizeof(u32);
  312. }
  313. skb->protocol = eth_type_trans(skb, netdev);
  314. netif_rx(skb);
  315. } else
  316. netdev->stats.rx_dropped++;
  317. } else {
  318. dev_dbg(&adapter->pdev->dev, "RX error, status: %x\n", status);
  319. netdev->stats.rx_errors++;
  320. if (status & RXSR_TOO_LONG)
  321. netdev->stats.rx_length_errors++;
  322. if (status & RXSR_CRC_ERROR)
  323. netdev->stats.rx_crc_errors++;
  324. if (status & RXSR_RUNT)
  325. netdev->stats.rx_frame_errors++;
  326. }
  327. /* set high watermark to 3K */
  328. ks8842_clear_bits(adapter, 0, 1 << 12, REG_QRFCR);
  329. /* release the frame */
  330. ks8842_write16(adapter, 17, 0x01, REG_RXQCR);
  331. /* set high watermark to 2K */
  332. ks8842_enable_bits(adapter, 0, 1 << 12, REG_QRFCR);
  333. }
  334. void ks8842_handle_rx(struct net_device *netdev, struct ks8842_adapter *adapter)
  335. {
  336. u16 rx_data = ks8842_read16(adapter, 16, REG_RXMIR) & 0x1fff;
  337. dev_dbg(&adapter->pdev->dev, "%s Entry - rx_data: %d\n",
  338. __func__, rx_data);
  339. while (rx_data) {
  340. ks8842_rx_frame(netdev, adapter);
  341. rx_data = ks8842_read16(adapter, 16, REG_RXMIR) & 0x1fff;
  342. }
  343. }
  344. void ks8842_handle_tx(struct net_device *netdev, struct ks8842_adapter *adapter)
  345. {
  346. u16 sr = ks8842_read16(adapter, 16, REG_TXSR);
  347. dev_dbg(&adapter->pdev->dev, "%s - entry, sr: %x\n", __func__, sr);
  348. netdev->stats.tx_packets++;
  349. if (netif_queue_stopped(netdev))
  350. netif_wake_queue(netdev);
  351. }
  352. void ks8842_handle_rx_overrun(struct net_device *netdev,
  353. struct ks8842_adapter *adapter)
  354. {
  355. dev_dbg(&adapter->pdev->dev, "%s: entry\n", __func__);
  356. netdev->stats.rx_errors++;
  357. netdev->stats.rx_fifo_errors++;
  358. }
  359. void ks8842_tasklet(unsigned long arg)
  360. {
  361. struct net_device *netdev = (struct net_device *)arg;
  362. struct ks8842_adapter *adapter = netdev_priv(netdev);
  363. u16 isr;
  364. unsigned long flags;
  365. u16 entry_bank;
  366. /* read current bank to be able to set it back */
  367. spin_lock_irqsave(&adapter->lock, flags);
  368. entry_bank = ioread16(adapter->hw_addr + REG_SELECT_BANK);
  369. spin_unlock_irqrestore(&adapter->lock, flags);
  370. isr = ks8842_read16(adapter, 18, REG_ISR);
  371. dev_dbg(&adapter->pdev->dev, "%s - ISR: 0x%x\n", __func__, isr);
  372. /* Ack */
  373. ks8842_write16(adapter, 18, isr, REG_ISR);
  374. if (!netif_running(netdev))
  375. return;
  376. if (isr & IRQ_LINK_CHANGE)
  377. ks8842_update_link_status(netdev, adapter);
  378. if (isr & (IRQ_RX | IRQ_RX_ERROR))
  379. ks8842_handle_rx(netdev, adapter);
  380. if (isr & IRQ_TX)
  381. ks8842_handle_tx(netdev, adapter);
  382. if (isr & IRQ_RX_OVERRUN)
  383. ks8842_handle_rx_overrun(netdev, adapter);
  384. if (isr & IRQ_TX_STOPPED) {
  385. ks8842_disable_tx(adapter);
  386. ks8842_enable_tx(adapter);
  387. }
  388. if (isr & IRQ_RX_STOPPED) {
  389. ks8842_disable_rx(adapter);
  390. ks8842_enable_rx(adapter);
  391. }
  392. /* re-enable interrupts, put back the bank selection register */
  393. spin_lock_irqsave(&adapter->lock, flags);
  394. ks8842_write16(adapter, 18, ENABLED_IRQS, REG_IER);
  395. iowrite16(entry_bank, adapter->hw_addr + REG_SELECT_BANK);
  396. spin_unlock_irqrestore(&adapter->lock, flags);
  397. }
  398. static irqreturn_t ks8842_irq(int irq, void *devid)
  399. {
  400. struct ks8842_adapter *adapter = devid;
  401. u16 isr;
  402. u16 entry_bank = ioread16(adapter->hw_addr + REG_SELECT_BANK);
  403. irqreturn_t ret = IRQ_NONE;
  404. isr = ks8842_read16(adapter, 18, REG_ISR);
  405. dev_dbg(&adapter->pdev->dev, "%s - ISR: 0x%x\n", __func__, isr);
  406. if (isr) {
  407. /* disable IRQ */
  408. ks8842_write16(adapter, 18, 0x00, REG_IER);
  409. /* schedule tasklet */
  410. tasklet_schedule(&adapter->tasklet);
  411. ret = IRQ_HANDLED;
  412. }
  413. iowrite16(entry_bank, adapter->hw_addr + REG_SELECT_BANK);
  414. return ret;
  415. }
  416. /* Netdevice operations */
  417. static int ks8842_open(struct net_device *netdev)
  418. {
  419. struct ks8842_adapter *adapter = netdev_priv(netdev);
  420. int err;
  421. dev_dbg(&adapter->pdev->dev, "%s - entry\n", __func__);
  422. /* reset the HW */
  423. ks8842_reset_hw(adapter);
  424. ks8842_update_link_status(netdev, adapter);
  425. err = request_irq(adapter->irq, ks8842_irq, IRQF_SHARED, DRV_NAME,
  426. adapter);
  427. if (err) {
  428. printk(KERN_ERR "Failed to request IRQ: %d: %d\n",
  429. adapter->irq, err);
  430. return err;
  431. }
  432. return 0;
  433. }
  434. static int ks8842_close(struct net_device *netdev)
  435. {
  436. struct ks8842_adapter *adapter = netdev_priv(netdev);
  437. dev_dbg(&adapter->pdev->dev, "%s - entry\n", __func__);
  438. /* free the irq */
  439. free_irq(adapter->irq, adapter);
  440. /* disable the switch */
  441. ks8842_write16(adapter, 32, 0x0, REG_SW_ID_AND_ENABLE);
  442. return 0;
  443. }
  444. static netdev_tx_t ks8842_xmit_frame(struct sk_buff *skb,
  445. struct net_device *netdev)
  446. {
  447. int ret;
  448. struct ks8842_adapter *adapter = netdev_priv(netdev);
  449. dev_dbg(&adapter->pdev->dev, "%s: entry\n", __func__);
  450. ret = ks8842_tx_frame(skb, netdev);
  451. if (ks8842_tx_fifo_space(adapter) < netdev->mtu + 8)
  452. netif_stop_queue(netdev);
  453. return ret;
  454. }
  455. static int ks8842_set_mac(struct net_device *netdev, void *p)
  456. {
  457. struct ks8842_adapter *adapter = netdev_priv(netdev);
  458. unsigned long flags;
  459. struct sockaddr *addr = p;
  460. char *mac = (u8 *)addr->sa_data;
  461. int i;
  462. dev_dbg(&adapter->pdev->dev, "%s: entry\n", __func__);
  463. if (!is_valid_ether_addr(addr->sa_data))
  464. return -EADDRNOTAVAIL;
  465. memcpy(netdev->dev_addr, mac, netdev->addr_len);
  466. spin_lock_irqsave(&adapter->lock, flags);
  467. for (i = 0; i < ETH_ALEN; i++) {
  468. ks8842_write8(adapter, 2, mac[ETH_ALEN - i - 1], REG_MARL + i);
  469. ks8842_write8(adapter, 39, mac[ETH_ALEN - i - 1],
  470. REG_MACAR1 + i);
  471. }
  472. spin_unlock_irqrestore(&adapter->lock, flags);
  473. return 0;
  474. }
  475. static void ks8842_tx_timeout(struct net_device *netdev)
  476. {
  477. struct ks8842_adapter *adapter = netdev_priv(netdev);
  478. unsigned long flags;
  479. dev_dbg(&adapter->pdev->dev, "%s: entry\n", __func__);
  480. spin_lock_irqsave(&adapter->lock, flags);
  481. /* disable interrupts */
  482. ks8842_write16(adapter, 18, 0, REG_IER);
  483. ks8842_write16(adapter, 18, 0xFFFF, REG_ISR);
  484. spin_unlock_irqrestore(&adapter->lock, flags);
  485. ks8842_reset_hw(adapter);
  486. ks8842_update_link_status(netdev, adapter);
  487. }
  488. static const struct net_device_ops ks8842_netdev_ops = {
  489. .ndo_open = ks8842_open,
  490. .ndo_stop = ks8842_close,
  491. .ndo_start_xmit = ks8842_xmit_frame,
  492. .ndo_set_mac_address = ks8842_set_mac,
  493. .ndo_tx_timeout = ks8842_tx_timeout,
  494. .ndo_validate_addr = eth_validate_addr
  495. };
  496. static const struct ethtool_ops ks8842_ethtool_ops = {
  497. .get_link = ethtool_op_get_link,
  498. };
  499. static int __devinit ks8842_probe(struct platform_device *pdev)
  500. {
  501. int err = -ENOMEM;
  502. struct resource *iomem;
  503. struct net_device *netdev;
  504. struct ks8842_adapter *adapter;
  505. u16 id;
  506. iomem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  507. if (!request_mem_region(iomem->start, resource_size(iomem), DRV_NAME))
  508. goto err_mem_region;
  509. netdev = alloc_etherdev(sizeof(struct ks8842_adapter));
  510. if (!netdev)
  511. goto err_alloc_etherdev;
  512. SET_NETDEV_DEV(netdev, &pdev->dev);
  513. adapter = netdev_priv(netdev);
  514. adapter->hw_addr = ioremap(iomem->start, resource_size(iomem));
  515. if (!adapter->hw_addr)
  516. goto err_ioremap;
  517. adapter->irq = platform_get_irq(pdev, 0);
  518. if (adapter->irq < 0) {
  519. err = adapter->irq;
  520. goto err_get_irq;
  521. }
  522. adapter->pdev = pdev;
  523. tasklet_init(&adapter->tasklet, ks8842_tasklet, (unsigned long)netdev);
  524. spin_lock_init(&adapter->lock);
  525. netdev->netdev_ops = &ks8842_netdev_ops;
  526. netdev->ethtool_ops = &ks8842_ethtool_ops;
  527. ks8842_read_mac_addr(adapter, netdev->dev_addr);
  528. id = ks8842_read16(adapter, 32, REG_SW_ID_AND_ENABLE);
  529. strcpy(netdev->name, "eth%d");
  530. err = register_netdev(netdev);
  531. if (err)
  532. goto err_register;
  533. platform_set_drvdata(pdev, netdev);
  534. printk(KERN_INFO DRV_NAME
  535. " Found chip, family: 0x%x, id: 0x%x, rev: 0x%x\n",
  536. (id >> 8) & 0xff, (id >> 4) & 0xf, (id >> 1) & 0x7);
  537. return 0;
  538. err_register:
  539. err_get_irq:
  540. iounmap(adapter->hw_addr);
  541. err_ioremap:
  542. free_netdev(netdev);
  543. err_alloc_etherdev:
  544. release_mem_region(iomem->start, resource_size(iomem));
  545. err_mem_region:
  546. return err;
  547. }
  548. static int __devexit ks8842_remove(struct platform_device *pdev)
  549. {
  550. struct net_device *netdev = platform_get_drvdata(pdev);
  551. struct ks8842_adapter *adapter = netdev_priv(netdev);
  552. struct resource *iomem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  553. unregister_netdev(netdev);
  554. tasklet_kill(&adapter->tasklet);
  555. iounmap(adapter->hw_addr);
  556. free_netdev(netdev);
  557. release_mem_region(iomem->start, resource_size(iomem));
  558. platform_set_drvdata(pdev, NULL);
  559. return 0;
  560. }
  561. static struct platform_driver ks8842_platform_driver = {
  562. .driver = {
  563. .name = DRV_NAME,
  564. .owner = THIS_MODULE,
  565. },
  566. .probe = ks8842_probe,
  567. .remove = ks8842_remove,
  568. };
  569. static int __init ks8842_init(void)
  570. {
  571. return platform_driver_register(&ks8842_platform_driver);
  572. }
  573. static void __exit ks8842_exit(void)
  574. {
  575. platform_driver_unregister(&ks8842_platform_driver);
  576. }
  577. module_init(ks8842_init);
  578. module_exit(ks8842_exit);
  579. MODULE_DESCRIPTION("Timberdale KS8842 ethernet driver");
  580. MODULE_AUTHOR("Mocean Laboratories <info@mocean-labs.com>");
  581. MODULE_LICENSE("GPL v2");
  582. MODULE_ALIAS("platform:ks8842");