mii-fec.c 5.7 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242
  1. /*
  2. * Combined Ethernet driver for Motorola MPC8xx and MPC82xx.
  3. *
  4. * Copyright (c) 2003 Intracom S.A.
  5. * by Pantelis Antoniou <panto@intracom.gr>
  6. *
  7. * 2005 (c) MontaVista Software, Inc.
  8. * Vitaly Bordug <vbordug@ru.mvista.com>
  9. *
  10. * This file is licensed under the terms of the GNU General Public License
  11. * version 2. This program is licensed "as is" without any warranty of any
  12. * kind, whether express or implied.
  13. */
  14. #include <linux/module.h>
  15. #include <linux/types.h>
  16. #include <linux/kernel.h>
  17. #include <linux/string.h>
  18. #include <linux/ptrace.h>
  19. #include <linux/errno.h>
  20. #include <linux/ioport.h>
  21. #include <linux/slab.h>
  22. #include <linux/interrupt.h>
  23. #include <linux/init.h>
  24. #include <linux/delay.h>
  25. #include <linux/netdevice.h>
  26. #include <linux/etherdevice.h>
  27. #include <linux/skbuff.h>
  28. #include <linux/spinlock.h>
  29. #include <linux/mii.h>
  30. #include <linux/ethtool.h>
  31. #include <linux/bitops.h>
  32. #include <linux/platform_device.h>
  33. #include <linux/of_platform.h>
  34. #include <asm/pgtable.h>
  35. #include <asm/irq.h>
  36. #include <asm/uaccess.h>
  37. #include <asm/mpc5xxx.h>
  38. #include "fs_enet.h"
  39. #include "fec.h"
  40. /* Make MII read/write commands for the FEC.
  41. */
  42. #define mk_mii_read(REG) (0x60020000 | ((REG & 0x1f) << 18))
  43. #define mk_mii_write(REG, VAL) (0x50020000 | ((REG & 0x1f) << 18) | (VAL & 0xffff))
  44. #define mk_mii_end 0
  45. #define FEC_MII_LOOPS 10000
  46. static int fs_enet_fec_mii_read(struct mii_bus *bus , int phy_id, int location)
  47. {
  48. struct fec_info* fec = bus->priv;
  49. fec_t __iomem *fecp = fec->fecp;
  50. int i, ret = -1;
  51. BUG_ON((in_be32(&fecp->fec_r_cntrl) & FEC_RCNTRL_MII_MODE) == 0);
  52. /* Add PHY address to register command. */
  53. out_be32(&fecp->fec_mii_data, (phy_id << 23) | mk_mii_read(location));
  54. for (i = 0; i < FEC_MII_LOOPS; i++)
  55. if ((in_be32(&fecp->fec_ievent) & FEC_ENET_MII) != 0)
  56. break;
  57. if (i < FEC_MII_LOOPS) {
  58. out_be32(&fecp->fec_ievent, FEC_ENET_MII);
  59. ret = in_be32(&fecp->fec_mii_data) & 0xffff;
  60. }
  61. return ret;
  62. }
  63. static int fs_enet_fec_mii_write(struct mii_bus *bus, int phy_id, int location, u16 val)
  64. {
  65. struct fec_info* fec = bus->priv;
  66. fec_t __iomem *fecp = fec->fecp;
  67. int i;
  68. /* this must never happen */
  69. BUG_ON((in_be32(&fecp->fec_r_cntrl) & FEC_RCNTRL_MII_MODE) == 0);
  70. /* Add PHY address to register command. */
  71. out_be32(&fecp->fec_mii_data, (phy_id << 23) | mk_mii_write(location, val));
  72. for (i = 0; i < FEC_MII_LOOPS; i++)
  73. if ((in_be32(&fecp->fec_ievent) & FEC_ENET_MII) != 0)
  74. break;
  75. if (i < FEC_MII_LOOPS)
  76. out_be32(&fecp->fec_ievent, FEC_ENET_MII);
  77. return 0;
  78. }
  79. static int fs_enet_fec_mii_reset(struct mii_bus *bus)
  80. {
  81. /* nothing here - for now */
  82. return 0;
  83. }
  84. static int __devinit fs_enet_mdio_probe(struct of_device *ofdev,
  85. const struct of_device_id *match)
  86. {
  87. struct resource res;
  88. struct mii_bus *new_bus;
  89. struct fec_info *fec;
  90. int (*get_bus_freq)(struct device_node *) = match->data;
  91. int ret = -ENOMEM, clock, speed;
  92. new_bus = mdiobus_alloc();
  93. if (!new_bus)
  94. goto out;
  95. fec = kzalloc(sizeof(struct fec_info), GFP_KERNEL);
  96. if (!fec)
  97. goto out_mii;
  98. new_bus->priv = fec;
  99. new_bus->name = "FEC MII Bus";
  100. new_bus->read = &fs_enet_fec_mii_read;
  101. new_bus->write = &fs_enet_fec_mii_write;
  102. new_bus->reset = &fs_enet_fec_mii_reset;
  103. ret = of_address_to_resource(ofdev->node, 0, &res);
  104. if (ret)
  105. goto out_res;
  106. snprintf(new_bus->id, MII_BUS_ID_SIZE, "%x", res.start);
  107. fec->fecp = ioremap(res.start, res.end - res.start + 1);
  108. if (!fec->fecp)
  109. goto out_fec;
  110. if (get_bus_freq) {
  111. clock = get_bus_freq(ofdev->node);
  112. if (!clock) {
  113. /* Use maximum divider if clock is unknown */
  114. dev_warn(&ofdev->dev, "could not determine IPS clock\n");
  115. clock = 0x3F * 5000000;
  116. }
  117. } else
  118. clock = ppc_proc_freq;
  119. /*
  120. * Scale for a MII clock <= 2.5 MHz
  121. * Note that only 6 bits (25:30) are available for MII speed.
  122. */
  123. speed = (clock + 4999999) / 5000000;
  124. if (speed > 0x3F) {
  125. speed = 0x3F;
  126. dev_err(&ofdev->dev,
  127. "MII clock (%d Hz) exceeds max (2.5 MHz)\n",
  128. clock / speed);
  129. }
  130. fec->mii_speed = speed << 1;
  131. setbits32(&fec->fecp->fec_r_cntrl, FEC_RCNTRL_MII_MODE);
  132. setbits32(&fec->fecp->fec_ecntrl, FEC_ECNTRL_PINMUX |
  133. FEC_ECNTRL_ETHER_EN);
  134. out_be32(&fec->fecp->fec_ievent, FEC_ENET_MII);
  135. clrsetbits_be32(&fec->fecp->fec_mii_speed, 0x7E, fec->mii_speed);
  136. new_bus->phy_mask = ~0;
  137. new_bus->irq = kmalloc(sizeof(int) * PHY_MAX_ADDR, GFP_KERNEL);
  138. if (!new_bus->irq)
  139. goto out_unmap_regs;
  140. new_bus->parent = &ofdev->dev;
  141. dev_set_drvdata(&ofdev->dev, new_bus);
  142. ret = of_mdiobus_register(new_bus, ofdev->node);
  143. if (ret)
  144. goto out_free_irqs;
  145. return 0;
  146. out_free_irqs:
  147. dev_set_drvdata(&ofdev->dev, NULL);
  148. kfree(new_bus->irq);
  149. out_unmap_regs:
  150. iounmap(fec->fecp);
  151. out_res:
  152. out_fec:
  153. kfree(fec);
  154. out_mii:
  155. mdiobus_free(new_bus);
  156. out:
  157. return ret;
  158. }
  159. static int fs_enet_mdio_remove(struct of_device *ofdev)
  160. {
  161. struct mii_bus *bus = dev_get_drvdata(&ofdev->dev);
  162. struct fec_info *fec = bus->priv;
  163. mdiobus_unregister(bus);
  164. dev_set_drvdata(&ofdev->dev, NULL);
  165. kfree(bus->irq);
  166. iounmap(fec->fecp);
  167. kfree(fec);
  168. mdiobus_free(bus);
  169. return 0;
  170. }
  171. static struct of_device_id fs_enet_mdio_fec_match[] = {
  172. {
  173. .compatible = "fsl,pq1-fec-mdio",
  174. },
  175. #if defined(CONFIG_PPC_MPC512x)
  176. {
  177. .compatible = "fsl,mpc5121-fec-mdio",
  178. .data = mpc5xxx_get_bus_frequency,
  179. },
  180. #endif
  181. {},
  182. };
  183. MODULE_DEVICE_TABLE(of, fs_enet_mdio_fec_match);
  184. static struct of_platform_driver fs_enet_fec_mdio_driver = {
  185. .name = "fsl-fec-mdio",
  186. .match_table = fs_enet_mdio_fec_match,
  187. .probe = fs_enet_mdio_probe,
  188. .remove = fs_enet_mdio_remove,
  189. };
  190. static int fs_enet_mdio_fec_init(void)
  191. {
  192. return of_register_platform_driver(&fs_enet_fec_mdio_driver);
  193. }
  194. static void fs_enet_mdio_fec_exit(void)
  195. {
  196. of_unregister_platform_driver(&fs_enet_fec_mdio_driver);
  197. }
  198. module_init(fs_enet_mdio_fec_init);
  199. module_exit(fs_enet_mdio_fec_exit);