vnic_rq.h 5.4 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214
  1. /*
  2. * Copyright 2008, 2009 Cisco Systems, Inc. All rights reserved.
  3. * Copyright 2007 Nuova Systems, Inc. All rights reserved.
  4. *
  5. * This program is free software; you may redistribute it and/or modify
  6. * it under the terms of the GNU General Public License as published by
  7. * the Free Software Foundation; version 2 of the License.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  10. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  11. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  12. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  13. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  14. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  15. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  16. * SOFTWARE.
  17. *
  18. */
  19. #ifndef _VNIC_RQ_H_
  20. #define _VNIC_RQ_H_
  21. #include <linux/pci.h>
  22. #include "vnic_dev.h"
  23. #include "vnic_cq.h"
  24. /* Receive queue control */
  25. struct vnic_rq_ctrl {
  26. u64 ring_base; /* 0x00 */
  27. u32 ring_size; /* 0x08 */
  28. u32 pad0;
  29. u32 posted_index; /* 0x10 */
  30. u32 pad1;
  31. u32 cq_index; /* 0x18 */
  32. u32 pad2;
  33. u32 enable; /* 0x20 */
  34. u32 pad3;
  35. u32 running; /* 0x28 */
  36. u32 pad4;
  37. u32 fetch_index; /* 0x30 */
  38. u32 pad5;
  39. u32 error_interrupt_enable; /* 0x38 */
  40. u32 pad6;
  41. u32 error_interrupt_offset; /* 0x40 */
  42. u32 pad7;
  43. u32 error_status; /* 0x48 */
  44. u32 pad8;
  45. u32 dropped_packet_count; /* 0x50 */
  46. u32 pad9;
  47. u32 dropped_packet_count_rc; /* 0x58 */
  48. u32 pad10;
  49. };
  50. /* Break the vnic_rq_buf allocations into blocks of 64 entries */
  51. #define VNIC_RQ_BUF_BLK_ENTRIES 64
  52. #define VNIC_RQ_BUF_BLK_SZ \
  53. (VNIC_RQ_BUF_BLK_ENTRIES * sizeof(struct vnic_rq_buf))
  54. #define VNIC_RQ_BUF_BLKS_NEEDED(entries) \
  55. DIV_ROUND_UP(entries, VNIC_RQ_BUF_BLK_ENTRIES)
  56. #define VNIC_RQ_BUF_BLKS_MAX VNIC_RQ_BUF_BLKS_NEEDED(4096)
  57. struct vnic_rq_buf {
  58. struct vnic_rq_buf *next;
  59. dma_addr_t dma_addr;
  60. void *os_buf;
  61. unsigned int os_buf_index;
  62. unsigned int len;
  63. unsigned int index;
  64. void *desc;
  65. };
  66. struct vnic_rq {
  67. unsigned int index;
  68. struct vnic_dev *vdev;
  69. struct vnic_rq_ctrl __iomem *ctrl; /* memory-mapped */
  70. struct vnic_dev_ring ring;
  71. struct vnic_rq_buf *bufs[VNIC_RQ_BUF_BLKS_MAX];
  72. struct vnic_rq_buf *to_use;
  73. struct vnic_rq_buf *to_clean;
  74. void *os_buf_head;
  75. unsigned int pkts_outstanding;
  76. };
  77. static inline unsigned int vnic_rq_desc_avail(struct vnic_rq *rq)
  78. {
  79. /* how many does SW own? */
  80. return rq->ring.desc_avail;
  81. }
  82. static inline unsigned int vnic_rq_desc_used(struct vnic_rq *rq)
  83. {
  84. /* how many does HW own? */
  85. return rq->ring.desc_count - rq->ring.desc_avail - 1;
  86. }
  87. static inline void *vnic_rq_next_desc(struct vnic_rq *rq)
  88. {
  89. return rq->to_use->desc;
  90. }
  91. static inline unsigned int vnic_rq_next_index(struct vnic_rq *rq)
  92. {
  93. return rq->to_use->index;
  94. }
  95. static inline void vnic_rq_post(struct vnic_rq *rq,
  96. void *os_buf, unsigned int os_buf_index,
  97. dma_addr_t dma_addr, unsigned int len)
  98. {
  99. struct vnic_rq_buf *buf = rq->to_use;
  100. buf->os_buf = os_buf;
  101. buf->os_buf_index = os_buf_index;
  102. buf->dma_addr = dma_addr;
  103. buf->len = len;
  104. buf = buf->next;
  105. rq->to_use = buf;
  106. rq->ring.desc_avail--;
  107. /* Move the posted_index every nth descriptor
  108. */
  109. #ifndef VNIC_RQ_RETURN_RATE
  110. #define VNIC_RQ_RETURN_RATE 0xf /* keep 2^n - 1 */
  111. #endif
  112. if ((buf->index & VNIC_RQ_RETURN_RATE) == 0) {
  113. /* Adding write memory barrier prevents compiler and/or CPU
  114. * reordering, thus avoiding descriptor posting before
  115. * descriptor is initialized. Otherwise, hardware can read
  116. * stale descriptor fields.
  117. */
  118. wmb();
  119. iowrite32(buf->index, &rq->ctrl->posted_index);
  120. }
  121. }
  122. static inline int vnic_rq_posting_soon(struct vnic_rq *rq)
  123. {
  124. return ((rq->to_use->index & VNIC_RQ_RETURN_RATE) == 0);
  125. }
  126. static inline void vnic_rq_return_descs(struct vnic_rq *rq, unsigned int count)
  127. {
  128. rq->ring.desc_avail += count;
  129. }
  130. enum desc_return_options {
  131. VNIC_RQ_RETURN_DESC,
  132. VNIC_RQ_DEFER_RETURN_DESC,
  133. };
  134. static inline void vnic_rq_service(struct vnic_rq *rq,
  135. struct cq_desc *cq_desc, u16 completed_index,
  136. int desc_return, void (*buf_service)(struct vnic_rq *rq,
  137. struct cq_desc *cq_desc, struct vnic_rq_buf *buf,
  138. int skipped, void *opaque), void *opaque)
  139. {
  140. struct vnic_rq_buf *buf;
  141. int skipped;
  142. buf = rq->to_clean;
  143. while (1) {
  144. skipped = (buf->index != completed_index);
  145. (*buf_service)(rq, cq_desc, buf, skipped, opaque);
  146. if (desc_return == VNIC_RQ_RETURN_DESC)
  147. rq->ring.desc_avail++;
  148. rq->to_clean = buf->next;
  149. if (!skipped)
  150. break;
  151. buf = rq->to_clean;
  152. }
  153. }
  154. static inline int vnic_rq_fill(struct vnic_rq *rq,
  155. int (*buf_fill)(struct vnic_rq *rq))
  156. {
  157. int err;
  158. while (vnic_rq_desc_avail(rq) > 0) {
  159. err = (*buf_fill)(rq);
  160. if (err)
  161. return err;
  162. }
  163. return 0;
  164. }
  165. void vnic_rq_free(struct vnic_rq *rq);
  166. int vnic_rq_alloc(struct vnic_dev *vdev, struct vnic_rq *rq, unsigned int index,
  167. unsigned int desc_count, unsigned int desc_size);
  168. void vnic_rq_init_start(struct vnic_rq *rq, unsigned int cq_index,
  169. unsigned int fetch_index, unsigned int posted_index,
  170. unsigned int error_interrupt_enable,
  171. unsigned int error_interrupt_offset);
  172. void vnic_rq_init(struct vnic_rq *rq, unsigned int cq_index,
  173. unsigned int error_interrupt_enable,
  174. unsigned int error_interrupt_offset);
  175. unsigned int vnic_rq_error_status(struct vnic_rq *rq);
  176. void vnic_rq_enable(struct vnic_rq *rq);
  177. int vnic_rq_disable(struct vnic_rq *rq);
  178. void vnic_rq_clean(struct vnic_rq *rq,
  179. void (*buf_clean)(struct vnic_rq *rq, struct vnic_rq_buf *buf));
  180. #endif /* _VNIC_RQ_H_ */