enic_main.c 50 KB

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  1. /*
  2. * Copyright 2008 Cisco Systems, Inc. All rights reserved.
  3. * Copyright 2007 Nuova Systems, Inc. All rights reserved.
  4. *
  5. * This program is free software; you may redistribute it and/or modify
  6. * it under the terms of the GNU General Public License as published by
  7. * the Free Software Foundation; version 2 of the License.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  10. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  11. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  12. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  13. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  14. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  15. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  16. * SOFTWARE.
  17. *
  18. */
  19. #include <linux/module.h>
  20. #include <linux/kernel.h>
  21. #include <linux/string.h>
  22. #include <linux/errno.h>
  23. #include <linux/types.h>
  24. #include <linux/init.h>
  25. #include <linux/workqueue.h>
  26. #include <linux/pci.h>
  27. #include <linux/netdevice.h>
  28. #include <linux/etherdevice.h>
  29. #include <linux/if_ether.h>
  30. #include <linux/if_vlan.h>
  31. #include <linux/ethtool.h>
  32. #include <linux/in.h>
  33. #include <linux/ip.h>
  34. #include <linux/ipv6.h>
  35. #include <linux/tcp.h>
  36. #include <net/ip6_checksum.h>
  37. #include "cq_enet_desc.h"
  38. #include "vnic_dev.h"
  39. #include "vnic_intr.h"
  40. #include "vnic_stats.h"
  41. #include "enic_res.h"
  42. #include "enic.h"
  43. #define ENIC_NOTIFY_TIMER_PERIOD (2 * HZ)
  44. #define WQ_ENET_MAX_DESC_LEN (1 << WQ_ENET_LEN_BITS)
  45. #define MAX_TSO (1 << 16)
  46. #define ENIC_DESC_MAX_SPLITS (MAX_TSO / WQ_ENET_MAX_DESC_LEN + 1)
  47. #define PCI_DEVICE_ID_CISCO_VIC_ENET 0x0043 /* ethernet vnic */
  48. /* Supported devices */
  49. static struct pci_device_id enic_id_table[] = {
  50. { PCI_VDEVICE(CISCO, PCI_DEVICE_ID_CISCO_VIC_ENET) },
  51. { 0, } /* end of table */
  52. };
  53. MODULE_DESCRIPTION(DRV_DESCRIPTION);
  54. MODULE_AUTHOR("Scott Feldman <scofeldm@cisco.com>");
  55. MODULE_LICENSE("GPL");
  56. MODULE_VERSION(DRV_VERSION);
  57. MODULE_DEVICE_TABLE(pci, enic_id_table);
  58. struct enic_stat {
  59. char name[ETH_GSTRING_LEN];
  60. unsigned int offset;
  61. };
  62. #define ENIC_TX_STAT(stat) \
  63. { .name = #stat, .offset = offsetof(struct vnic_tx_stats, stat) / 8 }
  64. #define ENIC_RX_STAT(stat) \
  65. { .name = #stat, .offset = offsetof(struct vnic_rx_stats, stat) / 8 }
  66. static const struct enic_stat enic_tx_stats[] = {
  67. ENIC_TX_STAT(tx_frames_ok),
  68. ENIC_TX_STAT(tx_unicast_frames_ok),
  69. ENIC_TX_STAT(tx_multicast_frames_ok),
  70. ENIC_TX_STAT(tx_broadcast_frames_ok),
  71. ENIC_TX_STAT(tx_bytes_ok),
  72. ENIC_TX_STAT(tx_unicast_bytes_ok),
  73. ENIC_TX_STAT(tx_multicast_bytes_ok),
  74. ENIC_TX_STAT(tx_broadcast_bytes_ok),
  75. ENIC_TX_STAT(tx_drops),
  76. ENIC_TX_STAT(tx_errors),
  77. ENIC_TX_STAT(tx_tso),
  78. };
  79. static const struct enic_stat enic_rx_stats[] = {
  80. ENIC_RX_STAT(rx_frames_ok),
  81. ENIC_RX_STAT(rx_frames_total),
  82. ENIC_RX_STAT(rx_unicast_frames_ok),
  83. ENIC_RX_STAT(rx_multicast_frames_ok),
  84. ENIC_RX_STAT(rx_broadcast_frames_ok),
  85. ENIC_RX_STAT(rx_bytes_ok),
  86. ENIC_RX_STAT(rx_unicast_bytes_ok),
  87. ENIC_RX_STAT(rx_multicast_bytes_ok),
  88. ENIC_RX_STAT(rx_broadcast_bytes_ok),
  89. ENIC_RX_STAT(rx_drop),
  90. ENIC_RX_STAT(rx_no_bufs),
  91. ENIC_RX_STAT(rx_errors),
  92. ENIC_RX_STAT(rx_rss),
  93. ENIC_RX_STAT(rx_crc_errors),
  94. ENIC_RX_STAT(rx_frames_64),
  95. ENIC_RX_STAT(rx_frames_127),
  96. ENIC_RX_STAT(rx_frames_255),
  97. ENIC_RX_STAT(rx_frames_511),
  98. ENIC_RX_STAT(rx_frames_1023),
  99. ENIC_RX_STAT(rx_frames_1518),
  100. ENIC_RX_STAT(rx_frames_to_max),
  101. };
  102. static const unsigned int enic_n_tx_stats = ARRAY_SIZE(enic_tx_stats);
  103. static const unsigned int enic_n_rx_stats = ARRAY_SIZE(enic_rx_stats);
  104. static int enic_get_settings(struct net_device *netdev,
  105. struct ethtool_cmd *ecmd)
  106. {
  107. struct enic *enic = netdev_priv(netdev);
  108. ecmd->supported = (SUPPORTED_10000baseT_Full | SUPPORTED_FIBRE);
  109. ecmd->advertising = (ADVERTISED_10000baseT_Full | ADVERTISED_FIBRE);
  110. ecmd->port = PORT_FIBRE;
  111. ecmd->transceiver = XCVR_EXTERNAL;
  112. if (netif_carrier_ok(netdev)) {
  113. ecmd->speed = vnic_dev_port_speed(enic->vdev);
  114. ecmd->duplex = DUPLEX_FULL;
  115. } else {
  116. ecmd->speed = -1;
  117. ecmd->duplex = -1;
  118. }
  119. ecmd->autoneg = AUTONEG_DISABLE;
  120. return 0;
  121. }
  122. static void enic_get_drvinfo(struct net_device *netdev,
  123. struct ethtool_drvinfo *drvinfo)
  124. {
  125. struct enic *enic = netdev_priv(netdev);
  126. struct vnic_devcmd_fw_info *fw_info;
  127. spin_lock(&enic->devcmd_lock);
  128. vnic_dev_fw_info(enic->vdev, &fw_info);
  129. spin_unlock(&enic->devcmd_lock);
  130. strncpy(drvinfo->driver, DRV_NAME, sizeof(drvinfo->driver));
  131. strncpy(drvinfo->version, DRV_VERSION, sizeof(drvinfo->version));
  132. strncpy(drvinfo->fw_version, fw_info->fw_version,
  133. sizeof(drvinfo->fw_version));
  134. strncpy(drvinfo->bus_info, pci_name(enic->pdev),
  135. sizeof(drvinfo->bus_info));
  136. }
  137. static void enic_get_strings(struct net_device *netdev, u32 stringset, u8 *data)
  138. {
  139. unsigned int i;
  140. switch (stringset) {
  141. case ETH_SS_STATS:
  142. for (i = 0; i < enic_n_tx_stats; i++) {
  143. memcpy(data, enic_tx_stats[i].name, ETH_GSTRING_LEN);
  144. data += ETH_GSTRING_LEN;
  145. }
  146. for (i = 0; i < enic_n_rx_stats; i++) {
  147. memcpy(data, enic_rx_stats[i].name, ETH_GSTRING_LEN);
  148. data += ETH_GSTRING_LEN;
  149. }
  150. break;
  151. }
  152. }
  153. static int enic_get_sset_count(struct net_device *netdev, int sset)
  154. {
  155. switch (sset) {
  156. case ETH_SS_STATS:
  157. return enic_n_tx_stats + enic_n_rx_stats;
  158. default:
  159. return -EOPNOTSUPP;
  160. }
  161. }
  162. static void enic_get_ethtool_stats(struct net_device *netdev,
  163. struct ethtool_stats *stats, u64 *data)
  164. {
  165. struct enic *enic = netdev_priv(netdev);
  166. struct vnic_stats *vstats;
  167. unsigned int i;
  168. spin_lock(&enic->devcmd_lock);
  169. vnic_dev_stats_dump(enic->vdev, &vstats);
  170. spin_unlock(&enic->devcmd_lock);
  171. for (i = 0; i < enic_n_tx_stats; i++)
  172. *(data++) = ((u64 *)&vstats->tx)[enic_tx_stats[i].offset];
  173. for (i = 0; i < enic_n_rx_stats; i++)
  174. *(data++) = ((u64 *)&vstats->rx)[enic_rx_stats[i].offset];
  175. }
  176. static u32 enic_get_rx_csum(struct net_device *netdev)
  177. {
  178. struct enic *enic = netdev_priv(netdev);
  179. return enic->csum_rx_enabled;
  180. }
  181. static int enic_set_rx_csum(struct net_device *netdev, u32 data)
  182. {
  183. struct enic *enic = netdev_priv(netdev);
  184. if (data && !ENIC_SETTING(enic, RXCSUM))
  185. return -EINVAL;
  186. enic->csum_rx_enabled = !!data;
  187. return 0;
  188. }
  189. static int enic_set_tx_csum(struct net_device *netdev, u32 data)
  190. {
  191. struct enic *enic = netdev_priv(netdev);
  192. if (data && !ENIC_SETTING(enic, TXCSUM))
  193. return -EINVAL;
  194. if (data)
  195. netdev->features |= NETIF_F_HW_CSUM;
  196. else
  197. netdev->features &= ~NETIF_F_HW_CSUM;
  198. return 0;
  199. }
  200. static int enic_set_tso(struct net_device *netdev, u32 data)
  201. {
  202. struct enic *enic = netdev_priv(netdev);
  203. if (data && !ENIC_SETTING(enic, TSO))
  204. return -EINVAL;
  205. if (data)
  206. netdev->features |=
  207. NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_TSO_ECN;
  208. else
  209. netdev->features &=
  210. ~(NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_TSO_ECN);
  211. return 0;
  212. }
  213. static u32 enic_get_msglevel(struct net_device *netdev)
  214. {
  215. struct enic *enic = netdev_priv(netdev);
  216. return enic->msg_enable;
  217. }
  218. static void enic_set_msglevel(struct net_device *netdev, u32 value)
  219. {
  220. struct enic *enic = netdev_priv(netdev);
  221. enic->msg_enable = value;
  222. }
  223. static const struct ethtool_ops enic_ethtool_ops = {
  224. .get_settings = enic_get_settings,
  225. .get_drvinfo = enic_get_drvinfo,
  226. .get_msglevel = enic_get_msglevel,
  227. .set_msglevel = enic_set_msglevel,
  228. .get_link = ethtool_op_get_link,
  229. .get_strings = enic_get_strings,
  230. .get_sset_count = enic_get_sset_count,
  231. .get_ethtool_stats = enic_get_ethtool_stats,
  232. .get_rx_csum = enic_get_rx_csum,
  233. .set_rx_csum = enic_set_rx_csum,
  234. .get_tx_csum = ethtool_op_get_tx_csum,
  235. .set_tx_csum = enic_set_tx_csum,
  236. .get_sg = ethtool_op_get_sg,
  237. .set_sg = ethtool_op_set_sg,
  238. .get_tso = ethtool_op_get_tso,
  239. .set_tso = enic_set_tso,
  240. .get_flags = ethtool_op_get_flags,
  241. .set_flags = ethtool_op_set_flags,
  242. };
  243. static void enic_free_wq_buf(struct vnic_wq *wq, struct vnic_wq_buf *buf)
  244. {
  245. struct enic *enic = vnic_dev_priv(wq->vdev);
  246. if (buf->sop)
  247. pci_unmap_single(enic->pdev, buf->dma_addr,
  248. buf->len, PCI_DMA_TODEVICE);
  249. else
  250. pci_unmap_page(enic->pdev, buf->dma_addr,
  251. buf->len, PCI_DMA_TODEVICE);
  252. if (buf->os_buf)
  253. dev_kfree_skb_any(buf->os_buf);
  254. }
  255. static void enic_wq_free_buf(struct vnic_wq *wq,
  256. struct cq_desc *cq_desc, struct vnic_wq_buf *buf, void *opaque)
  257. {
  258. enic_free_wq_buf(wq, buf);
  259. }
  260. static int enic_wq_service(struct vnic_dev *vdev, struct cq_desc *cq_desc,
  261. u8 type, u16 q_number, u16 completed_index, void *opaque)
  262. {
  263. struct enic *enic = vnic_dev_priv(vdev);
  264. spin_lock(&enic->wq_lock[q_number]);
  265. vnic_wq_service(&enic->wq[q_number], cq_desc,
  266. completed_index, enic_wq_free_buf,
  267. opaque);
  268. if (netif_queue_stopped(enic->netdev) &&
  269. vnic_wq_desc_avail(&enic->wq[q_number]) >=
  270. (MAX_SKB_FRAGS + ENIC_DESC_MAX_SPLITS))
  271. netif_wake_queue(enic->netdev);
  272. spin_unlock(&enic->wq_lock[q_number]);
  273. return 0;
  274. }
  275. static void enic_log_q_error(struct enic *enic)
  276. {
  277. unsigned int i;
  278. u32 error_status;
  279. for (i = 0; i < enic->wq_count; i++) {
  280. error_status = vnic_wq_error_status(&enic->wq[i]);
  281. if (error_status)
  282. printk(KERN_ERR PFX "%s: WQ[%d] error_status %d\n",
  283. enic->netdev->name, i, error_status);
  284. }
  285. for (i = 0; i < enic->rq_count; i++) {
  286. error_status = vnic_rq_error_status(&enic->rq[i]);
  287. if (error_status)
  288. printk(KERN_ERR PFX "%s: RQ[%d] error_status %d\n",
  289. enic->netdev->name, i, error_status);
  290. }
  291. }
  292. static void enic_link_check(struct enic *enic)
  293. {
  294. int link_status = vnic_dev_link_status(enic->vdev);
  295. int carrier_ok = netif_carrier_ok(enic->netdev);
  296. if (link_status && !carrier_ok) {
  297. printk(KERN_INFO PFX "%s: Link UP\n", enic->netdev->name);
  298. netif_carrier_on(enic->netdev);
  299. } else if (!link_status && carrier_ok) {
  300. printk(KERN_INFO PFX "%s: Link DOWN\n", enic->netdev->name);
  301. netif_carrier_off(enic->netdev);
  302. }
  303. }
  304. static void enic_mtu_check(struct enic *enic)
  305. {
  306. u32 mtu = vnic_dev_mtu(enic->vdev);
  307. if (mtu && mtu != enic->port_mtu) {
  308. if (mtu < enic->netdev->mtu)
  309. printk(KERN_WARNING PFX
  310. "%s: interface MTU (%d) set higher "
  311. "than switch port MTU (%d)\n",
  312. enic->netdev->name, enic->netdev->mtu, mtu);
  313. enic->port_mtu = mtu;
  314. }
  315. }
  316. static void enic_msglvl_check(struct enic *enic)
  317. {
  318. u32 msg_enable = vnic_dev_msg_lvl(enic->vdev);
  319. if (msg_enable != enic->msg_enable) {
  320. printk(KERN_INFO PFX "%s: msg lvl changed from 0x%x to 0x%x\n",
  321. enic->netdev->name, enic->msg_enable, msg_enable);
  322. enic->msg_enable = msg_enable;
  323. }
  324. }
  325. static void enic_notify_check(struct enic *enic)
  326. {
  327. enic_msglvl_check(enic);
  328. enic_mtu_check(enic);
  329. enic_link_check(enic);
  330. }
  331. #define ENIC_TEST_INTR(pba, i) (pba & (1 << i))
  332. static irqreturn_t enic_isr_legacy(int irq, void *data)
  333. {
  334. struct net_device *netdev = data;
  335. struct enic *enic = netdev_priv(netdev);
  336. u32 pba;
  337. vnic_intr_mask(&enic->intr[ENIC_INTX_WQ_RQ]);
  338. pba = vnic_intr_legacy_pba(enic->legacy_pba);
  339. if (!pba) {
  340. vnic_intr_unmask(&enic->intr[ENIC_INTX_WQ_RQ]);
  341. return IRQ_NONE; /* not our interrupt */
  342. }
  343. if (ENIC_TEST_INTR(pba, ENIC_INTX_NOTIFY)) {
  344. vnic_intr_return_all_credits(&enic->intr[ENIC_INTX_NOTIFY]);
  345. enic_notify_check(enic);
  346. }
  347. if (ENIC_TEST_INTR(pba, ENIC_INTX_ERR)) {
  348. vnic_intr_return_all_credits(&enic->intr[ENIC_INTX_ERR]);
  349. enic_log_q_error(enic);
  350. /* schedule recovery from WQ/RQ error */
  351. schedule_work(&enic->reset);
  352. return IRQ_HANDLED;
  353. }
  354. if (ENIC_TEST_INTR(pba, ENIC_INTX_WQ_RQ)) {
  355. if (napi_schedule_prep(&enic->napi))
  356. __napi_schedule(&enic->napi);
  357. } else {
  358. vnic_intr_unmask(&enic->intr[ENIC_INTX_WQ_RQ]);
  359. }
  360. return IRQ_HANDLED;
  361. }
  362. static irqreturn_t enic_isr_msi(int irq, void *data)
  363. {
  364. struct enic *enic = data;
  365. /* With MSI, there is no sharing of interrupts, so this is
  366. * our interrupt and there is no need to ack it. The device
  367. * is not providing per-vector masking, so the OS will not
  368. * write to PCI config space to mask/unmask the interrupt.
  369. * We're using mask_on_assertion for MSI, so the device
  370. * automatically masks the interrupt when the interrupt is
  371. * generated. Later, when exiting polling, the interrupt
  372. * will be unmasked (see enic_poll).
  373. *
  374. * Also, the device uses the same PCIe Traffic Class (TC)
  375. * for Memory Write data and MSI, so there are no ordering
  376. * issues; the MSI will always arrive at the Root Complex
  377. * _after_ corresponding Memory Writes (i.e. descriptor
  378. * writes).
  379. */
  380. napi_schedule(&enic->napi);
  381. return IRQ_HANDLED;
  382. }
  383. static irqreturn_t enic_isr_msix_rq(int irq, void *data)
  384. {
  385. struct enic *enic = data;
  386. /* schedule NAPI polling for RQ cleanup */
  387. napi_schedule(&enic->napi);
  388. return IRQ_HANDLED;
  389. }
  390. static irqreturn_t enic_isr_msix_wq(int irq, void *data)
  391. {
  392. struct enic *enic = data;
  393. unsigned int wq_work_to_do = -1; /* no limit */
  394. unsigned int wq_work_done;
  395. wq_work_done = vnic_cq_service(&enic->cq[ENIC_CQ_WQ],
  396. wq_work_to_do, enic_wq_service, NULL);
  397. vnic_intr_return_credits(&enic->intr[ENIC_MSIX_WQ],
  398. wq_work_done,
  399. 1 /* unmask intr */,
  400. 1 /* reset intr timer */);
  401. return IRQ_HANDLED;
  402. }
  403. static irqreturn_t enic_isr_msix_err(int irq, void *data)
  404. {
  405. struct enic *enic = data;
  406. vnic_intr_return_all_credits(&enic->intr[ENIC_MSIX_ERR]);
  407. enic_log_q_error(enic);
  408. /* schedule recovery from WQ/RQ error */
  409. schedule_work(&enic->reset);
  410. return IRQ_HANDLED;
  411. }
  412. static irqreturn_t enic_isr_msix_notify(int irq, void *data)
  413. {
  414. struct enic *enic = data;
  415. vnic_intr_return_all_credits(&enic->intr[ENIC_MSIX_NOTIFY]);
  416. enic_notify_check(enic);
  417. return IRQ_HANDLED;
  418. }
  419. static inline void enic_queue_wq_skb_cont(struct enic *enic,
  420. struct vnic_wq *wq, struct sk_buff *skb,
  421. unsigned int len_left)
  422. {
  423. skb_frag_t *frag;
  424. /* Queue additional data fragments */
  425. for (frag = skb_shinfo(skb)->frags; len_left; frag++) {
  426. len_left -= frag->size;
  427. enic_queue_wq_desc_cont(wq, skb,
  428. pci_map_page(enic->pdev, frag->page,
  429. frag->page_offset, frag->size,
  430. PCI_DMA_TODEVICE),
  431. frag->size,
  432. (len_left == 0)); /* EOP? */
  433. }
  434. }
  435. static inline void enic_queue_wq_skb_vlan(struct enic *enic,
  436. struct vnic_wq *wq, struct sk_buff *skb,
  437. int vlan_tag_insert, unsigned int vlan_tag)
  438. {
  439. unsigned int head_len = skb_headlen(skb);
  440. unsigned int len_left = skb->len - head_len;
  441. int eop = (len_left == 0);
  442. /* Queue the main skb fragment. The fragments are no larger
  443. * than max MTU(9000)+ETH_HDR_LEN(14) bytes, which is less
  444. * than WQ_ENET_MAX_DESC_LEN length. So only one descriptor
  445. * per fragment is queued.
  446. */
  447. enic_queue_wq_desc(wq, skb,
  448. pci_map_single(enic->pdev, skb->data,
  449. head_len, PCI_DMA_TODEVICE),
  450. head_len,
  451. vlan_tag_insert, vlan_tag,
  452. eop);
  453. if (!eop)
  454. enic_queue_wq_skb_cont(enic, wq, skb, len_left);
  455. }
  456. static inline void enic_queue_wq_skb_csum_l4(struct enic *enic,
  457. struct vnic_wq *wq, struct sk_buff *skb,
  458. int vlan_tag_insert, unsigned int vlan_tag)
  459. {
  460. unsigned int head_len = skb_headlen(skb);
  461. unsigned int len_left = skb->len - head_len;
  462. unsigned int hdr_len = skb_transport_offset(skb);
  463. unsigned int csum_offset = hdr_len + skb->csum_offset;
  464. int eop = (len_left == 0);
  465. /* Queue the main skb fragment. The fragments are no larger
  466. * than max MTU(9000)+ETH_HDR_LEN(14) bytes, which is less
  467. * than WQ_ENET_MAX_DESC_LEN length. So only one descriptor
  468. * per fragment is queued.
  469. */
  470. enic_queue_wq_desc_csum_l4(wq, skb,
  471. pci_map_single(enic->pdev, skb->data,
  472. head_len, PCI_DMA_TODEVICE),
  473. head_len,
  474. csum_offset,
  475. hdr_len,
  476. vlan_tag_insert, vlan_tag,
  477. eop);
  478. if (!eop)
  479. enic_queue_wq_skb_cont(enic, wq, skb, len_left);
  480. }
  481. static inline void enic_queue_wq_skb_tso(struct enic *enic,
  482. struct vnic_wq *wq, struct sk_buff *skb, unsigned int mss,
  483. int vlan_tag_insert, unsigned int vlan_tag)
  484. {
  485. unsigned int frag_len_left = skb_headlen(skb);
  486. unsigned int len_left = skb->len - frag_len_left;
  487. unsigned int hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
  488. int eop = (len_left == 0);
  489. unsigned int len;
  490. dma_addr_t dma_addr;
  491. unsigned int offset = 0;
  492. skb_frag_t *frag;
  493. /* Preload TCP csum field with IP pseudo hdr calculated
  494. * with IP length set to zero. HW will later add in length
  495. * to each TCP segment resulting from the TSO.
  496. */
  497. if (skb->protocol == cpu_to_be16(ETH_P_IP)) {
  498. ip_hdr(skb)->check = 0;
  499. tcp_hdr(skb)->check = ~csum_tcpudp_magic(ip_hdr(skb)->saddr,
  500. ip_hdr(skb)->daddr, 0, IPPROTO_TCP, 0);
  501. } else if (skb->protocol == cpu_to_be16(ETH_P_IPV6)) {
  502. tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
  503. &ipv6_hdr(skb)->daddr, 0, IPPROTO_TCP, 0);
  504. }
  505. /* Queue WQ_ENET_MAX_DESC_LEN length descriptors
  506. * for the main skb fragment
  507. */
  508. while (frag_len_left) {
  509. len = min(frag_len_left, (unsigned int)WQ_ENET_MAX_DESC_LEN);
  510. dma_addr = pci_map_single(enic->pdev, skb->data + offset,
  511. len, PCI_DMA_TODEVICE);
  512. enic_queue_wq_desc_tso(wq, skb,
  513. dma_addr,
  514. len,
  515. mss, hdr_len,
  516. vlan_tag_insert, vlan_tag,
  517. eop && (len == frag_len_left));
  518. frag_len_left -= len;
  519. offset += len;
  520. }
  521. if (eop)
  522. return;
  523. /* Queue WQ_ENET_MAX_DESC_LEN length descriptors
  524. * for additional data fragments
  525. */
  526. for (frag = skb_shinfo(skb)->frags; len_left; frag++) {
  527. len_left -= frag->size;
  528. frag_len_left = frag->size;
  529. offset = frag->page_offset;
  530. while (frag_len_left) {
  531. len = min(frag_len_left,
  532. (unsigned int)WQ_ENET_MAX_DESC_LEN);
  533. dma_addr = pci_map_page(enic->pdev, frag->page,
  534. offset, len,
  535. PCI_DMA_TODEVICE);
  536. enic_queue_wq_desc_cont(wq, skb,
  537. dma_addr,
  538. len,
  539. (len_left == 0) &&
  540. (len == frag_len_left)); /* EOP? */
  541. frag_len_left -= len;
  542. offset += len;
  543. }
  544. }
  545. }
  546. static inline void enic_queue_wq_skb(struct enic *enic,
  547. struct vnic_wq *wq, struct sk_buff *skb)
  548. {
  549. unsigned int mss = skb_shinfo(skb)->gso_size;
  550. unsigned int vlan_tag = 0;
  551. int vlan_tag_insert = 0;
  552. if (enic->vlan_group && vlan_tx_tag_present(skb)) {
  553. /* VLAN tag from trunking driver */
  554. vlan_tag_insert = 1;
  555. vlan_tag = vlan_tx_tag_get(skb);
  556. }
  557. if (mss)
  558. enic_queue_wq_skb_tso(enic, wq, skb, mss,
  559. vlan_tag_insert, vlan_tag);
  560. else if (skb->ip_summed == CHECKSUM_PARTIAL)
  561. enic_queue_wq_skb_csum_l4(enic, wq, skb,
  562. vlan_tag_insert, vlan_tag);
  563. else
  564. enic_queue_wq_skb_vlan(enic, wq, skb,
  565. vlan_tag_insert, vlan_tag);
  566. }
  567. /* netif_tx_lock held, process context with BHs disabled, or BH */
  568. static netdev_tx_t enic_hard_start_xmit(struct sk_buff *skb,
  569. struct net_device *netdev)
  570. {
  571. struct enic *enic = netdev_priv(netdev);
  572. struct vnic_wq *wq = &enic->wq[0];
  573. unsigned long flags;
  574. if (skb->len <= 0) {
  575. dev_kfree_skb(skb);
  576. return NETDEV_TX_OK;
  577. }
  578. /* Non-TSO sends must fit within ENIC_NON_TSO_MAX_DESC descs,
  579. * which is very likely. In the off chance it's going to take
  580. * more than * ENIC_NON_TSO_MAX_DESC, linearize the skb.
  581. */
  582. if (skb_shinfo(skb)->gso_size == 0 &&
  583. skb_shinfo(skb)->nr_frags + 1 > ENIC_NON_TSO_MAX_DESC &&
  584. skb_linearize(skb)) {
  585. dev_kfree_skb(skb);
  586. return NETDEV_TX_OK;
  587. }
  588. spin_lock_irqsave(&enic->wq_lock[0], flags);
  589. if (vnic_wq_desc_avail(wq) <
  590. skb_shinfo(skb)->nr_frags + ENIC_DESC_MAX_SPLITS) {
  591. netif_stop_queue(netdev);
  592. /* This is a hard error, log it */
  593. printk(KERN_ERR PFX "%s: BUG! Tx ring full when "
  594. "queue awake!\n", netdev->name);
  595. spin_unlock_irqrestore(&enic->wq_lock[0], flags);
  596. return NETDEV_TX_BUSY;
  597. }
  598. enic_queue_wq_skb(enic, wq, skb);
  599. if (vnic_wq_desc_avail(wq) < MAX_SKB_FRAGS + ENIC_DESC_MAX_SPLITS)
  600. netif_stop_queue(netdev);
  601. spin_unlock_irqrestore(&enic->wq_lock[0], flags);
  602. return NETDEV_TX_OK;
  603. }
  604. /* dev_base_lock rwlock held, nominally process context */
  605. static struct net_device_stats *enic_get_stats(struct net_device *netdev)
  606. {
  607. struct enic *enic = netdev_priv(netdev);
  608. struct net_device_stats *net_stats = &netdev->stats;
  609. struct vnic_stats *stats;
  610. spin_lock(&enic->devcmd_lock);
  611. vnic_dev_stats_dump(enic->vdev, &stats);
  612. spin_unlock(&enic->devcmd_lock);
  613. net_stats->tx_packets = stats->tx.tx_frames_ok;
  614. net_stats->tx_bytes = stats->tx.tx_bytes_ok;
  615. net_stats->tx_errors = stats->tx.tx_errors;
  616. net_stats->tx_dropped = stats->tx.tx_drops;
  617. net_stats->rx_packets = stats->rx.rx_frames_ok;
  618. net_stats->rx_bytes = stats->rx.rx_bytes_ok;
  619. net_stats->rx_errors = stats->rx.rx_errors;
  620. net_stats->multicast = stats->rx.rx_multicast_frames_ok;
  621. net_stats->rx_over_errors = enic->rq_truncated_pkts;
  622. net_stats->rx_crc_errors = enic->rq_bad_fcs;
  623. net_stats->rx_dropped = stats->rx.rx_no_bufs + stats->rx.rx_drop;
  624. return net_stats;
  625. }
  626. static void enic_reset_mcaddrs(struct enic *enic)
  627. {
  628. enic->mc_count = 0;
  629. }
  630. static int enic_set_mac_addr(struct net_device *netdev, char *addr)
  631. {
  632. if (!is_valid_ether_addr(addr))
  633. return -EADDRNOTAVAIL;
  634. memcpy(netdev->dev_addr, addr, netdev->addr_len);
  635. return 0;
  636. }
  637. /* netif_tx_lock held, BHs disabled */
  638. static void enic_set_multicast_list(struct net_device *netdev)
  639. {
  640. struct enic *enic = netdev_priv(netdev);
  641. struct dev_mc_list *list = netdev->mc_list;
  642. int directed = 1;
  643. int multicast = (netdev->flags & IFF_MULTICAST) ? 1 : 0;
  644. int broadcast = (netdev->flags & IFF_BROADCAST) ? 1 : 0;
  645. int promisc = (netdev->flags & IFF_PROMISC) ? 1 : 0;
  646. int allmulti = (netdev->flags & IFF_ALLMULTI) ||
  647. (netdev->mc_count > ENIC_MULTICAST_PERFECT_FILTERS);
  648. u8 mc_addr[ENIC_MULTICAST_PERFECT_FILTERS][ETH_ALEN];
  649. unsigned int mc_count = netdev->mc_count;
  650. unsigned int i, j;
  651. if (mc_count > ENIC_MULTICAST_PERFECT_FILTERS)
  652. mc_count = ENIC_MULTICAST_PERFECT_FILTERS;
  653. spin_lock(&enic->devcmd_lock);
  654. vnic_dev_packet_filter(enic->vdev, directed,
  655. multicast, broadcast, promisc, allmulti);
  656. /* Is there an easier way? Trying to minimize to
  657. * calls to add/del multicast addrs. We keep the
  658. * addrs from the last call in enic->mc_addr and
  659. * look for changes to add/del.
  660. */
  661. for (i = 0; list && i < mc_count; i++) {
  662. memcpy(mc_addr[i], list->dmi_addr, ETH_ALEN);
  663. list = list->next;
  664. }
  665. for (i = 0; i < enic->mc_count; i++) {
  666. for (j = 0; j < mc_count; j++)
  667. if (compare_ether_addr(enic->mc_addr[i],
  668. mc_addr[j]) == 0)
  669. break;
  670. if (j == mc_count)
  671. enic_del_multicast_addr(enic, enic->mc_addr[i]);
  672. }
  673. for (i = 0; i < mc_count; i++) {
  674. for (j = 0; j < enic->mc_count; j++)
  675. if (compare_ether_addr(mc_addr[i],
  676. enic->mc_addr[j]) == 0)
  677. break;
  678. if (j == enic->mc_count)
  679. enic_add_multicast_addr(enic, mc_addr[i]);
  680. }
  681. /* Save the list to compare against next time
  682. */
  683. for (i = 0; i < mc_count; i++)
  684. memcpy(enic->mc_addr[i], mc_addr[i], ETH_ALEN);
  685. enic->mc_count = mc_count;
  686. spin_unlock(&enic->devcmd_lock);
  687. }
  688. /* rtnl lock is held */
  689. static void enic_vlan_rx_register(struct net_device *netdev,
  690. struct vlan_group *vlan_group)
  691. {
  692. struct enic *enic = netdev_priv(netdev);
  693. enic->vlan_group = vlan_group;
  694. }
  695. /* rtnl lock is held */
  696. static void enic_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
  697. {
  698. struct enic *enic = netdev_priv(netdev);
  699. spin_lock(&enic->devcmd_lock);
  700. enic_add_vlan(enic, vid);
  701. spin_unlock(&enic->devcmd_lock);
  702. }
  703. /* rtnl lock is held */
  704. static void enic_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
  705. {
  706. struct enic *enic = netdev_priv(netdev);
  707. spin_lock(&enic->devcmd_lock);
  708. enic_del_vlan(enic, vid);
  709. spin_unlock(&enic->devcmd_lock);
  710. }
  711. /* netif_tx_lock held, BHs disabled */
  712. static void enic_tx_timeout(struct net_device *netdev)
  713. {
  714. struct enic *enic = netdev_priv(netdev);
  715. schedule_work(&enic->reset);
  716. }
  717. static void enic_free_rq_buf(struct vnic_rq *rq, struct vnic_rq_buf *buf)
  718. {
  719. struct enic *enic = vnic_dev_priv(rq->vdev);
  720. if (!buf->os_buf)
  721. return;
  722. pci_unmap_single(enic->pdev, buf->dma_addr,
  723. buf->len, PCI_DMA_FROMDEVICE);
  724. dev_kfree_skb_any(buf->os_buf);
  725. }
  726. static inline struct sk_buff *enic_rq_alloc_skb(struct net_device *netdev,
  727. unsigned int size)
  728. {
  729. struct sk_buff *skb;
  730. skb = netdev_alloc_skb(netdev, size + NET_IP_ALIGN);
  731. if (skb)
  732. skb_reserve(skb, NET_IP_ALIGN);
  733. return skb;
  734. }
  735. static int enic_rq_alloc_buf(struct vnic_rq *rq)
  736. {
  737. struct enic *enic = vnic_dev_priv(rq->vdev);
  738. struct net_device *netdev = enic->netdev;
  739. struct sk_buff *skb;
  740. unsigned int len = netdev->mtu + ETH_HLEN;
  741. unsigned int os_buf_index = 0;
  742. dma_addr_t dma_addr;
  743. skb = enic_rq_alloc_skb(netdev, len);
  744. if (!skb)
  745. return -ENOMEM;
  746. dma_addr = pci_map_single(enic->pdev, skb->data,
  747. len, PCI_DMA_FROMDEVICE);
  748. enic_queue_rq_desc(rq, skb, os_buf_index,
  749. dma_addr, len);
  750. return 0;
  751. }
  752. static int enic_rq_alloc_buf_a1(struct vnic_rq *rq)
  753. {
  754. struct rq_enet_desc *desc = vnic_rq_next_desc(rq);
  755. if (vnic_rq_posting_soon(rq)) {
  756. /* SW workaround for A0 HW erratum: if we're just about
  757. * to write posted_index, insert a dummy desc
  758. * of type resvd
  759. */
  760. rq_enet_desc_enc(desc, 0, RQ_ENET_TYPE_RESV2, 0);
  761. vnic_rq_post(rq, 0, 0, 0, 0);
  762. } else {
  763. return enic_rq_alloc_buf(rq);
  764. }
  765. return 0;
  766. }
  767. static int enic_set_rq_alloc_buf(struct enic *enic)
  768. {
  769. enum vnic_dev_hw_version hw_ver;
  770. int err;
  771. err = vnic_dev_hw_version(enic->vdev, &hw_ver);
  772. if (err)
  773. return err;
  774. switch (hw_ver) {
  775. case VNIC_DEV_HW_VER_A1:
  776. enic->rq_alloc_buf = enic_rq_alloc_buf_a1;
  777. break;
  778. case VNIC_DEV_HW_VER_A2:
  779. case VNIC_DEV_HW_VER_UNKNOWN:
  780. enic->rq_alloc_buf = enic_rq_alloc_buf;
  781. break;
  782. default:
  783. return -ENODEV;
  784. }
  785. return 0;
  786. }
  787. static int enic_get_skb_header(struct sk_buff *skb, void **iphdr,
  788. void **tcph, u64 *hdr_flags, void *priv)
  789. {
  790. struct cq_enet_rq_desc *cq_desc = priv;
  791. unsigned int ip_len;
  792. struct iphdr *iph;
  793. u8 type, color, eop, sop, ingress_port, vlan_stripped;
  794. u8 fcoe, fcoe_sof, fcoe_fc_crc_ok, fcoe_enc_error, fcoe_eof;
  795. u8 tcp_udp_csum_ok, udp, tcp, ipv4_csum_ok;
  796. u8 ipv6, ipv4, ipv4_fragment, fcs_ok, rss_type, csum_not_calc;
  797. u8 packet_error;
  798. u16 q_number, completed_index, bytes_written, vlan, checksum;
  799. u32 rss_hash;
  800. cq_enet_rq_desc_dec(cq_desc,
  801. &type, &color, &q_number, &completed_index,
  802. &ingress_port, &fcoe, &eop, &sop, &rss_type,
  803. &csum_not_calc, &rss_hash, &bytes_written,
  804. &packet_error, &vlan_stripped, &vlan, &checksum,
  805. &fcoe_sof, &fcoe_fc_crc_ok, &fcoe_enc_error,
  806. &fcoe_eof, &tcp_udp_csum_ok, &udp, &tcp,
  807. &ipv4_csum_ok, &ipv6, &ipv4, &ipv4_fragment,
  808. &fcs_ok);
  809. if (!(ipv4 && tcp && !ipv4_fragment))
  810. return -1;
  811. skb_reset_network_header(skb);
  812. iph = ip_hdr(skb);
  813. ip_len = ip_hdrlen(skb);
  814. skb_set_transport_header(skb, ip_len);
  815. /* check if ip header and tcp header are complete */
  816. if (ntohs(iph->tot_len) < ip_len + tcp_hdrlen(skb))
  817. return -1;
  818. *hdr_flags = LRO_IPV4 | LRO_TCP;
  819. *tcph = tcp_hdr(skb);
  820. *iphdr = iph;
  821. return 0;
  822. }
  823. static void enic_rq_indicate_buf(struct vnic_rq *rq,
  824. struct cq_desc *cq_desc, struct vnic_rq_buf *buf,
  825. int skipped, void *opaque)
  826. {
  827. struct enic *enic = vnic_dev_priv(rq->vdev);
  828. struct net_device *netdev = enic->netdev;
  829. struct sk_buff *skb;
  830. u8 type, color, eop, sop, ingress_port, vlan_stripped;
  831. u8 fcoe, fcoe_sof, fcoe_fc_crc_ok, fcoe_enc_error, fcoe_eof;
  832. u8 tcp_udp_csum_ok, udp, tcp, ipv4_csum_ok;
  833. u8 ipv6, ipv4, ipv4_fragment, fcs_ok, rss_type, csum_not_calc;
  834. u8 packet_error;
  835. u16 q_number, completed_index, bytes_written, vlan, checksum;
  836. u32 rss_hash;
  837. if (skipped)
  838. return;
  839. skb = buf->os_buf;
  840. prefetch(skb->data - NET_IP_ALIGN);
  841. pci_unmap_single(enic->pdev, buf->dma_addr,
  842. buf->len, PCI_DMA_FROMDEVICE);
  843. cq_enet_rq_desc_dec((struct cq_enet_rq_desc *)cq_desc,
  844. &type, &color, &q_number, &completed_index,
  845. &ingress_port, &fcoe, &eop, &sop, &rss_type,
  846. &csum_not_calc, &rss_hash, &bytes_written,
  847. &packet_error, &vlan_stripped, &vlan, &checksum,
  848. &fcoe_sof, &fcoe_fc_crc_ok, &fcoe_enc_error,
  849. &fcoe_eof, &tcp_udp_csum_ok, &udp, &tcp,
  850. &ipv4_csum_ok, &ipv6, &ipv4, &ipv4_fragment,
  851. &fcs_ok);
  852. if (packet_error) {
  853. if (!fcs_ok) {
  854. if (bytes_written > 0)
  855. enic->rq_bad_fcs++;
  856. else if (bytes_written == 0)
  857. enic->rq_truncated_pkts++;
  858. }
  859. dev_kfree_skb_any(skb);
  860. return;
  861. }
  862. if (eop && bytes_written > 0) {
  863. /* Good receive
  864. */
  865. skb_put(skb, bytes_written);
  866. skb->protocol = eth_type_trans(skb, netdev);
  867. if (enic->csum_rx_enabled && !csum_not_calc) {
  868. skb->csum = htons(checksum);
  869. skb->ip_summed = CHECKSUM_COMPLETE;
  870. }
  871. skb->dev = netdev;
  872. if (enic->vlan_group && vlan_stripped) {
  873. if ((netdev->features & NETIF_F_LRO) && ipv4)
  874. lro_vlan_hwaccel_receive_skb(&enic->lro_mgr,
  875. skb, enic->vlan_group,
  876. vlan, cq_desc);
  877. else
  878. vlan_hwaccel_receive_skb(skb,
  879. enic->vlan_group, vlan);
  880. } else {
  881. if ((netdev->features & NETIF_F_LRO) && ipv4)
  882. lro_receive_skb(&enic->lro_mgr, skb, cq_desc);
  883. else
  884. netif_receive_skb(skb);
  885. }
  886. } else {
  887. /* Buffer overflow
  888. */
  889. dev_kfree_skb_any(skb);
  890. }
  891. }
  892. static int enic_rq_service(struct vnic_dev *vdev, struct cq_desc *cq_desc,
  893. u8 type, u16 q_number, u16 completed_index, void *opaque)
  894. {
  895. struct enic *enic = vnic_dev_priv(vdev);
  896. vnic_rq_service(&enic->rq[q_number], cq_desc,
  897. completed_index, VNIC_RQ_RETURN_DESC,
  898. enic_rq_indicate_buf, opaque);
  899. return 0;
  900. }
  901. static void enic_rq_drop_buf(struct vnic_rq *rq,
  902. struct cq_desc *cq_desc, struct vnic_rq_buf *buf,
  903. int skipped, void *opaque)
  904. {
  905. struct enic *enic = vnic_dev_priv(rq->vdev);
  906. struct sk_buff *skb = buf->os_buf;
  907. if (skipped)
  908. return;
  909. pci_unmap_single(enic->pdev, buf->dma_addr,
  910. buf->len, PCI_DMA_FROMDEVICE);
  911. dev_kfree_skb_any(skb);
  912. }
  913. static int enic_rq_service_drop(struct vnic_dev *vdev, struct cq_desc *cq_desc,
  914. u8 type, u16 q_number, u16 completed_index, void *opaque)
  915. {
  916. struct enic *enic = vnic_dev_priv(vdev);
  917. vnic_rq_service(&enic->rq[q_number], cq_desc,
  918. completed_index, VNIC_RQ_RETURN_DESC,
  919. enic_rq_drop_buf, opaque);
  920. return 0;
  921. }
  922. static int enic_poll(struct napi_struct *napi, int budget)
  923. {
  924. struct enic *enic = container_of(napi, struct enic, napi);
  925. struct net_device *netdev = enic->netdev;
  926. unsigned int rq_work_to_do = budget;
  927. unsigned int wq_work_to_do = -1; /* no limit */
  928. unsigned int work_done, rq_work_done, wq_work_done;
  929. /* Service RQ (first) and WQ
  930. */
  931. rq_work_done = vnic_cq_service(&enic->cq[ENIC_CQ_RQ],
  932. rq_work_to_do, enic_rq_service, NULL);
  933. wq_work_done = vnic_cq_service(&enic->cq[ENIC_CQ_WQ],
  934. wq_work_to_do, enic_wq_service, NULL);
  935. /* Accumulate intr event credits for this polling
  936. * cycle. An intr event is the completion of a
  937. * a WQ or RQ packet.
  938. */
  939. work_done = rq_work_done + wq_work_done;
  940. if (work_done > 0)
  941. vnic_intr_return_credits(&enic->intr[ENIC_INTX_WQ_RQ],
  942. work_done,
  943. 0 /* don't unmask intr */,
  944. 0 /* don't reset intr timer */);
  945. if (rq_work_done > 0) {
  946. /* Replenish RQ
  947. */
  948. vnic_rq_fill(&enic->rq[0], enic->rq_alloc_buf);
  949. } else {
  950. /* If no work done, flush all LROs and exit polling
  951. */
  952. if (netdev->features & NETIF_F_LRO)
  953. lro_flush_all(&enic->lro_mgr);
  954. napi_complete(napi);
  955. vnic_intr_unmask(&enic->intr[ENIC_INTX_WQ_RQ]);
  956. }
  957. return rq_work_done;
  958. }
  959. static int enic_poll_msix(struct napi_struct *napi, int budget)
  960. {
  961. struct enic *enic = container_of(napi, struct enic, napi);
  962. struct net_device *netdev = enic->netdev;
  963. unsigned int work_to_do = budget;
  964. unsigned int work_done;
  965. /* Service RQ
  966. */
  967. work_done = vnic_cq_service(&enic->cq[ENIC_CQ_RQ],
  968. work_to_do, enic_rq_service, NULL);
  969. if (work_done > 0) {
  970. /* Replenish RQ
  971. */
  972. vnic_rq_fill(&enic->rq[0], enic->rq_alloc_buf);
  973. /* Return intr event credits for this polling
  974. * cycle. An intr event is the completion of a
  975. * RQ packet.
  976. */
  977. vnic_intr_return_credits(&enic->intr[ENIC_MSIX_RQ],
  978. work_done,
  979. 0 /* don't unmask intr */,
  980. 0 /* don't reset intr timer */);
  981. } else {
  982. /* If no work done, flush all LROs and exit polling
  983. */
  984. if (netdev->features & NETIF_F_LRO)
  985. lro_flush_all(&enic->lro_mgr);
  986. napi_complete(napi);
  987. vnic_intr_unmask(&enic->intr[ENIC_MSIX_RQ]);
  988. }
  989. return work_done;
  990. }
  991. static void enic_notify_timer(unsigned long data)
  992. {
  993. struct enic *enic = (struct enic *)data;
  994. enic_notify_check(enic);
  995. mod_timer(&enic->notify_timer,
  996. round_jiffies(jiffies + ENIC_NOTIFY_TIMER_PERIOD));
  997. }
  998. static void enic_free_intr(struct enic *enic)
  999. {
  1000. struct net_device *netdev = enic->netdev;
  1001. unsigned int i;
  1002. switch (vnic_dev_get_intr_mode(enic->vdev)) {
  1003. case VNIC_DEV_INTR_MODE_INTX:
  1004. free_irq(enic->pdev->irq, netdev);
  1005. break;
  1006. case VNIC_DEV_INTR_MODE_MSI:
  1007. free_irq(enic->pdev->irq, enic);
  1008. break;
  1009. case VNIC_DEV_INTR_MODE_MSIX:
  1010. for (i = 0; i < ARRAY_SIZE(enic->msix); i++)
  1011. if (enic->msix[i].requested)
  1012. free_irq(enic->msix_entry[i].vector,
  1013. enic->msix[i].devid);
  1014. break;
  1015. default:
  1016. break;
  1017. }
  1018. }
  1019. static int enic_request_intr(struct enic *enic)
  1020. {
  1021. struct net_device *netdev = enic->netdev;
  1022. unsigned int i;
  1023. int err = 0;
  1024. switch (vnic_dev_get_intr_mode(enic->vdev)) {
  1025. case VNIC_DEV_INTR_MODE_INTX:
  1026. err = request_irq(enic->pdev->irq, enic_isr_legacy,
  1027. IRQF_SHARED, netdev->name, netdev);
  1028. break;
  1029. case VNIC_DEV_INTR_MODE_MSI:
  1030. err = request_irq(enic->pdev->irq, enic_isr_msi,
  1031. 0, netdev->name, enic);
  1032. break;
  1033. case VNIC_DEV_INTR_MODE_MSIX:
  1034. sprintf(enic->msix[ENIC_MSIX_RQ].devname,
  1035. "%.11s-rx-0", netdev->name);
  1036. enic->msix[ENIC_MSIX_RQ].isr = enic_isr_msix_rq;
  1037. enic->msix[ENIC_MSIX_RQ].devid = enic;
  1038. sprintf(enic->msix[ENIC_MSIX_WQ].devname,
  1039. "%.11s-tx-0", netdev->name);
  1040. enic->msix[ENIC_MSIX_WQ].isr = enic_isr_msix_wq;
  1041. enic->msix[ENIC_MSIX_WQ].devid = enic;
  1042. sprintf(enic->msix[ENIC_MSIX_ERR].devname,
  1043. "%.11s-err", netdev->name);
  1044. enic->msix[ENIC_MSIX_ERR].isr = enic_isr_msix_err;
  1045. enic->msix[ENIC_MSIX_ERR].devid = enic;
  1046. sprintf(enic->msix[ENIC_MSIX_NOTIFY].devname,
  1047. "%.11s-notify", netdev->name);
  1048. enic->msix[ENIC_MSIX_NOTIFY].isr = enic_isr_msix_notify;
  1049. enic->msix[ENIC_MSIX_NOTIFY].devid = enic;
  1050. for (i = 0; i < ARRAY_SIZE(enic->msix); i++) {
  1051. err = request_irq(enic->msix_entry[i].vector,
  1052. enic->msix[i].isr, 0,
  1053. enic->msix[i].devname,
  1054. enic->msix[i].devid);
  1055. if (err) {
  1056. enic_free_intr(enic);
  1057. break;
  1058. }
  1059. enic->msix[i].requested = 1;
  1060. }
  1061. break;
  1062. default:
  1063. break;
  1064. }
  1065. return err;
  1066. }
  1067. static int enic_notify_set(struct enic *enic)
  1068. {
  1069. int err;
  1070. spin_lock(&enic->devcmd_lock);
  1071. switch (vnic_dev_get_intr_mode(enic->vdev)) {
  1072. case VNIC_DEV_INTR_MODE_INTX:
  1073. err = vnic_dev_notify_set(enic->vdev, ENIC_INTX_NOTIFY);
  1074. break;
  1075. case VNIC_DEV_INTR_MODE_MSIX:
  1076. err = vnic_dev_notify_set(enic->vdev, ENIC_MSIX_NOTIFY);
  1077. break;
  1078. default:
  1079. err = vnic_dev_notify_set(enic->vdev, -1 /* no intr */);
  1080. break;
  1081. }
  1082. spin_unlock(&enic->devcmd_lock);
  1083. return err;
  1084. }
  1085. static void enic_notify_timer_start(struct enic *enic)
  1086. {
  1087. switch (vnic_dev_get_intr_mode(enic->vdev)) {
  1088. case VNIC_DEV_INTR_MODE_MSI:
  1089. mod_timer(&enic->notify_timer, jiffies);
  1090. break;
  1091. default:
  1092. /* Using intr for notification for INTx/MSI-X */
  1093. break;
  1094. };
  1095. }
  1096. /* rtnl lock is held, process context */
  1097. static int enic_open(struct net_device *netdev)
  1098. {
  1099. struct enic *enic = netdev_priv(netdev);
  1100. unsigned int i;
  1101. int err;
  1102. err = enic_request_intr(enic);
  1103. if (err) {
  1104. printk(KERN_ERR PFX "%s: Unable to request irq.\n",
  1105. netdev->name);
  1106. return err;
  1107. }
  1108. err = enic_notify_set(enic);
  1109. if (err) {
  1110. printk(KERN_ERR PFX
  1111. "%s: Failed to alloc notify buffer, aborting.\n",
  1112. netdev->name);
  1113. goto err_out_free_intr;
  1114. }
  1115. for (i = 0; i < enic->rq_count; i++) {
  1116. err = vnic_rq_fill(&enic->rq[i], enic->rq_alloc_buf);
  1117. if (err) {
  1118. printk(KERN_ERR PFX
  1119. "%s: Unable to alloc receive buffers.\n",
  1120. netdev->name);
  1121. goto err_out_notify_unset;
  1122. }
  1123. }
  1124. for (i = 0; i < enic->wq_count; i++)
  1125. vnic_wq_enable(&enic->wq[i]);
  1126. for (i = 0; i < enic->rq_count; i++)
  1127. vnic_rq_enable(&enic->rq[i]);
  1128. spin_lock(&enic->devcmd_lock);
  1129. enic_add_station_addr(enic);
  1130. spin_unlock(&enic->devcmd_lock);
  1131. enic_set_multicast_list(netdev);
  1132. netif_wake_queue(netdev);
  1133. napi_enable(&enic->napi);
  1134. spin_lock(&enic->devcmd_lock);
  1135. vnic_dev_enable(enic->vdev);
  1136. spin_unlock(&enic->devcmd_lock);
  1137. for (i = 0; i < enic->intr_count; i++)
  1138. vnic_intr_unmask(&enic->intr[i]);
  1139. enic_notify_timer_start(enic);
  1140. return 0;
  1141. err_out_notify_unset:
  1142. spin_lock(&enic->devcmd_lock);
  1143. vnic_dev_notify_unset(enic->vdev);
  1144. spin_unlock(&enic->devcmd_lock);
  1145. err_out_free_intr:
  1146. enic_free_intr(enic);
  1147. return err;
  1148. }
  1149. /* rtnl lock is held, process context */
  1150. static int enic_stop(struct net_device *netdev)
  1151. {
  1152. struct enic *enic = netdev_priv(netdev);
  1153. unsigned int i;
  1154. int err;
  1155. del_timer_sync(&enic->notify_timer);
  1156. spin_lock(&enic->devcmd_lock);
  1157. vnic_dev_disable(enic->vdev);
  1158. spin_unlock(&enic->devcmd_lock);
  1159. napi_disable(&enic->napi);
  1160. netif_stop_queue(netdev);
  1161. for (i = 0; i < enic->intr_count; i++)
  1162. vnic_intr_mask(&enic->intr[i]);
  1163. for (i = 0; i < enic->wq_count; i++) {
  1164. err = vnic_wq_disable(&enic->wq[i]);
  1165. if (err)
  1166. return err;
  1167. }
  1168. for (i = 0; i < enic->rq_count; i++) {
  1169. err = vnic_rq_disable(&enic->rq[i]);
  1170. if (err)
  1171. return err;
  1172. }
  1173. spin_lock(&enic->devcmd_lock);
  1174. vnic_dev_notify_unset(enic->vdev);
  1175. spin_unlock(&enic->devcmd_lock);
  1176. enic_free_intr(enic);
  1177. (void)vnic_cq_service(&enic->cq[ENIC_CQ_RQ],
  1178. -1, enic_rq_service_drop, NULL);
  1179. (void)vnic_cq_service(&enic->cq[ENIC_CQ_WQ],
  1180. -1, enic_wq_service, NULL);
  1181. for (i = 0; i < enic->wq_count; i++)
  1182. vnic_wq_clean(&enic->wq[i], enic_free_wq_buf);
  1183. for (i = 0; i < enic->rq_count; i++)
  1184. vnic_rq_clean(&enic->rq[i], enic_free_rq_buf);
  1185. for (i = 0; i < enic->cq_count; i++)
  1186. vnic_cq_clean(&enic->cq[i]);
  1187. for (i = 0; i < enic->intr_count; i++)
  1188. vnic_intr_clean(&enic->intr[i]);
  1189. return 0;
  1190. }
  1191. static int enic_change_mtu(struct net_device *netdev, int new_mtu)
  1192. {
  1193. struct enic *enic = netdev_priv(netdev);
  1194. int running = netif_running(netdev);
  1195. if (new_mtu < ENIC_MIN_MTU || new_mtu > ENIC_MAX_MTU)
  1196. return -EINVAL;
  1197. if (running)
  1198. enic_stop(netdev);
  1199. netdev->mtu = new_mtu;
  1200. if (netdev->mtu > enic->port_mtu)
  1201. printk(KERN_WARNING PFX
  1202. "%s: interface MTU (%d) set higher "
  1203. "than port MTU (%d)\n",
  1204. netdev->name, netdev->mtu, enic->port_mtu);
  1205. if (running)
  1206. enic_open(netdev);
  1207. return 0;
  1208. }
  1209. #ifdef CONFIG_NET_POLL_CONTROLLER
  1210. static void enic_poll_controller(struct net_device *netdev)
  1211. {
  1212. struct enic *enic = netdev_priv(netdev);
  1213. struct vnic_dev *vdev = enic->vdev;
  1214. switch (vnic_dev_get_intr_mode(vdev)) {
  1215. case VNIC_DEV_INTR_MODE_MSIX:
  1216. enic_isr_msix_rq(enic->pdev->irq, enic);
  1217. enic_isr_msix_wq(enic->pdev->irq, enic);
  1218. break;
  1219. case VNIC_DEV_INTR_MODE_MSI:
  1220. enic_isr_msi(enic->pdev->irq, enic);
  1221. break;
  1222. case VNIC_DEV_INTR_MODE_INTX:
  1223. enic_isr_legacy(enic->pdev->irq, netdev);
  1224. break;
  1225. default:
  1226. break;
  1227. }
  1228. }
  1229. #endif
  1230. static int enic_dev_wait(struct vnic_dev *vdev,
  1231. int (*start)(struct vnic_dev *, int),
  1232. int (*finished)(struct vnic_dev *, int *),
  1233. int arg)
  1234. {
  1235. unsigned long time;
  1236. int done;
  1237. int err;
  1238. BUG_ON(in_interrupt());
  1239. err = start(vdev, arg);
  1240. if (err)
  1241. return err;
  1242. /* Wait for func to complete...2 seconds max
  1243. */
  1244. time = jiffies + (HZ * 2);
  1245. do {
  1246. err = finished(vdev, &done);
  1247. if (err)
  1248. return err;
  1249. if (done)
  1250. return 0;
  1251. schedule_timeout_uninterruptible(HZ / 10);
  1252. } while (time_after(time, jiffies));
  1253. return -ETIMEDOUT;
  1254. }
  1255. static int enic_dev_open(struct enic *enic)
  1256. {
  1257. int err;
  1258. err = enic_dev_wait(enic->vdev, vnic_dev_open,
  1259. vnic_dev_open_done, 0);
  1260. if (err)
  1261. printk(KERN_ERR PFX
  1262. "vNIC device open failed, err %d.\n", err);
  1263. return err;
  1264. }
  1265. static int enic_dev_soft_reset(struct enic *enic)
  1266. {
  1267. int err;
  1268. err = enic_dev_wait(enic->vdev, vnic_dev_soft_reset,
  1269. vnic_dev_soft_reset_done, 0);
  1270. if (err)
  1271. printk(KERN_ERR PFX
  1272. "vNIC soft reset failed, err %d.\n", err);
  1273. return err;
  1274. }
  1275. static int enic_set_niccfg(struct enic *enic)
  1276. {
  1277. const u8 rss_default_cpu = 0;
  1278. const u8 rss_hash_type = 0;
  1279. const u8 rss_hash_bits = 0;
  1280. const u8 rss_base_cpu = 0;
  1281. const u8 rss_enable = 0;
  1282. const u8 tso_ipid_split_en = 0;
  1283. const u8 ig_vlan_strip_en = 1;
  1284. /* Enable VLAN tag stripping. RSS not enabled (yet).
  1285. */
  1286. return enic_set_nic_cfg(enic,
  1287. rss_default_cpu, rss_hash_type,
  1288. rss_hash_bits, rss_base_cpu,
  1289. rss_enable, tso_ipid_split_en,
  1290. ig_vlan_strip_en);
  1291. }
  1292. static void enic_reset(struct work_struct *work)
  1293. {
  1294. struct enic *enic = container_of(work, struct enic, reset);
  1295. if (!netif_running(enic->netdev))
  1296. return;
  1297. rtnl_lock();
  1298. spin_lock(&enic->devcmd_lock);
  1299. vnic_dev_hang_notify(enic->vdev);
  1300. spin_unlock(&enic->devcmd_lock);
  1301. enic_stop(enic->netdev);
  1302. enic_dev_soft_reset(enic);
  1303. vnic_dev_init(enic->vdev, 0);
  1304. enic_reset_mcaddrs(enic);
  1305. enic_init_vnic_resources(enic);
  1306. enic_set_niccfg(enic);
  1307. enic_open(enic->netdev);
  1308. rtnl_unlock();
  1309. }
  1310. static int enic_set_intr_mode(struct enic *enic)
  1311. {
  1312. unsigned int n = 1;
  1313. unsigned int m = 1;
  1314. unsigned int i;
  1315. /* Set interrupt mode (INTx, MSI, MSI-X) depending
  1316. * system capabilities.
  1317. *
  1318. * Try MSI-X first
  1319. *
  1320. * We need n RQs, m WQs, n+m CQs, and n+m+2 INTRs
  1321. * (the second to last INTR is used for WQ/RQ errors)
  1322. * (the last INTR is used for notifications)
  1323. */
  1324. BUG_ON(ARRAY_SIZE(enic->msix_entry) < n + m + 2);
  1325. for (i = 0; i < n + m + 2; i++)
  1326. enic->msix_entry[i].entry = i;
  1327. if (enic->config.intr_mode < 1 &&
  1328. enic->rq_count >= n &&
  1329. enic->wq_count >= m &&
  1330. enic->cq_count >= n + m &&
  1331. enic->intr_count >= n + m + 2 &&
  1332. !pci_enable_msix(enic->pdev, enic->msix_entry, n + m + 2)) {
  1333. enic->rq_count = n;
  1334. enic->wq_count = m;
  1335. enic->cq_count = n + m;
  1336. enic->intr_count = n + m + 2;
  1337. vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_MSIX);
  1338. return 0;
  1339. }
  1340. /* Next try MSI
  1341. *
  1342. * We need 1 RQ, 1 WQ, 2 CQs, and 1 INTR
  1343. */
  1344. if (enic->config.intr_mode < 2 &&
  1345. enic->rq_count >= 1 &&
  1346. enic->wq_count >= 1 &&
  1347. enic->cq_count >= 2 &&
  1348. enic->intr_count >= 1 &&
  1349. !pci_enable_msi(enic->pdev)) {
  1350. enic->rq_count = 1;
  1351. enic->wq_count = 1;
  1352. enic->cq_count = 2;
  1353. enic->intr_count = 1;
  1354. vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_MSI);
  1355. return 0;
  1356. }
  1357. /* Next try INTx
  1358. *
  1359. * We need 1 RQ, 1 WQ, 2 CQs, and 3 INTRs
  1360. * (the first INTR is used for WQ/RQ)
  1361. * (the second INTR is used for WQ/RQ errors)
  1362. * (the last INTR is used for notifications)
  1363. */
  1364. if (enic->config.intr_mode < 3 &&
  1365. enic->rq_count >= 1 &&
  1366. enic->wq_count >= 1 &&
  1367. enic->cq_count >= 2 &&
  1368. enic->intr_count >= 3) {
  1369. enic->rq_count = 1;
  1370. enic->wq_count = 1;
  1371. enic->cq_count = 2;
  1372. enic->intr_count = 3;
  1373. vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_INTX);
  1374. return 0;
  1375. }
  1376. vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_UNKNOWN);
  1377. return -EINVAL;
  1378. }
  1379. static void enic_clear_intr_mode(struct enic *enic)
  1380. {
  1381. switch (vnic_dev_get_intr_mode(enic->vdev)) {
  1382. case VNIC_DEV_INTR_MODE_MSIX:
  1383. pci_disable_msix(enic->pdev);
  1384. break;
  1385. case VNIC_DEV_INTR_MODE_MSI:
  1386. pci_disable_msi(enic->pdev);
  1387. break;
  1388. default:
  1389. break;
  1390. }
  1391. vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_UNKNOWN);
  1392. }
  1393. static const struct net_device_ops enic_netdev_ops = {
  1394. .ndo_open = enic_open,
  1395. .ndo_stop = enic_stop,
  1396. .ndo_start_xmit = enic_hard_start_xmit,
  1397. .ndo_get_stats = enic_get_stats,
  1398. .ndo_validate_addr = eth_validate_addr,
  1399. .ndo_set_mac_address = eth_mac_addr,
  1400. .ndo_set_multicast_list = enic_set_multicast_list,
  1401. .ndo_change_mtu = enic_change_mtu,
  1402. .ndo_vlan_rx_register = enic_vlan_rx_register,
  1403. .ndo_vlan_rx_add_vid = enic_vlan_rx_add_vid,
  1404. .ndo_vlan_rx_kill_vid = enic_vlan_rx_kill_vid,
  1405. .ndo_tx_timeout = enic_tx_timeout,
  1406. #ifdef CONFIG_NET_POLL_CONTROLLER
  1407. .ndo_poll_controller = enic_poll_controller,
  1408. #endif
  1409. };
  1410. void enic_dev_deinit(struct enic *enic)
  1411. {
  1412. netif_napi_del(&enic->napi);
  1413. enic_free_vnic_resources(enic);
  1414. enic_clear_intr_mode(enic);
  1415. }
  1416. int enic_dev_init(struct enic *enic)
  1417. {
  1418. struct net_device *netdev = enic->netdev;
  1419. int err;
  1420. /* Get vNIC configuration
  1421. */
  1422. err = enic_get_vnic_config(enic);
  1423. if (err) {
  1424. printk(KERN_ERR PFX
  1425. "Get vNIC configuration failed, aborting.\n");
  1426. return err;
  1427. }
  1428. /* Get available resource counts
  1429. */
  1430. enic_get_res_counts(enic);
  1431. /* Set interrupt mode based on resource counts and system
  1432. * capabilities
  1433. */
  1434. err = enic_set_intr_mode(enic);
  1435. if (err) {
  1436. printk(KERN_ERR PFX
  1437. "Failed to set intr mode, aborting.\n");
  1438. return err;
  1439. }
  1440. /* Allocate and configure vNIC resources
  1441. */
  1442. err = enic_alloc_vnic_resources(enic);
  1443. if (err) {
  1444. printk(KERN_ERR PFX
  1445. "Failed to alloc vNIC resources, aborting.\n");
  1446. goto err_out_free_vnic_resources;
  1447. }
  1448. enic_init_vnic_resources(enic);
  1449. err = enic_set_rq_alloc_buf(enic);
  1450. if (err) {
  1451. printk(KERN_ERR PFX
  1452. "Failed to set RQ buffer allocator, aborting.\n");
  1453. goto err_out_free_vnic_resources;
  1454. }
  1455. err = enic_set_niccfg(enic);
  1456. if (err) {
  1457. printk(KERN_ERR PFX
  1458. "Failed to config nic, aborting.\n");
  1459. goto err_out_free_vnic_resources;
  1460. }
  1461. switch (vnic_dev_get_intr_mode(enic->vdev)) {
  1462. default:
  1463. netif_napi_add(netdev, &enic->napi, enic_poll, 64);
  1464. break;
  1465. case VNIC_DEV_INTR_MODE_MSIX:
  1466. netif_napi_add(netdev, &enic->napi, enic_poll_msix, 64);
  1467. break;
  1468. }
  1469. return 0;
  1470. err_out_free_vnic_resources:
  1471. enic_clear_intr_mode(enic);
  1472. enic_free_vnic_resources(enic);
  1473. return err;
  1474. }
  1475. static void enic_iounmap(struct enic *enic)
  1476. {
  1477. unsigned int i;
  1478. for (i = 0; i < ARRAY_SIZE(enic->bar); i++)
  1479. if (enic->bar[i].vaddr)
  1480. iounmap(enic->bar[i].vaddr);
  1481. }
  1482. static int __devinit enic_probe(struct pci_dev *pdev,
  1483. const struct pci_device_id *ent)
  1484. {
  1485. struct net_device *netdev;
  1486. struct enic *enic;
  1487. int using_dac = 0;
  1488. unsigned int i;
  1489. int err;
  1490. /* Allocate net device structure and initialize. Private
  1491. * instance data is initialized to zero.
  1492. */
  1493. netdev = alloc_etherdev(sizeof(struct enic));
  1494. if (!netdev) {
  1495. printk(KERN_ERR PFX "Etherdev alloc failed, aborting.\n");
  1496. return -ENOMEM;
  1497. }
  1498. pci_set_drvdata(pdev, netdev);
  1499. SET_NETDEV_DEV(netdev, &pdev->dev);
  1500. enic = netdev_priv(netdev);
  1501. enic->netdev = netdev;
  1502. enic->pdev = pdev;
  1503. /* Setup PCI resources
  1504. */
  1505. err = pci_enable_device(pdev);
  1506. if (err) {
  1507. printk(KERN_ERR PFX
  1508. "Cannot enable PCI device, aborting.\n");
  1509. goto err_out_free_netdev;
  1510. }
  1511. err = pci_request_regions(pdev, DRV_NAME);
  1512. if (err) {
  1513. printk(KERN_ERR PFX
  1514. "Cannot request PCI regions, aborting.\n");
  1515. goto err_out_disable_device;
  1516. }
  1517. pci_set_master(pdev);
  1518. /* Query PCI controller on system for DMA addressing
  1519. * limitation for the device. Try 40-bit first, and
  1520. * fail to 32-bit.
  1521. */
  1522. err = pci_set_dma_mask(pdev, DMA_BIT_MASK(40));
  1523. if (err) {
  1524. err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
  1525. if (err) {
  1526. printk(KERN_ERR PFX
  1527. "No usable DMA configuration, aborting.\n");
  1528. goto err_out_release_regions;
  1529. }
  1530. err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
  1531. if (err) {
  1532. printk(KERN_ERR PFX
  1533. "Unable to obtain 32-bit DMA "
  1534. "for consistent allocations, aborting.\n");
  1535. goto err_out_release_regions;
  1536. }
  1537. } else {
  1538. err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(40));
  1539. if (err) {
  1540. printk(KERN_ERR PFX
  1541. "Unable to obtain 40-bit DMA "
  1542. "for consistent allocations, aborting.\n");
  1543. goto err_out_release_regions;
  1544. }
  1545. using_dac = 1;
  1546. }
  1547. /* Map vNIC resources from BAR0-5
  1548. */
  1549. for (i = 0; i < ARRAY_SIZE(enic->bar); i++) {
  1550. if (!(pci_resource_flags(pdev, i) & IORESOURCE_MEM))
  1551. continue;
  1552. enic->bar[i].len = pci_resource_len(pdev, i);
  1553. enic->bar[i].vaddr = pci_iomap(pdev, i, enic->bar[i].len);
  1554. if (!enic->bar[i].vaddr) {
  1555. printk(KERN_ERR PFX
  1556. "Cannot memory-map BAR %d, aborting.\n", i);
  1557. err = -ENODEV;
  1558. goto err_out_iounmap;
  1559. }
  1560. enic->bar[i].bus_addr = pci_resource_start(pdev, i);
  1561. }
  1562. /* Register vNIC device
  1563. */
  1564. enic->vdev = vnic_dev_register(NULL, enic, pdev, enic->bar,
  1565. ARRAY_SIZE(enic->bar));
  1566. if (!enic->vdev) {
  1567. printk(KERN_ERR PFX
  1568. "vNIC registration failed, aborting.\n");
  1569. err = -ENODEV;
  1570. goto err_out_iounmap;
  1571. }
  1572. /* Issue device open to get device in known state
  1573. */
  1574. err = enic_dev_open(enic);
  1575. if (err) {
  1576. printk(KERN_ERR PFX
  1577. "vNIC dev open failed, aborting.\n");
  1578. goto err_out_vnic_unregister;
  1579. }
  1580. /* Issue device init to initialize the vnic-to-switch link.
  1581. * We'll start with carrier off and wait for link UP
  1582. * notification later to turn on carrier. We don't need
  1583. * to wait here for the vnic-to-switch link initialization
  1584. * to complete; link UP notification is the indication that
  1585. * the process is complete.
  1586. */
  1587. netif_carrier_off(netdev);
  1588. err = vnic_dev_init(enic->vdev, 0);
  1589. if (err) {
  1590. printk(KERN_ERR PFX
  1591. "vNIC dev init failed, aborting.\n");
  1592. goto err_out_dev_close;
  1593. }
  1594. err = enic_dev_init(enic);
  1595. if (err) {
  1596. printk(KERN_ERR PFX
  1597. "Device initialization failed, aborting.\n");
  1598. goto err_out_dev_close;
  1599. }
  1600. /* Setup notification timer, HW reset task, and locks
  1601. */
  1602. init_timer(&enic->notify_timer);
  1603. enic->notify_timer.function = enic_notify_timer;
  1604. enic->notify_timer.data = (unsigned long)enic;
  1605. INIT_WORK(&enic->reset, enic_reset);
  1606. for (i = 0; i < enic->wq_count; i++)
  1607. spin_lock_init(&enic->wq_lock[i]);
  1608. spin_lock_init(&enic->devcmd_lock);
  1609. /* Register net device
  1610. */
  1611. enic->port_mtu = enic->config.mtu;
  1612. (void)enic_change_mtu(netdev, enic->port_mtu);
  1613. err = enic_set_mac_addr(netdev, enic->mac_addr);
  1614. if (err) {
  1615. printk(KERN_ERR PFX
  1616. "Invalid MAC address, aborting.\n");
  1617. goto err_out_dev_deinit;
  1618. }
  1619. netdev->netdev_ops = &enic_netdev_ops;
  1620. netdev->watchdog_timeo = 2 * HZ;
  1621. netdev->ethtool_ops = &enic_ethtool_ops;
  1622. netdev->features |= NETIF_F_HW_VLAN_TX |
  1623. NETIF_F_HW_VLAN_RX | NETIF_F_HW_VLAN_FILTER;
  1624. if (ENIC_SETTING(enic, TXCSUM))
  1625. netdev->features |= NETIF_F_SG | NETIF_F_HW_CSUM;
  1626. if (ENIC_SETTING(enic, TSO))
  1627. netdev->features |= NETIF_F_TSO |
  1628. NETIF_F_TSO6 | NETIF_F_TSO_ECN;
  1629. if (ENIC_SETTING(enic, LRO))
  1630. netdev->features |= NETIF_F_LRO;
  1631. if (using_dac)
  1632. netdev->features |= NETIF_F_HIGHDMA;
  1633. enic->csum_rx_enabled = ENIC_SETTING(enic, RXCSUM);
  1634. enic->lro_mgr.max_aggr = ENIC_LRO_MAX_AGGR;
  1635. enic->lro_mgr.max_desc = ENIC_LRO_MAX_DESC;
  1636. enic->lro_mgr.lro_arr = enic->lro_desc;
  1637. enic->lro_mgr.get_skb_header = enic_get_skb_header;
  1638. enic->lro_mgr.features = LRO_F_NAPI | LRO_F_EXTRACT_VLAN_ID;
  1639. enic->lro_mgr.dev = netdev;
  1640. enic->lro_mgr.ip_summed = CHECKSUM_COMPLETE;
  1641. enic->lro_mgr.ip_summed_aggr = CHECKSUM_UNNECESSARY;
  1642. err = register_netdev(netdev);
  1643. if (err) {
  1644. printk(KERN_ERR PFX
  1645. "Cannot register net device, aborting.\n");
  1646. goto err_out_dev_deinit;
  1647. }
  1648. return 0;
  1649. err_out_dev_deinit:
  1650. enic_dev_deinit(enic);
  1651. err_out_dev_close:
  1652. vnic_dev_close(enic->vdev);
  1653. err_out_vnic_unregister:
  1654. vnic_dev_unregister(enic->vdev);
  1655. err_out_iounmap:
  1656. enic_iounmap(enic);
  1657. err_out_release_regions:
  1658. pci_release_regions(pdev);
  1659. err_out_disable_device:
  1660. pci_disable_device(pdev);
  1661. err_out_free_netdev:
  1662. pci_set_drvdata(pdev, NULL);
  1663. free_netdev(netdev);
  1664. return err;
  1665. }
  1666. static void __devexit enic_remove(struct pci_dev *pdev)
  1667. {
  1668. struct net_device *netdev = pci_get_drvdata(pdev);
  1669. if (netdev) {
  1670. struct enic *enic = netdev_priv(netdev);
  1671. flush_scheduled_work();
  1672. unregister_netdev(netdev);
  1673. enic_dev_deinit(enic);
  1674. vnic_dev_close(enic->vdev);
  1675. vnic_dev_unregister(enic->vdev);
  1676. enic_iounmap(enic);
  1677. pci_release_regions(pdev);
  1678. pci_disable_device(pdev);
  1679. pci_set_drvdata(pdev, NULL);
  1680. free_netdev(netdev);
  1681. }
  1682. }
  1683. static struct pci_driver enic_driver = {
  1684. .name = DRV_NAME,
  1685. .id_table = enic_id_table,
  1686. .probe = enic_probe,
  1687. .remove = __devexit_p(enic_remove),
  1688. };
  1689. static int __init enic_init_module(void)
  1690. {
  1691. printk(KERN_INFO PFX "%s, ver %s\n", DRV_DESCRIPTION, DRV_VERSION);
  1692. return pci_register_driver(&enic_driver);
  1693. }
  1694. static void __exit enic_cleanup_module(void)
  1695. {
  1696. pci_unregister_driver(&enic_driver);
  1697. }
  1698. module_init(enic_init_module);
  1699. module_exit(enic_cleanup_module);