cphy.h 6.3 KB

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  1. /*****************************************************************************
  2. * *
  3. * File: cphy.h *
  4. * $Revision: 1.7 $ *
  5. * $Date: 2005/06/21 18:29:47 $ *
  6. * Description: *
  7. * part of the Chelsio 10Gb Ethernet Driver. *
  8. * *
  9. * This program is free software; you can redistribute it and/or modify *
  10. * it under the terms of the GNU General Public License, version 2, as *
  11. * published by the Free Software Foundation. *
  12. * *
  13. * You should have received a copy of the GNU General Public License along *
  14. * with this program; if not, write to the Free Software Foundation, Inc., *
  15. * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
  16. * *
  17. * THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR IMPLIED *
  18. * WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED WARRANTIES OF *
  19. * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. *
  20. * *
  21. * http://www.chelsio.com *
  22. * *
  23. * Copyright (c) 2003 - 2005 Chelsio Communications, Inc. *
  24. * All rights reserved. *
  25. * *
  26. * Maintainers: maintainers@chelsio.com *
  27. * *
  28. * Authors: Dimitrios Michailidis <dm@chelsio.com> *
  29. * Tina Yang <tainay@chelsio.com> *
  30. * Felix Marti <felix@chelsio.com> *
  31. * Scott Bardone <sbardone@chelsio.com> *
  32. * Kurt Ottaway <kottaway@chelsio.com> *
  33. * Frank DiMambro <frank@chelsio.com> *
  34. * *
  35. * History: *
  36. * *
  37. ****************************************************************************/
  38. #ifndef _CXGB_CPHY_H_
  39. #define _CXGB_CPHY_H_
  40. #include "common.h"
  41. struct mdio_ops {
  42. void (*init)(adapter_t *adapter, const struct board_info *bi);
  43. int (*read)(struct net_device *dev, int phy_addr, int mmd_addr,
  44. u16 reg_addr);
  45. int (*write)(struct net_device *dev, int phy_addr, int mmd_addr,
  46. u16 reg_addr, u16 val);
  47. unsigned mode_support;
  48. };
  49. /* PHY interrupt types */
  50. enum {
  51. cphy_cause_link_change = 0x1,
  52. cphy_cause_error = 0x2,
  53. cphy_cause_fifo_error = 0x3
  54. };
  55. enum {
  56. PHY_LINK_UP = 0x1,
  57. PHY_AUTONEG_RDY = 0x2,
  58. PHY_AUTONEG_EN = 0x4
  59. };
  60. struct cphy;
  61. /* PHY operations */
  62. struct cphy_ops {
  63. void (*destroy)(struct cphy *);
  64. int (*reset)(struct cphy *, int wait);
  65. int (*interrupt_enable)(struct cphy *);
  66. int (*interrupt_disable)(struct cphy *);
  67. int (*interrupt_clear)(struct cphy *);
  68. int (*interrupt_handler)(struct cphy *);
  69. int (*autoneg_enable)(struct cphy *);
  70. int (*autoneg_disable)(struct cphy *);
  71. int (*autoneg_restart)(struct cphy *);
  72. int (*advertise)(struct cphy *phy, unsigned int advertise_map);
  73. int (*set_loopback)(struct cphy *, int on);
  74. int (*set_speed_duplex)(struct cphy *phy, int speed, int duplex);
  75. int (*get_link_status)(struct cphy *phy, int *link_ok, int *speed,
  76. int *duplex, int *fc);
  77. u32 mmds;
  78. };
  79. /* A PHY instance */
  80. struct cphy {
  81. int state; /* Link status state machine */
  82. adapter_t *adapter; /* associated adapter */
  83. struct delayed_work phy_update;
  84. u16 bmsr;
  85. int count;
  86. int act_count;
  87. int act_on;
  88. u32 elmer_gpo;
  89. const struct cphy_ops *ops; /* PHY operations */
  90. struct mdio_if_info mdio;
  91. struct cphy_instance *instance;
  92. };
  93. /* Convenience MDIO read/write wrappers */
  94. static inline int cphy_mdio_read(struct cphy *cphy, int mmd, int reg,
  95. unsigned int *valp)
  96. {
  97. int rc = cphy->mdio.mdio_read(cphy->mdio.dev, cphy->mdio.prtad, mmd,
  98. reg);
  99. *valp = (rc >= 0) ? rc : -1;
  100. return (rc >= 0) ? 0 : rc;
  101. }
  102. static inline int cphy_mdio_write(struct cphy *cphy, int mmd, int reg,
  103. unsigned int val)
  104. {
  105. return cphy->mdio.mdio_write(cphy->mdio.dev, cphy->mdio.prtad, mmd,
  106. reg, val);
  107. }
  108. static inline int simple_mdio_read(struct cphy *cphy, int reg,
  109. unsigned int *valp)
  110. {
  111. return cphy_mdio_read(cphy, MDIO_DEVAD_NONE, reg, valp);
  112. }
  113. static inline int simple_mdio_write(struct cphy *cphy, int reg,
  114. unsigned int val)
  115. {
  116. return cphy_mdio_write(cphy, MDIO_DEVAD_NONE, reg, val);
  117. }
  118. /* Convenience initializer */
  119. static inline void cphy_init(struct cphy *phy, struct net_device *dev,
  120. int phy_addr, struct cphy_ops *phy_ops,
  121. const struct mdio_ops *mdio_ops)
  122. {
  123. struct adapter *adapter = netdev_priv(dev);
  124. phy->adapter = adapter;
  125. phy->ops = phy_ops;
  126. if (mdio_ops) {
  127. phy->mdio.prtad = phy_addr;
  128. phy->mdio.mmds = phy_ops->mmds;
  129. phy->mdio.mode_support = mdio_ops->mode_support;
  130. phy->mdio.mdio_read = mdio_ops->read;
  131. phy->mdio.mdio_write = mdio_ops->write;
  132. }
  133. phy->mdio.dev = dev;
  134. }
  135. /* Operations of the PHY-instance factory */
  136. struct gphy {
  137. /* Construct a PHY instance with the given PHY address */
  138. struct cphy *(*create)(struct net_device *dev, int phy_addr,
  139. const struct mdio_ops *mdio_ops);
  140. /*
  141. * Reset the PHY chip. This resets the whole PHY chip, not individual
  142. * ports.
  143. */
  144. int (*reset)(adapter_t *adapter);
  145. };
  146. extern const struct gphy t1_my3126_ops;
  147. extern const struct gphy t1_mv88e1xxx_ops;
  148. extern const struct gphy t1_vsc8244_ops;
  149. extern const struct gphy t1_mv88x201x_ops;
  150. #endif /* _CXGB_CPHY_H_ */