radeon_mode.h 14 KB

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  1. /*
  2. * Copyright 2000 ATI Technologies Inc., Markham, Ontario, and
  3. * VA Linux Systems Inc., Fremont, California.
  4. * Copyright 2008 Red Hat Inc.
  5. *
  6. * Permission is hereby granted, free of charge, to any person obtaining a
  7. * copy of this software and associated documentation files (the "Software"),
  8. * to deal in the Software without restriction, including without limitation
  9. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10. * and/or sell copies of the Software, and to permit persons to whom the
  11. * Software is furnished to do so, subject to the following conditions:
  12. *
  13. * The above copyright notice and this permission notice shall be included in
  14. * all copies or substantial portions of the Software.
  15. *
  16. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19. * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  20. * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  21. * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  22. * OTHER DEALINGS IN THE SOFTWARE.
  23. *
  24. * Original Authors:
  25. * Kevin E. Martin, Rickard E. Faith, Alan Hourihane
  26. *
  27. * Kernel port Author: Dave Airlie
  28. */
  29. #ifndef RADEON_MODE_H
  30. #define RADEON_MODE_H
  31. #include <drm_crtc.h>
  32. #include <drm_mode.h>
  33. #include <drm_edid.h>
  34. #include <linux/i2c.h>
  35. #include <linux/i2c-id.h>
  36. #include <linux/i2c-algo-bit.h>
  37. #include "radeon_fixed.h"
  38. struct radeon_device;
  39. #define to_radeon_crtc(x) container_of(x, struct radeon_crtc, base)
  40. #define to_radeon_connector(x) container_of(x, struct radeon_connector, base)
  41. #define to_radeon_encoder(x) container_of(x, struct radeon_encoder, base)
  42. #define to_radeon_framebuffer(x) container_of(x, struct radeon_framebuffer, base)
  43. enum radeon_connector_type {
  44. CONNECTOR_NONE,
  45. CONNECTOR_VGA,
  46. CONNECTOR_DVI_I,
  47. CONNECTOR_DVI_D,
  48. CONNECTOR_DVI_A,
  49. CONNECTOR_STV,
  50. CONNECTOR_CTV,
  51. CONNECTOR_LVDS,
  52. CONNECTOR_DIGITAL,
  53. CONNECTOR_SCART,
  54. CONNECTOR_HDMI_TYPE_A,
  55. CONNECTOR_HDMI_TYPE_B,
  56. CONNECTOR_0XC,
  57. CONNECTOR_0XD,
  58. CONNECTOR_DIN,
  59. CONNECTOR_DISPLAY_PORT,
  60. CONNECTOR_UNSUPPORTED
  61. };
  62. enum radeon_dvi_type {
  63. DVI_AUTO,
  64. DVI_DIGITAL,
  65. DVI_ANALOG
  66. };
  67. enum radeon_rmx_type {
  68. RMX_OFF,
  69. RMX_FULL,
  70. RMX_CENTER,
  71. RMX_ASPECT
  72. };
  73. enum radeon_tv_std {
  74. TV_STD_NTSC,
  75. TV_STD_PAL,
  76. TV_STD_PAL_M,
  77. TV_STD_PAL_60,
  78. TV_STD_NTSC_J,
  79. TV_STD_SCART_PAL,
  80. TV_STD_SECAM,
  81. TV_STD_PAL_CN,
  82. };
  83. struct radeon_i2c_bus_rec {
  84. bool valid;
  85. uint32_t mask_clk_reg;
  86. uint32_t mask_data_reg;
  87. uint32_t a_clk_reg;
  88. uint32_t a_data_reg;
  89. uint32_t put_clk_reg;
  90. uint32_t put_data_reg;
  91. uint32_t get_clk_reg;
  92. uint32_t get_data_reg;
  93. uint32_t mask_clk_mask;
  94. uint32_t mask_data_mask;
  95. uint32_t put_clk_mask;
  96. uint32_t put_data_mask;
  97. uint32_t get_clk_mask;
  98. uint32_t get_data_mask;
  99. uint32_t a_clk_mask;
  100. uint32_t a_data_mask;
  101. };
  102. struct radeon_tmds_pll {
  103. uint32_t freq;
  104. uint32_t value;
  105. };
  106. #define RADEON_MAX_BIOS_CONNECTOR 16
  107. #define RADEON_PLL_USE_BIOS_DIVS (1 << 0)
  108. #define RADEON_PLL_NO_ODD_POST_DIV (1 << 1)
  109. #define RADEON_PLL_USE_REF_DIV (1 << 2)
  110. #define RADEON_PLL_LEGACY (1 << 3)
  111. #define RADEON_PLL_PREFER_LOW_REF_DIV (1 << 4)
  112. #define RADEON_PLL_PREFER_HIGH_REF_DIV (1 << 5)
  113. #define RADEON_PLL_PREFER_LOW_FB_DIV (1 << 6)
  114. #define RADEON_PLL_PREFER_HIGH_FB_DIV (1 << 7)
  115. #define RADEON_PLL_PREFER_LOW_POST_DIV (1 << 8)
  116. #define RADEON_PLL_PREFER_HIGH_POST_DIV (1 << 9)
  117. #define RADEON_PLL_USE_FRAC_FB_DIV (1 << 10)
  118. #define RADEON_PLL_PREFER_CLOSEST_LOWER (1 << 11)
  119. struct radeon_pll {
  120. uint16_t reference_freq;
  121. uint16_t reference_div;
  122. uint32_t pll_in_min;
  123. uint32_t pll_in_max;
  124. uint32_t pll_out_min;
  125. uint32_t pll_out_max;
  126. uint16_t xclk;
  127. uint32_t min_ref_div;
  128. uint32_t max_ref_div;
  129. uint32_t min_post_div;
  130. uint32_t max_post_div;
  131. uint32_t min_feedback_div;
  132. uint32_t max_feedback_div;
  133. uint32_t min_frac_feedback_div;
  134. uint32_t max_frac_feedback_div;
  135. uint32_t best_vco;
  136. };
  137. struct radeon_i2c_chan {
  138. struct drm_device *dev;
  139. struct i2c_adapter adapter;
  140. struct i2c_algo_bit_data algo;
  141. struct radeon_i2c_bus_rec rec;
  142. };
  143. /* mostly for macs, but really any system without connector tables */
  144. enum radeon_connector_table {
  145. CT_NONE,
  146. CT_GENERIC,
  147. CT_IBOOK,
  148. CT_POWERBOOK_EXTERNAL,
  149. CT_POWERBOOK_INTERNAL,
  150. CT_POWERBOOK_VGA,
  151. CT_MINI_EXTERNAL,
  152. CT_MINI_INTERNAL,
  153. CT_IMAC_G5_ISIGHT,
  154. CT_EMAC,
  155. };
  156. struct radeon_mode_info {
  157. struct atom_context *atom_context;
  158. struct card_info *atom_card_info;
  159. enum radeon_connector_table connector_table;
  160. bool mode_config_initialized;
  161. struct radeon_crtc *crtcs[2];
  162. /* DVI-I properties */
  163. struct drm_property *coherent_mode_property;
  164. /* DAC enable load detect */
  165. struct drm_property *load_detect_property;
  166. /* TV standard load detect */
  167. struct drm_property *tv_std_property;
  168. /* legacy TMDS PLL detect */
  169. struct drm_property *tmds_pll_property;
  170. };
  171. #define MAX_H_CODE_TIMING_LEN 32
  172. #define MAX_V_CODE_TIMING_LEN 32
  173. /* need to store these as reading
  174. back code tables is excessive */
  175. struct radeon_tv_regs {
  176. uint32_t tv_uv_adr;
  177. uint32_t timing_cntl;
  178. uint32_t hrestart;
  179. uint32_t vrestart;
  180. uint32_t frestart;
  181. uint16_t h_code_timing[MAX_H_CODE_TIMING_LEN];
  182. uint16_t v_code_timing[MAX_V_CODE_TIMING_LEN];
  183. };
  184. struct radeon_crtc {
  185. struct drm_crtc base;
  186. int crtc_id;
  187. u16 lut_r[256], lut_g[256], lut_b[256];
  188. bool enabled;
  189. bool can_tile;
  190. uint32_t crtc_offset;
  191. struct drm_gem_object *cursor_bo;
  192. uint64_t cursor_addr;
  193. int cursor_width;
  194. int cursor_height;
  195. uint32_t legacy_display_base_addr;
  196. uint32_t legacy_cursor_offset;
  197. enum radeon_rmx_type rmx_type;
  198. fixed20_12 vsc;
  199. fixed20_12 hsc;
  200. struct drm_display_mode native_mode;
  201. };
  202. struct radeon_encoder_primary_dac {
  203. /* legacy primary dac */
  204. uint32_t ps2_pdac_adj;
  205. };
  206. struct radeon_encoder_lvds {
  207. /* legacy lvds */
  208. uint16_t panel_vcc_delay;
  209. uint8_t panel_pwr_delay;
  210. uint8_t panel_digon_delay;
  211. uint8_t panel_blon_delay;
  212. uint16_t panel_ref_divider;
  213. uint8_t panel_post_divider;
  214. uint16_t panel_fb_divider;
  215. bool use_bios_dividers;
  216. uint32_t lvds_gen_cntl;
  217. /* panel mode */
  218. struct drm_display_mode native_mode;
  219. };
  220. struct radeon_encoder_tv_dac {
  221. /* legacy tv dac */
  222. uint32_t ps2_tvdac_adj;
  223. uint32_t ntsc_tvdac_adj;
  224. uint32_t pal_tvdac_adj;
  225. int h_pos;
  226. int v_pos;
  227. int h_size;
  228. int supported_tv_stds;
  229. bool tv_on;
  230. enum radeon_tv_std tv_std;
  231. struct radeon_tv_regs tv;
  232. };
  233. struct radeon_encoder_int_tmds {
  234. /* legacy int tmds */
  235. struct radeon_tmds_pll tmds_pll[4];
  236. };
  237. /* spread spectrum */
  238. struct radeon_atom_ss {
  239. uint16_t percentage;
  240. uint8_t type;
  241. uint8_t step;
  242. uint8_t delay;
  243. uint8_t range;
  244. uint8_t refdiv;
  245. };
  246. struct radeon_encoder_atom_dig {
  247. /* atom dig */
  248. bool coherent_mode;
  249. int dig_block;
  250. /* atom lvds */
  251. uint32_t lvds_misc;
  252. uint16_t panel_pwr_delay;
  253. struct radeon_atom_ss *ss;
  254. /* panel mode */
  255. struct drm_display_mode native_mode;
  256. };
  257. struct radeon_encoder_atom_dac {
  258. enum radeon_tv_std tv_std;
  259. };
  260. struct radeon_encoder {
  261. struct drm_encoder base;
  262. uint32_t encoder_id;
  263. uint32_t devices;
  264. uint32_t active_device;
  265. uint32_t flags;
  266. uint32_t pixel_clock;
  267. enum radeon_rmx_type rmx_type;
  268. struct drm_display_mode native_mode;
  269. void *enc_priv;
  270. };
  271. struct radeon_connector_atom_dig {
  272. uint32_t igp_lane_info;
  273. bool linkb;
  274. };
  275. struct radeon_connector {
  276. struct drm_connector base;
  277. uint32_t connector_id;
  278. uint32_t devices;
  279. struct radeon_i2c_chan *ddc_bus;
  280. /* some systems have a an hdmi and vga port with a shared ddc line */
  281. bool shared_ddc;
  282. bool use_digital;
  283. /* we need to mind the EDID between detect
  284. and get modes due to analog/digital/tvencoder */
  285. struct edid *edid;
  286. void *con_priv;
  287. bool dac_load_detect;
  288. uint16_t connector_object_id;
  289. };
  290. struct radeon_framebuffer {
  291. struct drm_framebuffer base;
  292. struct drm_gem_object *obj;
  293. };
  294. extern struct radeon_i2c_chan *radeon_i2c_create(struct drm_device *dev,
  295. struct radeon_i2c_bus_rec *rec,
  296. const char *name);
  297. extern void radeon_i2c_destroy(struct radeon_i2c_chan *i2c);
  298. extern bool radeon_ddc_probe(struct radeon_connector *radeon_connector);
  299. extern int radeon_ddc_get_modes(struct radeon_connector *radeon_connector);
  300. extern struct drm_encoder *radeon_best_encoder(struct drm_connector *connector);
  301. extern void radeon_compute_pll(struct radeon_pll *pll,
  302. uint64_t freq,
  303. uint32_t *dot_clock_p,
  304. uint32_t *fb_div_p,
  305. uint32_t *frac_fb_div_p,
  306. uint32_t *ref_div_p,
  307. uint32_t *post_div_p,
  308. int flags);
  309. struct drm_encoder *radeon_encoder_legacy_lvds_add(struct drm_device *dev, int bios_index);
  310. struct drm_encoder *radeon_encoder_legacy_primary_dac_add(struct drm_device *dev, int bios_index, int with_tv);
  311. struct drm_encoder *radeon_encoder_legacy_tv_dac_add(struct drm_device *dev, int bios_index, int with_tv);
  312. struct drm_encoder *radeon_encoder_legacy_tmds_int_add(struct drm_device *dev, int bios_index);
  313. struct drm_encoder *radeon_encoder_legacy_tmds_ext_add(struct drm_device *dev, int bios_index);
  314. extern void atombios_external_tmds_setup(struct drm_encoder *encoder, int action);
  315. extern int atombios_get_encoder_mode(struct drm_encoder *encoder);
  316. extern void radeon_encoder_set_active_device(struct drm_encoder *encoder);
  317. extern void radeon_crtc_load_lut(struct drm_crtc *crtc);
  318. extern int atombios_crtc_set_base(struct drm_crtc *crtc, int x, int y,
  319. struct drm_framebuffer *old_fb);
  320. extern int atombios_crtc_mode_set(struct drm_crtc *crtc,
  321. struct drm_display_mode *mode,
  322. struct drm_display_mode *adjusted_mode,
  323. int x, int y,
  324. struct drm_framebuffer *old_fb);
  325. extern void atombios_crtc_dpms(struct drm_crtc *crtc, int mode);
  326. extern int radeon_crtc_set_base(struct drm_crtc *crtc, int x, int y,
  327. struct drm_framebuffer *old_fb);
  328. extern void radeon_legacy_atom_set_surface(struct drm_crtc *crtc);
  329. extern int radeon_crtc_cursor_set(struct drm_crtc *crtc,
  330. struct drm_file *file_priv,
  331. uint32_t handle,
  332. uint32_t width,
  333. uint32_t height);
  334. extern int radeon_crtc_cursor_move(struct drm_crtc *crtc,
  335. int x, int y);
  336. extern bool radeon_atom_get_clock_info(struct drm_device *dev);
  337. extern bool radeon_combios_get_clock_info(struct drm_device *dev);
  338. extern struct radeon_encoder_atom_dig *
  339. radeon_atombios_get_lvds_info(struct radeon_encoder *encoder);
  340. bool radeon_atombios_get_tmds_info(struct radeon_encoder *encoder,
  341. struct radeon_encoder_int_tmds *tmds);
  342. bool radeon_legacy_get_tmds_info_from_combios(struct radeon_encoder *encoder,
  343. struct radeon_encoder_int_tmds *tmds);
  344. bool radeon_legacy_get_tmds_info_from_table(struct radeon_encoder *encoder,
  345. struct radeon_encoder_int_tmds *tmds);
  346. extern struct radeon_encoder_primary_dac *
  347. radeon_atombios_get_primary_dac_info(struct radeon_encoder *encoder);
  348. extern struct radeon_encoder_tv_dac *
  349. radeon_atombios_get_tv_dac_info(struct radeon_encoder *encoder);
  350. extern struct radeon_encoder_lvds *
  351. radeon_combios_get_lvds_info(struct radeon_encoder *encoder);
  352. extern void radeon_combios_get_ext_tmds_info(struct radeon_encoder *encoder);
  353. extern struct radeon_encoder_tv_dac *
  354. radeon_combios_get_tv_dac_info(struct radeon_encoder *encoder);
  355. extern struct radeon_encoder_primary_dac *
  356. radeon_combios_get_primary_dac_info(struct radeon_encoder *encoder);
  357. extern void radeon_combios_output_lock(struct drm_encoder *encoder, bool lock);
  358. extern void radeon_combios_initialize_bios_scratch_regs(struct drm_device *dev);
  359. extern void radeon_atom_output_lock(struct drm_encoder *encoder, bool lock);
  360. extern void radeon_atom_initialize_bios_scratch_regs(struct drm_device *dev);
  361. extern void radeon_save_bios_scratch_regs(struct radeon_device *rdev);
  362. extern void radeon_restore_bios_scratch_regs(struct radeon_device *rdev);
  363. extern void
  364. radeon_atombios_encoder_crtc_scratch_regs(struct drm_encoder *encoder, int crtc);
  365. extern void
  366. radeon_atombios_encoder_dpms_scratch_regs(struct drm_encoder *encoder, bool on);
  367. extern void
  368. radeon_combios_encoder_crtc_scratch_regs(struct drm_encoder *encoder, int crtc);
  369. extern void
  370. radeon_combios_encoder_dpms_scratch_regs(struct drm_encoder *encoder, bool on);
  371. extern void radeon_crtc_fb_gamma_set(struct drm_crtc *crtc, u16 red, u16 green,
  372. u16 blue, int regno);
  373. extern void radeon_crtc_fb_gamma_get(struct drm_crtc *crtc, u16 *red, u16 *green,
  374. u16 *blue, int regno);
  375. struct drm_framebuffer *radeon_framebuffer_create(struct drm_device *dev,
  376. struct drm_mode_fb_cmd *mode_cmd,
  377. struct drm_gem_object *obj);
  378. int radeonfb_probe(struct drm_device *dev);
  379. int radeonfb_remove(struct drm_device *dev, struct drm_framebuffer *fb);
  380. bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev);
  381. bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev);
  382. void radeon_atombios_init_crtc(struct drm_device *dev,
  383. struct radeon_crtc *radeon_crtc);
  384. void radeon_legacy_init_crtc(struct drm_device *dev,
  385. struct radeon_crtc *radeon_crtc);
  386. void radeon_i2c_do_lock(struct radeon_connector *radeon_connector, int lock_state);
  387. void radeon_get_clock_info(struct drm_device *dev);
  388. extern bool radeon_get_atom_connector_info_from_object_table(struct drm_device *dev);
  389. extern bool radeon_get_atom_connector_info_from_supported_devices_table(struct drm_device *dev);
  390. void radeon_rmx_mode_fixup(struct drm_encoder *encoder,
  391. struct drm_display_mode *mode,
  392. struct drm_display_mode *adjusted_mode);
  393. void radeon_enc_destroy(struct drm_encoder *encoder);
  394. void radeon_copy_fb(struct drm_device *dev, struct drm_gem_object *dst_obj);
  395. void radeon_combios_asic_init(struct drm_device *dev);
  396. extern int radeon_static_clocks_init(struct drm_device *dev);
  397. bool radeon_crtc_scaling_mode_fixup(struct drm_crtc *crtc,
  398. struct drm_display_mode *mode,
  399. struct drm_display_mode *adjusted_mode);
  400. void atom_rv515_force_tv_scaler(struct radeon_device *rdev, struct radeon_crtc *radeon_crtc);
  401. /* legacy tv */
  402. void radeon_legacy_tv_adjust_crtc_reg(struct drm_encoder *encoder,
  403. uint32_t *h_total_disp, uint32_t *h_sync_strt_wid,
  404. uint32_t *v_total_disp, uint32_t *v_sync_strt_wid);
  405. void radeon_legacy_tv_adjust_pll1(struct drm_encoder *encoder,
  406. uint32_t *htotal_cntl, uint32_t *ppll_ref_div,
  407. uint32_t *ppll_div_3, uint32_t *pixclks_cntl);
  408. void radeon_legacy_tv_adjust_pll2(struct drm_encoder *encoder,
  409. uint32_t *htotal2_cntl, uint32_t *p2pll_ref_div,
  410. uint32_t *p2pll_div_0, uint32_t *pixclks_cntl);
  411. void radeon_legacy_tv_mode_set(struct drm_encoder *encoder,
  412. struct drm_display_mode *mode,
  413. struct drm_display_mode *adjusted_mode);
  414. #endif