mx27ads.c 7.8 KB

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  1. /*
  2. * Copyright (C) 2000 Deep Blue Solutions Ltd
  3. * Copyright (C) 2002 Shane Nay (shane@minirl.com)
  4. * Copyright 2006-2007 Freescale Semiconductor, Inc. All Rights Reserved.
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  19. */
  20. #include <linux/platform_device.h>
  21. #include <linux/mtd/mtd.h>
  22. #include <linux/mtd/map.h>
  23. #include <linux/mtd/partitions.h>
  24. #include <linux/mtd/physmap.h>
  25. #include <linux/i2c.h>
  26. #include <linux/irq.h>
  27. #include <mach/common.h>
  28. #include <mach/hardware.h>
  29. #include <asm/mach-types.h>
  30. #include <asm/mach/arch.h>
  31. #include <asm/mach/time.h>
  32. #include <asm/mach/map.h>
  33. #include <mach/gpio.h>
  34. #include <mach/imx-uart.h>
  35. #include <mach/iomux.h>
  36. #include <mach/board-mx27ads.h>
  37. #include <mach/mxc_nand.h>
  38. #include <mach/i2c.h>
  39. #include <mach/imxfb.h>
  40. #include <mach/mmc.h>
  41. #include "devices.h"
  42. static unsigned int mx27ads_pins[] = {
  43. /* UART0 */
  44. PE12_PF_UART1_TXD,
  45. PE13_PF_UART1_RXD,
  46. PE14_PF_UART1_CTS,
  47. PE15_PF_UART1_RTS,
  48. /* UART1 */
  49. PE3_PF_UART2_CTS,
  50. PE4_PF_UART2_RTS,
  51. PE6_PF_UART2_TXD,
  52. PE7_PF_UART2_RXD,
  53. /* UART2 */
  54. PE8_PF_UART3_TXD,
  55. PE9_PF_UART3_RXD,
  56. PE10_PF_UART3_CTS,
  57. PE11_PF_UART3_RTS,
  58. /* UART3 */
  59. PB26_AF_UART4_RTS,
  60. PB28_AF_UART4_TXD,
  61. PB29_AF_UART4_CTS,
  62. PB31_AF_UART4_RXD,
  63. /* UART4 */
  64. PB18_AF_UART5_TXD,
  65. PB19_AF_UART5_RXD,
  66. PB20_AF_UART5_CTS,
  67. PB21_AF_UART5_RTS,
  68. /* UART5 */
  69. PB10_AF_UART6_TXD,
  70. PB12_AF_UART6_CTS,
  71. PB11_AF_UART6_RXD,
  72. PB13_AF_UART6_RTS,
  73. /* FEC */
  74. PD0_AIN_FEC_TXD0,
  75. PD1_AIN_FEC_TXD1,
  76. PD2_AIN_FEC_TXD2,
  77. PD3_AIN_FEC_TXD3,
  78. PD4_AOUT_FEC_RX_ER,
  79. PD5_AOUT_FEC_RXD1,
  80. PD6_AOUT_FEC_RXD2,
  81. PD7_AOUT_FEC_RXD3,
  82. PD8_AF_FEC_MDIO,
  83. PD9_AIN_FEC_MDC,
  84. PD10_AOUT_FEC_CRS,
  85. PD11_AOUT_FEC_TX_CLK,
  86. PD12_AOUT_FEC_RXD0,
  87. PD13_AOUT_FEC_RX_DV,
  88. PD14_AOUT_FEC_RX_CLK,
  89. PD15_AOUT_FEC_COL,
  90. PD16_AIN_FEC_TX_ER,
  91. PF23_AIN_FEC_TX_EN,
  92. /* I2C2 */
  93. PC5_PF_I2C2_SDA,
  94. PC6_PF_I2C2_SCL,
  95. /* FB */
  96. PA5_PF_LSCLK,
  97. PA6_PF_LD0,
  98. PA7_PF_LD1,
  99. PA8_PF_LD2,
  100. PA9_PF_LD3,
  101. PA10_PF_LD4,
  102. PA11_PF_LD5,
  103. PA12_PF_LD6,
  104. PA13_PF_LD7,
  105. PA14_PF_LD8,
  106. PA15_PF_LD9,
  107. PA16_PF_LD10,
  108. PA17_PF_LD11,
  109. PA18_PF_LD12,
  110. PA19_PF_LD13,
  111. PA20_PF_LD14,
  112. PA21_PF_LD15,
  113. PA22_PF_LD16,
  114. PA23_PF_LD17,
  115. PA24_PF_REV,
  116. PA25_PF_CLS,
  117. PA26_PF_PS,
  118. PA27_PF_SPL_SPR,
  119. PA28_PF_HSYNC,
  120. PA29_PF_VSYNC,
  121. PA30_PF_CONTRAST,
  122. PA31_PF_OE_ACD,
  123. /* OWIRE */
  124. PE16_AF_OWIRE,
  125. /* SDHC1*/
  126. PE18_PF_SD1_D0,
  127. PE19_PF_SD1_D1,
  128. PE20_PF_SD1_D2,
  129. PE21_PF_SD1_D3,
  130. PE22_PF_SD1_CMD,
  131. PE23_PF_SD1_CLK,
  132. /* SDHC2*/
  133. PB4_PF_SD2_D0,
  134. PB5_PF_SD2_D1,
  135. PB6_PF_SD2_D2,
  136. PB7_PF_SD2_D3,
  137. PB8_PF_SD2_CMD,
  138. PB9_PF_SD2_CLK,
  139. };
  140. static struct mxc_nand_platform_data mx27ads_nand_board_info = {
  141. .width = 1,
  142. .hw_ecc = 1,
  143. };
  144. /* ADS's NOR flash */
  145. static struct physmap_flash_data mx27ads_flash_data = {
  146. .width = 2,
  147. };
  148. static struct resource mx27ads_flash_resource = {
  149. .start = 0xc0000000,
  150. .end = 0xc0000000 + 0x02000000 - 1,
  151. .flags = IORESOURCE_MEM,
  152. };
  153. static struct platform_device mx27ads_nor_mtd_device = {
  154. .name = "physmap-flash",
  155. .id = 0,
  156. .dev = {
  157. .platform_data = &mx27ads_flash_data,
  158. },
  159. .num_resources = 1,
  160. .resource = &mx27ads_flash_resource,
  161. };
  162. static struct imxi2c_platform_data mx27ads_i2c_data = {
  163. .bitrate = 100000,
  164. };
  165. static struct i2c_board_info mx27ads_i2c_devices[] = {
  166. };
  167. void lcd_power(int on)
  168. {
  169. if (on)
  170. __raw_writew(PBC_BCTRL1_LCDON, PBC_BCTRL1_SET_REG);
  171. else
  172. __raw_writew(PBC_BCTRL1_LCDON, PBC_BCTRL1_CLEAR_REG);
  173. }
  174. static struct imx_fb_videomode mx27ads_modes[] = {
  175. {
  176. .mode = {
  177. .name = "Sharp-LQ035Q7",
  178. .refresh = 60,
  179. .xres = 240,
  180. .yres = 320,
  181. .pixclock = 188679, /* in ps (5.3MHz) */
  182. .hsync_len = 1,
  183. .left_margin = 9,
  184. .right_margin = 16,
  185. .vsync_len = 1,
  186. .upper_margin = 7,
  187. .lower_margin = 9,
  188. },
  189. .bpp = 16,
  190. .pcr = 0xFB008BC0,
  191. },
  192. };
  193. static struct imx_fb_platform_data mx27ads_fb_data = {
  194. .mode = mx27ads_modes,
  195. .num_modes = ARRAY_SIZE(mx27ads_modes),
  196. /*
  197. * - HSYNC active high
  198. * - VSYNC active high
  199. * - clk notenabled while idle
  200. * - clock inverted
  201. * - data not inverted
  202. * - data enable low active
  203. * - enable sharp mode
  204. */
  205. .pwmr = 0x00A903FF,
  206. .lscr1 = 0x00120300,
  207. .dmacr = 0x00020010,
  208. .lcd_power = lcd_power,
  209. };
  210. static int mx27ads_sdhc1_init(struct device *dev, irq_handler_t detect_irq,
  211. void *data)
  212. {
  213. return request_irq(IRQ_GPIOE(21), detect_irq, IRQF_TRIGGER_RISING,
  214. "sdhc1-card-detect", data);
  215. }
  216. static int mx27ads_sdhc2_init(struct device *dev, irq_handler_t detect_irq,
  217. void *data)
  218. {
  219. return request_irq(IRQ_GPIOB(7), detect_irq, IRQF_TRIGGER_RISING,
  220. "sdhc2-card-detect", data);
  221. }
  222. static void mx27ads_sdhc1_exit(struct device *dev, void *data)
  223. {
  224. free_irq(IRQ_GPIOE(21), data);
  225. }
  226. static void mx27ads_sdhc2_exit(struct device *dev, void *data)
  227. {
  228. free_irq(IRQ_GPIOB(7), data);
  229. }
  230. static struct imxmmc_platform_data sdhc1_pdata = {
  231. .init = mx27ads_sdhc1_init,
  232. .exit = mx27ads_sdhc1_exit,
  233. };
  234. static struct imxmmc_platform_data sdhc2_pdata = {
  235. .init = mx27ads_sdhc2_init,
  236. .exit = mx27ads_sdhc2_exit,
  237. };
  238. static struct platform_device *platform_devices[] __initdata = {
  239. &mx27ads_nor_mtd_device,
  240. &mxc_fec_device,
  241. &mxc_w1_master_device,
  242. };
  243. static struct imxuart_platform_data uart_pdata[] = {
  244. {
  245. .flags = IMXUART_HAVE_RTSCTS,
  246. }, {
  247. .flags = IMXUART_HAVE_RTSCTS,
  248. }, {
  249. .flags = IMXUART_HAVE_RTSCTS,
  250. }, {
  251. .flags = IMXUART_HAVE_RTSCTS,
  252. }, {
  253. .flags = IMXUART_HAVE_RTSCTS,
  254. }, {
  255. .flags = IMXUART_HAVE_RTSCTS,
  256. },
  257. };
  258. static void __init mx27ads_board_init(void)
  259. {
  260. mxc_gpio_setup_multiple_pins(mx27ads_pins, ARRAY_SIZE(mx27ads_pins),
  261. "mx27ads");
  262. mxc_register_device(&mxc_uart_device0, &uart_pdata[0]);
  263. mxc_register_device(&mxc_uart_device1, &uart_pdata[1]);
  264. mxc_register_device(&mxc_uart_device2, &uart_pdata[2]);
  265. mxc_register_device(&mxc_uart_device3, &uart_pdata[3]);
  266. mxc_register_device(&mxc_uart_device4, &uart_pdata[4]);
  267. mxc_register_device(&mxc_uart_device5, &uart_pdata[5]);
  268. mxc_register_device(&mxc_nand_device, &mx27ads_nand_board_info);
  269. /* only the i2c master 1 is used on this CPU card */
  270. i2c_register_board_info(1, mx27ads_i2c_devices,
  271. ARRAY_SIZE(mx27ads_i2c_devices));
  272. mxc_register_device(&mxc_i2c_device1, &mx27ads_i2c_data);
  273. mxc_register_device(&mxc_fb_device, &mx27ads_fb_data);
  274. mxc_register_device(&mxc_sdhc_device0, &sdhc1_pdata);
  275. mxc_register_device(&mxc_sdhc_device1, &sdhc2_pdata);
  276. platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
  277. }
  278. static void __init mx27ads_timer_init(void)
  279. {
  280. unsigned long fref = 26000000;
  281. if ((__raw_readw(PBC_VERSION_REG) & CKIH_27MHZ_BIT_SET) == 0)
  282. fref = 27000000;
  283. mx27_clocks_init(fref);
  284. }
  285. static struct sys_timer mx27ads_timer = {
  286. .init = mx27ads_timer_init,
  287. };
  288. static struct map_desc mx27ads_io_desc[] __initdata = {
  289. {
  290. .virtual = PBC_BASE_ADDRESS,
  291. .pfn = __phys_to_pfn(CS4_BASE_ADDR),
  292. .length = SZ_1M,
  293. .type = MT_DEVICE,
  294. },
  295. };
  296. static void __init mx27ads_map_io(void)
  297. {
  298. mx27_map_io();
  299. iotable_init(mx27ads_io_desc, ARRAY_SIZE(mx27ads_io_desc));
  300. }
  301. MACHINE_START(MX27ADS, "Freescale i.MX27ADS")
  302. /* maintainer: Freescale Semiconductor, Inc. */
  303. .phys_io = AIPI_BASE_ADDR,
  304. .io_pg_offst = ((AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc,
  305. .boot_params = PHYS_OFFSET + 0x100,
  306. .map_io = mx27ads_map_io,
  307. .init_irq = mx27_init_irq,
  308. .init_machine = mx27ads_board_init,
  309. .timer = &mx27ads_timer,
  310. MACHINE_END