hpwdt.c 18 KB

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  1. /*
  2. * HP WatchDog Driver
  3. * based on
  4. *
  5. * SoftDog 0.05: A Software Watchdog Device
  6. *
  7. * (c) Copyright 2007 Hewlett-Packard Development Company, L.P.
  8. * Thomas Mingarelli <thomas.mingarelli@hp.com>
  9. *
  10. * This program is free software; you can redistribute it and/or
  11. * modify it under the terms of the GNU General Public License
  12. * version 2 as published by the Free Software Foundation
  13. *
  14. */
  15. #include <linux/device.h>
  16. #include <linux/fs.h>
  17. #include <linux/init.h>
  18. #include <linux/interrupt.h>
  19. #include <linux/io.h>
  20. #include <linux/irq.h>
  21. #include <linux/kernel.h>
  22. #include <linux/miscdevice.h>
  23. #include <linux/mm.h>
  24. #include <linux/module.h>
  25. #include <linux/kdebug.h>
  26. #include <linux/moduleparam.h>
  27. #include <linux/notifier.h>
  28. #include <linux/pci.h>
  29. #include <linux/pci_ids.h>
  30. #include <linux/reboot.h>
  31. #include <linux/sched.h>
  32. #include <linux/timer.h>
  33. #include <linux/types.h>
  34. #include <linux/uaccess.h>
  35. #include <linux/watchdog.h>
  36. #include <linux/dmi.h>
  37. #include <linux/efi.h>
  38. #include <linux/string.h>
  39. #include <linux/bootmem.h>
  40. #include <linux/slab.h>
  41. #include <asm/desc.h>
  42. #define PCI_BIOS32_SD_VALUE 0x5F32335F /* "_32_" */
  43. #define CRU_BIOS_SIGNATURE_VALUE 0x55524324
  44. #define PCI_BIOS32_PARAGRAPH_LEN 16
  45. #define PCI_ROM_BASE1 0x000F0000
  46. #define ROM_SIZE 0x10000
  47. struct bios32_service_dir {
  48. u32 signature;
  49. u32 entry_point;
  50. u8 revision;
  51. u8 length;
  52. u8 checksum;
  53. u8 reserved[5];
  54. };
  55. /* type 212 */
  56. struct smbios_cru64_info {
  57. u8 type;
  58. u8 byte_length;
  59. u16 handle;
  60. u32 signature;
  61. u64 physical_address;
  62. u32 double_length;
  63. u32 double_offset;
  64. };
  65. #define SMBIOS_CRU64_INFORMATION 212
  66. struct cmn_registers {
  67. union {
  68. struct {
  69. u8 ral;
  70. u8 rah;
  71. u16 rea2;
  72. };
  73. u32 reax;
  74. } u1;
  75. union {
  76. struct {
  77. u8 rbl;
  78. u8 rbh;
  79. u8 reb2l;
  80. u8 reb2h;
  81. };
  82. u32 rebx;
  83. } u2;
  84. union {
  85. struct {
  86. u8 rcl;
  87. u8 rch;
  88. u16 rec2;
  89. };
  90. u32 recx;
  91. } u3;
  92. union {
  93. struct {
  94. u8 rdl;
  95. u8 rdh;
  96. u16 red2;
  97. };
  98. u32 redx;
  99. } u4;
  100. u32 resi;
  101. u32 redi;
  102. u16 rds;
  103. u16 res;
  104. u32 reflags;
  105. } __attribute__((packed));
  106. #define DEFAULT_MARGIN 30
  107. static unsigned int soft_margin = DEFAULT_MARGIN; /* in seconds */
  108. static unsigned int reload; /* the computed soft_margin */
  109. static int nowayout = WATCHDOG_NOWAYOUT;
  110. static char expect_release;
  111. static unsigned long hpwdt_is_open;
  112. static void __iomem *pci_mem_addr; /* the PCI-memory address */
  113. static unsigned long __iomem *hpwdt_timer_reg;
  114. static unsigned long __iomem *hpwdt_timer_con;
  115. static DEFINE_SPINLOCK(rom_lock);
  116. static void *cru_rom_addr;
  117. static struct cmn_registers cmn_regs;
  118. static struct pci_device_id hpwdt_devices[] = {
  119. {
  120. .vendor = PCI_VENDOR_ID_COMPAQ,
  121. .device = 0xB203,
  122. .subvendor = PCI_ANY_ID,
  123. .subdevice = PCI_ANY_ID,
  124. },
  125. {0}, /* terminate list */
  126. };
  127. MODULE_DEVICE_TABLE(pci, hpwdt_devices);
  128. extern asmlinkage void asminline_call(struct cmn_registers *pi86Regs, unsigned long *pRomEntry);
  129. #ifndef CONFIG_X86_64
  130. /* --32 Bit Bios------------------------------------------------------------ */
  131. #define HPWDT_ARCH 32
  132. asm(".text \n\t"
  133. ".align 4 \n"
  134. "asminline_call: \n\t"
  135. "pushl %ebp \n\t"
  136. "movl %esp, %ebp \n\t"
  137. "pusha \n\t"
  138. "pushf \n\t"
  139. "push %es \n\t"
  140. "push %ds \n\t"
  141. "pop %es \n\t"
  142. "movl 8(%ebp),%eax \n\t"
  143. "movl 4(%eax),%ebx \n\t"
  144. "movl 8(%eax),%ecx \n\t"
  145. "movl 12(%eax),%edx \n\t"
  146. "movl 16(%eax),%esi \n\t"
  147. "movl 20(%eax),%edi \n\t"
  148. "movl (%eax),%eax \n\t"
  149. "push %cs \n\t"
  150. "call *12(%ebp) \n\t"
  151. "pushf \n\t"
  152. "pushl %eax \n\t"
  153. "movl 8(%ebp),%eax \n\t"
  154. "movl %ebx,4(%eax) \n\t"
  155. "movl %ecx,8(%eax) \n\t"
  156. "movl %edx,12(%eax) \n\t"
  157. "movl %esi,16(%eax) \n\t"
  158. "movl %edi,20(%eax) \n\t"
  159. "movw %ds,24(%eax) \n\t"
  160. "movw %es,26(%eax) \n\t"
  161. "popl %ebx \n\t"
  162. "movl %ebx,(%eax) \n\t"
  163. "popl %ebx \n\t"
  164. "movl %ebx,28(%eax) \n\t"
  165. "pop %es \n\t"
  166. "popf \n\t"
  167. "popa \n\t"
  168. "leave \n\t"
  169. "ret \n\t"
  170. ".previous");
  171. /*
  172. * cru_detect
  173. *
  174. * Routine Description:
  175. * This function uses the 32-bit BIOS Service Directory record to
  176. * search for a $CRU record.
  177. *
  178. * Return Value:
  179. * 0 : SUCCESS
  180. * <0 : FAILURE
  181. */
  182. static int __devinit cru_detect(unsigned long map_entry,
  183. unsigned long map_offset)
  184. {
  185. void *bios32_map;
  186. unsigned long *bios32_entrypoint;
  187. unsigned long cru_physical_address;
  188. unsigned long cru_length;
  189. unsigned long physical_bios_base = 0;
  190. unsigned long physical_bios_offset = 0;
  191. int retval = -ENODEV;
  192. bios32_map = ioremap(map_entry, (2 * PAGE_SIZE));
  193. if (bios32_map == NULL)
  194. return -ENODEV;
  195. bios32_entrypoint = bios32_map + map_offset;
  196. cmn_regs.u1.reax = CRU_BIOS_SIGNATURE_VALUE;
  197. asminline_call(&cmn_regs, bios32_entrypoint);
  198. if (cmn_regs.u1.ral != 0) {
  199. printk(KERN_WARNING
  200. "hpwdt: Call succeeded but with an error: 0x%x\n",
  201. cmn_regs.u1.ral);
  202. } else {
  203. physical_bios_base = cmn_regs.u2.rebx;
  204. physical_bios_offset = cmn_regs.u4.redx;
  205. cru_length = cmn_regs.u3.recx;
  206. cru_physical_address =
  207. physical_bios_base + physical_bios_offset;
  208. /* If the values look OK, then map it in. */
  209. if ((physical_bios_base + physical_bios_offset)) {
  210. cru_rom_addr =
  211. ioremap(cru_physical_address, cru_length);
  212. if (cru_rom_addr)
  213. retval = 0;
  214. }
  215. printk(KERN_DEBUG "hpwdt: CRU Base Address: 0x%lx\n",
  216. physical_bios_base);
  217. printk(KERN_DEBUG "hpwdt: CRU Offset Address: 0x%lx\n",
  218. physical_bios_offset);
  219. printk(KERN_DEBUG "hpwdt: CRU Length: 0x%lx\n",
  220. cru_length);
  221. printk(KERN_DEBUG "hpwdt: CRU Mapped Address: 0x%x\n",
  222. (unsigned int)&cru_rom_addr);
  223. }
  224. iounmap(bios32_map);
  225. return retval;
  226. }
  227. /*
  228. * bios_checksum
  229. */
  230. static int __devinit bios_checksum(const char __iomem *ptr, int len)
  231. {
  232. char sum = 0;
  233. int i;
  234. /*
  235. * calculate checksum of size bytes. This should add up
  236. * to zero if we have a valid header.
  237. */
  238. for (i = 0; i < len; i++)
  239. sum += ptr[i];
  240. return ((sum == 0) && (len > 0));
  241. }
  242. /*
  243. * bios32_present
  244. *
  245. * Routine Description:
  246. * This function finds the 32-bit BIOS Service Directory
  247. *
  248. * Return Value:
  249. * 0 : SUCCESS
  250. * <0 : FAILURE
  251. */
  252. static int __devinit bios32_present(const char __iomem *p)
  253. {
  254. struct bios32_service_dir *bios_32_ptr;
  255. int length;
  256. unsigned long map_entry, map_offset;
  257. bios_32_ptr = (struct bios32_service_dir *) p;
  258. /*
  259. * Search for signature by checking equal to the swizzled value
  260. * instead of calling another routine to perform a strcmp.
  261. */
  262. if (bios_32_ptr->signature == PCI_BIOS32_SD_VALUE) {
  263. length = bios_32_ptr->length * PCI_BIOS32_PARAGRAPH_LEN;
  264. if (bios_checksum(p, length)) {
  265. /*
  266. * According to the spec, we're looking for the
  267. * first 4KB-aligned address below the entrypoint
  268. * listed in the header. The Service Directory code
  269. * is guaranteed to occupy no more than 2 4KB pages.
  270. */
  271. map_entry = bios_32_ptr->entry_point & ~(PAGE_SIZE - 1);
  272. map_offset = bios_32_ptr->entry_point - map_entry;
  273. return cru_detect(map_entry, map_offset);
  274. }
  275. }
  276. return -ENODEV;
  277. }
  278. static int __devinit detect_cru_service(void)
  279. {
  280. char __iomem *p, *q;
  281. int rc = -1;
  282. /*
  283. * Search from 0x0f0000 through 0x0fffff, inclusive.
  284. */
  285. p = ioremap(PCI_ROM_BASE1, ROM_SIZE);
  286. if (p == NULL)
  287. return -ENOMEM;
  288. for (q = p; q < p + ROM_SIZE; q += 16) {
  289. rc = bios32_present(q);
  290. if (!rc)
  291. break;
  292. }
  293. iounmap(p);
  294. return rc;
  295. }
  296. #else
  297. /* --64 Bit Bios------------------------------------------------------------ */
  298. #define HPWDT_ARCH 64
  299. asm(".text \n\t"
  300. ".align 4 \n"
  301. "asminline_call: \n\t"
  302. "pushq %rbp \n\t"
  303. "movq %rsp, %rbp \n\t"
  304. "pushq %rax \n\t"
  305. "pushq %rbx \n\t"
  306. "pushq %rdx \n\t"
  307. "pushq %r12 \n\t"
  308. "pushq %r9 \n\t"
  309. "movq %rsi, %r12 \n\t"
  310. "movq %rdi, %r9 \n\t"
  311. "movl 4(%r9),%ebx \n\t"
  312. "movl 8(%r9),%ecx \n\t"
  313. "movl 12(%r9),%edx \n\t"
  314. "movl 16(%r9),%esi \n\t"
  315. "movl 20(%r9),%edi \n\t"
  316. "movl (%r9),%eax \n\t"
  317. "call *%r12 \n\t"
  318. "pushfq \n\t"
  319. "popq %r12 \n\t"
  320. "popfq \n\t"
  321. "movl %eax, (%r9) \n\t"
  322. "movl %ebx, 4(%r9) \n\t"
  323. "movl %ecx, 8(%r9) \n\t"
  324. "movl %edx, 12(%r9) \n\t"
  325. "movl %esi, 16(%r9) \n\t"
  326. "movl %edi, 20(%r9) \n\t"
  327. "movq %r12, %rax \n\t"
  328. "movl %eax, 28(%r9) \n\t"
  329. "popq %r9 \n\t"
  330. "popq %r12 \n\t"
  331. "popq %rdx \n\t"
  332. "popq %rbx \n\t"
  333. "popq %rax \n\t"
  334. "leave \n\t"
  335. "ret \n\t"
  336. ".previous");
  337. /*
  338. * dmi_find_cru
  339. *
  340. * Routine Description:
  341. * This function checks whether or not a SMBIOS/DMI record is
  342. * the 64bit CRU info or not
  343. */
  344. static void __devinit dmi_find_cru(const struct dmi_header *dm)
  345. {
  346. struct smbios_cru64_info *smbios_cru64_ptr;
  347. unsigned long cru_physical_address;
  348. if (dm->type == SMBIOS_CRU64_INFORMATION) {
  349. smbios_cru64_ptr = (struct smbios_cru64_info *) dm;
  350. if (smbios_cru64_ptr->signature == CRU_BIOS_SIGNATURE_VALUE) {
  351. cru_physical_address =
  352. smbios_cru64_ptr->physical_address +
  353. smbios_cru64_ptr->double_offset;
  354. cru_rom_addr = ioremap(cru_physical_address,
  355. smbios_cru64_ptr->double_length);
  356. }
  357. }
  358. }
  359. static int __devinit detect_cru_service(void)
  360. {
  361. cru_rom_addr = NULL;
  362. dmi_walk(dmi_find_cru);
  363. /* if cru_rom_addr has been set then we found a CRU service */
  364. return ((cru_rom_addr != NULL) ? 0: -ENODEV);
  365. }
  366. /* ------------------------------------------------------------------------- */
  367. #endif
  368. /*
  369. * NMI Handler
  370. */
  371. static int hpwdt_pretimeout(struct notifier_block *nb, unsigned long ulReason,
  372. void *data)
  373. {
  374. unsigned long rom_pl;
  375. static int die_nmi_called;
  376. if (ulReason != DIE_NMI && ulReason != DIE_NMI_IPI)
  377. return NOTIFY_OK;
  378. spin_lock_irqsave(&rom_lock, rom_pl);
  379. if (!die_nmi_called)
  380. asminline_call(&cmn_regs, cru_rom_addr);
  381. die_nmi_called = 1;
  382. spin_unlock_irqrestore(&rom_lock, rom_pl);
  383. if (cmn_regs.u1.ral == 0) {
  384. printk(KERN_WARNING "hpwdt: An NMI occurred, "
  385. "but unable to determine source.\n");
  386. } else {
  387. panic("An NMI occurred, please see the Integrated "
  388. "Management Log for details.\n");
  389. }
  390. return NOTIFY_STOP;
  391. }
  392. /*
  393. * Watchdog operations
  394. */
  395. static void hpwdt_start(void)
  396. {
  397. reload = (soft_margin * 1000) / 128;
  398. iowrite16(reload, hpwdt_timer_reg);
  399. iowrite16(0x85, hpwdt_timer_con);
  400. }
  401. static void hpwdt_stop(void)
  402. {
  403. unsigned long data;
  404. data = ioread16(hpwdt_timer_con);
  405. data &= 0xFE;
  406. iowrite16(data, hpwdt_timer_con);
  407. }
  408. static void hpwdt_ping(void)
  409. {
  410. iowrite16(reload, hpwdt_timer_reg);
  411. }
  412. static int hpwdt_change_timer(int new_margin)
  413. {
  414. /* Arbitrary, can't find the card's limits */
  415. if (new_margin < 30 || new_margin > 600) {
  416. printk(KERN_WARNING
  417. "hpwdt: New value passed in is invalid: %d seconds.\n",
  418. new_margin);
  419. return -EINVAL;
  420. }
  421. soft_margin = new_margin;
  422. printk(KERN_DEBUG
  423. "hpwdt: New timer passed in is %d seconds.\n",
  424. new_margin);
  425. reload = (soft_margin * 1000) / 128;
  426. return 0;
  427. }
  428. /*
  429. * /dev/watchdog handling
  430. */
  431. static int hpwdt_open(struct inode *inode, struct file *file)
  432. {
  433. /* /dev/watchdog can only be opened once */
  434. if (test_and_set_bit(0, &hpwdt_is_open))
  435. return -EBUSY;
  436. /* Start the watchdog */
  437. hpwdt_start();
  438. hpwdt_ping();
  439. return nonseekable_open(inode, file);
  440. }
  441. static int hpwdt_release(struct inode *inode, struct file *file)
  442. {
  443. /* Stop the watchdog */
  444. if (expect_release == 42) {
  445. hpwdt_stop();
  446. } else {
  447. printk(KERN_CRIT
  448. "hpwdt: Unexpected close, not stopping watchdog!\n");
  449. hpwdt_ping();
  450. }
  451. expect_release = 0;
  452. /* /dev/watchdog is being closed, make sure it can be re-opened */
  453. clear_bit(0, &hpwdt_is_open);
  454. return 0;
  455. }
  456. static ssize_t hpwdt_write(struct file *file, const char __user *data,
  457. size_t len, loff_t *ppos)
  458. {
  459. /* See if we got the magic character 'V' and reload the timer */
  460. if (len) {
  461. if (!nowayout) {
  462. size_t i;
  463. /* note: just in case someone wrote the magic character
  464. * five months ago... */
  465. expect_release = 0;
  466. /* scan to see whether or not we got the magic char. */
  467. for (i = 0; i != len; i++) {
  468. char c;
  469. if (get_user(c, data + i))
  470. return -EFAULT;
  471. if (c == 'V')
  472. expect_release = 42;
  473. }
  474. }
  475. /* someone wrote to us, we should reload the timer */
  476. hpwdt_ping();
  477. }
  478. return len;
  479. }
  480. static struct watchdog_info ident = {
  481. .options = WDIOF_SETTIMEOUT |
  482. WDIOF_KEEPALIVEPING |
  483. WDIOF_MAGICCLOSE,
  484. .identity = "HP iLO2 HW Watchdog Timer",
  485. };
  486. static long hpwdt_ioctl(struct file *file, unsigned int cmd,
  487. unsigned long arg)
  488. {
  489. void __user *argp = (void __user *)arg;
  490. int __user *p = argp;
  491. int new_margin;
  492. int ret = -ENOTTY;
  493. switch (cmd) {
  494. case WDIOC_GETSUPPORT:
  495. ret = 0;
  496. if (copy_to_user(argp, &ident, sizeof(ident)))
  497. ret = -EFAULT;
  498. break;
  499. case WDIOC_GETSTATUS:
  500. case WDIOC_GETBOOTSTATUS:
  501. ret = put_user(0, p);
  502. break;
  503. case WDIOC_KEEPALIVE:
  504. hpwdt_ping();
  505. ret = 0;
  506. break;
  507. case WDIOC_SETTIMEOUT:
  508. ret = get_user(new_margin, p);
  509. if (ret)
  510. break;
  511. ret = hpwdt_change_timer(new_margin);
  512. if (ret)
  513. break;
  514. hpwdt_ping();
  515. /* Fall */
  516. case WDIOC_GETTIMEOUT:
  517. ret = put_user(soft_margin, p);
  518. break;
  519. }
  520. return ret;
  521. }
  522. /*
  523. * Kernel interfaces
  524. */
  525. static struct file_operations hpwdt_fops = {
  526. .owner = THIS_MODULE,
  527. .llseek = no_llseek,
  528. .write = hpwdt_write,
  529. .unlocked_ioctl = hpwdt_ioctl,
  530. .open = hpwdt_open,
  531. .release = hpwdt_release,
  532. };
  533. static struct miscdevice hpwdt_miscdev = {
  534. .minor = WATCHDOG_MINOR,
  535. .name = "watchdog",
  536. .fops = &hpwdt_fops,
  537. };
  538. static struct notifier_block die_notifier = {
  539. .notifier_call = hpwdt_pretimeout,
  540. .priority = 0x7FFFFFFF,
  541. };
  542. /*
  543. * Init & Exit
  544. */
  545. static int __devinit hpwdt_init_one(struct pci_dev *dev,
  546. const struct pci_device_id *ent)
  547. {
  548. int retval;
  549. /*
  550. * First let's find out if we are on an iLO2 server. We will
  551. * not run on a legacy ASM box.
  552. */
  553. if (dev->subsystem_vendor != PCI_VENDOR_ID_HP) {
  554. dev_warn(&dev->dev,
  555. "This server does not have an iLO2 ASIC.\n");
  556. return -ENODEV;
  557. }
  558. if (pci_enable_device(dev)) {
  559. dev_warn(&dev->dev,
  560. "Not possible to enable PCI Device: 0x%x:0x%x.\n",
  561. ent->vendor, ent->device);
  562. return -ENODEV;
  563. }
  564. pci_mem_addr = pci_iomap(dev, 1, 0x80);
  565. if (!pci_mem_addr) {
  566. dev_warn(&dev->dev,
  567. "Unable to detect the iLO2 server memory.\n");
  568. retval = -ENOMEM;
  569. goto error_pci_iomap;
  570. }
  571. hpwdt_timer_reg = pci_mem_addr + 0x70;
  572. hpwdt_timer_con = pci_mem_addr + 0x72;
  573. /* Make sure that we have a valid soft_margin */
  574. if (hpwdt_change_timer(soft_margin))
  575. hpwdt_change_timer(DEFAULT_MARGIN);
  576. /*
  577. * We need to map the ROM to get the CRU service.
  578. * For 32 bit Operating Systems we need to go through the 32 Bit
  579. * BIOS Service Directory
  580. * For 64 bit Operating Systems we get that service through SMBIOS.
  581. */
  582. retval = detect_cru_service();
  583. if (retval < 0) {
  584. dev_warn(&dev->dev,
  585. "Unable to detect the %d Bit CRU Service.\n",
  586. HPWDT_ARCH);
  587. goto error_get_cru;
  588. }
  589. /*
  590. * We know this is the only CRU call we need to make so lets keep as
  591. * few instructions as possible once the NMI comes in.
  592. */
  593. cmn_regs.u1.rah = 0x0D;
  594. cmn_regs.u1.ral = 0x02;
  595. retval = register_die_notifier(&die_notifier);
  596. if (retval != 0) {
  597. dev_warn(&dev->dev,
  598. "Unable to register a die notifier (err=%d).\n",
  599. retval);
  600. goto error_die_notifier;
  601. }
  602. retval = misc_register(&hpwdt_miscdev);
  603. if (retval < 0) {
  604. dev_warn(&dev->dev,
  605. "Unable to register miscdev on minor=%d (err=%d).\n",
  606. WATCHDOG_MINOR, retval);
  607. goto error_misc_register;
  608. }
  609. printk(KERN_INFO
  610. "hp Watchdog Timer Driver: 1.00"
  611. ", timer margin: %d seconds( nowayout=%d).\n",
  612. soft_margin, nowayout);
  613. return 0;
  614. error_misc_register:
  615. unregister_die_notifier(&die_notifier);
  616. error_die_notifier:
  617. if (cru_rom_addr)
  618. iounmap(cru_rom_addr);
  619. error_get_cru:
  620. pci_iounmap(dev, pci_mem_addr);
  621. error_pci_iomap:
  622. pci_disable_device(dev);
  623. return retval;
  624. }
  625. static void __devexit hpwdt_exit(struct pci_dev *dev)
  626. {
  627. if (!nowayout)
  628. hpwdt_stop();
  629. misc_deregister(&hpwdt_miscdev);
  630. unregister_die_notifier(&die_notifier);
  631. if (cru_rom_addr)
  632. iounmap(cru_rom_addr);
  633. pci_iounmap(dev, pci_mem_addr);
  634. pci_disable_device(dev);
  635. }
  636. static struct pci_driver hpwdt_driver = {
  637. .name = "hpwdt",
  638. .id_table = hpwdt_devices,
  639. .probe = hpwdt_init_one,
  640. .remove = __devexit_p(hpwdt_exit),
  641. };
  642. static void __exit hpwdt_cleanup(void)
  643. {
  644. pci_unregister_driver(&hpwdt_driver);
  645. }
  646. static int __init hpwdt_init(void)
  647. {
  648. return pci_register_driver(&hpwdt_driver);
  649. }
  650. MODULE_AUTHOR("Tom Mingarelli");
  651. MODULE_DESCRIPTION("hp watchdog driver");
  652. MODULE_LICENSE("GPL");
  653. MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);
  654. module_param(soft_margin, int, 0);
  655. MODULE_PARM_DESC(soft_margin, "Watchdog timeout in seconds");
  656. module_param(nowayout, int, 0);
  657. MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default="
  658. __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
  659. module_init(hpwdt_init);
  660. module_exit(hpwdt_cleanup);