nouveau_display.c 18 KB

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  1. /*
  2. * Copyright (C) 2008 Maarten Maathuis.
  3. * All Rights Reserved.
  4. *
  5. * Permission is hereby granted, free of charge, to any person obtaining
  6. * a copy of this software and associated documentation files (the
  7. * "Software"), to deal in the Software without restriction, including
  8. * without limitation the rights to use, copy, modify, merge, publish,
  9. * distribute, sublicense, and/or sell copies of the Software, and to
  10. * permit persons to whom the Software is furnished to do so, subject to
  11. * the following conditions:
  12. *
  13. * The above copyright notice and this permission notice (including the
  14. * next paragraph) shall be included in all copies or substantial
  15. * portions of the Software.
  16. *
  17. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  18. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  19. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  20. * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  21. * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  22. * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  23. * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  24. *
  25. */
  26. #include <drm/drmP.h>
  27. #include <drm/drm_crtc_helper.h>
  28. #include <drm/ttm/ttm_execbuf_util.h>
  29. #include "nouveau_fbcon.h"
  30. #include "dispnv04/hw.h"
  31. #include "nouveau_crtc.h"
  32. #include "nouveau_dma.h"
  33. #include "nouveau_gem.h"
  34. #include "nouveau_connector.h"
  35. #include "nv50_display.h"
  36. #include "nouveau_fence.h"
  37. #include <subdev/bios/gpio.h>
  38. #include <subdev/gpio.h>
  39. #include <engine/disp.h>
  40. #include <core/class.h>
  41. static void
  42. nouveau_user_framebuffer_destroy(struct drm_framebuffer *drm_fb)
  43. {
  44. struct nouveau_framebuffer *fb = nouveau_framebuffer(drm_fb);
  45. if (fb->nvbo)
  46. drm_gem_object_unreference_unlocked(fb->nvbo->gem);
  47. drm_framebuffer_cleanup(drm_fb);
  48. kfree(fb);
  49. }
  50. static int
  51. nouveau_user_framebuffer_create_handle(struct drm_framebuffer *drm_fb,
  52. struct drm_file *file_priv,
  53. unsigned int *handle)
  54. {
  55. struct nouveau_framebuffer *fb = nouveau_framebuffer(drm_fb);
  56. return drm_gem_handle_create(file_priv, fb->nvbo->gem, handle);
  57. }
  58. static const struct drm_framebuffer_funcs nouveau_framebuffer_funcs = {
  59. .destroy = nouveau_user_framebuffer_destroy,
  60. .create_handle = nouveau_user_framebuffer_create_handle,
  61. };
  62. int
  63. nouveau_framebuffer_init(struct drm_device *dev,
  64. struct nouveau_framebuffer *nv_fb,
  65. struct drm_mode_fb_cmd2 *mode_cmd,
  66. struct nouveau_bo *nvbo)
  67. {
  68. struct nouveau_drm *drm = nouveau_drm(dev);
  69. struct drm_framebuffer *fb = &nv_fb->base;
  70. int ret;
  71. drm_helper_mode_fill_fb_struct(fb, mode_cmd);
  72. nv_fb->nvbo = nvbo;
  73. if (nv_device(drm->device)->card_type >= NV_50) {
  74. u32 tile_flags = nouveau_bo_tile_layout(nvbo);
  75. if (tile_flags == 0x7a00 ||
  76. tile_flags == 0xfe00)
  77. nv_fb->r_dma = NvEvoFB32;
  78. else
  79. if (tile_flags == 0x7000)
  80. nv_fb->r_dma = NvEvoFB16;
  81. else
  82. nv_fb->r_dma = NvEvoVRAM_LP;
  83. switch (fb->depth) {
  84. case 8: nv_fb->r_format = 0x1e00; break;
  85. case 15: nv_fb->r_format = 0xe900; break;
  86. case 16: nv_fb->r_format = 0xe800; break;
  87. case 24:
  88. case 32: nv_fb->r_format = 0xcf00; break;
  89. case 30: nv_fb->r_format = 0xd100; break;
  90. default:
  91. NV_ERROR(drm, "unknown depth %d\n", fb->depth);
  92. return -EINVAL;
  93. }
  94. if (nv_device(drm->device)->chipset == 0x50)
  95. nv_fb->r_format |= (tile_flags << 8);
  96. if (!tile_flags) {
  97. if (nv_device(drm->device)->card_type < NV_D0)
  98. nv_fb->r_pitch = 0x00100000 | fb->pitches[0];
  99. else
  100. nv_fb->r_pitch = 0x01000000 | fb->pitches[0];
  101. } else {
  102. u32 mode = nvbo->tile_mode;
  103. if (nv_device(drm->device)->card_type >= NV_C0)
  104. mode >>= 4;
  105. nv_fb->r_pitch = ((fb->pitches[0] / 4) << 4) | mode;
  106. }
  107. }
  108. ret = drm_framebuffer_init(dev, fb, &nouveau_framebuffer_funcs);
  109. if (ret) {
  110. return ret;
  111. }
  112. return 0;
  113. }
  114. static struct drm_framebuffer *
  115. nouveau_user_framebuffer_create(struct drm_device *dev,
  116. struct drm_file *file_priv,
  117. struct drm_mode_fb_cmd2 *mode_cmd)
  118. {
  119. struct nouveau_framebuffer *nouveau_fb;
  120. struct drm_gem_object *gem;
  121. int ret;
  122. gem = drm_gem_object_lookup(dev, file_priv, mode_cmd->handles[0]);
  123. if (!gem)
  124. return ERR_PTR(-ENOENT);
  125. nouveau_fb = kzalloc(sizeof(struct nouveau_framebuffer), GFP_KERNEL);
  126. if (!nouveau_fb)
  127. return ERR_PTR(-ENOMEM);
  128. ret = nouveau_framebuffer_init(dev, nouveau_fb, mode_cmd, nouveau_gem_object(gem));
  129. if (ret) {
  130. drm_gem_object_unreference(gem);
  131. return ERR_PTR(ret);
  132. }
  133. return &nouveau_fb->base;
  134. }
  135. static const struct drm_mode_config_funcs nouveau_mode_config_funcs = {
  136. .fb_create = nouveau_user_framebuffer_create,
  137. .output_poll_changed = nouveau_fbcon_output_poll_changed,
  138. };
  139. struct nouveau_drm_prop_enum_list {
  140. u8 gen_mask;
  141. int type;
  142. char *name;
  143. };
  144. static struct nouveau_drm_prop_enum_list underscan[] = {
  145. { 6, UNDERSCAN_AUTO, "auto" },
  146. { 6, UNDERSCAN_OFF, "off" },
  147. { 6, UNDERSCAN_ON, "on" },
  148. {}
  149. };
  150. static struct nouveau_drm_prop_enum_list dither_mode[] = {
  151. { 7, DITHERING_MODE_AUTO, "auto" },
  152. { 7, DITHERING_MODE_OFF, "off" },
  153. { 1, DITHERING_MODE_ON, "on" },
  154. { 6, DITHERING_MODE_STATIC2X2, "static 2x2" },
  155. { 6, DITHERING_MODE_DYNAMIC2X2, "dynamic 2x2" },
  156. { 4, DITHERING_MODE_TEMPORAL, "temporal" },
  157. {}
  158. };
  159. static struct nouveau_drm_prop_enum_list dither_depth[] = {
  160. { 6, DITHERING_DEPTH_AUTO, "auto" },
  161. { 6, DITHERING_DEPTH_6BPC, "6 bpc" },
  162. { 6, DITHERING_DEPTH_8BPC, "8 bpc" },
  163. {}
  164. };
  165. #define PROP_ENUM(p,gen,n,list) do { \
  166. struct nouveau_drm_prop_enum_list *l = (list); \
  167. int c = 0; \
  168. while (l->gen_mask) { \
  169. if (l->gen_mask & (1 << (gen))) \
  170. c++; \
  171. l++; \
  172. } \
  173. if (c) { \
  174. p = drm_property_create(dev, DRM_MODE_PROP_ENUM, n, c); \
  175. l = (list); \
  176. c = 0; \
  177. while (p && l->gen_mask) { \
  178. if (l->gen_mask & (1 << (gen))) { \
  179. drm_property_add_enum(p, c, l->type, l->name); \
  180. c++; \
  181. } \
  182. l++; \
  183. } \
  184. } \
  185. } while(0)
  186. int
  187. nouveau_display_init(struct drm_device *dev)
  188. {
  189. struct nouveau_drm *drm = nouveau_drm(dev);
  190. struct nouveau_display *disp = nouveau_display(dev);
  191. struct nouveau_gpio *gpio = nouveau_gpio(drm->device);
  192. struct drm_connector *connector;
  193. int ret;
  194. ret = disp->init(dev);
  195. if (ret)
  196. return ret;
  197. /* enable polling for external displays */
  198. drm_kms_helper_poll_enable(dev);
  199. /* enable hotplug interrupts */
  200. list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
  201. struct nouveau_connector *conn = nouveau_connector(connector);
  202. if (gpio && conn->hpd.func != DCB_GPIO_UNUSED) {
  203. nouveau_event_get(gpio->events, conn->hpd.line,
  204. &conn->hpd_func);
  205. }
  206. }
  207. return ret;
  208. }
  209. void
  210. nouveau_display_fini(struct drm_device *dev)
  211. {
  212. struct nouveau_drm *drm = nouveau_drm(dev);
  213. struct nouveau_display *disp = nouveau_display(dev);
  214. struct nouveau_gpio *gpio = nouveau_gpio(drm->device);
  215. struct drm_connector *connector;
  216. /* disable hotplug interrupts */
  217. list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
  218. struct nouveau_connector *conn = nouveau_connector(connector);
  219. if (gpio && conn->hpd.func != DCB_GPIO_UNUSED) {
  220. nouveau_event_put(gpio->events, conn->hpd.line,
  221. &conn->hpd_func);
  222. }
  223. }
  224. drm_kms_helper_poll_disable(dev);
  225. disp->fini(dev);
  226. }
  227. int
  228. nouveau_display_create(struct drm_device *dev)
  229. {
  230. struct nouveau_drm *drm = nouveau_drm(dev);
  231. struct nouveau_display *disp;
  232. u32 pclass = dev->pdev->class >> 8;
  233. int ret, gen;
  234. disp = drm->display = kzalloc(sizeof(*disp), GFP_KERNEL);
  235. if (!disp)
  236. return -ENOMEM;
  237. drm_mode_config_init(dev);
  238. drm_mode_create_scaling_mode_property(dev);
  239. drm_mode_create_dvi_i_properties(dev);
  240. if (nv_device(drm->device)->card_type < NV_50)
  241. gen = 0;
  242. else
  243. if (nv_device(drm->device)->card_type < NV_D0)
  244. gen = 1;
  245. else
  246. gen = 2;
  247. PROP_ENUM(disp->dithering_mode, gen, "dithering mode", dither_mode);
  248. PROP_ENUM(disp->dithering_depth, gen, "dithering depth", dither_depth);
  249. PROP_ENUM(disp->underscan_property, gen, "underscan", underscan);
  250. disp->underscan_hborder_property =
  251. drm_property_create_range(dev, 0, "underscan hborder", 0, 128);
  252. disp->underscan_vborder_property =
  253. drm_property_create_range(dev, 0, "underscan vborder", 0, 128);
  254. if (gen >= 1) {
  255. /* -90..+90 */
  256. disp->vibrant_hue_property =
  257. drm_property_create_range(dev, 0, "vibrant hue", 0, 180);
  258. /* -100..+100 */
  259. disp->color_vibrance_property =
  260. drm_property_create_range(dev, 0, "color vibrance", 0, 200);
  261. }
  262. dev->mode_config.funcs = &nouveau_mode_config_funcs;
  263. dev->mode_config.fb_base = pci_resource_start(dev->pdev, 1);
  264. dev->mode_config.min_width = 0;
  265. dev->mode_config.min_height = 0;
  266. if (nv_device(drm->device)->card_type < NV_10) {
  267. dev->mode_config.max_width = 2048;
  268. dev->mode_config.max_height = 2048;
  269. } else
  270. if (nv_device(drm->device)->card_type < NV_50) {
  271. dev->mode_config.max_width = 4096;
  272. dev->mode_config.max_height = 4096;
  273. } else {
  274. dev->mode_config.max_width = 8192;
  275. dev->mode_config.max_height = 8192;
  276. }
  277. dev->mode_config.preferred_depth = 24;
  278. dev->mode_config.prefer_shadow = 1;
  279. drm_kms_helper_poll_init(dev);
  280. drm_kms_helper_poll_disable(dev);
  281. if (nouveau_modeset == 1 ||
  282. (nouveau_modeset < 0 && pclass == PCI_CLASS_DISPLAY_VGA)) {
  283. if (nv_device(drm->device)->card_type < NV_50)
  284. ret = nv04_display_create(dev);
  285. else
  286. ret = nv50_display_create(dev);
  287. if (ret)
  288. goto disp_create_err;
  289. if (dev->mode_config.num_crtc) {
  290. ret = drm_vblank_init(dev, dev->mode_config.num_crtc);
  291. if (ret)
  292. goto vblank_err;
  293. }
  294. nouveau_backlight_init(dev);
  295. }
  296. return 0;
  297. vblank_err:
  298. disp->dtor(dev);
  299. disp_create_err:
  300. drm_kms_helper_poll_fini(dev);
  301. drm_mode_config_cleanup(dev);
  302. return ret;
  303. }
  304. void
  305. nouveau_display_destroy(struct drm_device *dev)
  306. {
  307. struct nouveau_display *disp = nouveau_display(dev);
  308. nouveau_backlight_exit(dev);
  309. drm_vblank_cleanup(dev);
  310. drm_kms_helper_poll_fini(dev);
  311. drm_mode_config_cleanup(dev);
  312. if (disp->dtor)
  313. disp->dtor(dev);
  314. nouveau_drm(dev)->display = NULL;
  315. kfree(disp);
  316. }
  317. int
  318. nouveau_display_suspend(struct drm_device *dev)
  319. {
  320. struct nouveau_drm *drm = nouveau_drm(dev);
  321. struct drm_crtc *crtc;
  322. nouveau_display_fini(dev);
  323. NV_INFO(drm, "unpinning framebuffer(s)...\n");
  324. list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
  325. struct nouveau_framebuffer *nouveau_fb;
  326. nouveau_fb = nouveau_framebuffer(crtc->fb);
  327. if (!nouveau_fb || !nouveau_fb->nvbo)
  328. continue;
  329. nouveau_bo_unpin(nouveau_fb->nvbo);
  330. }
  331. list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
  332. struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
  333. nouveau_bo_unmap(nv_crtc->cursor.nvbo);
  334. nouveau_bo_unpin(nv_crtc->cursor.nvbo);
  335. }
  336. return 0;
  337. }
  338. void
  339. nouveau_display_resume(struct drm_device *dev)
  340. {
  341. struct nouveau_drm *drm = nouveau_drm(dev);
  342. struct drm_crtc *crtc;
  343. int ret;
  344. list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
  345. struct nouveau_framebuffer *nouveau_fb;
  346. nouveau_fb = nouveau_framebuffer(crtc->fb);
  347. if (!nouveau_fb || !nouveau_fb->nvbo)
  348. continue;
  349. nouveau_bo_pin(nouveau_fb->nvbo, TTM_PL_FLAG_VRAM);
  350. }
  351. list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
  352. struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
  353. ret = nouveau_bo_pin(nv_crtc->cursor.nvbo, TTM_PL_FLAG_VRAM);
  354. if (!ret)
  355. ret = nouveau_bo_map(nv_crtc->cursor.nvbo);
  356. if (ret)
  357. NV_ERROR(drm, "Could not pin/map cursor.\n");
  358. }
  359. nouveau_fbcon_set_suspend(dev, 0);
  360. nouveau_fbcon_zfill_all(dev);
  361. nouveau_display_init(dev);
  362. /* Force CLUT to get re-loaded during modeset */
  363. list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
  364. struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
  365. nv_crtc->lut.depth = 0;
  366. }
  367. drm_helper_resume_force_mode(dev);
  368. list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
  369. struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
  370. u32 offset = nv_crtc->cursor.nvbo->bo.offset;
  371. nv_crtc->cursor.set_offset(nv_crtc, offset);
  372. nv_crtc->cursor.set_pos(nv_crtc, nv_crtc->cursor_saved_x,
  373. nv_crtc->cursor_saved_y);
  374. }
  375. }
  376. static int
  377. nouveau_page_flip_emit(struct nouveau_channel *chan,
  378. struct nouveau_bo *old_bo,
  379. struct nouveau_bo *new_bo,
  380. struct nouveau_page_flip_state *s,
  381. struct nouveau_fence **pfence)
  382. {
  383. struct nouveau_fence_chan *fctx = chan->fence;
  384. struct nouveau_drm *drm = chan->drm;
  385. struct drm_device *dev = drm->dev;
  386. unsigned long flags;
  387. int ret;
  388. /* Queue it to the pending list */
  389. spin_lock_irqsave(&dev->event_lock, flags);
  390. list_add_tail(&s->head, &fctx->flip);
  391. spin_unlock_irqrestore(&dev->event_lock, flags);
  392. /* Synchronize with the old framebuffer */
  393. ret = nouveau_fence_sync(old_bo->bo.sync_obj, chan);
  394. if (ret)
  395. goto fail;
  396. /* Emit the pageflip */
  397. ret = RING_SPACE(chan, 3);
  398. if (ret)
  399. goto fail;
  400. if (nv_device(drm->device)->card_type < NV_C0) {
  401. BEGIN_NV04(chan, NvSubSw, NV_SW_PAGE_FLIP, 1);
  402. OUT_RING (chan, 0x00000000);
  403. OUT_RING (chan, 0x00000000);
  404. } else {
  405. BEGIN_NVC0(chan, 0, NV10_SUBCHAN_REF_CNT, 1);
  406. OUT_RING (chan, 0);
  407. BEGIN_IMC0(chan, 0, NVSW_SUBCHAN_PAGE_FLIP, 0x0000);
  408. }
  409. FIRE_RING (chan);
  410. ret = nouveau_fence_new(chan, false, pfence);
  411. if (ret)
  412. goto fail;
  413. return 0;
  414. fail:
  415. spin_lock_irqsave(&dev->event_lock, flags);
  416. list_del(&s->head);
  417. spin_unlock_irqrestore(&dev->event_lock, flags);
  418. return ret;
  419. }
  420. int
  421. nouveau_crtc_page_flip(struct drm_crtc *crtc, struct drm_framebuffer *fb,
  422. struct drm_pending_vblank_event *event)
  423. {
  424. struct drm_device *dev = crtc->dev;
  425. struct nouveau_drm *drm = nouveau_drm(dev);
  426. struct nouveau_bo *old_bo = nouveau_framebuffer(crtc->fb)->nvbo;
  427. struct nouveau_bo *new_bo = nouveau_framebuffer(fb)->nvbo;
  428. struct nouveau_page_flip_state *s;
  429. struct nouveau_channel *chan = NULL;
  430. struct nouveau_fence *fence;
  431. struct list_head res;
  432. struct ttm_validate_buffer res_val[2];
  433. struct ww_acquire_ctx ticket;
  434. int ret;
  435. if (!drm->channel)
  436. return -ENODEV;
  437. s = kzalloc(sizeof(*s), GFP_KERNEL);
  438. if (!s)
  439. return -ENOMEM;
  440. /* Choose the channel the flip will be handled in */
  441. spin_lock(&old_bo->bo.bdev->fence_lock);
  442. fence = new_bo->bo.sync_obj;
  443. if (fence)
  444. chan = fence->channel;
  445. if (!chan)
  446. chan = drm->channel;
  447. spin_unlock(&old_bo->bo.bdev->fence_lock);
  448. mutex_lock(&chan->cli->mutex);
  449. if (new_bo != old_bo) {
  450. ret = nouveau_bo_pin(new_bo, TTM_PL_FLAG_VRAM);
  451. if (likely(!ret)) {
  452. res_val[0].bo = &old_bo->bo;
  453. res_val[1].bo = &new_bo->bo;
  454. INIT_LIST_HEAD(&res);
  455. list_add_tail(&res_val[0].head, &res);
  456. list_add_tail(&res_val[1].head, &res);
  457. ret = ttm_eu_reserve_buffers(&ticket, &res);
  458. if (ret)
  459. nouveau_bo_unpin(new_bo);
  460. }
  461. } else
  462. ret = ttm_bo_reserve(&new_bo->bo, false, false, false, 0);
  463. if (ret) {
  464. mutex_unlock(&chan->cli->mutex);
  465. goto fail_free;
  466. }
  467. /* Initialize a page flip struct */
  468. *s = (struct nouveau_page_flip_state)
  469. { { }, event, nouveau_crtc(crtc)->index,
  470. fb->bits_per_pixel, fb->pitches[0], crtc->x, crtc->y,
  471. new_bo->bo.offset };
  472. /* Emit a page flip */
  473. if (nv_device(drm->device)->card_type >= NV_50) {
  474. ret = nv50_display_flip_next(crtc, fb, chan, 0);
  475. if (ret) {
  476. mutex_unlock(&chan->cli->mutex);
  477. goto fail_unreserve;
  478. }
  479. }
  480. ret = nouveau_page_flip_emit(chan, old_bo, new_bo, s, &fence);
  481. mutex_unlock(&chan->cli->mutex);
  482. if (ret)
  483. goto fail_unreserve;
  484. /* Update the crtc struct and cleanup */
  485. crtc->fb = fb;
  486. if (old_bo != new_bo) {
  487. ttm_eu_fence_buffer_objects(&ticket, &res, fence);
  488. nouveau_bo_unpin(old_bo);
  489. } else {
  490. nouveau_bo_fence(new_bo, fence);
  491. ttm_bo_unreserve(&new_bo->bo);
  492. }
  493. nouveau_fence_unref(&fence);
  494. return 0;
  495. fail_unreserve:
  496. if (old_bo != new_bo) {
  497. ttm_eu_backoff_reservation(&ticket, &res);
  498. nouveau_bo_unpin(new_bo);
  499. } else
  500. ttm_bo_unreserve(&new_bo->bo);
  501. fail_free:
  502. kfree(s);
  503. return ret;
  504. }
  505. int
  506. nouveau_finish_page_flip(struct nouveau_channel *chan,
  507. struct nouveau_page_flip_state *ps)
  508. {
  509. struct nouveau_fence_chan *fctx = chan->fence;
  510. struct nouveau_drm *drm = chan->drm;
  511. struct drm_device *dev = drm->dev;
  512. struct nouveau_page_flip_state *s;
  513. unsigned long flags;
  514. spin_lock_irqsave(&dev->event_lock, flags);
  515. if (list_empty(&fctx->flip)) {
  516. NV_ERROR(drm, "unexpected pageflip\n");
  517. spin_unlock_irqrestore(&dev->event_lock, flags);
  518. return -EINVAL;
  519. }
  520. s = list_first_entry(&fctx->flip, struct nouveau_page_flip_state, head);
  521. if (s->event)
  522. drm_send_vblank_event(dev, -1, s->event);
  523. list_del(&s->head);
  524. if (ps)
  525. *ps = *s;
  526. kfree(s);
  527. spin_unlock_irqrestore(&dev->event_lock, flags);
  528. return 0;
  529. }
  530. int
  531. nouveau_flip_complete(void *data)
  532. {
  533. struct nouveau_channel *chan = data;
  534. struct nouveau_drm *drm = chan->drm;
  535. struct nouveau_page_flip_state state;
  536. if (!nouveau_finish_page_flip(chan, &state)) {
  537. if (nv_device(drm->device)->card_type < NV_50) {
  538. nv_set_crtc_base(drm->dev, state.crtc, state.offset +
  539. state.y * state.pitch +
  540. state.x * state.bpp / 8);
  541. }
  542. }
  543. return 0;
  544. }
  545. int
  546. nouveau_display_dumb_create(struct drm_file *file_priv, struct drm_device *dev,
  547. struct drm_mode_create_dumb *args)
  548. {
  549. struct nouveau_bo *bo;
  550. int ret;
  551. args->pitch = roundup(args->width * (args->bpp / 8), 256);
  552. args->size = args->pitch * args->height;
  553. args->size = roundup(args->size, PAGE_SIZE);
  554. ret = nouveau_gem_new(dev, args->size, 0, NOUVEAU_GEM_DOMAIN_VRAM, 0, 0, &bo);
  555. if (ret)
  556. return ret;
  557. ret = drm_gem_handle_create(file_priv, bo->gem, &args->handle);
  558. drm_gem_object_unreference_unlocked(bo->gem);
  559. return ret;
  560. }
  561. int
  562. nouveau_display_dumb_destroy(struct drm_file *file_priv, struct drm_device *dev,
  563. uint32_t handle)
  564. {
  565. return drm_gem_handle_delete(file_priv, handle);
  566. }
  567. int
  568. nouveau_display_dumb_map_offset(struct drm_file *file_priv,
  569. struct drm_device *dev,
  570. uint32_t handle, uint64_t *poffset)
  571. {
  572. struct drm_gem_object *gem;
  573. gem = drm_gem_object_lookup(dev, file_priv, handle);
  574. if (gem) {
  575. struct nouveau_bo *bo = gem->driver_private;
  576. *poffset = bo->bo.addr_space_offset;
  577. drm_gem_object_unreference_unlocked(gem);
  578. return 0;
  579. }
  580. return -ENOENT;
  581. }