rtc-x1205.c 14 KB

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  1. /*
  2. * An i2c driver for the Xicor/Intersil X1205 RTC
  3. * Copyright 2004 Karen Spearel
  4. * Copyright 2005 Alessandro Zummo
  5. *
  6. * please send all reports to:
  7. * Karen Spearel <kas111 at gmail dot com>
  8. * Alessandro Zummo <a.zummo@towertech.it>
  9. *
  10. * based on a lot of other RTC drivers.
  11. *
  12. * Information and datasheet:
  13. * http://www.intersil.com/cda/deviceinfo/0,1477,X1205,00.html
  14. *
  15. * This program is free software; you can redistribute it and/or modify
  16. * it under the terms of the GNU General Public License version 2 as
  17. * published by the Free Software Foundation.
  18. */
  19. #include <linux/i2c.h>
  20. #include <linux/bcd.h>
  21. #include <linux/rtc.h>
  22. #include <linux/delay.h>
  23. #define DRV_VERSION "1.0.8"
  24. /* offsets into CCR area */
  25. #define CCR_SEC 0
  26. #define CCR_MIN 1
  27. #define CCR_HOUR 2
  28. #define CCR_MDAY 3
  29. #define CCR_MONTH 4
  30. #define CCR_YEAR 5
  31. #define CCR_WDAY 6
  32. #define CCR_Y2K 7
  33. #define X1205_REG_SR 0x3F /* status register */
  34. #define X1205_REG_Y2K 0x37
  35. #define X1205_REG_DW 0x36
  36. #define X1205_REG_YR 0x35
  37. #define X1205_REG_MO 0x34
  38. #define X1205_REG_DT 0x33
  39. #define X1205_REG_HR 0x32
  40. #define X1205_REG_MN 0x31
  41. #define X1205_REG_SC 0x30
  42. #define X1205_REG_DTR 0x13
  43. #define X1205_REG_ATR 0x12
  44. #define X1205_REG_INT 0x11
  45. #define X1205_REG_0 0x10
  46. #define X1205_REG_Y2K1 0x0F
  47. #define X1205_REG_DWA1 0x0E
  48. #define X1205_REG_YRA1 0x0D
  49. #define X1205_REG_MOA1 0x0C
  50. #define X1205_REG_DTA1 0x0B
  51. #define X1205_REG_HRA1 0x0A
  52. #define X1205_REG_MNA1 0x09
  53. #define X1205_REG_SCA1 0x08
  54. #define X1205_REG_Y2K0 0x07
  55. #define X1205_REG_DWA0 0x06
  56. #define X1205_REG_YRA0 0x05
  57. #define X1205_REG_MOA0 0x04
  58. #define X1205_REG_DTA0 0x03
  59. #define X1205_REG_HRA0 0x02
  60. #define X1205_REG_MNA0 0x01
  61. #define X1205_REG_SCA0 0x00
  62. #define X1205_CCR_BASE 0x30 /* Base address of CCR */
  63. #define X1205_ALM0_BASE 0x00 /* Base address of ALARM0 */
  64. #define X1205_SR_RTCF 0x01 /* Clock failure */
  65. #define X1205_SR_WEL 0x02 /* Write Enable Latch */
  66. #define X1205_SR_RWEL 0x04 /* Register Write Enable */
  67. #define X1205_DTR_DTR0 0x01
  68. #define X1205_DTR_DTR1 0x02
  69. #define X1205_DTR_DTR2 0x04
  70. #define X1205_HR_MIL 0x80 /* Set in ccr.hour for 24 hr mode */
  71. static struct i2c_driver x1205_driver;
  72. /*
  73. * In the routines that deal directly with the x1205 hardware, we use
  74. * rtc_time -- month 0-11, hour 0-23, yr = calendar year-epoch
  75. * Epoch is initialized as 2000. Time is set to UTC.
  76. */
  77. static int x1205_get_datetime(struct i2c_client *client, struct rtc_time *tm,
  78. unsigned char reg_base)
  79. {
  80. unsigned char dt_addr[2] = { 0, reg_base };
  81. unsigned char buf[8];
  82. struct i2c_msg msgs[] = {
  83. { client->addr, 0, 2, dt_addr }, /* setup read ptr */
  84. { client->addr, I2C_M_RD, 8, buf }, /* read date */
  85. };
  86. /* read date registers */
  87. if ((i2c_transfer(client->adapter, &msgs[0], 2)) != 2) {
  88. dev_err(&client->dev, "%s: read error\n", __func__);
  89. return -EIO;
  90. }
  91. dev_dbg(&client->dev,
  92. "%s: raw read data - sec=%02x, min=%02x, hr=%02x, "
  93. "mday=%02x, mon=%02x, year=%02x, wday=%02x, y2k=%02x\n",
  94. __func__,
  95. buf[0], buf[1], buf[2], buf[3],
  96. buf[4], buf[5], buf[6], buf[7]);
  97. tm->tm_sec = BCD2BIN(buf[CCR_SEC]);
  98. tm->tm_min = BCD2BIN(buf[CCR_MIN]);
  99. tm->tm_hour = BCD2BIN(buf[CCR_HOUR] & 0x3F); /* hr is 0-23 */
  100. tm->tm_mday = BCD2BIN(buf[CCR_MDAY]);
  101. tm->tm_mon = BCD2BIN(buf[CCR_MONTH]) - 1; /* mon is 0-11 */
  102. tm->tm_year = BCD2BIN(buf[CCR_YEAR])
  103. + (BCD2BIN(buf[CCR_Y2K]) * 100) - 1900;
  104. tm->tm_wday = buf[CCR_WDAY];
  105. dev_dbg(&client->dev, "%s: tm is secs=%d, mins=%d, hours=%d, "
  106. "mday=%d, mon=%d, year=%d, wday=%d\n",
  107. __func__,
  108. tm->tm_sec, tm->tm_min, tm->tm_hour,
  109. tm->tm_mday, tm->tm_mon, tm->tm_year, tm->tm_wday);
  110. return 0;
  111. }
  112. static int x1205_get_status(struct i2c_client *client, unsigned char *sr)
  113. {
  114. static unsigned char sr_addr[2] = { 0, X1205_REG_SR };
  115. struct i2c_msg msgs[] = {
  116. { client->addr, 0, 2, sr_addr }, /* setup read ptr */
  117. { client->addr, I2C_M_RD, 1, sr }, /* read status */
  118. };
  119. /* read status register */
  120. if ((i2c_transfer(client->adapter, &msgs[0], 2)) != 2) {
  121. dev_err(&client->dev, "%s: read error\n", __func__);
  122. return -EIO;
  123. }
  124. return 0;
  125. }
  126. static int x1205_set_datetime(struct i2c_client *client, struct rtc_time *tm,
  127. int datetoo, u8 reg_base)
  128. {
  129. int i, xfer;
  130. unsigned char buf[8];
  131. static const unsigned char wel[3] = { 0, X1205_REG_SR,
  132. X1205_SR_WEL };
  133. static const unsigned char rwel[3] = { 0, X1205_REG_SR,
  134. X1205_SR_WEL | X1205_SR_RWEL };
  135. static const unsigned char diswe[3] = { 0, X1205_REG_SR, 0 };
  136. dev_dbg(&client->dev,
  137. "%s: secs=%d, mins=%d, hours=%d\n",
  138. __func__,
  139. tm->tm_sec, tm->tm_min, tm->tm_hour);
  140. buf[CCR_SEC] = BIN2BCD(tm->tm_sec);
  141. buf[CCR_MIN] = BIN2BCD(tm->tm_min);
  142. /* set hour and 24hr bit */
  143. buf[CCR_HOUR] = BIN2BCD(tm->tm_hour) | X1205_HR_MIL;
  144. /* should we also set the date? */
  145. if (datetoo) {
  146. dev_dbg(&client->dev,
  147. "%s: mday=%d, mon=%d, year=%d, wday=%d\n",
  148. __func__,
  149. tm->tm_mday, tm->tm_mon, tm->tm_year, tm->tm_wday);
  150. buf[CCR_MDAY] = BIN2BCD(tm->tm_mday);
  151. /* month, 1 - 12 */
  152. buf[CCR_MONTH] = BIN2BCD(tm->tm_mon + 1);
  153. /* year, since the rtc epoch*/
  154. buf[CCR_YEAR] = BIN2BCD(tm->tm_year % 100);
  155. buf[CCR_WDAY] = tm->tm_wday & 0x07;
  156. buf[CCR_Y2K] = BIN2BCD(tm->tm_year / 100);
  157. }
  158. /* this sequence is required to unlock the chip */
  159. if ((xfer = i2c_master_send(client, wel, 3)) != 3) {
  160. dev_err(&client->dev, "%s: wel - %d\n", __func__, xfer);
  161. return -EIO;
  162. }
  163. if ((xfer = i2c_master_send(client, rwel, 3)) != 3) {
  164. dev_err(&client->dev, "%s: rwel - %d\n", __func__, xfer);
  165. return -EIO;
  166. }
  167. /* write register's data */
  168. for (i = 0; i < (datetoo ? 8 : 3); i++) {
  169. unsigned char rdata[3] = { 0, reg_base + i, buf[i] };
  170. xfer = i2c_master_send(client, rdata, 3);
  171. if (xfer != 3) {
  172. dev_err(&client->dev,
  173. "%s: xfer=%d addr=%02x, data=%02x\n",
  174. __func__,
  175. xfer, rdata[1], rdata[2]);
  176. return -EIO;
  177. }
  178. };
  179. /* disable further writes */
  180. if ((xfer = i2c_master_send(client, diswe, 3)) != 3) {
  181. dev_err(&client->dev, "%s: diswe - %d\n", __func__, xfer);
  182. return -EIO;
  183. }
  184. return 0;
  185. }
  186. static int x1205_fix_osc(struct i2c_client *client)
  187. {
  188. int err;
  189. struct rtc_time tm;
  190. tm.tm_hour = tm.tm_min = tm.tm_sec = 0;
  191. if ((err = x1205_set_datetime(client, &tm, 0, X1205_CCR_BASE)) < 0)
  192. dev_err(&client->dev,
  193. "unable to restart the oscillator\n");
  194. return err;
  195. }
  196. static int x1205_get_dtrim(struct i2c_client *client, int *trim)
  197. {
  198. unsigned char dtr;
  199. static unsigned char dtr_addr[2] = { 0, X1205_REG_DTR };
  200. struct i2c_msg msgs[] = {
  201. { client->addr, 0, 2, dtr_addr }, /* setup read ptr */
  202. { client->addr, I2C_M_RD, 1, &dtr }, /* read dtr */
  203. };
  204. /* read dtr register */
  205. if ((i2c_transfer(client->adapter, &msgs[0], 2)) != 2) {
  206. dev_err(&client->dev, "%s: read error\n", __func__);
  207. return -EIO;
  208. }
  209. dev_dbg(&client->dev, "%s: raw dtr=%x\n", __func__, dtr);
  210. *trim = 0;
  211. if (dtr & X1205_DTR_DTR0)
  212. *trim += 20;
  213. if (dtr & X1205_DTR_DTR1)
  214. *trim += 10;
  215. if (dtr & X1205_DTR_DTR2)
  216. *trim = -*trim;
  217. return 0;
  218. }
  219. static int x1205_get_atrim(struct i2c_client *client, int *trim)
  220. {
  221. s8 atr;
  222. static unsigned char atr_addr[2] = { 0, X1205_REG_ATR };
  223. struct i2c_msg msgs[] = {
  224. { client->addr, 0, 2, atr_addr }, /* setup read ptr */
  225. { client->addr, I2C_M_RD, 1, &atr }, /* read atr */
  226. };
  227. /* read atr register */
  228. if ((i2c_transfer(client->adapter, &msgs[0], 2)) != 2) {
  229. dev_err(&client->dev, "%s: read error\n", __func__);
  230. return -EIO;
  231. }
  232. dev_dbg(&client->dev, "%s: raw atr=%x\n", __func__, atr);
  233. /* atr is a two's complement value on 6 bits,
  234. * perform sign extension. The formula is
  235. * Catr = (atr * 0.25pF) + 11.00pF.
  236. */
  237. if (atr & 0x20)
  238. atr |= 0xC0;
  239. dev_dbg(&client->dev, "%s: raw atr=%x (%d)\n", __func__, atr, atr);
  240. *trim = (atr * 250) + 11000;
  241. dev_dbg(&client->dev, "%s: real=%d\n", __func__, *trim);
  242. return 0;
  243. }
  244. struct x1205_limit
  245. {
  246. unsigned char reg, mask, min, max;
  247. };
  248. static int x1205_validate_client(struct i2c_client *client)
  249. {
  250. int i, xfer;
  251. /* Probe array. We will read the register at the specified
  252. * address and check if the given bits are zero.
  253. */
  254. static const unsigned char probe_zero_pattern[] = {
  255. /* register, mask */
  256. X1205_REG_SR, 0x18,
  257. X1205_REG_DTR, 0xF8,
  258. X1205_REG_ATR, 0xC0,
  259. X1205_REG_INT, 0x18,
  260. X1205_REG_0, 0xFF,
  261. };
  262. static const struct x1205_limit probe_limits_pattern[] = {
  263. /* register, mask, min, max */
  264. { X1205_REG_Y2K, 0xFF, 19, 20 },
  265. { X1205_REG_DW, 0xFF, 0, 6 },
  266. { X1205_REG_YR, 0xFF, 0, 99 },
  267. { X1205_REG_MO, 0xFF, 0, 12 },
  268. { X1205_REG_DT, 0xFF, 0, 31 },
  269. { X1205_REG_HR, 0x7F, 0, 23 },
  270. { X1205_REG_MN, 0xFF, 0, 59 },
  271. { X1205_REG_SC, 0xFF, 0, 59 },
  272. { X1205_REG_Y2K1, 0xFF, 19, 20 },
  273. { X1205_REG_Y2K0, 0xFF, 19, 20 },
  274. };
  275. /* check that registers have bits a 0 where expected */
  276. for (i = 0; i < ARRAY_SIZE(probe_zero_pattern); i += 2) {
  277. unsigned char buf;
  278. unsigned char addr[2] = { 0, probe_zero_pattern[i] };
  279. struct i2c_msg msgs[2] = {
  280. { client->addr, 0, 2, addr },
  281. { client->addr, I2C_M_RD, 1, &buf },
  282. };
  283. if ((xfer = i2c_transfer(client->adapter, msgs, 2)) != 2) {
  284. dev_err(&client->dev,
  285. "%s: could not read register %x\n",
  286. __func__, probe_zero_pattern[i]);
  287. return -EIO;
  288. }
  289. if ((buf & probe_zero_pattern[i+1]) != 0) {
  290. dev_err(&client->dev,
  291. "%s: register=%02x, zero pattern=%d, value=%x\n",
  292. __func__, probe_zero_pattern[i], i, buf);
  293. return -ENODEV;
  294. }
  295. }
  296. /* check limits (only registers with bcd values) */
  297. for (i = 0; i < ARRAY_SIZE(probe_limits_pattern); i++) {
  298. unsigned char reg, value;
  299. unsigned char addr[2] = { 0, probe_limits_pattern[i].reg };
  300. struct i2c_msg msgs[2] = {
  301. { client->addr, 0, 2, addr },
  302. { client->addr, I2C_M_RD, 1, &reg },
  303. };
  304. if ((xfer = i2c_transfer(client->adapter, msgs, 2)) != 2) {
  305. dev_err(&client->dev,
  306. "%s: could not read register %x\n",
  307. __func__, probe_limits_pattern[i].reg);
  308. return -EIO;
  309. }
  310. value = BCD2BIN(reg & probe_limits_pattern[i].mask);
  311. if (value > probe_limits_pattern[i].max ||
  312. value < probe_limits_pattern[i].min) {
  313. dev_dbg(&client->dev,
  314. "%s: register=%x, lim pattern=%d, value=%d\n",
  315. __func__, probe_limits_pattern[i].reg,
  316. i, value);
  317. return -ENODEV;
  318. }
  319. }
  320. return 0;
  321. }
  322. static int x1205_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
  323. {
  324. return x1205_get_datetime(to_i2c_client(dev),
  325. &alrm->time, X1205_ALM0_BASE);
  326. }
  327. static int x1205_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
  328. {
  329. return x1205_set_datetime(to_i2c_client(dev),
  330. &alrm->time, 1, X1205_ALM0_BASE);
  331. }
  332. static int x1205_rtc_read_time(struct device *dev, struct rtc_time *tm)
  333. {
  334. return x1205_get_datetime(to_i2c_client(dev),
  335. tm, X1205_CCR_BASE);
  336. }
  337. static int x1205_rtc_set_time(struct device *dev, struct rtc_time *tm)
  338. {
  339. return x1205_set_datetime(to_i2c_client(dev),
  340. tm, 1, X1205_CCR_BASE);
  341. }
  342. static int x1205_rtc_proc(struct device *dev, struct seq_file *seq)
  343. {
  344. int err, dtrim, atrim;
  345. if ((err = x1205_get_dtrim(to_i2c_client(dev), &dtrim)) == 0)
  346. seq_printf(seq, "digital_trim\t: %d ppm\n", dtrim);
  347. if ((err = x1205_get_atrim(to_i2c_client(dev), &atrim)) == 0)
  348. seq_printf(seq, "analog_trim\t: %d.%02d pF\n",
  349. atrim / 1000, atrim % 1000);
  350. return 0;
  351. }
  352. static const struct rtc_class_ops x1205_rtc_ops = {
  353. .proc = x1205_rtc_proc,
  354. .read_time = x1205_rtc_read_time,
  355. .set_time = x1205_rtc_set_time,
  356. .read_alarm = x1205_rtc_read_alarm,
  357. .set_alarm = x1205_rtc_set_alarm,
  358. };
  359. static ssize_t x1205_sysfs_show_atrim(struct device *dev,
  360. struct device_attribute *attr, char *buf)
  361. {
  362. int err, atrim;
  363. err = x1205_get_atrim(to_i2c_client(dev), &atrim);
  364. if (err)
  365. return err;
  366. return sprintf(buf, "%d.%02d pF\n", atrim / 1000, atrim % 1000);
  367. }
  368. static DEVICE_ATTR(atrim, S_IRUGO, x1205_sysfs_show_atrim, NULL);
  369. static ssize_t x1205_sysfs_show_dtrim(struct device *dev,
  370. struct device_attribute *attr, char *buf)
  371. {
  372. int err, dtrim;
  373. err = x1205_get_dtrim(to_i2c_client(dev), &dtrim);
  374. if (err)
  375. return err;
  376. return sprintf(buf, "%d ppm\n", dtrim);
  377. }
  378. static DEVICE_ATTR(dtrim, S_IRUGO, x1205_sysfs_show_dtrim, NULL);
  379. static int x1205_sysfs_register(struct device *dev)
  380. {
  381. int err;
  382. err = device_create_file(dev, &dev_attr_atrim);
  383. if (err)
  384. return err;
  385. err = device_create_file(dev, &dev_attr_dtrim);
  386. if (err)
  387. device_remove_file(dev, &dev_attr_atrim);
  388. return err;
  389. }
  390. static void x1205_sysfs_unregister(struct device *dev)
  391. {
  392. device_remove_file(dev, &dev_attr_atrim);
  393. device_remove_file(dev, &dev_attr_dtrim);
  394. }
  395. static int x1205_probe(struct i2c_client *client,
  396. const struct i2c_device_id *id)
  397. {
  398. int err = 0;
  399. unsigned char sr;
  400. struct rtc_device *rtc;
  401. dev_dbg(&client->dev, "%s\n", __func__);
  402. if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C))
  403. return -ENODEV;
  404. if (x1205_validate_client(client) < 0)
  405. return -ENODEV;
  406. dev_info(&client->dev, "chip found, driver version " DRV_VERSION "\n");
  407. rtc = rtc_device_register(x1205_driver.driver.name, &client->dev,
  408. &x1205_rtc_ops, THIS_MODULE);
  409. if (IS_ERR(rtc))
  410. return PTR_ERR(rtc);
  411. i2c_set_clientdata(client, rtc);
  412. /* Check for power failures and eventualy enable the osc */
  413. if ((err = x1205_get_status(client, &sr)) == 0) {
  414. if (sr & X1205_SR_RTCF) {
  415. dev_err(&client->dev,
  416. "power failure detected, "
  417. "please set the clock\n");
  418. udelay(50);
  419. x1205_fix_osc(client);
  420. }
  421. }
  422. else
  423. dev_err(&client->dev, "couldn't read status\n");
  424. err = x1205_sysfs_register(&client->dev);
  425. if (err)
  426. goto exit_devreg;
  427. return 0;
  428. exit_devreg:
  429. rtc_device_unregister(rtc);
  430. return err;
  431. }
  432. static int x1205_remove(struct i2c_client *client)
  433. {
  434. struct rtc_device *rtc = i2c_get_clientdata(client);
  435. rtc_device_unregister(rtc);
  436. x1205_sysfs_unregister(&client->dev);
  437. return 0;
  438. }
  439. static const struct i2c_device_id x1205_id[] = {
  440. { "x1205", 0 },
  441. { }
  442. };
  443. MODULE_DEVICE_TABLE(i2c, x1205_id);
  444. static struct i2c_driver x1205_driver = {
  445. .driver = {
  446. .name = "rtc-x1205",
  447. },
  448. .probe = x1205_probe,
  449. .remove = x1205_remove,
  450. .id_table = x1205_id,
  451. };
  452. static int __init x1205_init(void)
  453. {
  454. return i2c_add_driver(&x1205_driver);
  455. }
  456. static void __exit x1205_exit(void)
  457. {
  458. i2c_del_driver(&x1205_driver);
  459. }
  460. MODULE_AUTHOR(
  461. "Karen Spearel <kas111 at gmail dot com>, "
  462. "Alessandro Zummo <a.zummo@towertech.it>");
  463. MODULE_DESCRIPTION("Xicor/Intersil X1205 RTC driver");
  464. MODULE_LICENSE("GPL");
  465. MODULE_VERSION(DRV_VERSION);
  466. module_init(x1205_init);
  467. module_exit(x1205_exit);