rtc-cmos.c 25 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976
  1. /*
  2. * RTC class driver for "CMOS RTC": PCs, ACPI, etc
  3. *
  4. * Copyright (C) 1996 Paul Gortmaker (drivers/char/rtc.c)
  5. * Copyright (C) 2006 David Brownell (convert to new framework)
  6. *
  7. * This program is free software; you can redistribute it and/or
  8. * modify it under the terms of the GNU General Public License
  9. * as published by the Free Software Foundation; either version
  10. * 2 of the License, or (at your option) any later version.
  11. */
  12. /*
  13. * The original "cmos clock" chip was an MC146818 chip, now obsolete.
  14. * That defined the register interface now provided by all PCs, some
  15. * non-PC systems, and incorporated into ACPI. Modern PC chipsets
  16. * integrate an MC146818 clone in their southbridge, and boards use
  17. * that instead of discrete clones like the DS12887 or M48T86. There
  18. * are also clones that connect using the LPC bus.
  19. *
  20. * That register API is also used directly by various other drivers
  21. * (notably for integrated NVRAM), infrastructure (x86 has code to
  22. * bypass the RTC framework, directly reading the RTC during boot
  23. * and updating minutes/seconds for systems using NTP synch) and
  24. * utilities (like userspace 'hwclock', if no /dev node exists).
  25. *
  26. * So **ALL** calls to CMOS_READ and CMOS_WRITE must be done with
  27. * interrupts disabled, holding the global rtc_lock, to exclude those
  28. * other drivers and utilities on correctly configured systems.
  29. */
  30. #include <linux/kernel.h>
  31. #include <linux/module.h>
  32. #include <linux/init.h>
  33. #include <linux/interrupt.h>
  34. #include <linux/spinlock.h>
  35. #include <linux/platform_device.h>
  36. #include <linux/mod_devicetable.h>
  37. #ifdef CONFIG_HPET_EMULATE_RTC
  38. #include <asm/hpet.h>
  39. #endif
  40. /* this is for "generic access to PC-style RTC" using CMOS_READ/CMOS_WRITE */
  41. #include <asm-generic/rtc.h>
  42. #ifndef CONFIG_HPET_EMULATE_RTC
  43. #define is_hpet_enabled() 0
  44. #define hpet_set_alarm_time(hrs, min, sec) do { } while (0)
  45. #define hpet_set_periodic_freq(arg) 0
  46. #define hpet_mask_rtc_irq_bit(arg) do { } while (0)
  47. #define hpet_set_rtc_irq_bit(arg) do { } while (0)
  48. #define hpet_rtc_timer_init() do { } while (0)
  49. #define hpet_register_irq_handler(h) 0
  50. #define hpet_unregister_irq_handler(h) do { } while (0)
  51. extern irqreturn_t hpet_rtc_interrupt(int irq, void *dev_id);
  52. #endif
  53. struct cmos_rtc {
  54. struct rtc_device *rtc;
  55. struct device *dev;
  56. int irq;
  57. struct resource *iomem;
  58. void (*wake_on)(struct device *);
  59. void (*wake_off)(struct device *);
  60. u8 enabled_wake;
  61. u8 suspend_ctrl;
  62. /* newer hardware extends the original register set */
  63. u8 day_alrm;
  64. u8 mon_alrm;
  65. u8 century;
  66. };
  67. /* both platform and pnp busses use negative numbers for invalid irqs */
  68. #define is_valid_irq(n) ((n) >= 0)
  69. static const char driver_name[] = "rtc_cmos";
  70. /* The RTC_INTR register may have e.g. RTC_PF set even if RTC_PIE is clear;
  71. * always mask it against the irq enable bits in RTC_CONTROL. Bit values
  72. * are the same: PF==PIE, AF=AIE, UF=UIE; so RTC_IRQMASK works with both.
  73. */
  74. #define RTC_IRQMASK (RTC_PF | RTC_AF | RTC_UF)
  75. static inline int is_intr(u8 rtc_intr)
  76. {
  77. if (!(rtc_intr & RTC_IRQF))
  78. return 0;
  79. return rtc_intr & RTC_IRQMASK;
  80. }
  81. /*----------------------------------------------------------------*/
  82. static int cmos_read_time(struct device *dev, struct rtc_time *t)
  83. {
  84. /* REVISIT: if the clock has a "century" register, use
  85. * that instead of the heuristic in get_rtc_time().
  86. * That'll make Y3K compatility (year > 2070) easy!
  87. */
  88. get_rtc_time(t);
  89. return 0;
  90. }
  91. static int cmos_set_time(struct device *dev, struct rtc_time *t)
  92. {
  93. /* REVISIT: set the "century" register if available
  94. *
  95. * NOTE: this ignores the issue whereby updating the seconds
  96. * takes effect exactly 500ms after we write the register.
  97. * (Also queueing and other delays before we get this far.)
  98. */
  99. return set_rtc_time(t);
  100. }
  101. static int cmos_read_alarm(struct device *dev, struct rtc_wkalrm *t)
  102. {
  103. struct cmos_rtc *cmos = dev_get_drvdata(dev);
  104. unsigned char rtc_control;
  105. if (!is_valid_irq(cmos->irq))
  106. return -EIO;
  107. /* Basic alarms only support hour, minute, and seconds fields.
  108. * Some also support day and month, for alarms up to a year in
  109. * the future.
  110. */
  111. t->time.tm_mday = -1;
  112. t->time.tm_mon = -1;
  113. spin_lock_irq(&rtc_lock);
  114. t->time.tm_sec = CMOS_READ(RTC_SECONDS_ALARM);
  115. t->time.tm_min = CMOS_READ(RTC_MINUTES_ALARM);
  116. t->time.tm_hour = CMOS_READ(RTC_HOURS_ALARM);
  117. if (cmos->day_alrm) {
  118. /* ignore upper bits on readback per ACPI spec */
  119. t->time.tm_mday = CMOS_READ(cmos->day_alrm) & 0x3f;
  120. if (!t->time.tm_mday)
  121. t->time.tm_mday = -1;
  122. if (cmos->mon_alrm) {
  123. t->time.tm_mon = CMOS_READ(cmos->mon_alrm);
  124. if (!t->time.tm_mon)
  125. t->time.tm_mon = -1;
  126. }
  127. }
  128. rtc_control = CMOS_READ(RTC_CONTROL);
  129. spin_unlock_irq(&rtc_lock);
  130. /* REVISIT this assumes PC style usage: always BCD */
  131. if (((unsigned)t->time.tm_sec) < 0x60)
  132. t->time.tm_sec = BCD2BIN(t->time.tm_sec);
  133. else
  134. t->time.tm_sec = -1;
  135. if (((unsigned)t->time.tm_min) < 0x60)
  136. t->time.tm_min = BCD2BIN(t->time.tm_min);
  137. else
  138. t->time.tm_min = -1;
  139. if (((unsigned)t->time.tm_hour) < 0x24)
  140. t->time.tm_hour = BCD2BIN(t->time.tm_hour);
  141. else
  142. t->time.tm_hour = -1;
  143. if (cmos->day_alrm) {
  144. if (((unsigned)t->time.tm_mday) <= 0x31)
  145. t->time.tm_mday = BCD2BIN(t->time.tm_mday);
  146. else
  147. t->time.tm_mday = -1;
  148. if (cmos->mon_alrm) {
  149. if (((unsigned)t->time.tm_mon) <= 0x12)
  150. t->time.tm_mon = BCD2BIN(t->time.tm_mon) - 1;
  151. else
  152. t->time.tm_mon = -1;
  153. }
  154. }
  155. t->time.tm_year = -1;
  156. t->enabled = !!(rtc_control & RTC_AIE);
  157. t->pending = 0;
  158. return 0;
  159. }
  160. static int cmos_set_alarm(struct device *dev, struct rtc_wkalrm *t)
  161. {
  162. struct cmos_rtc *cmos = dev_get_drvdata(dev);
  163. unsigned char mon, mday, hrs, min, sec;
  164. unsigned char rtc_control, rtc_intr;
  165. if (!is_valid_irq(cmos->irq))
  166. return -EIO;
  167. /* REVISIT this assumes PC style usage: always BCD */
  168. /* Writing 0xff means "don't care" or "match all". */
  169. mon = t->time.tm_mon + 1;
  170. mon = (mon <= 12) ? BIN2BCD(mon) : 0xff;
  171. mday = t->time.tm_mday;
  172. mday = (mday >= 1 && mday <= 31) ? BIN2BCD(mday) : 0xff;
  173. hrs = t->time.tm_hour;
  174. hrs = (hrs < 24) ? BIN2BCD(hrs) : 0xff;
  175. min = t->time.tm_min;
  176. min = (min < 60) ? BIN2BCD(min) : 0xff;
  177. sec = t->time.tm_sec;
  178. sec = (sec < 60) ? BIN2BCD(sec) : 0xff;
  179. hpet_set_alarm_time(t->time.tm_hour, t->time.tm_min, t->time.tm_sec);
  180. spin_lock_irq(&rtc_lock);
  181. /* next rtc irq must not be from previous alarm setting */
  182. rtc_control = CMOS_READ(RTC_CONTROL);
  183. rtc_control &= ~RTC_AIE;
  184. CMOS_WRITE(rtc_control, RTC_CONTROL);
  185. rtc_intr = CMOS_READ(RTC_INTR_FLAGS);
  186. rtc_intr &= (rtc_control & RTC_IRQMASK) | RTC_IRQF;
  187. if (is_intr(rtc_intr))
  188. rtc_update_irq(cmos->rtc, 1, rtc_intr);
  189. /* update alarm */
  190. CMOS_WRITE(hrs, RTC_HOURS_ALARM);
  191. CMOS_WRITE(min, RTC_MINUTES_ALARM);
  192. CMOS_WRITE(sec, RTC_SECONDS_ALARM);
  193. /* the system may support an "enhanced" alarm */
  194. if (cmos->day_alrm) {
  195. CMOS_WRITE(mday, cmos->day_alrm);
  196. if (cmos->mon_alrm)
  197. CMOS_WRITE(mon, cmos->mon_alrm);
  198. }
  199. if (t->enabled) {
  200. rtc_control |= RTC_AIE;
  201. CMOS_WRITE(rtc_control, RTC_CONTROL);
  202. rtc_intr = CMOS_READ(RTC_INTR_FLAGS);
  203. rtc_intr &= (rtc_control & RTC_IRQMASK) | RTC_IRQF;
  204. if (is_intr(rtc_intr))
  205. rtc_update_irq(cmos->rtc, 1, rtc_intr);
  206. }
  207. spin_unlock_irq(&rtc_lock);
  208. return 0;
  209. }
  210. static int cmos_irq_set_freq(struct device *dev, int freq)
  211. {
  212. struct cmos_rtc *cmos = dev_get_drvdata(dev);
  213. int f;
  214. unsigned long flags;
  215. if (!is_valid_irq(cmos->irq))
  216. return -ENXIO;
  217. /* 0 = no irqs; 1 = 2^15 Hz ... 15 = 2^0 Hz */
  218. f = ffs(freq);
  219. if (f-- > 16)
  220. return -EINVAL;
  221. f = 16 - f;
  222. spin_lock_irqsave(&rtc_lock, flags);
  223. if (!hpet_set_periodic_freq(freq))
  224. CMOS_WRITE(RTC_REF_CLCK_32KHZ | f, RTC_FREQ_SELECT);
  225. spin_unlock_irqrestore(&rtc_lock, flags);
  226. return 0;
  227. }
  228. static int cmos_irq_set_state(struct device *dev, int enabled)
  229. {
  230. struct cmos_rtc *cmos = dev_get_drvdata(dev);
  231. unsigned char rtc_control, rtc_intr;
  232. unsigned long flags;
  233. if (!is_valid_irq(cmos->irq))
  234. return -ENXIO;
  235. spin_lock_irqsave(&rtc_lock, flags);
  236. rtc_control = CMOS_READ(RTC_CONTROL);
  237. if (enabled)
  238. rtc_control |= RTC_PIE;
  239. else
  240. rtc_control &= ~RTC_PIE;
  241. CMOS_WRITE(rtc_control, RTC_CONTROL);
  242. rtc_intr = CMOS_READ(RTC_INTR_FLAGS);
  243. rtc_intr &= (rtc_control & RTC_IRQMASK) | RTC_IRQF;
  244. if (is_intr(rtc_intr))
  245. rtc_update_irq(cmos->rtc, 1, rtc_intr);
  246. spin_unlock_irqrestore(&rtc_lock, flags);
  247. return 0;
  248. }
  249. #if defined(CONFIG_RTC_INTF_DEV) || defined(CONFIG_RTC_INTF_DEV_MODULE)
  250. static int
  251. cmos_rtc_ioctl(struct device *dev, unsigned int cmd, unsigned long arg)
  252. {
  253. struct cmos_rtc *cmos = dev_get_drvdata(dev);
  254. unsigned char rtc_control, rtc_intr;
  255. unsigned long flags;
  256. switch (cmd) {
  257. case RTC_AIE_OFF:
  258. case RTC_AIE_ON:
  259. case RTC_UIE_OFF:
  260. case RTC_UIE_ON:
  261. case RTC_PIE_OFF:
  262. case RTC_PIE_ON:
  263. if (!is_valid_irq(cmos->irq))
  264. return -EINVAL;
  265. break;
  266. default:
  267. return -ENOIOCTLCMD;
  268. }
  269. spin_lock_irqsave(&rtc_lock, flags);
  270. rtc_control = CMOS_READ(RTC_CONTROL);
  271. switch (cmd) {
  272. case RTC_AIE_OFF: /* alarm off */
  273. rtc_control &= ~RTC_AIE;
  274. hpet_mask_rtc_irq_bit(RTC_AIE);
  275. break;
  276. case RTC_AIE_ON: /* alarm on */
  277. rtc_control |= RTC_AIE;
  278. hpet_set_rtc_irq_bit(RTC_AIE);
  279. break;
  280. case RTC_UIE_OFF: /* update off */
  281. rtc_control &= ~RTC_UIE;
  282. hpet_mask_rtc_irq_bit(RTC_UIE);
  283. break;
  284. case RTC_UIE_ON: /* update on */
  285. rtc_control |= RTC_UIE;
  286. hpet_set_rtc_irq_bit(RTC_UIE);
  287. break;
  288. case RTC_PIE_OFF: /* periodic off */
  289. rtc_control &= ~RTC_PIE;
  290. hpet_mask_rtc_irq_bit(RTC_PIE);
  291. break;
  292. case RTC_PIE_ON: /* periodic on */
  293. rtc_control |= RTC_PIE;
  294. hpet_set_rtc_irq_bit(RTC_PIE);
  295. break;
  296. }
  297. if (!is_hpet_enabled())
  298. CMOS_WRITE(rtc_control, RTC_CONTROL);
  299. rtc_intr = CMOS_READ(RTC_INTR_FLAGS);
  300. rtc_intr &= (rtc_control & RTC_IRQMASK) | RTC_IRQF;
  301. if (is_intr(rtc_intr))
  302. rtc_update_irq(cmos->rtc, 1, rtc_intr);
  303. spin_unlock_irqrestore(&rtc_lock, flags);
  304. return 0;
  305. }
  306. #else
  307. #define cmos_rtc_ioctl NULL
  308. #endif
  309. #if defined(CONFIG_RTC_INTF_PROC) || defined(CONFIG_RTC_INTF_PROC_MODULE)
  310. static int cmos_procfs(struct device *dev, struct seq_file *seq)
  311. {
  312. struct cmos_rtc *cmos = dev_get_drvdata(dev);
  313. unsigned char rtc_control, valid;
  314. spin_lock_irq(&rtc_lock);
  315. rtc_control = CMOS_READ(RTC_CONTROL);
  316. valid = CMOS_READ(RTC_VALID);
  317. spin_unlock_irq(&rtc_lock);
  318. /* NOTE: at least ICH6 reports battery status using a different
  319. * (non-RTC) bit; and SQWE is ignored on many current systems.
  320. */
  321. return seq_printf(seq,
  322. "periodic_IRQ\t: %s\n"
  323. "update_IRQ\t: %s\n"
  324. "HPET_emulated\t: %s\n"
  325. // "square_wave\t: %s\n"
  326. // "BCD\t\t: %s\n"
  327. "DST_enable\t: %s\n"
  328. "periodic_freq\t: %d\n"
  329. "batt_status\t: %s\n",
  330. (rtc_control & RTC_PIE) ? "yes" : "no",
  331. (rtc_control & RTC_UIE) ? "yes" : "no",
  332. is_hpet_enabled() ? "yes" : "no",
  333. // (rtc_control & RTC_SQWE) ? "yes" : "no",
  334. // (rtc_control & RTC_DM_BINARY) ? "no" : "yes",
  335. (rtc_control & RTC_DST_EN) ? "yes" : "no",
  336. cmos->rtc->irq_freq,
  337. (valid & RTC_VRT) ? "okay" : "dead");
  338. }
  339. #else
  340. #define cmos_procfs NULL
  341. #endif
  342. static const struct rtc_class_ops cmos_rtc_ops = {
  343. .ioctl = cmos_rtc_ioctl,
  344. .read_time = cmos_read_time,
  345. .set_time = cmos_set_time,
  346. .read_alarm = cmos_read_alarm,
  347. .set_alarm = cmos_set_alarm,
  348. .proc = cmos_procfs,
  349. .irq_set_freq = cmos_irq_set_freq,
  350. .irq_set_state = cmos_irq_set_state,
  351. };
  352. /*----------------------------------------------------------------*/
  353. /*
  354. * All these chips have at least 64 bytes of address space, shared by
  355. * RTC registers and NVRAM. Most of those bytes of NVRAM are used
  356. * by boot firmware. Modern chips have 128 or 256 bytes.
  357. */
  358. #define NVRAM_OFFSET (RTC_REG_D + 1)
  359. static ssize_t
  360. cmos_nvram_read(struct kobject *kobj, struct bin_attribute *attr,
  361. char *buf, loff_t off, size_t count)
  362. {
  363. int retval;
  364. if (unlikely(off >= attr->size))
  365. return 0;
  366. if ((off + count) > attr->size)
  367. count = attr->size - off;
  368. spin_lock_irq(&rtc_lock);
  369. for (retval = 0, off += NVRAM_OFFSET; count--; retval++, off++)
  370. *buf++ = CMOS_READ(off);
  371. spin_unlock_irq(&rtc_lock);
  372. return retval;
  373. }
  374. static ssize_t
  375. cmos_nvram_write(struct kobject *kobj, struct bin_attribute *attr,
  376. char *buf, loff_t off, size_t count)
  377. {
  378. struct cmos_rtc *cmos;
  379. int retval;
  380. cmos = dev_get_drvdata(container_of(kobj, struct device, kobj));
  381. if (unlikely(off >= attr->size))
  382. return -EFBIG;
  383. if ((off + count) > attr->size)
  384. count = attr->size - off;
  385. /* NOTE: on at least PCs and Ataris, the boot firmware uses a
  386. * checksum on part of the NVRAM data. That's currently ignored
  387. * here. If userspace is smart enough to know what fields of
  388. * NVRAM to update, updating checksums is also part of its job.
  389. */
  390. spin_lock_irq(&rtc_lock);
  391. for (retval = 0, off += NVRAM_OFFSET; count--; retval++, off++) {
  392. /* don't trash RTC registers */
  393. if (off == cmos->day_alrm
  394. || off == cmos->mon_alrm
  395. || off == cmos->century)
  396. buf++;
  397. else
  398. CMOS_WRITE(*buf++, off);
  399. }
  400. spin_unlock_irq(&rtc_lock);
  401. return retval;
  402. }
  403. static struct bin_attribute nvram = {
  404. .attr = {
  405. .name = "nvram",
  406. .mode = S_IRUGO | S_IWUSR,
  407. .owner = THIS_MODULE,
  408. },
  409. .read = cmos_nvram_read,
  410. .write = cmos_nvram_write,
  411. /* size gets set up later */
  412. };
  413. /*----------------------------------------------------------------*/
  414. static struct cmos_rtc cmos_rtc;
  415. static irqreturn_t cmos_interrupt(int irq, void *p)
  416. {
  417. u8 irqstat;
  418. u8 rtc_control;
  419. spin_lock(&rtc_lock);
  420. /*
  421. * In this case it is HPET RTC interrupt handler
  422. * calling us, with the interrupt information
  423. * passed as arg1, instead of irq.
  424. */
  425. if (is_hpet_enabled())
  426. irqstat = (unsigned long)irq & 0xF0;
  427. else {
  428. irqstat = CMOS_READ(RTC_INTR_FLAGS);
  429. rtc_control = CMOS_READ(RTC_CONTROL);
  430. irqstat &= (rtc_control & RTC_IRQMASK) | RTC_IRQF;
  431. }
  432. /* All Linux RTC alarms should be treated as if they were oneshot.
  433. * Similar code may be needed in system wakeup paths, in case the
  434. * alarm woke the system.
  435. */
  436. if (irqstat & RTC_AIE) {
  437. rtc_control = CMOS_READ(RTC_CONTROL);
  438. rtc_control &= ~RTC_AIE;
  439. CMOS_WRITE(rtc_control, RTC_CONTROL);
  440. CMOS_READ(RTC_INTR_FLAGS);
  441. }
  442. spin_unlock(&rtc_lock);
  443. if (is_intr(irqstat)) {
  444. rtc_update_irq(p, 1, irqstat);
  445. return IRQ_HANDLED;
  446. } else
  447. return IRQ_NONE;
  448. }
  449. #ifdef CONFIG_PNP
  450. #define INITSECTION
  451. #else
  452. #define INITSECTION __init
  453. #endif
  454. static int INITSECTION
  455. cmos_do_probe(struct device *dev, struct resource *ports, int rtc_irq)
  456. {
  457. struct cmos_rtc_board_info *info = dev->platform_data;
  458. int retval = 0;
  459. unsigned char rtc_control;
  460. unsigned address_space;
  461. /* there can be only one ... */
  462. if (cmos_rtc.dev)
  463. return -EBUSY;
  464. if (!ports)
  465. return -ENODEV;
  466. /* Claim I/O ports ASAP, minimizing conflict with legacy driver.
  467. *
  468. * REVISIT non-x86 systems may instead use memory space resources
  469. * (needing ioremap etc), not i/o space resources like this ...
  470. */
  471. ports = request_region(ports->start,
  472. ports->end + 1 - ports->start,
  473. driver_name);
  474. if (!ports) {
  475. dev_dbg(dev, "i/o registers already in use\n");
  476. return -EBUSY;
  477. }
  478. cmos_rtc.irq = rtc_irq;
  479. cmos_rtc.iomem = ports;
  480. /* Heuristic to deduce NVRAM size ... do what the legacy NVRAM
  481. * driver did, but don't reject unknown configs. Old hardware
  482. * won't address 128 bytes, and for now we ignore the way newer
  483. * chips can address 256 bytes (using two more i/o ports).
  484. */
  485. #if defined(CONFIG_ATARI)
  486. address_space = 64;
  487. #elif defined(__i386__) || defined(__x86_64__) || defined(__arm__)
  488. address_space = 128;
  489. #else
  490. #warning Assuming 128 bytes of RTC+NVRAM address space, not 64 bytes.
  491. address_space = 128;
  492. #endif
  493. /* For ACPI systems extension info comes from the FADT. On others,
  494. * board specific setup provides it as appropriate. Systems where
  495. * the alarm IRQ isn't automatically a wakeup IRQ (like ACPI, and
  496. * some almost-clones) can provide hooks to make that behave.
  497. *
  498. * Note that ACPI doesn't preclude putting these registers into
  499. * "extended" areas of the chip, including some that we won't yet
  500. * expect CMOS_READ and friends to handle.
  501. */
  502. if (info) {
  503. if (info->rtc_day_alarm && info->rtc_day_alarm < 128)
  504. cmos_rtc.day_alrm = info->rtc_day_alarm;
  505. if (info->rtc_mon_alarm && info->rtc_mon_alarm < 128)
  506. cmos_rtc.mon_alrm = info->rtc_mon_alarm;
  507. if (info->rtc_century && info->rtc_century < 128)
  508. cmos_rtc.century = info->rtc_century;
  509. if (info->wake_on && info->wake_off) {
  510. cmos_rtc.wake_on = info->wake_on;
  511. cmos_rtc.wake_off = info->wake_off;
  512. }
  513. }
  514. cmos_rtc.rtc = rtc_device_register(driver_name, dev,
  515. &cmos_rtc_ops, THIS_MODULE);
  516. if (IS_ERR(cmos_rtc.rtc)) {
  517. retval = PTR_ERR(cmos_rtc.rtc);
  518. goto cleanup0;
  519. }
  520. cmos_rtc.dev = dev;
  521. dev_set_drvdata(dev, &cmos_rtc);
  522. rename_region(ports, cmos_rtc.rtc->dev.bus_id);
  523. spin_lock_irq(&rtc_lock);
  524. /* force periodic irq to CMOS reset default of 1024Hz;
  525. *
  526. * REVISIT it's been reported that at least one x86_64 ALI mobo
  527. * doesn't use 32KHz here ... for portability we might need to
  528. * do something about other clock frequencies.
  529. */
  530. cmos_rtc.rtc->irq_freq = 1024;
  531. if (!hpet_set_periodic_freq(cmos_rtc.rtc->irq_freq))
  532. CMOS_WRITE(RTC_REF_CLCK_32KHZ | 0x06, RTC_FREQ_SELECT);
  533. /* disable irqs.
  534. *
  535. * NOTE after changing RTC_xIE bits we always read INTR_FLAGS;
  536. * allegedly some older rtcs need that to handle irqs properly
  537. */
  538. rtc_control = CMOS_READ(RTC_CONTROL);
  539. rtc_control &= ~(RTC_PIE | RTC_AIE | RTC_UIE);
  540. CMOS_WRITE(rtc_control, RTC_CONTROL);
  541. CMOS_READ(RTC_INTR_FLAGS);
  542. spin_unlock_irq(&rtc_lock);
  543. /* FIXME teach the alarm code how to handle binary mode;
  544. * <asm-generic/rtc.h> doesn't know 12-hour mode either.
  545. */
  546. if (!(rtc_control & RTC_24H) || (rtc_control & (RTC_DM_BINARY))) {
  547. dev_dbg(dev, "only 24-hr BCD mode supported\n");
  548. retval = -ENXIO;
  549. goto cleanup1;
  550. }
  551. if (is_valid_irq(rtc_irq)) {
  552. irq_handler_t rtc_cmos_int_handler;
  553. if (is_hpet_enabled()) {
  554. int err;
  555. rtc_cmos_int_handler = hpet_rtc_interrupt;
  556. err = hpet_register_irq_handler(cmos_interrupt);
  557. if (err != 0) {
  558. printk(KERN_WARNING "hpet_register_irq_handler "
  559. " failed in rtc_init().");
  560. goto cleanup1;
  561. }
  562. } else
  563. rtc_cmos_int_handler = cmos_interrupt;
  564. retval = request_irq(rtc_irq, rtc_cmos_int_handler,
  565. IRQF_DISABLED, cmos_rtc.rtc->dev.bus_id,
  566. cmos_rtc.rtc);
  567. if (retval < 0) {
  568. dev_dbg(dev, "IRQ %d is already in use\n", rtc_irq);
  569. goto cleanup1;
  570. }
  571. }
  572. hpet_rtc_timer_init();
  573. /* export at least the first block of NVRAM */
  574. nvram.size = address_space - NVRAM_OFFSET;
  575. retval = sysfs_create_bin_file(&dev->kobj, &nvram);
  576. if (retval < 0) {
  577. dev_dbg(dev, "can't create nvram file? %d\n", retval);
  578. goto cleanup2;
  579. }
  580. pr_info("%s: alarms up to one %s%s\n",
  581. cmos_rtc.rtc->dev.bus_id,
  582. is_valid_irq(rtc_irq)
  583. ? (cmos_rtc.mon_alrm
  584. ? "year"
  585. : (cmos_rtc.day_alrm
  586. ? "month" : "day"))
  587. : "no",
  588. cmos_rtc.century ? ", y3k" : ""
  589. );
  590. return 0;
  591. cleanup2:
  592. if (is_valid_irq(rtc_irq))
  593. free_irq(rtc_irq, cmos_rtc.rtc);
  594. cleanup1:
  595. cmos_rtc.dev = NULL;
  596. rtc_device_unregister(cmos_rtc.rtc);
  597. cleanup0:
  598. release_region(ports->start, ports->end + 1 - ports->start);
  599. return retval;
  600. }
  601. static void cmos_do_shutdown(void)
  602. {
  603. unsigned char rtc_control;
  604. spin_lock_irq(&rtc_lock);
  605. rtc_control = CMOS_READ(RTC_CONTROL);
  606. rtc_control &= ~(RTC_PIE|RTC_AIE|RTC_UIE);
  607. CMOS_WRITE(rtc_control, RTC_CONTROL);
  608. CMOS_READ(RTC_INTR_FLAGS);
  609. spin_unlock_irq(&rtc_lock);
  610. }
  611. static void __exit cmos_do_remove(struct device *dev)
  612. {
  613. struct cmos_rtc *cmos = dev_get_drvdata(dev);
  614. struct resource *ports;
  615. cmos_do_shutdown();
  616. sysfs_remove_bin_file(&dev->kobj, &nvram);
  617. if (is_valid_irq(cmos->irq)) {
  618. free_irq(cmos->irq, cmos->rtc);
  619. hpet_unregister_irq_handler(cmos_interrupt);
  620. }
  621. rtc_device_unregister(cmos->rtc);
  622. cmos->rtc = NULL;
  623. ports = cmos->iomem;
  624. release_region(ports->start, ports->end + 1 - ports->start);
  625. cmos->iomem = NULL;
  626. cmos->dev = NULL;
  627. dev_set_drvdata(dev, NULL);
  628. }
  629. #ifdef CONFIG_PM
  630. static int cmos_suspend(struct device *dev, pm_message_t mesg)
  631. {
  632. struct cmos_rtc *cmos = dev_get_drvdata(dev);
  633. int do_wake = device_may_wakeup(dev);
  634. unsigned char tmp;
  635. /* only the alarm might be a wakeup event source */
  636. spin_lock_irq(&rtc_lock);
  637. cmos->suspend_ctrl = tmp = CMOS_READ(RTC_CONTROL);
  638. if (tmp & (RTC_PIE|RTC_AIE|RTC_UIE)) {
  639. unsigned char irqstat;
  640. if (do_wake)
  641. tmp &= ~(RTC_PIE|RTC_UIE);
  642. else
  643. tmp &= ~(RTC_PIE|RTC_AIE|RTC_UIE);
  644. CMOS_WRITE(tmp, RTC_CONTROL);
  645. irqstat = CMOS_READ(RTC_INTR_FLAGS);
  646. irqstat &= (tmp & RTC_IRQMASK) | RTC_IRQF;
  647. if (is_intr(irqstat))
  648. rtc_update_irq(cmos->rtc, 1, irqstat);
  649. }
  650. spin_unlock_irq(&rtc_lock);
  651. if (tmp & RTC_AIE) {
  652. cmos->enabled_wake = 1;
  653. if (cmos->wake_on)
  654. cmos->wake_on(dev);
  655. else
  656. enable_irq_wake(cmos->irq);
  657. }
  658. pr_debug("%s: suspend%s, ctrl %02x\n",
  659. cmos_rtc.rtc->dev.bus_id,
  660. (tmp & RTC_AIE) ? ", alarm may wake" : "",
  661. tmp);
  662. return 0;
  663. }
  664. static int cmos_resume(struct device *dev)
  665. {
  666. struct cmos_rtc *cmos = dev_get_drvdata(dev);
  667. unsigned char tmp = cmos->suspend_ctrl;
  668. /* re-enable any irqs previously active */
  669. if (tmp & (RTC_PIE|RTC_AIE|RTC_UIE)) {
  670. if (cmos->enabled_wake) {
  671. if (cmos->wake_off)
  672. cmos->wake_off(dev);
  673. else
  674. disable_irq_wake(cmos->irq);
  675. cmos->enabled_wake = 0;
  676. }
  677. spin_lock_irq(&rtc_lock);
  678. CMOS_WRITE(tmp, RTC_CONTROL);
  679. tmp = CMOS_READ(RTC_INTR_FLAGS);
  680. tmp &= (cmos->suspend_ctrl & RTC_IRQMASK) | RTC_IRQF;
  681. if (is_intr(tmp))
  682. rtc_update_irq(cmos->rtc, 1, tmp);
  683. spin_unlock_irq(&rtc_lock);
  684. }
  685. pr_debug("%s: resume, ctrl %02x\n",
  686. cmos_rtc.rtc->dev.bus_id,
  687. cmos->suspend_ctrl);
  688. return 0;
  689. }
  690. #else
  691. #define cmos_suspend NULL
  692. #define cmos_resume NULL
  693. #endif
  694. /*----------------------------------------------------------------*/
  695. /* On non-x86 systems, a "CMOS" RTC lives most naturally on platform_bus.
  696. * ACPI systems always list these as PNPACPI devices, and pre-ACPI PCs
  697. * probably list them in similar PNPBIOS tables; so PNP is more common.
  698. *
  699. * We don't use legacy "poke at the hardware" probing. Ancient PCs that
  700. * predate even PNPBIOS should set up platform_bus devices.
  701. */
  702. #ifdef CONFIG_PNP
  703. #include <linux/pnp.h>
  704. static int __devinit
  705. cmos_pnp_probe(struct pnp_dev *pnp, const struct pnp_device_id *id)
  706. {
  707. /* REVISIT paranoia argues for a shutdown notifier, since PNP
  708. * drivers can't provide shutdown() methods to disable IRQs.
  709. * Or better yet, fix PNP to allow those methods...
  710. */
  711. if (pnp_port_start(pnp,0) == 0x70 && !pnp_irq_valid(pnp,0))
  712. /* Some machines contain a PNP entry for the RTC, but
  713. * don't define the IRQ. It should always be safe to
  714. * hardcode it in these cases
  715. */
  716. return cmos_do_probe(&pnp->dev, &pnp->res.port_resource[0], 8);
  717. else
  718. return cmos_do_probe(&pnp->dev,
  719. &pnp->res.port_resource[0],
  720. pnp->res.irq_resource[0].start);
  721. }
  722. static void __exit cmos_pnp_remove(struct pnp_dev *pnp)
  723. {
  724. cmos_do_remove(&pnp->dev);
  725. }
  726. #ifdef CONFIG_PM
  727. static int cmos_pnp_suspend(struct pnp_dev *pnp, pm_message_t mesg)
  728. {
  729. return cmos_suspend(&pnp->dev, mesg);
  730. }
  731. static int cmos_pnp_resume(struct pnp_dev *pnp)
  732. {
  733. return cmos_resume(&pnp->dev);
  734. }
  735. #else
  736. #define cmos_pnp_suspend NULL
  737. #define cmos_pnp_resume NULL
  738. #endif
  739. static const struct pnp_device_id rtc_ids[] = {
  740. { .id = "PNP0b00", },
  741. { .id = "PNP0b01", },
  742. { .id = "PNP0b02", },
  743. { },
  744. };
  745. MODULE_DEVICE_TABLE(pnp, rtc_ids);
  746. static struct pnp_driver cmos_pnp_driver = {
  747. .name = (char *) driver_name,
  748. .id_table = rtc_ids,
  749. .probe = cmos_pnp_probe,
  750. .remove = __exit_p(cmos_pnp_remove),
  751. /* flag ensures resume() gets called, and stops syslog spam */
  752. .flags = PNP_DRIVER_RES_DO_NOT_CHANGE,
  753. .suspend = cmos_pnp_suspend,
  754. .resume = cmos_pnp_resume,
  755. };
  756. static int __init cmos_init(void)
  757. {
  758. return pnp_register_driver(&cmos_pnp_driver);
  759. }
  760. module_init(cmos_init);
  761. static void __exit cmos_exit(void)
  762. {
  763. pnp_unregister_driver(&cmos_pnp_driver);
  764. }
  765. module_exit(cmos_exit);
  766. #else /* no PNP */
  767. /*----------------------------------------------------------------*/
  768. /* Platform setup should have set up an RTC device, when PNP is
  769. * unavailable ... this could happen even on (older) PCs.
  770. */
  771. static int __init cmos_platform_probe(struct platform_device *pdev)
  772. {
  773. return cmos_do_probe(&pdev->dev,
  774. platform_get_resource(pdev, IORESOURCE_IO, 0),
  775. platform_get_irq(pdev, 0));
  776. }
  777. static int __exit cmos_platform_remove(struct platform_device *pdev)
  778. {
  779. cmos_do_remove(&pdev->dev);
  780. return 0;
  781. }
  782. static void cmos_platform_shutdown(struct platform_device *pdev)
  783. {
  784. cmos_do_shutdown();
  785. }
  786. /* work with hotplug and coldplug */
  787. MODULE_ALIAS("platform:rtc_cmos");
  788. static struct platform_driver cmos_platform_driver = {
  789. .remove = __exit_p(cmos_platform_remove),
  790. .shutdown = cmos_platform_shutdown,
  791. .driver = {
  792. .name = (char *) driver_name,
  793. .suspend = cmos_suspend,
  794. .resume = cmos_resume,
  795. }
  796. };
  797. static int __init cmos_init(void)
  798. {
  799. return platform_driver_probe(&cmos_platform_driver,
  800. cmos_platform_probe);
  801. }
  802. module_init(cmos_init);
  803. static void __exit cmos_exit(void)
  804. {
  805. platform_driver_unregister(&cmos_platform_driver);
  806. }
  807. module_exit(cmos_exit);
  808. #endif /* !PNP */
  809. MODULE_AUTHOR("David Brownell");
  810. MODULE_DESCRIPTION("Driver for PC-style 'CMOS' RTCs");
  811. MODULE_LICENSE("GPL");