mac-fec.c 13 KB

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  1. /*
  2. * Freescale Ethernet controllers
  3. *
  4. * Copyright (c) 2005 Intracom S.A.
  5. * by Pantelis Antoniou <panto@intracom.gr>
  6. *
  7. * 2005 (c) MontaVista Software, Inc.
  8. * Vitaly Bordug <vbordug@ru.mvista.com>
  9. *
  10. * This file is licensed under the terms of the GNU General Public License
  11. * version 2. This program is licensed "as is" without any warranty of any
  12. * kind, whether express or implied.
  13. */
  14. #include <linux/module.h>
  15. #include <linux/kernel.h>
  16. #include <linux/types.h>
  17. #include <linux/string.h>
  18. #include <linux/ptrace.h>
  19. #include <linux/errno.h>
  20. #include <linux/ioport.h>
  21. #include <linux/slab.h>
  22. #include <linux/interrupt.h>
  23. #include <linux/init.h>
  24. #include <linux/delay.h>
  25. #include <linux/netdevice.h>
  26. #include <linux/etherdevice.h>
  27. #include <linux/skbuff.h>
  28. #include <linux/spinlock.h>
  29. #include <linux/mii.h>
  30. #include <linux/ethtool.h>
  31. #include <linux/bitops.h>
  32. #include <linux/fs.h>
  33. #include <linux/platform_device.h>
  34. #include <asm/irq.h>
  35. #include <asm/uaccess.h>
  36. #ifdef CONFIG_8xx
  37. #include <asm/8xx_immap.h>
  38. #include <asm/pgtable.h>
  39. #include <asm/mpc8xx.h>
  40. #include <asm/cpm1.h>
  41. #endif
  42. #ifdef CONFIG_PPC_CPM_NEW_BINDING
  43. #include <asm/of_device.h>
  44. #endif
  45. #include "fs_enet.h"
  46. #include "fec.h"
  47. /*************************************************/
  48. #if defined(CONFIG_CPM1)
  49. /* for a CPM1 __raw_xxx's are sufficient */
  50. #define __fs_out32(addr, x) __raw_writel(x, addr)
  51. #define __fs_out16(addr, x) __raw_writew(x, addr)
  52. #define __fs_in32(addr) __raw_readl(addr)
  53. #define __fs_in16(addr) __raw_readw(addr)
  54. #else
  55. /* for others play it safe */
  56. #define __fs_out32(addr, x) out_be32(addr, x)
  57. #define __fs_out16(addr, x) out_be16(addr, x)
  58. #define __fs_in32(addr) in_be32(addr)
  59. #define __fs_in16(addr) in_be16(addr)
  60. #endif
  61. /* write */
  62. #define FW(_fecp, _reg, _v) __fs_out32(&(_fecp)->fec_ ## _reg, (_v))
  63. /* read */
  64. #define FR(_fecp, _reg) __fs_in32(&(_fecp)->fec_ ## _reg)
  65. /* set bits */
  66. #define FS(_fecp, _reg, _v) FW(_fecp, _reg, FR(_fecp, _reg) | (_v))
  67. /* clear bits */
  68. #define FC(_fecp, _reg, _v) FW(_fecp, _reg, FR(_fecp, _reg) & ~(_v))
  69. /*
  70. * Delay to wait for FEC reset command to complete (in us)
  71. */
  72. #define FEC_RESET_DELAY 50
  73. static int whack_reset(fec_t __iomem *fecp)
  74. {
  75. int i;
  76. FW(fecp, ecntrl, FEC_ECNTRL_PINMUX | FEC_ECNTRL_RESET);
  77. for (i = 0; i < FEC_RESET_DELAY; i++) {
  78. if ((FR(fecp, ecntrl) & FEC_ECNTRL_RESET) == 0)
  79. return 0; /* OK */
  80. udelay(1);
  81. }
  82. return -1;
  83. }
  84. static int do_pd_setup(struct fs_enet_private *fep)
  85. {
  86. #ifdef CONFIG_PPC_CPM_NEW_BINDING
  87. struct of_device *ofdev = to_of_device(fep->dev);
  88. fep->interrupt = of_irq_to_resource(ofdev->node, 0, NULL);
  89. if (fep->interrupt == NO_IRQ)
  90. return -EINVAL;
  91. fep->fec.fecp = of_iomap(ofdev->node, 0);
  92. if (!fep->fcc.fccp)
  93. return -EINVAL;
  94. return 0;
  95. #else
  96. struct platform_device *pdev = to_platform_device(fep->dev);
  97. struct resource *r;
  98. /* Fill out IRQ field */
  99. fep->interrupt = platform_get_irq_byname(pdev,"interrupt");
  100. if (fep->interrupt < 0)
  101. return -EINVAL;
  102. r = platform_get_resource_byname(pdev, IORESOURCE_MEM, "regs");
  103. fep->fec.fecp = ioremap(r->start, r->end - r->start + 1);
  104. if(fep->fec.fecp == NULL)
  105. return -EINVAL;
  106. return 0;
  107. #endif
  108. }
  109. #define FEC_NAPI_RX_EVENT_MSK (FEC_ENET_RXF | FEC_ENET_RXB)
  110. #define FEC_RX_EVENT (FEC_ENET_RXF)
  111. #define FEC_TX_EVENT (FEC_ENET_TXF)
  112. #define FEC_ERR_EVENT_MSK (FEC_ENET_HBERR | FEC_ENET_BABR | \
  113. FEC_ENET_BABT | FEC_ENET_EBERR)
  114. static int setup_data(struct net_device *dev)
  115. {
  116. struct fs_enet_private *fep = netdev_priv(dev);
  117. if (do_pd_setup(fep) != 0)
  118. return -EINVAL;
  119. fep->fec.hthi = 0;
  120. fep->fec.htlo = 0;
  121. fep->ev_napi_rx = FEC_NAPI_RX_EVENT_MSK;
  122. fep->ev_rx = FEC_RX_EVENT;
  123. fep->ev_tx = FEC_TX_EVENT;
  124. fep->ev_err = FEC_ERR_EVENT_MSK;
  125. return 0;
  126. }
  127. static int allocate_bd(struct net_device *dev)
  128. {
  129. struct fs_enet_private *fep = netdev_priv(dev);
  130. const struct fs_platform_info *fpi = fep->fpi;
  131. fep->ring_base = (void __force __iomem *)dma_alloc_coherent(fep->dev,
  132. (fpi->tx_ring + fpi->rx_ring) *
  133. sizeof(cbd_t), &fep->ring_mem_addr,
  134. GFP_KERNEL);
  135. if (fep->ring_base == NULL)
  136. return -ENOMEM;
  137. return 0;
  138. }
  139. static void free_bd(struct net_device *dev)
  140. {
  141. struct fs_enet_private *fep = netdev_priv(dev);
  142. const struct fs_platform_info *fpi = fep->fpi;
  143. if(fep->ring_base)
  144. dma_free_coherent(fep->dev, (fpi->tx_ring + fpi->rx_ring)
  145. * sizeof(cbd_t),
  146. (void __force *)fep->ring_base,
  147. fep->ring_mem_addr);
  148. }
  149. static void cleanup_data(struct net_device *dev)
  150. {
  151. /* nothing */
  152. }
  153. static void set_promiscuous_mode(struct net_device *dev)
  154. {
  155. struct fs_enet_private *fep = netdev_priv(dev);
  156. fec_t __iomem *fecp = fep->fec.fecp;
  157. FS(fecp, r_cntrl, FEC_RCNTRL_PROM);
  158. }
  159. static void set_multicast_start(struct net_device *dev)
  160. {
  161. struct fs_enet_private *fep = netdev_priv(dev);
  162. fep->fec.hthi = 0;
  163. fep->fec.htlo = 0;
  164. }
  165. static void set_multicast_one(struct net_device *dev, const u8 *mac)
  166. {
  167. struct fs_enet_private *fep = netdev_priv(dev);
  168. int temp, hash_index, i, j;
  169. u32 crc, csrVal;
  170. u8 byte, msb;
  171. crc = 0xffffffff;
  172. for (i = 0; i < 6; i++) {
  173. byte = mac[i];
  174. for (j = 0; j < 8; j++) {
  175. msb = crc >> 31;
  176. crc <<= 1;
  177. if (msb ^ (byte & 0x1))
  178. crc ^= FEC_CRC_POLY;
  179. byte >>= 1;
  180. }
  181. }
  182. temp = (crc & 0x3f) >> 1;
  183. hash_index = ((temp & 0x01) << 4) |
  184. ((temp & 0x02) << 2) |
  185. ((temp & 0x04)) |
  186. ((temp & 0x08) >> 2) |
  187. ((temp & 0x10) >> 4);
  188. csrVal = 1 << hash_index;
  189. if (crc & 1)
  190. fep->fec.hthi |= csrVal;
  191. else
  192. fep->fec.htlo |= csrVal;
  193. }
  194. static void set_multicast_finish(struct net_device *dev)
  195. {
  196. struct fs_enet_private *fep = netdev_priv(dev);
  197. fec_t __iomem *fecp = fep->fec.fecp;
  198. /* if all multi or too many multicasts; just enable all */
  199. if ((dev->flags & IFF_ALLMULTI) != 0 ||
  200. dev->mc_count > FEC_MAX_MULTICAST_ADDRS) {
  201. fep->fec.hthi = 0xffffffffU;
  202. fep->fec.htlo = 0xffffffffU;
  203. }
  204. FC(fecp, r_cntrl, FEC_RCNTRL_PROM);
  205. FW(fecp, hash_table_high, fep->fec.hthi);
  206. FW(fecp, hash_table_low, fep->fec.htlo);
  207. }
  208. static void set_multicast_list(struct net_device *dev)
  209. {
  210. struct dev_mc_list *pmc;
  211. if ((dev->flags & IFF_PROMISC) == 0) {
  212. set_multicast_start(dev);
  213. for (pmc = dev->mc_list; pmc != NULL; pmc = pmc->next)
  214. set_multicast_one(dev, pmc->dmi_addr);
  215. set_multicast_finish(dev);
  216. } else
  217. set_promiscuous_mode(dev);
  218. }
  219. static void restart(struct net_device *dev)
  220. {
  221. #ifdef CONFIG_DUET
  222. immap_t *immap = fs_enet_immap;
  223. u32 cptr;
  224. #endif
  225. struct fs_enet_private *fep = netdev_priv(dev);
  226. fec_t __iomem *fecp = fep->fec.fecp;
  227. const struct fs_platform_info *fpi = fep->fpi;
  228. dma_addr_t rx_bd_base_phys, tx_bd_base_phys;
  229. int r;
  230. u32 addrhi, addrlo;
  231. struct mii_bus* mii = fep->phydev->bus;
  232. struct fec_info* fec_inf = mii->priv;
  233. r = whack_reset(fep->fec.fecp);
  234. if (r != 0)
  235. printk(KERN_ERR DRV_MODULE_NAME
  236. ": %s FEC Reset FAILED!\n", dev->name);
  237. /*
  238. * Set station address.
  239. */
  240. addrhi = ((u32) dev->dev_addr[0] << 24) |
  241. ((u32) dev->dev_addr[1] << 16) |
  242. ((u32) dev->dev_addr[2] << 8) |
  243. (u32) dev->dev_addr[3];
  244. addrlo = ((u32) dev->dev_addr[4] << 24) |
  245. ((u32) dev->dev_addr[5] << 16);
  246. FW(fecp, addr_low, addrhi);
  247. FW(fecp, addr_high, addrlo);
  248. /*
  249. * Reset all multicast.
  250. */
  251. FW(fecp, hash_table_high, fep->fec.hthi);
  252. FW(fecp, hash_table_low, fep->fec.htlo);
  253. /*
  254. * Set maximum receive buffer size.
  255. */
  256. FW(fecp, r_buff_size, PKT_MAXBLR_SIZE);
  257. FW(fecp, r_hash, PKT_MAXBUF_SIZE);
  258. /* get physical address */
  259. rx_bd_base_phys = fep->ring_mem_addr;
  260. tx_bd_base_phys = rx_bd_base_phys + sizeof(cbd_t) * fpi->rx_ring;
  261. /*
  262. * Set receive and transmit descriptor base.
  263. */
  264. FW(fecp, r_des_start, rx_bd_base_phys);
  265. FW(fecp, x_des_start, tx_bd_base_phys);
  266. fs_init_bds(dev);
  267. /*
  268. * Enable big endian and don't care about SDMA FC.
  269. */
  270. FW(fecp, fun_code, 0x78000000);
  271. /*
  272. * Set MII speed.
  273. */
  274. FW(fecp, mii_speed, fec_inf->mii_speed);
  275. /*
  276. * Clear any outstanding interrupt.
  277. */
  278. FW(fecp, ievent, 0xffc0);
  279. #ifndef CONFIG_PPC_MERGE
  280. FW(fecp, ivec, (fep->interrupt / 2) << 29);
  281. #else
  282. FW(fecp, ivec, (virq_to_hw(fep->interrupt) / 2) << 29);
  283. #endif
  284. /*
  285. * adjust to speed (only for DUET & RMII)
  286. */
  287. #ifdef CONFIG_DUET
  288. if (fpi->use_rmii) {
  289. cptr = in_be32(&immap->im_cpm.cp_cptr);
  290. switch (fs_get_fec_index(fpi->fs_no)) {
  291. case 0:
  292. cptr |= 0x100;
  293. if (fep->speed == 10)
  294. cptr |= 0x0000010;
  295. else if (fep->speed == 100)
  296. cptr &= ~0x0000010;
  297. break;
  298. case 1:
  299. cptr |= 0x80;
  300. if (fep->speed == 10)
  301. cptr |= 0x0000008;
  302. else if (fep->speed == 100)
  303. cptr &= ~0x0000008;
  304. break;
  305. default:
  306. BUG(); /* should never happen */
  307. break;
  308. }
  309. out_be32(&immap->im_cpm.cp_cptr, cptr);
  310. }
  311. #endif
  312. FW(fecp, r_cntrl, FEC_RCNTRL_MII_MODE); /* MII enable */
  313. /*
  314. * adjust to duplex mode
  315. */
  316. if (fep->phydev->duplex) {
  317. FC(fecp, r_cntrl, FEC_RCNTRL_DRT);
  318. FS(fecp, x_cntrl, FEC_TCNTRL_FDEN); /* FD enable */
  319. } else {
  320. FS(fecp, r_cntrl, FEC_RCNTRL_DRT);
  321. FC(fecp, x_cntrl, FEC_TCNTRL_FDEN); /* FD disable */
  322. }
  323. /*
  324. * Enable interrupts we wish to service.
  325. */
  326. FW(fecp, imask, FEC_ENET_TXF | FEC_ENET_TXB |
  327. FEC_ENET_RXF | FEC_ENET_RXB);
  328. /*
  329. * And last, enable the transmit and receive processing.
  330. */
  331. FW(fecp, ecntrl, FEC_ECNTRL_PINMUX | FEC_ECNTRL_ETHER_EN);
  332. FW(fecp, r_des_active, 0x01000000);
  333. }
  334. static void stop(struct net_device *dev)
  335. {
  336. struct fs_enet_private *fep = netdev_priv(dev);
  337. const struct fs_platform_info *fpi = fep->fpi;
  338. fec_t __iomem *fecp = fep->fec.fecp;
  339. struct fec_info* feci= fep->phydev->bus->priv;
  340. int i;
  341. if ((FR(fecp, ecntrl) & FEC_ECNTRL_ETHER_EN) == 0)
  342. return; /* already down */
  343. FW(fecp, x_cntrl, 0x01); /* Graceful transmit stop */
  344. for (i = 0; ((FR(fecp, ievent) & 0x10000000) == 0) &&
  345. i < FEC_RESET_DELAY; i++)
  346. udelay(1);
  347. if (i == FEC_RESET_DELAY)
  348. printk(KERN_WARNING DRV_MODULE_NAME
  349. ": %s FEC timeout on graceful transmit stop\n",
  350. dev->name);
  351. /*
  352. * Disable FEC. Let only MII interrupts.
  353. */
  354. FW(fecp, imask, 0);
  355. FC(fecp, ecntrl, FEC_ECNTRL_ETHER_EN);
  356. fs_cleanup_bds(dev);
  357. /* shut down FEC1? that's where the mii bus is */
  358. if (fpi->has_phy) {
  359. FS(fecp, r_cntrl, FEC_RCNTRL_MII_MODE); /* MII enable */
  360. FS(fecp, ecntrl, FEC_ECNTRL_PINMUX | FEC_ECNTRL_ETHER_EN);
  361. FW(fecp, ievent, FEC_ENET_MII);
  362. FW(fecp, mii_speed, feci->mii_speed);
  363. }
  364. }
  365. static void pre_request_irq(struct net_device *dev, int irq)
  366. {
  367. #ifndef CONFIG_PPC_MERGE
  368. immap_t *immap = fs_enet_immap;
  369. u32 siel;
  370. /* SIU interrupt */
  371. if (irq >= SIU_IRQ0 && irq < SIU_LEVEL7) {
  372. siel = in_be32(&immap->im_siu_conf.sc_siel);
  373. if ((irq & 1) == 0)
  374. siel |= (0x80000000 >> irq);
  375. else
  376. siel &= ~(0x80000000 >> (irq & ~1));
  377. out_be32(&immap->im_siu_conf.sc_siel, siel);
  378. }
  379. #endif
  380. }
  381. static void post_free_irq(struct net_device *dev, int irq)
  382. {
  383. /* nothing */
  384. }
  385. static void napi_clear_rx_event(struct net_device *dev)
  386. {
  387. struct fs_enet_private *fep = netdev_priv(dev);
  388. fec_t __iomem *fecp = fep->fec.fecp;
  389. FW(fecp, ievent, FEC_NAPI_RX_EVENT_MSK);
  390. }
  391. static void napi_enable_rx(struct net_device *dev)
  392. {
  393. struct fs_enet_private *fep = netdev_priv(dev);
  394. fec_t __iomem *fecp = fep->fec.fecp;
  395. FS(fecp, imask, FEC_NAPI_RX_EVENT_MSK);
  396. }
  397. static void napi_disable_rx(struct net_device *dev)
  398. {
  399. struct fs_enet_private *fep = netdev_priv(dev);
  400. fec_t __iomem *fecp = fep->fec.fecp;
  401. FC(fecp, imask, FEC_NAPI_RX_EVENT_MSK);
  402. }
  403. static void rx_bd_done(struct net_device *dev)
  404. {
  405. struct fs_enet_private *fep = netdev_priv(dev);
  406. fec_t __iomem *fecp = fep->fec.fecp;
  407. FW(fecp, r_des_active, 0x01000000);
  408. }
  409. static void tx_kickstart(struct net_device *dev)
  410. {
  411. struct fs_enet_private *fep = netdev_priv(dev);
  412. fec_t __iomem *fecp = fep->fec.fecp;
  413. FW(fecp, x_des_active, 0x01000000);
  414. }
  415. static u32 get_int_events(struct net_device *dev)
  416. {
  417. struct fs_enet_private *fep = netdev_priv(dev);
  418. fec_t __iomem *fecp = fep->fec.fecp;
  419. return FR(fecp, ievent) & FR(fecp, imask);
  420. }
  421. static void clear_int_events(struct net_device *dev, u32 int_events)
  422. {
  423. struct fs_enet_private *fep = netdev_priv(dev);
  424. fec_t __iomem *fecp = fep->fec.fecp;
  425. FW(fecp, ievent, int_events);
  426. }
  427. static void ev_error(struct net_device *dev, u32 int_events)
  428. {
  429. printk(KERN_WARNING DRV_MODULE_NAME
  430. ": %s FEC ERROR(s) 0x%x\n", dev->name, int_events);
  431. }
  432. static int get_regs(struct net_device *dev, void *p, int *sizep)
  433. {
  434. struct fs_enet_private *fep = netdev_priv(dev);
  435. if (*sizep < sizeof(fec_t))
  436. return -EINVAL;
  437. memcpy_fromio(p, fep->fec.fecp, sizeof(fec_t));
  438. return 0;
  439. }
  440. static int get_regs_len(struct net_device *dev)
  441. {
  442. return sizeof(fec_t);
  443. }
  444. static void tx_restart(struct net_device *dev)
  445. {
  446. /* nothing */
  447. }
  448. /*************************************************************************/
  449. const struct fs_ops fs_fec_ops = {
  450. .setup_data = setup_data,
  451. .cleanup_data = cleanup_data,
  452. .set_multicast_list = set_multicast_list,
  453. .restart = restart,
  454. .stop = stop,
  455. .pre_request_irq = pre_request_irq,
  456. .post_free_irq = post_free_irq,
  457. .napi_clear_rx_event = napi_clear_rx_event,
  458. .napi_enable_rx = napi_enable_rx,
  459. .napi_disable_rx = napi_disable_rx,
  460. .rx_bd_done = rx_bd_done,
  461. .tx_kickstart = tx_kickstart,
  462. .get_int_events = get_int_events,
  463. .clear_int_events = clear_int_events,
  464. .ev_error = ev_error,
  465. .get_regs = get_regs,
  466. .get_regs_len = get_regs_len,
  467. .tx_restart = tx_restart,
  468. .allocate_bd = allocate_bd,
  469. .free_bd = free_bd,
  470. };