Kconfig 7.4 KB

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  1. menu "Processor selection"
  2. #
  3. # Processor families
  4. #
  5. config CPU_SH2
  6. select SH_WRITETHROUGH if !CPU_SH2A
  7. bool
  8. config CPU_SH2A
  9. bool
  10. select CPU_SH2
  11. config CPU_SH3
  12. bool
  13. select CPU_HAS_INTEVT
  14. select CPU_HAS_SR_RB
  15. config CPU_SH4
  16. bool
  17. select CPU_HAS_INTEVT
  18. select CPU_HAS_SR_RB
  19. config CPU_SH4A
  20. bool
  21. select CPU_SH4
  22. config CPU_SH4AL_DSP
  23. bool
  24. select CPU_SH4A
  25. config CPU_SUBTYPE_ST40
  26. bool
  27. select CPU_SH4
  28. select CPU_HAS_INTC2_IRQ
  29. #
  30. # Processor subtypes
  31. #
  32. comment "SH-2 Processor Support"
  33. config CPU_SUBTYPE_SH7604
  34. bool "Support SH7604 processor"
  35. select CPU_SH2
  36. config CPU_SUBTYPE_SH7619
  37. bool "Support SH7619 processor"
  38. select CPU_SH2
  39. comment "SH-2A Processor Support"
  40. config CPU_SUBTYPE_SH7206
  41. bool "Support SH7206 processor"
  42. select CPU_SH2A
  43. comment "SH-3 Processor Support"
  44. config CPU_SUBTYPE_SH7300
  45. bool "Support SH7300 processor"
  46. select CPU_SH3
  47. config CPU_SUBTYPE_SH7705
  48. bool "Support SH7705 processor"
  49. select CPU_SH3
  50. select CPU_HAS_PINT_IRQ
  51. config CPU_SUBTYPE_SH7706
  52. bool "Support SH7706 processor"
  53. select CPU_SH3
  54. help
  55. Select SH7706 if you have a 133 Mhz SH-3 HD6417706 CPU.
  56. config CPU_SUBTYPE_SH7707
  57. bool "Support SH7707 processor"
  58. select CPU_SH3
  59. select CPU_HAS_PINT_IRQ
  60. help
  61. Select SH7707 if you have a 60 Mhz SH-3 HD6417707 CPU.
  62. config CPU_SUBTYPE_SH7708
  63. bool "Support SH7708 processor"
  64. select CPU_SH3
  65. help
  66. Select SH7708 if you have a 60 Mhz SH-3 HD6417708S or
  67. if you have a 100 Mhz SH-3 HD6417708R CPU.
  68. config CPU_SUBTYPE_SH7709
  69. bool "Support SH7709 processor"
  70. select CPU_SH3
  71. select CPU_HAS_PINT_IRQ
  72. help
  73. Select SH7709 if you have a 80 Mhz SH-3 HD6417709 CPU.
  74. config CPU_SUBTYPE_SH7710
  75. bool "Support SH7710 processor"
  76. select CPU_SH3
  77. help
  78. Select SH7710 if you have a SH3-DSP SH7710 CPU.
  79. comment "SH-4 Processor Support"
  80. config CPU_SUBTYPE_SH7750
  81. bool "Support SH7750 processor"
  82. select CPU_SH4
  83. help
  84. Select SH7750 if you have a 200 Mhz SH-4 HD6417750 CPU.
  85. config CPU_SUBTYPE_SH7091
  86. bool "Support SH7091 processor"
  87. select CPU_SH4
  88. select CPU_SUBTYPE_SH7750
  89. help
  90. Select SH7091 if you have an SH-4 based Sega device (such as
  91. the Dreamcast, Naomi, and Naomi 2).
  92. config CPU_SUBTYPE_SH7750R
  93. bool "Support SH7750R processor"
  94. select CPU_SH4
  95. select CPU_SUBTYPE_SH7750
  96. config CPU_SUBTYPE_SH7750S
  97. bool "Support SH7750S processor"
  98. select CPU_SH4
  99. select CPU_SUBTYPE_SH7750
  100. config CPU_SUBTYPE_SH7751
  101. bool "Support SH7751 processor"
  102. select CPU_SH4
  103. help
  104. Select SH7751 if you have a 166 Mhz SH-4 HD6417751 CPU,
  105. or if you have a HD6417751R CPU.
  106. config CPU_SUBTYPE_SH7751R
  107. bool "Support SH7751R processor"
  108. select CPU_SH4
  109. select CPU_SUBTYPE_SH7751
  110. config CPU_SUBTYPE_SH7760
  111. bool "Support SH7760 processor"
  112. select CPU_SH4
  113. select CPU_HAS_INTC2_IRQ
  114. config CPU_SUBTYPE_SH4_202
  115. bool "Support SH4-202 processor"
  116. select CPU_SH4
  117. comment "ST40 Processor Support"
  118. config CPU_SUBTYPE_ST40STB1
  119. bool "Support ST40STB1/ST40RA processors"
  120. select CPU_SUBTYPE_ST40
  121. help
  122. Select ST40STB1 if you have a ST40RA CPU.
  123. This was previously called the ST40STB1, hence the option name.
  124. config CPU_SUBTYPE_ST40GX1
  125. bool "Support ST40GX1 processor"
  126. select CPU_SUBTYPE_ST40
  127. help
  128. Select ST40GX1 if you have a ST40GX1 CPU.
  129. comment "SH-4A Processor Support"
  130. config CPU_SUBTYPE_SH7770
  131. bool "Support SH7770 processor"
  132. select CPU_SH4A
  133. config CPU_SUBTYPE_SH7780
  134. bool "Support SH7780 processor"
  135. select CPU_SH4A
  136. select CPU_HAS_INTC2_IRQ
  137. config CPU_SUBTYPE_SH7785
  138. bool "Support SH7785 processor"
  139. select CPU_SH4A
  140. select CPU_HAS_INTC2_IRQ
  141. comment "SH4AL-DSP Processor Support"
  142. config CPU_SUBTYPE_SH73180
  143. bool "Support SH73180 processor"
  144. select CPU_SH4AL_DSP
  145. config CPU_SUBTYPE_SH7343
  146. bool "Support SH7343 processor"
  147. select CPU_SH4AL_DSP
  148. endmenu
  149. menu "Memory management options"
  150. config MMU
  151. bool "Support for memory management hardware"
  152. depends on !CPU_SH2
  153. default y
  154. help
  155. Some SH processors (such as SH-2/SH-2A) lack an MMU. In order to
  156. boot on these systems, this option must not be set.
  157. On other systems (such as the SH-3 and 4) where an MMU exists,
  158. turning this off will boot the kernel on these machines with the
  159. MMU implicitly switched off.
  160. config PAGE_OFFSET
  161. hex
  162. default "0x80000000" if MMU
  163. default "0x00000000"
  164. config MEMORY_START
  165. hex "Physical memory start address"
  166. default "0x08000000"
  167. ---help---
  168. Computers built with Hitachi SuperH processors always
  169. map the ROM starting at address zero. But the processor
  170. does not specify the range that RAM takes.
  171. The physical memory (RAM) start address will be automatically
  172. set to 08000000. Other platforms, such as the Solution Engine
  173. boards typically map RAM at 0C000000.
  174. Tweak this only when porting to a new machine which does not
  175. already have a defconfig. Changing it from the known correct
  176. value on any of the known systems will only lead to disaster.
  177. config MEMORY_SIZE
  178. hex "Physical memory size"
  179. default "0x00400000"
  180. help
  181. This sets the default memory size assumed by your SH kernel. It can
  182. be overridden as normal by the 'mem=' argument on the kernel command
  183. line. If unsure, consult your board specifications or just leave it
  184. as 0x00400000 which was the default value before this became
  185. configurable.
  186. config 32BIT
  187. bool "Support 32-bit physical addressing through PMB"
  188. depends on CPU_SH4A && MMU
  189. default y
  190. help
  191. If you say Y here, physical addressing will be extended to
  192. 32-bits through the SH-4A PMB. If this is not set, legacy
  193. 29-bit physical addressing will be used.
  194. config VSYSCALL
  195. bool "Support vsyscall page"
  196. depends on MMU
  197. default y
  198. help
  199. This will enable support for the kernel mapping a vDSO page
  200. in process space, and subsequently handing down the entry point
  201. to the libc through the ELF auxiliary vector.
  202. From the kernel side this is used for the signal trampoline.
  203. For systems with an MMU that can afford to give up a page,
  204. (the default value) say Y.
  205. choice
  206. prompt "HugeTLB page size"
  207. depends on HUGETLB_PAGE && CPU_SH4 && MMU
  208. default HUGETLB_PAGE_SIZE_64K
  209. config HUGETLB_PAGE_SIZE_64K
  210. bool "64K"
  211. config HUGETLB_PAGE_SIZE_1MB
  212. bool "1MB"
  213. endchoice
  214. source "mm/Kconfig"
  215. endmenu
  216. menu "Cache configuration"
  217. config SH7705_CACHE_32KB
  218. bool "Enable 32KB cache size for SH7705"
  219. depends on CPU_SUBTYPE_SH7705
  220. default y
  221. config SH_DIRECT_MAPPED
  222. bool "Use direct-mapped caching"
  223. default n
  224. help
  225. Selecting this option will configure the caches to be direct-mapped,
  226. even if the cache supports a 2 or 4-way mode. This is useful primarily
  227. for debugging on platforms with 2 and 4-way caches (SH7750R/SH7751R,
  228. SH4-202, SH4-501, etc.)
  229. Turn this option off for platforms that do not have a direct-mapped
  230. cache, and you have no need to run the caches in such a configuration.
  231. config SH_WRITETHROUGH
  232. bool "Use write-through caching"
  233. help
  234. Selecting this option will configure the caches in write-through
  235. mode, as opposed to the default write-back configuration.
  236. Since there's sill some aliasing issues on SH-4, this option will
  237. unfortunately still require the majority of flushing functions to
  238. be implemented to deal with aliasing.
  239. If unsure, say N.
  240. config SH_OCRAM
  241. bool "Operand Cache RAM (OCRAM) support"
  242. help
  243. Selecting this option will automatically tear down the number of
  244. sets in the dcache by half, which in turn exposes a memory range.
  245. The addresses for the OC RAM base will vary according to the
  246. processor version. Consult vendor documentation for specifics.
  247. If unsure, say N.
  248. endmenu