qla_init.c 120 KB

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  1. /*
  2. * QLogic Fibre Channel HBA Driver
  3. * Copyright (c) 2003-2008 QLogic Corporation
  4. *
  5. * See LICENSE.qla2xxx for copyright and licensing details.
  6. */
  7. #include "qla_def.h"
  8. #include "qla_gbl.h"
  9. #include <linux/delay.h>
  10. #include <linux/vmalloc.h>
  11. #include "qla_devtbl.h"
  12. #ifdef CONFIG_SPARC
  13. #include <asm/prom.h>
  14. #endif
  15. /*
  16. * QLogic ISP2x00 Hardware Support Function Prototypes.
  17. */
  18. static int qla2x00_isp_firmware(scsi_qla_host_t *);
  19. static void qla2x00_resize_request_q(scsi_qla_host_t *);
  20. static int qla2x00_setup_chip(scsi_qla_host_t *);
  21. static int qla2x00_init_rings(scsi_qla_host_t *);
  22. static int qla2x00_fw_ready(scsi_qla_host_t *);
  23. static int qla2x00_configure_hba(scsi_qla_host_t *);
  24. static int qla2x00_configure_loop(scsi_qla_host_t *);
  25. static int qla2x00_configure_local_loop(scsi_qla_host_t *);
  26. static int qla2x00_configure_fabric(scsi_qla_host_t *);
  27. static int qla2x00_find_all_fabric_devs(scsi_qla_host_t *, struct list_head *);
  28. static int qla2x00_device_resync(scsi_qla_host_t *);
  29. static int qla2x00_fabric_dev_login(scsi_qla_host_t *, fc_port_t *,
  30. uint16_t *);
  31. static int qla2x00_restart_isp(scsi_qla_host_t *);
  32. static int qla2x00_find_new_loop_id(scsi_qla_host_t *, fc_port_t *);
  33. static struct qla_chip_state_84xx *qla84xx_get_chip(struct scsi_qla_host *);
  34. static int qla84xx_init_chip(scsi_qla_host_t *);
  35. static int qla25xx_init_queues(struct qla_hw_data *);
  36. /****************************************************************************/
  37. /* QLogic ISP2x00 Hardware Support Functions. */
  38. /****************************************************************************/
  39. /*
  40. * qla2x00_initialize_adapter
  41. * Initialize board.
  42. *
  43. * Input:
  44. * ha = adapter block pointer.
  45. *
  46. * Returns:
  47. * 0 = success
  48. */
  49. int
  50. qla2x00_initialize_adapter(scsi_qla_host_t *vha)
  51. {
  52. int rval;
  53. struct qla_hw_data *ha = vha->hw;
  54. struct req_que *req = ha->req_q_map[0];
  55. /* Clear adapter flags. */
  56. vha->flags.online = 0;
  57. vha->flags.reset_active = 0;
  58. atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
  59. atomic_set(&vha->loop_state, LOOP_DOWN);
  60. vha->device_flags = DFLG_NO_CABLE;
  61. vha->dpc_flags = 0;
  62. vha->flags.management_server_logged_in = 0;
  63. vha->marker_needed = 0;
  64. ha->mbx_flags = 0;
  65. ha->isp_abort_cnt = 0;
  66. ha->beacon_blink_led = 0;
  67. set_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags);
  68. set_bit(0, ha->req_qid_map);
  69. set_bit(0, ha->rsp_qid_map);
  70. qla_printk(KERN_INFO, ha, "Configuring PCI space...\n");
  71. rval = ha->isp_ops->pci_config(vha);
  72. if (rval) {
  73. DEBUG2(printk("scsi(%ld): Unable to configure PCI space.\n",
  74. vha->host_no));
  75. return (rval);
  76. }
  77. ha->isp_ops->reset_chip(vha);
  78. rval = qla2xxx_get_flash_info(vha);
  79. if (rval) {
  80. DEBUG2(printk("scsi(%ld): Unable to validate FLASH data.\n",
  81. vha->host_no));
  82. return (rval);
  83. }
  84. ha->isp_ops->get_flash_version(vha, req->ring);
  85. qla_printk(KERN_INFO, ha, "Configure NVRAM parameters...\n");
  86. ha->isp_ops->nvram_config(vha);
  87. if (ha->flags.disable_serdes) {
  88. /* Mask HBA via NVRAM settings? */
  89. qla_printk(KERN_INFO, ha, "Masking HBA WWPN "
  90. "%02x%02x%02x%02x%02x%02x%02x%02x (via NVRAM).\n",
  91. vha->port_name[0], vha->port_name[1],
  92. vha->port_name[2], vha->port_name[3],
  93. vha->port_name[4], vha->port_name[5],
  94. vha->port_name[6], vha->port_name[7]);
  95. return QLA_FUNCTION_FAILED;
  96. }
  97. qla_printk(KERN_INFO, ha, "Verifying loaded RISC code...\n");
  98. if (qla2x00_isp_firmware(vha) != QLA_SUCCESS) {
  99. rval = ha->isp_ops->chip_diag(vha);
  100. if (rval)
  101. return (rval);
  102. rval = qla2x00_setup_chip(vha);
  103. if (rval)
  104. return (rval);
  105. }
  106. if (IS_QLA84XX(ha)) {
  107. ha->cs84xx = qla84xx_get_chip(vha);
  108. if (!ha->cs84xx) {
  109. qla_printk(KERN_ERR, ha,
  110. "Unable to configure ISP84XX.\n");
  111. return QLA_FUNCTION_FAILED;
  112. }
  113. }
  114. rval = qla2x00_init_rings(vha);
  115. return (rval);
  116. }
  117. /**
  118. * qla2100_pci_config() - Setup ISP21xx PCI configuration registers.
  119. * @ha: HA context
  120. *
  121. * Returns 0 on success.
  122. */
  123. int
  124. qla2100_pci_config(scsi_qla_host_t *vha)
  125. {
  126. uint16_t w;
  127. unsigned long flags;
  128. struct qla_hw_data *ha = vha->hw;
  129. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  130. pci_set_master(ha->pdev);
  131. pci_try_set_mwi(ha->pdev);
  132. pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
  133. w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
  134. pci_write_config_word(ha->pdev, PCI_COMMAND, w);
  135. pci_disable_rom(ha->pdev);
  136. /* Get PCI bus information. */
  137. spin_lock_irqsave(&ha->hardware_lock, flags);
  138. ha->pci_attr = RD_REG_WORD(&reg->ctrl_status);
  139. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  140. return QLA_SUCCESS;
  141. }
  142. /**
  143. * qla2300_pci_config() - Setup ISP23xx PCI configuration registers.
  144. * @ha: HA context
  145. *
  146. * Returns 0 on success.
  147. */
  148. int
  149. qla2300_pci_config(scsi_qla_host_t *vha)
  150. {
  151. uint16_t w;
  152. unsigned long flags = 0;
  153. uint32_t cnt;
  154. struct qla_hw_data *ha = vha->hw;
  155. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  156. pci_set_master(ha->pdev);
  157. pci_try_set_mwi(ha->pdev);
  158. pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
  159. w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
  160. if (IS_QLA2322(ha) || IS_QLA6322(ha))
  161. w &= ~PCI_COMMAND_INTX_DISABLE;
  162. pci_write_config_word(ha->pdev, PCI_COMMAND, w);
  163. /*
  164. * If this is a 2300 card and not 2312, reset the
  165. * COMMAND_INVALIDATE due to a bug in the 2300. Unfortunately,
  166. * the 2310 also reports itself as a 2300 so we need to get the
  167. * fb revision level -- a 6 indicates it really is a 2300 and
  168. * not a 2310.
  169. */
  170. if (IS_QLA2300(ha)) {
  171. spin_lock_irqsave(&ha->hardware_lock, flags);
  172. /* Pause RISC. */
  173. WRT_REG_WORD(&reg->hccr, HCCR_PAUSE_RISC);
  174. for (cnt = 0; cnt < 30000; cnt++) {
  175. if ((RD_REG_WORD(&reg->hccr) & HCCR_RISC_PAUSE) != 0)
  176. break;
  177. udelay(10);
  178. }
  179. /* Select FPM registers. */
  180. WRT_REG_WORD(&reg->ctrl_status, 0x20);
  181. RD_REG_WORD(&reg->ctrl_status);
  182. /* Get the fb rev level */
  183. ha->fb_rev = RD_FB_CMD_REG(ha, reg);
  184. if (ha->fb_rev == FPM_2300)
  185. pci_clear_mwi(ha->pdev);
  186. /* Deselect FPM registers. */
  187. WRT_REG_WORD(&reg->ctrl_status, 0x0);
  188. RD_REG_WORD(&reg->ctrl_status);
  189. /* Release RISC module. */
  190. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  191. for (cnt = 0; cnt < 30000; cnt++) {
  192. if ((RD_REG_WORD(&reg->hccr) & HCCR_RISC_PAUSE) == 0)
  193. break;
  194. udelay(10);
  195. }
  196. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  197. }
  198. pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80);
  199. pci_disable_rom(ha->pdev);
  200. /* Get PCI bus information. */
  201. spin_lock_irqsave(&ha->hardware_lock, flags);
  202. ha->pci_attr = RD_REG_WORD(&reg->ctrl_status);
  203. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  204. return QLA_SUCCESS;
  205. }
  206. /**
  207. * qla24xx_pci_config() - Setup ISP24xx PCI configuration registers.
  208. * @ha: HA context
  209. *
  210. * Returns 0 on success.
  211. */
  212. int
  213. qla24xx_pci_config(scsi_qla_host_t *vha)
  214. {
  215. uint16_t w;
  216. unsigned long flags = 0;
  217. struct qla_hw_data *ha = vha->hw;
  218. struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
  219. pci_set_master(ha->pdev);
  220. pci_try_set_mwi(ha->pdev);
  221. pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
  222. w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
  223. w &= ~PCI_COMMAND_INTX_DISABLE;
  224. pci_write_config_word(ha->pdev, PCI_COMMAND, w);
  225. pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80);
  226. /* PCI-X -- adjust Maximum Memory Read Byte Count (2048). */
  227. if (pci_find_capability(ha->pdev, PCI_CAP_ID_PCIX))
  228. pcix_set_mmrbc(ha->pdev, 2048);
  229. /* PCIe -- adjust Maximum Read Request Size (2048). */
  230. if (pci_find_capability(ha->pdev, PCI_CAP_ID_EXP))
  231. pcie_set_readrq(ha->pdev, 2048);
  232. pci_disable_rom(ha->pdev);
  233. ha->chip_revision = ha->pdev->revision;
  234. /* Get PCI bus information. */
  235. spin_lock_irqsave(&ha->hardware_lock, flags);
  236. ha->pci_attr = RD_REG_DWORD(&reg->ctrl_status);
  237. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  238. return QLA_SUCCESS;
  239. }
  240. /**
  241. * qla25xx_pci_config() - Setup ISP25xx PCI configuration registers.
  242. * @ha: HA context
  243. *
  244. * Returns 0 on success.
  245. */
  246. int
  247. qla25xx_pci_config(scsi_qla_host_t *vha)
  248. {
  249. uint16_t w;
  250. struct qla_hw_data *ha = vha->hw;
  251. pci_set_master(ha->pdev);
  252. pci_try_set_mwi(ha->pdev);
  253. pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
  254. w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
  255. w &= ~PCI_COMMAND_INTX_DISABLE;
  256. pci_write_config_word(ha->pdev, PCI_COMMAND, w);
  257. /* PCIe -- adjust Maximum Read Request Size (2048). */
  258. if (pci_find_capability(ha->pdev, PCI_CAP_ID_EXP))
  259. pcie_set_readrq(ha->pdev, 2048);
  260. pci_disable_rom(ha->pdev);
  261. ha->chip_revision = ha->pdev->revision;
  262. return QLA_SUCCESS;
  263. }
  264. /**
  265. * qla2x00_isp_firmware() - Choose firmware image.
  266. * @ha: HA context
  267. *
  268. * Returns 0 on success.
  269. */
  270. static int
  271. qla2x00_isp_firmware(scsi_qla_host_t *vha)
  272. {
  273. int rval;
  274. uint16_t loop_id, topo, sw_cap;
  275. uint8_t domain, area, al_pa;
  276. struct qla_hw_data *ha = vha->hw;
  277. /* Assume loading risc code */
  278. rval = QLA_FUNCTION_FAILED;
  279. if (ha->flags.disable_risc_code_load) {
  280. DEBUG2(printk("scsi(%ld): RISC CODE NOT loaded\n",
  281. vha->host_no));
  282. qla_printk(KERN_INFO, ha, "RISC CODE NOT loaded\n");
  283. /* Verify checksum of loaded RISC code. */
  284. rval = qla2x00_verify_checksum(vha, ha->fw_srisc_address);
  285. if (rval == QLA_SUCCESS) {
  286. /* And, verify we are not in ROM code. */
  287. rval = qla2x00_get_adapter_id(vha, &loop_id, &al_pa,
  288. &area, &domain, &topo, &sw_cap);
  289. }
  290. }
  291. if (rval) {
  292. DEBUG2_3(printk("scsi(%ld): **** Load RISC code ****\n",
  293. vha->host_no));
  294. }
  295. return (rval);
  296. }
  297. /**
  298. * qla2x00_reset_chip() - Reset ISP chip.
  299. * @ha: HA context
  300. *
  301. * Returns 0 on success.
  302. */
  303. void
  304. qla2x00_reset_chip(scsi_qla_host_t *vha)
  305. {
  306. unsigned long flags = 0;
  307. struct qla_hw_data *ha = vha->hw;
  308. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  309. uint32_t cnt;
  310. uint16_t cmd;
  311. ha->isp_ops->disable_intrs(ha);
  312. spin_lock_irqsave(&ha->hardware_lock, flags);
  313. /* Turn off master enable */
  314. cmd = 0;
  315. pci_read_config_word(ha->pdev, PCI_COMMAND, &cmd);
  316. cmd &= ~PCI_COMMAND_MASTER;
  317. pci_write_config_word(ha->pdev, PCI_COMMAND, cmd);
  318. if (!IS_QLA2100(ha)) {
  319. /* Pause RISC. */
  320. WRT_REG_WORD(&reg->hccr, HCCR_PAUSE_RISC);
  321. if (IS_QLA2200(ha) || IS_QLA2300(ha)) {
  322. for (cnt = 0; cnt < 30000; cnt++) {
  323. if ((RD_REG_WORD(&reg->hccr) &
  324. HCCR_RISC_PAUSE) != 0)
  325. break;
  326. udelay(100);
  327. }
  328. } else {
  329. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  330. udelay(10);
  331. }
  332. /* Select FPM registers. */
  333. WRT_REG_WORD(&reg->ctrl_status, 0x20);
  334. RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
  335. /* FPM Soft Reset. */
  336. WRT_REG_WORD(&reg->fpm_diag_config, 0x100);
  337. RD_REG_WORD(&reg->fpm_diag_config); /* PCI Posting. */
  338. /* Toggle Fpm Reset. */
  339. if (!IS_QLA2200(ha)) {
  340. WRT_REG_WORD(&reg->fpm_diag_config, 0x0);
  341. RD_REG_WORD(&reg->fpm_diag_config); /* PCI Posting. */
  342. }
  343. /* Select frame buffer registers. */
  344. WRT_REG_WORD(&reg->ctrl_status, 0x10);
  345. RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
  346. /* Reset frame buffer FIFOs. */
  347. if (IS_QLA2200(ha)) {
  348. WRT_FB_CMD_REG(ha, reg, 0xa000);
  349. RD_FB_CMD_REG(ha, reg); /* PCI Posting. */
  350. } else {
  351. WRT_FB_CMD_REG(ha, reg, 0x00fc);
  352. /* Read back fb_cmd until zero or 3 seconds max */
  353. for (cnt = 0; cnt < 3000; cnt++) {
  354. if ((RD_FB_CMD_REG(ha, reg) & 0xff) == 0)
  355. break;
  356. udelay(100);
  357. }
  358. }
  359. /* Select RISC module registers. */
  360. WRT_REG_WORD(&reg->ctrl_status, 0);
  361. RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
  362. /* Reset RISC processor. */
  363. WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
  364. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  365. /* Release RISC processor. */
  366. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  367. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  368. }
  369. WRT_REG_WORD(&reg->hccr, HCCR_CLR_RISC_INT);
  370. WRT_REG_WORD(&reg->hccr, HCCR_CLR_HOST_INT);
  371. /* Reset ISP chip. */
  372. WRT_REG_WORD(&reg->ctrl_status, CSR_ISP_SOFT_RESET);
  373. /* Wait for RISC to recover from reset. */
  374. if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
  375. /*
  376. * It is necessary to for a delay here since the card doesn't
  377. * respond to PCI reads during a reset. On some architectures
  378. * this will result in an MCA.
  379. */
  380. udelay(20);
  381. for (cnt = 30000; cnt; cnt--) {
  382. if ((RD_REG_WORD(&reg->ctrl_status) &
  383. CSR_ISP_SOFT_RESET) == 0)
  384. break;
  385. udelay(100);
  386. }
  387. } else
  388. udelay(10);
  389. /* Reset RISC processor. */
  390. WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
  391. WRT_REG_WORD(&reg->semaphore, 0);
  392. /* Release RISC processor. */
  393. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  394. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  395. if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
  396. for (cnt = 0; cnt < 30000; cnt++) {
  397. if (RD_MAILBOX_REG(ha, reg, 0) != MBS_BUSY)
  398. break;
  399. udelay(100);
  400. }
  401. } else
  402. udelay(100);
  403. /* Turn on master enable */
  404. cmd |= PCI_COMMAND_MASTER;
  405. pci_write_config_word(ha->pdev, PCI_COMMAND, cmd);
  406. /* Disable RISC pause on FPM parity error. */
  407. if (!IS_QLA2100(ha)) {
  408. WRT_REG_WORD(&reg->hccr, HCCR_DISABLE_PARITY_PAUSE);
  409. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  410. }
  411. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  412. }
  413. /**
  414. * qla24xx_reset_risc() - Perform full reset of ISP24xx RISC.
  415. * @ha: HA context
  416. *
  417. * Returns 0 on success.
  418. */
  419. static inline void
  420. qla24xx_reset_risc(scsi_qla_host_t *vha)
  421. {
  422. int hw_evt = 0;
  423. unsigned long flags = 0;
  424. struct qla_hw_data *ha = vha->hw;
  425. struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
  426. uint32_t cnt, d2;
  427. uint16_t wd;
  428. spin_lock_irqsave(&ha->hardware_lock, flags);
  429. /* Reset RISC. */
  430. WRT_REG_DWORD(&reg->ctrl_status, CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
  431. for (cnt = 0; cnt < 30000; cnt++) {
  432. if ((RD_REG_DWORD(&reg->ctrl_status) & CSRX_DMA_ACTIVE) == 0)
  433. break;
  434. udelay(10);
  435. }
  436. WRT_REG_DWORD(&reg->ctrl_status,
  437. CSRX_ISP_SOFT_RESET|CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
  438. pci_read_config_word(ha->pdev, PCI_COMMAND, &wd);
  439. udelay(100);
  440. /* Wait for firmware to complete NVRAM accesses. */
  441. d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
  442. for (cnt = 10000 ; cnt && d2; cnt--) {
  443. udelay(5);
  444. d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
  445. barrier();
  446. }
  447. if (cnt == 0)
  448. hw_evt = 1;
  449. /* Wait for soft-reset to complete. */
  450. d2 = RD_REG_DWORD(&reg->ctrl_status);
  451. for (cnt = 6000000 ; cnt && (d2 & CSRX_ISP_SOFT_RESET); cnt--) {
  452. udelay(5);
  453. d2 = RD_REG_DWORD(&reg->ctrl_status);
  454. barrier();
  455. }
  456. WRT_REG_DWORD(&reg->hccr, HCCRX_SET_RISC_RESET);
  457. RD_REG_DWORD(&reg->hccr);
  458. WRT_REG_DWORD(&reg->hccr, HCCRX_REL_RISC_PAUSE);
  459. RD_REG_DWORD(&reg->hccr);
  460. WRT_REG_DWORD(&reg->hccr, HCCRX_CLR_RISC_RESET);
  461. RD_REG_DWORD(&reg->hccr);
  462. d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
  463. for (cnt = 6000000 ; cnt && d2; cnt--) {
  464. udelay(5);
  465. d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
  466. barrier();
  467. }
  468. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  469. if (IS_NOPOLLING_TYPE(ha))
  470. ha->isp_ops->enable_intrs(ha);
  471. }
  472. /**
  473. * qla24xx_reset_chip() - Reset ISP24xx chip.
  474. * @ha: HA context
  475. *
  476. * Returns 0 on success.
  477. */
  478. void
  479. qla24xx_reset_chip(scsi_qla_host_t *vha)
  480. {
  481. struct qla_hw_data *ha = vha->hw;
  482. ha->isp_ops->disable_intrs(ha);
  483. /* Perform RISC reset. */
  484. qla24xx_reset_risc(vha);
  485. }
  486. /**
  487. * qla2x00_chip_diag() - Test chip for proper operation.
  488. * @ha: HA context
  489. *
  490. * Returns 0 on success.
  491. */
  492. int
  493. qla2x00_chip_diag(scsi_qla_host_t *vha)
  494. {
  495. int rval;
  496. struct qla_hw_data *ha = vha->hw;
  497. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  498. unsigned long flags = 0;
  499. uint16_t data;
  500. uint32_t cnt;
  501. uint16_t mb[5];
  502. struct req_que *req = ha->req_q_map[0];
  503. /* Assume a failed state */
  504. rval = QLA_FUNCTION_FAILED;
  505. DEBUG3(printk("scsi(%ld): Testing device at %lx.\n",
  506. vha->host_no, (u_long)&reg->flash_address));
  507. spin_lock_irqsave(&ha->hardware_lock, flags);
  508. /* Reset ISP chip. */
  509. WRT_REG_WORD(&reg->ctrl_status, CSR_ISP_SOFT_RESET);
  510. /*
  511. * We need to have a delay here since the card will not respond while
  512. * in reset causing an MCA on some architectures.
  513. */
  514. udelay(20);
  515. data = qla2x00_debounce_register(&reg->ctrl_status);
  516. for (cnt = 6000000 ; cnt && (data & CSR_ISP_SOFT_RESET); cnt--) {
  517. udelay(5);
  518. data = RD_REG_WORD(&reg->ctrl_status);
  519. barrier();
  520. }
  521. if (!cnt)
  522. goto chip_diag_failed;
  523. DEBUG3(printk("scsi(%ld): Reset register cleared by chip reset\n",
  524. ha->host_no));
  525. /* Reset RISC processor. */
  526. WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
  527. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  528. /* Workaround for QLA2312 PCI parity error */
  529. if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
  530. data = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 0));
  531. for (cnt = 6000000; cnt && (data == MBS_BUSY); cnt--) {
  532. udelay(5);
  533. data = RD_MAILBOX_REG(ha, reg, 0);
  534. barrier();
  535. }
  536. } else
  537. udelay(10);
  538. if (!cnt)
  539. goto chip_diag_failed;
  540. /* Check product ID of chip */
  541. DEBUG3(printk("scsi(%ld): Checking product ID of chip\n", ha->host_no));
  542. mb[1] = RD_MAILBOX_REG(ha, reg, 1);
  543. mb[2] = RD_MAILBOX_REG(ha, reg, 2);
  544. mb[3] = RD_MAILBOX_REG(ha, reg, 3);
  545. mb[4] = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 4));
  546. if (mb[1] != PROD_ID_1 || (mb[2] != PROD_ID_2 && mb[2] != PROD_ID_2a) ||
  547. mb[3] != PROD_ID_3) {
  548. qla_printk(KERN_WARNING, ha,
  549. "Wrong product ID = 0x%x,0x%x,0x%x\n", mb[1], mb[2], mb[3]);
  550. goto chip_diag_failed;
  551. }
  552. ha->product_id[0] = mb[1];
  553. ha->product_id[1] = mb[2];
  554. ha->product_id[2] = mb[3];
  555. ha->product_id[3] = mb[4];
  556. /* Adjust fw RISC transfer size */
  557. if (req->length > 1024)
  558. ha->fw_transfer_size = REQUEST_ENTRY_SIZE * 1024;
  559. else
  560. ha->fw_transfer_size = REQUEST_ENTRY_SIZE *
  561. req->length;
  562. if (IS_QLA2200(ha) &&
  563. RD_MAILBOX_REG(ha, reg, 7) == QLA2200A_RISC_ROM_VER) {
  564. /* Limit firmware transfer size with a 2200A */
  565. DEBUG3(printk("scsi(%ld): Found QLA2200A chip.\n",
  566. vha->host_no));
  567. ha->device_type |= DT_ISP2200A;
  568. ha->fw_transfer_size = 128;
  569. }
  570. /* Wrap Incoming Mailboxes Test. */
  571. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  572. DEBUG3(printk("scsi(%ld): Checking mailboxes.\n", vha->host_no));
  573. rval = qla2x00_mbx_reg_test(vha);
  574. if (rval) {
  575. DEBUG(printk("scsi(%ld): Failed mailbox send register test\n",
  576. vha->host_no));
  577. qla_printk(KERN_WARNING, ha,
  578. "Failed mailbox send register test\n");
  579. }
  580. else {
  581. /* Flag a successful rval */
  582. rval = QLA_SUCCESS;
  583. }
  584. spin_lock_irqsave(&ha->hardware_lock, flags);
  585. chip_diag_failed:
  586. if (rval)
  587. DEBUG2_3(printk("scsi(%ld): Chip diagnostics **** FAILED "
  588. "****\n", vha->host_no));
  589. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  590. return (rval);
  591. }
  592. /**
  593. * qla24xx_chip_diag() - Test ISP24xx for proper operation.
  594. * @ha: HA context
  595. *
  596. * Returns 0 on success.
  597. */
  598. int
  599. qla24xx_chip_diag(scsi_qla_host_t *vha)
  600. {
  601. int rval;
  602. struct qla_hw_data *ha = vha->hw;
  603. struct req_que *req = ha->req_q_map[0];
  604. /* Perform RISC reset. */
  605. qla24xx_reset_risc(vha);
  606. ha->fw_transfer_size = REQUEST_ENTRY_SIZE * req->length;
  607. rval = qla2x00_mbx_reg_test(vha);
  608. if (rval) {
  609. DEBUG(printk("scsi(%ld): Failed mailbox send register test\n",
  610. vha->host_no));
  611. qla_printk(KERN_WARNING, ha,
  612. "Failed mailbox send register test\n");
  613. } else {
  614. /* Flag a successful rval */
  615. rval = QLA_SUCCESS;
  616. }
  617. return rval;
  618. }
  619. void
  620. qla2x00_alloc_fw_dump(scsi_qla_host_t *vha)
  621. {
  622. int rval;
  623. uint32_t dump_size, fixed_size, mem_size, req_q_size, rsp_q_size,
  624. eft_size, fce_size, mq_size;
  625. dma_addr_t tc_dma;
  626. void *tc;
  627. struct qla_hw_data *ha = vha->hw;
  628. struct req_que *req = ha->req_q_map[0];
  629. struct rsp_que *rsp = ha->rsp_q_map[0];
  630. if (ha->fw_dump) {
  631. qla_printk(KERN_WARNING, ha,
  632. "Firmware dump previously allocated.\n");
  633. return;
  634. }
  635. ha->fw_dumped = 0;
  636. fixed_size = mem_size = eft_size = fce_size = mq_size = 0;
  637. if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
  638. fixed_size = sizeof(struct qla2100_fw_dump);
  639. } else if (IS_QLA23XX(ha)) {
  640. fixed_size = offsetof(struct qla2300_fw_dump, data_ram);
  641. mem_size = (ha->fw_memory_size - 0x11000 + 1) *
  642. sizeof(uint16_t);
  643. } else if (IS_FWI2_CAPABLE(ha)) {
  644. if (IS_QLA81XX(ha))
  645. fixed_size = offsetof(struct qla81xx_fw_dump, ext_mem);
  646. else if (IS_QLA25XX(ha))
  647. fixed_size = offsetof(struct qla25xx_fw_dump, ext_mem);
  648. else
  649. fixed_size = offsetof(struct qla24xx_fw_dump, ext_mem);
  650. mem_size = (ha->fw_memory_size - 0x100000 + 1) *
  651. sizeof(uint32_t);
  652. if (ha->mqenable)
  653. mq_size = sizeof(struct qla2xxx_mq_chain);
  654. /* Allocate memory for Fibre Channel Event Buffer. */
  655. if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha))
  656. goto try_eft;
  657. tc = dma_alloc_coherent(&ha->pdev->dev, FCE_SIZE, &tc_dma,
  658. GFP_KERNEL);
  659. if (!tc) {
  660. qla_printk(KERN_WARNING, ha, "Unable to allocate "
  661. "(%d KB) for FCE.\n", FCE_SIZE / 1024);
  662. goto try_eft;
  663. }
  664. memset(tc, 0, FCE_SIZE);
  665. rval = qla2x00_enable_fce_trace(vha, tc_dma, FCE_NUM_BUFFERS,
  666. ha->fce_mb, &ha->fce_bufs);
  667. if (rval) {
  668. qla_printk(KERN_WARNING, ha, "Unable to initialize "
  669. "FCE (%d).\n", rval);
  670. dma_free_coherent(&ha->pdev->dev, FCE_SIZE, tc,
  671. tc_dma);
  672. ha->flags.fce_enabled = 0;
  673. goto try_eft;
  674. }
  675. qla_printk(KERN_INFO, ha, "Allocated (%d KB) for FCE...\n",
  676. FCE_SIZE / 1024);
  677. fce_size = sizeof(struct qla2xxx_fce_chain) + EFT_SIZE;
  678. ha->flags.fce_enabled = 1;
  679. ha->fce_dma = tc_dma;
  680. ha->fce = tc;
  681. try_eft:
  682. /* Allocate memory for Extended Trace Buffer. */
  683. tc = dma_alloc_coherent(&ha->pdev->dev, EFT_SIZE, &tc_dma,
  684. GFP_KERNEL);
  685. if (!tc) {
  686. qla_printk(KERN_WARNING, ha, "Unable to allocate "
  687. "(%d KB) for EFT.\n", EFT_SIZE / 1024);
  688. goto cont_alloc;
  689. }
  690. memset(tc, 0, EFT_SIZE);
  691. rval = qla2x00_enable_eft_trace(vha, tc_dma, EFT_NUM_BUFFERS);
  692. if (rval) {
  693. qla_printk(KERN_WARNING, ha, "Unable to initialize "
  694. "EFT (%d).\n", rval);
  695. dma_free_coherent(&ha->pdev->dev, EFT_SIZE, tc,
  696. tc_dma);
  697. goto cont_alloc;
  698. }
  699. qla_printk(KERN_INFO, ha, "Allocated (%d KB) for EFT...\n",
  700. EFT_SIZE / 1024);
  701. eft_size = EFT_SIZE;
  702. ha->eft_dma = tc_dma;
  703. ha->eft = tc;
  704. }
  705. cont_alloc:
  706. req_q_size = req->length * sizeof(request_t);
  707. rsp_q_size = rsp->length * sizeof(response_t);
  708. dump_size = offsetof(struct qla2xxx_fw_dump, isp);
  709. dump_size += fixed_size + mem_size + req_q_size + rsp_q_size +
  710. eft_size;
  711. ha->chain_offset = dump_size;
  712. dump_size += mq_size + fce_size;
  713. ha->fw_dump = vmalloc(dump_size);
  714. if (!ha->fw_dump) {
  715. qla_printk(KERN_WARNING, ha, "Unable to allocate (%d KB) for "
  716. "firmware dump!!!\n", dump_size / 1024);
  717. if (ha->eft) {
  718. dma_free_coherent(&ha->pdev->dev, eft_size, ha->eft,
  719. ha->eft_dma);
  720. ha->eft = NULL;
  721. ha->eft_dma = 0;
  722. }
  723. return;
  724. }
  725. qla_printk(KERN_INFO, ha, "Allocated (%d KB) for firmware dump...\n",
  726. dump_size / 1024);
  727. ha->fw_dump_len = dump_size;
  728. ha->fw_dump->signature[0] = 'Q';
  729. ha->fw_dump->signature[1] = 'L';
  730. ha->fw_dump->signature[2] = 'G';
  731. ha->fw_dump->signature[3] = 'C';
  732. ha->fw_dump->version = __constant_htonl(1);
  733. ha->fw_dump->fixed_size = htonl(fixed_size);
  734. ha->fw_dump->mem_size = htonl(mem_size);
  735. ha->fw_dump->req_q_size = htonl(req_q_size);
  736. ha->fw_dump->rsp_q_size = htonl(rsp_q_size);
  737. ha->fw_dump->eft_size = htonl(eft_size);
  738. ha->fw_dump->eft_addr_l = htonl(LSD(ha->eft_dma));
  739. ha->fw_dump->eft_addr_h = htonl(MSD(ha->eft_dma));
  740. ha->fw_dump->header_size =
  741. htonl(offsetof(struct qla2xxx_fw_dump, isp));
  742. }
  743. /**
  744. * qla2x00_resize_request_q() - Resize request queue given available ISP memory.
  745. * @ha: HA context
  746. *
  747. * Returns 0 on success.
  748. */
  749. static void
  750. qla2x00_resize_request_q(scsi_qla_host_t *vha)
  751. {
  752. int rval;
  753. uint16_t fw_iocb_cnt = 0;
  754. uint16_t request_q_length = REQUEST_ENTRY_CNT_2XXX_EXT_MEM;
  755. dma_addr_t request_dma;
  756. request_t *request_ring;
  757. struct qla_hw_data *ha = vha->hw;
  758. struct req_que *req = ha->req_q_map[0];
  759. /* Valid only on recent ISPs. */
  760. if (IS_QLA2100(ha) || IS_QLA2200(ha))
  761. return;
  762. /* Retrieve IOCB counts available to the firmware. */
  763. rval = qla2x00_get_resource_cnts(vha, NULL, NULL, NULL, &fw_iocb_cnt,
  764. &ha->max_npiv_vports);
  765. if (rval)
  766. return;
  767. /* No point in continuing if current settings are sufficient. */
  768. if (fw_iocb_cnt < 1024)
  769. return;
  770. if (req->length >= request_q_length)
  771. return;
  772. /* Attempt to claim larger area for request queue. */
  773. request_ring = dma_alloc_coherent(&ha->pdev->dev,
  774. (request_q_length + 1) * sizeof(request_t), &request_dma,
  775. GFP_KERNEL);
  776. if (request_ring == NULL)
  777. return;
  778. /* Resize successful, report extensions. */
  779. qla_printk(KERN_INFO, ha, "Extended memory detected (%d KB)...\n",
  780. (ha->fw_memory_size + 1) / 1024);
  781. qla_printk(KERN_INFO, ha, "Resizing request queue depth "
  782. "(%d -> %d)...\n", req->length, request_q_length);
  783. /* Clear old allocations. */
  784. dma_free_coherent(&ha->pdev->dev,
  785. (req->length + 1) * sizeof(request_t), req->ring,
  786. req->dma);
  787. /* Begin using larger queue. */
  788. req->length = request_q_length;
  789. req->ring = request_ring;
  790. req->dma = request_dma;
  791. }
  792. /**
  793. * qla2x00_setup_chip() - Load and start RISC firmware.
  794. * @ha: HA context
  795. *
  796. * Returns 0 on success.
  797. */
  798. static int
  799. qla2x00_setup_chip(scsi_qla_host_t *vha)
  800. {
  801. int rval;
  802. uint32_t srisc_address = 0;
  803. struct qla_hw_data *ha = vha->hw;
  804. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  805. unsigned long flags;
  806. if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) {
  807. /* Disable SRAM, Instruction RAM and GP RAM parity. */
  808. spin_lock_irqsave(&ha->hardware_lock, flags);
  809. WRT_REG_WORD(&reg->hccr, (HCCR_ENABLE_PARITY + 0x0));
  810. RD_REG_WORD(&reg->hccr);
  811. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  812. }
  813. /* Load firmware sequences */
  814. rval = ha->isp_ops->load_risc(vha, &srisc_address);
  815. if (rval == QLA_SUCCESS) {
  816. DEBUG(printk("scsi(%ld): Verifying Checksum of loaded RISC "
  817. "code.\n", vha->host_no));
  818. rval = qla2x00_verify_checksum(vha, srisc_address);
  819. if (rval == QLA_SUCCESS) {
  820. /* Start firmware execution. */
  821. DEBUG(printk("scsi(%ld): Checksum OK, start "
  822. "firmware.\n", vha->host_no));
  823. rval = qla2x00_execute_fw(vha, srisc_address);
  824. /* Retrieve firmware information. */
  825. if (rval == QLA_SUCCESS && ha->fw_major_version == 0) {
  826. qla2x00_get_fw_version(vha,
  827. &ha->fw_major_version,
  828. &ha->fw_minor_version,
  829. &ha->fw_subminor_version,
  830. &ha->fw_attributes, &ha->fw_memory_size,
  831. ha->mpi_version, &ha->mpi_capabilities);
  832. ha->flags.npiv_supported = 0;
  833. if (IS_QLA2XXX_MIDTYPE(ha) &&
  834. (ha->fw_attributes & BIT_2)) {
  835. ha->flags.npiv_supported = 1;
  836. if ((!ha->max_npiv_vports) ||
  837. ((ha->max_npiv_vports + 1) %
  838. MIN_MULTI_ID_FABRIC))
  839. ha->max_npiv_vports =
  840. MIN_MULTI_ID_FABRIC - 1;
  841. }
  842. qla2x00_resize_request_q(vha);
  843. if (ql2xallocfwdump)
  844. qla2x00_alloc_fw_dump(vha);
  845. }
  846. } else {
  847. DEBUG2(printk(KERN_INFO
  848. "scsi(%ld): ISP Firmware failed checksum.\n",
  849. vha->host_no));
  850. }
  851. }
  852. if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) {
  853. /* Enable proper parity. */
  854. spin_lock_irqsave(&ha->hardware_lock, flags);
  855. if (IS_QLA2300(ha))
  856. /* SRAM parity */
  857. WRT_REG_WORD(&reg->hccr, HCCR_ENABLE_PARITY + 0x1);
  858. else
  859. /* SRAM, Instruction RAM and GP RAM parity */
  860. WRT_REG_WORD(&reg->hccr, HCCR_ENABLE_PARITY + 0x7);
  861. RD_REG_WORD(&reg->hccr);
  862. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  863. }
  864. if (rval) {
  865. DEBUG2_3(printk("scsi(%ld): Setup chip **** FAILED ****.\n",
  866. vha->host_no));
  867. }
  868. return (rval);
  869. }
  870. /**
  871. * qla2x00_init_response_q_entries() - Initializes response queue entries.
  872. * @ha: HA context
  873. *
  874. * Beginning of request ring has initialization control block already built
  875. * by nvram config routine.
  876. *
  877. * Returns 0 on success.
  878. */
  879. void
  880. qla2x00_init_response_q_entries(struct rsp_que *rsp)
  881. {
  882. uint16_t cnt;
  883. response_t *pkt;
  884. pkt = rsp->ring_ptr;
  885. for (cnt = 0; cnt < rsp->length; cnt++) {
  886. pkt->signature = RESPONSE_PROCESSED;
  887. pkt++;
  888. }
  889. }
  890. /**
  891. * qla2x00_update_fw_options() - Read and process firmware options.
  892. * @ha: HA context
  893. *
  894. * Returns 0 on success.
  895. */
  896. void
  897. qla2x00_update_fw_options(scsi_qla_host_t *vha)
  898. {
  899. uint16_t swing, emphasis, tx_sens, rx_sens;
  900. struct qla_hw_data *ha = vha->hw;
  901. memset(ha->fw_options, 0, sizeof(ha->fw_options));
  902. qla2x00_get_fw_options(vha, ha->fw_options);
  903. if (IS_QLA2100(ha) || IS_QLA2200(ha))
  904. return;
  905. /* Serial Link options. */
  906. DEBUG3(printk("scsi(%ld): Serial link options:\n",
  907. vha->host_no));
  908. DEBUG3(qla2x00_dump_buffer((uint8_t *)&ha->fw_seriallink_options,
  909. sizeof(ha->fw_seriallink_options)));
  910. ha->fw_options[1] &= ~FO1_SET_EMPHASIS_SWING;
  911. if (ha->fw_seriallink_options[3] & BIT_2) {
  912. ha->fw_options[1] |= FO1_SET_EMPHASIS_SWING;
  913. /* 1G settings */
  914. swing = ha->fw_seriallink_options[2] & (BIT_2 | BIT_1 | BIT_0);
  915. emphasis = (ha->fw_seriallink_options[2] &
  916. (BIT_4 | BIT_3)) >> 3;
  917. tx_sens = ha->fw_seriallink_options[0] &
  918. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  919. rx_sens = (ha->fw_seriallink_options[0] &
  920. (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4;
  921. ha->fw_options[10] = (emphasis << 14) | (swing << 8);
  922. if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
  923. if (rx_sens == 0x0)
  924. rx_sens = 0x3;
  925. ha->fw_options[10] |= (tx_sens << 4) | rx_sens;
  926. } else if (IS_QLA2322(ha) || IS_QLA6322(ha))
  927. ha->fw_options[10] |= BIT_5 |
  928. ((rx_sens & (BIT_1 | BIT_0)) << 2) |
  929. (tx_sens & (BIT_1 | BIT_0));
  930. /* 2G settings */
  931. swing = (ha->fw_seriallink_options[2] &
  932. (BIT_7 | BIT_6 | BIT_5)) >> 5;
  933. emphasis = ha->fw_seriallink_options[3] & (BIT_1 | BIT_0);
  934. tx_sens = ha->fw_seriallink_options[1] &
  935. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  936. rx_sens = (ha->fw_seriallink_options[1] &
  937. (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4;
  938. ha->fw_options[11] = (emphasis << 14) | (swing << 8);
  939. if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
  940. if (rx_sens == 0x0)
  941. rx_sens = 0x3;
  942. ha->fw_options[11] |= (tx_sens << 4) | rx_sens;
  943. } else if (IS_QLA2322(ha) || IS_QLA6322(ha))
  944. ha->fw_options[11] |= BIT_5 |
  945. ((rx_sens & (BIT_1 | BIT_0)) << 2) |
  946. (tx_sens & (BIT_1 | BIT_0));
  947. }
  948. /* FCP2 options. */
  949. /* Return command IOCBs without waiting for an ABTS to complete. */
  950. ha->fw_options[3] |= BIT_13;
  951. /* LED scheme. */
  952. if (ha->flags.enable_led_scheme)
  953. ha->fw_options[2] |= BIT_12;
  954. /* Detect ISP6312. */
  955. if (IS_QLA6312(ha))
  956. ha->fw_options[2] |= BIT_13;
  957. /* Update firmware options. */
  958. qla2x00_set_fw_options(vha, ha->fw_options);
  959. }
  960. void
  961. qla24xx_update_fw_options(scsi_qla_host_t *vha)
  962. {
  963. int rval;
  964. struct qla_hw_data *ha = vha->hw;
  965. /* Update Serial Link options. */
  966. if ((le16_to_cpu(ha->fw_seriallink_options24[0]) & BIT_0) == 0)
  967. return;
  968. rval = qla2x00_set_serdes_params(vha,
  969. le16_to_cpu(ha->fw_seriallink_options24[1]),
  970. le16_to_cpu(ha->fw_seriallink_options24[2]),
  971. le16_to_cpu(ha->fw_seriallink_options24[3]));
  972. if (rval != QLA_SUCCESS) {
  973. qla_printk(KERN_WARNING, ha,
  974. "Unable to update Serial Link options (%x).\n", rval);
  975. }
  976. }
  977. void
  978. qla2x00_config_rings(struct scsi_qla_host *vha)
  979. {
  980. struct qla_hw_data *ha = vha->hw;
  981. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  982. struct req_que *req = ha->req_q_map[0];
  983. struct rsp_que *rsp = ha->rsp_q_map[0];
  984. /* Setup ring parameters in initialization control block. */
  985. ha->init_cb->request_q_outpointer = __constant_cpu_to_le16(0);
  986. ha->init_cb->response_q_inpointer = __constant_cpu_to_le16(0);
  987. ha->init_cb->request_q_length = cpu_to_le16(req->length);
  988. ha->init_cb->response_q_length = cpu_to_le16(rsp->length);
  989. ha->init_cb->request_q_address[0] = cpu_to_le32(LSD(req->dma));
  990. ha->init_cb->request_q_address[1] = cpu_to_le32(MSD(req->dma));
  991. ha->init_cb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma));
  992. ha->init_cb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma));
  993. WRT_REG_WORD(ISP_REQ_Q_IN(ha, reg), 0);
  994. WRT_REG_WORD(ISP_REQ_Q_OUT(ha, reg), 0);
  995. WRT_REG_WORD(ISP_RSP_Q_IN(ha, reg), 0);
  996. WRT_REG_WORD(ISP_RSP_Q_OUT(ha, reg), 0);
  997. RD_REG_WORD(ISP_RSP_Q_OUT(ha, reg)); /* PCI Posting. */
  998. }
  999. void
  1000. qla24xx_config_rings(struct scsi_qla_host *vha)
  1001. {
  1002. struct qla_hw_data *ha = vha->hw;
  1003. device_reg_t __iomem *reg = ISP_QUE_REG(ha, 0);
  1004. struct device_reg_2xxx __iomem *ioreg = &ha->iobase->isp;
  1005. struct qla_msix_entry *msix;
  1006. struct init_cb_24xx *icb;
  1007. uint16_t rid = 0;
  1008. struct req_que *req = ha->req_q_map[0];
  1009. struct rsp_que *rsp = ha->rsp_q_map[0];
  1010. /* Setup ring parameters in initialization control block. */
  1011. icb = (struct init_cb_24xx *)ha->init_cb;
  1012. icb->request_q_outpointer = __constant_cpu_to_le16(0);
  1013. icb->response_q_inpointer = __constant_cpu_to_le16(0);
  1014. icb->request_q_length = cpu_to_le16(req->length);
  1015. icb->response_q_length = cpu_to_le16(rsp->length);
  1016. icb->request_q_address[0] = cpu_to_le32(LSD(req->dma));
  1017. icb->request_q_address[1] = cpu_to_le32(MSD(req->dma));
  1018. icb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma));
  1019. icb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma));
  1020. if (ha->mqenable) {
  1021. icb->qos = __constant_cpu_to_le16(QLA_DEFAULT_QUE_QOS);
  1022. icb->rid = __constant_cpu_to_le16(rid);
  1023. if (ha->flags.msix_enabled) {
  1024. msix = &ha->msix_entries[1];
  1025. DEBUG2_17(printk(KERN_INFO
  1026. "Reistering vector 0x%x for base que\n", msix->entry));
  1027. icb->msix = cpu_to_le16(msix->entry);
  1028. }
  1029. /* Use alternate PCI bus number */
  1030. if (MSB(rid))
  1031. icb->firmware_options_2 |=
  1032. __constant_cpu_to_le32(BIT_19);
  1033. /* Use alternate PCI devfn */
  1034. if (LSB(rid))
  1035. icb->firmware_options_2 |=
  1036. __constant_cpu_to_le32(BIT_18);
  1037. icb->firmware_options_2 &= __constant_cpu_to_le32(~BIT_22);
  1038. icb->firmware_options_2 |= __constant_cpu_to_le32(BIT_23);
  1039. WRT_REG_DWORD(&reg->isp25mq.req_q_in, 0);
  1040. WRT_REG_DWORD(&reg->isp25mq.req_q_out, 0);
  1041. WRT_REG_DWORD(&reg->isp25mq.rsp_q_in, 0);
  1042. WRT_REG_DWORD(&reg->isp25mq.rsp_q_out, 0);
  1043. } else {
  1044. WRT_REG_DWORD(&reg->isp24.req_q_in, 0);
  1045. WRT_REG_DWORD(&reg->isp24.req_q_out, 0);
  1046. WRT_REG_DWORD(&reg->isp24.rsp_q_in, 0);
  1047. WRT_REG_DWORD(&reg->isp24.rsp_q_out, 0);
  1048. }
  1049. /* PCI posting */
  1050. RD_REG_DWORD(&ioreg->hccr);
  1051. }
  1052. /**
  1053. * qla2x00_init_rings() - Initializes firmware.
  1054. * @ha: HA context
  1055. *
  1056. * Beginning of request ring has initialization control block already built
  1057. * by nvram config routine.
  1058. *
  1059. * Returns 0 on success.
  1060. */
  1061. static int
  1062. qla2x00_init_rings(scsi_qla_host_t *vha)
  1063. {
  1064. int rval;
  1065. unsigned long flags = 0;
  1066. int cnt, que;
  1067. struct qla_hw_data *ha = vha->hw;
  1068. struct req_que *req;
  1069. struct rsp_que *rsp;
  1070. struct scsi_qla_host *vp;
  1071. struct mid_init_cb_24xx *mid_init_cb =
  1072. (struct mid_init_cb_24xx *) ha->init_cb;
  1073. spin_lock_irqsave(&ha->hardware_lock, flags);
  1074. /* Clear outstanding commands array. */
  1075. for (que = 0; que < ha->max_queues; que++) {
  1076. req = ha->req_q_map[que];
  1077. if (!req)
  1078. continue;
  1079. for (cnt = 0; cnt < MAX_OUTSTANDING_COMMANDS; cnt++)
  1080. req->outstanding_cmds[cnt] = NULL;
  1081. req->current_outstanding_cmd = 0;
  1082. /* Initialize firmware. */
  1083. req->ring_ptr = req->ring;
  1084. req->ring_index = 0;
  1085. req->cnt = req->length;
  1086. }
  1087. for (que = 0; que < ha->max_queues; que++) {
  1088. rsp = ha->rsp_q_map[que];
  1089. if (!rsp)
  1090. continue;
  1091. rsp->ring_ptr = rsp->ring;
  1092. rsp->ring_index = 0;
  1093. /* Initialize response queue entries */
  1094. qla2x00_init_response_q_entries(rsp);
  1095. }
  1096. /* Clear RSCN queue. */
  1097. list_for_each_entry(vp, &ha->vp_list, list) {
  1098. vp->rscn_in_ptr = 0;
  1099. vp->rscn_out_ptr = 0;
  1100. }
  1101. ha->isp_ops->config_rings(vha);
  1102. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  1103. /* Update any ISP specific firmware options before initialization. */
  1104. ha->isp_ops->update_fw_options(vha);
  1105. DEBUG(printk("scsi(%ld): Issue init firmware.\n", vha->host_no));
  1106. if (ha->flags.npiv_supported)
  1107. mid_init_cb->count = cpu_to_le16(ha->max_npiv_vports);
  1108. mid_init_cb->options = __constant_cpu_to_le16(BIT_1);
  1109. rval = qla2x00_init_firmware(vha, ha->init_cb_size);
  1110. if (rval) {
  1111. DEBUG2_3(printk("scsi(%ld): Init firmware **** FAILED ****.\n",
  1112. vha->host_no));
  1113. } else {
  1114. DEBUG3(printk("scsi(%ld): Init firmware -- success.\n",
  1115. vha->host_no));
  1116. }
  1117. return (rval);
  1118. }
  1119. /**
  1120. * qla2x00_fw_ready() - Waits for firmware ready.
  1121. * @ha: HA context
  1122. *
  1123. * Returns 0 on success.
  1124. */
  1125. static int
  1126. qla2x00_fw_ready(scsi_qla_host_t *vha)
  1127. {
  1128. int rval;
  1129. unsigned long wtime, mtime, cs84xx_time;
  1130. uint16_t min_wait; /* Minimum wait time if loop is down */
  1131. uint16_t wait_time; /* Wait time if loop is coming ready */
  1132. uint16_t state[3];
  1133. struct qla_hw_data *ha = vha->hw;
  1134. rval = QLA_SUCCESS;
  1135. /* 20 seconds for loop down. */
  1136. min_wait = 20;
  1137. /*
  1138. * Firmware should take at most one RATOV to login, plus 5 seconds for
  1139. * our own processing.
  1140. */
  1141. if ((wait_time = (ha->retry_count*ha->login_timeout) + 5) < min_wait) {
  1142. wait_time = min_wait;
  1143. }
  1144. /* Min wait time if loop down */
  1145. mtime = jiffies + (min_wait * HZ);
  1146. /* wait time before firmware ready */
  1147. wtime = jiffies + (wait_time * HZ);
  1148. /* Wait for ISP to finish LIP */
  1149. if (!vha->flags.init_done)
  1150. qla_printk(KERN_INFO, ha, "Waiting for LIP to complete...\n");
  1151. DEBUG3(printk("scsi(%ld): Waiting for LIP to complete...\n",
  1152. vha->host_no));
  1153. do {
  1154. rval = qla2x00_get_firmware_state(vha, state);
  1155. if (rval == QLA_SUCCESS) {
  1156. if (state[0] < FSTATE_LOSS_OF_SYNC) {
  1157. vha->device_flags &= ~DFLG_NO_CABLE;
  1158. }
  1159. if (IS_QLA84XX(ha) && state[0] != FSTATE_READY) {
  1160. DEBUG16(printk("scsi(%ld): fw_state=%x "
  1161. "84xx=%x.\n", vha->host_no, state[0],
  1162. state[2]));
  1163. if ((state[2] & FSTATE_LOGGED_IN) &&
  1164. (state[2] & FSTATE_WAITING_FOR_VERIFY)) {
  1165. DEBUG16(printk("scsi(%ld): Sending "
  1166. "verify iocb.\n", vha->host_no));
  1167. cs84xx_time = jiffies;
  1168. rval = qla84xx_init_chip(vha);
  1169. if (rval != QLA_SUCCESS)
  1170. break;
  1171. /* Add time taken to initialize. */
  1172. cs84xx_time = jiffies - cs84xx_time;
  1173. wtime += cs84xx_time;
  1174. mtime += cs84xx_time;
  1175. DEBUG16(printk("scsi(%ld): Increasing "
  1176. "wait time by %ld. New time %ld\n",
  1177. vha->host_no, cs84xx_time, wtime));
  1178. }
  1179. } else if (state[0] == FSTATE_READY) {
  1180. DEBUG(printk("scsi(%ld): F/W Ready - OK \n",
  1181. vha->host_no));
  1182. qla2x00_get_retry_cnt(vha, &ha->retry_count,
  1183. &ha->login_timeout, &ha->r_a_tov);
  1184. rval = QLA_SUCCESS;
  1185. break;
  1186. }
  1187. rval = QLA_FUNCTION_FAILED;
  1188. if (atomic_read(&vha->loop_down_timer) &&
  1189. state[0] != FSTATE_READY) {
  1190. /* Loop down. Timeout on min_wait for states
  1191. * other than Wait for Login.
  1192. */
  1193. if (time_after_eq(jiffies, mtime)) {
  1194. qla_printk(KERN_INFO, ha,
  1195. "Cable is unplugged...\n");
  1196. vha->device_flags |= DFLG_NO_CABLE;
  1197. break;
  1198. }
  1199. }
  1200. } else {
  1201. /* Mailbox cmd failed. Timeout on min_wait. */
  1202. if (time_after_eq(jiffies, mtime))
  1203. break;
  1204. }
  1205. if (time_after_eq(jiffies, wtime))
  1206. break;
  1207. /* Delay for a while */
  1208. msleep(500);
  1209. DEBUG3(printk("scsi(%ld): fw_state=%x curr time=%lx.\n",
  1210. vha->host_no, state[0], jiffies));
  1211. } while (1);
  1212. DEBUG(printk("scsi(%ld): fw_state=%x curr time=%lx.\n",
  1213. vha->host_no, state[0], jiffies));
  1214. if (rval) {
  1215. DEBUG2_3(printk("scsi(%ld): Firmware ready **** FAILED ****.\n",
  1216. vha->host_no));
  1217. }
  1218. return (rval);
  1219. }
  1220. /*
  1221. * qla2x00_configure_hba
  1222. * Setup adapter context.
  1223. *
  1224. * Input:
  1225. * ha = adapter state pointer.
  1226. *
  1227. * Returns:
  1228. * 0 = success
  1229. *
  1230. * Context:
  1231. * Kernel context.
  1232. */
  1233. static int
  1234. qla2x00_configure_hba(scsi_qla_host_t *vha)
  1235. {
  1236. int rval;
  1237. uint16_t loop_id;
  1238. uint16_t topo;
  1239. uint16_t sw_cap;
  1240. uint8_t al_pa;
  1241. uint8_t area;
  1242. uint8_t domain;
  1243. char connect_type[22];
  1244. struct qla_hw_data *ha = vha->hw;
  1245. /* Get host addresses. */
  1246. rval = qla2x00_get_adapter_id(vha,
  1247. &loop_id, &al_pa, &area, &domain, &topo, &sw_cap);
  1248. if (rval != QLA_SUCCESS) {
  1249. if (LOOP_TRANSITION(vha) || atomic_read(&ha->loop_down_timer) ||
  1250. (rval == QLA_COMMAND_ERROR && loop_id == 0x7)) {
  1251. DEBUG2(printk("%s(%ld) Loop is in a transition state\n",
  1252. __func__, vha->host_no));
  1253. } else {
  1254. qla_printk(KERN_WARNING, ha,
  1255. "ERROR -- Unable to get host loop ID.\n");
  1256. set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
  1257. }
  1258. return (rval);
  1259. }
  1260. if (topo == 4) {
  1261. qla_printk(KERN_INFO, ha,
  1262. "Cannot get topology - retrying.\n");
  1263. return (QLA_FUNCTION_FAILED);
  1264. }
  1265. vha->loop_id = loop_id;
  1266. /* initialize */
  1267. ha->min_external_loopid = SNS_FIRST_LOOP_ID;
  1268. ha->operating_mode = LOOP;
  1269. ha->switch_cap = 0;
  1270. switch (topo) {
  1271. case 0:
  1272. DEBUG3(printk("scsi(%ld): HBA in NL topology.\n",
  1273. vha->host_no));
  1274. ha->current_topology = ISP_CFG_NL;
  1275. strcpy(connect_type, "(Loop)");
  1276. break;
  1277. case 1:
  1278. DEBUG3(printk("scsi(%ld): HBA in FL topology.\n",
  1279. vha->host_no));
  1280. ha->switch_cap = sw_cap;
  1281. ha->current_topology = ISP_CFG_FL;
  1282. strcpy(connect_type, "(FL_Port)");
  1283. break;
  1284. case 2:
  1285. DEBUG3(printk("scsi(%ld): HBA in N P2P topology.\n",
  1286. vha->host_no));
  1287. ha->operating_mode = P2P;
  1288. ha->current_topology = ISP_CFG_N;
  1289. strcpy(connect_type, "(N_Port-to-N_Port)");
  1290. break;
  1291. case 3:
  1292. DEBUG3(printk("scsi(%ld): HBA in F P2P topology.\n",
  1293. vha->host_no));
  1294. ha->switch_cap = sw_cap;
  1295. ha->operating_mode = P2P;
  1296. ha->current_topology = ISP_CFG_F;
  1297. strcpy(connect_type, "(F_Port)");
  1298. break;
  1299. default:
  1300. DEBUG3(printk("scsi(%ld): HBA in unknown topology %x. "
  1301. "Using NL.\n",
  1302. vha->host_no, topo));
  1303. ha->current_topology = ISP_CFG_NL;
  1304. strcpy(connect_type, "(Loop)");
  1305. break;
  1306. }
  1307. /* Save Host port and loop ID. */
  1308. /* byte order - Big Endian */
  1309. vha->d_id.b.domain = domain;
  1310. vha->d_id.b.area = area;
  1311. vha->d_id.b.al_pa = al_pa;
  1312. if (!vha->flags.init_done)
  1313. qla_printk(KERN_INFO, ha,
  1314. "Topology - %s, Host Loop address 0x%x\n",
  1315. connect_type, vha->loop_id);
  1316. if (rval) {
  1317. DEBUG2_3(printk("scsi(%ld): FAILED.\n", vha->host_no));
  1318. } else {
  1319. DEBUG3(printk("scsi(%ld): exiting normally.\n", vha->host_no));
  1320. }
  1321. return(rval);
  1322. }
  1323. static inline void
  1324. qla2x00_set_model_info(scsi_qla_host_t *vha, uint8_t *model, size_t len,
  1325. char *def)
  1326. {
  1327. char *st, *en;
  1328. uint16_t index;
  1329. struct qla_hw_data *ha = vha->hw;
  1330. if (memcmp(model, BINZERO, len) != 0) {
  1331. strncpy(ha->model_number, model, len);
  1332. st = en = ha->model_number;
  1333. en += len - 1;
  1334. while (en > st) {
  1335. if (*en != 0x20 && *en != 0x00)
  1336. break;
  1337. *en-- = '\0';
  1338. }
  1339. index = (ha->pdev->subsystem_device & 0xff);
  1340. if (ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC &&
  1341. index < QLA_MODEL_NAMES)
  1342. strncpy(ha->model_desc,
  1343. qla2x00_model_name[index * 2 + 1],
  1344. sizeof(ha->model_desc) - 1);
  1345. } else {
  1346. index = (ha->pdev->subsystem_device & 0xff);
  1347. if (ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC &&
  1348. index < QLA_MODEL_NAMES) {
  1349. strcpy(ha->model_number,
  1350. qla2x00_model_name[index * 2]);
  1351. strncpy(ha->model_desc,
  1352. qla2x00_model_name[index * 2 + 1],
  1353. sizeof(ha->model_desc) - 1);
  1354. } else {
  1355. strcpy(ha->model_number, def);
  1356. }
  1357. }
  1358. if (IS_FWI2_CAPABLE(ha))
  1359. qla2xxx_get_vpd_field(vha, "\x82", ha->model_desc,
  1360. sizeof(ha->model_desc));
  1361. }
  1362. /* On sparc systems, obtain port and node WWN from firmware
  1363. * properties.
  1364. */
  1365. static void qla2xxx_nvram_wwn_from_ofw(scsi_qla_host_t *vha, nvram_t *nv)
  1366. {
  1367. #ifdef CONFIG_SPARC
  1368. struct qla_hw_data *ha = vha->hw;
  1369. struct pci_dev *pdev = ha->pdev;
  1370. struct device_node *dp = pci_device_to_OF_node(pdev);
  1371. const u8 *val;
  1372. int len;
  1373. val = of_get_property(dp, "port-wwn", &len);
  1374. if (val && len >= WWN_SIZE)
  1375. memcpy(nv->port_name, val, WWN_SIZE);
  1376. val = of_get_property(dp, "node-wwn", &len);
  1377. if (val && len >= WWN_SIZE)
  1378. memcpy(nv->node_name, val, WWN_SIZE);
  1379. #endif
  1380. }
  1381. /*
  1382. * NVRAM configuration for ISP 2xxx
  1383. *
  1384. * Input:
  1385. * ha = adapter block pointer.
  1386. *
  1387. * Output:
  1388. * initialization control block in response_ring
  1389. * host adapters parameters in host adapter block
  1390. *
  1391. * Returns:
  1392. * 0 = success.
  1393. */
  1394. int
  1395. qla2x00_nvram_config(scsi_qla_host_t *vha)
  1396. {
  1397. int rval;
  1398. uint8_t chksum = 0;
  1399. uint16_t cnt;
  1400. uint8_t *dptr1, *dptr2;
  1401. struct qla_hw_data *ha = vha->hw;
  1402. init_cb_t *icb = ha->init_cb;
  1403. nvram_t *nv = ha->nvram;
  1404. uint8_t *ptr = ha->nvram;
  1405. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  1406. rval = QLA_SUCCESS;
  1407. /* Determine NVRAM starting address. */
  1408. ha->nvram_size = sizeof(nvram_t);
  1409. ha->nvram_base = 0;
  1410. if (!IS_QLA2100(ha) && !IS_QLA2200(ha) && !IS_QLA2300(ha))
  1411. if ((RD_REG_WORD(&reg->ctrl_status) >> 14) == 1)
  1412. ha->nvram_base = 0x80;
  1413. /* Get NVRAM data and calculate checksum. */
  1414. ha->isp_ops->read_nvram(vha, ptr, ha->nvram_base, ha->nvram_size);
  1415. for (cnt = 0, chksum = 0; cnt < ha->nvram_size; cnt++)
  1416. chksum += *ptr++;
  1417. DEBUG5(printk("scsi(%ld): Contents of NVRAM\n", vha->host_no));
  1418. DEBUG5(qla2x00_dump_buffer((uint8_t *)nv, ha->nvram_size));
  1419. /* Bad NVRAM data, set defaults parameters. */
  1420. if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' ||
  1421. nv->id[2] != 'P' || nv->id[3] != ' ' || nv->nvram_version < 1) {
  1422. /* Reset NVRAM data. */
  1423. qla_printk(KERN_WARNING, ha, "Inconsistent NVRAM detected: "
  1424. "checksum=0x%x id=%c version=0x%x.\n", chksum, nv->id[0],
  1425. nv->nvram_version);
  1426. qla_printk(KERN_WARNING, ha, "Falling back to functioning (yet "
  1427. "invalid -- WWPN) defaults.\n");
  1428. /*
  1429. * Set default initialization control block.
  1430. */
  1431. memset(nv, 0, ha->nvram_size);
  1432. nv->parameter_block_version = ICB_VERSION;
  1433. if (IS_QLA23XX(ha)) {
  1434. nv->firmware_options[0] = BIT_2 | BIT_1;
  1435. nv->firmware_options[1] = BIT_7 | BIT_5;
  1436. nv->add_firmware_options[0] = BIT_5;
  1437. nv->add_firmware_options[1] = BIT_5 | BIT_4;
  1438. nv->frame_payload_size = __constant_cpu_to_le16(2048);
  1439. nv->special_options[1] = BIT_7;
  1440. } else if (IS_QLA2200(ha)) {
  1441. nv->firmware_options[0] = BIT_2 | BIT_1;
  1442. nv->firmware_options[1] = BIT_7 | BIT_5;
  1443. nv->add_firmware_options[0] = BIT_5;
  1444. nv->add_firmware_options[1] = BIT_5 | BIT_4;
  1445. nv->frame_payload_size = __constant_cpu_to_le16(1024);
  1446. } else if (IS_QLA2100(ha)) {
  1447. nv->firmware_options[0] = BIT_3 | BIT_1;
  1448. nv->firmware_options[1] = BIT_5;
  1449. nv->frame_payload_size = __constant_cpu_to_le16(1024);
  1450. }
  1451. nv->max_iocb_allocation = __constant_cpu_to_le16(256);
  1452. nv->execution_throttle = __constant_cpu_to_le16(16);
  1453. nv->retry_count = 8;
  1454. nv->retry_delay = 1;
  1455. nv->port_name[0] = 33;
  1456. nv->port_name[3] = 224;
  1457. nv->port_name[4] = 139;
  1458. qla2xxx_nvram_wwn_from_ofw(vha, nv);
  1459. nv->login_timeout = 4;
  1460. /*
  1461. * Set default host adapter parameters
  1462. */
  1463. nv->host_p[1] = BIT_2;
  1464. nv->reset_delay = 5;
  1465. nv->port_down_retry_count = 8;
  1466. nv->max_luns_per_target = __constant_cpu_to_le16(8);
  1467. nv->link_down_timeout = 60;
  1468. rval = 1;
  1469. }
  1470. #if defined(CONFIG_IA64_GENERIC) || defined(CONFIG_IA64_SGI_SN2)
  1471. /*
  1472. * The SN2 does not provide BIOS emulation which means you can't change
  1473. * potentially bogus BIOS settings. Force the use of default settings
  1474. * for link rate and frame size. Hope that the rest of the settings
  1475. * are valid.
  1476. */
  1477. if (ia64_platform_is("sn2")) {
  1478. nv->frame_payload_size = __constant_cpu_to_le16(2048);
  1479. if (IS_QLA23XX(ha))
  1480. nv->special_options[1] = BIT_7;
  1481. }
  1482. #endif
  1483. /* Reset Initialization control block */
  1484. memset(icb, 0, ha->init_cb_size);
  1485. /*
  1486. * Setup driver NVRAM options.
  1487. */
  1488. nv->firmware_options[0] |= (BIT_6 | BIT_1);
  1489. nv->firmware_options[0] &= ~(BIT_5 | BIT_4);
  1490. nv->firmware_options[1] |= (BIT_5 | BIT_0);
  1491. nv->firmware_options[1] &= ~BIT_4;
  1492. if (IS_QLA23XX(ha)) {
  1493. nv->firmware_options[0] |= BIT_2;
  1494. nv->firmware_options[0] &= ~BIT_3;
  1495. nv->add_firmware_options[1] |= BIT_5 | BIT_4;
  1496. if (IS_QLA2300(ha)) {
  1497. if (ha->fb_rev == FPM_2310) {
  1498. strcpy(ha->model_number, "QLA2310");
  1499. } else {
  1500. strcpy(ha->model_number, "QLA2300");
  1501. }
  1502. } else {
  1503. qla2x00_set_model_info(vha, nv->model_number,
  1504. sizeof(nv->model_number), "QLA23xx");
  1505. }
  1506. } else if (IS_QLA2200(ha)) {
  1507. nv->firmware_options[0] |= BIT_2;
  1508. /*
  1509. * 'Point-to-point preferred, else loop' is not a safe
  1510. * connection mode setting.
  1511. */
  1512. if ((nv->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) ==
  1513. (BIT_5 | BIT_4)) {
  1514. /* Force 'loop preferred, else point-to-point'. */
  1515. nv->add_firmware_options[0] &= ~(BIT_6 | BIT_5 | BIT_4);
  1516. nv->add_firmware_options[0] |= BIT_5;
  1517. }
  1518. strcpy(ha->model_number, "QLA22xx");
  1519. } else /*if (IS_QLA2100(ha))*/ {
  1520. strcpy(ha->model_number, "QLA2100");
  1521. }
  1522. /*
  1523. * Copy over NVRAM RISC parameter block to initialization control block.
  1524. */
  1525. dptr1 = (uint8_t *)icb;
  1526. dptr2 = (uint8_t *)&nv->parameter_block_version;
  1527. cnt = (uint8_t *)&icb->request_q_outpointer - (uint8_t *)&icb->version;
  1528. while (cnt--)
  1529. *dptr1++ = *dptr2++;
  1530. /* Copy 2nd half. */
  1531. dptr1 = (uint8_t *)icb->add_firmware_options;
  1532. cnt = (uint8_t *)icb->reserved_3 - (uint8_t *)icb->add_firmware_options;
  1533. while (cnt--)
  1534. *dptr1++ = *dptr2++;
  1535. /* Use alternate WWN? */
  1536. if (nv->host_p[1] & BIT_7) {
  1537. memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
  1538. memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
  1539. }
  1540. /* Prepare nodename */
  1541. if ((icb->firmware_options[1] & BIT_6) == 0) {
  1542. /*
  1543. * Firmware will apply the following mask if the nodename was
  1544. * not provided.
  1545. */
  1546. memcpy(icb->node_name, icb->port_name, WWN_SIZE);
  1547. icb->node_name[0] &= 0xF0;
  1548. }
  1549. /*
  1550. * Set host adapter parameters.
  1551. */
  1552. if (nv->host_p[0] & BIT_7)
  1553. ql2xextended_error_logging = 1;
  1554. ha->flags.disable_risc_code_load = ((nv->host_p[0] & BIT_4) ? 1 : 0);
  1555. /* Always load RISC code on non ISP2[12]00 chips. */
  1556. if (!IS_QLA2100(ha) && !IS_QLA2200(ha))
  1557. ha->flags.disable_risc_code_load = 0;
  1558. ha->flags.enable_lip_reset = ((nv->host_p[1] & BIT_1) ? 1 : 0);
  1559. ha->flags.enable_lip_full_login = ((nv->host_p[1] & BIT_2) ? 1 : 0);
  1560. ha->flags.enable_target_reset = ((nv->host_p[1] & BIT_3) ? 1 : 0);
  1561. ha->flags.enable_led_scheme = (nv->special_options[1] & BIT_4) ? 1 : 0;
  1562. ha->flags.disable_serdes = 0;
  1563. ha->operating_mode =
  1564. (icb->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) >> 4;
  1565. memcpy(ha->fw_seriallink_options, nv->seriallink_options,
  1566. sizeof(ha->fw_seriallink_options));
  1567. /* save HBA serial number */
  1568. ha->serial0 = icb->port_name[5];
  1569. ha->serial1 = icb->port_name[6];
  1570. ha->serial2 = icb->port_name[7];
  1571. memcpy(vha->node_name, icb->node_name, WWN_SIZE);
  1572. memcpy(vha->port_name, icb->port_name, WWN_SIZE);
  1573. icb->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  1574. ha->retry_count = nv->retry_count;
  1575. /* Set minimum login_timeout to 4 seconds. */
  1576. if (nv->login_timeout < ql2xlogintimeout)
  1577. nv->login_timeout = ql2xlogintimeout;
  1578. if (nv->login_timeout < 4)
  1579. nv->login_timeout = 4;
  1580. ha->login_timeout = nv->login_timeout;
  1581. icb->login_timeout = nv->login_timeout;
  1582. /* Set minimum RATOV to 100 tenths of a second. */
  1583. ha->r_a_tov = 100;
  1584. ha->loop_reset_delay = nv->reset_delay;
  1585. /* Link Down Timeout = 0:
  1586. *
  1587. * When Port Down timer expires we will start returning
  1588. * I/O's to OS with "DID_NO_CONNECT".
  1589. *
  1590. * Link Down Timeout != 0:
  1591. *
  1592. * The driver waits for the link to come up after link down
  1593. * before returning I/Os to OS with "DID_NO_CONNECT".
  1594. */
  1595. if (nv->link_down_timeout == 0) {
  1596. ha->loop_down_abort_time =
  1597. (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
  1598. } else {
  1599. ha->link_down_timeout = nv->link_down_timeout;
  1600. ha->loop_down_abort_time =
  1601. (LOOP_DOWN_TIME - ha->link_down_timeout);
  1602. }
  1603. /*
  1604. * Need enough time to try and get the port back.
  1605. */
  1606. ha->port_down_retry_count = nv->port_down_retry_count;
  1607. if (qlport_down_retry)
  1608. ha->port_down_retry_count = qlport_down_retry;
  1609. /* Set login_retry_count */
  1610. ha->login_retry_count = nv->retry_count;
  1611. if (ha->port_down_retry_count == nv->port_down_retry_count &&
  1612. ha->port_down_retry_count > 3)
  1613. ha->login_retry_count = ha->port_down_retry_count;
  1614. else if (ha->port_down_retry_count > (int)ha->login_retry_count)
  1615. ha->login_retry_count = ha->port_down_retry_count;
  1616. if (ql2xloginretrycount)
  1617. ha->login_retry_count = ql2xloginretrycount;
  1618. icb->lun_enables = __constant_cpu_to_le16(0);
  1619. icb->command_resource_count = 0;
  1620. icb->immediate_notify_resource_count = 0;
  1621. icb->timeout = __constant_cpu_to_le16(0);
  1622. if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
  1623. /* Enable RIO */
  1624. icb->firmware_options[0] &= ~BIT_3;
  1625. icb->add_firmware_options[0] &=
  1626. ~(BIT_3 | BIT_2 | BIT_1 | BIT_0);
  1627. icb->add_firmware_options[0] |= BIT_2;
  1628. icb->response_accumulation_timer = 3;
  1629. icb->interrupt_delay_timer = 5;
  1630. vha->flags.process_response_queue = 1;
  1631. } else {
  1632. /* Enable ZIO. */
  1633. if (!vha->flags.init_done) {
  1634. ha->zio_mode = icb->add_firmware_options[0] &
  1635. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  1636. ha->zio_timer = icb->interrupt_delay_timer ?
  1637. icb->interrupt_delay_timer: 2;
  1638. }
  1639. icb->add_firmware_options[0] &=
  1640. ~(BIT_3 | BIT_2 | BIT_1 | BIT_0);
  1641. vha->flags.process_response_queue = 0;
  1642. if (ha->zio_mode != QLA_ZIO_DISABLED) {
  1643. ha->zio_mode = QLA_ZIO_MODE_6;
  1644. DEBUG2(printk("scsi(%ld): ZIO mode %d enabled; timer "
  1645. "delay (%d us).\n", vha->host_no, ha->zio_mode,
  1646. ha->zio_timer * 100));
  1647. qla_printk(KERN_INFO, ha,
  1648. "ZIO mode %d enabled; timer delay (%d us).\n",
  1649. ha->zio_mode, ha->zio_timer * 100);
  1650. icb->add_firmware_options[0] |= (uint8_t)ha->zio_mode;
  1651. icb->interrupt_delay_timer = (uint8_t)ha->zio_timer;
  1652. vha->flags.process_response_queue = 1;
  1653. }
  1654. }
  1655. if (rval) {
  1656. DEBUG2_3(printk(KERN_WARNING
  1657. "scsi(%ld): NVRAM configuration failed!\n", vha->host_no));
  1658. }
  1659. return (rval);
  1660. }
  1661. static void
  1662. qla2x00_rport_del(void *data)
  1663. {
  1664. fc_port_t *fcport = data;
  1665. struct fc_rport *rport;
  1666. spin_lock_irq(fcport->vha->host->host_lock);
  1667. rport = fcport->drport;
  1668. fcport->drport = NULL;
  1669. spin_unlock_irq(fcport->vha->host->host_lock);
  1670. if (rport)
  1671. fc_remote_port_delete(rport);
  1672. }
  1673. /**
  1674. * qla2x00_alloc_fcport() - Allocate a generic fcport.
  1675. * @ha: HA context
  1676. * @flags: allocation flags
  1677. *
  1678. * Returns a pointer to the allocated fcport, or NULL, if none available.
  1679. */
  1680. static fc_port_t *
  1681. qla2x00_alloc_fcport(scsi_qla_host_t *vha, gfp_t flags)
  1682. {
  1683. fc_port_t *fcport;
  1684. fcport = kzalloc(sizeof(fc_port_t), flags);
  1685. if (!fcport)
  1686. return NULL;
  1687. /* Setup fcport template structure. */
  1688. fcport->vha = vha;
  1689. fcport->vp_idx = vha->vp_idx;
  1690. fcport->port_type = FCT_UNKNOWN;
  1691. fcport->loop_id = FC_NO_LOOP_ID;
  1692. atomic_set(&fcport->state, FCS_UNCONFIGURED);
  1693. fcport->flags = FCF_RLC_SUPPORT;
  1694. fcport->supported_classes = FC_COS_UNSPECIFIED;
  1695. return fcport;
  1696. }
  1697. /*
  1698. * qla2x00_configure_loop
  1699. * Updates Fibre Channel Device Database with what is actually on loop.
  1700. *
  1701. * Input:
  1702. * ha = adapter block pointer.
  1703. *
  1704. * Returns:
  1705. * 0 = success.
  1706. * 1 = error.
  1707. * 2 = database was full and device was not configured.
  1708. */
  1709. static int
  1710. qla2x00_configure_loop(scsi_qla_host_t *vha)
  1711. {
  1712. int rval;
  1713. unsigned long flags, save_flags;
  1714. struct qla_hw_data *ha = vha->hw;
  1715. rval = QLA_SUCCESS;
  1716. /* Get Initiator ID */
  1717. if (test_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags)) {
  1718. rval = qla2x00_configure_hba(vha);
  1719. if (rval != QLA_SUCCESS) {
  1720. DEBUG(printk("scsi(%ld): Unable to configure HBA.\n",
  1721. vha->host_no));
  1722. return (rval);
  1723. }
  1724. }
  1725. save_flags = flags = vha->dpc_flags;
  1726. DEBUG(printk("scsi(%ld): Configure loop -- dpc flags =0x%lx\n",
  1727. vha->host_no, flags));
  1728. /*
  1729. * If we have both an RSCN and PORT UPDATE pending then handle them
  1730. * both at the same time.
  1731. */
  1732. clear_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
  1733. clear_bit(RSCN_UPDATE, &vha->dpc_flags);
  1734. /* Determine what we need to do */
  1735. if (ha->current_topology == ISP_CFG_FL &&
  1736. (test_bit(LOCAL_LOOP_UPDATE, &flags))) {
  1737. vha->flags.rscn_queue_overflow = 1;
  1738. set_bit(RSCN_UPDATE, &flags);
  1739. } else if (ha->current_topology == ISP_CFG_F &&
  1740. (test_bit(LOCAL_LOOP_UPDATE, &flags))) {
  1741. vha->flags.rscn_queue_overflow = 1;
  1742. set_bit(RSCN_UPDATE, &flags);
  1743. clear_bit(LOCAL_LOOP_UPDATE, &flags);
  1744. } else if (ha->current_topology == ISP_CFG_N) {
  1745. clear_bit(RSCN_UPDATE, &flags);
  1746. } else if (!vha->flags.online ||
  1747. (test_bit(ABORT_ISP_ACTIVE, &flags))) {
  1748. vha->flags.rscn_queue_overflow = 1;
  1749. set_bit(RSCN_UPDATE, &flags);
  1750. set_bit(LOCAL_LOOP_UPDATE, &flags);
  1751. }
  1752. if (test_bit(LOCAL_LOOP_UPDATE, &flags)) {
  1753. if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
  1754. rval = QLA_FUNCTION_FAILED;
  1755. else
  1756. rval = qla2x00_configure_local_loop(vha);
  1757. }
  1758. if (rval == QLA_SUCCESS && test_bit(RSCN_UPDATE, &flags)) {
  1759. if (LOOP_TRANSITION(vha))
  1760. rval = QLA_FUNCTION_FAILED;
  1761. else
  1762. rval = qla2x00_configure_fabric(vha);
  1763. }
  1764. if (rval == QLA_SUCCESS) {
  1765. if (atomic_read(&vha->loop_down_timer) ||
  1766. test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
  1767. rval = QLA_FUNCTION_FAILED;
  1768. } else {
  1769. atomic_set(&vha->loop_state, LOOP_READY);
  1770. DEBUG(printk("scsi(%ld): LOOP READY\n", vha->host_no));
  1771. }
  1772. }
  1773. if (rval) {
  1774. DEBUG2_3(printk("%s(%ld): *** FAILED ***\n",
  1775. __func__, vha->host_no));
  1776. } else {
  1777. DEBUG3(printk("%s: exiting normally\n", __func__));
  1778. }
  1779. /* Restore state if a resync event occurred during processing */
  1780. if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
  1781. if (test_bit(LOCAL_LOOP_UPDATE, &save_flags))
  1782. set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
  1783. if (test_bit(RSCN_UPDATE, &save_flags))
  1784. set_bit(RSCN_UPDATE, &vha->dpc_flags);
  1785. }
  1786. return (rval);
  1787. }
  1788. /*
  1789. * qla2x00_configure_local_loop
  1790. * Updates Fibre Channel Device Database with local loop devices.
  1791. *
  1792. * Input:
  1793. * ha = adapter block pointer.
  1794. *
  1795. * Returns:
  1796. * 0 = success.
  1797. */
  1798. static int
  1799. qla2x00_configure_local_loop(scsi_qla_host_t *vha)
  1800. {
  1801. int rval, rval2;
  1802. int found_devs;
  1803. int found;
  1804. fc_port_t *fcport, *new_fcport;
  1805. uint16_t index;
  1806. uint16_t entries;
  1807. char *id_iter;
  1808. uint16_t loop_id;
  1809. uint8_t domain, area, al_pa;
  1810. struct qla_hw_data *ha = vha->hw;
  1811. found_devs = 0;
  1812. new_fcport = NULL;
  1813. entries = MAX_FIBRE_DEVICES;
  1814. DEBUG3(printk("scsi(%ld): Getting FCAL position map\n", vha->host_no));
  1815. DEBUG3(qla2x00_get_fcal_position_map(vha, NULL));
  1816. /* Get list of logged in devices. */
  1817. memset(ha->gid_list, 0, GID_LIST_SIZE);
  1818. rval = qla2x00_get_id_list(vha, ha->gid_list, ha->gid_list_dma,
  1819. &entries);
  1820. if (rval != QLA_SUCCESS)
  1821. goto cleanup_allocation;
  1822. DEBUG3(printk("scsi(%ld): Entries in ID list (%d)\n",
  1823. ha->host_no, entries));
  1824. DEBUG3(qla2x00_dump_buffer((uint8_t *)ha->gid_list,
  1825. entries * sizeof(struct gid_list_info)));
  1826. /* Allocate temporary fcport for any new fcports discovered. */
  1827. new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
  1828. if (new_fcport == NULL) {
  1829. rval = QLA_MEMORY_ALLOC_FAILED;
  1830. goto cleanup_allocation;
  1831. }
  1832. new_fcport->flags &= ~FCF_FABRIC_DEVICE;
  1833. /*
  1834. * Mark local devices that were present with FCF_DEVICE_LOST for now.
  1835. */
  1836. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  1837. if (atomic_read(&fcport->state) == FCS_ONLINE &&
  1838. fcport->port_type != FCT_BROADCAST &&
  1839. (fcport->flags & FCF_FABRIC_DEVICE) == 0) {
  1840. DEBUG(printk("scsi(%ld): Marking port lost, "
  1841. "loop_id=0x%04x\n",
  1842. vha->host_no, fcport->loop_id));
  1843. atomic_set(&fcport->state, FCS_DEVICE_LOST);
  1844. fcport->flags &= ~FCF_FARP_DONE;
  1845. }
  1846. }
  1847. /* Add devices to port list. */
  1848. id_iter = (char *)ha->gid_list;
  1849. for (index = 0; index < entries; index++) {
  1850. domain = ((struct gid_list_info *)id_iter)->domain;
  1851. area = ((struct gid_list_info *)id_iter)->area;
  1852. al_pa = ((struct gid_list_info *)id_iter)->al_pa;
  1853. if (IS_QLA2100(ha) || IS_QLA2200(ha))
  1854. loop_id = (uint16_t)
  1855. ((struct gid_list_info *)id_iter)->loop_id_2100;
  1856. else
  1857. loop_id = le16_to_cpu(
  1858. ((struct gid_list_info *)id_iter)->loop_id);
  1859. id_iter += ha->gid_list_info_size;
  1860. /* Bypass reserved domain fields. */
  1861. if ((domain & 0xf0) == 0xf0)
  1862. continue;
  1863. /* Bypass if not same domain and area of adapter. */
  1864. if (area && domain &&
  1865. (area != vha->d_id.b.area || domain != vha->d_id.b.domain))
  1866. continue;
  1867. /* Bypass invalid local loop ID. */
  1868. if (loop_id > LAST_LOCAL_LOOP_ID)
  1869. continue;
  1870. /* Fill in member data. */
  1871. new_fcport->d_id.b.domain = domain;
  1872. new_fcport->d_id.b.area = area;
  1873. new_fcport->d_id.b.al_pa = al_pa;
  1874. new_fcport->loop_id = loop_id;
  1875. new_fcport->vp_idx = vha->vp_idx;
  1876. rval2 = qla2x00_get_port_database(vha, new_fcport, 0);
  1877. if (rval2 != QLA_SUCCESS) {
  1878. DEBUG2(printk("scsi(%ld): Failed to retrieve fcport "
  1879. "information -- get_port_database=%x, "
  1880. "loop_id=0x%04x\n",
  1881. vha->host_no, rval2, new_fcport->loop_id));
  1882. DEBUG2(printk("scsi(%ld): Scheduling resync...\n",
  1883. vha->host_no));
  1884. set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  1885. continue;
  1886. }
  1887. /* Check for matching device in port list. */
  1888. found = 0;
  1889. fcport = NULL;
  1890. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  1891. if (memcmp(new_fcport->port_name, fcport->port_name,
  1892. WWN_SIZE))
  1893. continue;
  1894. fcport->flags &= ~(FCF_FABRIC_DEVICE |
  1895. FCF_PERSISTENT_BOUND);
  1896. fcport->loop_id = new_fcport->loop_id;
  1897. fcport->port_type = new_fcport->port_type;
  1898. fcport->d_id.b24 = new_fcport->d_id.b24;
  1899. memcpy(fcport->node_name, new_fcport->node_name,
  1900. WWN_SIZE);
  1901. found++;
  1902. break;
  1903. }
  1904. if (!found) {
  1905. /* New device, add to fcports list. */
  1906. new_fcport->flags &= ~FCF_PERSISTENT_BOUND;
  1907. if (vha->vp_idx) {
  1908. new_fcport->vha = vha;
  1909. new_fcport->vp_idx = vha->vp_idx;
  1910. }
  1911. list_add_tail(&new_fcport->list, &vha->vp_fcports);
  1912. /* Allocate a new replacement fcport. */
  1913. fcport = new_fcport;
  1914. new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
  1915. if (new_fcport == NULL) {
  1916. rval = QLA_MEMORY_ALLOC_FAILED;
  1917. goto cleanup_allocation;
  1918. }
  1919. new_fcport->flags &= ~FCF_FABRIC_DEVICE;
  1920. }
  1921. /* Base iIDMA settings on HBA port speed. */
  1922. fcport->fp_speed = ha->link_data_rate;
  1923. qla2x00_update_fcport(vha, fcport);
  1924. found_devs++;
  1925. }
  1926. cleanup_allocation:
  1927. kfree(new_fcport);
  1928. if (rval != QLA_SUCCESS) {
  1929. DEBUG2(printk("scsi(%ld): Configure local loop error exit: "
  1930. "rval=%x\n", vha->host_no, rval));
  1931. }
  1932. if (found_devs) {
  1933. vha->device_flags |= DFLG_LOCAL_DEVICES;
  1934. vha->device_flags &= ~DFLG_RETRY_LOCAL_DEVICES;
  1935. }
  1936. return (rval);
  1937. }
  1938. static void
  1939. qla2x00_iidma_fcport(scsi_qla_host_t *vha, fc_port_t *fcport)
  1940. {
  1941. #define LS_UNKNOWN 2
  1942. static char *link_speeds[5] = { "1", "2", "?", "4", "8" };
  1943. int rval;
  1944. uint16_t mb[6];
  1945. struct qla_hw_data *ha = vha->hw;
  1946. if (!IS_IIDMA_CAPABLE(ha))
  1947. return;
  1948. if (fcport->fp_speed == PORT_SPEED_UNKNOWN ||
  1949. fcport->fp_speed > ha->link_data_rate)
  1950. return;
  1951. rval = qla2x00_set_idma_speed(vha, fcport->loop_id, fcport->fp_speed,
  1952. mb);
  1953. if (rval != QLA_SUCCESS) {
  1954. DEBUG2(printk("scsi(%ld): Unable to adjust iIDMA "
  1955. "%02x%02x%02x%02x%02x%02x%02x%02x -- %04x %x %04x %04x.\n",
  1956. vha->host_no, fcport->port_name[0], fcport->port_name[1],
  1957. fcport->port_name[2], fcport->port_name[3],
  1958. fcport->port_name[4], fcport->port_name[5],
  1959. fcport->port_name[6], fcport->port_name[7], rval,
  1960. fcport->fp_speed, mb[0], mb[1]));
  1961. } else {
  1962. DEBUG2(qla_printk(KERN_INFO, ha,
  1963. "iIDMA adjusted to %s GB/s on "
  1964. "%02x%02x%02x%02x%02x%02x%02x%02x.\n",
  1965. link_speeds[fcport->fp_speed], fcport->port_name[0],
  1966. fcport->port_name[1], fcport->port_name[2],
  1967. fcport->port_name[3], fcport->port_name[4],
  1968. fcport->port_name[5], fcport->port_name[6],
  1969. fcport->port_name[7]));
  1970. }
  1971. }
  1972. static void
  1973. qla2x00_reg_remote_port(scsi_qla_host_t *vha, fc_port_t *fcport)
  1974. {
  1975. struct fc_rport_identifiers rport_ids;
  1976. struct fc_rport *rport;
  1977. struct qla_hw_data *ha = vha->hw;
  1978. if (fcport->drport)
  1979. qla2x00_rport_del(fcport);
  1980. rport_ids.node_name = wwn_to_u64(fcport->node_name);
  1981. rport_ids.port_name = wwn_to_u64(fcport->port_name);
  1982. rport_ids.port_id = fcport->d_id.b.domain << 16 |
  1983. fcport->d_id.b.area << 8 | fcport->d_id.b.al_pa;
  1984. rport_ids.roles = FC_RPORT_ROLE_UNKNOWN;
  1985. fcport->rport = rport = fc_remote_port_add(vha->host, 0, &rport_ids);
  1986. if (!rport) {
  1987. qla_printk(KERN_WARNING, ha,
  1988. "Unable to allocate fc remote port!\n");
  1989. return;
  1990. }
  1991. spin_lock_irq(fcport->vha->host->host_lock);
  1992. *((fc_port_t **)rport->dd_data) = fcport;
  1993. spin_unlock_irq(fcport->vha->host->host_lock);
  1994. rport->supported_classes = fcport->supported_classes;
  1995. rport_ids.roles = FC_RPORT_ROLE_UNKNOWN;
  1996. if (fcport->port_type == FCT_INITIATOR)
  1997. rport_ids.roles |= FC_RPORT_ROLE_FCP_INITIATOR;
  1998. if (fcport->port_type == FCT_TARGET)
  1999. rport_ids.roles |= FC_RPORT_ROLE_FCP_TARGET;
  2000. fc_remote_port_rolechg(rport, rport_ids.roles);
  2001. }
  2002. /*
  2003. * qla2x00_update_fcport
  2004. * Updates device on list.
  2005. *
  2006. * Input:
  2007. * ha = adapter block pointer.
  2008. * fcport = port structure pointer.
  2009. *
  2010. * Return:
  2011. * 0 - Success
  2012. * BIT_0 - error
  2013. *
  2014. * Context:
  2015. * Kernel context.
  2016. */
  2017. void
  2018. qla2x00_update_fcport(scsi_qla_host_t *vha, fc_port_t *fcport)
  2019. {
  2020. struct qla_hw_data *ha = vha->hw;
  2021. fcport->vha = vha;
  2022. fcport->login_retry = 0;
  2023. fcport->port_login_retry_count = ha->port_down_retry_count *
  2024. PORT_RETRY_TIME;
  2025. atomic_set(&fcport->port_down_timer, ha->port_down_retry_count *
  2026. PORT_RETRY_TIME);
  2027. fcport->flags &= ~FCF_LOGIN_NEEDED;
  2028. qla2x00_iidma_fcport(vha, fcport);
  2029. atomic_set(&fcport->state, FCS_ONLINE);
  2030. qla2x00_reg_remote_port(vha, fcport);
  2031. }
  2032. /*
  2033. * qla2x00_configure_fabric
  2034. * Setup SNS devices with loop ID's.
  2035. *
  2036. * Input:
  2037. * ha = adapter block pointer.
  2038. *
  2039. * Returns:
  2040. * 0 = success.
  2041. * BIT_0 = error
  2042. */
  2043. static int
  2044. qla2x00_configure_fabric(scsi_qla_host_t *vha)
  2045. {
  2046. int rval, rval2;
  2047. fc_port_t *fcport, *fcptemp;
  2048. uint16_t next_loopid;
  2049. uint16_t mb[MAILBOX_REGISTER_COUNT];
  2050. uint16_t loop_id;
  2051. LIST_HEAD(new_fcports);
  2052. struct qla_hw_data *ha = vha->hw;
  2053. struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
  2054. /* If FL port exists, then SNS is present */
  2055. if (IS_FWI2_CAPABLE(ha))
  2056. loop_id = NPH_F_PORT;
  2057. else
  2058. loop_id = SNS_FL_PORT;
  2059. rval = qla2x00_get_port_name(vha, loop_id, vha->fabric_node_name, 1);
  2060. if (rval != QLA_SUCCESS) {
  2061. DEBUG2(printk("scsi(%ld): MBC_GET_PORT_NAME Failed, No FL "
  2062. "Port\n", vha->host_no));
  2063. vha->device_flags &= ~SWITCH_FOUND;
  2064. return (QLA_SUCCESS);
  2065. }
  2066. vha->device_flags |= SWITCH_FOUND;
  2067. /* Mark devices that need re-synchronization. */
  2068. rval2 = qla2x00_device_resync(vha);
  2069. if (rval2 == QLA_RSCNS_HANDLED) {
  2070. /* No point doing the scan, just continue. */
  2071. return (QLA_SUCCESS);
  2072. }
  2073. do {
  2074. /* FDMI support. */
  2075. if (ql2xfdmienable &&
  2076. test_and_clear_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags))
  2077. qla2x00_fdmi_register(vha);
  2078. /* Ensure we are logged into the SNS. */
  2079. if (IS_FWI2_CAPABLE(ha))
  2080. loop_id = NPH_SNS;
  2081. else
  2082. loop_id = SIMPLE_NAME_SERVER;
  2083. ha->isp_ops->fabric_login(vha, loop_id, 0xff, 0xff,
  2084. 0xfc, mb, BIT_1 | BIT_0);
  2085. if (mb[0] != MBS_COMMAND_COMPLETE) {
  2086. DEBUG2(qla_printk(KERN_INFO, ha,
  2087. "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x "
  2088. "mb[2]=%x mb[6]=%x mb[7]=%x\n", loop_id,
  2089. mb[0], mb[1], mb[2], mb[6], mb[7]));
  2090. return (QLA_SUCCESS);
  2091. }
  2092. if (test_and_clear_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags)) {
  2093. if (qla2x00_rft_id(vha)) {
  2094. /* EMPTY */
  2095. DEBUG2(printk("scsi(%ld): Register FC-4 "
  2096. "TYPE failed.\n", vha->host_no));
  2097. }
  2098. if (qla2x00_rff_id(vha)) {
  2099. /* EMPTY */
  2100. DEBUG2(printk("scsi(%ld): Register FC-4 "
  2101. "Features failed.\n", vha->host_no));
  2102. }
  2103. if (qla2x00_rnn_id(vha)) {
  2104. /* EMPTY */
  2105. DEBUG2(printk("scsi(%ld): Register Node Name "
  2106. "failed.\n", vha->host_no));
  2107. } else if (qla2x00_rsnn_nn(vha)) {
  2108. /* EMPTY */
  2109. DEBUG2(printk("scsi(%ld): Register Symbolic "
  2110. "Node Name failed.\n", vha->host_no));
  2111. }
  2112. }
  2113. rval = qla2x00_find_all_fabric_devs(vha, &new_fcports);
  2114. if (rval != QLA_SUCCESS)
  2115. break;
  2116. /*
  2117. * Logout all previous fabric devices marked lost, except
  2118. * tape devices.
  2119. */
  2120. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  2121. if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
  2122. break;
  2123. if ((fcport->flags & FCF_FABRIC_DEVICE) == 0)
  2124. continue;
  2125. if (atomic_read(&fcport->state) == FCS_DEVICE_LOST) {
  2126. qla2x00_mark_device_lost(vha, fcport,
  2127. ql2xplogiabsentdevice, 0);
  2128. if (fcport->loop_id != FC_NO_LOOP_ID &&
  2129. (fcport->flags & FCF_TAPE_PRESENT) == 0 &&
  2130. fcport->port_type != FCT_INITIATOR &&
  2131. fcport->port_type != FCT_BROADCAST) {
  2132. ha->isp_ops->fabric_logout(vha,
  2133. fcport->loop_id,
  2134. fcport->d_id.b.domain,
  2135. fcport->d_id.b.area,
  2136. fcport->d_id.b.al_pa);
  2137. fcport->loop_id = FC_NO_LOOP_ID;
  2138. }
  2139. }
  2140. }
  2141. /* Starting free loop ID. */
  2142. next_loopid = ha->min_external_loopid;
  2143. /*
  2144. * Scan through our port list and login entries that need to be
  2145. * logged in.
  2146. */
  2147. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  2148. if (atomic_read(&vha->loop_down_timer) ||
  2149. test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
  2150. break;
  2151. if ((fcport->flags & FCF_FABRIC_DEVICE) == 0 ||
  2152. (fcport->flags & FCF_LOGIN_NEEDED) == 0)
  2153. continue;
  2154. if (fcport->loop_id == FC_NO_LOOP_ID) {
  2155. fcport->loop_id = next_loopid;
  2156. rval = qla2x00_find_new_loop_id(
  2157. base_vha, fcport);
  2158. if (rval != QLA_SUCCESS) {
  2159. /* Ran out of IDs to use */
  2160. break;
  2161. }
  2162. }
  2163. /* Login and update database */
  2164. qla2x00_fabric_dev_login(vha, fcport, &next_loopid);
  2165. }
  2166. /* Exit if out of loop IDs. */
  2167. if (rval != QLA_SUCCESS) {
  2168. break;
  2169. }
  2170. /*
  2171. * Login and add the new devices to our port list.
  2172. */
  2173. list_for_each_entry_safe(fcport, fcptemp, &new_fcports, list) {
  2174. if (atomic_read(&vha->loop_down_timer) ||
  2175. test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
  2176. break;
  2177. /* Find a new loop ID to use. */
  2178. fcport->loop_id = next_loopid;
  2179. rval = qla2x00_find_new_loop_id(base_vha, fcport);
  2180. if (rval != QLA_SUCCESS) {
  2181. /* Ran out of IDs to use */
  2182. break;
  2183. }
  2184. /* Login and update database */
  2185. qla2x00_fabric_dev_login(vha, fcport, &next_loopid);
  2186. if (vha->vp_idx) {
  2187. fcport->vha = vha;
  2188. fcport->vp_idx = vha->vp_idx;
  2189. }
  2190. list_move_tail(&fcport->list, &vha->vp_fcports);
  2191. }
  2192. } while (0);
  2193. /* Free all new device structures not processed. */
  2194. list_for_each_entry_safe(fcport, fcptemp, &new_fcports, list) {
  2195. list_del(&fcport->list);
  2196. kfree(fcport);
  2197. }
  2198. if (rval) {
  2199. DEBUG2(printk("scsi(%ld): Configure fabric error exit: "
  2200. "rval=%d\n", vha->host_no, rval));
  2201. }
  2202. return (rval);
  2203. }
  2204. /*
  2205. * qla2x00_find_all_fabric_devs
  2206. *
  2207. * Input:
  2208. * ha = adapter block pointer.
  2209. * dev = database device entry pointer.
  2210. *
  2211. * Returns:
  2212. * 0 = success.
  2213. *
  2214. * Context:
  2215. * Kernel context.
  2216. */
  2217. static int
  2218. qla2x00_find_all_fabric_devs(scsi_qla_host_t *vha,
  2219. struct list_head *new_fcports)
  2220. {
  2221. int rval;
  2222. uint16_t loop_id;
  2223. fc_port_t *fcport, *new_fcport, *fcptemp;
  2224. int found;
  2225. sw_info_t *swl;
  2226. int swl_idx;
  2227. int first_dev, last_dev;
  2228. port_id_t wrap, nxt_d_id;
  2229. struct qla_hw_data *ha = vha->hw;
  2230. struct scsi_qla_host *vp, *base_vha = pci_get_drvdata(ha->pdev);
  2231. rval = QLA_SUCCESS;
  2232. /* Try GID_PT to get device list, else GAN. */
  2233. swl = kcalloc(MAX_FIBRE_DEVICES, sizeof(sw_info_t), GFP_KERNEL);
  2234. if (!swl) {
  2235. /*EMPTY*/
  2236. DEBUG2(printk("scsi(%ld): GID_PT allocations failed, fallback "
  2237. "on GA_NXT\n", vha->host_no));
  2238. } else {
  2239. if (qla2x00_gid_pt(vha, swl) != QLA_SUCCESS) {
  2240. kfree(swl);
  2241. swl = NULL;
  2242. } else if (qla2x00_gpn_id(vha, swl) != QLA_SUCCESS) {
  2243. kfree(swl);
  2244. swl = NULL;
  2245. } else if (qla2x00_gnn_id(vha, swl) != QLA_SUCCESS) {
  2246. kfree(swl);
  2247. swl = NULL;
  2248. } else if (ql2xiidmaenable &&
  2249. qla2x00_gfpn_id(vha, swl) == QLA_SUCCESS) {
  2250. qla2x00_gpsc(vha, swl);
  2251. }
  2252. }
  2253. swl_idx = 0;
  2254. /* Allocate temporary fcport for any new fcports discovered. */
  2255. new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
  2256. if (new_fcport == NULL) {
  2257. kfree(swl);
  2258. return (QLA_MEMORY_ALLOC_FAILED);
  2259. }
  2260. new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED);
  2261. /* Set start port ID scan at adapter ID. */
  2262. first_dev = 1;
  2263. last_dev = 0;
  2264. /* Starting free loop ID. */
  2265. loop_id = ha->min_external_loopid;
  2266. for (; loop_id <= ha->max_loop_id; loop_id++) {
  2267. if (qla2x00_is_reserved_id(vha, loop_id))
  2268. continue;
  2269. if (atomic_read(&vha->loop_down_timer) || LOOP_TRANSITION(vha))
  2270. break;
  2271. if (swl != NULL) {
  2272. if (last_dev) {
  2273. wrap.b24 = new_fcport->d_id.b24;
  2274. } else {
  2275. new_fcport->d_id.b24 = swl[swl_idx].d_id.b24;
  2276. memcpy(new_fcport->node_name,
  2277. swl[swl_idx].node_name, WWN_SIZE);
  2278. memcpy(new_fcport->port_name,
  2279. swl[swl_idx].port_name, WWN_SIZE);
  2280. memcpy(new_fcport->fabric_port_name,
  2281. swl[swl_idx].fabric_port_name, WWN_SIZE);
  2282. new_fcport->fp_speed = swl[swl_idx].fp_speed;
  2283. if (swl[swl_idx].d_id.b.rsvd_1 != 0) {
  2284. last_dev = 1;
  2285. }
  2286. swl_idx++;
  2287. }
  2288. } else {
  2289. /* Send GA_NXT to the switch */
  2290. rval = qla2x00_ga_nxt(vha, new_fcport);
  2291. if (rval != QLA_SUCCESS) {
  2292. qla_printk(KERN_WARNING, ha,
  2293. "SNS scan failed -- assuming zero-entry "
  2294. "result...\n");
  2295. list_for_each_entry_safe(fcport, fcptemp,
  2296. new_fcports, list) {
  2297. list_del(&fcport->list);
  2298. kfree(fcport);
  2299. }
  2300. rval = QLA_SUCCESS;
  2301. break;
  2302. }
  2303. }
  2304. /* If wrap on switch device list, exit. */
  2305. if (first_dev) {
  2306. wrap.b24 = new_fcport->d_id.b24;
  2307. first_dev = 0;
  2308. } else if (new_fcport->d_id.b24 == wrap.b24) {
  2309. DEBUG2(printk("scsi(%ld): device wrap (%02x%02x%02x)\n",
  2310. vha->host_no, new_fcport->d_id.b.domain,
  2311. new_fcport->d_id.b.area, new_fcport->d_id.b.al_pa));
  2312. break;
  2313. }
  2314. /* Bypass if same physical adapter. */
  2315. if (new_fcport->d_id.b24 == base_vha->d_id.b24)
  2316. continue;
  2317. /* Bypass virtual ports of the same host. */
  2318. found = 0;
  2319. if (ha->num_vhosts) {
  2320. list_for_each_entry(vp, &ha->vp_list, list) {
  2321. if (new_fcport->d_id.b24 == vp->d_id.b24) {
  2322. found = 1;
  2323. break;
  2324. }
  2325. }
  2326. if (found)
  2327. continue;
  2328. }
  2329. /* Bypass if same domain and area of adapter. */
  2330. if (((new_fcport->d_id.b24 & 0xffff00) ==
  2331. (vha->d_id.b24 & 0xffff00)) && ha->current_topology ==
  2332. ISP_CFG_FL)
  2333. continue;
  2334. /* Bypass reserved domain fields. */
  2335. if ((new_fcport->d_id.b.domain & 0xf0) == 0xf0)
  2336. continue;
  2337. /* Locate matching device in database. */
  2338. found = 0;
  2339. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  2340. if (memcmp(new_fcport->port_name, fcport->port_name,
  2341. WWN_SIZE))
  2342. continue;
  2343. found++;
  2344. /* Update port state. */
  2345. memcpy(fcport->fabric_port_name,
  2346. new_fcport->fabric_port_name, WWN_SIZE);
  2347. fcport->fp_speed = new_fcport->fp_speed;
  2348. /*
  2349. * If address the same and state FCS_ONLINE, nothing
  2350. * changed.
  2351. */
  2352. if (fcport->d_id.b24 == new_fcport->d_id.b24 &&
  2353. atomic_read(&fcport->state) == FCS_ONLINE) {
  2354. break;
  2355. }
  2356. /*
  2357. * If device was not a fabric device before.
  2358. */
  2359. if ((fcport->flags & FCF_FABRIC_DEVICE) == 0) {
  2360. fcport->d_id.b24 = new_fcport->d_id.b24;
  2361. fcport->loop_id = FC_NO_LOOP_ID;
  2362. fcport->flags |= (FCF_FABRIC_DEVICE |
  2363. FCF_LOGIN_NEEDED);
  2364. fcport->flags &= ~FCF_PERSISTENT_BOUND;
  2365. break;
  2366. }
  2367. /*
  2368. * Port ID changed or device was marked to be updated;
  2369. * Log it out if still logged in and mark it for
  2370. * relogin later.
  2371. */
  2372. fcport->d_id.b24 = new_fcport->d_id.b24;
  2373. fcport->flags |= FCF_LOGIN_NEEDED;
  2374. if (fcport->loop_id != FC_NO_LOOP_ID &&
  2375. (fcport->flags & FCF_TAPE_PRESENT) == 0 &&
  2376. fcport->port_type != FCT_INITIATOR &&
  2377. fcport->port_type != FCT_BROADCAST) {
  2378. ha->isp_ops->fabric_logout(vha, fcport->loop_id,
  2379. fcport->d_id.b.domain, fcport->d_id.b.area,
  2380. fcport->d_id.b.al_pa);
  2381. fcport->loop_id = FC_NO_LOOP_ID;
  2382. }
  2383. break;
  2384. }
  2385. if (found)
  2386. continue;
  2387. /* If device was not in our fcports list, then add it. */
  2388. list_add_tail(&new_fcport->list, new_fcports);
  2389. /* Allocate a new replacement fcport. */
  2390. nxt_d_id.b24 = new_fcport->d_id.b24;
  2391. new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
  2392. if (new_fcport == NULL) {
  2393. kfree(swl);
  2394. return (QLA_MEMORY_ALLOC_FAILED);
  2395. }
  2396. new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED);
  2397. new_fcport->d_id.b24 = nxt_d_id.b24;
  2398. }
  2399. kfree(swl);
  2400. kfree(new_fcport);
  2401. if (!list_empty(new_fcports))
  2402. vha->device_flags |= DFLG_FABRIC_DEVICES;
  2403. return (rval);
  2404. }
  2405. /*
  2406. * qla2x00_find_new_loop_id
  2407. * Scan through our port list and find a new usable loop ID.
  2408. *
  2409. * Input:
  2410. * ha: adapter state pointer.
  2411. * dev: port structure pointer.
  2412. *
  2413. * Returns:
  2414. * qla2x00 local function return status code.
  2415. *
  2416. * Context:
  2417. * Kernel context.
  2418. */
  2419. static int
  2420. qla2x00_find_new_loop_id(scsi_qla_host_t *vha, fc_port_t *dev)
  2421. {
  2422. int rval;
  2423. int found;
  2424. fc_port_t *fcport;
  2425. uint16_t first_loop_id;
  2426. struct qla_hw_data *ha = vha->hw;
  2427. struct scsi_qla_host *vp;
  2428. rval = QLA_SUCCESS;
  2429. /* Save starting loop ID. */
  2430. first_loop_id = dev->loop_id;
  2431. for (;;) {
  2432. /* Skip loop ID if already used by adapter. */
  2433. if (dev->loop_id == vha->loop_id)
  2434. dev->loop_id++;
  2435. /* Skip reserved loop IDs. */
  2436. while (qla2x00_is_reserved_id(vha, dev->loop_id))
  2437. dev->loop_id++;
  2438. /* Reset loop ID if passed the end. */
  2439. if (dev->loop_id > ha->max_loop_id) {
  2440. /* first loop ID. */
  2441. dev->loop_id = ha->min_external_loopid;
  2442. }
  2443. /* Check for loop ID being already in use. */
  2444. found = 0;
  2445. fcport = NULL;
  2446. list_for_each_entry(vp, &ha->vp_list, list) {
  2447. list_for_each_entry(fcport, &vp->vp_fcports, list) {
  2448. if (fcport->loop_id == dev->loop_id &&
  2449. fcport != dev) {
  2450. /* ID possibly in use */
  2451. found++;
  2452. break;
  2453. }
  2454. }
  2455. if (found)
  2456. break;
  2457. }
  2458. /* If not in use then it is free to use. */
  2459. if (!found) {
  2460. break;
  2461. }
  2462. /* ID in use. Try next value. */
  2463. dev->loop_id++;
  2464. /* If wrap around. No free ID to use. */
  2465. if (dev->loop_id == first_loop_id) {
  2466. dev->loop_id = FC_NO_LOOP_ID;
  2467. rval = QLA_FUNCTION_FAILED;
  2468. break;
  2469. }
  2470. }
  2471. return (rval);
  2472. }
  2473. /*
  2474. * qla2x00_device_resync
  2475. * Marks devices in the database that needs resynchronization.
  2476. *
  2477. * Input:
  2478. * ha = adapter block pointer.
  2479. *
  2480. * Context:
  2481. * Kernel context.
  2482. */
  2483. static int
  2484. qla2x00_device_resync(scsi_qla_host_t *vha)
  2485. {
  2486. int rval;
  2487. uint32_t mask;
  2488. fc_port_t *fcport;
  2489. uint32_t rscn_entry;
  2490. uint8_t rscn_out_iter;
  2491. uint8_t format;
  2492. port_id_t d_id;
  2493. rval = QLA_RSCNS_HANDLED;
  2494. while (vha->rscn_out_ptr != vha->rscn_in_ptr ||
  2495. vha->flags.rscn_queue_overflow) {
  2496. rscn_entry = vha->rscn_queue[vha->rscn_out_ptr];
  2497. format = MSB(MSW(rscn_entry));
  2498. d_id.b.domain = LSB(MSW(rscn_entry));
  2499. d_id.b.area = MSB(LSW(rscn_entry));
  2500. d_id.b.al_pa = LSB(LSW(rscn_entry));
  2501. DEBUG(printk("scsi(%ld): RSCN queue entry[%d] = "
  2502. "[%02x/%02x%02x%02x].\n",
  2503. vha->host_no, vha->rscn_out_ptr, format, d_id.b.domain,
  2504. d_id.b.area, d_id.b.al_pa));
  2505. vha->rscn_out_ptr++;
  2506. if (vha->rscn_out_ptr == MAX_RSCN_COUNT)
  2507. vha->rscn_out_ptr = 0;
  2508. /* Skip duplicate entries. */
  2509. for (rscn_out_iter = vha->rscn_out_ptr;
  2510. !vha->flags.rscn_queue_overflow &&
  2511. rscn_out_iter != vha->rscn_in_ptr;
  2512. rscn_out_iter = (rscn_out_iter ==
  2513. (MAX_RSCN_COUNT - 1)) ? 0: rscn_out_iter + 1) {
  2514. if (rscn_entry != vha->rscn_queue[rscn_out_iter])
  2515. break;
  2516. DEBUG(printk("scsi(%ld): Skipping duplicate RSCN queue "
  2517. "entry found at [%d].\n", vha->host_no,
  2518. rscn_out_iter));
  2519. vha->rscn_out_ptr = rscn_out_iter;
  2520. }
  2521. /* Queue overflow, set switch default case. */
  2522. if (vha->flags.rscn_queue_overflow) {
  2523. DEBUG(printk("scsi(%ld): device_resync: rscn "
  2524. "overflow.\n", vha->host_no));
  2525. format = 3;
  2526. vha->flags.rscn_queue_overflow = 0;
  2527. }
  2528. switch (format) {
  2529. case 0:
  2530. mask = 0xffffff;
  2531. break;
  2532. case 1:
  2533. mask = 0xffff00;
  2534. break;
  2535. case 2:
  2536. mask = 0xff0000;
  2537. break;
  2538. default:
  2539. mask = 0x0;
  2540. d_id.b24 = 0;
  2541. vha->rscn_out_ptr = vha->rscn_in_ptr;
  2542. break;
  2543. }
  2544. rval = QLA_SUCCESS;
  2545. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  2546. if ((fcport->flags & FCF_FABRIC_DEVICE) == 0 ||
  2547. (fcport->d_id.b24 & mask) != d_id.b24 ||
  2548. fcport->port_type == FCT_BROADCAST)
  2549. continue;
  2550. if (atomic_read(&fcport->state) == FCS_ONLINE) {
  2551. if (format != 3 ||
  2552. fcport->port_type != FCT_INITIATOR) {
  2553. qla2x00_mark_device_lost(vha, fcport,
  2554. 0, 0);
  2555. }
  2556. }
  2557. fcport->flags &= ~FCF_FARP_DONE;
  2558. }
  2559. }
  2560. return (rval);
  2561. }
  2562. /*
  2563. * qla2x00_fabric_dev_login
  2564. * Login fabric target device and update FC port database.
  2565. *
  2566. * Input:
  2567. * ha: adapter state pointer.
  2568. * fcport: port structure list pointer.
  2569. * next_loopid: contains value of a new loop ID that can be used
  2570. * by the next login attempt.
  2571. *
  2572. * Returns:
  2573. * qla2x00 local function return status code.
  2574. *
  2575. * Context:
  2576. * Kernel context.
  2577. */
  2578. static int
  2579. qla2x00_fabric_dev_login(scsi_qla_host_t *vha, fc_port_t *fcport,
  2580. uint16_t *next_loopid)
  2581. {
  2582. int rval;
  2583. int retry;
  2584. uint8_t opts;
  2585. struct qla_hw_data *ha = vha->hw;
  2586. rval = QLA_SUCCESS;
  2587. retry = 0;
  2588. rval = qla2x00_fabric_login(vha, fcport, next_loopid);
  2589. if (rval == QLA_SUCCESS) {
  2590. /* Send an ADISC to tape devices.*/
  2591. opts = 0;
  2592. if (fcport->flags & FCF_TAPE_PRESENT)
  2593. opts |= BIT_1;
  2594. rval = qla2x00_get_port_database(vha, fcport, opts);
  2595. if (rval != QLA_SUCCESS) {
  2596. ha->isp_ops->fabric_logout(vha, fcport->loop_id,
  2597. fcport->d_id.b.domain, fcport->d_id.b.area,
  2598. fcport->d_id.b.al_pa);
  2599. qla2x00_mark_device_lost(vha, fcport, 1, 0);
  2600. } else {
  2601. qla2x00_update_fcport(vha, fcport);
  2602. }
  2603. }
  2604. return (rval);
  2605. }
  2606. /*
  2607. * qla2x00_fabric_login
  2608. * Issue fabric login command.
  2609. *
  2610. * Input:
  2611. * ha = adapter block pointer.
  2612. * device = pointer to FC device type structure.
  2613. *
  2614. * Returns:
  2615. * 0 - Login successfully
  2616. * 1 - Login failed
  2617. * 2 - Initiator device
  2618. * 3 - Fatal error
  2619. */
  2620. int
  2621. qla2x00_fabric_login(scsi_qla_host_t *vha, fc_port_t *fcport,
  2622. uint16_t *next_loopid)
  2623. {
  2624. int rval;
  2625. int retry;
  2626. uint16_t tmp_loopid;
  2627. uint16_t mb[MAILBOX_REGISTER_COUNT];
  2628. struct qla_hw_data *ha = vha->hw;
  2629. retry = 0;
  2630. tmp_loopid = 0;
  2631. for (;;) {
  2632. DEBUG(printk("scsi(%ld): Trying Fabric Login w/loop id 0x%04x "
  2633. "for port %02x%02x%02x.\n",
  2634. vha->host_no, fcport->loop_id, fcport->d_id.b.domain,
  2635. fcport->d_id.b.area, fcport->d_id.b.al_pa));
  2636. /* Login fcport on switch. */
  2637. ha->isp_ops->fabric_login(vha, fcport->loop_id,
  2638. fcport->d_id.b.domain, fcport->d_id.b.area,
  2639. fcport->d_id.b.al_pa, mb, BIT_0);
  2640. if (mb[0] == MBS_PORT_ID_USED) {
  2641. /*
  2642. * Device has another loop ID. The firmware team
  2643. * recommends the driver perform an implicit login with
  2644. * the specified ID again. The ID we just used is save
  2645. * here so we return with an ID that can be tried by
  2646. * the next login.
  2647. */
  2648. retry++;
  2649. tmp_loopid = fcport->loop_id;
  2650. fcport->loop_id = mb[1];
  2651. DEBUG(printk("Fabric Login: port in use - next "
  2652. "loop id=0x%04x, port Id=%02x%02x%02x.\n",
  2653. fcport->loop_id, fcport->d_id.b.domain,
  2654. fcport->d_id.b.area, fcport->d_id.b.al_pa));
  2655. } else if (mb[0] == MBS_COMMAND_COMPLETE) {
  2656. /*
  2657. * Login succeeded.
  2658. */
  2659. if (retry) {
  2660. /* A retry occurred before. */
  2661. *next_loopid = tmp_loopid;
  2662. } else {
  2663. /*
  2664. * No retry occurred before. Just increment the
  2665. * ID value for next login.
  2666. */
  2667. *next_loopid = (fcport->loop_id + 1);
  2668. }
  2669. if (mb[1] & BIT_0) {
  2670. fcport->port_type = FCT_INITIATOR;
  2671. } else {
  2672. fcport->port_type = FCT_TARGET;
  2673. if (mb[1] & BIT_1) {
  2674. fcport->flags |= FCF_TAPE_PRESENT;
  2675. }
  2676. }
  2677. if (mb[10] & BIT_0)
  2678. fcport->supported_classes |= FC_COS_CLASS2;
  2679. if (mb[10] & BIT_1)
  2680. fcport->supported_classes |= FC_COS_CLASS3;
  2681. rval = QLA_SUCCESS;
  2682. break;
  2683. } else if (mb[0] == MBS_LOOP_ID_USED) {
  2684. /*
  2685. * Loop ID already used, try next loop ID.
  2686. */
  2687. fcport->loop_id++;
  2688. rval = qla2x00_find_new_loop_id(vha, fcport);
  2689. if (rval != QLA_SUCCESS) {
  2690. /* Ran out of loop IDs to use */
  2691. break;
  2692. }
  2693. } else if (mb[0] == MBS_COMMAND_ERROR) {
  2694. /*
  2695. * Firmware possibly timed out during login. If NO
  2696. * retries are left to do then the device is declared
  2697. * dead.
  2698. */
  2699. *next_loopid = fcport->loop_id;
  2700. ha->isp_ops->fabric_logout(vha, fcport->loop_id,
  2701. fcport->d_id.b.domain, fcport->d_id.b.area,
  2702. fcport->d_id.b.al_pa);
  2703. qla2x00_mark_device_lost(vha, fcport, 1, 0);
  2704. rval = 1;
  2705. break;
  2706. } else {
  2707. /*
  2708. * unrecoverable / not handled error
  2709. */
  2710. DEBUG2(printk("%s(%ld): failed=%x port_id=%02x%02x%02x "
  2711. "loop_id=%x jiffies=%lx.\n",
  2712. __func__, vha->host_no, mb[0],
  2713. fcport->d_id.b.domain, fcport->d_id.b.area,
  2714. fcport->d_id.b.al_pa, fcport->loop_id, jiffies));
  2715. *next_loopid = fcport->loop_id;
  2716. ha->isp_ops->fabric_logout(vha, fcport->loop_id,
  2717. fcport->d_id.b.domain, fcport->d_id.b.area,
  2718. fcport->d_id.b.al_pa);
  2719. fcport->loop_id = FC_NO_LOOP_ID;
  2720. fcport->login_retry = 0;
  2721. rval = 3;
  2722. break;
  2723. }
  2724. }
  2725. return (rval);
  2726. }
  2727. /*
  2728. * qla2x00_local_device_login
  2729. * Issue local device login command.
  2730. *
  2731. * Input:
  2732. * ha = adapter block pointer.
  2733. * loop_id = loop id of device to login to.
  2734. *
  2735. * Returns (Where's the #define!!!!):
  2736. * 0 - Login successfully
  2737. * 1 - Login failed
  2738. * 3 - Fatal error
  2739. */
  2740. int
  2741. qla2x00_local_device_login(scsi_qla_host_t *vha, fc_port_t *fcport)
  2742. {
  2743. int rval;
  2744. uint16_t mb[MAILBOX_REGISTER_COUNT];
  2745. memset(mb, 0, sizeof(mb));
  2746. rval = qla2x00_login_local_device(vha, fcport, mb, BIT_0);
  2747. if (rval == QLA_SUCCESS) {
  2748. /* Interrogate mailbox registers for any errors */
  2749. if (mb[0] == MBS_COMMAND_ERROR)
  2750. rval = 1;
  2751. else if (mb[0] == MBS_COMMAND_PARAMETER_ERROR)
  2752. /* device not in PCB table */
  2753. rval = 3;
  2754. }
  2755. return (rval);
  2756. }
  2757. /*
  2758. * qla2x00_loop_resync
  2759. * Resync with fibre channel devices.
  2760. *
  2761. * Input:
  2762. * ha = adapter block pointer.
  2763. *
  2764. * Returns:
  2765. * 0 = success
  2766. */
  2767. int
  2768. qla2x00_loop_resync(scsi_qla_host_t *vha)
  2769. {
  2770. int rval = QLA_SUCCESS;
  2771. uint32_t wait_time;
  2772. struct qla_hw_data *ha = vha->hw;
  2773. struct req_que *req = ha->req_q_map[vha->req_ques[0]];
  2774. struct rsp_que *rsp = req->rsp;
  2775. atomic_set(&vha->loop_state, LOOP_UPDATE);
  2776. clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
  2777. if (vha->flags.online) {
  2778. if (!(rval = qla2x00_fw_ready(vha))) {
  2779. /* Wait at most MAX_TARGET RSCNs for a stable link. */
  2780. wait_time = 256;
  2781. do {
  2782. atomic_set(&vha->loop_state, LOOP_UPDATE);
  2783. /* Issue a marker after FW becomes ready. */
  2784. qla2x00_marker(vha, req, rsp, 0, 0,
  2785. MK_SYNC_ALL);
  2786. vha->marker_needed = 0;
  2787. /* Remap devices on Loop. */
  2788. clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  2789. qla2x00_configure_loop(vha);
  2790. wait_time--;
  2791. } while (!atomic_read(&vha->loop_down_timer) &&
  2792. !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
  2793. && wait_time && (test_bit(LOOP_RESYNC_NEEDED,
  2794. &vha->dpc_flags)));
  2795. }
  2796. }
  2797. if (test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
  2798. return (QLA_FUNCTION_FAILED);
  2799. if (rval)
  2800. DEBUG2_3(printk("%s(): **** FAILED ****\n", __func__));
  2801. return (rval);
  2802. }
  2803. void
  2804. qla2x00_update_fcports(scsi_qla_host_t *vha)
  2805. {
  2806. fc_port_t *fcport;
  2807. /* Go with deferred removal of rport references. */
  2808. list_for_each_entry(fcport, &vha->vp_fcports, list)
  2809. if (fcport && fcport->drport &&
  2810. atomic_read(&fcport->state) != FCS_UNCONFIGURED)
  2811. qla2x00_rport_del(fcport);
  2812. }
  2813. /*
  2814. * qla2x00_abort_isp
  2815. * Resets ISP and aborts all outstanding commands.
  2816. *
  2817. * Input:
  2818. * ha = adapter block pointer.
  2819. *
  2820. * Returns:
  2821. * 0 = success
  2822. */
  2823. int
  2824. qla2x00_abort_isp(scsi_qla_host_t *vha)
  2825. {
  2826. int rval;
  2827. uint8_t status = 0;
  2828. struct qla_hw_data *ha = vha->hw;
  2829. struct scsi_qla_host *vp;
  2830. struct req_que *req = ha->req_q_map[0];
  2831. if (vha->flags.online) {
  2832. vha->flags.online = 0;
  2833. clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
  2834. ha->qla_stats.total_isp_aborts++;
  2835. qla_printk(KERN_INFO, ha,
  2836. "Performing ISP error recovery - ha= %p.\n", ha);
  2837. ha->isp_ops->reset_chip(vha);
  2838. atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
  2839. if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
  2840. atomic_set(&vha->loop_state, LOOP_DOWN);
  2841. qla2x00_mark_all_devices_lost(vha, 0);
  2842. list_for_each_entry(vp, &ha->vp_list, list)
  2843. qla2x00_mark_all_devices_lost(vp, 0);
  2844. } else {
  2845. if (!atomic_read(&vha->loop_down_timer))
  2846. atomic_set(&vha->loop_down_timer,
  2847. LOOP_DOWN_TIME);
  2848. }
  2849. /* Requeue all commands in outstanding command list. */
  2850. qla2x00_abort_all_cmds(vha, DID_RESET << 16);
  2851. ha->isp_ops->get_flash_version(vha, req->ring);
  2852. ha->isp_ops->nvram_config(vha);
  2853. if (!qla2x00_restart_isp(vha)) {
  2854. clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
  2855. if (!atomic_read(&vha->loop_down_timer)) {
  2856. /*
  2857. * Issue marker command only when we are going
  2858. * to start the I/O .
  2859. */
  2860. vha->marker_needed = 1;
  2861. }
  2862. vha->flags.online = 1;
  2863. ha->isp_ops->enable_intrs(ha);
  2864. ha->isp_abort_cnt = 0;
  2865. clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
  2866. if (ha->fce) {
  2867. ha->flags.fce_enabled = 1;
  2868. memset(ha->fce, 0,
  2869. fce_calc_size(ha->fce_bufs));
  2870. rval = qla2x00_enable_fce_trace(vha,
  2871. ha->fce_dma, ha->fce_bufs, ha->fce_mb,
  2872. &ha->fce_bufs);
  2873. if (rval) {
  2874. qla_printk(KERN_WARNING, ha,
  2875. "Unable to reinitialize FCE "
  2876. "(%d).\n", rval);
  2877. ha->flags.fce_enabled = 0;
  2878. }
  2879. }
  2880. if (ha->eft) {
  2881. memset(ha->eft, 0, EFT_SIZE);
  2882. rval = qla2x00_enable_eft_trace(vha,
  2883. ha->eft_dma, EFT_NUM_BUFFERS);
  2884. if (rval) {
  2885. qla_printk(KERN_WARNING, ha,
  2886. "Unable to reinitialize EFT "
  2887. "(%d).\n", rval);
  2888. }
  2889. }
  2890. } else { /* failed the ISP abort */
  2891. vha->flags.online = 1;
  2892. if (test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) {
  2893. if (ha->isp_abort_cnt == 0) {
  2894. qla_printk(KERN_WARNING, ha,
  2895. "ISP error recovery failed - "
  2896. "board disabled\n");
  2897. /*
  2898. * The next call disables the board
  2899. * completely.
  2900. */
  2901. ha->isp_ops->reset_adapter(vha);
  2902. vha->flags.online = 0;
  2903. clear_bit(ISP_ABORT_RETRY,
  2904. &vha->dpc_flags);
  2905. status = 0;
  2906. } else { /* schedule another ISP abort */
  2907. ha->isp_abort_cnt--;
  2908. DEBUG(printk("qla%ld: ISP abort - "
  2909. "retry remaining %d\n",
  2910. vha->host_no, ha->isp_abort_cnt));
  2911. status = 1;
  2912. }
  2913. } else {
  2914. ha->isp_abort_cnt = MAX_RETRIES_OF_ISP_ABORT;
  2915. DEBUG(printk("qla2x00(%ld): ISP error recovery "
  2916. "- retrying (%d) more times\n",
  2917. vha->host_no, ha->isp_abort_cnt));
  2918. set_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
  2919. status = 1;
  2920. }
  2921. }
  2922. }
  2923. if (!status) {
  2924. DEBUG(printk(KERN_INFO
  2925. "qla2x00_abort_isp(%ld): succeeded.\n",
  2926. vha->host_no));
  2927. list_for_each_entry(vp, &ha->vp_list, list) {
  2928. if (vp->vp_idx)
  2929. qla2x00_vp_abort_isp(vp);
  2930. }
  2931. } else {
  2932. qla_printk(KERN_INFO, ha,
  2933. "qla2x00_abort_isp: **** FAILED ****\n");
  2934. }
  2935. return(status);
  2936. }
  2937. /*
  2938. * qla2x00_restart_isp
  2939. * restarts the ISP after a reset
  2940. *
  2941. * Input:
  2942. * ha = adapter block pointer.
  2943. *
  2944. * Returns:
  2945. * 0 = success
  2946. */
  2947. static int
  2948. qla2x00_restart_isp(scsi_qla_host_t *vha)
  2949. {
  2950. uint8_t status = 0;
  2951. uint32_t wait_time;
  2952. struct qla_hw_data *ha = vha->hw;
  2953. struct req_que *req = ha->req_q_map[0];
  2954. struct rsp_que *rsp = ha->rsp_q_map[0];
  2955. /* If firmware needs to be loaded */
  2956. if (qla2x00_isp_firmware(vha)) {
  2957. vha->flags.online = 0;
  2958. status = ha->isp_ops->chip_diag(vha);
  2959. if (!status)
  2960. status = qla2x00_setup_chip(vha);
  2961. }
  2962. if (!status && !(status = qla2x00_init_rings(vha))) {
  2963. clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
  2964. /* Initialize the queues in use */
  2965. qla25xx_init_queues(ha);
  2966. status = qla2x00_fw_ready(vha);
  2967. if (!status) {
  2968. DEBUG(printk("%s(): Start configure loop, "
  2969. "status = %d\n", __func__, status));
  2970. /* Issue a marker after FW becomes ready. */
  2971. qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL);
  2972. vha->flags.online = 1;
  2973. /* Wait at most MAX_TARGET RSCNs for a stable link. */
  2974. wait_time = 256;
  2975. do {
  2976. clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  2977. qla2x00_configure_loop(vha);
  2978. wait_time--;
  2979. } while (!atomic_read(&vha->loop_down_timer) &&
  2980. !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
  2981. && wait_time && (test_bit(LOOP_RESYNC_NEEDED,
  2982. &vha->dpc_flags)));
  2983. }
  2984. /* if no cable then assume it's good */
  2985. if ((vha->device_flags & DFLG_NO_CABLE))
  2986. status = 0;
  2987. DEBUG(printk("%s(): Configure loop done, status = 0x%x\n",
  2988. __func__,
  2989. status));
  2990. }
  2991. return (status);
  2992. }
  2993. static int
  2994. qla25xx_init_queues(struct qla_hw_data *ha)
  2995. {
  2996. struct rsp_que *rsp = NULL;
  2997. struct req_que *req = NULL;
  2998. struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
  2999. int ret = -1;
  3000. int i;
  3001. for (i = 1; i < ha->max_queues; i++) {
  3002. rsp = ha->rsp_q_map[i];
  3003. if (rsp) {
  3004. rsp->options &= ~BIT_0;
  3005. ret = qla25xx_init_rsp_que(base_vha, rsp);
  3006. if (ret != QLA_SUCCESS)
  3007. DEBUG2_17(printk(KERN_WARNING
  3008. "%s Rsp que:%d init failed\n", __func__,
  3009. rsp->id));
  3010. else
  3011. DEBUG2_17(printk(KERN_INFO
  3012. "%s Rsp que:%d inited\n", __func__,
  3013. rsp->id));
  3014. }
  3015. req = ha->req_q_map[i];
  3016. if (req) {
  3017. /* Clear outstanding commands array. */
  3018. req->options &= ~BIT_0;
  3019. ret = qla25xx_init_req_que(base_vha, req);
  3020. if (ret != QLA_SUCCESS)
  3021. DEBUG2_17(printk(KERN_WARNING
  3022. "%s Req que:%d init failed\n", __func__,
  3023. req->id));
  3024. else
  3025. DEBUG2_17(printk(KERN_WARNING
  3026. "%s Req que:%d inited\n", __func__,
  3027. req->id));
  3028. }
  3029. }
  3030. return ret;
  3031. }
  3032. /*
  3033. * qla2x00_reset_adapter
  3034. * Reset adapter.
  3035. *
  3036. * Input:
  3037. * ha = adapter block pointer.
  3038. */
  3039. void
  3040. qla2x00_reset_adapter(scsi_qla_host_t *vha)
  3041. {
  3042. unsigned long flags = 0;
  3043. struct qla_hw_data *ha = vha->hw;
  3044. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  3045. vha->flags.online = 0;
  3046. ha->isp_ops->disable_intrs(ha);
  3047. spin_lock_irqsave(&ha->hardware_lock, flags);
  3048. WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
  3049. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  3050. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  3051. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  3052. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  3053. }
  3054. void
  3055. qla24xx_reset_adapter(scsi_qla_host_t *vha)
  3056. {
  3057. unsigned long flags = 0;
  3058. struct qla_hw_data *ha = vha->hw;
  3059. struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
  3060. vha->flags.online = 0;
  3061. ha->isp_ops->disable_intrs(ha);
  3062. spin_lock_irqsave(&ha->hardware_lock, flags);
  3063. WRT_REG_DWORD(&reg->hccr, HCCRX_SET_RISC_RESET);
  3064. RD_REG_DWORD(&reg->hccr);
  3065. WRT_REG_DWORD(&reg->hccr, HCCRX_REL_RISC_PAUSE);
  3066. RD_REG_DWORD(&reg->hccr);
  3067. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  3068. if (IS_NOPOLLING_TYPE(ha))
  3069. ha->isp_ops->enable_intrs(ha);
  3070. }
  3071. /* On sparc systems, obtain port and node WWN from firmware
  3072. * properties.
  3073. */
  3074. static void qla24xx_nvram_wwn_from_ofw(scsi_qla_host_t *vha,
  3075. struct nvram_24xx *nv)
  3076. {
  3077. #ifdef CONFIG_SPARC
  3078. struct qla_hw_data *ha = vha->hw;
  3079. struct pci_dev *pdev = ha->pdev;
  3080. struct device_node *dp = pci_device_to_OF_node(pdev);
  3081. const u8 *val;
  3082. int len;
  3083. val = of_get_property(dp, "port-wwn", &len);
  3084. if (val && len >= WWN_SIZE)
  3085. memcpy(nv->port_name, val, WWN_SIZE);
  3086. val = of_get_property(dp, "node-wwn", &len);
  3087. if (val && len >= WWN_SIZE)
  3088. memcpy(nv->node_name, val, WWN_SIZE);
  3089. #endif
  3090. }
  3091. int
  3092. qla24xx_nvram_config(scsi_qla_host_t *vha)
  3093. {
  3094. int rval;
  3095. struct init_cb_24xx *icb;
  3096. struct nvram_24xx *nv;
  3097. uint32_t *dptr;
  3098. uint8_t *dptr1, *dptr2;
  3099. uint32_t chksum;
  3100. uint16_t cnt;
  3101. struct qla_hw_data *ha = vha->hw;
  3102. rval = QLA_SUCCESS;
  3103. icb = (struct init_cb_24xx *)ha->init_cb;
  3104. nv = ha->nvram;
  3105. /* Determine NVRAM starting address. */
  3106. ha->nvram_size = sizeof(struct nvram_24xx);
  3107. ha->nvram_base = FA_NVRAM_FUNC0_ADDR;
  3108. ha->vpd_size = FA_NVRAM_VPD_SIZE;
  3109. ha->vpd_base = FA_NVRAM_VPD0_ADDR;
  3110. if (PCI_FUNC(ha->pdev->devfn)) {
  3111. ha->nvram_base = FA_NVRAM_FUNC1_ADDR;
  3112. ha->vpd_base = FA_NVRAM_VPD1_ADDR;
  3113. }
  3114. /* Get VPD data into cache */
  3115. ha->vpd = ha->nvram + VPD_OFFSET;
  3116. ha->isp_ops->read_nvram(vha, (uint8_t *)ha->vpd,
  3117. ha->nvram_base - FA_NVRAM_FUNC0_ADDR, FA_NVRAM_VPD_SIZE * 4);
  3118. /* Get NVRAM data into cache and calculate checksum. */
  3119. dptr = (uint32_t *)nv;
  3120. ha->isp_ops->read_nvram(vha, (uint8_t *)dptr, ha->nvram_base,
  3121. ha->nvram_size);
  3122. for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++)
  3123. chksum += le32_to_cpu(*dptr++);
  3124. DEBUG5(printk("scsi(%ld): Contents of NVRAM\n", ha->host_no));
  3125. DEBUG5(qla2x00_dump_buffer((uint8_t *)nv, ha->nvram_size));
  3126. /* Bad NVRAM data, set defaults parameters. */
  3127. if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P'
  3128. || nv->id[3] != ' ' ||
  3129. nv->nvram_version < __constant_cpu_to_le16(ICB_VERSION)) {
  3130. /* Reset NVRAM data. */
  3131. qla_printk(KERN_WARNING, ha, "Inconsistent NVRAM detected: "
  3132. "checksum=0x%x id=%c version=0x%x.\n", chksum, nv->id[0],
  3133. le16_to_cpu(nv->nvram_version));
  3134. qla_printk(KERN_WARNING, ha, "Falling back to functioning (yet "
  3135. "invalid -- WWPN) defaults.\n");
  3136. /*
  3137. * Set default initialization control block.
  3138. */
  3139. memset(nv, 0, ha->nvram_size);
  3140. nv->nvram_version = __constant_cpu_to_le16(ICB_VERSION);
  3141. nv->version = __constant_cpu_to_le16(ICB_VERSION);
  3142. nv->frame_payload_size = __constant_cpu_to_le16(2048);
  3143. nv->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  3144. nv->exchange_count = __constant_cpu_to_le16(0);
  3145. nv->hard_address = __constant_cpu_to_le16(124);
  3146. nv->port_name[0] = 0x21;
  3147. nv->port_name[1] = 0x00 + PCI_FUNC(ha->pdev->devfn);
  3148. nv->port_name[2] = 0x00;
  3149. nv->port_name[3] = 0xe0;
  3150. nv->port_name[4] = 0x8b;
  3151. nv->port_name[5] = 0x1c;
  3152. nv->port_name[6] = 0x55;
  3153. nv->port_name[7] = 0x86;
  3154. nv->node_name[0] = 0x20;
  3155. nv->node_name[1] = 0x00;
  3156. nv->node_name[2] = 0x00;
  3157. nv->node_name[3] = 0xe0;
  3158. nv->node_name[4] = 0x8b;
  3159. nv->node_name[5] = 0x1c;
  3160. nv->node_name[6] = 0x55;
  3161. nv->node_name[7] = 0x86;
  3162. qla24xx_nvram_wwn_from_ofw(vha, nv);
  3163. nv->login_retry_count = __constant_cpu_to_le16(8);
  3164. nv->interrupt_delay_timer = __constant_cpu_to_le16(0);
  3165. nv->login_timeout = __constant_cpu_to_le16(0);
  3166. nv->firmware_options_1 =
  3167. __constant_cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1);
  3168. nv->firmware_options_2 = __constant_cpu_to_le32(2 << 4);
  3169. nv->firmware_options_2 |= __constant_cpu_to_le32(BIT_12);
  3170. nv->firmware_options_3 = __constant_cpu_to_le32(2 << 13);
  3171. nv->host_p = __constant_cpu_to_le32(BIT_11|BIT_10);
  3172. nv->efi_parameters = __constant_cpu_to_le32(0);
  3173. nv->reset_delay = 5;
  3174. nv->max_luns_per_target = __constant_cpu_to_le16(128);
  3175. nv->port_down_retry_count = __constant_cpu_to_le16(30);
  3176. nv->link_down_timeout = __constant_cpu_to_le16(30);
  3177. rval = 1;
  3178. }
  3179. /* Reset Initialization control block */
  3180. memset(icb, 0, ha->init_cb_size);
  3181. /* Copy 1st segment. */
  3182. dptr1 = (uint8_t *)icb;
  3183. dptr2 = (uint8_t *)&nv->version;
  3184. cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version;
  3185. while (cnt--)
  3186. *dptr1++ = *dptr2++;
  3187. icb->login_retry_count = nv->login_retry_count;
  3188. icb->link_down_on_nos = nv->link_down_on_nos;
  3189. /* Copy 2nd segment. */
  3190. dptr1 = (uint8_t *)&icb->interrupt_delay_timer;
  3191. dptr2 = (uint8_t *)&nv->interrupt_delay_timer;
  3192. cnt = (uint8_t *)&icb->reserved_3 -
  3193. (uint8_t *)&icb->interrupt_delay_timer;
  3194. while (cnt--)
  3195. *dptr1++ = *dptr2++;
  3196. /*
  3197. * Setup driver NVRAM options.
  3198. */
  3199. qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name),
  3200. "QLA2462");
  3201. /* Use alternate WWN? */
  3202. if (nv->host_p & __constant_cpu_to_le32(BIT_15)) {
  3203. memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
  3204. memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
  3205. }
  3206. /* Prepare nodename */
  3207. if ((icb->firmware_options_1 & __constant_cpu_to_le32(BIT_14)) == 0) {
  3208. /*
  3209. * Firmware will apply the following mask if the nodename was
  3210. * not provided.
  3211. */
  3212. memcpy(icb->node_name, icb->port_name, WWN_SIZE);
  3213. icb->node_name[0] &= 0xF0;
  3214. }
  3215. /* Set host adapter parameters. */
  3216. ha->flags.disable_risc_code_load = 0;
  3217. ha->flags.enable_lip_reset = 0;
  3218. ha->flags.enable_lip_full_login =
  3219. le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0;
  3220. ha->flags.enable_target_reset =
  3221. le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0;
  3222. ha->flags.enable_led_scheme = 0;
  3223. ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0;
  3224. ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) &
  3225. (BIT_6 | BIT_5 | BIT_4)) >> 4;
  3226. memcpy(ha->fw_seriallink_options24, nv->seriallink_options,
  3227. sizeof(ha->fw_seriallink_options24));
  3228. /* save HBA serial number */
  3229. ha->serial0 = icb->port_name[5];
  3230. ha->serial1 = icb->port_name[6];
  3231. ha->serial2 = icb->port_name[7];
  3232. memcpy(vha->node_name, icb->node_name, WWN_SIZE);
  3233. memcpy(vha->port_name, icb->port_name, WWN_SIZE);
  3234. icb->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  3235. ha->retry_count = le16_to_cpu(nv->login_retry_count);
  3236. /* Set minimum login_timeout to 4 seconds. */
  3237. if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout)
  3238. nv->login_timeout = cpu_to_le16(ql2xlogintimeout);
  3239. if (le16_to_cpu(nv->login_timeout) < 4)
  3240. nv->login_timeout = __constant_cpu_to_le16(4);
  3241. ha->login_timeout = le16_to_cpu(nv->login_timeout);
  3242. icb->login_timeout = nv->login_timeout;
  3243. /* Set minimum RATOV to 100 tenths of a second. */
  3244. ha->r_a_tov = 100;
  3245. ha->loop_reset_delay = nv->reset_delay;
  3246. /* Link Down Timeout = 0:
  3247. *
  3248. * When Port Down timer expires we will start returning
  3249. * I/O's to OS with "DID_NO_CONNECT".
  3250. *
  3251. * Link Down Timeout != 0:
  3252. *
  3253. * The driver waits for the link to come up after link down
  3254. * before returning I/Os to OS with "DID_NO_CONNECT".
  3255. */
  3256. if (le16_to_cpu(nv->link_down_timeout) == 0) {
  3257. ha->loop_down_abort_time =
  3258. (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
  3259. } else {
  3260. ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout);
  3261. ha->loop_down_abort_time =
  3262. (LOOP_DOWN_TIME - ha->link_down_timeout);
  3263. }
  3264. /* Need enough time to try and get the port back. */
  3265. ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count);
  3266. if (qlport_down_retry)
  3267. ha->port_down_retry_count = qlport_down_retry;
  3268. /* Set login_retry_count */
  3269. ha->login_retry_count = le16_to_cpu(nv->login_retry_count);
  3270. if (ha->port_down_retry_count ==
  3271. le16_to_cpu(nv->port_down_retry_count) &&
  3272. ha->port_down_retry_count > 3)
  3273. ha->login_retry_count = ha->port_down_retry_count;
  3274. else if (ha->port_down_retry_count > (int)ha->login_retry_count)
  3275. ha->login_retry_count = ha->port_down_retry_count;
  3276. if (ql2xloginretrycount)
  3277. ha->login_retry_count = ql2xloginretrycount;
  3278. /* Enable ZIO. */
  3279. if (!vha->flags.init_done) {
  3280. ha->zio_mode = le32_to_cpu(icb->firmware_options_2) &
  3281. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  3282. ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ?
  3283. le16_to_cpu(icb->interrupt_delay_timer): 2;
  3284. }
  3285. icb->firmware_options_2 &= __constant_cpu_to_le32(
  3286. ~(BIT_3 | BIT_2 | BIT_1 | BIT_0));
  3287. vha->flags.process_response_queue = 0;
  3288. if (ha->zio_mode != QLA_ZIO_DISABLED) {
  3289. ha->zio_mode = QLA_ZIO_MODE_6;
  3290. DEBUG2(printk("scsi(%ld): ZIO mode %d enabled; timer delay "
  3291. "(%d us).\n", vha->host_no, ha->zio_mode,
  3292. ha->zio_timer * 100));
  3293. qla_printk(KERN_INFO, ha,
  3294. "ZIO mode %d enabled; timer delay (%d us).\n",
  3295. ha->zio_mode, ha->zio_timer * 100);
  3296. icb->firmware_options_2 |= cpu_to_le32(
  3297. (uint32_t)ha->zio_mode);
  3298. icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer);
  3299. vha->flags.process_response_queue = 1;
  3300. }
  3301. if (rval) {
  3302. DEBUG2_3(printk(KERN_WARNING
  3303. "scsi(%ld): NVRAM configuration failed!\n", vha->host_no));
  3304. }
  3305. return (rval);
  3306. }
  3307. static int
  3308. qla24xx_load_risc_flash(scsi_qla_host_t *vha, uint32_t *srisc_addr)
  3309. {
  3310. int rval = QLA_SUCCESS;
  3311. int segments, fragment;
  3312. uint32_t faddr;
  3313. uint32_t *dcode, dlen;
  3314. uint32_t risc_addr;
  3315. uint32_t risc_size;
  3316. uint32_t i;
  3317. struct qla_hw_data *ha = vha->hw;
  3318. struct req_que *req = ha->req_q_map[0];
  3319. qla_printk(KERN_INFO, ha,
  3320. "FW: Loading from flash (%x)...\n", ha->flt_region_fw);
  3321. rval = QLA_SUCCESS;
  3322. segments = FA_RISC_CODE_SEGMENTS;
  3323. faddr = ha->flt_region_fw;
  3324. dcode = (uint32_t *)req->ring;
  3325. *srisc_addr = 0;
  3326. /* Validate firmware image by checking version. */
  3327. qla24xx_read_flash_data(vha, dcode, faddr + 4, 4);
  3328. for (i = 0; i < 4; i++)
  3329. dcode[i] = be32_to_cpu(dcode[i]);
  3330. if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff &&
  3331. dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) ||
  3332. (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 &&
  3333. dcode[3] == 0)) {
  3334. qla_printk(KERN_WARNING, ha,
  3335. "Unable to verify integrity of flash firmware image!\n");
  3336. qla_printk(KERN_WARNING, ha,
  3337. "Firmware data: %08x %08x %08x %08x!\n", dcode[0],
  3338. dcode[1], dcode[2], dcode[3]);
  3339. return QLA_FUNCTION_FAILED;
  3340. }
  3341. while (segments && rval == QLA_SUCCESS) {
  3342. /* Read segment's load information. */
  3343. qla24xx_read_flash_data(vha, dcode, faddr, 4);
  3344. risc_addr = be32_to_cpu(dcode[2]);
  3345. *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr;
  3346. risc_size = be32_to_cpu(dcode[3]);
  3347. fragment = 0;
  3348. while (risc_size > 0 && rval == QLA_SUCCESS) {
  3349. dlen = (uint32_t)(ha->fw_transfer_size >> 2);
  3350. if (dlen > risc_size)
  3351. dlen = risc_size;
  3352. DEBUG7(printk("scsi(%ld): Loading risc segment@ risc "
  3353. "addr %x, number of dwords 0x%x, offset 0x%x.\n",
  3354. vha->host_no, risc_addr, dlen, faddr));
  3355. qla24xx_read_flash_data(vha, dcode, faddr, dlen);
  3356. for (i = 0; i < dlen; i++)
  3357. dcode[i] = swab32(dcode[i]);
  3358. rval = qla2x00_load_ram(vha, req->dma, risc_addr,
  3359. dlen);
  3360. if (rval) {
  3361. DEBUG(printk("scsi(%ld):[ERROR] Failed to load "
  3362. "segment %d of firmware\n", vha->host_no,
  3363. fragment));
  3364. qla_printk(KERN_WARNING, ha,
  3365. "[ERROR] Failed to load segment %d of "
  3366. "firmware\n", fragment);
  3367. break;
  3368. }
  3369. faddr += dlen;
  3370. risc_addr += dlen;
  3371. risc_size -= dlen;
  3372. fragment++;
  3373. }
  3374. /* Next segment. */
  3375. segments--;
  3376. }
  3377. return rval;
  3378. }
  3379. #define QLA_FW_URL "ftp://ftp.qlogic.com/outgoing/linux/firmware/"
  3380. int
  3381. qla2x00_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
  3382. {
  3383. int rval;
  3384. int i, fragment;
  3385. uint16_t *wcode, *fwcode;
  3386. uint32_t risc_addr, risc_size, fwclen, wlen, *seg;
  3387. struct fw_blob *blob;
  3388. struct qla_hw_data *ha = vha->hw;
  3389. struct req_que *req = ha->req_q_map[0];
  3390. /* Load firmware blob. */
  3391. blob = qla2x00_request_firmware(vha);
  3392. if (!blob) {
  3393. qla_printk(KERN_ERR, ha, "Firmware image unavailable.\n");
  3394. qla_printk(KERN_ERR, ha, "Firmware images can be retrieved "
  3395. "from: " QLA_FW_URL ".\n");
  3396. return QLA_FUNCTION_FAILED;
  3397. }
  3398. rval = QLA_SUCCESS;
  3399. wcode = (uint16_t *)req->ring;
  3400. *srisc_addr = 0;
  3401. fwcode = (uint16_t *)blob->fw->data;
  3402. fwclen = 0;
  3403. /* Validate firmware image by checking version. */
  3404. if (blob->fw->size < 8 * sizeof(uint16_t)) {
  3405. qla_printk(KERN_WARNING, ha,
  3406. "Unable to verify integrity of firmware image (%Zd)!\n",
  3407. blob->fw->size);
  3408. goto fail_fw_integrity;
  3409. }
  3410. for (i = 0; i < 4; i++)
  3411. wcode[i] = be16_to_cpu(fwcode[i + 4]);
  3412. if ((wcode[0] == 0xffff && wcode[1] == 0xffff && wcode[2] == 0xffff &&
  3413. wcode[3] == 0xffff) || (wcode[0] == 0 && wcode[1] == 0 &&
  3414. wcode[2] == 0 && wcode[3] == 0)) {
  3415. qla_printk(KERN_WARNING, ha,
  3416. "Unable to verify integrity of firmware image!\n");
  3417. qla_printk(KERN_WARNING, ha,
  3418. "Firmware data: %04x %04x %04x %04x!\n", wcode[0],
  3419. wcode[1], wcode[2], wcode[3]);
  3420. goto fail_fw_integrity;
  3421. }
  3422. seg = blob->segs;
  3423. while (*seg && rval == QLA_SUCCESS) {
  3424. risc_addr = *seg;
  3425. *srisc_addr = *srisc_addr == 0 ? *seg : *srisc_addr;
  3426. risc_size = be16_to_cpu(fwcode[3]);
  3427. /* Validate firmware image size. */
  3428. fwclen += risc_size * sizeof(uint16_t);
  3429. if (blob->fw->size < fwclen) {
  3430. qla_printk(KERN_WARNING, ha,
  3431. "Unable to verify integrity of firmware image "
  3432. "(%Zd)!\n", blob->fw->size);
  3433. goto fail_fw_integrity;
  3434. }
  3435. fragment = 0;
  3436. while (risc_size > 0 && rval == QLA_SUCCESS) {
  3437. wlen = (uint16_t)(ha->fw_transfer_size >> 1);
  3438. if (wlen > risc_size)
  3439. wlen = risc_size;
  3440. DEBUG7(printk("scsi(%ld): Loading risc segment@ risc "
  3441. "addr %x, number of words 0x%x.\n", vha->host_no,
  3442. risc_addr, wlen));
  3443. for (i = 0; i < wlen; i++)
  3444. wcode[i] = swab16(fwcode[i]);
  3445. rval = qla2x00_load_ram(vha, req->dma, risc_addr,
  3446. wlen);
  3447. if (rval) {
  3448. DEBUG(printk("scsi(%ld):[ERROR] Failed to load "
  3449. "segment %d of firmware\n", vha->host_no,
  3450. fragment));
  3451. qla_printk(KERN_WARNING, ha,
  3452. "[ERROR] Failed to load segment %d of "
  3453. "firmware\n", fragment);
  3454. break;
  3455. }
  3456. fwcode += wlen;
  3457. risc_addr += wlen;
  3458. risc_size -= wlen;
  3459. fragment++;
  3460. }
  3461. /* Next segment. */
  3462. seg++;
  3463. }
  3464. return rval;
  3465. fail_fw_integrity:
  3466. return QLA_FUNCTION_FAILED;
  3467. }
  3468. static int
  3469. qla24xx_load_risc_blob(scsi_qla_host_t *vha, uint32_t *srisc_addr)
  3470. {
  3471. int rval;
  3472. int segments, fragment;
  3473. uint32_t *dcode, dlen;
  3474. uint32_t risc_addr;
  3475. uint32_t risc_size;
  3476. uint32_t i;
  3477. struct fw_blob *blob;
  3478. uint32_t *fwcode, fwclen;
  3479. struct qla_hw_data *ha = vha->hw;
  3480. struct req_que *req = ha->req_q_map[0];
  3481. /* Load firmware blob. */
  3482. blob = qla2x00_request_firmware(vha);
  3483. if (!blob) {
  3484. qla_printk(KERN_ERR, ha, "Firmware image unavailable.\n");
  3485. qla_printk(KERN_ERR, ha, "Firmware images can be retrieved "
  3486. "from: " QLA_FW_URL ".\n");
  3487. return QLA_FUNCTION_FAILED;
  3488. }
  3489. qla_printk(KERN_INFO, ha,
  3490. "FW: Loading via request-firmware...\n");
  3491. rval = QLA_SUCCESS;
  3492. segments = FA_RISC_CODE_SEGMENTS;
  3493. dcode = (uint32_t *)req->ring;
  3494. *srisc_addr = 0;
  3495. fwcode = (uint32_t *)blob->fw->data;
  3496. fwclen = 0;
  3497. /* Validate firmware image by checking version. */
  3498. if (blob->fw->size < 8 * sizeof(uint32_t)) {
  3499. qla_printk(KERN_WARNING, ha,
  3500. "Unable to verify integrity of firmware image (%Zd)!\n",
  3501. blob->fw->size);
  3502. goto fail_fw_integrity;
  3503. }
  3504. for (i = 0; i < 4; i++)
  3505. dcode[i] = be32_to_cpu(fwcode[i + 4]);
  3506. if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff &&
  3507. dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) ||
  3508. (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 &&
  3509. dcode[3] == 0)) {
  3510. qla_printk(KERN_WARNING, ha,
  3511. "Unable to verify integrity of firmware image!\n");
  3512. qla_printk(KERN_WARNING, ha,
  3513. "Firmware data: %08x %08x %08x %08x!\n", dcode[0],
  3514. dcode[1], dcode[2], dcode[3]);
  3515. goto fail_fw_integrity;
  3516. }
  3517. while (segments && rval == QLA_SUCCESS) {
  3518. risc_addr = be32_to_cpu(fwcode[2]);
  3519. *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr;
  3520. risc_size = be32_to_cpu(fwcode[3]);
  3521. /* Validate firmware image size. */
  3522. fwclen += risc_size * sizeof(uint32_t);
  3523. if (blob->fw->size < fwclen) {
  3524. qla_printk(KERN_WARNING, ha,
  3525. "Unable to verify integrity of firmware image "
  3526. "(%Zd)!\n", blob->fw->size);
  3527. goto fail_fw_integrity;
  3528. }
  3529. fragment = 0;
  3530. while (risc_size > 0 && rval == QLA_SUCCESS) {
  3531. dlen = (uint32_t)(ha->fw_transfer_size >> 2);
  3532. if (dlen > risc_size)
  3533. dlen = risc_size;
  3534. DEBUG7(printk("scsi(%ld): Loading risc segment@ risc "
  3535. "addr %x, number of dwords 0x%x.\n", vha->host_no,
  3536. risc_addr, dlen));
  3537. for (i = 0; i < dlen; i++)
  3538. dcode[i] = swab32(fwcode[i]);
  3539. rval = qla2x00_load_ram(vha, req->dma, risc_addr,
  3540. dlen);
  3541. if (rval) {
  3542. DEBUG(printk("scsi(%ld):[ERROR] Failed to load "
  3543. "segment %d of firmware\n", vha->host_no,
  3544. fragment));
  3545. qla_printk(KERN_WARNING, ha,
  3546. "[ERROR] Failed to load segment %d of "
  3547. "firmware\n", fragment);
  3548. break;
  3549. }
  3550. fwcode += dlen;
  3551. risc_addr += dlen;
  3552. risc_size -= dlen;
  3553. fragment++;
  3554. }
  3555. /* Next segment. */
  3556. segments--;
  3557. }
  3558. return rval;
  3559. fail_fw_integrity:
  3560. return QLA_FUNCTION_FAILED;
  3561. }
  3562. int
  3563. qla24xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
  3564. {
  3565. int rval;
  3566. /*
  3567. * FW Load priority:
  3568. * 1) Firmware via request-firmware interface (.bin file).
  3569. * 2) Firmware residing in flash.
  3570. */
  3571. rval = qla24xx_load_risc_blob(vha, srisc_addr);
  3572. if (rval == QLA_SUCCESS)
  3573. return rval;
  3574. return qla24xx_load_risc_flash(vha, srisc_addr);
  3575. }
  3576. int
  3577. qla81xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
  3578. {
  3579. int rval;
  3580. /*
  3581. * FW Load priority:
  3582. * 1) Firmware residing in flash.
  3583. * 2) Firmware via request-firmware interface (.bin file).
  3584. */
  3585. rval = qla24xx_load_risc_flash(vha, srisc_addr);
  3586. if (rval == QLA_SUCCESS)
  3587. return rval;
  3588. return qla24xx_load_risc_blob(vha, srisc_addr);
  3589. }
  3590. void
  3591. qla2x00_try_to_stop_firmware(scsi_qla_host_t *vha)
  3592. {
  3593. int ret, retries;
  3594. struct qla_hw_data *ha = vha->hw;
  3595. if (!IS_FWI2_CAPABLE(ha))
  3596. return;
  3597. if (!ha->fw_major_version)
  3598. return;
  3599. ret = qla2x00_stop_firmware(vha);
  3600. for (retries = 5; ret != QLA_SUCCESS && ret != QLA_FUNCTION_TIMEOUT &&
  3601. retries ; retries--) {
  3602. ha->isp_ops->reset_chip(vha);
  3603. if (ha->isp_ops->chip_diag(vha) != QLA_SUCCESS)
  3604. continue;
  3605. if (qla2x00_setup_chip(vha) != QLA_SUCCESS)
  3606. continue;
  3607. qla_printk(KERN_INFO, ha,
  3608. "Attempting retry of stop-firmware command...\n");
  3609. ret = qla2x00_stop_firmware(vha);
  3610. }
  3611. }
  3612. int
  3613. qla24xx_configure_vhba(scsi_qla_host_t *vha)
  3614. {
  3615. int rval = QLA_SUCCESS;
  3616. uint16_t mb[MAILBOX_REGISTER_COUNT];
  3617. struct qla_hw_data *ha = vha->hw;
  3618. struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
  3619. struct req_que *req = ha->req_q_map[vha->req_ques[0]];
  3620. struct rsp_que *rsp = req->rsp;
  3621. if (!vha->vp_idx)
  3622. return -EINVAL;
  3623. rval = qla2x00_fw_ready(base_vha);
  3624. if (rval == QLA_SUCCESS) {
  3625. clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
  3626. qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL);
  3627. }
  3628. vha->flags.management_server_logged_in = 0;
  3629. /* Login to SNS first */
  3630. ha->isp_ops->fabric_login(vha, NPH_SNS, 0xff, 0xff, 0xfc, mb, BIT_1);
  3631. if (mb[0] != MBS_COMMAND_COMPLETE) {
  3632. DEBUG15(qla_printk(KERN_INFO, ha,
  3633. "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x "
  3634. "mb[2]=%x mb[6]=%x mb[7]=%x\n", NPH_SNS,
  3635. mb[0], mb[1], mb[2], mb[6], mb[7]));
  3636. return (QLA_FUNCTION_FAILED);
  3637. }
  3638. atomic_set(&vha->loop_down_timer, 0);
  3639. atomic_set(&vha->loop_state, LOOP_UP);
  3640. set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  3641. set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
  3642. rval = qla2x00_loop_resync(base_vha);
  3643. return rval;
  3644. }
  3645. /* 84XX Support **************************************************************/
  3646. static LIST_HEAD(qla_cs84xx_list);
  3647. static DEFINE_MUTEX(qla_cs84xx_mutex);
  3648. static struct qla_chip_state_84xx *
  3649. qla84xx_get_chip(struct scsi_qla_host *vha)
  3650. {
  3651. struct qla_chip_state_84xx *cs84xx;
  3652. struct qla_hw_data *ha = vha->hw;
  3653. mutex_lock(&qla_cs84xx_mutex);
  3654. /* Find any shared 84xx chip. */
  3655. list_for_each_entry(cs84xx, &qla_cs84xx_list, list) {
  3656. if (cs84xx->bus == ha->pdev->bus) {
  3657. kref_get(&cs84xx->kref);
  3658. goto done;
  3659. }
  3660. }
  3661. cs84xx = kzalloc(sizeof(*cs84xx), GFP_KERNEL);
  3662. if (!cs84xx)
  3663. goto done;
  3664. kref_init(&cs84xx->kref);
  3665. spin_lock_init(&cs84xx->access_lock);
  3666. mutex_init(&cs84xx->fw_update_mutex);
  3667. cs84xx->bus = ha->pdev->bus;
  3668. list_add_tail(&cs84xx->list, &qla_cs84xx_list);
  3669. done:
  3670. mutex_unlock(&qla_cs84xx_mutex);
  3671. return cs84xx;
  3672. }
  3673. static void
  3674. __qla84xx_chip_release(struct kref *kref)
  3675. {
  3676. struct qla_chip_state_84xx *cs84xx =
  3677. container_of(kref, struct qla_chip_state_84xx, kref);
  3678. mutex_lock(&qla_cs84xx_mutex);
  3679. list_del(&cs84xx->list);
  3680. mutex_unlock(&qla_cs84xx_mutex);
  3681. kfree(cs84xx);
  3682. }
  3683. void
  3684. qla84xx_put_chip(struct scsi_qla_host *vha)
  3685. {
  3686. struct qla_hw_data *ha = vha->hw;
  3687. if (ha->cs84xx)
  3688. kref_put(&ha->cs84xx->kref, __qla84xx_chip_release);
  3689. }
  3690. static int
  3691. qla84xx_init_chip(scsi_qla_host_t *vha)
  3692. {
  3693. int rval;
  3694. uint16_t status[2];
  3695. struct qla_hw_data *ha = vha->hw;
  3696. mutex_lock(&ha->cs84xx->fw_update_mutex);
  3697. rval = qla84xx_verify_chip(vha, status);
  3698. mutex_unlock(&ha->cs84xx->fw_update_mutex);
  3699. return rval != QLA_SUCCESS || status[0] ? QLA_FUNCTION_FAILED:
  3700. QLA_SUCCESS;
  3701. }
  3702. /* 81XX Support **************************************************************/
  3703. int
  3704. qla81xx_nvram_config(scsi_qla_host_t *vha)
  3705. {
  3706. int rval;
  3707. struct init_cb_81xx *icb;
  3708. struct nvram_81xx *nv;
  3709. uint32_t *dptr;
  3710. uint8_t *dptr1, *dptr2;
  3711. uint32_t chksum;
  3712. uint16_t cnt;
  3713. struct qla_hw_data *ha = vha->hw;
  3714. rval = QLA_SUCCESS;
  3715. icb = (struct init_cb_81xx *)ha->init_cb;
  3716. nv = ha->nvram;
  3717. /* Determine NVRAM starting address. */
  3718. ha->nvram_size = sizeof(struct nvram_81xx);
  3719. ha->nvram_base = FA_NVRAM_FUNC0_ADDR;
  3720. ha->vpd_size = FA_NVRAM_VPD_SIZE;
  3721. ha->vpd_base = FA_NVRAM_VPD0_ADDR;
  3722. if (PCI_FUNC(ha->pdev->devfn) & 1) {
  3723. ha->nvram_base = FA_NVRAM_FUNC1_ADDR;
  3724. ha->vpd_base = FA_NVRAM_VPD1_ADDR;
  3725. }
  3726. /* Get VPD data into cache */
  3727. ha->vpd = ha->nvram + VPD_OFFSET;
  3728. ha->isp_ops->read_nvram(vha, (uint8_t *)ha->vpd,
  3729. ha->nvram_base - FA_NVRAM_FUNC0_ADDR, FA_NVRAM_VPD_SIZE * 4);
  3730. /* Get NVRAM data into cache and calculate checksum. */
  3731. dptr = (uint32_t *)nv;
  3732. ha->isp_ops->read_nvram(vha, (uint8_t *)dptr, ha->nvram_base,
  3733. ha->nvram_size);
  3734. for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++)
  3735. chksum += le32_to_cpu(*dptr++);
  3736. DEBUG5(printk("scsi(%ld): Contents of NVRAM\n", ha->host_no));
  3737. DEBUG5(qla2x00_dump_buffer((uint8_t *)nv, ha->nvram_size));
  3738. /* Bad NVRAM data, set defaults parameters. */
  3739. if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P'
  3740. || nv->id[3] != ' ' ||
  3741. nv->nvram_version < __constant_cpu_to_le16(ICB_VERSION)) {
  3742. /* Reset NVRAM data. */
  3743. qla_printk(KERN_WARNING, ha, "Inconsistent NVRAM detected: "
  3744. "checksum=0x%x id=%c version=0x%x.\n", chksum, nv->id[0],
  3745. le16_to_cpu(nv->nvram_version));
  3746. qla_printk(KERN_WARNING, ha, "Falling back to functioning (yet "
  3747. "invalid -- WWPN) defaults.\n");
  3748. /*
  3749. * Set default initialization control block.
  3750. */
  3751. memset(nv, 0, ha->nvram_size);
  3752. nv->nvram_version = __constant_cpu_to_le16(ICB_VERSION);
  3753. nv->version = __constant_cpu_to_le16(ICB_VERSION);
  3754. nv->frame_payload_size = __constant_cpu_to_le16(2048);
  3755. nv->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  3756. nv->exchange_count = __constant_cpu_to_le16(0);
  3757. nv->port_name[0] = 0x21;
  3758. nv->port_name[1] = 0x00 + PCI_FUNC(ha->pdev->devfn);
  3759. nv->port_name[2] = 0x00;
  3760. nv->port_name[3] = 0xe0;
  3761. nv->port_name[4] = 0x8b;
  3762. nv->port_name[5] = 0x1c;
  3763. nv->port_name[6] = 0x55;
  3764. nv->port_name[7] = 0x86;
  3765. nv->node_name[0] = 0x20;
  3766. nv->node_name[1] = 0x00;
  3767. nv->node_name[2] = 0x00;
  3768. nv->node_name[3] = 0xe0;
  3769. nv->node_name[4] = 0x8b;
  3770. nv->node_name[5] = 0x1c;
  3771. nv->node_name[6] = 0x55;
  3772. nv->node_name[7] = 0x86;
  3773. nv->login_retry_count = __constant_cpu_to_le16(8);
  3774. nv->interrupt_delay_timer = __constant_cpu_to_le16(0);
  3775. nv->login_timeout = __constant_cpu_to_le16(0);
  3776. nv->firmware_options_1 =
  3777. __constant_cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1);
  3778. nv->firmware_options_2 = __constant_cpu_to_le32(2 << 4);
  3779. nv->firmware_options_2 |= __constant_cpu_to_le32(BIT_12);
  3780. nv->firmware_options_3 = __constant_cpu_to_le32(2 << 13);
  3781. nv->host_p = __constant_cpu_to_le32(BIT_11|BIT_10);
  3782. nv->efi_parameters = __constant_cpu_to_le32(0);
  3783. nv->reset_delay = 5;
  3784. nv->max_luns_per_target = __constant_cpu_to_le16(128);
  3785. nv->port_down_retry_count = __constant_cpu_to_le16(30);
  3786. nv->link_down_timeout = __constant_cpu_to_le16(30);
  3787. nv->enode_mac[0] = 0x01;
  3788. nv->enode_mac[1] = 0x02;
  3789. nv->enode_mac[2] = 0x03;
  3790. nv->enode_mac[3] = 0x04;
  3791. nv->enode_mac[4] = 0x05;
  3792. nv->enode_mac[5] = 0x06 + PCI_FUNC(ha->pdev->devfn);
  3793. rval = 1;
  3794. }
  3795. /* Reset Initialization control block */
  3796. memset(icb, 0, sizeof(struct init_cb_81xx));
  3797. /* Copy 1st segment. */
  3798. dptr1 = (uint8_t *)icb;
  3799. dptr2 = (uint8_t *)&nv->version;
  3800. cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version;
  3801. while (cnt--)
  3802. *dptr1++ = *dptr2++;
  3803. icb->login_retry_count = nv->login_retry_count;
  3804. /* Copy 2nd segment. */
  3805. dptr1 = (uint8_t *)&icb->interrupt_delay_timer;
  3806. dptr2 = (uint8_t *)&nv->interrupt_delay_timer;
  3807. cnt = (uint8_t *)&icb->reserved_5 -
  3808. (uint8_t *)&icb->interrupt_delay_timer;
  3809. while (cnt--)
  3810. *dptr1++ = *dptr2++;
  3811. memcpy(icb->enode_mac, nv->enode_mac, sizeof(icb->enode_mac));
  3812. /* Some boards (with valid NVRAMs) still have NULL enode_mac!! */
  3813. if (!memcmp(icb->enode_mac, "\0\0\0\0\0\0", sizeof(icb->enode_mac))) {
  3814. icb->enode_mac[0] = 0x01;
  3815. icb->enode_mac[1] = 0x02;
  3816. icb->enode_mac[2] = 0x03;
  3817. icb->enode_mac[3] = 0x04;
  3818. icb->enode_mac[4] = 0x05;
  3819. icb->enode_mac[5] = 0x06 + PCI_FUNC(ha->pdev->devfn);
  3820. }
  3821. /*
  3822. * Setup driver NVRAM options.
  3823. */
  3824. qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name),
  3825. "QLE81XX");
  3826. /* Use alternate WWN? */
  3827. if (nv->host_p & __constant_cpu_to_le32(BIT_15)) {
  3828. memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
  3829. memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
  3830. }
  3831. /* Prepare nodename */
  3832. if ((icb->firmware_options_1 & __constant_cpu_to_le32(BIT_14)) == 0) {
  3833. /*
  3834. * Firmware will apply the following mask if the nodename was
  3835. * not provided.
  3836. */
  3837. memcpy(icb->node_name, icb->port_name, WWN_SIZE);
  3838. icb->node_name[0] &= 0xF0;
  3839. }
  3840. /* Set host adapter parameters. */
  3841. ha->flags.disable_risc_code_load = 0;
  3842. ha->flags.enable_lip_reset = 0;
  3843. ha->flags.enable_lip_full_login =
  3844. le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0;
  3845. ha->flags.enable_target_reset =
  3846. le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0;
  3847. ha->flags.enable_led_scheme = 0;
  3848. ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0;
  3849. ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) &
  3850. (BIT_6 | BIT_5 | BIT_4)) >> 4;
  3851. /* save HBA serial number */
  3852. ha->serial0 = icb->port_name[5];
  3853. ha->serial1 = icb->port_name[6];
  3854. ha->serial2 = icb->port_name[7];
  3855. memcpy(vha->node_name, icb->node_name, WWN_SIZE);
  3856. memcpy(vha->port_name, icb->port_name, WWN_SIZE);
  3857. icb->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  3858. ha->retry_count = le16_to_cpu(nv->login_retry_count);
  3859. /* Set minimum login_timeout to 4 seconds. */
  3860. if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout)
  3861. nv->login_timeout = cpu_to_le16(ql2xlogintimeout);
  3862. if (le16_to_cpu(nv->login_timeout) < 4)
  3863. nv->login_timeout = __constant_cpu_to_le16(4);
  3864. ha->login_timeout = le16_to_cpu(nv->login_timeout);
  3865. icb->login_timeout = nv->login_timeout;
  3866. /* Set minimum RATOV to 100 tenths of a second. */
  3867. ha->r_a_tov = 100;
  3868. ha->loop_reset_delay = nv->reset_delay;
  3869. /* Link Down Timeout = 0:
  3870. *
  3871. * When Port Down timer expires we will start returning
  3872. * I/O's to OS with "DID_NO_CONNECT".
  3873. *
  3874. * Link Down Timeout != 0:
  3875. *
  3876. * The driver waits for the link to come up after link down
  3877. * before returning I/Os to OS with "DID_NO_CONNECT".
  3878. */
  3879. if (le16_to_cpu(nv->link_down_timeout) == 0) {
  3880. ha->loop_down_abort_time =
  3881. (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
  3882. } else {
  3883. ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout);
  3884. ha->loop_down_abort_time =
  3885. (LOOP_DOWN_TIME - ha->link_down_timeout);
  3886. }
  3887. /* Need enough time to try and get the port back. */
  3888. ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count);
  3889. if (qlport_down_retry)
  3890. ha->port_down_retry_count = qlport_down_retry;
  3891. /* Set login_retry_count */
  3892. ha->login_retry_count = le16_to_cpu(nv->login_retry_count);
  3893. if (ha->port_down_retry_count ==
  3894. le16_to_cpu(nv->port_down_retry_count) &&
  3895. ha->port_down_retry_count > 3)
  3896. ha->login_retry_count = ha->port_down_retry_count;
  3897. else if (ha->port_down_retry_count > (int)ha->login_retry_count)
  3898. ha->login_retry_count = ha->port_down_retry_count;
  3899. if (ql2xloginretrycount)
  3900. ha->login_retry_count = ql2xloginretrycount;
  3901. /* Enable ZIO. */
  3902. if (!vha->flags.init_done) {
  3903. ha->zio_mode = le32_to_cpu(icb->firmware_options_2) &
  3904. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  3905. ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ?
  3906. le16_to_cpu(icb->interrupt_delay_timer): 2;
  3907. }
  3908. icb->firmware_options_2 &= __constant_cpu_to_le32(
  3909. ~(BIT_3 | BIT_2 | BIT_1 | BIT_0));
  3910. vha->flags.process_response_queue = 0;
  3911. if (ha->zio_mode != QLA_ZIO_DISABLED) {
  3912. ha->zio_mode = QLA_ZIO_MODE_6;
  3913. DEBUG2(printk("scsi(%ld): ZIO mode %d enabled; timer delay "
  3914. "(%d us).\n", vha->host_no, ha->zio_mode,
  3915. ha->zio_timer * 100));
  3916. qla_printk(KERN_INFO, ha,
  3917. "ZIO mode %d enabled; timer delay (%d us).\n",
  3918. ha->zio_mode, ha->zio_timer * 100);
  3919. icb->firmware_options_2 |= cpu_to_le32(
  3920. (uint32_t)ha->zio_mode);
  3921. icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer);
  3922. vha->flags.process_response_queue = 1;
  3923. }
  3924. if (rval) {
  3925. DEBUG2_3(printk(KERN_WARNING
  3926. "scsi(%ld): NVRAM configuration failed!\n", vha->host_no));
  3927. }
  3928. return (rval);
  3929. }
  3930. void
  3931. qla81xx_update_fw_options(scsi_qla_host_t *ha)
  3932. {
  3933. }