events.c 30 KB

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  1. /*
  2. * Xen event channels
  3. *
  4. * Xen models interrupts with abstract event channels. Because each
  5. * domain gets 1024 event channels, but NR_IRQ is not that large, we
  6. * must dynamically map irqs<->event channels. The event channels
  7. * interface with the rest of the kernel by defining a xen interrupt
  8. * chip. When an event is recieved, it is mapped to an irq and sent
  9. * through the normal interrupt processing path.
  10. *
  11. * There are four kinds of events which can be mapped to an event
  12. * channel:
  13. *
  14. * 1. Inter-domain notifications. This includes all the virtual
  15. * device events, since they're driven by front-ends in another domain
  16. * (typically dom0).
  17. * 2. VIRQs, typically used for timers. These are per-cpu events.
  18. * 3. IPIs.
  19. * 4. PIRQs - Hardware interrupts.
  20. *
  21. * Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007
  22. */
  23. #include <linux/linkage.h>
  24. #include <linux/interrupt.h>
  25. #include <linux/irq.h>
  26. #include <linux/module.h>
  27. #include <linux/string.h>
  28. #include <linux/bootmem.h>
  29. #include <linux/slab.h>
  30. #include <linux/irqnr.h>
  31. #include <asm/desc.h>
  32. #include <asm/ptrace.h>
  33. #include <asm/irq.h>
  34. #include <asm/idle.h>
  35. #include <asm/io_apic.h>
  36. #include <asm/sync_bitops.h>
  37. #include <asm/xen/hypercall.h>
  38. #include <asm/xen/hypervisor.h>
  39. #include <xen/xen.h>
  40. #include <xen/hvm.h>
  41. #include <xen/xen-ops.h>
  42. #include <xen/events.h>
  43. #include <xen/interface/xen.h>
  44. #include <xen/interface/event_channel.h>
  45. #include <xen/interface/hvm/hvm_op.h>
  46. #include <xen/interface/hvm/params.h>
  47. /*
  48. * This lock protects updates to the following mapping and reference-count
  49. * arrays. The lock does not need to be acquired to read the mapping tables.
  50. */
  51. static DEFINE_SPINLOCK(irq_mapping_update_lock);
  52. /* IRQ <-> VIRQ mapping. */
  53. static DEFINE_PER_CPU(int [NR_VIRQS], virq_to_irq) = {[0 ... NR_VIRQS-1] = -1};
  54. /* IRQ <-> IPI mapping */
  55. static DEFINE_PER_CPU(int [XEN_NR_IPIS], ipi_to_irq) = {[0 ... XEN_NR_IPIS-1] = -1};
  56. /* Interrupt types. */
  57. enum xen_irq_type {
  58. IRQT_UNBOUND = 0,
  59. IRQT_PIRQ,
  60. IRQT_VIRQ,
  61. IRQT_IPI,
  62. IRQT_EVTCHN
  63. };
  64. /*
  65. * Packed IRQ information:
  66. * type - enum xen_irq_type
  67. * event channel - irq->event channel mapping
  68. * cpu - cpu this event channel is bound to
  69. * index - type-specific information:
  70. * PIRQ - vector, with MSB being "needs EIO"
  71. * VIRQ - virq number
  72. * IPI - IPI vector
  73. * EVTCHN -
  74. */
  75. struct irq_info
  76. {
  77. enum xen_irq_type type; /* type */
  78. unsigned short evtchn; /* event channel */
  79. unsigned short cpu; /* cpu bound */
  80. union {
  81. unsigned short virq;
  82. enum ipi_vector ipi;
  83. struct {
  84. unsigned short gsi;
  85. unsigned char vector;
  86. unsigned char flags;
  87. } pirq;
  88. } u;
  89. };
  90. #define PIRQ_NEEDS_EOI (1 << 0)
  91. #define PIRQ_SHAREABLE (1 << 1)
  92. static struct irq_info *irq_info;
  93. static int *evtchn_to_irq;
  94. struct cpu_evtchn_s {
  95. unsigned long bits[NR_EVENT_CHANNELS/BITS_PER_LONG];
  96. };
  97. static __initdata struct cpu_evtchn_s init_evtchn_mask = {
  98. .bits[0 ... (NR_EVENT_CHANNELS/BITS_PER_LONG)-1] = ~0ul,
  99. };
  100. static struct cpu_evtchn_s *cpu_evtchn_mask_p = &init_evtchn_mask;
  101. static inline unsigned long *cpu_evtchn_mask(int cpu)
  102. {
  103. return cpu_evtchn_mask_p[cpu].bits;
  104. }
  105. /* Xen will never allocate port zero for any purpose. */
  106. #define VALID_EVTCHN(chn) ((chn) != 0)
  107. static struct irq_chip xen_dynamic_chip;
  108. static struct irq_chip xen_percpu_chip;
  109. static struct irq_chip xen_pirq_chip;
  110. /* Constructor for packed IRQ information. */
  111. static struct irq_info mk_unbound_info(void)
  112. {
  113. return (struct irq_info) { .type = IRQT_UNBOUND };
  114. }
  115. static struct irq_info mk_evtchn_info(unsigned short evtchn)
  116. {
  117. return (struct irq_info) { .type = IRQT_EVTCHN, .evtchn = evtchn,
  118. .cpu = 0 };
  119. }
  120. static struct irq_info mk_ipi_info(unsigned short evtchn, enum ipi_vector ipi)
  121. {
  122. return (struct irq_info) { .type = IRQT_IPI, .evtchn = evtchn,
  123. .cpu = 0, .u.ipi = ipi };
  124. }
  125. static struct irq_info mk_virq_info(unsigned short evtchn, unsigned short virq)
  126. {
  127. return (struct irq_info) { .type = IRQT_VIRQ, .evtchn = evtchn,
  128. .cpu = 0, .u.virq = virq };
  129. }
  130. static struct irq_info mk_pirq_info(unsigned short evtchn,
  131. unsigned short gsi, unsigned short vector)
  132. {
  133. return (struct irq_info) { .type = IRQT_PIRQ, .evtchn = evtchn,
  134. .cpu = 0, .u.pirq = { .gsi = gsi, .vector = vector } };
  135. }
  136. /*
  137. * Accessors for packed IRQ information.
  138. */
  139. static struct irq_info *info_for_irq(unsigned irq)
  140. {
  141. return &irq_info[irq];
  142. }
  143. static unsigned int evtchn_from_irq(unsigned irq)
  144. {
  145. return info_for_irq(irq)->evtchn;
  146. }
  147. unsigned irq_from_evtchn(unsigned int evtchn)
  148. {
  149. return evtchn_to_irq[evtchn];
  150. }
  151. EXPORT_SYMBOL_GPL(irq_from_evtchn);
  152. static enum ipi_vector ipi_from_irq(unsigned irq)
  153. {
  154. struct irq_info *info = info_for_irq(irq);
  155. BUG_ON(info == NULL);
  156. BUG_ON(info->type != IRQT_IPI);
  157. return info->u.ipi;
  158. }
  159. static unsigned virq_from_irq(unsigned irq)
  160. {
  161. struct irq_info *info = info_for_irq(irq);
  162. BUG_ON(info == NULL);
  163. BUG_ON(info->type != IRQT_VIRQ);
  164. return info->u.virq;
  165. }
  166. static unsigned gsi_from_irq(unsigned irq)
  167. {
  168. struct irq_info *info = info_for_irq(irq);
  169. BUG_ON(info == NULL);
  170. BUG_ON(info->type != IRQT_PIRQ);
  171. return info->u.pirq.gsi;
  172. }
  173. static unsigned vector_from_irq(unsigned irq)
  174. {
  175. struct irq_info *info = info_for_irq(irq);
  176. BUG_ON(info == NULL);
  177. BUG_ON(info->type != IRQT_PIRQ);
  178. return info->u.pirq.vector;
  179. }
  180. static enum xen_irq_type type_from_irq(unsigned irq)
  181. {
  182. return info_for_irq(irq)->type;
  183. }
  184. static unsigned cpu_from_irq(unsigned irq)
  185. {
  186. return info_for_irq(irq)->cpu;
  187. }
  188. static unsigned int cpu_from_evtchn(unsigned int evtchn)
  189. {
  190. int irq = evtchn_to_irq[evtchn];
  191. unsigned ret = 0;
  192. if (irq != -1)
  193. ret = cpu_from_irq(irq);
  194. return ret;
  195. }
  196. static bool pirq_needs_eoi(unsigned irq)
  197. {
  198. struct irq_info *info = info_for_irq(irq);
  199. BUG_ON(info->type != IRQT_PIRQ);
  200. return info->u.pirq.flags & PIRQ_NEEDS_EOI;
  201. }
  202. static inline unsigned long active_evtchns(unsigned int cpu,
  203. struct shared_info *sh,
  204. unsigned int idx)
  205. {
  206. return (sh->evtchn_pending[idx] &
  207. cpu_evtchn_mask(cpu)[idx] &
  208. ~sh->evtchn_mask[idx]);
  209. }
  210. static void bind_evtchn_to_cpu(unsigned int chn, unsigned int cpu)
  211. {
  212. int irq = evtchn_to_irq[chn];
  213. BUG_ON(irq == -1);
  214. #ifdef CONFIG_SMP
  215. cpumask_copy(irq_to_desc(irq)->affinity, cpumask_of(cpu));
  216. #endif
  217. __clear_bit(chn, cpu_evtchn_mask(cpu_from_irq(irq)));
  218. __set_bit(chn, cpu_evtchn_mask(cpu));
  219. irq_info[irq].cpu = cpu;
  220. }
  221. static void init_evtchn_cpu_bindings(void)
  222. {
  223. #ifdef CONFIG_SMP
  224. struct irq_desc *desc;
  225. int i;
  226. /* By default all event channels notify CPU#0. */
  227. for_each_irq_desc(i, desc) {
  228. cpumask_copy(desc->affinity, cpumask_of(0));
  229. }
  230. #endif
  231. memset(cpu_evtchn_mask(0), ~0, sizeof(cpu_evtchn_mask(0)));
  232. }
  233. static inline void clear_evtchn(int port)
  234. {
  235. struct shared_info *s = HYPERVISOR_shared_info;
  236. sync_clear_bit(port, &s->evtchn_pending[0]);
  237. }
  238. static inline void set_evtchn(int port)
  239. {
  240. struct shared_info *s = HYPERVISOR_shared_info;
  241. sync_set_bit(port, &s->evtchn_pending[0]);
  242. }
  243. static inline int test_evtchn(int port)
  244. {
  245. struct shared_info *s = HYPERVISOR_shared_info;
  246. return sync_test_bit(port, &s->evtchn_pending[0]);
  247. }
  248. /**
  249. * notify_remote_via_irq - send event to remote end of event channel via irq
  250. * @irq: irq of event channel to send event to
  251. *
  252. * Unlike notify_remote_via_evtchn(), this is safe to use across
  253. * save/restore. Notifications on a broken connection are silently
  254. * dropped.
  255. */
  256. void notify_remote_via_irq(int irq)
  257. {
  258. int evtchn = evtchn_from_irq(irq);
  259. if (VALID_EVTCHN(evtchn))
  260. notify_remote_via_evtchn(evtchn);
  261. }
  262. EXPORT_SYMBOL_GPL(notify_remote_via_irq);
  263. static void mask_evtchn(int port)
  264. {
  265. struct shared_info *s = HYPERVISOR_shared_info;
  266. sync_set_bit(port, &s->evtchn_mask[0]);
  267. }
  268. static void unmask_evtchn(int port)
  269. {
  270. struct shared_info *s = HYPERVISOR_shared_info;
  271. unsigned int cpu = get_cpu();
  272. BUG_ON(!irqs_disabled());
  273. /* Slow path (hypercall) if this is a non-local port. */
  274. if (unlikely(cpu != cpu_from_evtchn(port))) {
  275. struct evtchn_unmask unmask = { .port = port };
  276. (void)HYPERVISOR_event_channel_op(EVTCHNOP_unmask, &unmask);
  277. } else {
  278. struct vcpu_info *vcpu_info = __get_cpu_var(xen_vcpu);
  279. sync_clear_bit(port, &s->evtchn_mask[0]);
  280. /*
  281. * The following is basically the equivalent of
  282. * 'hw_resend_irq'. Just like a real IO-APIC we 'lose
  283. * the interrupt edge' if the channel is masked.
  284. */
  285. if (sync_test_bit(port, &s->evtchn_pending[0]) &&
  286. !sync_test_and_set_bit(port / BITS_PER_LONG,
  287. &vcpu_info->evtchn_pending_sel))
  288. vcpu_info->evtchn_upcall_pending = 1;
  289. }
  290. put_cpu();
  291. }
  292. static int get_nr_hw_irqs(void)
  293. {
  294. int ret = 1;
  295. #ifdef CONFIG_X86_IO_APIC
  296. ret = get_nr_irqs_gsi();
  297. #endif
  298. return ret;
  299. }
  300. static int find_unbound_irq(void)
  301. {
  302. struct irq_data *data;
  303. int irq, res;
  304. int start = get_nr_hw_irqs();
  305. if (start == nr_irqs)
  306. goto no_irqs;
  307. /* nr_irqs is a magic value. Must not use it.*/
  308. for (irq = nr_irqs-1; irq > start; irq--) {
  309. data = irq_get_irq_data(irq);
  310. /* only 0->15 have init'd desc; handle irq > 16 */
  311. if (!data)
  312. break;
  313. if (data->chip == &no_irq_chip)
  314. break;
  315. if (data->chip != &xen_dynamic_chip)
  316. continue;
  317. if (irq_info[irq].type == IRQT_UNBOUND)
  318. return irq;
  319. }
  320. if (irq == start)
  321. goto no_irqs;
  322. res = irq_alloc_desc_at(irq, 0);
  323. if (WARN_ON(res != irq))
  324. return -1;
  325. return irq;
  326. no_irqs:
  327. panic("No available IRQ to bind to: increase nr_irqs!\n");
  328. }
  329. static bool identity_mapped_irq(unsigned irq)
  330. {
  331. /* identity map all the hardware irqs */
  332. return irq < get_nr_hw_irqs();
  333. }
  334. static void pirq_unmask_notify(int irq)
  335. {
  336. struct physdev_eoi eoi = { .irq = irq };
  337. if (unlikely(pirq_needs_eoi(irq))) {
  338. int rc = HYPERVISOR_physdev_op(PHYSDEVOP_eoi, &eoi);
  339. WARN_ON(rc);
  340. }
  341. }
  342. static void pirq_query_unmask(int irq)
  343. {
  344. struct physdev_irq_status_query irq_status;
  345. struct irq_info *info = info_for_irq(irq);
  346. BUG_ON(info->type != IRQT_PIRQ);
  347. irq_status.irq = irq;
  348. if (HYPERVISOR_physdev_op(PHYSDEVOP_irq_status_query, &irq_status))
  349. irq_status.flags = 0;
  350. info->u.pirq.flags &= ~PIRQ_NEEDS_EOI;
  351. if (irq_status.flags & XENIRQSTAT_needs_eoi)
  352. info->u.pirq.flags |= PIRQ_NEEDS_EOI;
  353. }
  354. static bool probing_irq(int irq)
  355. {
  356. struct irq_desc *desc = irq_to_desc(irq);
  357. return desc && desc->action == NULL;
  358. }
  359. static unsigned int startup_pirq(unsigned int irq)
  360. {
  361. struct evtchn_bind_pirq bind_pirq;
  362. struct irq_info *info = info_for_irq(irq);
  363. int evtchn = evtchn_from_irq(irq);
  364. int rc;
  365. BUG_ON(info->type != IRQT_PIRQ);
  366. if (VALID_EVTCHN(evtchn))
  367. goto out;
  368. bind_pirq.pirq = irq;
  369. /* NB. We are happy to share unless we are probing. */
  370. bind_pirq.flags = info->u.pirq.flags & PIRQ_SHAREABLE ?
  371. BIND_PIRQ__WILL_SHARE : 0;
  372. rc = HYPERVISOR_event_channel_op(EVTCHNOP_bind_pirq, &bind_pirq);
  373. if (rc != 0) {
  374. if (!probing_irq(irq))
  375. printk(KERN_INFO "Failed to obtain physical IRQ %d\n",
  376. irq);
  377. return 0;
  378. }
  379. evtchn = bind_pirq.port;
  380. pirq_query_unmask(irq);
  381. evtchn_to_irq[evtchn] = irq;
  382. bind_evtchn_to_cpu(evtchn, 0);
  383. info->evtchn = evtchn;
  384. out:
  385. unmask_evtchn(evtchn);
  386. pirq_unmask_notify(irq);
  387. return 0;
  388. }
  389. static void shutdown_pirq(unsigned int irq)
  390. {
  391. struct evtchn_close close;
  392. struct irq_info *info = info_for_irq(irq);
  393. int evtchn = evtchn_from_irq(irq);
  394. BUG_ON(info->type != IRQT_PIRQ);
  395. if (!VALID_EVTCHN(evtchn))
  396. return;
  397. mask_evtchn(evtchn);
  398. close.port = evtchn;
  399. if (HYPERVISOR_event_channel_op(EVTCHNOP_close, &close) != 0)
  400. BUG();
  401. bind_evtchn_to_cpu(evtchn, 0);
  402. evtchn_to_irq[evtchn] = -1;
  403. info->evtchn = 0;
  404. }
  405. static void enable_pirq(unsigned int irq)
  406. {
  407. startup_pirq(irq);
  408. }
  409. static void disable_pirq(unsigned int irq)
  410. {
  411. }
  412. static void ack_pirq(unsigned int irq)
  413. {
  414. int evtchn = evtchn_from_irq(irq);
  415. move_native_irq(irq);
  416. if (VALID_EVTCHN(evtchn)) {
  417. mask_evtchn(evtchn);
  418. clear_evtchn(evtchn);
  419. }
  420. }
  421. static void end_pirq(unsigned int irq)
  422. {
  423. int evtchn = evtchn_from_irq(irq);
  424. struct irq_desc *desc = irq_to_desc(irq);
  425. if (WARN_ON(!desc))
  426. return;
  427. if ((desc->status & (IRQ_DISABLED|IRQ_PENDING)) ==
  428. (IRQ_DISABLED|IRQ_PENDING)) {
  429. shutdown_pirq(irq);
  430. } else if (VALID_EVTCHN(evtchn)) {
  431. unmask_evtchn(evtchn);
  432. pirq_unmask_notify(irq);
  433. }
  434. }
  435. static int find_irq_by_gsi(unsigned gsi)
  436. {
  437. int irq;
  438. for (irq = 0; irq < nr_irqs; irq++) {
  439. struct irq_info *info = info_for_irq(irq);
  440. if (info == NULL || info->type != IRQT_PIRQ)
  441. continue;
  442. if (gsi_from_irq(irq) == gsi)
  443. return irq;
  444. }
  445. return -1;
  446. }
  447. /* xen_allocate_irq might allocate irqs from the top down, as a
  448. * consequence don't assume that the irq number returned has a low value
  449. * or can be used as a pirq number unless you know otherwise.
  450. *
  451. * One notable exception is when xen_allocate_irq is called passing an
  452. * hardware gsi as argument, in that case the irq number returned
  453. * matches the gsi number passed as first argument.
  454. * Note: We don't assign an
  455. * event channel until the irq actually started up. Return an
  456. * existing irq if we've already got one for the gsi.
  457. */
  458. int xen_allocate_pirq(unsigned gsi, int shareable, char *name)
  459. {
  460. int irq;
  461. struct physdev_irq irq_op;
  462. spin_lock(&irq_mapping_update_lock);
  463. irq = find_irq_by_gsi(gsi);
  464. if (irq != -1) {
  465. printk(KERN_INFO "xen_allocate_pirq: returning irq %d for gsi %u\n",
  466. irq, gsi);
  467. goto out; /* XXX need refcount? */
  468. }
  469. /* If we are a PV guest, we don't have GSIs (no ACPI passed). Therefore
  470. * we are using the !xen_initial_domain() to drop in the function.*/
  471. if (identity_mapped_irq(gsi) || !xen_initial_domain()) {
  472. irq = gsi;
  473. irq_to_desc_alloc_node(irq, 0);
  474. dynamic_irq_init(irq);
  475. } else
  476. irq = find_unbound_irq();
  477. set_irq_chip_and_handler_name(irq, &xen_pirq_chip,
  478. handle_level_irq, name);
  479. irq_op.irq = irq;
  480. irq_op.vector = 0;
  481. /* Only the privileged domain can do this. For non-priv, the pcifront
  482. * driver provides a PCI bus that does the call to do exactly
  483. * this in the priv domain. */
  484. if (xen_initial_domain() &&
  485. HYPERVISOR_physdev_op(PHYSDEVOP_alloc_irq_vector, &irq_op)) {
  486. dynamic_irq_cleanup(irq);
  487. irq = -ENOSPC;
  488. goto out;
  489. }
  490. irq_info[irq] = mk_pirq_info(0, gsi, irq_op.vector);
  491. irq_info[irq].u.pirq.flags |= shareable ? PIRQ_SHAREABLE : 0;
  492. out:
  493. spin_unlock(&irq_mapping_update_lock);
  494. return irq;
  495. }
  496. int xen_destroy_irq(int irq)
  497. {
  498. struct irq_desc *desc;
  499. int rc = -ENOENT;
  500. spin_lock(&irq_mapping_update_lock);
  501. desc = irq_to_desc(irq);
  502. if (!desc)
  503. goto out;
  504. irq_info[irq] = mk_unbound_info();
  505. dynamic_irq_cleanup(irq);
  506. out:
  507. spin_unlock(&irq_mapping_update_lock);
  508. return rc;
  509. }
  510. int xen_vector_from_irq(unsigned irq)
  511. {
  512. return vector_from_irq(irq);
  513. }
  514. int xen_gsi_from_irq(unsigned irq)
  515. {
  516. return gsi_from_irq(irq);
  517. }
  518. int bind_evtchn_to_irq(unsigned int evtchn)
  519. {
  520. int irq;
  521. spin_lock(&irq_mapping_update_lock);
  522. irq = evtchn_to_irq[evtchn];
  523. if (irq == -1) {
  524. irq = find_unbound_irq();
  525. set_irq_chip_and_handler_name(irq, &xen_dynamic_chip,
  526. handle_edge_irq, "event");
  527. evtchn_to_irq[evtchn] = irq;
  528. irq_info[irq] = mk_evtchn_info(evtchn);
  529. }
  530. spin_unlock(&irq_mapping_update_lock);
  531. return irq;
  532. }
  533. EXPORT_SYMBOL_GPL(bind_evtchn_to_irq);
  534. static int bind_ipi_to_irq(unsigned int ipi, unsigned int cpu)
  535. {
  536. struct evtchn_bind_ipi bind_ipi;
  537. int evtchn, irq;
  538. spin_lock(&irq_mapping_update_lock);
  539. irq = per_cpu(ipi_to_irq, cpu)[ipi];
  540. if (irq == -1) {
  541. irq = find_unbound_irq();
  542. if (irq < 0)
  543. goto out;
  544. set_irq_chip_and_handler_name(irq, &xen_percpu_chip,
  545. handle_percpu_irq, "ipi");
  546. bind_ipi.vcpu = cpu;
  547. if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_ipi,
  548. &bind_ipi) != 0)
  549. BUG();
  550. evtchn = bind_ipi.port;
  551. evtchn_to_irq[evtchn] = irq;
  552. irq_info[irq] = mk_ipi_info(evtchn, ipi);
  553. per_cpu(ipi_to_irq, cpu)[ipi] = irq;
  554. bind_evtchn_to_cpu(evtchn, cpu);
  555. }
  556. out:
  557. spin_unlock(&irq_mapping_update_lock);
  558. return irq;
  559. }
  560. static int bind_virq_to_irq(unsigned int virq, unsigned int cpu)
  561. {
  562. struct evtchn_bind_virq bind_virq;
  563. int evtchn, irq;
  564. spin_lock(&irq_mapping_update_lock);
  565. irq = per_cpu(virq_to_irq, cpu)[virq];
  566. if (irq == -1) {
  567. bind_virq.virq = virq;
  568. bind_virq.vcpu = cpu;
  569. if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_virq,
  570. &bind_virq) != 0)
  571. BUG();
  572. evtchn = bind_virq.port;
  573. irq = find_unbound_irq();
  574. set_irq_chip_and_handler_name(irq, &xen_percpu_chip,
  575. handle_percpu_irq, "virq");
  576. evtchn_to_irq[evtchn] = irq;
  577. irq_info[irq] = mk_virq_info(evtchn, virq);
  578. per_cpu(virq_to_irq, cpu)[virq] = irq;
  579. bind_evtchn_to_cpu(evtchn, cpu);
  580. }
  581. spin_unlock(&irq_mapping_update_lock);
  582. return irq;
  583. }
  584. static void unbind_from_irq(unsigned int irq)
  585. {
  586. struct evtchn_close close;
  587. int evtchn = evtchn_from_irq(irq);
  588. spin_lock(&irq_mapping_update_lock);
  589. if (VALID_EVTCHN(evtchn)) {
  590. close.port = evtchn;
  591. if (HYPERVISOR_event_channel_op(EVTCHNOP_close, &close) != 0)
  592. BUG();
  593. switch (type_from_irq(irq)) {
  594. case IRQT_VIRQ:
  595. per_cpu(virq_to_irq, cpu_from_evtchn(evtchn))
  596. [virq_from_irq(irq)] = -1;
  597. break;
  598. case IRQT_IPI:
  599. per_cpu(ipi_to_irq, cpu_from_evtchn(evtchn))
  600. [ipi_from_irq(irq)] = -1;
  601. break;
  602. default:
  603. break;
  604. }
  605. /* Closed ports are implicitly re-bound to VCPU0. */
  606. bind_evtchn_to_cpu(evtchn, 0);
  607. evtchn_to_irq[evtchn] = -1;
  608. }
  609. if (irq_info[irq].type != IRQT_UNBOUND) {
  610. irq_info[irq] = mk_unbound_info();
  611. irq_free_desc(irq);
  612. }
  613. spin_unlock(&irq_mapping_update_lock);
  614. }
  615. int bind_evtchn_to_irqhandler(unsigned int evtchn,
  616. irq_handler_t handler,
  617. unsigned long irqflags,
  618. const char *devname, void *dev_id)
  619. {
  620. unsigned int irq;
  621. int retval;
  622. irq = bind_evtchn_to_irq(evtchn);
  623. retval = request_irq(irq, handler, irqflags, devname, dev_id);
  624. if (retval != 0) {
  625. unbind_from_irq(irq);
  626. return retval;
  627. }
  628. return irq;
  629. }
  630. EXPORT_SYMBOL_GPL(bind_evtchn_to_irqhandler);
  631. int bind_virq_to_irqhandler(unsigned int virq, unsigned int cpu,
  632. irq_handler_t handler,
  633. unsigned long irqflags, const char *devname, void *dev_id)
  634. {
  635. unsigned int irq;
  636. int retval;
  637. irq = bind_virq_to_irq(virq, cpu);
  638. retval = request_irq(irq, handler, irqflags, devname, dev_id);
  639. if (retval != 0) {
  640. unbind_from_irq(irq);
  641. return retval;
  642. }
  643. return irq;
  644. }
  645. EXPORT_SYMBOL_GPL(bind_virq_to_irqhandler);
  646. int bind_ipi_to_irqhandler(enum ipi_vector ipi,
  647. unsigned int cpu,
  648. irq_handler_t handler,
  649. unsigned long irqflags,
  650. const char *devname,
  651. void *dev_id)
  652. {
  653. int irq, retval;
  654. irq = bind_ipi_to_irq(ipi, cpu);
  655. if (irq < 0)
  656. return irq;
  657. irqflags |= IRQF_NO_SUSPEND;
  658. retval = request_irq(irq, handler, irqflags, devname, dev_id);
  659. if (retval != 0) {
  660. unbind_from_irq(irq);
  661. return retval;
  662. }
  663. return irq;
  664. }
  665. void unbind_from_irqhandler(unsigned int irq, void *dev_id)
  666. {
  667. free_irq(irq, dev_id);
  668. unbind_from_irq(irq);
  669. }
  670. EXPORT_SYMBOL_GPL(unbind_from_irqhandler);
  671. void xen_send_IPI_one(unsigned int cpu, enum ipi_vector vector)
  672. {
  673. int irq = per_cpu(ipi_to_irq, cpu)[vector];
  674. BUG_ON(irq < 0);
  675. notify_remote_via_irq(irq);
  676. }
  677. irqreturn_t xen_debug_interrupt(int irq, void *dev_id)
  678. {
  679. struct shared_info *sh = HYPERVISOR_shared_info;
  680. int cpu = smp_processor_id();
  681. int i;
  682. unsigned long flags;
  683. static DEFINE_SPINLOCK(debug_lock);
  684. spin_lock_irqsave(&debug_lock, flags);
  685. printk("vcpu %d\n ", cpu);
  686. for_each_online_cpu(i) {
  687. struct vcpu_info *v = per_cpu(xen_vcpu, i);
  688. printk("%d: masked=%d pending=%d event_sel %08lx\n ", i,
  689. (get_irq_regs() && i == cpu) ? xen_irqs_disabled(get_irq_regs()) : v->evtchn_upcall_mask,
  690. v->evtchn_upcall_pending,
  691. v->evtchn_pending_sel);
  692. }
  693. printk("pending:\n ");
  694. for(i = ARRAY_SIZE(sh->evtchn_pending)-1; i >= 0; i--)
  695. printk("%08lx%s", sh->evtchn_pending[i],
  696. i % 8 == 0 ? "\n " : " ");
  697. printk("\nmasks:\n ");
  698. for(i = ARRAY_SIZE(sh->evtchn_mask)-1; i >= 0; i--)
  699. printk("%08lx%s", sh->evtchn_mask[i],
  700. i % 8 == 0 ? "\n " : " ");
  701. printk("\nunmasked:\n ");
  702. for(i = ARRAY_SIZE(sh->evtchn_mask)-1; i >= 0; i--)
  703. printk("%08lx%s", sh->evtchn_pending[i] & ~sh->evtchn_mask[i],
  704. i % 8 == 0 ? "\n " : " ");
  705. printk("\npending list:\n");
  706. for(i = 0; i < NR_EVENT_CHANNELS; i++) {
  707. if (sync_test_bit(i, sh->evtchn_pending)) {
  708. printk(" %d: event %d -> irq %d\n",
  709. cpu_from_evtchn(i), i,
  710. evtchn_to_irq[i]);
  711. }
  712. }
  713. spin_unlock_irqrestore(&debug_lock, flags);
  714. return IRQ_HANDLED;
  715. }
  716. static DEFINE_PER_CPU(unsigned, xed_nesting_count);
  717. /*
  718. * Search the CPUs pending events bitmasks. For each one found, map
  719. * the event number to an irq, and feed it into do_IRQ() for
  720. * handling.
  721. *
  722. * Xen uses a two-level bitmap to speed searching. The first level is
  723. * a bitset of words which contain pending event bits. The second
  724. * level is a bitset of pending events themselves.
  725. */
  726. static void __xen_evtchn_do_upcall(void)
  727. {
  728. int cpu = get_cpu();
  729. struct shared_info *s = HYPERVISOR_shared_info;
  730. struct vcpu_info *vcpu_info = __get_cpu_var(xen_vcpu);
  731. unsigned count;
  732. do {
  733. unsigned long pending_words;
  734. vcpu_info->evtchn_upcall_pending = 0;
  735. if (__get_cpu_var(xed_nesting_count)++)
  736. goto out;
  737. #ifndef CONFIG_X86 /* No need for a barrier -- XCHG is a barrier on x86. */
  738. /* Clear master flag /before/ clearing selector flag. */
  739. wmb();
  740. #endif
  741. pending_words = xchg(&vcpu_info->evtchn_pending_sel, 0);
  742. while (pending_words != 0) {
  743. unsigned long pending_bits;
  744. int word_idx = __ffs(pending_words);
  745. pending_words &= ~(1UL << word_idx);
  746. while ((pending_bits = active_evtchns(cpu, s, word_idx)) != 0) {
  747. int bit_idx = __ffs(pending_bits);
  748. int port = (word_idx * BITS_PER_LONG) + bit_idx;
  749. int irq = evtchn_to_irq[port];
  750. struct irq_desc *desc;
  751. if (irq != -1) {
  752. desc = irq_to_desc(irq);
  753. if (desc)
  754. generic_handle_irq_desc(irq, desc);
  755. }
  756. }
  757. }
  758. BUG_ON(!irqs_disabled());
  759. count = __get_cpu_var(xed_nesting_count);
  760. __get_cpu_var(xed_nesting_count) = 0;
  761. } while (count != 1 || vcpu_info->evtchn_upcall_pending);
  762. out:
  763. put_cpu();
  764. }
  765. void xen_evtchn_do_upcall(struct pt_regs *regs)
  766. {
  767. struct pt_regs *old_regs = set_irq_regs(regs);
  768. exit_idle();
  769. irq_enter();
  770. __xen_evtchn_do_upcall();
  771. irq_exit();
  772. set_irq_regs(old_regs);
  773. }
  774. void xen_hvm_evtchn_do_upcall(void)
  775. {
  776. __xen_evtchn_do_upcall();
  777. }
  778. EXPORT_SYMBOL_GPL(xen_hvm_evtchn_do_upcall);
  779. /* Rebind a new event channel to an existing irq. */
  780. void rebind_evtchn_irq(int evtchn, int irq)
  781. {
  782. struct irq_info *info = info_for_irq(irq);
  783. /* Make sure the irq is masked, since the new event channel
  784. will also be masked. */
  785. disable_irq(irq);
  786. spin_lock(&irq_mapping_update_lock);
  787. /* After resume the irq<->evtchn mappings are all cleared out */
  788. BUG_ON(evtchn_to_irq[evtchn] != -1);
  789. /* Expect irq to have been bound before,
  790. so there should be a proper type */
  791. BUG_ON(info->type == IRQT_UNBOUND);
  792. evtchn_to_irq[evtchn] = irq;
  793. irq_info[irq] = mk_evtchn_info(evtchn);
  794. spin_unlock(&irq_mapping_update_lock);
  795. /* new event channels are always bound to cpu 0 */
  796. irq_set_affinity(irq, cpumask_of(0));
  797. /* Unmask the event channel. */
  798. enable_irq(irq);
  799. }
  800. /* Rebind an evtchn so that it gets delivered to a specific cpu */
  801. static int rebind_irq_to_cpu(unsigned irq, unsigned tcpu)
  802. {
  803. struct evtchn_bind_vcpu bind_vcpu;
  804. int evtchn = evtchn_from_irq(irq);
  805. /* events delivered via platform PCI interrupts are always
  806. * routed to vcpu 0 */
  807. if (!VALID_EVTCHN(evtchn) ||
  808. (xen_hvm_domain() && !xen_have_vector_callback))
  809. return -1;
  810. /* Send future instances of this interrupt to other vcpu. */
  811. bind_vcpu.port = evtchn;
  812. bind_vcpu.vcpu = tcpu;
  813. /*
  814. * If this fails, it usually just indicates that we're dealing with a
  815. * virq or IPI channel, which don't actually need to be rebound. Ignore
  816. * it, but don't do the xenlinux-level rebind in that case.
  817. */
  818. if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_vcpu, &bind_vcpu) >= 0)
  819. bind_evtchn_to_cpu(evtchn, tcpu);
  820. return 0;
  821. }
  822. static int set_affinity_irq(unsigned irq, const struct cpumask *dest)
  823. {
  824. unsigned tcpu = cpumask_first(dest);
  825. return rebind_irq_to_cpu(irq, tcpu);
  826. }
  827. int resend_irq_on_evtchn(unsigned int irq)
  828. {
  829. int masked, evtchn = evtchn_from_irq(irq);
  830. struct shared_info *s = HYPERVISOR_shared_info;
  831. if (!VALID_EVTCHN(evtchn))
  832. return 1;
  833. masked = sync_test_and_set_bit(evtchn, s->evtchn_mask);
  834. sync_set_bit(evtchn, s->evtchn_pending);
  835. if (!masked)
  836. unmask_evtchn(evtchn);
  837. return 1;
  838. }
  839. static void enable_dynirq(unsigned int irq)
  840. {
  841. int evtchn = evtchn_from_irq(irq);
  842. if (VALID_EVTCHN(evtchn))
  843. unmask_evtchn(evtchn);
  844. }
  845. static void disable_dynirq(unsigned int irq)
  846. {
  847. int evtchn = evtchn_from_irq(irq);
  848. if (VALID_EVTCHN(evtchn))
  849. mask_evtchn(evtchn);
  850. }
  851. static void ack_dynirq(unsigned int irq)
  852. {
  853. int evtchn = evtchn_from_irq(irq);
  854. move_native_irq(irq);
  855. if (VALID_EVTCHN(evtchn))
  856. clear_evtchn(evtchn);
  857. }
  858. static int retrigger_dynirq(unsigned int irq)
  859. {
  860. int evtchn = evtchn_from_irq(irq);
  861. struct shared_info *sh = HYPERVISOR_shared_info;
  862. int ret = 0;
  863. if (VALID_EVTCHN(evtchn)) {
  864. int masked;
  865. masked = sync_test_and_set_bit(evtchn, sh->evtchn_mask);
  866. sync_set_bit(evtchn, sh->evtchn_pending);
  867. if (!masked)
  868. unmask_evtchn(evtchn);
  869. ret = 1;
  870. }
  871. return ret;
  872. }
  873. static void restore_cpu_virqs(unsigned int cpu)
  874. {
  875. struct evtchn_bind_virq bind_virq;
  876. int virq, irq, evtchn;
  877. for (virq = 0; virq < NR_VIRQS; virq++) {
  878. if ((irq = per_cpu(virq_to_irq, cpu)[virq]) == -1)
  879. continue;
  880. BUG_ON(virq_from_irq(irq) != virq);
  881. /* Get a new binding from Xen. */
  882. bind_virq.virq = virq;
  883. bind_virq.vcpu = cpu;
  884. if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_virq,
  885. &bind_virq) != 0)
  886. BUG();
  887. evtchn = bind_virq.port;
  888. /* Record the new mapping. */
  889. evtchn_to_irq[evtchn] = irq;
  890. irq_info[irq] = mk_virq_info(evtchn, virq);
  891. bind_evtchn_to_cpu(evtchn, cpu);
  892. /* Ready for use. */
  893. unmask_evtchn(evtchn);
  894. }
  895. }
  896. static void restore_cpu_ipis(unsigned int cpu)
  897. {
  898. struct evtchn_bind_ipi bind_ipi;
  899. int ipi, irq, evtchn;
  900. for (ipi = 0; ipi < XEN_NR_IPIS; ipi++) {
  901. if ((irq = per_cpu(ipi_to_irq, cpu)[ipi]) == -1)
  902. continue;
  903. BUG_ON(ipi_from_irq(irq) != ipi);
  904. /* Get a new binding from Xen. */
  905. bind_ipi.vcpu = cpu;
  906. if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_ipi,
  907. &bind_ipi) != 0)
  908. BUG();
  909. evtchn = bind_ipi.port;
  910. /* Record the new mapping. */
  911. evtchn_to_irq[evtchn] = irq;
  912. irq_info[irq] = mk_ipi_info(evtchn, ipi);
  913. bind_evtchn_to_cpu(evtchn, cpu);
  914. /* Ready for use. */
  915. unmask_evtchn(evtchn);
  916. }
  917. }
  918. /* Clear an irq's pending state, in preparation for polling on it */
  919. void xen_clear_irq_pending(int irq)
  920. {
  921. int evtchn = evtchn_from_irq(irq);
  922. if (VALID_EVTCHN(evtchn))
  923. clear_evtchn(evtchn);
  924. }
  925. EXPORT_SYMBOL(xen_clear_irq_pending);
  926. void xen_set_irq_pending(int irq)
  927. {
  928. int evtchn = evtchn_from_irq(irq);
  929. if (VALID_EVTCHN(evtchn))
  930. set_evtchn(evtchn);
  931. }
  932. bool xen_test_irq_pending(int irq)
  933. {
  934. int evtchn = evtchn_from_irq(irq);
  935. bool ret = false;
  936. if (VALID_EVTCHN(evtchn))
  937. ret = test_evtchn(evtchn);
  938. return ret;
  939. }
  940. /* Poll waiting for an irq to become pending with timeout. In the usual case,
  941. * the irq will be disabled so it won't deliver an interrupt. */
  942. void xen_poll_irq_timeout(int irq, u64 timeout)
  943. {
  944. evtchn_port_t evtchn = evtchn_from_irq(irq);
  945. if (VALID_EVTCHN(evtchn)) {
  946. struct sched_poll poll;
  947. poll.nr_ports = 1;
  948. poll.timeout = timeout;
  949. set_xen_guest_handle(poll.ports, &evtchn);
  950. if (HYPERVISOR_sched_op(SCHEDOP_poll, &poll) != 0)
  951. BUG();
  952. }
  953. }
  954. EXPORT_SYMBOL(xen_poll_irq_timeout);
  955. /* Poll waiting for an irq to become pending. In the usual case, the
  956. * irq will be disabled so it won't deliver an interrupt. */
  957. void xen_poll_irq(int irq)
  958. {
  959. xen_poll_irq_timeout(irq, 0 /* no timeout */);
  960. }
  961. void xen_irq_resume(void)
  962. {
  963. unsigned int cpu, irq, evtchn;
  964. init_evtchn_cpu_bindings();
  965. /* New event-channel space is not 'live' yet. */
  966. for (evtchn = 0; evtchn < NR_EVENT_CHANNELS; evtchn++)
  967. mask_evtchn(evtchn);
  968. /* No IRQ <-> event-channel mappings. */
  969. for (irq = 0; irq < nr_irqs; irq++)
  970. irq_info[irq].evtchn = 0; /* zap event-channel binding */
  971. for (evtchn = 0; evtchn < NR_EVENT_CHANNELS; evtchn++)
  972. evtchn_to_irq[evtchn] = -1;
  973. for_each_possible_cpu(cpu) {
  974. restore_cpu_virqs(cpu);
  975. restore_cpu_ipis(cpu);
  976. }
  977. }
  978. static struct irq_chip xen_dynamic_chip __read_mostly = {
  979. .name = "xen-dyn",
  980. .disable = disable_dynirq,
  981. .mask = disable_dynirq,
  982. .unmask = enable_dynirq,
  983. .ack = ack_dynirq,
  984. .set_affinity = set_affinity_irq,
  985. .retrigger = retrigger_dynirq,
  986. };
  987. static struct irq_chip xen_pirq_chip __read_mostly = {
  988. .name = "xen-pirq",
  989. .startup = startup_pirq,
  990. .shutdown = shutdown_pirq,
  991. .enable = enable_pirq,
  992. .unmask = enable_pirq,
  993. .disable = disable_pirq,
  994. .mask = disable_pirq,
  995. .ack = ack_pirq,
  996. .end = end_pirq,
  997. .set_affinity = set_affinity_irq,
  998. .retrigger = retrigger_dynirq,
  999. };
  1000. static struct irq_chip xen_percpu_chip __read_mostly = {
  1001. .name = "xen-percpu",
  1002. .disable = disable_dynirq,
  1003. .mask = disable_dynirq,
  1004. .unmask = enable_dynirq,
  1005. .ack = ack_dynirq,
  1006. };
  1007. int xen_set_callback_via(uint64_t via)
  1008. {
  1009. struct xen_hvm_param a;
  1010. a.domid = DOMID_SELF;
  1011. a.index = HVM_PARAM_CALLBACK_IRQ;
  1012. a.value = via;
  1013. return HYPERVISOR_hvm_op(HVMOP_set_param, &a);
  1014. }
  1015. EXPORT_SYMBOL_GPL(xen_set_callback_via);
  1016. #ifdef CONFIG_XEN_PVHVM
  1017. /* Vector callbacks are better than PCI interrupts to receive event
  1018. * channel notifications because we can receive vector callbacks on any
  1019. * vcpu and we don't need PCI support or APIC interactions. */
  1020. void xen_callback_vector(void)
  1021. {
  1022. int rc;
  1023. uint64_t callback_via;
  1024. if (xen_have_vector_callback) {
  1025. callback_via = HVM_CALLBACK_VECTOR(XEN_HVM_EVTCHN_CALLBACK);
  1026. rc = xen_set_callback_via(callback_via);
  1027. if (rc) {
  1028. printk(KERN_ERR "Request for Xen HVM callback vector"
  1029. " failed.\n");
  1030. xen_have_vector_callback = 0;
  1031. return;
  1032. }
  1033. printk(KERN_INFO "Xen HVM callback vector for event delivery is "
  1034. "enabled\n");
  1035. /* in the restore case the vector has already been allocated */
  1036. if (!test_bit(XEN_HVM_EVTCHN_CALLBACK, used_vectors))
  1037. alloc_intr_gate(XEN_HVM_EVTCHN_CALLBACK, xen_hvm_callback_vector);
  1038. }
  1039. }
  1040. #else
  1041. void xen_callback_vector(void) {}
  1042. #endif
  1043. void __init xen_init_IRQ(void)
  1044. {
  1045. int i;
  1046. cpu_evtchn_mask_p = kcalloc(nr_cpu_ids, sizeof(struct cpu_evtchn_s),
  1047. GFP_KERNEL);
  1048. irq_info = kcalloc(nr_irqs, sizeof(*irq_info), GFP_KERNEL);
  1049. evtchn_to_irq = kcalloc(NR_EVENT_CHANNELS, sizeof(*evtchn_to_irq),
  1050. GFP_KERNEL);
  1051. for (i = 0; i < NR_EVENT_CHANNELS; i++)
  1052. evtchn_to_irq[i] = -1;
  1053. init_evtchn_cpu_bindings();
  1054. /* No event channels are 'live' right now. */
  1055. for (i = 0; i < NR_EVENT_CHANNELS; i++)
  1056. mask_evtchn(i);
  1057. if (xen_hvm_domain()) {
  1058. xen_callback_vector();
  1059. native_init_IRQ();
  1060. } else {
  1061. irq_ctx_init(smp_processor_id());
  1062. }
  1063. }