main.c 60 KB

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  1. /*
  2. * Copyright (c) 2008-2011 Atheros Communications Inc.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for any
  5. * purpose with or without fee is hereby granted, provided that the above
  6. * copyright notice and this permission notice appear in all copies.
  7. *
  8. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  9. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15. */
  16. #include <linux/nl80211.h>
  17. #include <linux/delay.h>
  18. #include "ath9k.h"
  19. #include "btcoex.h"
  20. static u8 parse_mpdudensity(u8 mpdudensity)
  21. {
  22. /*
  23. * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
  24. * 0 for no restriction
  25. * 1 for 1/4 us
  26. * 2 for 1/2 us
  27. * 3 for 1 us
  28. * 4 for 2 us
  29. * 5 for 4 us
  30. * 6 for 8 us
  31. * 7 for 16 us
  32. */
  33. switch (mpdudensity) {
  34. case 0:
  35. return 0;
  36. case 1:
  37. case 2:
  38. case 3:
  39. /* Our lower layer calculations limit our precision to
  40. 1 microsecond */
  41. return 1;
  42. case 4:
  43. return 2;
  44. case 5:
  45. return 4;
  46. case 6:
  47. return 8;
  48. case 7:
  49. return 16;
  50. default:
  51. return 0;
  52. }
  53. }
  54. static bool ath9k_has_pending_frames(struct ath_softc *sc, struct ath_txq *txq)
  55. {
  56. bool pending = false;
  57. spin_lock_bh(&txq->axq_lock);
  58. if (txq->axq_depth || !list_empty(&txq->axq_acq))
  59. pending = true;
  60. spin_unlock_bh(&txq->axq_lock);
  61. return pending;
  62. }
  63. static bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
  64. {
  65. unsigned long flags;
  66. bool ret;
  67. spin_lock_irqsave(&sc->sc_pm_lock, flags);
  68. ret = ath9k_hw_setpower(sc->sc_ah, mode);
  69. spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  70. return ret;
  71. }
  72. void ath9k_ps_wakeup(struct ath_softc *sc)
  73. {
  74. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  75. unsigned long flags;
  76. enum ath9k_power_mode power_mode;
  77. spin_lock_irqsave(&sc->sc_pm_lock, flags);
  78. if (++sc->ps_usecount != 1)
  79. goto unlock;
  80. power_mode = sc->sc_ah->power_mode;
  81. ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
  82. /*
  83. * While the hardware is asleep, the cycle counters contain no
  84. * useful data. Better clear them now so that they don't mess up
  85. * survey data results.
  86. */
  87. if (power_mode != ATH9K_PM_AWAKE) {
  88. spin_lock(&common->cc_lock);
  89. ath_hw_cycle_counters_update(common);
  90. memset(&common->cc_survey, 0, sizeof(common->cc_survey));
  91. spin_unlock(&common->cc_lock);
  92. }
  93. unlock:
  94. spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  95. }
  96. void ath9k_ps_restore(struct ath_softc *sc)
  97. {
  98. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  99. enum ath9k_power_mode mode;
  100. unsigned long flags;
  101. spin_lock_irqsave(&sc->sc_pm_lock, flags);
  102. if (--sc->ps_usecount != 0)
  103. goto unlock;
  104. if (sc->ps_idle)
  105. mode = ATH9K_PM_FULL_SLEEP;
  106. else if (sc->ps_enabled &&
  107. !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
  108. PS_WAIT_FOR_CAB |
  109. PS_WAIT_FOR_PSPOLL_DATA |
  110. PS_WAIT_FOR_TX_ACK)))
  111. mode = ATH9K_PM_NETWORK_SLEEP;
  112. else
  113. goto unlock;
  114. spin_lock(&common->cc_lock);
  115. ath_hw_cycle_counters_update(common);
  116. spin_unlock(&common->cc_lock);
  117. ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_NETWORK_SLEEP);
  118. unlock:
  119. spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  120. }
  121. void ath_start_ani(struct ath_common *common)
  122. {
  123. struct ath_hw *ah = common->ah;
  124. unsigned long timestamp = jiffies_to_msecs(jiffies);
  125. struct ath_softc *sc = (struct ath_softc *) common->priv;
  126. if (!(sc->sc_flags & SC_OP_ANI_RUN))
  127. return;
  128. if (sc->sc_flags & SC_OP_OFFCHANNEL)
  129. return;
  130. common->ani.longcal_timer = timestamp;
  131. common->ani.shortcal_timer = timestamp;
  132. common->ani.checkani_timer = timestamp;
  133. mod_timer(&common->ani.timer,
  134. jiffies +
  135. msecs_to_jiffies((u32)ah->config.ani_poll_interval));
  136. }
  137. static void ath_update_survey_nf(struct ath_softc *sc, int channel)
  138. {
  139. struct ath_hw *ah = sc->sc_ah;
  140. struct ath9k_channel *chan = &ah->channels[channel];
  141. struct survey_info *survey = &sc->survey[channel];
  142. if (chan->noisefloor) {
  143. survey->filled |= SURVEY_INFO_NOISE_DBM;
  144. survey->noise = ath9k_hw_getchan_noise(ah, chan);
  145. }
  146. }
  147. /*
  148. * Updates the survey statistics and returns the busy time since last
  149. * update in %, if the measurement duration was long enough for the
  150. * result to be useful, -1 otherwise.
  151. */
  152. static int ath_update_survey_stats(struct ath_softc *sc)
  153. {
  154. struct ath_hw *ah = sc->sc_ah;
  155. struct ath_common *common = ath9k_hw_common(ah);
  156. int pos = ah->curchan - &ah->channels[0];
  157. struct survey_info *survey = &sc->survey[pos];
  158. struct ath_cycle_counters *cc = &common->cc_survey;
  159. unsigned int div = common->clockrate * 1000;
  160. int ret = 0;
  161. if (!ah->curchan)
  162. return -1;
  163. if (ah->power_mode == ATH9K_PM_AWAKE)
  164. ath_hw_cycle_counters_update(common);
  165. if (cc->cycles > 0) {
  166. survey->filled |= SURVEY_INFO_CHANNEL_TIME |
  167. SURVEY_INFO_CHANNEL_TIME_BUSY |
  168. SURVEY_INFO_CHANNEL_TIME_RX |
  169. SURVEY_INFO_CHANNEL_TIME_TX;
  170. survey->channel_time += cc->cycles / div;
  171. survey->channel_time_busy += cc->rx_busy / div;
  172. survey->channel_time_rx += cc->rx_frame / div;
  173. survey->channel_time_tx += cc->tx_frame / div;
  174. }
  175. if (cc->cycles < div)
  176. return -1;
  177. if (cc->cycles > 0)
  178. ret = cc->rx_busy * 100 / cc->cycles;
  179. memset(cc, 0, sizeof(*cc));
  180. ath_update_survey_nf(sc, pos);
  181. return ret;
  182. }
  183. static void __ath_cancel_work(struct ath_softc *sc)
  184. {
  185. cancel_work_sync(&sc->paprd_work);
  186. cancel_work_sync(&sc->hw_check_work);
  187. cancel_delayed_work_sync(&sc->tx_complete_work);
  188. cancel_delayed_work_sync(&sc->hw_pll_work);
  189. }
  190. static void ath_cancel_work(struct ath_softc *sc)
  191. {
  192. __ath_cancel_work(sc);
  193. cancel_work_sync(&sc->hw_reset_work);
  194. }
  195. static bool ath_prepare_reset(struct ath_softc *sc, bool retry_tx, bool flush)
  196. {
  197. struct ath_hw *ah = sc->sc_ah;
  198. struct ath_common *common = ath9k_hw_common(ah);
  199. bool ret;
  200. ieee80211_stop_queues(sc->hw);
  201. sc->hw_busy_count = 0;
  202. del_timer_sync(&common->ani.timer);
  203. ath9k_debug_samp_bb_mac(sc);
  204. ath9k_hw_disable_interrupts(ah);
  205. ret = ath_drain_all_txq(sc, retry_tx);
  206. if (!ath_stoprecv(sc))
  207. ret = false;
  208. if (!flush) {
  209. if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
  210. ath_rx_tasklet(sc, 1, true);
  211. ath_rx_tasklet(sc, 1, false);
  212. } else {
  213. ath_flushrecv(sc);
  214. }
  215. return ret;
  216. }
  217. static bool ath_complete_reset(struct ath_softc *sc, bool start)
  218. {
  219. struct ath_hw *ah = sc->sc_ah;
  220. struct ath_common *common = ath9k_hw_common(ah);
  221. if (ath_startrecv(sc) != 0) {
  222. ath_err(common, "Unable to restart recv logic\n");
  223. return false;
  224. }
  225. ath9k_cmn_update_txpow(ah, sc->curtxpow,
  226. sc->config.txpowlimit, &sc->curtxpow);
  227. ath9k_hw_set_interrupts(ah, ah->imask);
  228. ath9k_hw_enable_interrupts(ah);
  229. if (!(sc->sc_flags & (SC_OP_OFFCHANNEL)) && start) {
  230. if (sc->sc_flags & SC_OP_BEACONS)
  231. ath_set_beacon(sc);
  232. ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
  233. ieee80211_queue_delayed_work(sc->hw, &sc->hw_pll_work, HZ/2);
  234. if (!common->disable_ani)
  235. ath_start_ani(common);
  236. }
  237. if (ath9k_hw_ops(ah)->antdiv_comb_conf_get && sc->ant_rx != 3) {
  238. struct ath_hw_antcomb_conf div_ant_conf;
  239. u8 lna_conf;
  240. ath9k_hw_antdiv_comb_conf_get(ah, &div_ant_conf);
  241. if (sc->ant_rx == 1)
  242. lna_conf = ATH_ANT_DIV_COMB_LNA1;
  243. else
  244. lna_conf = ATH_ANT_DIV_COMB_LNA2;
  245. div_ant_conf.main_lna_conf = lna_conf;
  246. div_ant_conf.alt_lna_conf = lna_conf;
  247. ath9k_hw_antdiv_comb_conf_set(ah, &div_ant_conf);
  248. }
  249. ieee80211_wake_queues(sc->hw);
  250. return true;
  251. }
  252. static int ath_reset_internal(struct ath_softc *sc, struct ath9k_channel *hchan,
  253. bool retry_tx)
  254. {
  255. struct ath_hw *ah = sc->sc_ah;
  256. struct ath_common *common = ath9k_hw_common(ah);
  257. struct ath9k_hw_cal_data *caldata = NULL;
  258. bool fastcc = true;
  259. bool flush = false;
  260. int r;
  261. __ath_cancel_work(sc);
  262. spin_lock_bh(&sc->sc_pcu_lock);
  263. if (!(sc->sc_flags & SC_OP_OFFCHANNEL)) {
  264. fastcc = false;
  265. caldata = &sc->caldata;
  266. }
  267. if (!hchan) {
  268. fastcc = false;
  269. flush = true;
  270. hchan = ah->curchan;
  271. }
  272. if (fastcc && !ath9k_hw_check_alive(ah))
  273. fastcc = false;
  274. if (!ath_prepare_reset(sc, retry_tx, flush))
  275. fastcc = false;
  276. ath_dbg(common, ATH_DBG_CONFIG,
  277. "Reset to %u MHz, HT40: %d fastcc: %d\n",
  278. hchan->channel, !!(hchan->channelFlags & (CHANNEL_HT40MINUS |
  279. CHANNEL_HT40PLUS)),
  280. fastcc);
  281. r = ath9k_hw_reset(ah, hchan, caldata, fastcc);
  282. if (r) {
  283. ath_err(common,
  284. "Unable to reset channel, reset status %d\n", r);
  285. goto out;
  286. }
  287. if (!ath_complete_reset(sc, true))
  288. r = -EIO;
  289. out:
  290. spin_unlock_bh(&sc->sc_pcu_lock);
  291. return r;
  292. }
  293. /*
  294. * Set/change channels. If the channel is really being changed, it's done
  295. * by reseting the chip. To accomplish this we must first cleanup any pending
  296. * DMA, then restart stuff.
  297. */
  298. static int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
  299. struct ath9k_channel *hchan)
  300. {
  301. int r;
  302. if (sc->sc_flags & SC_OP_INVALID)
  303. return -EIO;
  304. ath9k_ps_wakeup(sc);
  305. r = ath_reset_internal(sc, hchan, false);
  306. ath9k_ps_restore(sc);
  307. return r;
  308. }
  309. static void ath_paprd_activate(struct ath_softc *sc)
  310. {
  311. struct ath_hw *ah = sc->sc_ah;
  312. struct ath9k_hw_cal_data *caldata = ah->caldata;
  313. int chain;
  314. if (!caldata || !caldata->paprd_done)
  315. return;
  316. ath9k_ps_wakeup(sc);
  317. ar9003_paprd_enable(ah, false);
  318. for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
  319. if (!(ah->txchainmask & BIT(chain)))
  320. continue;
  321. ar9003_paprd_populate_single_table(ah, caldata, chain);
  322. }
  323. ar9003_paprd_enable(ah, true);
  324. ath9k_ps_restore(sc);
  325. }
  326. static bool ath_paprd_send_frame(struct ath_softc *sc, struct sk_buff *skb, int chain)
  327. {
  328. struct ieee80211_hw *hw = sc->hw;
  329. struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
  330. struct ath_hw *ah = sc->sc_ah;
  331. struct ath_common *common = ath9k_hw_common(ah);
  332. struct ath_tx_control txctl;
  333. int time_left;
  334. memset(&txctl, 0, sizeof(txctl));
  335. txctl.txq = sc->tx.txq_map[WME_AC_BE];
  336. memset(tx_info, 0, sizeof(*tx_info));
  337. tx_info->band = hw->conf.channel->band;
  338. tx_info->flags |= IEEE80211_TX_CTL_NO_ACK;
  339. tx_info->control.rates[0].idx = 0;
  340. tx_info->control.rates[0].count = 1;
  341. tx_info->control.rates[0].flags = IEEE80211_TX_RC_MCS;
  342. tx_info->control.rates[1].idx = -1;
  343. init_completion(&sc->paprd_complete);
  344. txctl.paprd = BIT(chain);
  345. if (ath_tx_start(hw, skb, &txctl) != 0) {
  346. ath_dbg(common, ATH_DBG_CALIBRATE, "PAPRD TX failed\n");
  347. dev_kfree_skb_any(skb);
  348. return false;
  349. }
  350. time_left = wait_for_completion_timeout(&sc->paprd_complete,
  351. msecs_to_jiffies(ATH_PAPRD_TIMEOUT));
  352. if (!time_left)
  353. ath_dbg(common, ATH_DBG_CALIBRATE,
  354. "Timeout waiting for paprd training on TX chain %d\n",
  355. chain);
  356. return !!time_left;
  357. }
  358. void ath_paprd_calibrate(struct work_struct *work)
  359. {
  360. struct ath_softc *sc = container_of(work, struct ath_softc, paprd_work);
  361. struct ieee80211_hw *hw = sc->hw;
  362. struct ath_hw *ah = sc->sc_ah;
  363. struct ieee80211_hdr *hdr;
  364. struct sk_buff *skb = NULL;
  365. struct ath9k_hw_cal_data *caldata = ah->caldata;
  366. struct ath_common *common = ath9k_hw_common(ah);
  367. int ftype;
  368. int chain_ok = 0;
  369. int chain;
  370. int len = 1800;
  371. if (!caldata)
  372. return;
  373. ath9k_ps_wakeup(sc);
  374. if (ar9003_paprd_init_table(ah) < 0)
  375. goto fail_paprd;
  376. skb = alloc_skb(len, GFP_KERNEL);
  377. if (!skb)
  378. goto fail_paprd;
  379. skb_put(skb, len);
  380. memset(skb->data, 0, len);
  381. hdr = (struct ieee80211_hdr *)skb->data;
  382. ftype = IEEE80211_FTYPE_DATA | IEEE80211_STYPE_NULLFUNC;
  383. hdr->frame_control = cpu_to_le16(ftype);
  384. hdr->duration_id = cpu_to_le16(10);
  385. memcpy(hdr->addr1, hw->wiphy->perm_addr, ETH_ALEN);
  386. memcpy(hdr->addr2, hw->wiphy->perm_addr, ETH_ALEN);
  387. memcpy(hdr->addr3, hw->wiphy->perm_addr, ETH_ALEN);
  388. for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
  389. if (!(ah->txchainmask & BIT(chain)))
  390. continue;
  391. chain_ok = 0;
  392. ath_dbg(common, ATH_DBG_CALIBRATE,
  393. "Sending PAPRD frame for thermal measurement "
  394. "on chain %d\n", chain);
  395. if (!ath_paprd_send_frame(sc, skb, chain))
  396. goto fail_paprd;
  397. ar9003_paprd_setup_gain_table(ah, chain);
  398. ath_dbg(common, ATH_DBG_CALIBRATE,
  399. "Sending PAPRD training frame on chain %d\n", chain);
  400. if (!ath_paprd_send_frame(sc, skb, chain))
  401. goto fail_paprd;
  402. if (!ar9003_paprd_is_done(ah)) {
  403. ath_dbg(common, ATH_DBG_CALIBRATE,
  404. "PAPRD not yet done on chain %d\n", chain);
  405. break;
  406. }
  407. if (ar9003_paprd_create_curve(ah, caldata, chain)) {
  408. ath_dbg(common, ATH_DBG_CALIBRATE,
  409. "PAPRD create curve failed on chain %d\n",
  410. chain);
  411. break;
  412. }
  413. chain_ok = 1;
  414. }
  415. kfree_skb(skb);
  416. if (chain_ok) {
  417. caldata->paprd_done = true;
  418. ath_paprd_activate(sc);
  419. }
  420. fail_paprd:
  421. ath9k_ps_restore(sc);
  422. }
  423. /*
  424. * This routine performs the periodic noise floor calibration function
  425. * that is used to adjust and optimize the chip performance. This
  426. * takes environmental changes (location, temperature) into account.
  427. * When the task is complete, it reschedules itself depending on the
  428. * appropriate interval that was calculated.
  429. */
  430. void ath_ani_calibrate(unsigned long data)
  431. {
  432. struct ath_softc *sc = (struct ath_softc *)data;
  433. struct ath_hw *ah = sc->sc_ah;
  434. struct ath_common *common = ath9k_hw_common(ah);
  435. bool longcal = false;
  436. bool shortcal = false;
  437. bool aniflag = false;
  438. unsigned int timestamp = jiffies_to_msecs(jiffies);
  439. u32 cal_interval, short_cal_interval, long_cal_interval;
  440. unsigned long flags;
  441. if (ah->caldata && ah->caldata->nfcal_interference)
  442. long_cal_interval = ATH_LONG_CALINTERVAL_INT;
  443. else
  444. long_cal_interval = ATH_LONG_CALINTERVAL;
  445. short_cal_interval = (ah->opmode == NL80211_IFTYPE_AP) ?
  446. ATH_AP_SHORT_CALINTERVAL : ATH_STA_SHORT_CALINTERVAL;
  447. /* Only calibrate if awake */
  448. if (sc->sc_ah->power_mode != ATH9K_PM_AWAKE)
  449. goto set_timer;
  450. ath9k_ps_wakeup(sc);
  451. /* Long calibration runs independently of short calibration. */
  452. if ((timestamp - common->ani.longcal_timer) >= long_cal_interval) {
  453. longcal = true;
  454. ath_dbg(common, ATH_DBG_ANI, "longcal @%lu\n", jiffies);
  455. common->ani.longcal_timer = timestamp;
  456. }
  457. /* Short calibration applies only while caldone is false */
  458. if (!common->ani.caldone) {
  459. if ((timestamp - common->ani.shortcal_timer) >= short_cal_interval) {
  460. shortcal = true;
  461. ath_dbg(common, ATH_DBG_ANI,
  462. "shortcal @%lu\n", jiffies);
  463. common->ani.shortcal_timer = timestamp;
  464. common->ani.resetcal_timer = timestamp;
  465. }
  466. } else {
  467. if ((timestamp - common->ani.resetcal_timer) >=
  468. ATH_RESTART_CALINTERVAL) {
  469. common->ani.caldone = ath9k_hw_reset_calvalid(ah);
  470. if (common->ani.caldone)
  471. common->ani.resetcal_timer = timestamp;
  472. }
  473. }
  474. /* Verify whether we must check ANI */
  475. if ((timestamp - common->ani.checkani_timer) >=
  476. ah->config.ani_poll_interval) {
  477. aniflag = true;
  478. common->ani.checkani_timer = timestamp;
  479. }
  480. /* Call ANI routine if necessary */
  481. if (aniflag) {
  482. spin_lock_irqsave(&common->cc_lock, flags);
  483. ath9k_hw_ani_monitor(ah, ah->curchan);
  484. ath_update_survey_stats(sc);
  485. spin_unlock_irqrestore(&common->cc_lock, flags);
  486. }
  487. /* Perform calibration if necessary */
  488. if (longcal || shortcal) {
  489. common->ani.caldone =
  490. ath9k_hw_calibrate(ah, ah->curchan,
  491. ah->rxchainmask, longcal);
  492. }
  493. ath9k_ps_restore(sc);
  494. set_timer:
  495. /*
  496. * Set timer interval based on previous results.
  497. * The interval must be the shortest necessary to satisfy ANI,
  498. * short calibration and long calibration.
  499. */
  500. ath9k_debug_samp_bb_mac(sc);
  501. cal_interval = ATH_LONG_CALINTERVAL;
  502. if (sc->sc_ah->config.enable_ani)
  503. cal_interval = min(cal_interval,
  504. (u32)ah->config.ani_poll_interval);
  505. if (!common->ani.caldone)
  506. cal_interval = min(cal_interval, (u32)short_cal_interval);
  507. mod_timer(&common->ani.timer, jiffies + msecs_to_jiffies(cal_interval));
  508. if ((sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_PAPRD) && ah->caldata) {
  509. if (!ah->caldata->paprd_done)
  510. ieee80211_queue_work(sc->hw, &sc->paprd_work);
  511. else if (!ah->paprd_table_write_done)
  512. ath_paprd_activate(sc);
  513. }
  514. }
  515. static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta)
  516. {
  517. struct ath_node *an;
  518. an = (struct ath_node *)sta->drv_priv;
  519. #ifdef CONFIG_ATH9K_DEBUGFS
  520. spin_lock(&sc->nodes_lock);
  521. list_add(&an->list, &sc->nodes);
  522. spin_unlock(&sc->nodes_lock);
  523. an->sta = sta;
  524. #endif
  525. if (sc->sc_flags & SC_OP_TXAGGR) {
  526. ath_tx_node_init(sc, an);
  527. an->maxampdu = 1 << (IEEE80211_HT_MAX_AMPDU_FACTOR +
  528. sta->ht_cap.ampdu_factor);
  529. an->mpdudensity = parse_mpdudensity(sta->ht_cap.ampdu_density);
  530. }
  531. }
  532. static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
  533. {
  534. struct ath_node *an = (struct ath_node *)sta->drv_priv;
  535. #ifdef CONFIG_ATH9K_DEBUGFS
  536. spin_lock(&sc->nodes_lock);
  537. list_del(&an->list);
  538. spin_unlock(&sc->nodes_lock);
  539. an->sta = NULL;
  540. #endif
  541. if (sc->sc_flags & SC_OP_TXAGGR)
  542. ath_tx_node_cleanup(sc, an);
  543. }
  544. void ath9k_tasklet(unsigned long data)
  545. {
  546. struct ath_softc *sc = (struct ath_softc *)data;
  547. struct ath_hw *ah = sc->sc_ah;
  548. struct ath_common *common = ath9k_hw_common(ah);
  549. u32 status = sc->intrstatus;
  550. u32 rxmask;
  551. ath9k_ps_wakeup(sc);
  552. spin_lock(&sc->sc_pcu_lock);
  553. if ((status & ATH9K_INT_FATAL) ||
  554. (status & ATH9K_INT_BB_WATCHDOG)) {
  555. ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
  556. goto out;
  557. }
  558. /*
  559. * Only run the baseband hang check if beacons stop working in AP or
  560. * IBSS mode, because it has a high false positive rate. For station
  561. * mode it should not be necessary, since the upper layers will detect
  562. * this through a beacon miss automatically and the following channel
  563. * change will trigger a hardware reset anyway
  564. */
  565. if (ath9k_hw_numtxpending(ah, sc->beacon.beaconq) != 0 &&
  566. !ath9k_hw_check_alive(ah))
  567. ieee80211_queue_work(sc->hw, &sc->hw_check_work);
  568. if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
  569. /*
  570. * TSF sync does not look correct; remain awake to sync with
  571. * the next Beacon.
  572. */
  573. ath_dbg(common, ATH_DBG_PS,
  574. "TSFOOR - Sync with next Beacon\n");
  575. sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC;
  576. }
  577. if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
  578. rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL |
  579. ATH9K_INT_RXORN);
  580. else
  581. rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
  582. if (status & rxmask) {
  583. /* Check for high priority Rx first */
  584. if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
  585. (status & ATH9K_INT_RXHP))
  586. ath_rx_tasklet(sc, 0, true);
  587. ath_rx_tasklet(sc, 0, false);
  588. }
  589. if (status & ATH9K_INT_TX) {
  590. if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
  591. ath_tx_edma_tasklet(sc);
  592. else
  593. ath_tx_tasklet(sc);
  594. }
  595. if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
  596. if (status & ATH9K_INT_GENTIMER)
  597. ath_gen_timer_isr(sc->sc_ah);
  598. out:
  599. /* re-enable hardware interrupt */
  600. ath9k_hw_enable_interrupts(ah);
  601. spin_unlock(&sc->sc_pcu_lock);
  602. ath9k_ps_restore(sc);
  603. }
  604. irqreturn_t ath_isr(int irq, void *dev)
  605. {
  606. #define SCHED_INTR ( \
  607. ATH9K_INT_FATAL | \
  608. ATH9K_INT_BB_WATCHDOG | \
  609. ATH9K_INT_RXORN | \
  610. ATH9K_INT_RXEOL | \
  611. ATH9K_INT_RX | \
  612. ATH9K_INT_RXLP | \
  613. ATH9K_INT_RXHP | \
  614. ATH9K_INT_TX | \
  615. ATH9K_INT_BMISS | \
  616. ATH9K_INT_CST | \
  617. ATH9K_INT_TSFOOR | \
  618. ATH9K_INT_GENTIMER)
  619. struct ath_softc *sc = dev;
  620. struct ath_hw *ah = sc->sc_ah;
  621. struct ath_common *common = ath9k_hw_common(ah);
  622. enum ath9k_int status;
  623. bool sched = false;
  624. /*
  625. * The hardware is not ready/present, don't
  626. * touch anything. Note this can happen early
  627. * on if the IRQ is shared.
  628. */
  629. if (sc->sc_flags & SC_OP_INVALID)
  630. return IRQ_NONE;
  631. /* shared irq, not for us */
  632. if (!ath9k_hw_intrpend(ah))
  633. return IRQ_NONE;
  634. /*
  635. * Figure out the reason(s) for the interrupt. Note
  636. * that the hal returns a pseudo-ISR that may include
  637. * bits we haven't explicitly enabled so we mask the
  638. * value to insure we only process bits we requested.
  639. */
  640. ath9k_hw_getisr(ah, &status); /* NB: clears ISR too */
  641. status &= ah->imask; /* discard unasked-for bits */
  642. /*
  643. * If there are no status bits set, then this interrupt was not
  644. * for me (should have been caught above).
  645. */
  646. if (!status)
  647. return IRQ_NONE;
  648. /* Cache the status */
  649. sc->intrstatus = status;
  650. if (status & SCHED_INTR)
  651. sched = true;
  652. /*
  653. * If a FATAL or RXORN interrupt is received, we have to reset the
  654. * chip immediately.
  655. */
  656. if ((status & ATH9K_INT_FATAL) || ((status & ATH9K_INT_RXORN) &&
  657. !(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)))
  658. goto chip_reset;
  659. if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
  660. (status & ATH9K_INT_BB_WATCHDOG)) {
  661. spin_lock(&common->cc_lock);
  662. ath_hw_cycle_counters_update(common);
  663. ar9003_hw_bb_watchdog_dbg_info(ah);
  664. spin_unlock(&common->cc_lock);
  665. goto chip_reset;
  666. }
  667. if (status & ATH9K_INT_SWBA)
  668. tasklet_schedule(&sc->bcon_tasklet);
  669. if (status & ATH9K_INT_TXURN)
  670. ath9k_hw_updatetxtriglevel(ah, true);
  671. if (status & ATH9K_INT_RXEOL) {
  672. ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
  673. ath9k_hw_set_interrupts(ah, ah->imask);
  674. }
  675. if (status & ATH9K_INT_MIB) {
  676. /*
  677. * Disable interrupts until we service the MIB
  678. * interrupt; otherwise it will continue to
  679. * fire.
  680. */
  681. ath9k_hw_disable_interrupts(ah);
  682. /*
  683. * Let the hal handle the event. We assume
  684. * it will clear whatever condition caused
  685. * the interrupt.
  686. */
  687. spin_lock(&common->cc_lock);
  688. ath9k_hw_proc_mib_event(ah);
  689. spin_unlock(&common->cc_lock);
  690. ath9k_hw_enable_interrupts(ah);
  691. }
  692. if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
  693. if (status & ATH9K_INT_TIM_TIMER) {
  694. if (ATH_DBG_WARN_ON_ONCE(sc->ps_idle))
  695. goto chip_reset;
  696. /* Clear RxAbort bit so that we can
  697. * receive frames */
  698. ath9k_setpower(sc, ATH9K_PM_AWAKE);
  699. ath9k_hw_setrxabort(sc->sc_ah, 0);
  700. sc->ps_flags |= PS_WAIT_FOR_BEACON;
  701. }
  702. chip_reset:
  703. ath_debug_stat_interrupt(sc, status);
  704. if (sched) {
  705. /* turn off every interrupt */
  706. ath9k_hw_disable_interrupts(ah);
  707. tasklet_schedule(&sc->intr_tq);
  708. }
  709. return IRQ_HANDLED;
  710. #undef SCHED_INTR
  711. }
  712. static void ath_radio_enable(struct ath_softc *sc, struct ieee80211_hw *hw)
  713. {
  714. struct ath_hw *ah = sc->sc_ah;
  715. struct ath_common *common = ath9k_hw_common(ah);
  716. struct ieee80211_channel *channel = hw->conf.channel;
  717. int r;
  718. ath9k_ps_wakeup(sc);
  719. spin_lock_bh(&sc->sc_pcu_lock);
  720. atomic_set(&ah->intr_ref_cnt, -1);
  721. ath9k_hw_configpcipowersave(ah, false);
  722. if (!ah->curchan)
  723. ah->curchan = ath9k_cmn_get_curchannel(sc->hw, ah);
  724. r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
  725. if (r) {
  726. ath_err(common,
  727. "Unable to reset channel (%u MHz), reset status %d\n",
  728. channel->center_freq, r);
  729. }
  730. ath_complete_reset(sc, true);
  731. /* Enable LED */
  732. ath9k_hw_cfg_output(ah, ah->led_pin,
  733. AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
  734. ath9k_hw_set_gpio(ah, ah->led_pin, 0);
  735. spin_unlock_bh(&sc->sc_pcu_lock);
  736. ath9k_ps_restore(sc);
  737. }
  738. void ath_radio_disable(struct ath_softc *sc, struct ieee80211_hw *hw)
  739. {
  740. struct ath_hw *ah = sc->sc_ah;
  741. struct ieee80211_channel *channel = hw->conf.channel;
  742. int r;
  743. ath9k_ps_wakeup(sc);
  744. ath_cancel_work(sc);
  745. spin_lock_bh(&sc->sc_pcu_lock);
  746. /*
  747. * Keep the LED on when the radio is disabled
  748. * during idle unassociated state.
  749. */
  750. if (!sc->ps_idle) {
  751. ath9k_hw_set_gpio(ah, ah->led_pin, 1);
  752. ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
  753. }
  754. ath_prepare_reset(sc, false, true);
  755. if (!ah->curchan)
  756. ah->curchan = ath9k_cmn_get_curchannel(hw, ah);
  757. r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
  758. if (r) {
  759. ath_err(ath9k_hw_common(sc->sc_ah),
  760. "Unable to reset channel (%u MHz), reset status %d\n",
  761. channel->center_freq, r);
  762. }
  763. ath9k_hw_phy_disable(ah);
  764. ath9k_hw_configpcipowersave(ah, true);
  765. spin_unlock_bh(&sc->sc_pcu_lock);
  766. ath9k_ps_restore(sc);
  767. }
  768. static int ath_reset(struct ath_softc *sc, bool retry_tx)
  769. {
  770. int r;
  771. ath9k_ps_wakeup(sc);
  772. r = ath_reset_internal(sc, NULL, retry_tx);
  773. if (retry_tx) {
  774. int i;
  775. for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
  776. if (ATH_TXQ_SETUP(sc, i)) {
  777. spin_lock_bh(&sc->tx.txq[i].axq_lock);
  778. ath_txq_schedule(sc, &sc->tx.txq[i]);
  779. spin_unlock_bh(&sc->tx.txq[i].axq_lock);
  780. }
  781. }
  782. }
  783. ath9k_ps_restore(sc);
  784. return r;
  785. }
  786. void ath_reset_work(struct work_struct *work)
  787. {
  788. struct ath_softc *sc = container_of(work, struct ath_softc, hw_reset_work);
  789. ath_reset(sc, true);
  790. }
  791. void ath_hw_check(struct work_struct *work)
  792. {
  793. struct ath_softc *sc = container_of(work, struct ath_softc, hw_check_work);
  794. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  795. unsigned long flags;
  796. int busy;
  797. ath9k_ps_wakeup(sc);
  798. if (ath9k_hw_check_alive(sc->sc_ah))
  799. goto out;
  800. spin_lock_irqsave(&common->cc_lock, flags);
  801. busy = ath_update_survey_stats(sc);
  802. spin_unlock_irqrestore(&common->cc_lock, flags);
  803. ath_dbg(common, ATH_DBG_RESET, "Possible baseband hang, "
  804. "busy=%d (try %d)\n", busy, sc->hw_busy_count + 1);
  805. if (busy >= 99) {
  806. if (++sc->hw_busy_count >= 3)
  807. ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
  808. } else if (busy >= 0)
  809. sc->hw_busy_count = 0;
  810. out:
  811. ath9k_ps_restore(sc);
  812. }
  813. static void ath_hw_pll_rx_hang_check(struct ath_softc *sc, u32 pll_sqsum)
  814. {
  815. static int count;
  816. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  817. if (pll_sqsum >= 0x40000) {
  818. count++;
  819. if (count == 3) {
  820. /* Rx is hung for more than 500ms. Reset it */
  821. ath_dbg(common, ATH_DBG_RESET,
  822. "Possible RX hang, resetting");
  823. ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
  824. count = 0;
  825. }
  826. } else
  827. count = 0;
  828. }
  829. void ath_hw_pll_work(struct work_struct *work)
  830. {
  831. struct ath_softc *sc = container_of(work, struct ath_softc,
  832. hw_pll_work.work);
  833. u32 pll_sqsum;
  834. if (AR_SREV_9485(sc->sc_ah)) {
  835. ath9k_ps_wakeup(sc);
  836. pll_sqsum = ar9003_get_pll_sqsum_dvc(sc->sc_ah);
  837. ath9k_ps_restore(sc);
  838. ath_hw_pll_rx_hang_check(sc, pll_sqsum);
  839. ieee80211_queue_delayed_work(sc->hw, &sc->hw_pll_work, HZ/5);
  840. }
  841. }
  842. /**********************/
  843. /* mac80211 callbacks */
  844. /**********************/
  845. static int ath9k_start(struct ieee80211_hw *hw)
  846. {
  847. struct ath_softc *sc = hw->priv;
  848. struct ath_hw *ah = sc->sc_ah;
  849. struct ath_common *common = ath9k_hw_common(ah);
  850. struct ieee80211_channel *curchan = hw->conf.channel;
  851. struct ath9k_channel *init_channel;
  852. int r;
  853. ath_dbg(common, ATH_DBG_CONFIG,
  854. "Starting driver with initial channel: %d MHz\n",
  855. curchan->center_freq);
  856. ath9k_ps_wakeup(sc);
  857. mutex_lock(&sc->mutex);
  858. /* setup initial channel */
  859. sc->chan_idx = curchan->hw_value;
  860. init_channel = ath9k_cmn_get_curchannel(hw, ah);
  861. /* Reset SERDES registers */
  862. ath9k_hw_configpcipowersave(ah, false);
  863. /*
  864. * The basic interface to setting the hardware in a good
  865. * state is ``reset''. On return the hardware is known to
  866. * be powered up and with interrupts disabled. This must
  867. * be followed by initialization of the appropriate bits
  868. * and then setup of the interrupt mask.
  869. */
  870. spin_lock_bh(&sc->sc_pcu_lock);
  871. r = ath9k_hw_reset(ah, init_channel, ah->caldata, false);
  872. if (r) {
  873. ath_err(common,
  874. "Unable to reset hardware; reset status %d (freq %u MHz)\n",
  875. r, curchan->center_freq);
  876. spin_unlock_bh(&sc->sc_pcu_lock);
  877. goto mutex_unlock;
  878. }
  879. /* Setup our intr mask. */
  880. ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
  881. ATH9K_INT_RXORN | ATH9K_INT_FATAL |
  882. ATH9K_INT_GLOBAL;
  883. if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
  884. ah->imask |= ATH9K_INT_RXHP |
  885. ATH9K_INT_RXLP |
  886. ATH9K_INT_BB_WATCHDOG;
  887. else
  888. ah->imask |= ATH9K_INT_RX;
  889. ah->imask |= ATH9K_INT_GTT;
  890. if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
  891. ah->imask |= ATH9K_INT_CST;
  892. sc->sc_flags &= ~SC_OP_INVALID;
  893. sc->sc_ah->is_monitoring = false;
  894. /* Disable BMISS interrupt when we're not associated */
  895. ah->imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
  896. if (!ath_complete_reset(sc, false)) {
  897. r = -EIO;
  898. spin_unlock_bh(&sc->sc_pcu_lock);
  899. goto mutex_unlock;
  900. }
  901. spin_unlock_bh(&sc->sc_pcu_lock);
  902. if ((ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE) &&
  903. !ah->btcoex_hw.enabled) {
  904. ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
  905. AR_STOMP_LOW_WLAN_WGHT);
  906. ath9k_hw_btcoex_enable(ah);
  907. if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
  908. ath9k_btcoex_timer_resume(sc);
  909. }
  910. if (ah->caps.pcie_lcr_extsync_en && common->bus_ops->extn_synch_en)
  911. common->bus_ops->extn_synch_en(common);
  912. mutex_unlock:
  913. mutex_unlock(&sc->mutex);
  914. ath9k_ps_restore(sc);
  915. return r;
  916. }
  917. static void ath9k_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
  918. {
  919. struct ath_softc *sc = hw->priv;
  920. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  921. struct ath_tx_control txctl;
  922. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
  923. if (sc->ps_enabled) {
  924. /*
  925. * mac80211 does not set PM field for normal data frames, so we
  926. * need to update that based on the current PS mode.
  927. */
  928. if (ieee80211_is_data(hdr->frame_control) &&
  929. !ieee80211_is_nullfunc(hdr->frame_control) &&
  930. !ieee80211_has_pm(hdr->frame_control)) {
  931. ath_dbg(common, ATH_DBG_PS,
  932. "Add PM=1 for a TX frame while in PS mode\n");
  933. hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
  934. }
  935. }
  936. if (unlikely(sc->sc_ah->power_mode != ATH9K_PM_AWAKE)) {
  937. /*
  938. * We are using PS-Poll and mac80211 can request TX while in
  939. * power save mode. Need to wake up hardware for the TX to be
  940. * completed and if needed, also for RX of buffered frames.
  941. */
  942. ath9k_ps_wakeup(sc);
  943. if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
  944. ath9k_hw_setrxabort(sc->sc_ah, 0);
  945. if (ieee80211_is_pspoll(hdr->frame_control)) {
  946. ath_dbg(common, ATH_DBG_PS,
  947. "Sending PS-Poll to pick a buffered frame\n");
  948. sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
  949. } else {
  950. ath_dbg(common, ATH_DBG_PS,
  951. "Wake up to complete TX\n");
  952. sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
  953. }
  954. /*
  955. * The actual restore operation will happen only after
  956. * the sc_flags bit is cleared. We are just dropping
  957. * the ps_usecount here.
  958. */
  959. ath9k_ps_restore(sc);
  960. }
  961. memset(&txctl, 0, sizeof(struct ath_tx_control));
  962. txctl.txq = sc->tx.txq_map[skb_get_queue_mapping(skb)];
  963. ath_dbg(common, ATH_DBG_XMIT, "transmitting packet, skb: %p\n", skb);
  964. if (ath_tx_start(hw, skb, &txctl) != 0) {
  965. ath_dbg(common, ATH_DBG_XMIT, "TX failed\n");
  966. goto exit;
  967. }
  968. return;
  969. exit:
  970. dev_kfree_skb_any(skb);
  971. }
  972. static void ath9k_stop(struct ieee80211_hw *hw)
  973. {
  974. struct ath_softc *sc = hw->priv;
  975. struct ath_hw *ah = sc->sc_ah;
  976. struct ath_common *common = ath9k_hw_common(ah);
  977. mutex_lock(&sc->mutex);
  978. ath_cancel_work(sc);
  979. if (sc->sc_flags & SC_OP_INVALID) {
  980. ath_dbg(common, ATH_DBG_ANY, "Device not present\n");
  981. mutex_unlock(&sc->mutex);
  982. return;
  983. }
  984. /* Ensure HW is awake when we try to shut it down. */
  985. ath9k_ps_wakeup(sc);
  986. if (ah->btcoex_hw.enabled) {
  987. ath9k_hw_btcoex_disable(ah);
  988. if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
  989. ath9k_btcoex_timer_pause(sc);
  990. }
  991. spin_lock_bh(&sc->sc_pcu_lock);
  992. /* prevent tasklets to enable interrupts once we disable them */
  993. ah->imask &= ~ATH9K_INT_GLOBAL;
  994. /* make sure h/w will not generate any interrupt
  995. * before setting the invalid flag. */
  996. ath9k_hw_disable_interrupts(ah);
  997. if (!(sc->sc_flags & SC_OP_INVALID)) {
  998. ath_drain_all_txq(sc, false);
  999. ath_stoprecv(sc);
  1000. ath9k_hw_phy_disable(ah);
  1001. } else
  1002. sc->rx.rxlink = NULL;
  1003. if (sc->rx.frag) {
  1004. dev_kfree_skb_any(sc->rx.frag);
  1005. sc->rx.frag = NULL;
  1006. }
  1007. /* disable HAL and put h/w to sleep */
  1008. ath9k_hw_disable(ah);
  1009. spin_unlock_bh(&sc->sc_pcu_lock);
  1010. /* we can now sync irq and kill any running tasklets, since we already
  1011. * disabled interrupts and not holding a spin lock */
  1012. synchronize_irq(sc->irq);
  1013. tasklet_kill(&sc->intr_tq);
  1014. tasklet_kill(&sc->bcon_tasklet);
  1015. ath9k_ps_restore(sc);
  1016. sc->ps_idle = true;
  1017. ath_radio_disable(sc, hw);
  1018. sc->sc_flags |= SC_OP_INVALID;
  1019. mutex_unlock(&sc->mutex);
  1020. ath_dbg(common, ATH_DBG_CONFIG, "Driver halt\n");
  1021. }
  1022. bool ath9k_uses_beacons(int type)
  1023. {
  1024. switch (type) {
  1025. case NL80211_IFTYPE_AP:
  1026. case NL80211_IFTYPE_ADHOC:
  1027. case NL80211_IFTYPE_MESH_POINT:
  1028. return true;
  1029. default:
  1030. return false;
  1031. }
  1032. }
  1033. static void ath9k_reclaim_beacon(struct ath_softc *sc,
  1034. struct ieee80211_vif *vif)
  1035. {
  1036. struct ath_vif *avp = (void *)vif->drv_priv;
  1037. ath9k_set_beaconing_status(sc, false);
  1038. ath_beacon_return(sc, avp);
  1039. ath9k_set_beaconing_status(sc, true);
  1040. sc->sc_flags &= ~SC_OP_BEACONS;
  1041. }
  1042. static void ath9k_vif_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
  1043. {
  1044. struct ath9k_vif_iter_data *iter_data = data;
  1045. int i;
  1046. if (iter_data->hw_macaddr)
  1047. for (i = 0; i < ETH_ALEN; i++)
  1048. iter_data->mask[i] &=
  1049. ~(iter_data->hw_macaddr[i] ^ mac[i]);
  1050. switch (vif->type) {
  1051. case NL80211_IFTYPE_AP:
  1052. iter_data->naps++;
  1053. break;
  1054. case NL80211_IFTYPE_STATION:
  1055. iter_data->nstations++;
  1056. break;
  1057. case NL80211_IFTYPE_ADHOC:
  1058. iter_data->nadhocs++;
  1059. break;
  1060. case NL80211_IFTYPE_MESH_POINT:
  1061. iter_data->nmeshes++;
  1062. break;
  1063. case NL80211_IFTYPE_WDS:
  1064. iter_data->nwds++;
  1065. break;
  1066. default:
  1067. iter_data->nothers++;
  1068. break;
  1069. }
  1070. }
  1071. /* Called with sc->mutex held. */
  1072. void ath9k_calculate_iter_data(struct ieee80211_hw *hw,
  1073. struct ieee80211_vif *vif,
  1074. struct ath9k_vif_iter_data *iter_data)
  1075. {
  1076. struct ath_softc *sc = hw->priv;
  1077. struct ath_hw *ah = sc->sc_ah;
  1078. struct ath_common *common = ath9k_hw_common(ah);
  1079. /*
  1080. * Use the hardware MAC address as reference, the hardware uses it
  1081. * together with the BSSID mask when matching addresses.
  1082. */
  1083. memset(iter_data, 0, sizeof(*iter_data));
  1084. iter_data->hw_macaddr = common->macaddr;
  1085. memset(&iter_data->mask, 0xff, ETH_ALEN);
  1086. if (vif)
  1087. ath9k_vif_iter(iter_data, vif->addr, vif);
  1088. /* Get list of all active MAC addresses */
  1089. ieee80211_iterate_active_interfaces_atomic(sc->hw, ath9k_vif_iter,
  1090. iter_data);
  1091. }
  1092. /* Called with sc->mutex held. */
  1093. static void ath9k_calculate_summary_state(struct ieee80211_hw *hw,
  1094. struct ieee80211_vif *vif)
  1095. {
  1096. struct ath_softc *sc = hw->priv;
  1097. struct ath_hw *ah = sc->sc_ah;
  1098. struct ath_common *common = ath9k_hw_common(ah);
  1099. struct ath9k_vif_iter_data iter_data;
  1100. ath9k_calculate_iter_data(hw, vif, &iter_data);
  1101. /* Set BSSID mask. */
  1102. memcpy(common->bssidmask, iter_data.mask, ETH_ALEN);
  1103. ath_hw_setbssidmask(common);
  1104. /* Set op-mode & TSF */
  1105. if (iter_data.naps > 0) {
  1106. ath9k_hw_set_tsfadjust(ah, 1);
  1107. sc->sc_flags |= SC_OP_TSF_RESET;
  1108. ah->opmode = NL80211_IFTYPE_AP;
  1109. } else {
  1110. ath9k_hw_set_tsfadjust(ah, 0);
  1111. sc->sc_flags &= ~SC_OP_TSF_RESET;
  1112. if (iter_data.nmeshes)
  1113. ah->opmode = NL80211_IFTYPE_MESH_POINT;
  1114. else if (iter_data.nwds)
  1115. ah->opmode = NL80211_IFTYPE_AP;
  1116. else if (iter_data.nadhocs)
  1117. ah->opmode = NL80211_IFTYPE_ADHOC;
  1118. else
  1119. ah->opmode = NL80211_IFTYPE_STATION;
  1120. }
  1121. /*
  1122. * Enable MIB interrupts when there are hardware phy counters.
  1123. */
  1124. if ((iter_data.nstations + iter_data.nadhocs + iter_data.nmeshes) > 0) {
  1125. if (ah->config.enable_ani)
  1126. ah->imask |= ATH9K_INT_MIB;
  1127. ah->imask |= ATH9K_INT_TSFOOR;
  1128. } else {
  1129. ah->imask &= ~ATH9K_INT_MIB;
  1130. ah->imask &= ~ATH9K_INT_TSFOOR;
  1131. }
  1132. ath9k_hw_set_interrupts(ah, ah->imask);
  1133. /* Set up ANI */
  1134. if (iter_data.naps > 0) {
  1135. sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
  1136. if (!common->disable_ani) {
  1137. sc->sc_flags |= SC_OP_ANI_RUN;
  1138. ath_start_ani(common);
  1139. }
  1140. } else {
  1141. sc->sc_flags &= ~SC_OP_ANI_RUN;
  1142. del_timer_sync(&common->ani.timer);
  1143. }
  1144. }
  1145. /* Called with sc->mutex held, vif counts set up properly. */
  1146. static void ath9k_do_vif_add_setup(struct ieee80211_hw *hw,
  1147. struct ieee80211_vif *vif)
  1148. {
  1149. struct ath_softc *sc = hw->priv;
  1150. ath9k_calculate_summary_state(hw, vif);
  1151. if (ath9k_uses_beacons(vif->type)) {
  1152. int error;
  1153. /* This may fail because upper levels do not have beacons
  1154. * properly configured yet. That's OK, we assume it
  1155. * will be properly configured and then we will be notified
  1156. * in the info_changed method and set up beacons properly
  1157. * there.
  1158. */
  1159. ath9k_set_beaconing_status(sc, false);
  1160. error = ath_beacon_alloc(sc, vif);
  1161. if (!error)
  1162. ath_beacon_config(sc, vif);
  1163. ath9k_set_beaconing_status(sc, true);
  1164. }
  1165. }
  1166. static int ath9k_add_interface(struct ieee80211_hw *hw,
  1167. struct ieee80211_vif *vif)
  1168. {
  1169. struct ath_softc *sc = hw->priv;
  1170. struct ath_hw *ah = sc->sc_ah;
  1171. struct ath_common *common = ath9k_hw_common(ah);
  1172. int ret = 0;
  1173. ath9k_ps_wakeup(sc);
  1174. mutex_lock(&sc->mutex);
  1175. switch (vif->type) {
  1176. case NL80211_IFTYPE_STATION:
  1177. case NL80211_IFTYPE_WDS:
  1178. case NL80211_IFTYPE_ADHOC:
  1179. case NL80211_IFTYPE_AP:
  1180. case NL80211_IFTYPE_MESH_POINT:
  1181. break;
  1182. default:
  1183. ath_err(common, "Interface type %d not yet supported\n",
  1184. vif->type);
  1185. ret = -EOPNOTSUPP;
  1186. goto out;
  1187. }
  1188. if (ath9k_uses_beacons(vif->type)) {
  1189. if (sc->nbcnvifs >= ATH_BCBUF) {
  1190. ath_err(common, "Not enough beacon buffers when adding"
  1191. " new interface of type: %i\n",
  1192. vif->type);
  1193. ret = -ENOBUFS;
  1194. goto out;
  1195. }
  1196. }
  1197. if ((ah->opmode == NL80211_IFTYPE_ADHOC) ||
  1198. ((vif->type == NL80211_IFTYPE_ADHOC) &&
  1199. sc->nvifs > 0)) {
  1200. ath_err(common, "Cannot create ADHOC interface when other"
  1201. " interfaces already exist.\n");
  1202. ret = -EINVAL;
  1203. goto out;
  1204. }
  1205. ath_dbg(common, ATH_DBG_CONFIG,
  1206. "Attach a VIF of type: %d\n", vif->type);
  1207. sc->nvifs++;
  1208. ath9k_do_vif_add_setup(hw, vif);
  1209. out:
  1210. mutex_unlock(&sc->mutex);
  1211. ath9k_ps_restore(sc);
  1212. return ret;
  1213. }
  1214. static int ath9k_change_interface(struct ieee80211_hw *hw,
  1215. struct ieee80211_vif *vif,
  1216. enum nl80211_iftype new_type,
  1217. bool p2p)
  1218. {
  1219. struct ath_softc *sc = hw->priv;
  1220. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1221. int ret = 0;
  1222. ath_dbg(common, ATH_DBG_CONFIG, "Change Interface\n");
  1223. mutex_lock(&sc->mutex);
  1224. ath9k_ps_wakeup(sc);
  1225. /* See if new interface type is valid. */
  1226. if ((new_type == NL80211_IFTYPE_ADHOC) &&
  1227. (sc->nvifs > 1)) {
  1228. ath_err(common, "When using ADHOC, it must be the only"
  1229. " interface.\n");
  1230. ret = -EINVAL;
  1231. goto out;
  1232. }
  1233. if (ath9k_uses_beacons(new_type) &&
  1234. !ath9k_uses_beacons(vif->type)) {
  1235. if (sc->nbcnvifs >= ATH_BCBUF) {
  1236. ath_err(common, "No beacon slot available\n");
  1237. ret = -ENOBUFS;
  1238. goto out;
  1239. }
  1240. }
  1241. /* Clean up old vif stuff */
  1242. if (ath9k_uses_beacons(vif->type))
  1243. ath9k_reclaim_beacon(sc, vif);
  1244. /* Add new settings */
  1245. vif->type = new_type;
  1246. vif->p2p = p2p;
  1247. ath9k_do_vif_add_setup(hw, vif);
  1248. out:
  1249. ath9k_ps_restore(sc);
  1250. mutex_unlock(&sc->mutex);
  1251. return ret;
  1252. }
  1253. static void ath9k_remove_interface(struct ieee80211_hw *hw,
  1254. struct ieee80211_vif *vif)
  1255. {
  1256. struct ath_softc *sc = hw->priv;
  1257. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1258. ath_dbg(common, ATH_DBG_CONFIG, "Detach Interface\n");
  1259. ath9k_ps_wakeup(sc);
  1260. mutex_lock(&sc->mutex);
  1261. sc->nvifs--;
  1262. /* Reclaim beacon resources */
  1263. if (ath9k_uses_beacons(vif->type))
  1264. ath9k_reclaim_beacon(sc, vif);
  1265. ath9k_calculate_summary_state(hw, NULL);
  1266. mutex_unlock(&sc->mutex);
  1267. ath9k_ps_restore(sc);
  1268. }
  1269. static void ath9k_enable_ps(struct ath_softc *sc)
  1270. {
  1271. struct ath_hw *ah = sc->sc_ah;
  1272. sc->ps_enabled = true;
  1273. if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
  1274. if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
  1275. ah->imask |= ATH9K_INT_TIM_TIMER;
  1276. ath9k_hw_set_interrupts(ah, ah->imask);
  1277. }
  1278. ath9k_hw_setrxabort(ah, 1);
  1279. }
  1280. }
  1281. static void ath9k_disable_ps(struct ath_softc *sc)
  1282. {
  1283. struct ath_hw *ah = sc->sc_ah;
  1284. sc->ps_enabled = false;
  1285. ath9k_hw_setpower(ah, ATH9K_PM_AWAKE);
  1286. if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
  1287. ath9k_hw_setrxabort(ah, 0);
  1288. sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
  1289. PS_WAIT_FOR_CAB |
  1290. PS_WAIT_FOR_PSPOLL_DATA |
  1291. PS_WAIT_FOR_TX_ACK);
  1292. if (ah->imask & ATH9K_INT_TIM_TIMER) {
  1293. ah->imask &= ~ATH9K_INT_TIM_TIMER;
  1294. ath9k_hw_set_interrupts(ah, ah->imask);
  1295. }
  1296. }
  1297. }
  1298. static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
  1299. {
  1300. struct ath_softc *sc = hw->priv;
  1301. struct ath_hw *ah = sc->sc_ah;
  1302. struct ath_common *common = ath9k_hw_common(ah);
  1303. struct ieee80211_conf *conf = &hw->conf;
  1304. bool disable_radio = false;
  1305. mutex_lock(&sc->mutex);
  1306. /*
  1307. * Leave this as the first check because we need to turn on the
  1308. * radio if it was disabled before prior to processing the rest
  1309. * of the changes. Likewise we must only disable the radio towards
  1310. * the end.
  1311. */
  1312. if (changed & IEEE80211_CONF_CHANGE_IDLE) {
  1313. sc->ps_idle = !!(conf->flags & IEEE80211_CONF_IDLE);
  1314. if (!sc->ps_idle) {
  1315. ath_radio_enable(sc, hw);
  1316. ath_dbg(common, ATH_DBG_CONFIG,
  1317. "not-idle: enabling radio\n");
  1318. } else {
  1319. disable_radio = true;
  1320. }
  1321. }
  1322. /*
  1323. * We just prepare to enable PS. We have to wait until our AP has
  1324. * ACK'd our null data frame to disable RX otherwise we'll ignore
  1325. * those ACKs and end up retransmitting the same null data frames.
  1326. * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
  1327. */
  1328. if (changed & IEEE80211_CONF_CHANGE_PS) {
  1329. unsigned long flags;
  1330. spin_lock_irqsave(&sc->sc_pm_lock, flags);
  1331. if (conf->flags & IEEE80211_CONF_PS)
  1332. ath9k_enable_ps(sc);
  1333. else
  1334. ath9k_disable_ps(sc);
  1335. spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  1336. }
  1337. if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
  1338. if (conf->flags & IEEE80211_CONF_MONITOR) {
  1339. ath_dbg(common, ATH_DBG_CONFIG,
  1340. "Monitor mode is enabled\n");
  1341. sc->sc_ah->is_monitoring = true;
  1342. } else {
  1343. ath_dbg(common, ATH_DBG_CONFIG,
  1344. "Monitor mode is disabled\n");
  1345. sc->sc_ah->is_monitoring = false;
  1346. }
  1347. }
  1348. if (changed & IEEE80211_CONF_CHANGE_CHANNEL) {
  1349. struct ieee80211_channel *curchan = hw->conf.channel;
  1350. struct ath9k_channel old_chan;
  1351. int pos = curchan->hw_value;
  1352. int old_pos = -1;
  1353. unsigned long flags;
  1354. if (ah->curchan)
  1355. old_pos = ah->curchan - &ah->channels[0];
  1356. if (hw->conf.flags & IEEE80211_CONF_OFFCHANNEL)
  1357. sc->sc_flags |= SC_OP_OFFCHANNEL;
  1358. else
  1359. sc->sc_flags &= ~SC_OP_OFFCHANNEL;
  1360. ath_dbg(common, ATH_DBG_CONFIG,
  1361. "Set channel: %d MHz type: %d\n",
  1362. curchan->center_freq, conf->channel_type);
  1363. /* update survey stats for the old channel before switching */
  1364. spin_lock_irqsave(&common->cc_lock, flags);
  1365. ath_update_survey_stats(sc);
  1366. spin_unlock_irqrestore(&common->cc_lock, flags);
  1367. /*
  1368. * Preserve the current channel values, before updating
  1369. * the same channel
  1370. */
  1371. if (old_pos == pos) {
  1372. memcpy(&old_chan, &sc->sc_ah->channels[pos],
  1373. sizeof(struct ath9k_channel));
  1374. ah->curchan = &old_chan;
  1375. }
  1376. ath9k_cmn_update_ichannel(&sc->sc_ah->channels[pos],
  1377. curchan, conf->channel_type);
  1378. /*
  1379. * If the operating channel changes, change the survey in-use flags
  1380. * along with it.
  1381. * Reset the survey data for the new channel, unless we're switching
  1382. * back to the operating channel from an off-channel operation.
  1383. */
  1384. if (!(hw->conf.flags & IEEE80211_CONF_OFFCHANNEL) &&
  1385. sc->cur_survey != &sc->survey[pos]) {
  1386. if (sc->cur_survey)
  1387. sc->cur_survey->filled &= ~SURVEY_INFO_IN_USE;
  1388. sc->cur_survey = &sc->survey[pos];
  1389. memset(sc->cur_survey, 0, sizeof(struct survey_info));
  1390. sc->cur_survey->filled |= SURVEY_INFO_IN_USE;
  1391. } else if (!(sc->survey[pos].filled & SURVEY_INFO_IN_USE)) {
  1392. memset(&sc->survey[pos], 0, sizeof(struct survey_info));
  1393. }
  1394. if (ath_set_channel(sc, hw, &sc->sc_ah->channels[pos]) < 0) {
  1395. ath_err(common, "Unable to set channel\n");
  1396. mutex_unlock(&sc->mutex);
  1397. return -EINVAL;
  1398. }
  1399. /*
  1400. * The most recent snapshot of channel->noisefloor for the old
  1401. * channel is only available after the hardware reset. Copy it to
  1402. * the survey stats now.
  1403. */
  1404. if (old_pos >= 0)
  1405. ath_update_survey_nf(sc, old_pos);
  1406. }
  1407. if (changed & IEEE80211_CONF_CHANGE_POWER) {
  1408. ath_dbg(common, ATH_DBG_CONFIG,
  1409. "Set power: %d\n", conf->power_level);
  1410. sc->config.txpowlimit = 2 * conf->power_level;
  1411. ath9k_ps_wakeup(sc);
  1412. ath9k_cmn_update_txpow(ah, sc->curtxpow,
  1413. sc->config.txpowlimit, &sc->curtxpow);
  1414. ath9k_ps_restore(sc);
  1415. }
  1416. if (disable_radio) {
  1417. ath_dbg(common, ATH_DBG_CONFIG, "idle: disabling radio\n");
  1418. ath_radio_disable(sc, hw);
  1419. }
  1420. mutex_unlock(&sc->mutex);
  1421. return 0;
  1422. }
  1423. #define SUPPORTED_FILTERS \
  1424. (FIF_PROMISC_IN_BSS | \
  1425. FIF_ALLMULTI | \
  1426. FIF_CONTROL | \
  1427. FIF_PSPOLL | \
  1428. FIF_OTHER_BSS | \
  1429. FIF_BCN_PRBRESP_PROMISC | \
  1430. FIF_PROBE_REQ | \
  1431. FIF_FCSFAIL)
  1432. /* FIXME: sc->sc_full_reset ? */
  1433. static void ath9k_configure_filter(struct ieee80211_hw *hw,
  1434. unsigned int changed_flags,
  1435. unsigned int *total_flags,
  1436. u64 multicast)
  1437. {
  1438. struct ath_softc *sc = hw->priv;
  1439. u32 rfilt;
  1440. changed_flags &= SUPPORTED_FILTERS;
  1441. *total_flags &= SUPPORTED_FILTERS;
  1442. sc->rx.rxfilter = *total_flags;
  1443. ath9k_ps_wakeup(sc);
  1444. rfilt = ath_calcrxfilter(sc);
  1445. ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
  1446. ath9k_ps_restore(sc);
  1447. ath_dbg(ath9k_hw_common(sc->sc_ah), ATH_DBG_CONFIG,
  1448. "Set HW RX filter: 0x%x\n", rfilt);
  1449. }
  1450. static int ath9k_sta_add(struct ieee80211_hw *hw,
  1451. struct ieee80211_vif *vif,
  1452. struct ieee80211_sta *sta)
  1453. {
  1454. struct ath_softc *sc = hw->priv;
  1455. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1456. struct ath_node *an = (struct ath_node *) sta->drv_priv;
  1457. struct ieee80211_key_conf ps_key = { };
  1458. ath_node_attach(sc, sta);
  1459. if (vif->type != NL80211_IFTYPE_AP &&
  1460. vif->type != NL80211_IFTYPE_AP_VLAN)
  1461. return 0;
  1462. an->ps_key = ath_key_config(common, vif, sta, &ps_key);
  1463. return 0;
  1464. }
  1465. static void ath9k_del_ps_key(struct ath_softc *sc,
  1466. struct ieee80211_vif *vif,
  1467. struct ieee80211_sta *sta)
  1468. {
  1469. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1470. struct ath_node *an = (struct ath_node *) sta->drv_priv;
  1471. struct ieee80211_key_conf ps_key = { .hw_key_idx = an->ps_key };
  1472. if (!an->ps_key)
  1473. return;
  1474. ath_key_delete(common, &ps_key);
  1475. }
  1476. static int ath9k_sta_remove(struct ieee80211_hw *hw,
  1477. struct ieee80211_vif *vif,
  1478. struct ieee80211_sta *sta)
  1479. {
  1480. struct ath_softc *sc = hw->priv;
  1481. ath9k_del_ps_key(sc, vif, sta);
  1482. ath_node_detach(sc, sta);
  1483. return 0;
  1484. }
  1485. static void ath9k_sta_notify(struct ieee80211_hw *hw,
  1486. struct ieee80211_vif *vif,
  1487. enum sta_notify_cmd cmd,
  1488. struct ieee80211_sta *sta)
  1489. {
  1490. struct ath_softc *sc = hw->priv;
  1491. struct ath_node *an = (struct ath_node *) sta->drv_priv;
  1492. switch (cmd) {
  1493. case STA_NOTIFY_SLEEP:
  1494. an->sleeping = true;
  1495. if (ath_tx_aggr_sleep(sc, an))
  1496. ieee80211_sta_set_tim(sta);
  1497. break;
  1498. case STA_NOTIFY_AWAKE:
  1499. an->sleeping = false;
  1500. ath_tx_aggr_wakeup(sc, an);
  1501. break;
  1502. }
  1503. }
  1504. static int ath9k_conf_tx(struct ieee80211_hw *hw, u16 queue,
  1505. const struct ieee80211_tx_queue_params *params)
  1506. {
  1507. struct ath_softc *sc = hw->priv;
  1508. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1509. struct ath_txq *txq;
  1510. struct ath9k_tx_queue_info qi;
  1511. int ret = 0;
  1512. if (queue >= WME_NUM_AC)
  1513. return 0;
  1514. txq = sc->tx.txq_map[queue];
  1515. ath9k_ps_wakeup(sc);
  1516. mutex_lock(&sc->mutex);
  1517. memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
  1518. qi.tqi_aifs = params->aifs;
  1519. qi.tqi_cwmin = params->cw_min;
  1520. qi.tqi_cwmax = params->cw_max;
  1521. qi.tqi_burstTime = params->txop;
  1522. ath_dbg(common, ATH_DBG_CONFIG,
  1523. "Configure tx [queue/halq] [%d/%d], aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
  1524. queue, txq->axq_qnum, params->aifs, params->cw_min,
  1525. params->cw_max, params->txop);
  1526. ret = ath_txq_update(sc, txq->axq_qnum, &qi);
  1527. if (ret)
  1528. ath_err(common, "TXQ Update failed\n");
  1529. if (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC)
  1530. if (queue == WME_AC_BE && !ret)
  1531. ath_beaconq_config(sc);
  1532. mutex_unlock(&sc->mutex);
  1533. ath9k_ps_restore(sc);
  1534. return ret;
  1535. }
  1536. static int ath9k_set_key(struct ieee80211_hw *hw,
  1537. enum set_key_cmd cmd,
  1538. struct ieee80211_vif *vif,
  1539. struct ieee80211_sta *sta,
  1540. struct ieee80211_key_conf *key)
  1541. {
  1542. struct ath_softc *sc = hw->priv;
  1543. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1544. int ret = 0;
  1545. if (ath9k_modparam_nohwcrypt)
  1546. return -ENOSPC;
  1547. if (vif->type == NL80211_IFTYPE_ADHOC &&
  1548. (key->cipher == WLAN_CIPHER_SUITE_TKIP ||
  1549. key->cipher == WLAN_CIPHER_SUITE_CCMP) &&
  1550. !(key->flags & IEEE80211_KEY_FLAG_PAIRWISE)) {
  1551. /*
  1552. * For now, disable hw crypto for the RSN IBSS group keys. This
  1553. * could be optimized in the future to use a modified key cache
  1554. * design to support per-STA RX GTK, but until that gets
  1555. * implemented, use of software crypto for group addressed
  1556. * frames is a acceptable to allow RSN IBSS to be used.
  1557. */
  1558. return -EOPNOTSUPP;
  1559. }
  1560. mutex_lock(&sc->mutex);
  1561. ath9k_ps_wakeup(sc);
  1562. ath_dbg(common, ATH_DBG_CONFIG, "Set HW Key\n");
  1563. switch (cmd) {
  1564. case SET_KEY:
  1565. if (sta)
  1566. ath9k_del_ps_key(sc, vif, sta);
  1567. ret = ath_key_config(common, vif, sta, key);
  1568. if (ret >= 0) {
  1569. key->hw_key_idx = ret;
  1570. /* push IV and Michael MIC generation to stack */
  1571. key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
  1572. if (key->cipher == WLAN_CIPHER_SUITE_TKIP)
  1573. key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
  1574. if (sc->sc_ah->sw_mgmt_crypto &&
  1575. key->cipher == WLAN_CIPHER_SUITE_CCMP)
  1576. key->flags |= IEEE80211_KEY_FLAG_SW_MGMT;
  1577. ret = 0;
  1578. }
  1579. break;
  1580. case DISABLE_KEY:
  1581. ath_key_delete(common, key);
  1582. break;
  1583. default:
  1584. ret = -EINVAL;
  1585. }
  1586. ath9k_ps_restore(sc);
  1587. mutex_unlock(&sc->mutex);
  1588. return ret;
  1589. }
  1590. static void ath9k_bss_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
  1591. {
  1592. struct ath_softc *sc = data;
  1593. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1594. struct ieee80211_bss_conf *bss_conf = &vif->bss_conf;
  1595. struct ath_vif *avp = (void *)vif->drv_priv;
  1596. /*
  1597. * Skip iteration if primary station vif's bss info
  1598. * was not changed
  1599. */
  1600. if (sc->sc_flags & SC_OP_PRIM_STA_VIF)
  1601. return;
  1602. if (bss_conf->assoc) {
  1603. sc->sc_flags |= SC_OP_PRIM_STA_VIF;
  1604. avp->primary_sta_vif = true;
  1605. memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
  1606. common->curaid = bss_conf->aid;
  1607. ath9k_hw_write_associd(sc->sc_ah);
  1608. ath_dbg(common, ATH_DBG_CONFIG,
  1609. "Bss Info ASSOC %d, bssid: %pM\n",
  1610. bss_conf->aid, common->curbssid);
  1611. ath_beacon_config(sc, vif);
  1612. /*
  1613. * Request a re-configuration of Beacon related timers
  1614. * on the receipt of the first Beacon frame (i.e.,
  1615. * after time sync with the AP).
  1616. */
  1617. sc->ps_flags |= PS_BEACON_SYNC | PS_WAIT_FOR_BEACON;
  1618. /* Reset rssi stats */
  1619. sc->last_rssi = ATH_RSSI_DUMMY_MARKER;
  1620. sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
  1621. if (!common->disable_ani) {
  1622. sc->sc_flags |= SC_OP_ANI_RUN;
  1623. ath_start_ani(common);
  1624. }
  1625. }
  1626. }
  1627. static void ath9k_config_bss(struct ath_softc *sc, struct ieee80211_vif *vif)
  1628. {
  1629. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1630. struct ieee80211_bss_conf *bss_conf = &vif->bss_conf;
  1631. struct ath_vif *avp = (void *)vif->drv_priv;
  1632. if (sc->sc_ah->opmode != NL80211_IFTYPE_STATION)
  1633. return;
  1634. /* Reconfigure bss info */
  1635. if (avp->primary_sta_vif && !bss_conf->assoc) {
  1636. ath_dbg(common, ATH_DBG_CONFIG,
  1637. "Bss Info DISASSOC %d, bssid %pM\n",
  1638. common->curaid, common->curbssid);
  1639. sc->sc_flags &= ~(SC_OP_PRIM_STA_VIF | SC_OP_BEACONS);
  1640. avp->primary_sta_vif = false;
  1641. memset(common->curbssid, 0, ETH_ALEN);
  1642. common->curaid = 0;
  1643. }
  1644. ieee80211_iterate_active_interfaces_atomic(
  1645. sc->hw, ath9k_bss_iter, sc);
  1646. /*
  1647. * None of station vifs are associated.
  1648. * Clear bssid & aid
  1649. */
  1650. if (!(sc->sc_flags & SC_OP_PRIM_STA_VIF)) {
  1651. ath9k_hw_write_associd(sc->sc_ah);
  1652. /* Stop ANI */
  1653. sc->sc_flags &= ~SC_OP_ANI_RUN;
  1654. del_timer_sync(&common->ani.timer);
  1655. }
  1656. }
  1657. static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
  1658. struct ieee80211_vif *vif,
  1659. struct ieee80211_bss_conf *bss_conf,
  1660. u32 changed)
  1661. {
  1662. struct ath_softc *sc = hw->priv;
  1663. struct ath_hw *ah = sc->sc_ah;
  1664. struct ath_common *common = ath9k_hw_common(ah);
  1665. struct ath_vif *avp = (void *)vif->drv_priv;
  1666. int slottime;
  1667. int error;
  1668. ath9k_ps_wakeup(sc);
  1669. mutex_lock(&sc->mutex);
  1670. if (changed & BSS_CHANGED_BSSID) {
  1671. ath9k_config_bss(sc, vif);
  1672. ath_dbg(common, ATH_DBG_CONFIG, "BSSID: %pM aid: 0x%x\n",
  1673. common->curbssid, common->curaid);
  1674. }
  1675. if (changed & BSS_CHANGED_IBSS) {
  1676. /* There can be only one vif available */
  1677. memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
  1678. common->curaid = bss_conf->aid;
  1679. ath9k_hw_write_associd(sc->sc_ah);
  1680. if (bss_conf->ibss_joined) {
  1681. sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
  1682. if (!common->disable_ani) {
  1683. sc->sc_flags |= SC_OP_ANI_RUN;
  1684. ath_start_ani(common);
  1685. }
  1686. } else {
  1687. sc->sc_flags &= ~SC_OP_ANI_RUN;
  1688. del_timer_sync(&common->ani.timer);
  1689. }
  1690. }
  1691. /* Enable transmission of beacons (AP, IBSS, MESH) */
  1692. if ((changed & BSS_CHANGED_BEACON) ||
  1693. ((changed & BSS_CHANGED_BEACON_ENABLED) && bss_conf->enable_beacon)) {
  1694. ath9k_set_beaconing_status(sc, false);
  1695. error = ath_beacon_alloc(sc, vif);
  1696. if (!error)
  1697. ath_beacon_config(sc, vif);
  1698. ath9k_set_beaconing_status(sc, true);
  1699. }
  1700. if (changed & BSS_CHANGED_ERP_SLOT) {
  1701. if (bss_conf->use_short_slot)
  1702. slottime = 9;
  1703. else
  1704. slottime = 20;
  1705. if (vif->type == NL80211_IFTYPE_AP) {
  1706. /*
  1707. * Defer update, so that connected stations can adjust
  1708. * their settings at the same time.
  1709. * See beacon.c for more details
  1710. */
  1711. sc->beacon.slottime = slottime;
  1712. sc->beacon.updateslot = UPDATE;
  1713. } else {
  1714. ah->slottime = slottime;
  1715. ath9k_hw_init_global_settings(ah);
  1716. }
  1717. }
  1718. /* Disable transmission of beacons */
  1719. if ((changed & BSS_CHANGED_BEACON_ENABLED) &&
  1720. !bss_conf->enable_beacon) {
  1721. ath9k_set_beaconing_status(sc, false);
  1722. avp->is_bslot_active = false;
  1723. ath9k_set_beaconing_status(sc, true);
  1724. }
  1725. if (changed & BSS_CHANGED_BEACON_INT) {
  1726. /*
  1727. * In case of AP mode, the HW TSF has to be reset
  1728. * when the beacon interval changes.
  1729. */
  1730. if (vif->type == NL80211_IFTYPE_AP) {
  1731. sc->sc_flags |= SC_OP_TSF_RESET;
  1732. ath9k_set_beaconing_status(sc, false);
  1733. error = ath_beacon_alloc(sc, vif);
  1734. if (!error)
  1735. ath_beacon_config(sc, vif);
  1736. ath9k_set_beaconing_status(sc, true);
  1737. } else
  1738. ath_beacon_config(sc, vif);
  1739. }
  1740. if (changed & BSS_CHANGED_ERP_PREAMBLE) {
  1741. ath_dbg(common, ATH_DBG_CONFIG, "BSS Changed PREAMBLE %d\n",
  1742. bss_conf->use_short_preamble);
  1743. if (bss_conf->use_short_preamble)
  1744. sc->sc_flags |= SC_OP_PREAMBLE_SHORT;
  1745. else
  1746. sc->sc_flags &= ~SC_OP_PREAMBLE_SHORT;
  1747. }
  1748. if (changed & BSS_CHANGED_ERP_CTS_PROT) {
  1749. ath_dbg(common, ATH_DBG_CONFIG, "BSS Changed CTS PROT %d\n",
  1750. bss_conf->use_cts_prot);
  1751. if (bss_conf->use_cts_prot &&
  1752. hw->conf.channel->band != IEEE80211_BAND_5GHZ)
  1753. sc->sc_flags |= SC_OP_PROTECT_ENABLE;
  1754. else
  1755. sc->sc_flags &= ~SC_OP_PROTECT_ENABLE;
  1756. }
  1757. mutex_unlock(&sc->mutex);
  1758. ath9k_ps_restore(sc);
  1759. }
  1760. static u64 ath9k_get_tsf(struct ieee80211_hw *hw)
  1761. {
  1762. struct ath_softc *sc = hw->priv;
  1763. u64 tsf;
  1764. mutex_lock(&sc->mutex);
  1765. ath9k_ps_wakeup(sc);
  1766. tsf = ath9k_hw_gettsf64(sc->sc_ah);
  1767. ath9k_ps_restore(sc);
  1768. mutex_unlock(&sc->mutex);
  1769. return tsf;
  1770. }
  1771. static void ath9k_set_tsf(struct ieee80211_hw *hw, u64 tsf)
  1772. {
  1773. struct ath_softc *sc = hw->priv;
  1774. mutex_lock(&sc->mutex);
  1775. ath9k_ps_wakeup(sc);
  1776. ath9k_hw_settsf64(sc->sc_ah, tsf);
  1777. ath9k_ps_restore(sc);
  1778. mutex_unlock(&sc->mutex);
  1779. }
  1780. static void ath9k_reset_tsf(struct ieee80211_hw *hw)
  1781. {
  1782. struct ath_softc *sc = hw->priv;
  1783. mutex_lock(&sc->mutex);
  1784. ath9k_ps_wakeup(sc);
  1785. ath9k_hw_reset_tsf(sc->sc_ah);
  1786. ath9k_ps_restore(sc);
  1787. mutex_unlock(&sc->mutex);
  1788. }
  1789. static int ath9k_ampdu_action(struct ieee80211_hw *hw,
  1790. struct ieee80211_vif *vif,
  1791. enum ieee80211_ampdu_mlme_action action,
  1792. struct ieee80211_sta *sta,
  1793. u16 tid, u16 *ssn, u8 buf_size)
  1794. {
  1795. struct ath_softc *sc = hw->priv;
  1796. int ret = 0;
  1797. local_bh_disable();
  1798. switch (action) {
  1799. case IEEE80211_AMPDU_RX_START:
  1800. if (!(sc->sc_flags & SC_OP_RXAGGR))
  1801. ret = -ENOTSUPP;
  1802. break;
  1803. case IEEE80211_AMPDU_RX_STOP:
  1804. break;
  1805. case IEEE80211_AMPDU_TX_START:
  1806. if (!(sc->sc_flags & SC_OP_TXAGGR))
  1807. return -EOPNOTSUPP;
  1808. ath9k_ps_wakeup(sc);
  1809. ret = ath_tx_aggr_start(sc, sta, tid, ssn);
  1810. if (!ret)
  1811. ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
  1812. ath9k_ps_restore(sc);
  1813. break;
  1814. case IEEE80211_AMPDU_TX_STOP:
  1815. ath9k_ps_wakeup(sc);
  1816. ath_tx_aggr_stop(sc, sta, tid);
  1817. ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
  1818. ath9k_ps_restore(sc);
  1819. break;
  1820. case IEEE80211_AMPDU_TX_OPERATIONAL:
  1821. ath9k_ps_wakeup(sc);
  1822. ath_tx_aggr_resume(sc, sta, tid);
  1823. ath9k_ps_restore(sc);
  1824. break;
  1825. default:
  1826. ath_err(ath9k_hw_common(sc->sc_ah), "Unknown AMPDU action\n");
  1827. }
  1828. local_bh_enable();
  1829. return ret;
  1830. }
  1831. static int ath9k_get_survey(struct ieee80211_hw *hw, int idx,
  1832. struct survey_info *survey)
  1833. {
  1834. struct ath_softc *sc = hw->priv;
  1835. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1836. struct ieee80211_supported_band *sband;
  1837. struct ieee80211_channel *chan;
  1838. unsigned long flags;
  1839. int pos;
  1840. spin_lock_irqsave(&common->cc_lock, flags);
  1841. if (idx == 0)
  1842. ath_update_survey_stats(sc);
  1843. sband = hw->wiphy->bands[IEEE80211_BAND_2GHZ];
  1844. if (sband && idx >= sband->n_channels) {
  1845. idx -= sband->n_channels;
  1846. sband = NULL;
  1847. }
  1848. if (!sband)
  1849. sband = hw->wiphy->bands[IEEE80211_BAND_5GHZ];
  1850. if (!sband || idx >= sband->n_channels) {
  1851. spin_unlock_irqrestore(&common->cc_lock, flags);
  1852. return -ENOENT;
  1853. }
  1854. chan = &sband->channels[idx];
  1855. pos = chan->hw_value;
  1856. memcpy(survey, &sc->survey[pos], sizeof(*survey));
  1857. survey->channel = chan;
  1858. spin_unlock_irqrestore(&common->cc_lock, flags);
  1859. return 0;
  1860. }
  1861. static void ath9k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class)
  1862. {
  1863. struct ath_softc *sc = hw->priv;
  1864. struct ath_hw *ah = sc->sc_ah;
  1865. mutex_lock(&sc->mutex);
  1866. ah->coverage_class = coverage_class;
  1867. ath9k_hw_init_global_settings(ah);
  1868. mutex_unlock(&sc->mutex);
  1869. }
  1870. static void ath9k_flush(struct ieee80211_hw *hw, bool drop)
  1871. {
  1872. struct ath_softc *sc = hw->priv;
  1873. struct ath_hw *ah = sc->sc_ah;
  1874. struct ath_common *common = ath9k_hw_common(ah);
  1875. int timeout = 200; /* ms */
  1876. int i, j;
  1877. bool drain_txq;
  1878. mutex_lock(&sc->mutex);
  1879. cancel_delayed_work_sync(&sc->tx_complete_work);
  1880. if (sc->sc_flags & SC_OP_INVALID) {
  1881. ath_dbg(common, ATH_DBG_ANY, "Device not present\n");
  1882. mutex_unlock(&sc->mutex);
  1883. return;
  1884. }
  1885. if (drop)
  1886. timeout = 1;
  1887. for (j = 0; j < timeout; j++) {
  1888. bool npend = false;
  1889. if (j)
  1890. usleep_range(1000, 2000);
  1891. for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
  1892. if (!ATH_TXQ_SETUP(sc, i))
  1893. continue;
  1894. npend = ath9k_has_pending_frames(sc, &sc->tx.txq[i]);
  1895. if (npend)
  1896. break;
  1897. }
  1898. if (!npend)
  1899. goto out;
  1900. }
  1901. ath9k_ps_wakeup(sc);
  1902. spin_lock_bh(&sc->sc_pcu_lock);
  1903. drain_txq = ath_drain_all_txq(sc, false);
  1904. spin_unlock_bh(&sc->sc_pcu_lock);
  1905. if (!drain_txq)
  1906. ath_reset(sc, false);
  1907. ath9k_ps_restore(sc);
  1908. ieee80211_wake_queues(hw);
  1909. out:
  1910. ieee80211_queue_delayed_work(hw, &sc->tx_complete_work, 0);
  1911. mutex_unlock(&sc->mutex);
  1912. }
  1913. static bool ath9k_tx_frames_pending(struct ieee80211_hw *hw)
  1914. {
  1915. struct ath_softc *sc = hw->priv;
  1916. int i;
  1917. for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
  1918. if (!ATH_TXQ_SETUP(sc, i))
  1919. continue;
  1920. if (ath9k_has_pending_frames(sc, &sc->tx.txq[i]))
  1921. return true;
  1922. }
  1923. return false;
  1924. }
  1925. static int ath9k_tx_last_beacon(struct ieee80211_hw *hw)
  1926. {
  1927. struct ath_softc *sc = hw->priv;
  1928. struct ath_hw *ah = sc->sc_ah;
  1929. struct ieee80211_vif *vif;
  1930. struct ath_vif *avp;
  1931. struct ath_buf *bf;
  1932. struct ath_tx_status ts;
  1933. int status;
  1934. vif = sc->beacon.bslot[0];
  1935. if (!vif)
  1936. return 0;
  1937. avp = (void *)vif->drv_priv;
  1938. if (!avp->is_bslot_active)
  1939. return 0;
  1940. if (!sc->beacon.tx_processed) {
  1941. tasklet_disable(&sc->bcon_tasklet);
  1942. bf = avp->av_bcbuf;
  1943. if (!bf || !bf->bf_mpdu)
  1944. goto skip;
  1945. status = ath9k_hw_txprocdesc(ah, bf->bf_desc, &ts);
  1946. if (status == -EINPROGRESS)
  1947. goto skip;
  1948. sc->beacon.tx_processed = true;
  1949. sc->beacon.tx_last = !(ts.ts_status & ATH9K_TXERR_MASK);
  1950. skip:
  1951. tasklet_enable(&sc->bcon_tasklet);
  1952. }
  1953. return sc->beacon.tx_last;
  1954. }
  1955. static int ath9k_get_stats(struct ieee80211_hw *hw,
  1956. struct ieee80211_low_level_stats *stats)
  1957. {
  1958. struct ath_softc *sc = hw->priv;
  1959. struct ath_hw *ah = sc->sc_ah;
  1960. struct ath9k_mib_stats *mib_stats = &ah->ah_mibStats;
  1961. stats->dot11ACKFailureCount = mib_stats->ackrcv_bad;
  1962. stats->dot11RTSFailureCount = mib_stats->rts_bad;
  1963. stats->dot11FCSErrorCount = mib_stats->fcs_bad;
  1964. stats->dot11RTSSuccessCount = mib_stats->rts_good;
  1965. return 0;
  1966. }
  1967. static u32 fill_chainmask(u32 cap, u32 new)
  1968. {
  1969. u32 filled = 0;
  1970. int i;
  1971. for (i = 0; cap && new; i++, cap >>= 1) {
  1972. if (!(cap & BIT(0)))
  1973. continue;
  1974. if (new & BIT(0))
  1975. filled |= BIT(i);
  1976. new >>= 1;
  1977. }
  1978. return filled;
  1979. }
  1980. static int ath9k_set_antenna(struct ieee80211_hw *hw, u32 tx_ant, u32 rx_ant)
  1981. {
  1982. struct ath_softc *sc = hw->priv;
  1983. struct ath_hw *ah = sc->sc_ah;
  1984. if (!rx_ant || !tx_ant)
  1985. return -EINVAL;
  1986. sc->ant_rx = rx_ant;
  1987. sc->ant_tx = tx_ant;
  1988. if (ah->caps.rx_chainmask == 1)
  1989. return 0;
  1990. /* AR9100 runs into calibration issues if not all rx chains are enabled */
  1991. if (AR_SREV_9100(ah))
  1992. ah->rxchainmask = 0x7;
  1993. else
  1994. ah->rxchainmask = fill_chainmask(ah->caps.rx_chainmask, rx_ant);
  1995. ah->txchainmask = fill_chainmask(ah->caps.tx_chainmask, tx_ant);
  1996. ath9k_reload_chainmask_settings(sc);
  1997. return 0;
  1998. }
  1999. static int ath9k_get_antenna(struct ieee80211_hw *hw, u32 *tx_ant, u32 *rx_ant)
  2000. {
  2001. struct ath_softc *sc = hw->priv;
  2002. *tx_ant = sc->ant_tx;
  2003. *rx_ant = sc->ant_rx;
  2004. return 0;
  2005. }
  2006. struct ieee80211_ops ath9k_ops = {
  2007. .tx = ath9k_tx,
  2008. .start = ath9k_start,
  2009. .stop = ath9k_stop,
  2010. .add_interface = ath9k_add_interface,
  2011. .change_interface = ath9k_change_interface,
  2012. .remove_interface = ath9k_remove_interface,
  2013. .config = ath9k_config,
  2014. .configure_filter = ath9k_configure_filter,
  2015. .sta_add = ath9k_sta_add,
  2016. .sta_remove = ath9k_sta_remove,
  2017. .sta_notify = ath9k_sta_notify,
  2018. .conf_tx = ath9k_conf_tx,
  2019. .bss_info_changed = ath9k_bss_info_changed,
  2020. .set_key = ath9k_set_key,
  2021. .get_tsf = ath9k_get_tsf,
  2022. .set_tsf = ath9k_set_tsf,
  2023. .reset_tsf = ath9k_reset_tsf,
  2024. .ampdu_action = ath9k_ampdu_action,
  2025. .get_survey = ath9k_get_survey,
  2026. .rfkill_poll = ath9k_rfkill_poll_state,
  2027. .set_coverage_class = ath9k_set_coverage_class,
  2028. .flush = ath9k_flush,
  2029. .tx_frames_pending = ath9k_tx_frames_pending,
  2030. .tx_last_beacon = ath9k_tx_last_beacon,
  2031. .get_stats = ath9k_get_stats,
  2032. .set_antenna = ath9k_set_antenna,
  2033. .get_antenna = ath9k_get_antenna,
  2034. };