rt2x00queue.c 21 KB

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  1. /*
  2. Copyright (C) 2004 - 2009 rt2x00 SourceForge Project
  3. <http://rt2x00.serialmonkey.com>
  4. This program is free software; you can redistribute it and/or modify
  5. it under the terms of the GNU General Public License as published by
  6. the Free Software Foundation; either version 2 of the License, or
  7. (at your option) any later version.
  8. This program is distributed in the hope that it will be useful,
  9. but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. GNU General Public License for more details.
  12. You should have received a copy of the GNU General Public License
  13. along with this program; if not, write to the
  14. Free Software Foundation, Inc.,
  15. 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  16. */
  17. /*
  18. Module: rt2x00lib
  19. Abstract: rt2x00 queue specific routines.
  20. */
  21. #include <linux/kernel.h>
  22. #include <linux/module.h>
  23. #include <linux/dma-mapping.h>
  24. #include "rt2x00.h"
  25. #include "rt2x00lib.h"
  26. struct sk_buff *rt2x00queue_alloc_rxskb(struct rt2x00_dev *rt2x00dev,
  27. struct queue_entry *entry)
  28. {
  29. struct sk_buff *skb;
  30. struct skb_frame_desc *skbdesc;
  31. unsigned int frame_size;
  32. unsigned int head_size = 0;
  33. unsigned int tail_size = 0;
  34. /*
  35. * The frame size includes descriptor size, because the
  36. * hardware directly receive the frame into the skbuffer.
  37. */
  38. frame_size = entry->queue->data_size + entry->queue->desc_size;
  39. /*
  40. * The payload should be aligned to a 4-byte boundary,
  41. * this means we need at least 3 bytes for moving the frame
  42. * into the correct offset.
  43. */
  44. head_size = 4;
  45. /*
  46. * For IV/EIV/ICV assembly we must make sure there is
  47. * at least 8 bytes bytes available in headroom for IV/EIV
  48. * and 8 bytes for ICV data as tailroon.
  49. */
  50. if (test_bit(CONFIG_SUPPORT_HW_CRYPTO, &rt2x00dev->flags)) {
  51. head_size += 8;
  52. tail_size += 8;
  53. }
  54. /*
  55. * Allocate skbuffer.
  56. */
  57. skb = dev_alloc_skb(frame_size + head_size + tail_size);
  58. if (!skb)
  59. return NULL;
  60. /*
  61. * Make sure we not have a frame with the requested bytes
  62. * available in the head and tail.
  63. */
  64. skb_reserve(skb, head_size);
  65. skb_put(skb, frame_size);
  66. /*
  67. * Populate skbdesc.
  68. */
  69. skbdesc = get_skb_frame_desc(skb);
  70. memset(skbdesc, 0, sizeof(*skbdesc));
  71. skbdesc->entry = entry;
  72. if (test_bit(DRIVER_REQUIRE_DMA, &rt2x00dev->flags)) {
  73. skbdesc->skb_dma = dma_map_single(rt2x00dev->dev,
  74. skb->data,
  75. skb->len,
  76. DMA_FROM_DEVICE);
  77. skbdesc->flags |= SKBDESC_DMA_MAPPED_RX;
  78. }
  79. return skb;
  80. }
  81. void rt2x00queue_map_txskb(struct rt2x00_dev *rt2x00dev, struct sk_buff *skb)
  82. {
  83. struct skb_frame_desc *skbdesc = get_skb_frame_desc(skb);
  84. /*
  85. * If device has requested headroom, we should make sure that
  86. * is also mapped to the DMA so it can be used for transfering
  87. * additional descriptor information to the hardware.
  88. */
  89. skb_push(skb, rt2x00dev->hw->extra_tx_headroom);
  90. skbdesc->skb_dma =
  91. dma_map_single(rt2x00dev->dev, skb->data, skb->len, DMA_TO_DEVICE);
  92. /*
  93. * Restore data pointer to original location again.
  94. */
  95. skb_pull(skb, rt2x00dev->hw->extra_tx_headroom);
  96. skbdesc->flags |= SKBDESC_DMA_MAPPED_TX;
  97. }
  98. EXPORT_SYMBOL_GPL(rt2x00queue_map_txskb);
  99. void rt2x00queue_unmap_skb(struct rt2x00_dev *rt2x00dev, struct sk_buff *skb)
  100. {
  101. struct skb_frame_desc *skbdesc = get_skb_frame_desc(skb);
  102. if (skbdesc->flags & SKBDESC_DMA_MAPPED_RX) {
  103. dma_unmap_single(rt2x00dev->dev, skbdesc->skb_dma, skb->len,
  104. DMA_FROM_DEVICE);
  105. skbdesc->flags &= ~SKBDESC_DMA_MAPPED_RX;
  106. }
  107. if (skbdesc->flags & SKBDESC_DMA_MAPPED_TX) {
  108. /*
  109. * Add headroom to the skb length, it has been removed
  110. * by the driver, but it was actually mapped to DMA.
  111. */
  112. dma_unmap_single(rt2x00dev->dev, skbdesc->skb_dma,
  113. skb->len + rt2x00dev->hw->extra_tx_headroom,
  114. DMA_TO_DEVICE);
  115. skbdesc->flags &= ~SKBDESC_DMA_MAPPED_TX;
  116. }
  117. }
  118. void rt2x00queue_free_skb(struct rt2x00_dev *rt2x00dev, struct sk_buff *skb)
  119. {
  120. if (!skb)
  121. return;
  122. rt2x00queue_unmap_skb(rt2x00dev, skb);
  123. dev_kfree_skb_any(skb);
  124. }
  125. static void rt2x00queue_create_tx_descriptor_seq(struct queue_entry *entry,
  126. struct txentry_desc *txdesc)
  127. {
  128. struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(entry->skb);
  129. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)entry->skb->data;
  130. struct rt2x00_intf *intf = vif_to_intf(tx_info->control.vif);
  131. unsigned long irqflags;
  132. if (!(tx_info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) ||
  133. unlikely(!tx_info->control.vif))
  134. return;
  135. /*
  136. * Hardware should insert sequence counter.
  137. * FIXME: We insert a software sequence counter first for
  138. * hardware that doesn't support hardware sequence counting.
  139. *
  140. * This is wrong because beacons are not getting sequence
  141. * numbers assigned properly.
  142. *
  143. * A secondary problem exists for drivers that cannot toggle
  144. * sequence counting per-frame, since those will override the
  145. * sequence counter given by mac80211.
  146. */
  147. spin_lock_irqsave(&intf->seqlock, irqflags);
  148. if (test_bit(ENTRY_TXD_FIRST_FRAGMENT, &txdesc->flags))
  149. intf->seqno += 0x10;
  150. hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
  151. hdr->seq_ctrl |= cpu_to_le16(intf->seqno);
  152. spin_unlock_irqrestore(&intf->seqlock, irqflags);
  153. __set_bit(ENTRY_TXD_GENERATE_SEQ, &txdesc->flags);
  154. }
  155. static void rt2x00queue_create_tx_descriptor_plcp(struct queue_entry *entry,
  156. struct txentry_desc *txdesc,
  157. const struct rt2x00_rate *hwrate)
  158. {
  159. struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
  160. struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(entry->skb);
  161. struct ieee80211_tx_rate *txrate = &tx_info->control.rates[0];
  162. unsigned int data_length;
  163. unsigned int duration;
  164. unsigned int residual;
  165. /* Data length + CRC + Crypto overhead (IV/EIV/ICV/MIC) */
  166. data_length = entry->skb->len + 4;
  167. data_length += rt2x00crypto_tx_overhead(rt2x00dev, entry->skb);
  168. /*
  169. * PLCP setup
  170. * Length calculation depends on OFDM/CCK rate.
  171. */
  172. txdesc->signal = hwrate->plcp;
  173. txdesc->service = 0x04;
  174. if (hwrate->flags & DEV_RATE_OFDM) {
  175. txdesc->length_high = (data_length >> 6) & 0x3f;
  176. txdesc->length_low = data_length & 0x3f;
  177. } else {
  178. /*
  179. * Convert length to microseconds.
  180. */
  181. residual = GET_DURATION_RES(data_length, hwrate->bitrate);
  182. duration = GET_DURATION(data_length, hwrate->bitrate);
  183. if (residual != 0) {
  184. duration++;
  185. /*
  186. * Check if we need to set the Length Extension
  187. */
  188. if (hwrate->bitrate == 110 && residual <= 30)
  189. txdesc->service |= 0x80;
  190. }
  191. txdesc->length_high = (duration >> 8) & 0xff;
  192. txdesc->length_low = duration & 0xff;
  193. /*
  194. * When preamble is enabled we should set the
  195. * preamble bit for the signal.
  196. */
  197. if (txrate->flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE)
  198. txdesc->signal |= 0x08;
  199. }
  200. }
  201. static void rt2x00queue_create_tx_descriptor(struct queue_entry *entry,
  202. struct txentry_desc *txdesc)
  203. {
  204. struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
  205. struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(entry->skb);
  206. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)entry->skb->data;
  207. struct ieee80211_rate *rate =
  208. ieee80211_get_tx_rate(rt2x00dev->hw, tx_info);
  209. const struct rt2x00_rate *hwrate;
  210. memset(txdesc, 0, sizeof(*txdesc));
  211. /*
  212. * Initialize information from queue
  213. */
  214. txdesc->queue = entry->queue->qid;
  215. txdesc->cw_min = entry->queue->cw_min;
  216. txdesc->cw_max = entry->queue->cw_max;
  217. txdesc->aifs = entry->queue->aifs;
  218. /*
  219. * Check whether this frame is to be acked.
  220. */
  221. if (!(tx_info->flags & IEEE80211_TX_CTL_NO_ACK))
  222. __set_bit(ENTRY_TXD_ACK, &txdesc->flags);
  223. /*
  224. * Check if this is a RTS/CTS frame
  225. */
  226. if (ieee80211_is_rts(hdr->frame_control) ||
  227. ieee80211_is_cts(hdr->frame_control)) {
  228. __set_bit(ENTRY_TXD_BURST, &txdesc->flags);
  229. if (ieee80211_is_rts(hdr->frame_control))
  230. __set_bit(ENTRY_TXD_RTS_FRAME, &txdesc->flags);
  231. else
  232. __set_bit(ENTRY_TXD_CTS_FRAME, &txdesc->flags);
  233. if (tx_info->control.rts_cts_rate_idx >= 0)
  234. rate =
  235. ieee80211_get_rts_cts_rate(rt2x00dev->hw, tx_info);
  236. }
  237. /*
  238. * Determine retry information.
  239. */
  240. txdesc->retry_limit = tx_info->control.rates[0].count - 1;
  241. if (txdesc->retry_limit >= rt2x00dev->long_retry)
  242. __set_bit(ENTRY_TXD_RETRY_MODE, &txdesc->flags);
  243. /*
  244. * Check if more fragments are pending
  245. */
  246. if (ieee80211_has_morefrags(hdr->frame_control)) {
  247. __set_bit(ENTRY_TXD_BURST, &txdesc->flags);
  248. __set_bit(ENTRY_TXD_MORE_FRAG, &txdesc->flags);
  249. }
  250. /*
  251. * Beacons and probe responses require the tsf timestamp
  252. * to be inserted into the frame.
  253. */
  254. if (ieee80211_is_beacon(hdr->frame_control) ||
  255. ieee80211_is_probe_resp(hdr->frame_control))
  256. __set_bit(ENTRY_TXD_REQ_TIMESTAMP, &txdesc->flags);
  257. /*
  258. * Determine with what IFS priority this frame should be send.
  259. * Set ifs to IFS_SIFS when the this is not the first fragment,
  260. * or this fragment came after RTS/CTS.
  261. */
  262. if ((tx_info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT) &&
  263. !test_bit(ENTRY_TXD_RTS_FRAME, &txdesc->flags)) {
  264. __set_bit(ENTRY_TXD_FIRST_FRAGMENT, &txdesc->flags);
  265. txdesc->ifs = IFS_BACKOFF;
  266. } else
  267. txdesc->ifs = IFS_SIFS;
  268. /*
  269. * Determine rate modulation.
  270. */
  271. hwrate = rt2x00_get_rate(rate->hw_value);
  272. txdesc->rate_mode = RATE_MODE_CCK;
  273. if (hwrate->flags & DEV_RATE_OFDM)
  274. txdesc->rate_mode = RATE_MODE_OFDM;
  275. /*
  276. * Apply TX descriptor handling by components
  277. */
  278. rt2x00crypto_create_tx_descriptor(entry, txdesc);
  279. rt2x00queue_create_tx_descriptor_seq(entry, txdesc);
  280. rt2x00queue_create_tx_descriptor_plcp(entry, txdesc, hwrate);
  281. }
  282. static void rt2x00queue_write_tx_descriptor(struct queue_entry *entry,
  283. struct txentry_desc *txdesc)
  284. {
  285. struct data_queue *queue = entry->queue;
  286. struct rt2x00_dev *rt2x00dev = queue->rt2x00dev;
  287. rt2x00dev->ops->lib->write_tx_desc(rt2x00dev, entry->skb, txdesc);
  288. /*
  289. * All processing on the frame has been completed, this means
  290. * it is now ready to be dumped to userspace through debugfs.
  291. */
  292. rt2x00debug_dump_frame(rt2x00dev, DUMP_FRAME_TX, entry->skb);
  293. /*
  294. * Check if we need to kick the queue, there are however a few rules
  295. * 1) Don't kick beacon queue
  296. * 2) Don't kick unless this is the last in frame in a burst.
  297. * When the burst flag is set, this frame is always followed
  298. * by another frame which in some way are related to eachother.
  299. * This is true for fragments, RTS or CTS-to-self frames.
  300. * 3) Rule 2 can be broken when the available entries
  301. * in the queue are less then a certain threshold.
  302. */
  303. if (entry->queue->qid == QID_BEACON)
  304. return;
  305. if (rt2x00queue_threshold(queue) ||
  306. !test_bit(ENTRY_TXD_BURST, &txdesc->flags))
  307. rt2x00dev->ops->lib->kick_tx_queue(rt2x00dev, queue->qid);
  308. }
  309. int rt2x00queue_write_tx_frame(struct data_queue *queue, struct sk_buff *skb)
  310. {
  311. struct ieee80211_tx_info *tx_info;
  312. struct queue_entry *entry = rt2x00queue_get_entry(queue, Q_INDEX);
  313. struct txentry_desc txdesc;
  314. struct skb_frame_desc *skbdesc;
  315. unsigned int iv_len = 0;
  316. u8 rate_idx, rate_flags;
  317. if (unlikely(rt2x00queue_full(queue)))
  318. return -ENOBUFS;
  319. if (test_and_set_bit(ENTRY_OWNER_DEVICE_DATA, &entry->flags)) {
  320. ERROR(queue->rt2x00dev,
  321. "Arrived at non-free entry in the non-full queue %d.\n"
  322. "Please file bug report to %s.\n",
  323. queue->qid, DRV_PROJECT);
  324. return -EINVAL;
  325. }
  326. /*
  327. * Copy all TX descriptor information into txdesc,
  328. * after that we are free to use the skb->cb array
  329. * for our information.
  330. */
  331. entry->skb = skb;
  332. rt2x00queue_create_tx_descriptor(entry, &txdesc);
  333. if (IEEE80211_SKB_CB(skb)->control.hw_key != NULL)
  334. iv_len = IEEE80211_SKB_CB(skb)->control.hw_key->iv_len;
  335. /*
  336. * All information is retrieved from the skb->cb array,
  337. * now we should claim ownership of the driver part of that
  338. * array, preserving the bitrate index and flags.
  339. */
  340. tx_info = IEEE80211_SKB_CB(skb);
  341. rate_idx = tx_info->control.rates[0].idx;
  342. rate_flags = tx_info->control.rates[0].flags;
  343. skbdesc = get_skb_frame_desc(skb);
  344. memset(skbdesc, 0, sizeof(*skbdesc));
  345. skbdesc->entry = entry;
  346. skbdesc->tx_rate_idx = rate_idx;
  347. skbdesc->tx_rate_flags = rate_flags;
  348. /*
  349. * When hardware encryption is supported, and this frame
  350. * is to be encrypted, we should strip the IV/EIV data from
  351. * the frame so we can provide it to the driver seperately.
  352. */
  353. if (test_bit(ENTRY_TXD_ENCRYPT, &txdesc.flags) &&
  354. !test_bit(ENTRY_TXD_ENCRYPT_IV, &txdesc.flags)) {
  355. if (test_bit(DRIVER_REQUIRE_COPY_IV, &queue->rt2x00dev->flags))
  356. rt2x00crypto_tx_copy_iv(skb, iv_len);
  357. else
  358. rt2x00crypto_tx_remove_iv(skb, iv_len);
  359. }
  360. /*
  361. * It could be possible that the queue was corrupted and this
  362. * call failed. Since we always return NETDEV_TX_OK to mac80211,
  363. * this frame will simply be dropped.
  364. */
  365. if (unlikely(queue->rt2x00dev->ops->lib->write_tx_data(entry))) {
  366. clear_bit(ENTRY_OWNER_DEVICE_DATA, &entry->flags);
  367. entry->skb = NULL;
  368. return -EIO;
  369. }
  370. if (test_bit(DRIVER_REQUIRE_DMA, &queue->rt2x00dev->flags))
  371. rt2x00queue_map_txskb(queue->rt2x00dev, skb);
  372. set_bit(ENTRY_DATA_PENDING, &entry->flags);
  373. rt2x00queue_index_inc(queue, Q_INDEX);
  374. rt2x00queue_write_tx_descriptor(entry, &txdesc);
  375. return 0;
  376. }
  377. int rt2x00queue_update_beacon(struct rt2x00_dev *rt2x00dev,
  378. struct ieee80211_vif *vif)
  379. {
  380. struct rt2x00_intf *intf = vif_to_intf(vif);
  381. struct skb_frame_desc *skbdesc;
  382. struct txentry_desc txdesc;
  383. __le32 desc[16];
  384. if (unlikely(!intf->beacon))
  385. return -ENOBUFS;
  386. intf->beacon->skb = ieee80211_beacon_get(rt2x00dev->hw, vif);
  387. if (!intf->beacon->skb)
  388. return -ENOMEM;
  389. /*
  390. * Copy all TX descriptor information into txdesc,
  391. * after that we are free to use the skb->cb array
  392. * for our information.
  393. */
  394. rt2x00queue_create_tx_descriptor(intf->beacon, &txdesc);
  395. /*
  396. * For the descriptor we use a local array from where the
  397. * driver can move it to the correct location required for
  398. * the hardware.
  399. */
  400. memset(desc, 0, sizeof(desc));
  401. /*
  402. * Fill in skb descriptor
  403. */
  404. skbdesc = get_skb_frame_desc(intf->beacon->skb);
  405. memset(skbdesc, 0, sizeof(*skbdesc));
  406. skbdesc->desc = desc;
  407. skbdesc->desc_len = intf->beacon->queue->desc_size;
  408. skbdesc->entry = intf->beacon;
  409. /*
  410. * Write TX descriptor into reserved room in front of the beacon.
  411. */
  412. rt2x00queue_write_tx_descriptor(intf->beacon, &txdesc);
  413. /*
  414. * Send beacon to hardware.
  415. * Also enable beacon generation, which might have been disabled
  416. * by the driver during the config_beacon() callback function.
  417. */
  418. rt2x00dev->ops->lib->write_beacon(intf->beacon);
  419. rt2x00dev->ops->lib->kick_tx_queue(rt2x00dev, QID_BEACON);
  420. return 0;
  421. }
  422. struct data_queue *rt2x00queue_get_queue(struct rt2x00_dev *rt2x00dev,
  423. const enum data_queue_qid queue)
  424. {
  425. int atim = test_bit(DRIVER_REQUIRE_ATIM_QUEUE, &rt2x00dev->flags);
  426. if (queue < rt2x00dev->ops->tx_queues && rt2x00dev->tx)
  427. return &rt2x00dev->tx[queue];
  428. if (!rt2x00dev->bcn)
  429. return NULL;
  430. if (queue == QID_BEACON)
  431. return &rt2x00dev->bcn[0];
  432. else if (queue == QID_ATIM && atim)
  433. return &rt2x00dev->bcn[1];
  434. return NULL;
  435. }
  436. EXPORT_SYMBOL_GPL(rt2x00queue_get_queue);
  437. struct queue_entry *rt2x00queue_get_entry(struct data_queue *queue,
  438. enum queue_index index)
  439. {
  440. struct queue_entry *entry;
  441. unsigned long irqflags;
  442. if (unlikely(index >= Q_INDEX_MAX)) {
  443. ERROR(queue->rt2x00dev,
  444. "Entry requested from invalid index type (%d)\n", index);
  445. return NULL;
  446. }
  447. spin_lock_irqsave(&queue->lock, irqflags);
  448. entry = &queue->entries[queue->index[index]];
  449. spin_unlock_irqrestore(&queue->lock, irqflags);
  450. return entry;
  451. }
  452. EXPORT_SYMBOL_GPL(rt2x00queue_get_entry);
  453. void rt2x00queue_index_inc(struct data_queue *queue, enum queue_index index)
  454. {
  455. unsigned long irqflags;
  456. if (unlikely(index >= Q_INDEX_MAX)) {
  457. ERROR(queue->rt2x00dev,
  458. "Index change on invalid index type (%d)\n", index);
  459. return;
  460. }
  461. spin_lock_irqsave(&queue->lock, irqflags);
  462. queue->index[index]++;
  463. if (queue->index[index] >= queue->limit)
  464. queue->index[index] = 0;
  465. if (index == Q_INDEX) {
  466. queue->length++;
  467. } else if (index == Q_INDEX_DONE) {
  468. queue->length--;
  469. queue->count++;
  470. }
  471. spin_unlock_irqrestore(&queue->lock, irqflags);
  472. }
  473. static void rt2x00queue_reset(struct data_queue *queue)
  474. {
  475. unsigned long irqflags;
  476. spin_lock_irqsave(&queue->lock, irqflags);
  477. queue->count = 0;
  478. queue->length = 0;
  479. memset(queue->index, 0, sizeof(queue->index));
  480. spin_unlock_irqrestore(&queue->lock, irqflags);
  481. }
  482. void rt2x00queue_init_queues(struct rt2x00_dev *rt2x00dev)
  483. {
  484. struct data_queue *queue;
  485. unsigned int i;
  486. queue_for_each(rt2x00dev, queue) {
  487. rt2x00queue_reset(queue);
  488. for (i = 0; i < queue->limit; i++) {
  489. queue->entries[i].flags = 0;
  490. rt2x00dev->ops->lib->clear_entry(&queue->entries[i]);
  491. }
  492. }
  493. }
  494. static int rt2x00queue_alloc_entries(struct data_queue *queue,
  495. const struct data_queue_desc *qdesc)
  496. {
  497. struct queue_entry *entries;
  498. unsigned int entry_size;
  499. unsigned int i;
  500. rt2x00queue_reset(queue);
  501. queue->limit = qdesc->entry_num;
  502. queue->threshold = DIV_ROUND_UP(qdesc->entry_num, 10);
  503. queue->data_size = qdesc->data_size;
  504. queue->desc_size = qdesc->desc_size;
  505. /*
  506. * Allocate all queue entries.
  507. */
  508. entry_size = sizeof(*entries) + qdesc->priv_size;
  509. entries = kzalloc(queue->limit * entry_size, GFP_KERNEL);
  510. if (!entries)
  511. return -ENOMEM;
  512. #define QUEUE_ENTRY_PRIV_OFFSET(__base, __index, __limit, __esize, __psize) \
  513. ( ((char *)(__base)) + ((__limit) * (__esize)) + \
  514. ((__index) * (__psize)) )
  515. for (i = 0; i < queue->limit; i++) {
  516. entries[i].flags = 0;
  517. entries[i].queue = queue;
  518. entries[i].skb = NULL;
  519. entries[i].entry_idx = i;
  520. entries[i].priv_data =
  521. QUEUE_ENTRY_PRIV_OFFSET(entries, i, queue->limit,
  522. sizeof(*entries), qdesc->priv_size);
  523. }
  524. #undef QUEUE_ENTRY_PRIV_OFFSET
  525. queue->entries = entries;
  526. return 0;
  527. }
  528. static void rt2x00queue_free_skbs(struct rt2x00_dev *rt2x00dev,
  529. struct data_queue *queue)
  530. {
  531. unsigned int i;
  532. if (!queue->entries)
  533. return;
  534. for (i = 0; i < queue->limit; i++) {
  535. if (queue->entries[i].skb)
  536. rt2x00queue_free_skb(rt2x00dev, queue->entries[i].skb);
  537. }
  538. }
  539. static int rt2x00queue_alloc_rxskbs(struct rt2x00_dev *rt2x00dev,
  540. struct data_queue *queue)
  541. {
  542. unsigned int i;
  543. struct sk_buff *skb;
  544. for (i = 0; i < queue->limit; i++) {
  545. skb = rt2x00queue_alloc_rxskb(rt2x00dev, &queue->entries[i]);
  546. if (!skb)
  547. return -ENOMEM;
  548. queue->entries[i].skb = skb;
  549. }
  550. return 0;
  551. }
  552. int rt2x00queue_initialize(struct rt2x00_dev *rt2x00dev)
  553. {
  554. struct data_queue *queue;
  555. int status;
  556. status = rt2x00queue_alloc_entries(rt2x00dev->rx, rt2x00dev->ops->rx);
  557. if (status)
  558. goto exit;
  559. tx_queue_for_each(rt2x00dev, queue) {
  560. status = rt2x00queue_alloc_entries(queue, rt2x00dev->ops->tx);
  561. if (status)
  562. goto exit;
  563. }
  564. status = rt2x00queue_alloc_entries(rt2x00dev->bcn, rt2x00dev->ops->bcn);
  565. if (status)
  566. goto exit;
  567. if (test_bit(DRIVER_REQUIRE_ATIM_QUEUE, &rt2x00dev->flags)) {
  568. status = rt2x00queue_alloc_entries(&rt2x00dev->bcn[1],
  569. rt2x00dev->ops->atim);
  570. if (status)
  571. goto exit;
  572. }
  573. status = rt2x00queue_alloc_rxskbs(rt2x00dev, rt2x00dev->rx);
  574. if (status)
  575. goto exit;
  576. return 0;
  577. exit:
  578. ERROR(rt2x00dev, "Queue entries allocation failed.\n");
  579. rt2x00queue_uninitialize(rt2x00dev);
  580. return status;
  581. }
  582. void rt2x00queue_uninitialize(struct rt2x00_dev *rt2x00dev)
  583. {
  584. struct data_queue *queue;
  585. rt2x00queue_free_skbs(rt2x00dev, rt2x00dev->rx);
  586. queue_for_each(rt2x00dev, queue) {
  587. kfree(queue->entries);
  588. queue->entries = NULL;
  589. }
  590. }
  591. static void rt2x00queue_init(struct rt2x00_dev *rt2x00dev,
  592. struct data_queue *queue, enum data_queue_qid qid)
  593. {
  594. spin_lock_init(&queue->lock);
  595. queue->rt2x00dev = rt2x00dev;
  596. queue->qid = qid;
  597. queue->txop = 0;
  598. queue->aifs = 2;
  599. queue->cw_min = 5;
  600. queue->cw_max = 10;
  601. }
  602. int rt2x00queue_allocate(struct rt2x00_dev *rt2x00dev)
  603. {
  604. struct data_queue *queue;
  605. enum data_queue_qid qid;
  606. unsigned int req_atim =
  607. !!test_bit(DRIVER_REQUIRE_ATIM_QUEUE, &rt2x00dev->flags);
  608. /*
  609. * We need the following queues:
  610. * RX: 1
  611. * TX: ops->tx_queues
  612. * Beacon: 1
  613. * Atim: 1 (if required)
  614. */
  615. rt2x00dev->data_queues = 2 + rt2x00dev->ops->tx_queues + req_atim;
  616. queue = kzalloc(rt2x00dev->data_queues * sizeof(*queue), GFP_KERNEL);
  617. if (!queue) {
  618. ERROR(rt2x00dev, "Queue allocation failed.\n");
  619. return -ENOMEM;
  620. }
  621. /*
  622. * Initialize pointers
  623. */
  624. rt2x00dev->rx = queue;
  625. rt2x00dev->tx = &queue[1];
  626. rt2x00dev->bcn = &queue[1 + rt2x00dev->ops->tx_queues];
  627. /*
  628. * Initialize queue parameters.
  629. * RX: qid = QID_RX
  630. * TX: qid = QID_AC_BE + index
  631. * TX: cw_min: 2^5 = 32.
  632. * TX: cw_max: 2^10 = 1024.
  633. * BCN: qid = QID_BEACON
  634. * ATIM: qid = QID_ATIM
  635. */
  636. rt2x00queue_init(rt2x00dev, rt2x00dev->rx, QID_RX);
  637. qid = QID_AC_BE;
  638. tx_queue_for_each(rt2x00dev, queue)
  639. rt2x00queue_init(rt2x00dev, queue, qid++);
  640. rt2x00queue_init(rt2x00dev, &rt2x00dev->bcn[0], QID_BEACON);
  641. if (req_atim)
  642. rt2x00queue_init(rt2x00dev, &rt2x00dev->bcn[1], QID_ATIM);
  643. return 0;
  644. }
  645. void rt2x00queue_free(struct rt2x00_dev *rt2x00dev)
  646. {
  647. kfree(rt2x00dev->rx);
  648. rt2x00dev->rx = NULL;
  649. rt2x00dev->tx = NULL;
  650. rt2x00dev->bcn = NULL;
  651. }