rt2500usb.c 64 KB

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  1. /*
  2. Copyright (C) 2004 - 2009 rt2x00 SourceForge Project
  3. <http://rt2x00.serialmonkey.com>
  4. This program is free software; you can redistribute it and/or modify
  5. it under the terms of the GNU General Public License as published by
  6. the Free Software Foundation; either version 2 of the License, or
  7. (at your option) any later version.
  8. This program is distributed in the hope that it will be useful,
  9. but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. GNU General Public License for more details.
  12. You should have received a copy of the GNU General Public License
  13. along with this program; if not, write to the
  14. Free Software Foundation, Inc.,
  15. 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  16. */
  17. /*
  18. Module: rt2500usb
  19. Abstract: rt2500usb device specific routines.
  20. Supported chipsets: RT2570.
  21. */
  22. #include <linux/delay.h>
  23. #include <linux/etherdevice.h>
  24. #include <linux/init.h>
  25. #include <linux/kernel.h>
  26. #include <linux/module.h>
  27. #include <linux/usb.h>
  28. #include "rt2x00.h"
  29. #include "rt2x00usb.h"
  30. #include "rt2500usb.h"
  31. /*
  32. * Allow hardware encryption to be disabled.
  33. */
  34. static int modparam_nohwcrypt = 0;
  35. module_param_named(nohwcrypt, modparam_nohwcrypt, bool, S_IRUGO);
  36. MODULE_PARM_DESC(nohwcrypt, "Disable hardware encryption.");
  37. /*
  38. * Register access.
  39. * All access to the CSR registers will go through the methods
  40. * rt2500usb_register_read and rt2500usb_register_write.
  41. * BBP and RF register require indirect register access,
  42. * and use the CSR registers BBPCSR and RFCSR to achieve this.
  43. * These indirect registers work with busy bits,
  44. * and we will try maximal REGISTER_BUSY_COUNT times to access
  45. * the register while taking a REGISTER_BUSY_DELAY us delay
  46. * between each attampt. When the busy bit is still set at that time,
  47. * the access attempt is considered to have failed,
  48. * and we will print an error.
  49. * If the csr_mutex is already held then the _lock variants must
  50. * be used instead.
  51. */
  52. static inline void rt2500usb_register_read(struct rt2x00_dev *rt2x00dev,
  53. const unsigned int offset,
  54. u16 *value)
  55. {
  56. __le16 reg;
  57. rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_READ,
  58. USB_VENDOR_REQUEST_IN, offset,
  59. &reg, sizeof(reg), REGISTER_TIMEOUT);
  60. *value = le16_to_cpu(reg);
  61. }
  62. static inline void rt2500usb_register_read_lock(struct rt2x00_dev *rt2x00dev,
  63. const unsigned int offset,
  64. u16 *value)
  65. {
  66. __le16 reg;
  67. rt2x00usb_vendor_req_buff_lock(rt2x00dev, USB_MULTI_READ,
  68. USB_VENDOR_REQUEST_IN, offset,
  69. &reg, sizeof(reg), REGISTER_TIMEOUT);
  70. *value = le16_to_cpu(reg);
  71. }
  72. static inline void rt2500usb_register_multiread(struct rt2x00_dev *rt2x00dev,
  73. const unsigned int offset,
  74. void *value, const u16 length)
  75. {
  76. rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_READ,
  77. USB_VENDOR_REQUEST_IN, offset,
  78. value, length,
  79. REGISTER_TIMEOUT16(length));
  80. }
  81. static inline void rt2500usb_register_write(struct rt2x00_dev *rt2x00dev,
  82. const unsigned int offset,
  83. u16 value)
  84. {
  85. __le16 reg = cpu_to_le16(value);
  86. rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_WRITE,
  87. USB_VENDOR_REQUEST_OUT, offset,
  88. &reg, sizeof(reg), REGISTER_TIMEOUT);
  89. }
  90. static inline void rt2500usb_register_write_lock(struct rt2x00_dev *rt2x00dev,
  91. const unsigned int offset,
  92. u16 value)
  93. {
  94. __le16 reg = cpu_to_le16(value);
  95. rt2x00usb_vendor_req_buff_lock(rt2x00dev, USB_MULTI_WRITE,
  96. USB_VENDOR_REQUEST_OUT, offset,
  97. &reg, sizeof(reg), REGISTER_TIMEOUT);
  98. }
  99. static inline void rt2500usb_register_multiwrite(struct rt2x00_dev *rt2x00dev,
  100. const unsigned int offset,
  101. void *value, const u16 length)
  102. {
  103. rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_WRITE,
  104. USB_VENDOR_REQUEST_OUT, offset,
  105. value, length,
  106. REGISTER_TIMEOUT16(length));
  107. }
  108. static int rt2500usb_regbusy_read(struct rt2x00_dev *rt2x00dev,
  109. const unsigned int offset,
  110. struct rt2x00_field16 field,
  111. u16 *reg)
  112. {
  113. unsigned int i;
  114. for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
  115. rt2500usb_register_read_lock(rt2x00dev, offset, reg);
  116. if (!rt2x00_get_field16(*reg, field))
  117. return 1;
  118. udelay(REGISTER_BUSY_DELAY);
  119. }
  120. ERROR(rt2x00dev, "Indirect register access failed: "
  121. "offset=0x%.08x, value=0x%.08x\n", offset, *reg);
  122. *reg = ~0;
  123. return 0;
  124. }
  125. #define WAIT_FOR_BBP(__dev, __reg) \
  126. rt2500usb_regbusy_read((__dev), PHY_CSR8, PHY_CSR8_BUSY, (__reg))
  127. #define WAIT_FOR_RF(__dev, __reg) \
  128. rt2500usb_regbusy_read((__dev), PHY_CSR10, PHY_CSR10_RF_BUSY, (__reg))
  129. static void rt2500usb_bbp_write(struct rt2x00_dev *rt2x00dev,
  130. const unsigned int word, const u8 value)
  131. {
  132. u16 reg;
  133. mutex_lock(&rt2x00dev->csr_mutex);
  134. /*
  135. * Wait until the BBP becomes available, afterwards we
  136. * can safely write the new data into the register.
  137. */
  138. if (WAIT_FOR_BBP(rt2x00dev, &reg)) {
  139. reg = 0;
  140. rt2x00_set_field16(&reg, PHY_CSR7_DATA, value);
  141. rt2x00_set_field16(&reg, PHY_CSR7_REG_ID, word);
  142. rt2x00_set_field16(&reg, PHY_CSR7_READ_CONTROL, 0);
  143. rt2500usb_register_write_lock(rt2x00dev, PHY_CSR7, reg);
  144. }
  145. mutex_unlock(&rt2x00dev->csr_mutex);
  146. }
  147. static void rt2500usb_bbp_read(struct rt2x00_dev *rt2x00dev,
  148. const unsigned int word, u8 *value)
  149. {
  150. u16 reg;
  151. mutex_lock(&rt2x00dev->csr_mutex);
  152. /*
  153. * Wait until the BBP becomes available, afterwards we
  154. * can safely write the read request into the register.
  155. * After the data has been written, we wait until hardware
  156. * returns the correct value, if at any time the register
  157. * doesn't become available in time, reg will be 0xffffffff
  158. * which means we return 0xff to the caller.
  159. */
  160. if (WAIT_FOR_BBP(rt2x00dev, &reg)) {
  161. reg = 0;
  162. rt2x00_set_field16(&reg, PHY_CSR7_REG_ID, word);
  163. rt2x00_set_field16(&reg, PHY_CSR7_READ_CONTROL, 1);
  164. rt2500usb_register_write_lock(rt2x00dev, PHY_CSR7, reg);
  165. if (WAIT_FOR_BBP(rt2x00dev, &reg))
  166. rt2500usb_register_read_lock(rt2x00dev, PHY_CSR7, &reg);
  167. }
  168. *value = rt2x00_get_field16(reg, PHY_CSR7_DATA);
  169. mutex_unlock(&rt2x00dev->csr_mutex);
  170. }
  171. static void rt2500usb_rf_write(struct rt2x00_dev *rt2x00dev,
  172. const unsigned int word, const u32 value)
  173. {
  174. u16 reg;
  175. if (!word)
  176. return;
  177. mutex_lock(&rt2x00dev->csr_mutex);
  178. /*
  179. * Wait until the RF becomes available, afterwards we
  180. * can safely write the new data into the register.
  181. */
  182. if (WAIT_FOR_RF(rt2x00dev, &reg)) {
  183. reg = 0;
  184. rt2x00_set_field16(&reg, PHY_CSR9_RF_VALUE, value);
  185. rt2500usb_register_write_lock(rt2x00dev, PHY_CSR9, reg);
  186. reg = 0;
  187. rt2x00_set_field16(&reg, PHY_CSR10_RF_VALUE, value >> 16);
  188. rt2x00_set_field16(&reg, PHY_CSR10_RF_NUMBER_OF_BITS, 20);
  189. rt2x00_set_field16(&reg, PHY_CSR10_RF_IF_SELECT, 0);
  190. rt2x00_set_field16(&reg, PHY_CSR10_RF_BUSY, 1);
  191. rt2500usb_register_write_lock(rt2x00dev, PHY_CSR10, reg);
  192. rt2x00_rf_write(rt2x00dev, word, value);
  193. }
  194. mutex_unlock(&rt2x00dev->csr_mutex);
  195. }
  196. #ifdef CONFIG_RT2X00_LIB_DEBUGFS
  197. static void _rt2500usb_register_read(struct rt2x00_dev *rt2x00dev,
  198. const unsigned int offset,
  199. u32 *value)
  200. {
  201. rt2500usb_register_read(rt2x00dev, offset, (u16 *)value);
  202. }
  203. static void _rt2500usb_register_write(struct rt2x00_dev *rt2x00dev,
  204. const unsigned int offset,
  205. u32 value)
  206. {
  207. rt2500usb_register_write(rt2x00dev, offset, value);
  208. }
  209. static const struct rt2x00debug rt2500usb_rt2x00debug = {
  210. .owner = THIS_MODULE,
  211. .csr = {
  212. .read = _rt2500usb_register_read,
  213. .write = _rt2500usb_register_write,
  214. .flags = RT2X00DEBUGFS_OFFSET,
  215. .word_base = CSR_REG_BASE,
  216. .word_size = sizeof(u16),
  217. .word_count = CSR_REG_SIZE / sizeof(u16),
  218. },
  219. .eeprom = {
  220. .read = rt2x00_eeprom_read,
  221. .write = rt2x00_eeprom_write,
  222. .word_base = EEPROM_BASE,
  223. .word_size = sizeof(u16),
  224. .word_count = EEPROM_SIZE / sizeof(u16),
  225. },
  226. .bbp = {
  227. .read = rt2500usb_bbp_read,
  228. .write = rt2500usb_bbp_write,
  229. .word_base = BBP_BASE,
  230. .word_size = sizeof(u8),
  231. .word_count = BBP_SIZE / sizeof(u8),
  232. },
  233. .rf = {
  234. .read = rt2x00_rf_read,
  235. .write = rt2500usb_rf_write,
  236. .word_base = RF_BASE,
  237. .word_size = sizeof(u32),
  238. .word_count = RF_SIZE / sizeof(u32),
  239. },
  240. };
  241. #endif /* CONFIG_RT2X00_LIB_DEBUGFS */
  242. #ifdef CONFIG_RT2X00_LIB_RFKILL
  243. static int rt2500usb_rfkill_poll(struct rt2x00_dev *rt2x00dev)
  244. {
  245. u16 reg;
  246. rt2500usb_register_read(rt2x00dev, MAC_CSR19, &reg);
  247. return rt2x00_get_field32(reg, MAC_CSR19_BIT7);
  248. }
  249. #else
  250. #define rt2500usb_rfkill_poll NULL
  251. #endif /* CONFIG_RT2X00_LIB_RFKILL */
  252. #ifdef CONFIG_RT2X00_LIB_LEDS
  253. static void rt2500usb_brightness_set(struct led_classdev *led_cdev,
  254. enum led_brightness brightness)
  255. {
  256. struct rt2x00_led *led =
  257. container_of(led_cdev, struct rt2x00_led, led_dev);
  258. unsigned int enabled = brightness != LED_OFF;
  259. u16 reg;
  260. rt2500usb_register_read(led->rt2x00dev, MAC_CSR20, &reg);
  261. if (led->type == LED_TYPE_RADIO || led->type == LED_TYPE_ASSOC)
  262. rt2x00_set_field16(&reg, MAC_CSR20_LINK, enabled);
  263. else if (led->type == LED_TYPE_ACTIVITY)
  264. rt2x00_set_field16(&reg, MAC_CSR20_ACTIVITY, enabled);
  265. rt2500usb_register_write(led->rt2x00dev, MAC_CSR20, reg);
  266. }
  267. static int rt2500usb_blink_set(struct led_classdev *led_cdev,
  268. unsigned long *delay_on,
  269. unsigned long *delay_off)
  270. {
  271. struct rt2x00_led *led =
  272. container_of(led_cdev, struct rt2x00_led, led_dev);
  273. u16 reg;
  274. rt2500usb_register_read(led->rt2x00dev, MAC_CSR21, &reg);
  275. rt2x00_set_field16(&reg, MAC_CSR21_ON_PERIOD, *delay_on);
  276. rt2x00_set_field16(&reg, MAC_CSR21_OFF_PERIOD, *delay_off);
  277. rt2500usb_register_write(led->rt2x00dev, MAC_CSR21, reg);
  278. return 0;
  279. }
  280. static void rt2500usb_init_led(struct rt2x00_dev *rt2x00dev,
  281. struct rt2x00_led *led,
  282. enum led_type type)
  283. {
  284. led->rt2x00dev = rt2x00dev;
  285. led->type = type;
  286. led->led_dev.brightness_set = rt2500usb_brightness_set;
  287. led->led_dev.blink_set = rt2500usb_blink_set;
  288. led->flags = LED_INITIALIZED;
  289. }
  290. #endif /* CONFIG_RT2X00_LIB_LEDS */
  291. /*
  292. * Configuration handlers.
  293. */
  294. /*
  295. * rt2500usb does not differentiate between shared and pairwise
  296. * keys, so we should use the same function for both key types.
  297. */
  298. static int rt2500usb_config_key(struct rt2x00_dev *rt2x00dev,
  299. struct rt2x00lib_crypto *crypto,
  300. struct ieee80211_key_conf *key)
  301. {
  302. int timeout;
  303. u32 mask;
  304. u16 reg;
  305. if (crypto->cmd == SET_KEY) {
  306. /*
  307. * Pairwise key will always be entry 0, but this
  308. * could collide with a shared key on the same
  309. * position...
  310. */
  311. mask = TXRX_CSR0_KEY_ID.bit_mask;
  312. rt2500usb_register_read(rt2x00dev, TXRX_CSR0, &reg);
  313. reg &= mask;
  314. if (reg && reg == mask)
  315. return -ENOSPC;
  316. reg = rt2x00_get_field16(reg, TXRX_CSR0_KEY_ID);
  317. key->hw_key_idx += reg ? ffz(reg) : 0;
  318. /*
  319. * The encryption key doesn't fit within the CSR cache,
  320. * this means we should allocate it seperately and use
  321. * rt2x00usb_vendor_request() to send the key to the hardware.
  322. */
  323. reg = KEY_ENTRY(key->hw_key_idx);
  324. timeout = REGISTER_TIMEOUT32(sizeof(crypto->key));
  325. rt2x00usb_vendor_request_large_buff(rt2x00dev, USB_MULTI_WRITE,
  326. USB_VENDOR_REQUEST_OUT, reg,
  327. crypto->key,
  328. sizeof(crypto->key),
  329. timeout);
  330. /*
  331. * The driver does not support the IV/EIV generation
  332. * in hardware. However it demands the data to be provided
  333. * both seperately as well as inside the frame.
  334. * We already provided the CONFIG_CRYPTO_COPY_IV to rt2x00lib
  335. * to ensure rt2x00lib will not strip the data from the
  336. * frame after the copy, now we must tell mac80211
  337. * to generate the IV/EIV data.
  338. */
  339. key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
  340. key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
  341. }
  342. /*
  343. * TXRX_CSR0_KEY_ID contains only single-bit fields to indicate
  344. * a particular key is valid.
  345. */
  346. rt2500usb_register_read(rt2x00dev, TXRX_CSR0, &reg);
  347. rt2x00_set_field16(&reg, TXRX_CSR0_ALGORITHM, crypto->cipher);
  348. rt2x00_set_field16(&reg, TXRX_CSR0_IV_OFFSET, IEEE80211_HEADER);
  349. mask = rt2x00_get_field16(reg, TXRX_CSR0_KEY_ID);
  350. if (crypto->cmd == SET_KEY)
  351. mask |= 1 << key->hw_key_idx;
  352. else if (crypto->cmd == DISABLE_KEY)
  353. mask &= ~(1 << key->hw_key_idx);
  354. rt2x00_set_field16(&reg, TXRX_CSR0_KEY_ID, mask);
  355. rt2500usb_register_write(rt2x00dev, TXRX_CSR0, reg);
  356. return 0;
  357. }
  358. static void rt2500usb_config_filter(struct rt2x00_dev *rt2x00dev,
  359. const unsigned int filter_flags)
  360. {
  361. u16 reg;
  362. /*
  363. * Start configuration steps.
  364. * Note that the version error will always be dropped
  365. * and broadcast frames will always be accepted since
  366. * there is no filter for it at this time.
  367. */
  368. rt2500usb_register_read(rt2x00dev, TXRX_CSR2, &reg);
  369. rt2x00_set_field16(&reg, TXRX_CSR2_DROP_CRC,
  370. !(filter_flags & FIF_FCSFAIL));
  371. rt2x00_set_field16(&reg, TXRX_CSR2_DROP_PHYSICAL,
  372. !(filter_flags & FIF_PLCPFAIL));
  373. rt2x00_set_field16(&reg, TXRX_CSR2_DROP_CONTROL,
  374. !(filter_flags & FIF_CONTROL));
  375. rt2x00_set_field16(&reg, TXRX_CSR2_DROP_NOT_TO_ME,
  376. !(filter_flags & FIF_PROMISC_IN_BSS));
  377. rt2x00_set_field16(&reg, TXRX_CSR2_DROP_TODS,
  378. !(filter_flags & FIF_PROMISC_IN_BSS) &&
  379. !rt2x00dev->intf_ap_count);
  380. rt2x00_set_field16(&reg, TXRX_CSR2_DROP_VERSION_ERROR, 1);
  381. rt2x00_set_field16(&reg, TXRX_CSR2_DROP_MULTICAST,
  382. !(filter_flags & FIF_ALLMULTI));
  383. rt2x00_set_field16(&reg, TXRX_CSR2_DROP_BROADCAST, 0);
  384. rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg);
  385. }
  386. static void rt2500usb_config_intf(struct rt2x00_dev *rt2x00dev,
  387. struct rt2x00_intf *intf,
  388. struct rt2x00intf_conf *conf,
  389. const unsigned int flags)
  390. {
  391. unsigned int bcn_preload;
  392. u16 reg;
  393. if (flags & CONFIG_UPDATE_TYPE) {
  394. /*
  395. * Enable beacon config
  396. */
  397. bcn_preload = PREAMBLE + GET_DURATION(IEEE80211_HEADER, 20);
  398. rt2500usb_register_read(rt2x00dev, TXRX_CSR20, &reg);
  399. rt2x00_set_field16(&reg, TXRX_CSR20_OFFSET, bcn_preload >> 6);
  400. rt2x00_set_field16(&reg, TXRX_CSR20_BCN_EXPECT_WINDOW,
  401. 2 * (conf->type != NL80211_IFTYPE_STATION));
  402. rt2500usb_register_write(rt2x00dev, TXRX_CSR20, reg);
  403. /*
  404. * Enable synchronisation.
  405. */
  406. rt2500usb_register_read(rt2x00dev, TXRX_CSR18, &reg);
  407. rt2x00_set_field16(&reg, TXRX_CSR18_OFFSET, 0);
  408. rt2500usb_register_write(rt2x00dev, TXRX_CSR18, reg);
  409. rt2500usb_register_read(rt2x00dev, TXRX_CSR19, &reg);
  410. rt2x00_set_field16(&reg, TXRX_CSR19_TSF_COUNT, 1);
  411. rt2x00_set_field16(&reg, TXRX_CSR19_TSF_SYNC, conf->sync);
  412. rt2x00_set_field16(&reg, TXRX_CSR19_TBCN, 1);
  413. rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
  414. }
  415. if (flags & CONFIG_UPDATE_MAC)
  416. rt2500usb_register_multiwrite(rt2x00dev, MAC_CSR2, conf->mac,
  417. (3 * sizeof(__le16)));
  418. if (flags & CONFIG_UPDATE_BSSID)
  419. rt2500usb_register_multiwrite(rt2x00dev, MAC_CSR5, conf->bssid,
  420. (3 * sizeof(__le16)));
  421. }
  422. static void rt2500usb_config_erp(struct rt2x00_dev *rt2x00dev,
  423. struct rt2x00lib_erp *erp)
  424. {
  425. u16 reg;
  426. rt2500usb_register_read(rt2x00dev, TXRX_CSR1, &reg);
  427. rt2x00_set_field16(&reg, TXRX_CSR1_ACK_TIMEOUT, erp->ack_timeout);
  428. rt2500usb_register_write(rt2x00dev, TXRX_CSR1, reg);
  429. rt2500usb_register_read(rt2x00dev, TXRX_CSR10, &reg);
  430. rt2x00_set_field16(&reg, TXRX_CSR10_AUTORESPOND_PREAMBLE,
  431. !!erp->short_preamble);
  432. rt2500usb_register_write(rt2x00dev, TXRX_CSR10, reg);
  433. rt2500usb_register_write(rt2x00dev, TXRX_CSR11, erp->basic_rates);
  434. rt2500usb_register_write(rt2x00dev, MAC_CSR10, erp->slot_time);
  435. rt2500usb_register_write(rt2x00dev, MAC_CSR11, erp->sifs);
  436. rt2500usb_register_write(rt2x00dev, MAC_CSR12, erp->eifs);
  437. }
  438. static void rt2500usb_config_ant(struct rt2x00_dev *rt2x00dev,
  439. struct antenna_setup *ant)
  440. {
  441. u8 r2;
  442. u8 r14;
  443. u16 csr5;
  444. u16 csr6;
  445. /*
  446. * We should never come here because rt2x00lib is supposed
  447. * to catch this and send us the correct antenna explicitely.
  448. */
  449. BUG_ON(ant->rx == ANTENNA_SW_DIVERSITY ||
  450. ant->tx == ANTENNA_SW_DIVERSITY);
  451. rt2500usb_bbp_read(rt2x00dev, 2, &r2);
  452. rt2500usb_bbp_read(rt2x00dev, 14, &r14);
  453. rt2500usb_register_read(rt2x00dev, PHY_CSR5, &csr5);
  454. rt2500usb_register_read(rt2x00dev, PHY_CSR6, &csr6);
  455. /*
  456. * Configure the TX antenna.
  457. */
  458. switch (ant->tx) {
  459. case ANTENNA_HW_DIVERSITY:
  460. rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 1);
  461. rt2x00_set_field16(&csr5, PHY_CSR5_CCK, 1);
  462. rt2x00_set_field16(&csr6, PHY_CSR6_OFDM, 1);
  463. break;
  464. case ANTENNA_A:
  465. rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 0);
  466. rt2x00_set_field16(&csr5, PHY_CSR5_CCK, 0);
  467. rt2x00_set_field16(&csr6, PHY_CSR6_OFDM, 0);
  468. break;
  469. case ANTENNA_B:
  470. default:
  471. rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 2);
  472. rt2x00_set_field16(&csr5, PHY_CSR5_CCK, 2);
  473. rt2x00_set_field16(&csr6, PHY_CSR6_OFDM, 2);
  474. break;
  475. }
  476. /*
  477. * Configure the RX antenna.
  478. */
  479. switch (ant->rx) {
  480. case ANTENNA_HW_DIVERSITY:
  481. rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 1);
  482. break;
  483. case ANTENNA_A:
  484. rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 0);
  485. break;
  486. case ANTENNA_B:
  487. default:
  488. rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 2);
  489. break;
  490. }
  491. /*
  492. * RT2525E and RT5222 need to flip TX I/Q
  493. */
  494. if (rt2x00_rf(&rt2x00dev->chip, RF2525E) ||
  495. rt2x00_rf(&rt2x00dev->chip, RF5222)) {
  496. rt2x00_set_field8(&r2, BBP_R2_TX_IQ_FLIP, 1);
  497. rt2x00_set_field16(&csr5, PHY_CSR5_CCK_FLIP, 1);
  498. rt2x00_set_field16(&csr6, PHY_CSR6_OFDM_FLIP, 1);
  499. /*
  500. * RT2525E does not need RX I/Q Flip.
  501. */
  502. if (rt2x00_rf(&rt2x00dev->chip, RF2525E))
  503. rt2x00_set_field8(&r14, BBP_R14_RX_IQ_FLIP, 0);
  504. } else {
  505. rt2x00_set_field16(&csr5, PHY_CSR5_CCK_FLIP, 0);
  506. rt2x00_set_field16(&csr6, PHY_CSR6_OFDM_FLIP, 0);
  507. }
  508. rt2500usb_bbp_write(rt2x00dev, 2, r2);
  509. rt2500usb_bbp_write(rt2x00dev, 14, r14);
  510. rt2500usb_register_write(rt2x00dev, PHY_CSR5, csr5);
  511. rt2500usb_register_write(rt2x00dev, PHY_CSR6, csr6);
  512. }
  513. static void rt2500usb_config_channel(struct rt2x00_dev *rt2x00dev,
  514. struct rf_channel *rf, const int txpower)
  515. {
  516. /*
  517. * Set TXpower.
  518. */
  519. rt2x00_set_field32(&rf->rf3, RF3_TXPOWER, TXPOWER_TO_DEV(txpower));
  520. /*
  521. * For RT2525E we should first set the channel to half band higher.
  522. */
  523. if (rt2x00_rf(&rt2x00dev->chip, RF2525E)) {
  524. static const u32 vals[] = {
  525. 0x000008aa, 0x000008ae, 0x000008ae, 0x000008b2,
  526. 0x000008b2, 0x000008b6, 0x000008b6, 0x000008ba,
  527. 0x000008ba, 0x000008be, 0x000008b7, 0x00000902,
  528. 0x00000902, 0x00000906
  529. };
  530. rt2500usb_rf_write(rt2x00dev, 2, vals[rf->channel - 1]);
  531. if (rf->rf4)
  532. rt2500usb_rf_write(rt2x00dev, 4, rf->rf4);
  533. }
  534. rt2500usb_rf_write(rt2x00dev, 1, rf->rf1);
  535. rt2500usb_rf_write(rt2x00dev, 2, rf->rf2);
  536. rt2500usb_rf_write(rt2x00dev, 3, rf->rf3);
  537. if (rf->rf4)
  538. rt2500usb_rf_write(rt2x00dev, 4, rf->rf4);
  539. }
  540. static void rt2500usb_config_txpower(struct rt2x00_dev *rt2x00dev,
  541. const int txpower)
  542. {
  543. u32 rf3;
  544. rt2x00_rf_read(rt2x00dev, 3, &rf3);
  545. rt2x00_set_field32(&rf3, RF3_TXPOWER, TXPOWER_TO_DEV(txpower));
  546. rt2500usb_rf_write(rt2x00dev, 3, rf3);
  547. }
  548. static void rt2500usb_config_duration(struct rt2x00_dev *rt2x00dev,
  549. struct rt2x00lib_conf *libconf)
  550. {
  551. u16 reg;
  552. rt2500usb_register_read(rt2x00dev, TXRX_CSR18, &reg);
  553. rt2x00_set_field16(&reg, TXRX_CSR18_INTERVAL,
  554. libconf->conf->beacon_int * 4);
  555. rt2500usb_register_write(rt2x00dev, TXRX_CSR18, reg);
  556. }
  557. static void rt2500usb_config_ps(struct rt2x00_dev *rt2x00dev,
  558. struct rt2x00lib_conf *libconf)
  559. {
  560. enum dev_state state =
  561. (libconf->conf->flags & IEEE80211_CONF_PS) ?
  562. STATE_SLEEP : STATE_AWAKE;
  563. u16 reg;
  564. if (state == STATE_SLEEP) {
  565. rt2500usb_register_read(rt2x00dev, MAC_CSR18, &reg);
  566. rt2x00_set_field16(&reg, MAC_CSR18_DELAY_AFTER_BEACON,
  567. libconf->conf->beacon_int - 20);
  568. rt2x00_set_field16(&reg, MAC_CSR18_BEACONS_BEFORE_WAKEUP,
  569. libconf->conf->listen_interval - 1);
  570. /* We must first disable autowake before it can be enabled */
  571. rt2x00_set_field16(&reg, MAC_CSR18_AUTO_WAKE, 0);
  572. rt2500usb_register_write(rt2x00dev, MAC_CSR18, reg);
  573. rt2x00_set_field16(&reg, MAC_CSR18_AUTO_WAKE, 1);
  574. rt2500usb_register_write(rt2x00dev, MAC_CSR18, reg);
  575. }
  576. rt2x00dev->ops->lib->set_device_state(rt2x00dev, state);
  577. }
  578. static void rt2500usb_config(struct rt2x00_dev *rt2x00dev,
  579. struct rt2x00lib_conf *libconf,
  580. const unsigned int flags)
  581. {
  582. if (flags & IEEE80211_CONF_CHANGE_CHANNEL)
  583. rt2500usb_config_channel(rt2x00dev, &libconf->rf,
  584. libconf->conf->power_level);
  585. if ((flags & IEEE80211_CONF_CHANGE_POWER) &&
  586. !(flags & IEEE80211_CONF_CHANGE_CHANNEL))
  587. rt2500usb_config_txpower(rt2x00dev,
  588. libconf->conf->power_level);
  589. if (flags & IEEE80211_CONF_CHANGE_BEACON_INTERVAL)
  590. rt2500usb_config_duration(rt2x00dev, libconf);
  591. if (flags & IEEE80211_CONF_CHANGE_PS)
  592. rt2500usb_config_ps(rt2x00dev, libconf);
  593. }
  594. /*
  595. * Link tuning
  596. */
  597. static void rt2500usb_link_stats(struct rt2x00_dev *rt2x00dev,
  598. struct link_qual *qual)
  599. {
  600. u16 reg;
  601. /*
  602. * Update FCS error count from register.
  603. */
  604. rt2500usb_register_read(rt2x00dev, STA_CSR0, &reg);
  605. qual->rx_failed = rt2x00_get_field16(reg, STA_CSR0_FCS_ERROR);
  606. /*
  607. * Update False CCA count from register.
  608. */
  609. rt2500usb_register_read(rt2x00dev, STA_CSR3, &reg);
  610. qual->false_cca = rt2x00_get_field16(reg, STA_CSR3_FALSE_CCA_ERROR);
  611. }
  612. static void rt2500usb_reset_tuner(struct rt2x00_dev *rt2x00dev,
  613. struct link_qual *qual)
  614. {
  615. u16 eeprom;
  616. u16 value;
  617. rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R24, &eeprom);
  618. value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_R24_LOW);
  619. rt2500usb_bbp_write(rt2x00dev, 24, value);
  620. rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R25, &eeprom);
  621. value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_R25_LOW);
  622. rt2500usb_bbp_write(rt2x00dev, 25, value);
  623. rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R61, &eeprom);
  624. value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_R61_LOW);
  625. rt2500usb_bbp_write(rt2x00dev, 61, value);
  626. rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_VGC, &eeprom);
  627. value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_VGCUPPER);
  628. rt2500usb_bbp_write(rt2x00dev, 17, value);
  629. qual->vgc_level = value;
  630. }
  631. /*
  632. * NOTE: This function is directly ported from legacy driver, but
  633. * despite it being declared it was never called. Although link tuning
  634. * sounds like a good idea, and usually works well for the other drivers,
  635. * it does _not_ work with rt2500usb. Enabling this function will result
  636. * in TX capabilities only until association kicks in. Immediately
  637. * after the successful association all TX frames will be kept in the
  638. * hardware queue and never transmitted.
  639. */
  640. #if 0
  641. static void rt2500usb_link_tuner(struct rt2x00_dev *rt2x00dev)
  642. {
  643. int rssi = rt2x00_get_link_rssi(&rt2x00dev->link);
  644. u16 bbp_thresh;
  645. u16 vgc_bound;
  646. u16 sens;
  647. u16 r24;
  648. u16 r25;
  649. u16 r61;
  650. u16 r17_sens;
  651. u8 r17;
  652. u8 up_bound;
  653. u8 low_bound;
  654. /*
  655. * Read current r17 value, as well as the sensitivity values
  656. * for the r17 register.
  657. */
  658. rt2500usb_bbp_read(rt2x00dev, 17, &r17);
  659. rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R17, &r17_sens);
  660. rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_VGC, &vgc_bound);
  661. up_bound = rt2x00_get_field16(vgc_bound, EEPROM_BBPTUNE_VGCUPPER);
  662. low_bound = rt2x00_get_field16(vgc_bound, EEPROM_BBPTUNE_VGCLOWER);
  663. /*
  664. * If we are not associated, we should go straight to the
  665. * dynamic CCA tuning.
  666. */
  667. if (!rt2x00dev->intf_associated)
  668. goto dynamic_cca_tune;
  669. /*
  670. * Determine the BBP tuning threshold and correctly
  671. * set BBP 24, 25 and 61.
  672. */
  673. rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE, &bbp_thresh);
  674. bbp_thresh = rt2x00_get_field16(bbp_thresh, EEPROM_BBPTUNE_THRESHOLD);
  675. rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R24, &r24);
  676. rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R25, &r25);
  677. rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R61, &r61);
  678. if ((rssi + bbp_thresh) > 0) {
  679. r24 = rt2x00_get_field16(r24, EEPROM_BBPTUNE_R24_HIGH);
  680. r25 = rt2x00_get_field16(r25, EEPROM_BBPTUNE_R25_HIGH);
  681. r61 = rt2x00_get_field16(r61, EEPROM_BBPTUNE_R61_HIGH);
  682. } else {
  683. r24 = rt2x00_get_field16(r24, EEPROM_BBPTUNE_R24_LOW);
  684. r25 = rt2x00_get_field16(r25, EEPROM_BBPTUNE_R25_LOW);
  685. r61 = rt2x00_get_field16(r61, EEPROM_BBPTUNE_R61_LOW);
  686. }
  687. rt2500usb_bbp_write(rt2x00dev, 24, r24);
  688. rt2500usb_bbp_write(rt2x00dev, 25, r25);
  689. rt2500usb_bbp_write(rt2x00dev, 61, r61);
  690. /*
  691. * A too low RSSI will cause too much false CCA which will
  692. * then corrupt the R17 tuning. To remidy this the tuning should
  693. * be stopped (While making sure the R17 value will not exceed limits)
  694. */
  695. if (rssi >= -40) {
  696. if (r17 != 0x60)
  697. rt2500usb_bbp_write(rt2x00dev, 17, 0x60);
  698. return;
  699. }
  700. /*
  701. * Special big-R17 for short distance
  702. */
  703. if (rssi >= -58) {
  704. sens = rt2x00_get_field16(r17_sens, EEPROM_BBPTUNE_R17_LOW);
  705. if (r17 != sens)
  706. rt2500usb_bbp_write(rt2x00dev, 17, sens);
  707. return;
  708. }
  709. /*
  710. * Special mid-R17 for middle distance
  711. */
  712. if (rssi >= -74) {
  713. sens = rt2x00_get_field16(r17_sens, EEPROM_BBPTUNE_R17_HIGH);
  714. if (r17 != sens)
  715. rt2500usb_bbp_write(rt2x00dev, 17, sens);
  716. return;
  717. }
  718. /*
  719. * Leave short or middle distance condition, restore r17
  720. * to the dynamic tuning range.
  721. */
  722. low_bound = 0x32;
  723. if (rssi < -77)
  724. up_bound -= (-77 - rssi);
  725. if (up_bound < low_bound)
  726. up_bound = low_bound;
  727. if (r17 > up_bound) {
  728. rt2500usb_bbp_write(rt2x00dev, 17, up_bound);
  729. rt2x00dev->link.vgc_level = up_bound;
  730. return;
  731. }
  732. dynamic_cca_tune:
  733. /*
  734. * R17 is inside the dynamic tuning range,
  735. * start tuning the link based on the false cca counter.
  736. */
  737. if (rt2x00dev->link.qual.false_cca > 512 && r17 < up_bound) {
  738. rt2500usb_bbp_write(rt2x00dev, 17, ++r17);
  739. rt2x00dev->link.vgc_level = r17;
  740. } else if (rt2x00dev->link.qual.false_cca < 100 && r17 > low_bound) {
  741. rt2500usb_bbp_write(rt2x00dev, 17, --r17);
  742. rt2x00dev->link.vgc_level = r17;
  743. }
  744. }
  745. #else
  746. #define rt2500usb_link_tuner NULL
  747. #endif
  748. /*
  749. * Initialization functions.
  750. */
  751. static int rt2500usb_init_registers(struct rt2x00_dev *rt2x00dev)
  752. {
  753. u16 reg;
  754. rt2x00usb_vendor_request_sw(rt2x00dev, USB_DEVICE_MODE, 0x0001,
  755. USB_MODE_TEST, REGISTER_TIMEOUT);
  756. rt2x00usb_vendor_request_sw(rt2x00dev, USB_SINGLE_WRITE, 0x0308,
  757. 0x00f0, REGISTER_TIMEOUT);
  758. rt2500usb_register_read(rt2x00dev, TXRX_CSR2, &reg);
  759. rt2x00_set_field16(&reg, TXRX_CSR2_DISABLE_RX, 1);
  760. rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg);
  761. rt2500usb_register_write(rt2x00dev, MAC_CSR13, 0x1111);
  762. rt2500usb_register_write(rt2x00dev, MAC_CSR14, 0x1e11);
  763. rt2500usb_register_read(rt2x00dev, MAC_CSR1, &reg);
  764. rt2x00_set_field16(&reg, MAC_CSR1_SOFT_RESET, 1);
  765. rt2x00_set_field16(&reg, MAC_CSR1_BBP_RESET, 1);
  766. rt2x00_set_field16(&reg, MAC_CSR1_HOST_READY, 0);
  767. rt2500usb_register_write(rt2x00dev, MAC_CSR1, reg);
  768. rt2500usb_register_read(rt2x00dev, MAC_CSR1, &reg);
  769. rt2x00_set_field16(&reg, MAC_CSR1_SOFT_RESET, 0);
  770. rt2x00_set_field16(&reg, MAC_CSR1_BBP_RESET, 0);
  771. rt2x00_set_field16(&reg, MAC_CSR1_HOST_READY, 0);
  772. rt2500usb_register_write(rt2x00dev, MAC_CSR1, reg);
  773. rt2500usb_register_read(rt2x00dev, TXRX_CSR5, &reg);
  774. rt2x00_set_field16(&reg, TXRX_CSR5_BBP_ID0, 13);
  775. rt2x00_set_field16(&reg, TXRX_CSR5_BBP_ID0_VALID, 1);
  776. rt2x00_set_field16(&reg, TXRX_CSR5_BBP_ID1, 12);
  777. rt2x00_set_field16(&reg, TXRX_CSR5_BBP_ID1_VALID, 1);
  778. rt2500usb_register_write(rt2x00dev, TXRX_CSR5, reg);
  779. rt2500usb_register_read(rt2x00dev, TXRX_CSR6, &reg);
  780. rt2x00_set_field16(&reg, TXRX_CSR6_BBP_ID0, 10);
  781. rt2x00_set_field16(&reg, TXRX_CSR6_BBP_ID0_VALID, 1);
  782. rt2x00_set_field16(&reg, TXRX_CSR6_BBP_ID1, 11);
  783. rt2x00_set_field16(&reg, TXRX_CSR6_BBP_ID1_VALID, 1);
  784. rt2500usb_register_write(rt2x00dev, TXRX_CSR6, reg);
  785. rt2500usb_register_read(rt2x00dev, TXRX_CSR7, &reg);
  786. rt2x00_set_field16(&reg, TXRX_CSR7_BBP_ID0, 7);
  787. rt2x00_set_field16(&reg, TXRX_CSR7_BBP_ID0_VALID, 1);
  788. rt2x00_set_field16(&reg, TXRX_CSR7_BBP_ID1, 6);
  789. rt2x00_set_field16(&reg, TXRX_CSR7_BBP_ID1_VALID, 1);
  790. rt2500usb_register_write(rt2x00dev, TXRX_CSR7, reg);
  791. rt2500usb_register_read(rt2x00dev, TXRX_CSR8, &reg);
  792. rt2x00_set_field16(&reg, TXRX_CSR8_BBP_ID0, 5);
  793. rt2x00_set_field16(&reg, TXRX_CSR8_BBP_ID0_VALID, 1);
  794. rt2x00_set_field16(&reg, TXRX_CSR8_BBP_ID1, 0);
  795. rt2x00_set_field16(&reg, TXRX_CSR8_BBP_ID1_VALID, 0);
  796. rt2500usb_register_write(rt2x00dev, TXRX_CSR8, reg);
  797. rt2500usb_register_read(rt2x00dev, TXRX_CSR19, &reg);
  798. rt2x00_set_field16(&reg, TXRX_CSR19_TSF_COUNT, 0);
  799. rt2x00_set_field16(&reg, TXRX_CSR19_TSF_SYNC, 0);
  800. rt2x00_set_field16(&reg, TXRX_CSR19_TBCN, 0);
  801. rt2x00_set_field16(&reg, TXRX_CSR19_BEACON_GEN, 0);
  802. rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
  803. rt2500usb_register_write(rt2x00dev, TXRX_CSR21, 0xe78f);
  804. rt2500usb_register_write(rt2x00dev, MAC_CSR9, 0xff1d);
  805. if (rt2x00dev->ops->lib->set_device_state(rt2x00dev, STATE_AWAKE))
  806. return -EBUSY;
  807. rt2500usb_register_read(rt2x00dev, MAC_CSR1, &reg);
  808. rt2x00_set_field16(&reg, MAC_CSR1_SOFT_RESET, 0);
  809. rt2x00_set_field16(&reg, MAC_CSR1_BBP_RESET, 0);
  810. rt2x00_set_field16(&reg, MAC_CSR1_HOST_READY, 1);
  811. rt2500usb_register_write(rt2x00dev, MAC_CSR1, reg);
  812. if (rt2x00_rev(&rt2x00dev->chip) >= RT2570_VERSION_C) {
  813. rt2500usb_register_read(rt2x00dev, PHY_CSR2, &reg);
  814. rt2x00_set_field16(&reg, PHY_CSR2_LNA, 0);
  815. } else {
  816. reg = 0;
  817. rt2x00_set_field16(&reg, PHY_CSR2_LNA, 1);
  818. rt2x00_set_field16(&reg, PHY_CSR2_LNA_MODE, 3);
  819. }
  820. rt2500usb_register_write(rt2x00dev, PHY_CSR2, reg);
  821. rt2500usb_register_write(rt2x00dev, MAC_CSR11, 0x0002);
  822. rt2500usb_register_write(rt2x00dev, MAC_CSR22, 0x0053);
  823. rt2500usb_register_write(rt2x00dev, MAC_CSR15, 0x01ee);
  824. rt2500usb_register_write(rt2x00dev, MAC_CSR16, 0x0000);
  825. rt2500usb_register_read(rt2x00dev, MAC_CSR8, &reg);
  826. rt2x00_set_field16(&reg, MAC_CSR8_MAX_FRAME_UNIT,
  827. rt2x00dev->rx->data_size);
  828. rt2500usb_register_write(rt2x00dev, MAC_CSR8, reg);
  829. rt2500usb_register_read(rt2x00dev, TXRX_CSR0, &reg);
  830. rt2x00_set_field16(&reg, TXRX_CSR0_IV_OFFSET, IEEE80211_HEADER);
  831. rt2x00_set_field16(&reg, TXRX_CSR0_KEY_ID, 0);
  832. rt2500usb_register_write(rt2x00dev, TXRX_CSR0, reg);
  833. rt2500usb_register_read(rt2x00dev, MAC_CSR18, &reg);
  834. rt2x00_set_field16(&reg, MAC_CSR18_DELAY_AFTER_BEACON, 90);
  835. rt2500usb_register_write(rt2x00dev, MAC_CSR18, reg);
  836. rt2500usb_register_read(rt2x00dev, PHY_CSR4, &reg);
  837. rt2x00_set_field16(&reg, PHY_CSR4_LOW_RF_LE, 1);
  838. rt2500usb_register_write(rt2x00dev, PHY_CSR4, reg);
  839. rt2500usb_register_read(rt2x00dev, TXRX_CSR1, &reg);
  840. rt2x00_set_field16(&reg, TXRX_CSR1_AUTO_SEQUENCE, 1);
  841. rt2500usb_register_write(rt2x00dev, TXRX_CSR1, reg);
  842. return 0;
  843. }
  844. static int rt2500usb_wait_bbp_ready(struct rt2x00_dev *rt2x00dev)
  845. {
  846. unsigned int i;
  847. u8 value;
  848. for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
  849. rt2500usb_bbp_read(rt2x00dev, 0, &value);
  850. if ((value != 0xff) && (value != 0x00))
  851. return 0;
  852. udelay(REGISTER_BUSY_DELAY);
  853. }
  854. ERROR(rt2x00dev, "BBP register access failed, aborting.\n");
  855. return -EACCES;
  856. }
  857. static int rt2500usb_init_bbp(struct rt2x00_dev *rt2x00dev)
  858. {
  859. unsigned int i;
  860. u16 eeprom;
  861. u8 value;
  862. u8 reg_id;
  863. if (unlikely(rt2500usb_wait_bbp_ready(rt2x00dev)))
  864. return -EACCES;
  865. rt2500usb_bbp_write(rt2x00dev, 3, 0x02);
  866. rt2500usb_bbp_write(rt2x00dev, 4, 0x19);
  867. rt2500usb_bbp_write(rt2x00dev, 14, 0x1c);
  868. rt2500usb_bbp_write(rt2x00dev, 15, 0x30);
  869. rt2500usb_bbp_write(rt2x00dev, 16, 0xac);
  870. rt2500usb_bbp_write(rt2x00dev, 18, 0x18);
  871. rt2500usb_bbp_write(rt2x00dev, 19, 0xff);
  872. rt2500usb_bbp_write(rt2x00dev, 20, 0x1e);
  873. rt2500usb_bbp_write(rt2x00dev, 21, 0x08);
  874. rt2500usb_bbp_write(rt2x00dev, 22, 0x08);
  875. rt2500usb_bbp_write(rt2x00dev, 23, 0x08);
  876. rt2500usb_bbp_write(rt2x00dev, 24, 0x80);
  877. rt2500usb_bbp_write(rt2x00dev, 25, 0x50);
  878. rt2500usb_bbp_write(rt2x00dev, 26, 0x08);
  879. rt2500usb_bbp_write(rt2x00dev, 27, 0x23);
  880. rt2500usb_bbp_write(rt2x00dev, 30, 0x10);
  881. rt2500usb_bbp_write(rt2x00dev, 31, 0x2b);
  882. rt2500usb_bbp_write(rt2x00dev, 32, 0xb9);
  883. rt2500usb_bbp_write(rt2x00dev, 34, 0x12);
  884. rt2500usb_bbp_write(rt2x00dev, 35, 0x50);
  885. rt2500usb_bbp_write(rt2x00dev, 39, 0xc4);
  886. rt2500usb_bbp_write(rt2x00dev, 40, 0x02);
  887. rt2500usb_bbp_write(rt2x00dev, 41, 0x60);
  888. rt2500usb_bbp_write(rt2x00dev, 53, 0x10);
  889. rt2500usb_bbp_write(rt2x00dev, 54, 0x18);
  890. rt2500usb_bbp_write(rt2x00dev, 56, 0x08);
  891. rt2500usb_bbp_write(rt2x00dev, 57, 0x10);
  892. rt2500usb_bbp_write(rt2x00dev, 58, 0x08);
  893. rt2500usb_bbp_write(rt2x00dev, 61, 0x60);
  894. rt2500usb_bbp_write(rt2x00dev, 62, 0x10);
  895. rt2500usb_bbp_write(rt2x00dev, 75, 0xff);
  896. for (i = 0; i < EEPROM_BBP_SIZE; i++) {
  897. rt2x00_eeprom_read(rt2x00dev, EEPROM_BBP_START + i, &eeprom);
  898. if (eeprom != 0xffff && eeprom != 0x0000) {
  899. reg_id = rt2x00_get_field16(eeprom, EEPROM_BBP_REG_ID);
  900. value = rt2x00_get_field16(eeprom, EEPROM_BBP_VALUE);
  901. rt2500usb_bbp_write(rt2x00dev, reg_id, value);
  902. }
  903. }
  904. return 0;
  905. }
  906. /*
  907. * Device state switch handlers.
  908. */
  909. static void rt2500usb_toggle_rx(struct rt2x00_dev *rt2x00dev,
  910. enum dev_state state)
  911. {
  912. u16 reg;
  913. rt2500usb_register_read(rt2x00dev, TXRX_CSR2, &reg);
  914. rt2x00_set_field16(&reg, TXRX_CSR2_DISABLE_RX,
  915. (state == STATE_RADIO_RX_OFF) ||
  916. (state == STATE_RADIO_RX_OFF_LINK));
  917. rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg);
  918. }
  919. static int rt2500usb_enable_radio(struct rt2x00_dev *rt2x00dev)
  920. {
  921. /*
  922. * Initialize all registers.
  923. */
  924. if (unlikely(rt2500usb_init_registers(rt2x00dev) ||
  925. rt2500usb_init_bbp(rt2x00dev)))
  926. return -EIO;
  927. return 0;
  928. }
  929. static void rt2500usb_disable_radio(struct rt2x00_dev *rt2x00dev)
  930. {
  931. rt2500usb_register_write(rt2x00dev, MAC_CSR13, 0x2121);
  932. rt2500usb_register_write(rt2x00dev, MAC_CSR14, 0x2121);
  933. /*
  934. * Disable synchronisation.
  935. */
  936. rt2500usb_register_write(rt2x00dev, TXRX_CSR19, 0);
  937. rt2x00usb_disable_radio(rt2x00dev);
  938. }
  939. static int rt2500usb_set_state(struct rt2x00_dev *rt2x00dev,
  940. enum dev_state state)
  941. {
  942. u16 reg;
  943. u16 reg2;
  944. unsigned int i;
  945. char put_to_sleep;
  946. char bbp_state;
  947. char rf_state;
  948. put_to_sleep = (state != STATE_AWAKE);
  949. reg = 0;
  950. rt2x00_set_field16(&reg, MAC_CSR17_BBP_DESIRE_STATE, state);
  951. rt2x00_set_field16(&reg, MAC_CSR17_RF_DESIRE_STATE, state);
  952. rt2x00_set_field16(&reg, MAC_CSR17_PUT_TO_SLEEP, put_to_sleep);
  953. rt2500usb_register_write(rt2x00dev, MAC_CSR17, reg);
  954. rt2x00_set_field16(&reg, MAC_CSR17_SET_STATE, 1);
  955. rt2500usb_register_write(rt2x00dev, MAC_CSR17, reg);
  956. /*
  957. * Device is not guaranteed to be in the requested state yet.
  958. * We must wait until the register indicates that the
  959. * device has entered the correct state.
  960. */
  961. for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
  962. rt2500usb_register_read(rt2x00dev, MAC_CSR17, &reg2);
  963. bbp_state = rt2x00_get_field16(reg2, MAC_CSR17_BBP_CURR_STATE);
  964. rf_state = rt2x00_get_field16(reg2, MAC_CSR17_RF_CURR_STATE);
  965. if (bbp_state == state && rf_state == state)
  966. return 0;
  967. rt2500usb_register_write(rt2x00dev, MAC_CSR17, reg);
  968. msleep(30);
  969. }
  970. return -EBUSY;
  971. }
  972. static int rt2500usb_set_device_state(struct rt2x00_dev *rt2x00dev,
  973. enum dev_state state)
  974. {
  975. int retval = 0;
  976. switch (state) {
  977. case STATE_RADIO_ON:
  978. retval = rt2500usb_enable_radio(rt2x00dev);
  979. break;
  980. case STATE_RADIO_OFF:
  981. rt2500usb_disable_radio(rt2x00dev);
  982. break;
  983. case STATE_RADIO_RX_ON:
  984. case STATE_RADIO_RX_ON_LINK:
  985. case STATE_RADIO_RX_OFF:
  986. case STATE_RADIO_RX_OFF_LINK:
  987. rt2500usb_toggle_rx(rt2x00dev, state);
  988. break;
  989. case STATE_RADIO_IRQ_ON:
  990. case STATE_RADIO_IRQ_OFF:
  991. /* No support, but no error either */
  992. break;
  993. case STATE_DEEP_SLEEP:
  994. case STATE_SLEEP:
  995. case STATE_STANDBY:
  996. case STATE_AWAKE:
  997. retval = rt2500usb_set_state(rt2x00dev, state);
  998. break;
  999. default:
  1000. retval = -ENOTSUPP;
  1001. break;
  1002. }
  1003. if (unlikely(retval))
  1004. ERROR(rt2x00dev, "Device failed to enter state %d (%d).\n",
  1005. state, retval);
  1006. return retval;
  1007. }
  1008. /*
  1009. * TX descriptor initialization
  1010. */
  1011. static void rt2500usb_write_tx_desc(struct rt2x00_dev *rt2x00dev,
  1012. struct sk_buff *skb,
  1013. struct txentry_desc *txdesc)
  1014. {
  1015. struct skb_frame_desc *skbdesc = get_skb_frame_desc(skb);
  1016. __le32 *txd = skbdesc->desc;
  1017. u32 word;
  1018. /*
  1019. * Start writing the descriptor words.
  1020. */
  1021. rt2x00_desc_read(txd, 1, &word);
  1022. rt2x00_set_field32(&word, TXD_W1_IV_OFFSET, txdesc->iv_offset);
  1023. rt2x00_set_field32(&word, TXD_W1_AIFS, txdesc->aifs);
  1024. rt2x00_set_field32(&word, TXD_W1_CWMIN, txdesc->cw_min);
  1025. rt2x00_set_field32(&word, TXD_W1_CWMAX, txdesc->cw_max);
  1026. rt2x00_desc_write(txd, 1, word);
  1027. rt2x00_desc_read(txd, 2, &word);
  1028. rt2x00_set_field32(&word, TXD_W2_PLCP_SIGNAL, txdesc->signal);
  1029. rt2x00_set_field32(&word, TXD_W2_PLCP_SERVICE, txdesc->service);
  1030. rt2x00_set_field32(&word, TXD_W2_PLCP_LENGTH_LOW, txdesc->length_low);
  1031. rt2x00_set_field32(&word, TXD_W2_PLCP_LENGTH_HIGH, txdesc->length_high);
  1032. rt2x00_desc_write(txd, 2, word);
  1033. if (test_bit(ENTRY_TXD_ENCRYPT, &txdesc->flags)) {
  1034. _rt2x00_desc_write(txd, 3, skbdesc->iv[0]);
  1035. _rt2x00_desc_write(txd, 4, skbdesc->iv[1]);
  1036. }
  1037. rt2x00_desc_read(txd, 0, &word);
  1038. rt2x00_set_field32(&word, TXD_W0_RETRY_LIMIT, txdesc->retry_limit);
  1039. rt2x00_set_field32(&word, TXD_W0_MORE_FRAG,
  1040. test_bit(ENTRY_TXD_MORE_FRAG, &txdesc->flags));
  1041. rt2x00_set_field32(&word, TXD_W0_ACK,
  1042. test_bit(ENTRY_TXD_ACK, &txdesc->flags));
  1043. rt2x00_set_field32(&word, TXD_W0_TIMESTAMP,
  1044. test_bit(ENTRY_TXD_REQ_TIMESTAMP, &txdesc->flags));
  1045. rt2x00_set_field32(&word, TXD_W0_OFDM,
  1046. (txdesc->rate_mode == RATE_MODE_OFDM));
  1047. rt2x00_set_field32(&word, TXD_W0_NEW_SEQ,
  1048. test_bit(ENTRY_TXD_FIRST_FRAGMENT, &txdesc->flags));
  1049. rt2x00_set_field32(&word, TXD_W0_IFS, txdesc->ifs);
  1050. rt2x00_set_field32(&word, TXD_W0_DATABYTE_COUNT, skb->len);
  1051. rt2x00_set_field32(&word, TXD_W0_CIPHER, !!txdesc->cipher);
  1052. rt2x00_set_field32(&word, TXD_W0_KEY_ID, txdesc->key_idx);
  1053. rt2x00_desc_write(txd, 0, word);
  1054. }
  1055. /*
  1056. * TX data initialization
  1057. */
  1058. static void rt2500usb_beacondone(struct urb *urb);
  1059. static void rt2500usb_write_beacon(struct queue_entry *entry)
  1060. {
  1061. struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
  1062. struct usb_device *usb_dev = to_usb_device_intf(rt2x00dev->dev);
  1063. struct queue_entry_priv_usb_bcn *bcn_priv = entry->priv_data;
  1064. struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb);
  1065. int pipe = usb_sndbulkpipe(usb_dev, entry->queue->usb_endpoint);
  1066. int length;
  1067. u16 reg;
  1068. /*
  1069. * Add the descriptor in front of the skb.
  1070. */
  1071. skb_push(entry->skb, entry->queue->desc_size);
  1072. memcpy(entry->skb->data, skbdesc->desc, skbdesc->desc_len);
  1073. skbdesc->desc = entry->skb->data;
  1074. /*
  1075. * Disable beaconing while we are reloading the beacon data,
  1076. * otherwise we might be sending out invalid data.
  1077. */
  1078. rt2500usb_register_read(rt2x00dev, TXRX_CSR19, &reg);
  1079. rt2x00_set_field16(&reg, TXRX_CSR19_TSF_COUNT, 0);
  1080. rt2x00_set_field16(&reg, TXRX_CSR19_TBCN, 0);
  1081. rt2x00_set_field16(&reg, TXRX_CSR19_BEACON_GEN, 0);
  1082. rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
  1083. /*
  1084. * USB devices cannot blindly pass the skb->len as the
  1085. * length of the data to usb_fill_bulk_urb. Pass the skb
  1086. * to the driver to determine what the length should be.
  1087. */
  1088. length = rt2x00dev->ops->lib->get_tx_data_len(entry);
  1089. usb_fill_bulk_urb(bcn_priv->urb, usb_dev, pipe,
  1090. entry->skb->data, length, rt2500usb_beacondone,
  1091. entry);
  1092. /*
  1093. * Second we need to create the guardian byte.
  1094. * We only need a single byte, so lets recycle
  1095. * the 'flags' field we are not using for beacons.
  1096. */
  1097. bcn_priv->guardian_data = 0;
  1098. usb_fill_bulk_urb(bcn_priv->guardian_urb, usb_dev, pipe,
  1099. &bcn_priv->guardian_data, 1, rt2500usb_beacondone,
  1100. entry);
  1101. /*
  1102. * Send out the guardian byte.
  1103. */
  1104. usb_submit_urb(bcn_priv->guardian_urb, GFP_ATOMIC);
  1105. }
  1106. static int rt2500usb_get_tx_data_len(struct queue_entry *entry)
  1107. {
  1108. int length;
  1109. /*
  1110. * The length _must_ be a multiple of 2,
  1111. * but it must _not_ be a multiple of the USB packet size.
  1112. */
  1113. length = roundup(entry->skb->len, 2);
  1114. length += (2 * !(length % entry->queue->usb_maxpacket));
  1115. return length;
  1116. }
  1117. static void rt2500usb_kick_tx_queue(struct rt2x00_dev *rt2x00dev,
  1118. const enum data_queue_qid queue)
  1119. {
  1120. u16 reg;
  1121. if (queue != QID_BEACON) {
  1122. rt2x00usb_kick_tx_queue(rt2x00dev, queue);
  1123. return;
  1124. }
  1125. rt2500usb_register_read(rt2x00dev, TXRX_CSR19, &reg);
  1126. if (!rt2x00_get_field16(reg, TXRX_CSR19_BEACON_GEN)) {
  1127. rt2x00_set_field16(&reg, TXRX_CSR19_TSF_COUNT, 1);
  1128. rt2x00_set_field16(&reg, TXRX_CSR19_TBCN, 1);
  1129. rt2x00_set_field16(&reg, TXRX_CSR19_BEACON_GEN, 1);
  1130. /*
  1131. * Beacon generation will fail initially.
  1132. * To prevent this we need to register the TXRX_CSR19
  1133. * register several times.
  1134. */
  1135. rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
  1136. rt2500usb_register_write(rt2x00dev, TXRX_CSR19, 0);
  1137. rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
  1138. rt2500usb_register_write(rt2x00dev, TXRX_CSR19, 0);
  1139. rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
  1140. }
  1141. }
  1142. /*
  1143. * RX control handlers
  1144. */
  1145. static void rt2500usb_fill_rxdone(struct queue_entry *entry,
  1146. struct rxdone_entry_desc *rxdesc)
  1147. {
  1148. struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
  1149. struct queue_entry_priv_usb *entry_priv = entry->priv_data;
  1150. struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb);
  1151. __le32 *rxd =
  1152. (__le32 *)(entry->skb->data +
  1153. (entry_priv->urb->actual_length -
  1154. entry->queue->desc_size));
  1155. u32 word0;
  1156. u32 word1;
  1157. /*
  1158. * Copy descriptor to the skbdesc->desc buffer, making it safe from moving of
  1159. * frame data in rt2x00usb.
  1160. */
  1161. memcpy(skbdesc->desc, rxd, skbdesc->desc_len);
  1162. rxd = (__le32 *)skbdesc->desc;
  1163. /*
  1164. * It is now safe to read the descriptor on all architectures.
  1165. */
  1166. rt2x00_desc_read(rxd, 0, &word0);
  1167. rt2x00_desc_read(rxd, 1, &word1);
  1168. if (rt2x00_get_field32(word0, RXD_W0_CRC_ERROR))
  1169. rxdesc->flags |= RX_FLAG_FAILED_FCS_CRC;
  1170. if (rt2x00_get_field32(word0, RXD_W0_PHYSICAL_ERROR))
  1171. rxdesc->flags |= RX_FLAG_FAILED_PLCP_CRC;
  1172. if (test_bit(CONFIG_SUPPORT_HW_CRYPTO, &rt2x00dev->flags)) {
  1173. rxdesc->cipher = rt2x00_get_field32(word0, RXD_W0_CIPHER);
  1174. if (rt2x00_get_field32(word0, RXD_W0_CIPHER_ERROR))
  1175. rxdesc->cipher_status = RX_CRYPTO_FAIL_KEY;
  1176. }
  1177. if (rxdesc->cipher != CIPHER_NONE) {
  1178. _rt2x00_desc_read(rxd, 2, &rxdesc->iv[0]);
  1179. _rt2x00_desc_read(rxd, 3, &rxdesc->iv[1]);
  1180. rxdesc->dev_flags |= RXDONE_CRYPTO_IV;
  1181. /* ICV is located at the end of frame */
  1182. rxdesc->flags |= RX_FLAG_MMIC_STRIPPED;
  1183. if (rxdesc->cipher_status == RX_CRYPTO_SUCCESS)
  1184. rxdesc->flags |= RX_FLAG_DECRYPTED;
  1185. else if (rxdesc->cipher_status == RX_CRYPTO_FAIL_MIC)
  1186. rxdesc->flags |= RX_FLAG_MMIC_ERROR;
  1187. }
  1188. /*
  1189. * Obtain the status about this packet.
  1190. * When frame was received with an OFDM bitrate,
  1191. * the signal is the PLCP value. If it was received with
  1192. * a CCK bitrate the signal is the rate in 100kbit/s.
  1193. */
  1194. rxdesc->signal = rt2x00_get_field32(word1, RXD_W1_SIGNAL);
  1195. rxdesc->rssi =
  1196. rt2x00_get_field32(word1, RXD_W1_RSSI) - rt2x00dev->rssi_offset;
  1197. rxdesc->size = rt2x00_get_field32(word0, RXD_W0_DATABYTE_COUNT);
  1198. if (rt2x00_get_field32(word0, RXD_W0_OFDM))
  1199. rxdesc->dev_flags |= RXDONE_SIGNAL_PLCP;
  1200. else
  1201. rxdesc->dev_flags |= RXDONE_SIGNAL_BITRATE;
  1202. if (rt2x00_get_field32(word0, RXD_W0_MY_BSS))
  1203. rxdesc->dev_flags |= RXDONE_MY_BSS;
  1204. /*
  1205. * Adjust the skb memory window to the frame boundaries.
  1206. */
  1207. skb_trim(entry->skb, rxdesc->size);
  1208. }
  1209. /*
  1210. * Interrupt functions.
  1211. */
  1212. static void rt2500usb_beacondone(struct urb *urb)
  1213. {
  1214. struct queue_entry *entry = (struct queue_entry *)urb->context;
  1215. struct queue_entry_priv_usb_bcn *bcn_priv = entry->priv_data;
  1216. if (!test_bit(DEVICE_STATE_ENABLED_RADIO, &entry->queue->rt2x00dev->flags))
  1217. return;
  1218. /*
  1219. * Check if this was the guardian beacon,
  1220. * if that was the case we need to send the real beacon now.
  1221. * Otherwise we should free the sk_buffer, the device
  1222. * should be doing the rest of the work now.
  1223. */
  1224. if (bcn_priv->guardian_urb == urb) {
  1225. usb_submit_urb(bcn_priv->urb, GFP_ATOMIC);
  1226. } else if (bcn_priv->urb == urb) {
  1227. dev_kfree_skb(entry->skb);
  1228. entry->skb = NULL;
  1229. }
  1230. }
  1231. /*
  1232. * Device probe functions.
  1233. */
  1234. static int rt2500usb_validate_eeprom(struct rt2x00_dev *rt2x00dev)
  1235. {
  1236. u16 word;
  1237. u8 *mac;
  1238. u8 bbp;
  1239. rt2x00usb_eeprom_read(rt2x00dev, rt2x00dev->eeprom, EEPROM_SIZE);
  1240. /*
  1241. * Start validation of the data that has been read.
  1242. */
  1243. mac = rt2x00_eeprom_addr(rt2x00dev, EEPROM_MAC_ADDR_0);
  1244. if (!is_valid_ether_addr(mac)) {
  1245. random_ether_addr(mac);
  1246. EEPROM(rt2x00dev, "MAC: %pM\n", mac);
  1247. }
  1248. rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &word);
  1249. if (word == 0xffff) {
  1250. rt2x00_set_field16(&word, EEPROM_ANTENNA_NUM, 2);
  1251. rt2x00_set_field16(&word, EEPROM_ANTENNA_TX_DEFAULT,
  1252. ANTENNA_SW_DIVERSITY);
  1253. rt2x00_set_field16(&word, EEPROM_ANTENNA_RX_DEFAULT,
  1254. ANTENNA_SW_DIVERSITY);
  1255. rt2x00_set_field16(&word, EEPROM_ANTENNA_LED_MODE,
  1256. LED_MODE_DEFAULT);
  1257. rt2x00_set_field16(&word, EEPROM_ANTENNA_DYN_TXAGC, 0);
  1258. rt2x00_set_field16(&word, EEPROM_ANTENNA_HARDWARE_RADIO, 0);
  1259. rt2x00_set_field16(&word, EEPROM_ANTENNA_RF_TYPE, RF2522);
  1260. rt2x00_eeprom_write(rt2x00dev, EEPROM_ANTENNA, word);
  1261. EEPROM(rt2x00dev, "Antenna: 0x%04x\n", word);
  1262. }
  1263. rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC, &word);
  1264. if (word == 0xffff) {
  1265. rt2x00_set_field16(&word, EEPROM_NIC_CARDBUS_ACCEL, 0);
  1266. rt2x00_set_field16(&word, EEPROM_NIC_DYN_BBP_TUNE, 0);
  1267. rt2x00_set_field16(&word, EEPROM_NIC_CCK_TX_POWER, 0);
  1268. rt2x00_eeprom_write(rt2x00dev, EEPROM_NIC, word);
  1269. EEPROM(rt2x00dev, "NIC: 0x%04x\n", word);
  1270. }
  1271. rt2x00_eeprom_read(rt2x00dev, EEPROM_CALIBRATE_OFFSET, &word);
  1272. if (word == 0xffff) {
  1273. rt2x00_set_field16(&word, EEPROM_CALIBRATE_OFFSET_RSSI,
  1274. DEFAULT_RSSI_OFFSET);
  1275. rt2x00_eeprom_write(rt2x00dev, EEPROM_CALIBRATE_OFFSET, word);
  1276. EEPROM(rt2x00dev, "Calibrate offset: 0x%04x\n", word);
  1277. }
  1278. rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE, &word);
  1279. if (word == 0xffff) {
  1280. rt2x00_set_field16(&word, EEPROM_BBPTUNE_THRESHOLD, 45);
  1281. rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE, word);
  1282. EEPROM(rt2x00dev, "BBPtune: 0x%04x\n", word);
  1283. }
  1284. /*
  1285. * Switch lower vgc bound to current BBP R17 value,
  1286. * lower the value a bit for better quality.
  1287. */
  1288. rt2500usb_bbp_read(rt2x00dev, 17, &bbp);
  1289. bbp -= 6;
  1290. rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_VGC, &word);
  1291. if (word == 0xffff) {
  1292. rt2x00_set_field16(&word, EEPROM_BBPTUNE_VGCUPPER, 0x40);
  1293. rt2x00_set_field16(&word, EEPROM_BBPTUNE_VGCLOWER, bbp);
  1294. rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_VGC, word);
  1295. EEPROM(rt2x00dev, "BBPtune vgc: 0x%04x\n", word);
  1296. } else {
  1297. rt2x00_set_field16(&word, EEPROM_BBPTUNE_VGCLOWER, bbp);
  1298. rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_VGC, word);
  1299. }
  1300. rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R17, &word);
  1301. if (word == 0xffff) {
  1302. rt2x00_set_field16(&word, EEPROM_BBPTUNE_R17_LOW, 0x48);
  1303. rt2x00_set_field16(&word, EEPROM_BBPTUNE_R17_HIGH, 0x41);
  1304. rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R17, word);
  1305. EEPROM(rt2x00dev, "BBPtune r17: 0x%04x\n", word);
  1306. }
  1307. rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R24, &word);
  1308. if (word == 0xffff) {
  1309. rt2x00_set_field16(&word, EEPROM_BBPTUNE_R24_LOW, 0x40);
  1310. rt2x00_set_field16(&word, EEPROM_BBPTUNE_R24_HIGH, 0x80);
  1311. rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R24, word);
  1312. EEPROM(rt2x00dev, "BBPtune r24: 0x%04x\n", word);
  1313. }
  1314. rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R25, &word);
  1315. if (word == 0xffff) {
  1316. rt2x00_set_field16(&word, EEPROM_BBPTUNE_R25_LOW, 0x40);
  1317. rt2x00_set_field16(&word, EEPROM_BBPTUNE_R25_HIGH, 0x50);
  1318. rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R25, word);
  1319. EEPROM(rt2x00dev, "BBPtune r25: 0x%04x\n", word);
  1320. }
  1321. rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R61, &word);
  1322. if (word == 0xffff) {
  1323. rt2x00_set_field16(&word, EEPROM_BBPTUNE_R61_LOW, 0x60);
  1324. rt2x00_set_field16(&word, EEPROM_BBPTUNE_R61_HIGH, 0x6d);
  1325. rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R61, word);
  1326. EEPROM(rt2x00dev, "BBPtune r61: 0x%04x\n", word);
  1327. }
  1328. return 0;
  1329. }
  1330. static int rt2500usb_init_eeprom(struct rt2x00_dev *rt2x00dev)
  1331. {
  1332. u16 reg;
  1333. u16 value;
  1334. u16 eeprom;
  1335. /*
  1336. * Read EEPROM word for configuration.
  1337. */
  1338. rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &eeprom);
  1339. /*
  1340. * Identify RF chipset.
  1341. */
  1342. value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RF_TYPE);
  1343. rt2500usb_register_read(rt2x00dev, MAC_CSR0, &reg);
  1344. rt2x00_set_chip(rt2x00dev, RT2570, value, reg);
  1345. if (!rt2x00_check_rev(&rt2x00dev->chip, 0)) {
  1346. ERROR(rt2x00dev, "Invalid RT chipset detected.\n");
  1347. return -ENODEV;
  1348. }
  1349. if (!rt2x00_rf(&rt2x00dev->chip, RF2522) &&
  1350. !rt2x00_rf(&rt2x00dev->chip, RF2523) &&
  1351. !rt2x00_rf(&rt2x00dev->chip, RF2524) &&
  1352. !rt2x00_rf(&rt2x00dev->chip, RF2525) &&
  1353. !rt2x00_rf(&rt2x00dev->chip, RF2525E) &&
  1354. !rt2x00_rf(&rt2x00dev->chip, RF5222)) {
  1355. ERROR(rt2x00dev, "Invalid RF chipset detected.\n");
  1356. return -ENODEV;
  1357. }
  1358. /*
  1359. * Identify default antenna configuration.
  1360. */
  1361. rt2x00dev->default_ant.tx =
  1362. rt2x00_get_field16(eeprom, EEPROM_ANTENNA_TX_DEFAULT);
  1363. rt2x00dev->default_ant.rx =
  1364. rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RX_DEFAULT);
  1365. /*
  1366. * When the eeprom indicates SW_DIVERSITY use HW_DIVERSITY instead.
  1367. * I am not 100% sure about this, but the legacy drivers do not
  1368. * indicate antenna swapping in software is required when
  1369. * diversity is enabled.
  1370. */
  1371. if (rt2x00dev->default_ant.tx == ANTENNA_SW_DIVERSITY)
  1372. rt2x00dev->default_ant.tx = ANTENNA_HW_DIVERSITY;
  1373. if (rt2x00dev->default_ant.rx == ANTENNA_SW_DIVERSITY)
  1374. rt2x00dev->default_ant.rx = ANTENNA_HW_DIVERSITY;
  1375. /*
  1376. * Store led mode, for correct led behaviour.
  1377. */
  1378. #ifdef CONFIG_RT2X00_LIB_LEDS
  1379. value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_LED_MODE);
  1380. rt2500usb_init_led(rt2x00dev, &rt2x00dev->led_radio, LED_TYPE_RADIO);
  1381. if (value == LED_MODE_TXRX_ACTIVITY ||
  1382. value == LED_MODE_DEFAULT ||
  1383. value == LED_MODE_ASUS)
  1384. rt2500usb_init_led(rt2x00dev, &rt2x00dev->led_qual,
  1385. LED_TYPE_ACTIVITY);
  1386. #endif /* CONFIG_RT2X00_LIB_LEDS */
  1387. /*
  1388. * Detect if this device has an hardware controlled radio.
  1389. */
  1390. #ifdef CONFIG_RT2X00_LIB_RFKILL
  1391. if (rt2x00_get_field16(eeprom, EEPROM_ANTENNA_HARDWARE_RADIO))
  1392. __set_bit(CONFIG_SUPPORT_HW_BUTTON, &rt2x00dev->flags);
  1393. #endif /* CONFIG_RT2X00_LIB_RFKILL */
  1394. /*
  1395. * Check if the BBP tuning should be disabled.
  1396. */
  1397. rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC, &eeprom);
  1398. if (rt2x00_get_field16(eeprom, EEPROM_NIC_DYN_BBP_TUNE))
  1399. __set_bit(CONFIG_DISABLE_LINK_TUNING, &rt2x00dev->flags);
  1400. /*
  1401. * Read the RSSI <-> dBm offset information.
  1402. */
  1403. rt2x00_eeprom_read(rt2x00dev, EEPROM_CALIBRATE_OFFSET, &eeprom);
  1404. rt2x00dev->rssi_offset =
  1405. rt2x00_get_field16(eeprom, EEPROM_CALIBRATE_OFFSET_RSSI);
  1406. return 0;
  1407. }
  1408. /*
  1409. * RF value list for RF2522
  1410. * Supports: 2.4 GHz
  1411. */
  1412. static const struct rf_channel rf_vals_bg_2522[] = {
  1413. { 1, 0x00002050, 0x000c1fda, 0x00000101, 0 },
  1414. { 2, 0x00002050, 0x000c1fee, 0x00000101, 0 },
  1415. { 3, 0x00002050, 0x000c2002, 0x00000101, 0 },
  1416. { 4, 0x00002050, 0x000c2016, 0x00000101, 0 },
  1417. { 5, 0x00002050, 0x000c202a, 0x00000101, 0 },
  1418. { 6, 0x00002050, 0x000c203e, 0x00000101, 0 },
  1419. { 7, 0x00002050, 0x000c2052, 0x00000101, 0 },
  1420. { 8, 0x00002050, 0x000c2066, 0x00000101, 0 },
  1421. { 9, 0x00002050, 0x000c207a, 0x00000101, 0 },
  1422. { 10, 0x00002050, 0x000c208e, 0x00000101, 0 },
  1423. { 11, 0x00002050, 0x000c20a2, 0x00000101, 0 },
  1424. { 12, 0x00002050, 0x000c20b6, 0x00000101, 0 },
  1425. { 13, 0x00002050, 0x000c20ca, 0x00000101, 0 },
  1426. { 14, 0x00002050, 0x000c20fa, 0x00000101, 0 },
  1427. };
  1428. /*
  1429. * RF value list for RF2523
  1430. * Supports: 2.4 GHz
  1431. */
  1432. static const struct rf_channel rf_vals_bg_2523[] = {
  1433. { 1, 0x00022010, 0x00000c9e, 0x000e0111, 0x00000a1b },
  1434. { 2, 0x00022010, 0x00000ca2, 0x000e0111, 0x00000a1b },
  1435. { 3, 0x00022010, 0x00000ca6, 0x000e0111, 0x00000a1b },
  1436. { 4, 0x00022010, 0x00000caa, 0x000e0111, 0x00000a1b },
  1437. { 5, 0x00022010, 0x00000cae, 0x000e0111, 0x00000a1b },
  1438. { 6, 0x00022010, 0x00000cb2, 0x000e0111, 0x00000a1b },
  1439. { 7, 0x00022010, 0x00000cb6, 0x000e0111, 0x00000a1b },
  1440. { 8, 0x00022010, 0x00000cba, 0x000e0111, 0x00000a1b },
  1441. { 9, 0x00022010, 0x00000cbe, 0x000e0111, 0x00000a1b },
  1442. { 10, 0x00022010, 0x00000d02, 0x000e0111, 0x00000a1b },
  1443. { 11, 0x00022010, 0x00000d06, 0x000e0111, 0x00000a1b },
  1444. { 12, 0x00022010, 0x00000d0a, 0x000e0111, 0x00000a1b },
  1445. { 13, 0x00022010, 0x00000d0e, 0x000e0111, 0x00000a1b },
  1446. { 14, 0x00022010, 0x00000d1a, 0x000e0111, 0x00000a03 },
  1447. };
  1448. /*
  1449. * RF value list for RF2524
  1450. * Supports: 2.4 GHz
  1451. */
  1452. static const struct rf_channel rf_vals_bg_2524[] = {
  1453. { 1, 0x00032020, 0x00000c9e, 0x00000101, 0x00000a1b },
  1454. { 2, 0x00032020, 0x00000ca2, 0x00000101, 0x00000a1b },
  1455. { 3, 0x00032020, 0x00000ca6, 0x00000101, 0x00000a1b },
  1456. { 4, 0x00032020, 0x00000caa, 0x00000101, 0x00000a1b },
  1457. { 5, 0x00032020, 0x00000cae, 0x00000101, 0x00000a1b },
  1458. { 6, 0x00032020, 0x00000cb2, 0x00000101, 0x00000a1b },
  1459. { 7, 0x00032020, 0x00000cb6, 0x00000101, 0x00000a1b },
  1460. { 8, 0x00032020, 0x00000cba, 0x00000101, 0x00000a1b },
  1461. { 9, 0x00032020, 0x00000cbe, 0x00000101, 0x00000a1b },
  1462. { 10, 0x00032020, 0x00000d02, 0x00000101, 0x00000a1b },
  1463. { 11, 0x00032020, 0x00000d06, 0x00000101, 0x00000a1b },
  1464. { 12, 0x00032020, 0x00000d0a, 0x00000101, 0x00000a1b },
  1465. { 13, 0x00032020, 0x00000d0e, 0x00000101, 0x00000a1b },
  1466. { 14, 0x00032020, 0x00000d1a, 0x00000101, 0x00000a03 },
  1467. };
  1468. /*
  1469. * RF value list for RF2525
  1470. * Supports: 2.4 GHz
  1471. */
  1472. static const struct rf_channel rf_vals_bg_2525[] = {
  1473. { 1, 0x00022020, 0x00080c9e, 0x00060111, 0x00000a1b },
  1474. { 2, 0x00022020, 0x00080ca2, 0x00060111, 0x00000a1b },
  1475. { 3, 0x00022020, 0x00080ca6, 0x00060111, 0x00000a1b },
  1476. { 4, 0x00022020, 0x00080caa, 0x00060111, 0x00000a1b },
  1477. { 5, 0x00022020, 0x00080cae, 0x00060111, 0x00000a1b },
  1478. { 6, 0x00022020, 0x00080cb2, 0x00060111, 0x00000a1b },
  1479. { 7, 0x00022020, 0x00080cb6, 0x00060111, 0x00000a1b },
  1480. { 8, 0x00022020, 0x00080cba, 0x00060111, 0x00000a1b },
  1481. { 9, 0x00022020, 0x00080cbe, 0x00060111, 0x00000a1b },
  1482. { 10, 0x00022020, 0x00080d02, 0x00060111, 0x00000a1b },
  1483. { 11, 0x00022020, 0x00080d06, 0x00060111, 0x00000a1b },
  1484. { 12, 0x00022020, 0x00080d0a, 0x00060111, 0x00000a1b },
  1485. { 13, 0x00022020, 0x00080d0e, 0x00060111, 0x00000a1b },
  1486. { 14, 0x00022020, 0x00080d1a, 0x00060111, 0x00000a03 },
  1487. };
  1488. /*
  1489. * RF value list for RF2525e
  1490. * Supports: 2.4 GHz
  1491. */
  1492. static const struct rf_channel rf_vals_bg_2525e[] = {
  1493. { 1, 0x00022010, 0x0000089a, 0x00060111, 0x00000e1b },
  1494. { 2, 0x00022010, 0x0000089e, 0x00060111, 0x00000e07 },
  1495. { 3, 0x00022010, 0x0000089e, 0x00060111, 0x00000e1b },
  1496. { 4, 0x00022010, 0x000008a2, 0x00060111, 0x00000e07 },
  1497. { 5, 0x00022010, 0x000008a2, 0x00060111, 0x00000e1b },
  1498. { 6, 0x00022010, 0x000008a6, 0x00060111, 0x00000e07 },
  1499. { 7, 0x00022010, 0x000008a6, 0x00060111, 0x00000e1b },
  1500. { 8, 0x00022010, 0x000008aa, 0x00060111, 0x00000e07 },
  1501. { 9, 0x00022010, 0x000008aa, 0x00060111, 0x00000e1b },
  1502. { 10, 0x00022010, 0x000008ae, 0x00060111, 0x00000e07 },
  1503. { 11, 0x00022010, 0x000008ae, 0x00060111, 0x00000e1b },
  1504. { 12, 0x00022010, 0x000008b2, 0x00060111, 0x00000e07 },
  1505. { 13, 0x00022010, 0x000008b2, 0x00060111, 0x00000e1b },
  1506. { 14, 0x00022010, 0x000008b6, 0x00060111, 0x00000e23 },
  1507. };
  1508. /*
  1509. * RF value list for RF5222
  1510. * Supports: 2.4 GHz & 5.2 GHz
  1511. */
  1512. static const struct rf_channel rf_vals_5222[] = {
  1513. { 1, 0x00022020, 0x00001136, 0x00000101, 0x00000a0b },
  1514. { 2, 0x00022020, 0x0000113a, 0x00000101, 0x00000a0b },
  1515. { 3, 0x00022020, 0x0000113e, 0x00000101, 0x00000a0b },
  1516. { 4, 0x00022020, 0x00001182, 0x00000101, 0x00000a0b },
  1517. { 5, 0x00022020, 0x00001186, 0x00000101, 0x00000a0b },
  1518. { 6, 0x00022020, 0x0000118a, 0x00000101, 0x00000a0b },
  1519. { 7, 0x00022020, 0x0000118e, 0x00000101, 0x00000a0b },
  1520. { 8, 0x00022020, 0x00001192, 0x00000101, 0x00000a0b },
  1521. { 9, 0x00022020, 0x00001196, 0x00000101, 0x00000a0b },
  1522. { 10, 0x00022020, 0x0000119a, 0x00000101, 0x00000a0b },
  1523. { 11, 0x00022020, 0x0000119e, 0x00000101, 0x00000a0b },
  1524. { 12, 0x00022020, 0x000011a2, 0x00000101, 0x00000a0b },
  1525. { 13, 0x00022020, 0x000011a6, 0x00000101, 0x00000a0b },
  1526. { 14, 0x00022020, 0x000011ae, 0x00000101, 0x00000a1b },
  1527. /* 802.11 UNI / HyperLan 2 */
  1528. { 36, 0x00022010, 0x00018896, 0x00000101, 0x00000a1f },
  1529. { 40, 0x00022010, 0x0001889a, 0x00000101, 0x00000a1f },
  1530. { 44, 0x00022010, 0x0001889e, 0x00000101, 0x00000a1f },
  1531. { 48, 0x00022010, 0x000188a2, 0x00000101, 0x00000a1f },
  1532. { 52, 0x00022010, 0x000188a6, 0x00000101, 0x00000a1f },
  1533. { 66, 0x00022010, 0x000188aa, 0x00000101, 0x00000a1f },
  1534. { 60, 0x00022010, 0x000188ae, 0x00000101, 0x00000a1f },
  1535. { 64, 0x00022010, 0x000188b2, 0x00000101, 0x00000a1f },
  1536. /* 802.11 HyperLan 2 */
  1537. { 100, 0x00022010, 0x00008802, 0x00000101, 0x00000a0f },
  1538. { 104, 0x00022010, 0x00008806, 0x00000101, 0x00000a0f },
  1539. { 108, 0x00022010, 0x0000880a, 0x00000101, 0x00000a0f },
  1540. { 112, 0x00022010, 0x0000880e, 0x00000101, 0x00000a0f },
  1541. { 116, 0x00022010, 0x00008812, 0x00000101, 0x00000a0f },
  1542. { 120, 0x00022010, 0x00008816, 0x00000101, 0x00000a0f },
  1543. { 124, 0x00022010, 0x0000881a, 0x00000101, 0x00000a0f },
  1544. { 128, 0x00022010, 0x0000881e, 0x00000101, 0x00000a0f },
  1545. { 132, 0x00022010, 0x00008822, 0x00000101, 0x00000a0f },
  1546. { 136, 0x00022010, 0x00008826, 0x00000101, 0x00000a0f },
  1547. /* 802.11 UNII */
  1548. { 140, 0x00022010, 0x0000882a, 0x00000101, 0x00000a0f },
  1549. { 149, 0x00022020, 0x000090a6, 0x00000101, 0x00000a07 },
  1550. { 153, 0x00022020, 0x000090ae, 0x00000101, 0x00000a07 },
  1551. { 157, 0x00022020, 0x000090b6, 0x00000101, 0x00000a07 },
  1552. { 161, 0x00022020, 0x000090be, 0x00000101, 0x00000a07 },
  1553. };
  1554. static int rt2500usb_probe_hw_mode(struct rt2x00_dev *rt2x00dev)
  1555. {
  1556. struct hw_mode_spec *spec = &rt2x00dev->spec;
  1557. struct channel_info *info;
  1558. char *tx_power;
  1559. unsigned int i;
  1560. /*
  1561. * Initialize all hw fields.
  1562. */
  1563. rt2x00dev->hw->flags =
  1564. IEEE80211_HW_RX_INCLUDES_FCS |
  1565. IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING |
  1566. IEEE80211_HW_SIGNAL_DBM |
  1567. IEEE80211_HW_SUPPORTS_PS |
  1568. IEEE80211_HW_PS_NULLFUNC_STACK;
  1569. rt2x00dev->hw->extra_tx_headroom = TXD_DESC_SIZE;
  1570. SET_IEEE80211_DEV(rt2x00dev->hw, rt2x00dev->dev);
  1571. SET_IEEE80211_PERM_ADDR(rt2x00dev->hw,
  1572. rt2x00_eeprom_addr(rt2x00dev,
  1573. EEPROM_MAC_ADDR_0));
  1574. /*
  1575. * Initialize hw_mode information.
  1576. */
  1577. spec->supported_bands = SUPPORT_BAND_2GHZ;
  1578. spec->supported_rates = SUPPORT_RATE_CCK | SUPPORT_RATE_OFDM;
  1579. if (rt2x00_rf(&rt2x00dev->chip, RF2522)) {
  1580. spec->num_channels = ARRAY_SIZE(rf_vals_bg_2522);
  1581. spec->channels = rf_vals_bg_2522;
  1582. } else if (rt2x00_rf(&rt2x00dev->chip, RF2523)) {
  1583. spec->num_channels = ARRAY_SIZE(rf_vals_bg_2523);
  1584. spec->channels = rf_vals_bg_2523;
  1585. } else if (rt2x00_rf(&rt2x00dev->chip, RF2524)) {
  1586. spec->num_channels = ARRAY_SIZE(rf_vals_bg_2524);
  1587. spec->channels = rf_vals_bg_2524;
  1588. } else if (rt2x00_rf(&rt2x00dev->chip, RF2525)) {
  1589. spec->num_channels = ARRAY_SIZE(rf_vals_bg_2525);
  1590. spec->channels = rf_vals_bg_2525;
  1591. } else if (rt2x00_rf(&rt2x00dev->chip, RF2525E)) {
  1592. spec->num_channels = ARRAY_SIZE(rf_vals_bg_2525e);
  1593. spec->channels = rf_vals_bg_2525e;
  1594. } else if (rt2x00_rf(&rt2x00dev->chip, RF5222)) {
  1595. spec->supported_bands |= SUPPORT_BAND_5GHZ;
  1596. spec->num_channels = ARRAY_SIZE(rf_vals_5222);
  1597. spec->channels = rf_vals_5222;
  1598. }
  1599. /*
  1600. * Create channel information array
  1601. */
  1602. info = kzalloc(spec->num_channels * sizeof(*info), GFP_KERNEL);
  1603. if (!info)
  1604. return -ENOMEM;
  1605. spec->channels_info = info;
  1606. tx_power = rt2x00_eeprom_addr(rt2x00dev, EEPROM_TXPOWER_START);
  1607. for (i = 0; i < 14; i++)
  1608. info[i].tx_power1 = TXPOWER_FROM_DEV(tx_power[i]);
  1609. if (spec->num_channels > 14) {
  1610. for (i = 14; i < spec->num_channels; i++)
  1611. info[i].tx_power1 = DEFAULT_TXPOWER;
  1612. }
  1613. return 0;
  1614. }
  1615. static int rt2500usb_probe_hw(struct rt2x00_dev *rt2x00dev)
  1616. {
  1617. int retval;
  1618. /*
  1619. * Allocate eeprom data.
  1620. */
  1621. retval = rt2500usb_validate_eeprom(rt2x00dev);
  1622. if (retval)
  1623. return retval;
  1624. retval = rt2500usb_init_eeprom(rt2x00dev);
  1625. if (retval)
  1626. return retval;
  1627. /*
  1628. * Initialize hw specifications.
  1629. */
  1630. retval = rt2500usb_probe_hw_mode(rt2x00dev);
  1631. if (retval)
  1632. return retval;
  1633. /*
  1634. * This device requires the atim queue
  1635. */
  1636. __set_bit(DRIVER_REQUIRE_ATIM_QUEUE, &rt2x00dev->flags);
  1637. __set_bit(DRIVER_REQUIRE_BEACON_GUARD, &rt2x00dev->flags);
  1638. __set_bit(DRIVER_REQUIRE_SCHEDULED, &rt2x00dev->flags);
  1639. if (!modparam_nohwcrypt) {
  1640. __set_bit(CONFIG_SUPPORT_HW_CRYPTO, &rt2x00dev->flags);
  1641. __set_bit(DRIVER_REQUIRE_COPY_IV, &rt2x00dev->flags);
  1642. }
  1643. __set_bit(CONFIG_DISABLE_LINK_TUNING, &rt2x00dev->flags);
  1644. /*
  1645. * Set the rssi offset.
  1646. */
  1647. rt2x00dev->rssi_offset = DEFAULT_RSSI_OFFSET;
  1648. return 0;
  1649. }
  1650. static const struct ieee80211_ops rt2500usb_mac80211_ops = {
  1651. .tx = rt2x00mac_tx,
  1652. .start = rt2x00mac_start,
  1653. .stop = rt2x00mac_stop,
  1654. .add_interface = rt2x00mac_add_interface,
  1655. .remove_interface = rt2x00mac_remove_interface,
  1656. .config = rt2x00mac_config,
  1657. .config_interface = rt2x00mac_config_interface,
  1658. .configure_filter = rt2x00mac_configure_filter,
  1659. .set_key = rt2x00mac_set_key,
  1660. .get_stats = rt2x00mac_get_stats,
  1661. .bss_info_changed = rt2x00mac_bss_info_changed,
  1662. .conf_tx = rt2x00mac_conf_tx,
  1663. .get_tx_stats = rt2x00mac_get_tx_stats,
  1664. };
  1665. static const struct rt2x00lib_ops rt2500usb_rt2x00_ops = {
  1666. .probe_hw = rt2500usb_probe_hw,
  1667. .initialize = rt2x00usb_initialize,
  1668. .uninitialize = rt2x00usb_uninitialize,
  1669. .clear_entry = rt2x00usb_clear_entry,
  1670. .set_device_state = rt2500usb_set_device_state,
  1671. .rfkill_poll = rt2500usb_rfkill_poll,
  1672. .link_stats = rt2500usb_link_stats,
  1673. .reset_tuner = rt2500usb_reset_tuner,
  1674. .link_tuner = rt2500usb_link_tuner,
  1675. .write_tx_desc = rt2500usb_write_tx_desc,
  1676. .write_tx_data = rt2x00usb_write_tx_data,
  1677. .write_beacon = rt2500usb_write_beacon,
  1678. .get_tx_data_len = rt2500usb_get_tx_data_len,
  1679. .kick_tx_queue = rt2500usb_kick_tx_queue,
  1680. .fill_rxdone = rt2500usb_fill_rxdone,
  1681. .config_shared_key = rt2500usb_config_key,
  1682. .config_pairwise_key = rt2500usb_config_key,
  1683. .config_filter = rt2500usb_config_filter,
  1684. .config_intf = rt2500usb_config_intf,
  1685. .config_erp = rt2500usb_config_erp,
  1686. .config_ant = rt2500usb_config_ant,
  1687. .config = rt2500usb_config,
  1688. };
  1689. static const struct data_queue_desc rt2500usb_queue_rx = {
  1690. .entry_num = RX_ENTRIES,
  1691. .data_size = DATA_FRAME_SIZE,
  1692. .desc_size = RXD_DESC_SIZE,
  1693. .priv_size = sizeof(struct queue_entry_priv_usb),
  1694. };
  1695. static const struct data_queue_desc rt2500usb_queue_tx = {
  1696. .entry_num = TX_ENTRIES,
  1697. .data_size = DATA_FRAME_SIZE,
  1698. .desc_size = TXD_DESC_SIZE,
  1699. .priv_size = sizeof(struct queue_entry_priv_usb),
  1700. };
  1701. static const struct data_queue_desc rt2500usb_queue_bcn = {
  1702. .entry_num = BEACON_ENTRIES,
  1703. .data_size = MGMT_FRAME_SIZE,
  1704. .desc_size = TXD_DESC_SIZE,
  1705. .priv_size = sizeof(struct queue_entry_priv_usb_bcn),
  1706. };
  1707. static const struct data_queue_desc rt2500usb_queue_atim = {
  1708. .entry_num = ATIM_ENTRIES,
  1709. .data_size = DATA_FRAME_SIZE,
  1710. .desc_size = TXD_DESC_SIZE,
  1711. .priv_size = sizeof(struct queue_entry_priv_usb),
  1712. };
  1713. static const struct rt2x00_ops rt2500usb_ops = {
  1714. .name = KBUILD_MODNAME,
  1715. .max_sta_intf = 1,
  1716. .max_ap_intf = 1,
  1717. .eeprom_size = EEPROM_SIZE,
  1718. .rf_size = RF_SIZE,
  1719. .tx_queues = NUM_TX_QUEUES,
  1720. .rx = &rt2500usb_queue_rx,
  1721. .tx = &rt2500usb_queue_tx,
  1722. .bcn = &rt2500usb_queue_bcn,
  1723. .atim = &rt2500usb_queue_atim,
  1724. .lib = &rt2500usb_rt2x00_ops,
  1725. .hw = &rt2500usb_mac80211_ops,
  1726. #ifdef CONFIG_RT2X00_LIB_DEBUGFS
  1727. .debugfs = &rt2500usb_rt2x00debug,
  1728. #endif /* CONFIG_RT2X00_LIB_DEBUGFS */
  1729. };
  1730. /*
  1731. * rt2500usb module information.
  1732. */
  1733. static struct usb_device_id rt2500usb_device_table[] = {
  1734. /* ASUS */
  1735. { USB_DEVICE(0x0b05, 0x1706), USB_DEVICE_DATA(&rt2500usb_ops) },
  1736. { USB_DEVICE(0x0b05, 0x1707), USB_DEVICE_DATA(&rt2500usb_ops) },
  1737. /* Belkin */
  1738. { USB_DEVICE(0x050d, 0x7050), USB_DEVICE_DATA(&rt2500usb_ops) },
  1739. { USB_DEVICE(0x050d, 0x7051), USB_DEVICE_DATA(&rt2500usb_ops) },
  1740. { USB_DEVICE(0x050d, 0x705a), USB_DEVICE_DATA(&rt2500usb_ops) },
  1741. /* Cisco Systems */
  1742. { USB_DEVICE(0x13b1, 0x000d), USB_DEVICE_DATA(&rt2500usb_ops) },
  1743. { USB_DEVICE(0x13b1, 0x0011), USB_DEVICE_DATA(&rt2500usb_ops) },
  1744. { USB_DEVICE(0x13b1, 0x001a), USB_DEVICE_DATA(&rt2500usb_ops) },
  1745. /* Conceptronic */
  1746. { USB_DEVICE(0x14b2, 0x3c02), USB_DEVICE_DATA(&rt2500usb_ops) },
  1747. /* D-LINK */
  1748. { USB_DEVICE(0x2001, 0x3c00), USB_DEVICE_DATA(&rt2500usb_ops) },
  1749. /* Gigabyte */
  1750. { USB_DEVICE(0x1044, 0x8001), USB_DEVICE_DATA(&rt2500usb_ops) },
  1751. { USB_DEVICE(0x1044, 0x8007), USB_DEVICE_DATA(&rt2500usb_ops) },
  1752. /* Hercules */
  1753. { USB_DEVICE(0x06f8, 0xe000), USB_DEVICE_DATA(&rt2500usb_ops) },
  1754. /* Melco */
  1755. { USB_DEVICE(0x0411, 0x005e), USB_DEVICE_DATA(&rt2500usb_ops) },
  1756. { USB_DEVICE(0x0411, 0x0066), USB_DEVICE_DATA(&rt2500usb_ops) },
  1757. { USB_DEVICE(0x0411, 0x0067), USB_DEVICE_DATA(&rt2500usb_ops) },
  1758. { USB_DEVICE(0x0411, 0x008b), USB_DEVICE_DATA(&rt2500usb_ops) },
  1759. { USB_DEVICE(0x0411, 0x0097), USB_DEVICE_DATA(&rt2500usb_ops) },
  1760. /* MSI */
  1761. { USB_DEVICE(0x0db0, 0x6861), USB_DEVICE_DATA(&rt2500usb_ops) },
  1762. { USB_DEVICE(0x0db0, 0x6865), USB_DEVICE_DATA(&rt2500usb_ops) },
  1763. { USB_DEVICE(0x0db0, 0x6869), USB_DEVICE_DATA(&rt2500usb_ops) },
  1764. /* Ralink */
  1765. { USB_DEVICE(0x148f, 0x1706), USB_DEVICE_DATA(&rt2500usb_ops) },
  1766. { USB_DEVICE(0x148f, 0x2570), USB_DEVICE_DATA(&rt2500usb_ops) },
  1767. { USB_DEVICE(0x148f, 0x2573), USB_DEVICE_DATA(&rt2500usb_ops) },
  1768. { USB_DEVICE(0x148f, 0x9020), USB_DEVICE_DATA(&rt2500usb_ops) },
  1769. /* Siemens */
  1770. { USB_DEVICE(0x0681, 0x3c06), USB_DEVICE_DATA(&rt2500usb_ops) },
  1771. /* SMC */
  1772. { USB_DEVICE(0x0707, 0xee13), USB_DEVICE_DATA(&rt2500usb_ops) },
  1773. /* Spairon */
  1774. { USB_DEVICE(0x114b, 0x0110), USB_DEVICE_DATA(&rt2500usb_ops) },
  1775. /* Trust */
  1776. { USB_DEVICE(0x0eb0, 0x9020), USB_DEVICE_DATA(&rt2500usb_ops) },
  1777. /* Zinwell */
  1778. { USB_DEVICE(0x5a57, 0x0260), USB_DEVICE_DATA(&rt2500usb_ops) },
  1779. { 0, }
  1780. };
  1781. MODULE_AUTHOR(DRV_PROJECT);
  1782. MODULE_VERSION(DRV_VERSION);
  1783. MODULE_DESCRIPTION("Ralink RT2500 USB Wireless LAN driver.");
  1784. MODULE_SUPPORTED_DEVICE("Ralink RT2570 USB chipset based cards");
  1785. MODULE_DEVICE_TABLE(usb, rt2500usb_device_table);
  1786. MODULE_LICENSE("GPL");
  1787. static struct usb_driver rt2500usb_driver = {
  1788. .name = KBUILD_MODNAME,
  1789. .id_table = rt2500usb_device_table,
  1790. .probe = rt2x00usb_probe,
  1791. .disconnect = rt2x00usb_disconnect,
  1792. .suspend = rt2x00usb_suspend,
  1793. .resume = rt2x00usb_resume,
  1794. };
  1795. static int __init rt2500usb_init(void)
  1796. {
  1797. return usb_register(&rt2500usb_driver);
  1798. }
  1799. static void __exit rt2500usb_exit(void)
  1800. {
  1801. usb_deregister(&rt2500usb_driver);
  1802. }
  1803. module_init(rt2500usb_init);
  1804. module_exit(rt2500usb_exit);