radeon_gem.c 14 KB

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  1. /*
  2. * Copyright 2008 Advanced Micro Devices, Inc.
  3. * Copyright 2008 Red Hat Inc.
  4. * Copyright 2009 Jerome Glisse.
  5. *
  6. * Permission is hereby granted, free of charge, to any person obtaining a
  7. * copy of this software and associated documentation files (the "Software"),
  8. * to deal in the Software without restriction, including without limitation
  9. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10. * and/or sell copies of the Software, and to permit persons to whom the
  11. * Software is furnished to do so, subject to the following conditions:
  12. *
  13. * The above copyright notice and this permission notice shall be included in
  14. * all copies or substantial portions of the Software.
  15. *
  16. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19. * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  20. * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  21. * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  22. * OTHER DEALINGS IN THE SOFTWARE.
  23. *
  24. * Authors: Dave Airlie
  25. * Alex Deucher
  26. * Jerome Glisse
  27. */
  28. #include "drmP.h"
  29. #include "drm.h"
  30. #include "radeon_drm.h"
  31. #include "radeon.h"
  32. int radeon_gem_object_init(struct drm_gem_object *obj)
  33. {
  34. BUG();
  35. return 0;
  36. }
  37. void radeon_gem_object_free(struct drm_gem_object *gobj)
  38. {
  39. struct radeon_bo *robj = gem_to_radeon_bo(gobj);
  40. if (robj) {
  41. if (robj->gem_base.import_attach)
  42. drm_prime_gem_destroy(&robj->gem_base, robj->tbo.sg);
  43. radeon_bo_unref(&robj);
  44. }
  45. }
  46. int radeon_gem_object_create(struct radeon_device *rdev, int size,
  47. int alignment, int initial_domain,
  48. bool discardable, bool kernel,
  49. struct drm_gem_object **obj)
  50. {
  51. struct radeon_bo *robj;
  52. int r;
  53. *obj = NULL;
  54. /* At least align on page size */
  55. if (alignment < PAGE_SIZE) {
  56. alignment = PAGE_SIZE;
  57. }
  58. r = radeon_bo_create(rdev, size, alignment, kernel, initial_domain, NULL, &robj);
  59. if (r) {
  60. if (r != -ERESTARTSYS)
  61. DRM_ERROR("Failed to allocate GEM object (%d, %d, %u, %d)\n",
  62. size, initial_domain, alignment, r);
  63. return r;
  64. }
  65. *obj = &robj->gem_base;
  66. mutex_lock(&rdev->gem.mutex);
  67. list_add_tail(&robj->list, &rdev->gem.objects);
  68. mutex_unlock(&rdev->gem.mutex);
  69. return 0;
  70. }
  71. int radeon_gem_set_domain(struct drm_gem_object *gobj,
  72. uint32_t rdomain, uint32_t wdomain)
  73. {
  74. struct radeon_bo *robj;
  75. uint32_t domain;
  76. int r;
  77. /* FIXME: reeimplement */
  78. robj = gem_to_radeon_bo(gobj);
  79. /* work out where to validate the buffer to */
  80. domain = wdomain;
  81. if (!domain) {
  82. domain = rdomain;
  83. }
  84. if (!domain) {
  85. /* Do nothings */
  86. printk(KERN_WARNING "Set domain without domain !\n");
  87. return 0;
  88. }
  89. if (domain == RADEON_GEM_DOMAIN_CPU) {
  90. /* Asking for cpu access wait for object idle */
  91. r = radeon_bo_wait(robj, NULL, false);
  92. if (r) {
  93. printk(KERN_ERR "Failed to wait for object !\n");
  94. return r;
  95. }
  96. }
  97. return 0;
  98. }
  99. int radeon_gem_init(struct radeon_device *rdev)
  100. {
  101. INIT_LIST_HEAD(&rdev->gem.objects);
  102. return 0;
  103. }
  104. void radeon_gem_fini(struct radeon_device *rdev)
  105. {
  106. radeon_bo_force_delete(rdev);
  107. }
  108. /*
  109. * Call from drm_gem_handle_create which appear in both new and open ioctl
  110. * case.
  111. */
  112. int radeon_gem_object_open(struct drm_gem_object *obj, struct drm_file *file_priv)
  113. {
  114. return 0;
  115. }
  116. void radeon_gem_object_close(struct drm_gem_object *obj,
  117. struct drm_file *file_priv)
  118. {
  119. struct radeon_bo *rbo = gem_to_radeon_bo(obj);
  120. struct radeon_device *rdev = rbo->rdev;
  121. struct radeon_fpriv *fpriv = file_priv->driver_priv;
  122. struct radeon_vm *vm = &fpriv->vm;
  123. if (rdev->family < CHIP_CAYMAN) {
  124. return;
  125. }
  126. if (radeon_bo_reserve(rbo, false)) {
  127. dev_err(rdev->dev, "leaking bo va because we fail to reserve bo\n");
  128. return;
  129. }
  130. radeon_vm_bo_rmv(rdev, vm, rbo);
  131. radeon_bo_unreserve(rbo);
  132. }
  133. static int radeon_gem_handle_lockup(struct radeon_device *rdev, int r)
  134. {
  135. if (r == -EDEADLK) {
  136. r = radeon_gpu_reset(rdev);
  137. if (!r)
  138. r = -EAGAIN;
  139. }
  140. return r;
  141. }
  142. /*
  143. * GEM ioctls.
  144. */
  145. int radeon_gem_info_ioctl(struct drm_device *dev, void *data,
  146. struct drm_file *filp)
  147. {
  148. struct radeon_device *rdev = dev->dev_private;
  149. struct drm_radeon_gem_info *args = data;
  150. struct ttm_mem_type_manager *man;
  151. unsigned i;
  152. man = &rdev->mman.bdev.man[TTM_PL_VRAM];
  153. args->vram_size = rdev->mc.real_vram_size;
  154. args->vram_visible = (u64)man->size << PAGE_SHIFT;
  155. if (rdev->stollen_vga_memory)
  156. args->vram_visible -= radeon_bo_size(rdev->stollen_vga_memory);
  157. args->vram_visible -= radeon_fbdev_total_size(rdev);
  158. args->gart_size = rdev->mc.gtt_size - 4096 - RADEON_IB_POOL_SIZE*64*1024;
  159. for(i = 0; i < RADEON_NUM_RINGS; ++i)
  160. args->gart_size -= rdev->ring[i].ring_size;
  161. return 0;
  162. }
  163. int radeon_gem_pread_ioctl(struct drm_device *dev, void *data,
  164. struct drm_file *filp)
  165. {
  166. /* TODO: implement */
  167. DRM_ERROR("unimplemented %s\n", __func__);
  168. return -ENOSYS;
  169. }
  170. int radeon_gem_pwrite_ioctl(struct drm_device *dev, void *data,
  171. struct drm_file *filp)
  172. {
  173. /* TODO: implement */
  174. DRM_ERROR("unimplemented %s\n", __func__);
  175. return -ENOSYS;
  176. }
  177. int radeon_gem_create_ioctl(struct drm_device *dev, void *data,
  178. struct drm_file *filp)
  179. {
  180. struct radeon_device *rdev = dev->dev_private;
  181. struct drm_radeon_gem_create *args = data;
  182. struct drm_gem_object *gobj;
  183. uint32_t handle;
  184. int r;
  185. down_read(&rdev->exclusive_lock);
  186. /* create a gem object to contain this object in */
  187. args->size = roundup(args->size, PAGE_SIZE);
  188. r = radeon_gem_object_create(rdev, args->size, args->alignment,
  189. args->initial_domain, false,
  190. false, &gobj);
  191. if (r) {
  192. up_read(&rdev->exclusive_lock);
  193. r = radeon_gem_handle_lockup(rdev, r);
  194. return r;
  195. }
  196. r = drm_gem_handle_create(filp, gobj, &handle);
  197. /* drop reference from allocate - handle holds it now */
  198. drm_gem_object_unreference_unlocked(gobj);
  199. if (r) {
  200. up_read(&rdev->exclusive_lock);
  201. r = radeon_gem_handle_lockup(rdev, r);
  202. return r;
  203. }
  204. args->handle = handle;
  205. up_read(&rdev->exclusive_lock);
  206. return 0;
  207. }
  208. int radeon_gem_set_domain_ioctl(struct drm_device *dev, void *data,
  209. struct drm_file *filp)
  210. {
  211. /* transition the BO to a domain -
  212. * just validate the BO into a certain domain */
  213. struct radeon_device *rdev = dev->dev_private;
  214. struct drm_radeon_gem_set_domain *args = data;
  215. struct drm_gem_object *gobj;
  216. struct radeon_bo *robj;
  217. int r;
  218. /* for now if someone requests domain CPU -
  219. * just make sure the buffer is finished with */
  220. down_read(&rdev->exclusive_lock);
  221. /* just do a BO wait for now */
  222. gobj = drm_gem_object_lookup(dev, filp, args->handle);
  223. if (gobj == NULL) {
  224. up_read(&rdev->exclusive_lock);
  225. return -ENOENT;
  226. }
  227. robj = gem_to_radeon_bo(gobj);
  228. r = radeon_gem_set_domain(gobj, args->read_domains, args->write_domain);
  229. drm_gem_object_unreference_unlocked(gobj);
  230. up_read(&rdev->exclusive_lock);
  231. r = radeon_gem_handle_lockup(robj->rdev, r);
  232. return r;
  233. }
  234. int radeon_mode_dumb_mmap(struct drm_file *filp,
  235. struct drm_device *dev,
  236. uint32_t handle, uint64_t *offset_p)
  237. {
  238. struct drm_gem_object *gobj;
  239. struct radeon_bo *robj;
  240. gobj = drm_gem_object_lookup(dev, filp, handle);
  241. if (gobj == NULL) {
  242. return -ENOENT;
  243. }
  244. robj = gem_to_radeon_bo(gobj);
  245. *offset_p = radeon_bo_mmap_offset(robj);
  246. drm_gem_object_unreference_unlocked(gobj);
  247. return 0;
  248. }
  249. int radeon_gem_mmap_ioctl(struct drm_device *dev, void *data,
  250. struct drm_file *filp)
  251. {
  252. struct drm_radeon_gem_mmap *args = data;
  253. return radeon_mode_dumb_mmap(filp, dev, args->handle, &args->addr_ptr);
  254. }
  255. int radeon_gem_busy_ioctl(struct drm_device *dev, void *data,
  256. struct drm_file *filp)
  257. {
  258. struct radeon_device *rdev = dev->dev_private;
  259. struct drm_radeon_gem_busy *args = data;
  260. struct drm_gem_object *gobj;
  261. struct radeon_bo *robj;
  262. int r;
  263. uint32_t cur_placement = 0;
  264. gobj = drm_gem_object_lookup(dev, filp, args->handle);
  265. if (gobj == NULL) {
  266. return -ENOENT;
  267. }
  268. robj = gem_to_radeon_bo(gobj);
  269. r = radeon_bo_wait(robj, &cur_placement, true);
  270. switch (cur_placement) {
  271. case TTM_PL_VRAM:
  272. args->domain = RADEON_GEM_DOMAIN_VRAM;
  273. break;
  274. case TTM_PL_TT:
  275. args->domain = RADEON_GEM_DOMAIN_GTT;
  276. break;
  277. case TTM_PL_SYSTEM:
  278. args->domain = RADEON_GEM_DOMAIN_CPU;
  279. default:
  280. break;
  281. }
  282. drm_gem_object_unreference_unlocked(gobj);
  283. r = radeon_gem_handle_lockup(rdev, r);
  284. return r;
  285. }
  286. int radeon_gem_wait_idle_ioctl(struct drm_device *dev, void *data,
  287. struct drm_file *filp)
  288. {
  289. struct radeon_device *rdev = dev->dev_private;
  290. struct drm_radeon_gem_wait_idle *args = data;
  291. struct drm_gem_object *gobj;
  292. struct radeon_bo *robj;
  293. int r;
  294. gobj = drm_gem_object_lookup(dev, filp, args->handle);
  295. if (gobj == NULL) {
  296. return -ENOENT;
  297. }
  298. robj = gem_to_radeon_bo(gobj);
  299. r = radeon_bo_wait(robj, NULL, false);
  300. /* callback hw specific functions if any */
  301. if (rdev->asic->ioctl_wait_idle)
  302. robj->rdev->asic->ioctl_wait_idle(rdev, robj);
  303. drm_gem_object_unreference_unlocked(gobj);
  304. r = radeon_gem_handle_lockup(rdev, r);
  305. return r;
  306. }
  307. int radeon_gem_set_tiling_ioctl(struct drm_device *dev, void *data,
  308. struct drm_file *filp)
  309. {
  310. struct drm_radeon_gem_set_tiling *args = data;
  311. struct drm_gem_object *gobj;
  312. struct radeon_bo *robj;
  313. int r = 0;
  314. DRM_DEBUG("%d \n", args->handle);
  315. gobj = drm_gem_object_lookup(dev, filp, args->handle);
  316. if (gobj == NULL)
  317. return -ENOENT;
  318. robj = gem_to_radeon_bo(gobj);
  319. r = radeon_bo_set_tiling_flags(robj, args->tiling_flags, args->pitch);
  320. drm_gem_object_unreference_unlocked(gobj);
  321. return r;
  322. }
  323. int radeon_gem_get_tiling_ioctl(struct drm_device *dev, void *data,
  324. struct drm_file *filp)
  325. {
  326. struct drm_radeon_gem_get_tiling *args = data;
  327. struct drm_gem_object *gobj;
  328. struct radeon_bo *rbo;
  329. int r = 0;
  330. DRM_DEBUG("\n");
  331. gobj = drm_gem_object_lookup(dev, filp, args->handle);
  332. if (gobj == NULL)
  333. return -ENOENT;
  334. rbo = gem_to_radeon_bo(gobj);
  335. r = radeon_bo_reserve(rbo, false);
  336. if (unlikely(r != 0))
  337. goto out;
  338. radeon_bo_get_tiling_flags(rbo, &args->tiling_flags, &args->pitch);
  339. radeon_bo_unreserve(rbo);
  340. out:
  341. drm_gem_object_unreference_unlocked(gobj);
  342. return r;
  343. }
  344. int radeon_gem_va_ioctl(struct drm_device *dev, void *data,
  345. struct drm_file *filp)
  346. {
  347. struct drm_radeon_gem_va *args = data;
  348. struct drm_gem_object *gobj;
  349. struct radeon_device *rdev = dev->dev_private;
  350. struct radeon_fpriv *fpriv = filp->driver_priv;
  351. struct radeon_bo *rbo;
  352. struct radeon_bo_va *bo_va;
  353. u32 invalid_flags;
  354. int r = 0;
  355. if (!rdev->vm_manager.enabled) {
  356. args->operation = RADEON_VA_RESULT_ERROR;
  357. return -ENOTTY;
  358. }
  359. /* !! DONT REMOVE !!
  360. * We don't support vm_id yet, to be sure we don't have have broken
  361. * userspace, reject anyone trying to use non 0 value thus moving
  362. * forward we can use those fields without breaking existant userspace
  363. */
  364. if (args->vm_id) {
  365. args->operation = RADEON_VA_RESULT_ERROR;
  366. return -EINVAL;
  367. }
  368. if (args->offset < RADEON_VA_RESERVED_SIZE) {
  369. dev_err(&dev->pdev->dev,
  370. "offset 0x%lX is in reserved area 0x%X\n",
  371. (unsigned long)args->offset,
  372. RADEON_VA_RESERVED_SIZE);
  373. args->operation = RADEON_VA_RESULT_ERROR;
  374. return -EINVAL;
  375. }
  376. /* don't remove, we need to enforce userspace to set the snooped flag
  377. * otherwise we will endup with broken userspace and we won't be able
  378. * to enable this feature without adding new interface
  379. */
  380. invalid_flags = RADEON_VM_PAGE_VALID | RADEON_VM_PAGE_SYSTEM;
  381. if ((args->flags & invalid_flags)) {
  382. dev_err(&dev->pdev->dev, "invalid flags 0x%08X vs 0x%08X\n",
  383. args->flags, invalid_flags);
  384. args->operation = RADEON_VA_RESULT_ERROR;
  385. return -EINVAL;
  386. }
  387. if (!(args->flags & RADEON_VM_PAGE_SNOOPED)) {
  388. dev_err(&dev->pdev->dev, "only supported snooped mapping for now\n");
  389. args->operation = RADEON_VA_RESULT_ERROR;
  390. return -EINVAL;
  391. }
  392. switch (args->operation) {
  393. case RADEON_VA_MAP:
  394. case RADEON_VA_UNMAP:
  395. break;
  396. default:
  397. dev_err(&dev->pdev->dev, "unsupported operation %d\n",
  398. args->operation);
  399. args->operation = RADEON_VA_RESULT_ERROR;
  400. return -EINVAL;
  401. }
  402. gobj = drm_gem_object_lookup(dev, filp, args->handle);
  403. if (gobj == NULL) {
  404. args->operation = RADEON_VA_RESULT_ERROR;
  405. return -ENOENT;
  406. }
  407. rbo = gem_to_radeon_bo(gobj);
  408. r = radeon_bo_reserve(rbo, false);
  409. if (r) {
  410. args->operation = RADEON_VA_RESULT_ERROR;
  411. drm_gem_object_unreference_unlocked(gobj);
  412. return r;
  413. }
  414. switch (args->operation) {
  415. case RADEON_VA_MAP:
  416. bo_va = radeon_bo_va(rbo, &fpriv->vm);
  417. if (bo_va) {
  418. args->operation = RADEON_VA_RESULT_VA_EXIST;
  419. args->offset = bo_va->soffset;
  420. goto out;
  421. }
  422. r = radeon_vm_bo_add(rdev, &fpriv->vm, rbo,
  423. args->offset, args->flags);
  424. break;
  425. case RADEON_VA_UNMAP:
  426. r = radeon_vm_bo_rmv(rdev, &fpriv->vm, rbo);
  427. break;
  428. default:
  429. break;
  430. }
  431. args->operation = RADEON_VA_RESULT_OK;
  432. if (r) {
  433. args->operation = RADEON_VA_RESULT_ERROR;
  434. }
  435. out:
  436. radeon_bo_unreserve(rbo);
  437. drm_gem_object_unreference_unlocked(gobj);
  438. return r;
  439. }
  440. int radeon_mode_dumb_create(struct drm_file *file_priv,
  441. struct drm_device *dev,
  442. struct drm_mode_create_dumb *args)
  443. {
  444. struct radeon_device *rdev = dev->dev_private;
  445. struct drm_gem_object *gobj;
  446. uint32_t handle;
  447. int r;
  448. args->pitch = radeon_align_pitch(rdev, args->width, args->bpp, 0) * ((args->bpp + 1) / 8);
  449. args->size = args->pitch * args->height;
  450. args->size = ALIGN(args->size, PAGE_SIZE);
  451. r = radeon_gem_object_create(rdev, args->size, 0,
  452. RADEON_GEM_DOMAIN_VRAM,
  453. false, ttm_bo_type_device,
  454. &gobj);
  455. if (r)
  456. return -ENOMEM;
  457. r = drm_gem_handle_create(file_priv, gobj, &handle);
  458. /* drop reference from allocate - handle holds it now */
  459. drm_gem_object_unreference_unlocked(gobj);
  460. if (r) {
  461. return r;
  462. }
  463. args->handle = handle;
  464. return 0;
  465. }
  466. int radeon_mode_dumb_destroy(struct drm_file *file_priv,
  467. struct drm_device *dev,
  468. uint32_t handle)
  469. {
  470. return drm_gem_handle_delete(file_priv, handle);
  471. }