exynos_drm_plane.c 6.6 KB

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  1. /*
  2. * Copyright (C) 2011 Samsung Electronics Co.Ltd
  3. * Authors: Joonyoung Shim <jy0922.shim@samsung.com>
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms of the GNU General Public License as published by the
  7. * Free Software Foundation; either version 2 of the License, or (at your
  8. * option) any later version.
  9. *
  10. */
  11. #include "drmP.h"
  12. #include "exynos_drm.h"
  13. #include "exynos_drm_drv.h"
  14. #include "exynos_drm_encoder.h"
  15. #include "exynos_drm_fb.h"
  16. #include "exynos_drm_gem.h"
  17. #define to_exynos_plane(x) container_of(x, struct exynos_plane, base)
  18. struct exynos_plane {
  19. struct drm_plane base;
  20. struct exynos_drm_overlay overlay;
  21. bool enabled;
  22. };
  23. static const uint32_t formats[] = {
  24. DRM_FORMAT_XRGB8888,
  25. DRM_FORMAT_ARGB8888,
  26. DRM_FORMAT_NV12,
  27. DRM_FORMAT_NV12M,
  28. DRM_FORMAT_NV12MT,
  29. };
  30. int exynos_plane_mode_set(struct drm_plane *plane, struct drm_crtc *crtc,
  31. struct drm_framebuffer *fb, int crtc_x, int crtc_y,
  32. unsigned int crtc_w, unsigned int crtc_h,
  33. uint32_t src_x, uint32_t src_y,
  34. uint32_t src_w, uint32_t src_h)
  35. {
  36. struct exynos_plane *exynos_plane = to_exynos_plane(plane);
  37. struct exynos_drm_overlay *overlay = &exynos_plane->overlay;
  38. unsigned int actual_w;
  39. unsigned int actual_h;
  40. int nr;
  41. int i;
  42. DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__);
  43. nr = exynos_drm_format_num_buffers(fb->pixel_format);
  44. for (i = 0; i < nr; i++) {
  45. struct exynos_drm_gem_buf *buffer = exynos_drm_fb_buffer(fb, i);
  46. if (!buffer) {
  47. DRM_LOG_KMS("buffer is null\n");
  48. return -EFAULT;
  49. }
  50. overlay->dma_addr[i] = buffer->dma_addr;
  51. overlay->vaddr[i] = buffer->kvaddr;
  52. DRM_DEBUG_KMS("buffer: %d, vaddr = 0x%lx, dma_addr = 0x%lx\n",
  53. i, (unsigned long)overlay->vaddr[i],
  54. (unsigned long)overlay->dma_addr[i]);
  55. }
  56. actual_w = min((unsigned)(crtc->mode.hdisplay - crtc_x), crtc_w);
  57. actual_h = min((unsigned)(crtc->mode.vdisplay - crtc_y), crtc_h);
  58. /* set drm framebuffer data. */
  59. overlay->fb_x = src_x;
  60. overlay->fb_y = src_y;
  61. overlay->fb_width = fb->width;
  62. overlay->fb_height = fb->height;
  63. overlay->src_width = src_w;
  64. overlay->src_height = src_h;
  65. overlay->bpp = fb->bits_per_pixel;
  66. overlay->pitch = fb->pitches[0];
  67. overlay->pixel_format = fb->pixel_format;
  68. /* set overlay range to be displayed. */
  69. overlay->crtc_x = crtc_x;
  70. overlay->crtc_y = crtc_y;
  71. overlay->crtc_width = actual_w;
  72. overlay->crtc_height = actual_h;
  73. /* set drm mode data. */
  74. overlay->mode_width = crtc->mode.hdisplay;
  75. overlay->mode_height = crtc->mode.vdisplay;
  76. overlay->refresh = crtc->mode.vrefresh;
  77. overlay->scan_flag = crtc->mode.flags;
  78. DRM_DEBUG_KMS("overlay : offset_x/y(%d,%d), width/height(%d,%d)",
  79. overlay->crtc_x, overlay->crtc_y,
  80. overlay->crtc_width, overlay->crtc_height);
  81. exynos_drm_fn_encoder(crtc, overlay, exynos_drm_encoder_plane_mode_set);
  82. return 0;
  83. }
  84. void exynos_plane_commit(struct drm_plane *plane)
  85. {
  86. struct exynos_plane *exynos_plane = to_exynos_plane(plane);
  87. struct exynos_drm_overlay *overlay = &exynos_plane->overlay;
  88. exynos_drm_fn_encoder(plane->crtc, &overlay->zpos,
  89. exynos_drm_encoder_plane_commit);
  90. }
  91. void exynos_plane_dpms(struct drm_plane *plane, int mode)
  92. {
  93. struct exynos_plane *exynos_plane = to_exynos_plane(plane);
  94. struct exynos_drm_overlay *overlay = &exynos_plane->overlay;
  95. DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__);
  96. if (mode == DRM_MODE_DPMS_ON) {
  97. if (exynos_plane->enabled)
  98. return;
  99. exynos_drm_fn_encoder(plane->crtc, &overlay->zpos,
  100. exynos_drm_encoder_plane_enable);
  101. exynos_plane->enabled = true;
  102. } else {
  103. if (!exynos_plane->enabled)
  104. return;
  105. exynos_drm_fn_encoder(plane->crtc, &overlay->zpos,
  106. exynos_drm_encoder_plane_disable);
  107. exynos_plane->enabled = false;
  108. }
  109. }
  110. static int
  111. exynos_update_plane(struct drm_plane *plane, struct drm_crtc *crtc,
  112. struct drm_framebuffer *fb, int crtc_x, int crtc_y,
  113. unsigned int crtc_w, unsigned int crtc_h,
  114. uint32_t src_x, uint32_t src_y,
  115. uint32_t src_w, uint32_t src_h)
  116. {
  117. int ret;
  118. DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__);
  119. ret = exynos_plane_mode_set(plane, crtc, fb, crtc_x, crtc_y,
  120. crtc_w, crtc_h, src_x >> 16, src_y >> 16,
  121. src_w >> 16, src_h >> 16);
  122. if (ret < 0)
  123. return ret;
  124. plane->crtc = crtc;
  125. plane->fb = crtc->fb;
  126. exynos_plane_commit(plane);
  127. exynos_plane_dpms(plane, DRM_MODE_DPMS_ON);
  128. return 0;
  129. }
  130. static int exynos_disable_plane(struct drm_plane *plane)
  131. {
  132. DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__);
  133. exynos_plane_dpms(plane, DRM_MODE_DPMS_OFF);
  134. return 0;
  135. }
  136. static void exynos_plane_destroy(struct drm_plane *plane)
  137. {
  138. struct exynos_plane *exynos_plane = to_exynos_plane(plane);
  139. DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__);
  140. exynos_disable_plane(plane);
  141. drm_plane_cleanup(plane);
  142. kfree(exynos_plane);
  143. }
  144. static int exynos_plane_set_property(struct drm_plane *plane,
  145. struct drm_property *property,
  146. uint64_t val)
  147. {
  148. struct drm_device *dev = plane->dev;
  149. struct exynos_plane *exynos_plane = to_exynos_plane(plane);
  150. struct exynos_drm_private *dev_priv = dev->dev_private;
  151. DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__);
  152. if (property == dev_priv->plane_zpos_property) {
  153. exynos_plane->overlay.zpos = val;
  154. return 0;
  155. }
  156. return -EINVAL;
  157. }
  158. static struct drm_plane_funcs exynos_plane_funcs = {
  159. .update_plane = exynos_update_plane,
  160. .disable_plane = exynos_disable_plane,
  161. .destroy = exynos_plane_destroy,
  162. .set_property = exynos_plane_set_property,
  163. };
  164. static void exynos_plane_attach_zpos_property(struct drm_plane *plane)
  165. {
  166. struct drm_device *dev = plane->dev;
  167. struct exynos_drm_private *dev_priv = dev->dev_private;
  168. struct drm_property *prop;
  169. DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__);
  170. prop = dev_priv->plane_zpos_property;
  171. if (!prop) {
  172. prop = drm_property_create_range(dev, 0, "zpos", 0,
  173. MAX_PLANE - 1);
  174. if (!prop)
  175. return;
  176. dev_priv->plane_zpos_property = prop;
  177. }
  178. drm_object_attach_property(&plane->base, prop, 0);
  179. }
  180. struct drm_plane *exynos_plane_init(struct drm_device *dev,
  181. unsigned int possible_crtcs, bool priv)
  182. {
  183. struct exynos_plane *exynos_plane;
  184. int err;
  185. DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__);
  186. exynos_plane = kzalloc(sizeof(struct exynos_plane), GFP_KERNEL);
  187. if (!exynos_plane) {
  188. DRM_ERROR("failed to allocate plane\n");
  189. return NULL;
  190. }
  191. err = drm_plane_init(dev, &exynos_plane->base, possible_crtcs,
  192. &exynos_plane_funcs, formats, ARRAY_SIZE(formats),
  193. priv);
  194. if (err) {
  195. DRM_ERROR("failed to initialize plane\n");
  196. kfree(exynos_plane);
  197. return NULL;
  198. }
  199. if (priv)
  200. exynos_plane->overlay.zpos = DEFAULT_ZPOS;
  201. else
  202. exynos_plane_attach_zpos_property(&exynos_plane->base);
  203. return &exynos_plane->base;
  204. }