exynos_drm_g2d.c 23 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937
  1. /*
  2. * Copyright (C) 2012 Samsung Electronics Co.Ltd
  3. * Authors: Joonyoung Shim <jy0922.shim@samsung.com>
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License version 2 as
  7. * published by the Free Software Foundationr
  8. */
  9. #include <linux/kernel.h>
  10. #include <linux/module.h>
  11. #include <linux/clk.h>
  12. #include <linux/err.h>
  13. #include <linux/interrupt.h>
  14. #include <linux/io.h>
  15. #include <linux/platform_device.h>
  16. #include <linux/pm_runtime.h>
  17. #include <linux/slab.h>
  18. #include <linux/workqueue.h>
  19. #include "drmP.h"
  20. #include "exynos_drm.h"
  21. #include "exynos_drm_drv.h"
  22. #include "exynos_drm_gem.h"
  23. #define G2D_HW_MAJOR_VER 4
  24. #define G2D_HW_MINOR_VER 1
  25. /* vaild register range set from user: 0x0104 ~ 0x0880 */
  26. #define G2D_VALID_START 0x0104
  27. #define G2D_VALID_END 0x0880
  28. /* general registers */
  29. #define G2D_SOFT_RESET 0x0000
  30. #define G2D_INTEN 0x0004
  31. #define G2D_INTC_PEND 0x000C
  32. #define G2D_DMA_SFR_BASE_ADDR 0x0080
  33. #define G2D_DMA_COMMAND 0x0084
  34. #define G2D_DMA_STATUS 0x008C
  35. #define G2D_DMA_HOLD_CMD 0x0090
  36. /* command registers */
  37. #define G2D_BITBLT_START 0x0100
  38. /* registers for base address */
  39. #define G2D_SRC_BASE_ADDR 0x0304
  40. #define G2D_SRC_PLANE2_BASE_ADDR 0x0318
  41. #define G2D_DST_BASE_ADDR 0x0404
  42. #define G2D_DST_PLANE2_BASE_ADDR 0x0418
  43. #define G2D_PAT_BASE_ADDR 0x0500
  44. #define G2D_MSK_BASE_ADDR 0x0520
  45. /* G2D_SOFT_RESET */
  46. #define G2D_SFRCLEAR (1 << 1)
  47. #define G2D_R (1 << 0)
  48. /* G2D_INTEN */
  49. #define G2D_INTEN_ACF (1 << 3)
  50. #define G2D_INTEN_UCF (1 << 2)
  51. #define G2D_INTEN_GCF (1 << 1)
  52. #define G2D_INTEN_SCF (1 << 0)
  53. /* G2D_INTC_PEND */
  54. #define G2D_INTP_ACMD_FIN (1 << 3)
  55. #define G2D_INTP_UCMD_FIN (1 << 2)
  56. #define G2D_INTP_GCMD_FIN (1 << 1)
  57. #define G2D_INTP_SCMD_FIN (1 << 0)
  58. /* G2D_DMA_COMMAND */
  59. #define G2D_DMA_HALT (1 << 2)
  60. #define G2D_DMA_CONTINUE (1 << 1)
  61. #define G2D_DMA_START (1 << 0)
  62. /* G2D_DMA_STATUS */
  63. #define G2D_DMA_LIST_DONE_COUNT (0xFF << 17)
  64. #define G2D_DMA_BITBLT_DONE_COUNT (0xFFFF << 1)
  65. #define G2D_DMA_DONE (1 << 0)
  66. #define G2D_DMA_LIST_DONE_COUNT_OFFSET 17
  67. /* G2D_DMA_HOLD_CMD */
  68. #define G2D_USET_HOLD (1 << 2)
  69. #define G2D_LIST_HOLD (1 << 1)
  70. #define G2D_BITBLT_HOLD (1 << 0)
  71. /* G2D_BITBLT_START */
  72. #define G2D_START_CASESEL (1 << 2)
  73. #define G2D_START_NHOLT (1 << 1)
  74. #define G2D_START_BITBLT (1 << 0)
  75. #define G2D_CMDLIST_SIZE (PAGE_SIZE / 4)
  76. #define G2D_CMDLIST_NUM 64
  77. #define G2D_CMDLIST_POOL_SIZE (G2D_CMDLIST_SIZE * G2D_CMDLIST_NUM)
  78. #define G2D_CMDLIST_DATA_NUM (G2D_CMDLIST_SIZE / sizeof(u32) - 2)
  79. /* cmdlist data structure */
  80. struct g2d_cmdlist {
  81. u32 head;
  82. u32 data[G2D_CMDLIST_DATA_NUM];
  83. u32 last; /* last data offset */
  84. };
  85. struct drm_exynos_pending_g2d_event {
  86. struct drm_pending_event base;
  87. struct drm_exynos_g2d_event event;
  88. };
  89. struct g2d_gem_node {
  90. struct list_head list;
  91. unsigned int handle;
  92. };
  93. struct g2d_cmdlist_node {
  94. struct list_head list;
  95. struct g2d_cmdlist *cmdlist;
  96. unsigned int gem_nr;
  97. dma_addr_t dma_addr;
  98. struct drm_exynos_pending_g2d_event *event;
  99. };
  100. struct g2d_runqueue_node {
  101. struct list_head list;
  102. struct list_head run_cmdlist;
  103. struct list_head event_list;
  104. struct completion complete;
  105. int async;
  106. };
  107. struct g2d_data {
  108. struct device *dev;
  109. struct clk *gate_clk;
  110. struct resource *regs_res;
  111. void __iomem *regs;
  112. int irq;
  113. struct workqueue_struct *g2d_workq;
  114. struct work_struct runqueue_work;
  115. struct exynos_drm_subdrv subdrv;
  116. bool suspended;
  117. /* cmdlist */
  118. struct g2d_cmdlist_node *cmdlist_node;
  119. struct list_head free_cmdlist;
  120. struct mutex cmdlist_mutex;
  121. dma_addr_t cmdlist_pool;
  122. void *cmdlist_pool_virt;
  123. /* runqueue*/
  124. struct g2d_runqueue_node *runqueue_node;
  125. struct list_head runqueue;
  126. struct mutex runqueue_mutex;
  127. struct kmem_cache *runqueue_slab;
  128. };
  129. static int g2d_init_cmdlist(struct g2d_data *g2d)
  130. {
  131. struct device *dev = g2d->dev;
  132. struct g2d_cmdlist_node *node = g2d->cmdlist_node;
  133. int nr;
  134. int ret;
  135. g2d->cmdlist_pool_virt = dma_alloc_coherent(dev, G2D_CMDLIST_POOL_SIZE,
  136. &g2d->cmdlist_pool, GFP_KERNEL);
  137. if (!g2d->cmdlist_pool_virt) {
  138. dev_err(dev, "failed to allocate dma memory\n");
  139. return -ENOMEM;
  140. }
  141. node = kcalloc(G2D_CMDLIST_NUM, G2D_CMDLIST_NUM * sizeof(*node),
  142. GFP_KERNEL);
  143. if (!node) {
  144. dev_err(dev, "failed to allocate memory\n");
  145. ret = -ENOMEM;
  146. goto err;
  147. }
  148. for (nr = 0; nr < G2D_CMDLIST_NUM; nr++) {
  149. node[nr].cmdlist =
  150. g2d->cmdlist_pool_virt + nr * G2D_CMDLIST_SIZE;
  151. node[nr].dma_addr =
  152. g2d->cmdlist_pool + nr * G2D_CMDLIST_SIZE;
  153. list_add_tail(&node[nr].list, &g2d->free_cmdlist);
  154. }
  155. return 0;
  156. err:
  157. dma_free_coherent(dev, G2D_CMDLIST_POOL_SIZE, g2d->cmdlist_pool_virt,
  158. g2d->cmdlist_pool);
  159. return ret;
  160. }
  161. static void g2d_fini_cmdlist(struct g2d_data *g2d)
  162. {
  163. struct device *dev = g2d->dev;
  164. kfree(g2d->cmdlist_node);
  165. dma_free_coherent(dev, G2D_CMDLIST_POOL_SIZE, g2d->cmdlist_pool_virt,
  166. g2d->cmdlist_pool);
  167. }
  168. static struct g2d_cmdlist_node *g2d_get_cmdlist(struct g2d_data *g2d)
  169. {
  170. struct device *dev = g2d->dev;
  171. struct g2d_cmdlist_node *node;
  172. mutex_lock(&g2d->cmdlist_mutex);
  173. if (list_empty(&g2d->free_cmdlist)) {
  174. dev_err(dev, "there is no free cmdlist\n");
  175. mutex_unlock(&g2d->cmdlist_mutex);
  176. return NULL;
  177. }
  178. node = list_first_entry(&g2d->free_cmdlist, struct g2d_cmdlist_node,
  179. list);
  180. list_del_init(&node->list);
  181. mutex_unlock(&g2d->cmdlist_mutex);
  182. return node;
  183. }
  184. static void g2d_put_cmdlist(struct g2d_data *g2d, struct g2d_cmdlist_node *node)
  185. {
  186. mutex_lock(&g2d->cmdlist_mutex);
  187. list_move_tail(&node->list, &g2d->free_cmdlist);
  188. mutex_unlock(&g2d->cmdlist_mutex);
  189. }
  190. static void g2d_add_cmdlist_to_inuse(struct exynos_drm_g2d_private *g2d_priv,
  191. struct g2d_cmdlist_node *node)
  192. {
  193. struct g2d_cmdlist_node *lnode;
  194. if (list_empty(&g2d_priv->inuse_cmdlist))
  195. goto add_to_list;
  196. /* this links to base address of new cmdlist */
  197. lnode = list_entry(g2d_priv->inuse_cmdlist.prev,
  198. struct g2d_cmdlist_node, list);
  199. lnode->cmdlist->data[lnode->cmdlist->last] = node->dma_addr;
  200. add_to_list:
  201. list_add_tail(&node->list, &g2d_priv->inuse_cmdlist);
  202. if (node->event)
  203. list_add_tail(&node->event->base.link, &g2d_priv->event_list);
  204. }
  205. static int g2d_get_cmdlist_gem(struct drm_device *drm_dev,
  206. struct drm_file *file,
  207. struct g2d_cmdlist_node *node)
  208. {
  209. struct drm_exynos_file_private *file_priv = file->driver_priv;
  210. struct exynos_drm_g2d_private *g2d_priv = file_priv->g2d_priv;
  211. struct g2d_cmdlist *cmdlist = node->cmdlist;
  212. dma_addr_t *addr;
  213. int offset;
  214. int i;
  215. for (i = 0; i < node->gem_nr; i++) {
  216. struct g2d_gem_node *gem_node;
  217. gem_node = kzalloc(sizeof(*gem_node), GFP_KERNEL);
  218. if (!gem_node) {
  219. dev_err(g2d_priv->dev, "failed to allocate gem node\n");
  220. return -ENOMEM;
  221. }
  222. offset = cmdlist->last - (i * 2 + 1);
  223. gem_node->handle = cmdlist->data[offset];
  224. addr = exynos_drm_gem_get_dma_addr(drm_dev, gem_node->handle,
  225. file);
  226. if (IS_ERR(addr)) {
  227. node->gem_nr = i;
  228. kfree(gem_node);
  229. return PTR_ERR(addr);
  230. }
  231. cmdlist->data[offset] = *addr;
  232. list_add_tail(&gem_node->list, &g2d_priv->gem_list);
  233. g2d_priv->gem_nr++;
  234. }
  235. return 0;
  236. }
  237. static void g2d_put_cmdlist_gem(struct drm_device *drm_dev,
  238. struct drm_file *file,
  239. unsigned int nr)
  240. {
  241. struct drm_exynos_file_private *file_priv = file->driver_priv;
  242. struct exynos_drm_g2d_private *g2d_priv = file_priv->g2d_priv;
  243. struct g2d_gem_node *node, *n;
  244. list_for_each_entry_safe_reverse(node, n, &g2d_priv->gem_list, list) {
  245. if (!nr)
  246. break;
  247. exynos_drm_gem_put_dma_addr(drm_dev, node->handle, file);
  248. list_del_init(&node->list);
  249. kfree(node);
  250. nr--;
  251. }
  252. }
  253. static void g2d_dma_start(struct g2d_data *g2d,
  254. struct g2d_runqueue_node *runqueue_node)
  255. {
  256. struct g2d_cmdlist_node *node =
  257. list_first_entry(&runqueue_node->run_cmdlist,
  258. struct g2d_cmdlist_node, list);
  259. pm_runtime_get_sync(g2d->dev);
  260. clk_enable(g2d->gate_clk);
  261. /* interrupt enable */
  262. writel_relaxed(G2D_INTEN_ACF | G2D_INTEN_UCF | G2D_INTEN_GCF,
  263. g2d->regs + G2D_INTEN);
  264. writel_relaxed(node->dma_addr, g2d->regs + G2D_DMA_SFR_BASE_ADDR);
  265. writel_relaxed(G2D_DMA_START, g2d->regs + G2D_DMA_COMMAND);
  266. }
  267. static struct g2d_runqueue_node *g2d_get_runqueue_node(struct g2d_data *g2d)
  268. {
  269. struct g2d_runqueue_node *runqueue_node;
  270. if (list_empty(&g2d->runqueue))
  271. return NULL;
  272. runqueue_node = list_first_entry(&g2d->runqueue,
  273. struct g2d_runqueue_node, list);
  274. list_del_init(&runqueue_node->list);
  275. return runqueue_node;
  276. }
  277. static void g2d_free_runqueue_node(struct g2d_data *g2d,
  278. struct g2d_runqueue_node *runqueue_node)
  279. {
  280. if (!runqueue_node)
  281. return;
  282. mutex_lock(&g2d->cmdlist_mutex);
  283. list_splice_tail_init(&runqueue_node->run_cmdlist, &g2d->free_cmdlist);
  284. mutex_unlock(&g2d->cmdlist_mutex);
  285. kmem_cache_free(g2d->runqueue_slab, runqueue_node);
  286. }
  287. static void g2d_exec_runqueue(struct g2d_data *g2d)
  288. {
  289. g2d->runqueue_node = g2d_get_runqueue_node(g2d);
  290. if (g2d->runqueue_node)
  291. g2d_dma_start(g2d, g2d->runqueue_node);
  292. }
  293. static void g2d_runqueue_worker(struct work_struct *work)
  294. {
  295. struct g2d_data *g2d = container_of(work, struct g2d_data,
  296. runqueue_work);
  297. mutex_lock(&g2d->runqueue_mutex);
  298. clk_disable(g2d->gate_clk);
  299. pm_runtime_put_sync(g2d->dev);
  300. complete(&g2d->runqueue_node->complete);
  301. if (g2d->runqueue_node->async)
  302. g2d_free_runqueue_node(g2d, g2d->runqueue_node);
  303. if (g2d->suspended)
  304. g2d->runqueue_node = NULL;
  305. else
  306. g2d_exec_runqueue(g2d);
  307. mutex_unlock(&g2d->runqueue_mutex);
  308. }
  309. static void g2d_finish_event(struct g2d_data *g2d, u32 cmdlist_no)
  310. {
  311. struct drm_device *drm_dev = g2d->subdrv.drm_dev;
  312. struct g2d_runqueue_node *runqueue_node = g2d->runqueue_node;
  313. struct drm_exynos_pending_g2d_event *e;
  314. struct timeval now;
  315. unsigned long flags;
  316. if (list_empty(&runqueue_node->event_list))
  317. return;
  318. e = list_first_entry(&runqueue_node->event_list,
  319. struct drm_exynos_pending_g2d_event, base.link);
  320. do_gettimeofday(&now);
  321. e->event.tv_sec = now.tv_sec;
  322. e->event.tv_usec = now.tv_usec;
  323. e->event.cmdlist_no = cmdlist_no;
  324. spin_lock_irqsave(&drm_dev->event_lock, flags);
  325. list_move_tail(&e->base.link, &e->base.file_priv->event_list);
  326. wake_up_interruptible(&e->base.file_priv->event_wait);
  327. spin_unlock_irqrestore(&drm_dev->event_lock, flags);
  328. }
  329. static irqreturn_t g2d_irq_handler(int irq, void *dev_id)
  330. {
  331. struct g2d_data *g2d = dev_id;
  332. u32 pending;
  333. pending = readl_relaxed(g2d->regs + G2D_INTC_PEND);
  334. if (pending)
  335. writel_relaxed(pending, g2d->regs + G2D_INTC_PEND);
  336. if (pending & G2D_INTP_GCMD_FIN) {
  337. u32 cmdlist_no = readl_relaxed(g2d->regs + G2D_DMA_STATUS);
  338. cmdlist_no = (cmdlist_no & G2D_DMA_LIST_DONE_COUNT) >>
  339. G2D_DMA_LIST_DONE_COUNT_OFFSET;
  340. g2d_finish_event(g2d, cmdlist_no);
  341. writel_relaxed(0, g2d->regs + G2D_DMA_HOLD_CMD);
  342. if (!(pending & G2D_INTP_ACMD_FIN)) {
  343. writel_relaxed(G2D_DMA_CONTINUE,
  344. g2d->regs + G2D_DMA_COMMAND);
  345. }
  346. }
  347. if (pending & G2D_INTP_ACMD_FIN)
  348. queue_work(g2d->g2d_workq, &g2d->runqueue_work);
  349. return IRQ_HANDLED;
  350. }
  351. static int g2d_check_reg_offset(struct device *dev, struct g2d_cmdlist *cmdlist,
  352. int nr, bool for_addr)
  353. {
  354. int reg_offset;
  355. int index;
  356. int i;
  357. for (i = 0; i < nr; i++) {
  358. index = cmdlist->last - 2 * (i + 1);
  359. reg_offset = cmdlist->data[index] & ~0xfffff000;
  360. if (reg_offset < G2D_VALID_START || reg_offset > G2D_VALID_END)
  361. goto err;
  362. if (reg_offset % 4)
  363. goto err;
  364. switch (reg_offset) {
  365. case G2D_SRC_BASE_ADDR:
  366. case G2D_SRC_PLANE2_BASE_ADDR:
  367. case G2D_DST_BASE_ADDR:
  368. case G2D_DST_PLANE2_BASE_ADDR:
  369. case G2D_PAT_BASE_ADDR:
  370. case G2D_MSK_BASE_ADDR:
  371. if (!for_addr)
  372. goto err;
  373. break;
  374. default:
  375. if (for_addr)
  376. goto err;
  377. break;
  378. }
  379. }
  380. return 0;
  381. err:
  382. dev_err(dev, "Bad register offset: 0x%x\n", cmdlist->data[index]);
  383. return -EINVAL;
  384. }
  385. /* ioctl functions */
  386. int exynos_g2d_get_ver_ioctl(struct drm_device *drm_dev, void *data,
  387. struct drm_file *file)
  388. {
  389. struct drm_exynos_g2d_get_ver *ver = data;
  390. ver->major = G2D_HW_MAJOR_VER;
  391. ver->minor = G2D_HW_MINOR_VER;
  392. return 0;
  393. }
  394. EXPORT_SYMBOL_GPL(exynos_g2d_get_ver_ioctl);
  395. int exynos_g2d_set_cmdlist_ioctl(struct drm_device *drm_dev, void *data,
  396. struct drm_file *file)
  397. {
  398. struct drm_exynos_file_private *file_priv = file->driver_priv;
  399. struct exynos_drm_g2d_private *g2d_priv = file_priv->g2d_priv;
  400. struct device *dev = g2d_priv->dev;
  401. struct g2d_data *g2d;
  402. struct drm_exynos_g2d_set_cmdlist *req = data;
  403. struct drm_exynos_g2d_cmd *cmd;
  404. struct drm_exynos_pending_g2d_event *e;
  405. struct g2d_cmdlist_node *node;
  406. struct g2d_cmdlist *cmdlist;
  407. unsigned long flags;
  408. int size;
  409. int ret;
  410. if (!dev)
  411. return -ENODEV;
  412. g2d = dev_get_drvdata(dev);
  413. if (!g2d)
  414. return -EFAULT;
  415. node = g2d_get_cmdlist(g2d);
  416. if (!node)
  417. return -ENOMEM;
  418. node->event = NULL;
  419. if (req->event_type != G2D_EVENT_NOT) {
  420. spin_lock_irqsave(&drm_dev->event_lock, flags);
  421. if (file->event_space < sizeof(e->event)) {
  422. spin_unlock_irqrestore(&drm_dev->event_lock, flags);
  423. ret = -ENOMEM;
  424. goto err;
  425. }
  426. file->event_space -= sizeof(e->event);
  427. spin_unlock_irqrestore(&drm_dev->event_lock, flags);
  428. e = kzalloc(sizeof(*node->event), GFP_KERNEL);
  429. if (!e) {
  430. dev_err(dev, "failed to allocate event\n");
  431. spin_lock_irqsave(&drm_dev->event_lock, flags);
  432. file->event_space += sizeof(e->event);
  433. spin_unlock_irqrestore(&drm_dev->event_lock, flags);
  434. ret = -ENOMEM;
  435. goto err;
  436. }
  437. e->event.base.type = DRM_EXYNOS_G2D_EVENT;
  438. e->event.base.length = sizeof(e->event);
  439. e->event.user_data = req->user_data;
  440. e->base.event = &e->event.base;
  441. e->base.file_priv = file;
  442. e->base.destroy = (void (*) (struct drm_pending_event *)) kfree;
  443. node->event = e;
  444. }
  445. cmdlist = node->cmdlist;
  446. cmdlist->last = 0;
  447. /*
  448. * If don't clear SFR registers, the cmdlist is affected by register
  449. * values of previous cmdlist. G2D hw executes SFR clear command and
  450. * a next command at the same time then the next command is ignored and
  451. * is executed rightly from next next command, so needs a dummy command
  452. * to next command of SFR clear command.
  453. */
  454. cmdlist->data[cmdlist->last++] = G2D_SOFT_RESET;
  455. cmdlist->data[cmdlist->last++] = G2D_SFRCLEAR;
  456. cmdlist->data[cmdlist->last++] = G2D_SRC_BASE_ADDR;
  457. cmdlist->data[cmdlist->last++] = 0;
  458. if (node->event) {
  459. cmdlist->data[cmdlist->last++] = G2D_DMA_HOLD_CMD;
  460. cmdlist->data[cmdlist->last++] = G2D_LIST_HOLD;
  461. }
  462. /* Check size of cmdlist: last 2 is about G2D_BITBLT_START */
  463. size = cmdlist->last + req->cmd_nr * 2 + req->cmd_gem_nr * 2 + 2;
  464. if (size > G2D_CMDLIST_DATA_NUM) {
  465. dev_err(dev, "cmdlist size is too big\n");
  466. ret = -EINVAL;
  467. goto err_free_event;
  468. }
  469. cmd = (struct drm_exynos_g2d_cmd *)(uint32_t)req->cmd;
  470. if (copy_from_user(cmdlist->data + cmdlist->last,
  471. (void __user *)cmd,
  472. sizeof(*cmd) * req->cmd_nr)) {
  473. ret = -EFAULT;
  474. goto err_free_event;
  475. }
  476. cmdlist->last += req->cmd_nr * 2;
  477. ret = g2d_check_reg_offset(dev, cmdlist, req->cmd_nr, false);
  478. if (ret < 0)
  479. goto err_free_event;
  480. node->gem_nr = req->cmd_gem_nr;
  481. if (req->cmd_gem_nr) {
  482. struct drm_exynos_g2d_cmd *cmd_gem;
  483. cmd_gem = (struct drm_exynos_g2d_cmd *)(uint32_t)req->cmd_gem;
  484. if (copy_from_user(cmdlist->data + cmdlist->last,
  485. (void __user *)cmd_gem,
  486. sizeof(*cmd_gem) * req->cmd_gem_nr)) {
  487. ret = -EFAULT;
  488. goto err_free_event;
  489. }
  490. cmdlist->last += req->cmd_gem_nr * 2;
  491. ret = g2d_check_reg_offset(dev, cmdlist, req->cmd_gem_nr, true);
  492. if (ret < 0)
  493. goto err_free_event;
  494. ret = g2d_get_cmdlist_gem(drm_dev, file, node);
  495. if (ret < 0)
  496. goto err_unmap;
  497. }
  498. cmdlist->data[cmdlist->last++] = G2D_BITBLT_START;
  499. cmdlist->data[cmdlist->last++] = G2D_START_BITBLT;
  500. /* head */
  501. cmdlist->head = cmdlist->last / 2;
  502. /* tail */
  503. cmdlist->data[cmdlist->last] = 0;
  504. g2d_add_cmdlist_to_inuse(g2d_priv, node);
  505. return 0;
  506. err_unmap:
  507. g2d_put_cmdlist_gem(drm_dev, file, node->gem_nr);
  508. err_free_event:
  509. if (node->event) {
  510. spin_lock_irqsave(&drm_dev->event_lock, flags);
  511. file->event_space += sizeof(e->event);
  512. spin_unlock_irqrestore(&drm_dev->event_lock, flags);
  513. kfree(node->event);
  514. }
  515. err:
  516. g2d_put_cmdlist(g2d, node);
  517. return ret;
  518. }
  519. EXPORT_SYMBOL_GPL(exynos_g2d_set_cmdlist_ioctl);
  520. int exynos_g2d_exec_ioctl(struct drm_device *drm_dev, void *data,
  521. struct drm_file *file)
  522. {
  523. struct drm_exynos_file_private *file_priv = file->driver_priv;
  524. struct exynos_drm_g2d_private *g2d_priv = file_priv->g2d_priv;
  525. struct device *dev = g2d_priv->dev;
  526. struct g2d_data *g2d;
  527. struct drm_exynos_g2d_exec *req = data;
  528. struct g2d_runqueue_node *runqueue_node;
  529. struct list_head *run_cmdlist;
  530. struct list_head *event_list;
  531. if (!dev)
  532. return -ENODEV;
  533. g2d = dev_get_drvdata(dev);
  534. if (!g2d)
  535. return -EFAULT;
  536. runqueue_node = kmem_cache_alloc(g2d->runqueue_slab, GFP_KERNEL);
  537. if (!runqueue_node) {
  538. dev_err(dev, "failed to allocate memory\n");
  539. return -ENOMEM;
  540. }
  541. run_cmdlist = &runqueue_node->run_cmdlist;
  542. event_list = &runqueue_node->event_list;
  543. INIT_LIST_HEAD(run_cmdlist);
  544. INIT_LIST_HEAD(event_list);
  545. init_completion(&runqueue_node->complete);
  546. runqueue_node->async = req->async;
  547. list_splice_init(&g2d_priv->inuse_cmdlist, run_cmdlist);
  548. list_splice_init(&g2d_priv->event_list, event_list);
  549. if (list_empty(run_cmdlist)) {
  550. dev_err(dev, "there is no inuse cmdlist\n");
  551. kmem_cache_free(g2d->runqueue_slab, runqueue_node);
  552. return -EPERM;
  553. }
  554. mutex_lock(&g2d->runqueue_mutex);
  555. list_add_tail(&runqueue_node->list, &g2d->runqueue);
  556. if (!g2d->runqueue_node)
  557. g2d_exec_runqueue(g2d);
  558. mutex_unlock(&g2d->runqueue_mutex);
  559. if (runqueue_node->async)
  560. goto out;
  561. wait_for_completion(&runqueue_node->complete);
  562. g2d_free_runqueue_node(g2d, runqueue_node);
  563. out:
  564. return 0;
  565. }
  566. EXPORT_SYMBOL_GPL(exynos_g2d_exec_ioctl);
  567. static int g2d_open(struct drm_device *drm_dev, struct device *dev,
  568. struct drm_file *file)
  569. {
  570. struct drm_exynos_file_private *file_priv = file->driver_priv;
  571. struct exynos_drm_g2d_private *g2d_priv;
  572. g2d_priv = kzalloc(sizeof(*g2d_priv), GFP_KERNEL);
  573. if (!g2d_priv) {
  574. dev_err(dev, "failed to allocate g2d private data\n");
  575. return -ENOMEM;
  576. }
  577. g2d_priv->dev = dev;
  578. file_priv->g2d_priv = g2d_priv;
  579. INIT_LIST_HEAD(&g2d_priv->inuse_cmdlist);
  580. INIT_LIST_HEAD(&g2d_priv->event_list);
  581. INIT_LIST_HEAD(&g2d_priv->gem_list);
  582. return 0;
  583. }
  584. static void g2d_close(struct drm_device *drm_dev, struct device *dev,
  585. struct drm_file *file)
  586. {
  587. struct drm_exynos_file_private *file_priv = file->driver_priv;
  588. struct exynos_drm_g2d_private *g2d_priv = file_priv->g2d_priv;
  589. struct g2d_data *g2d;
  590. struct g2d_cmdlist_node *node, *n;
  591. if (!dev)
  592. return;
  593. g2d = dev_get_drvdata(dev);
  594. if (!g2d)
  595. return;
  596. mutex_lock(&g2d->cmdlist_mutex);
  597. list_for_each_entry_safe(node, n, &g2d_priv->inuse_cmdlist, list)
  598. list_move_tail(&node->list, &g2d->free_cmdlist);
  599. mutex_unlock(&g2d->cmdlist_mutex);
  600. g2d_put_cmdlist_gem(drm_dev, file, g2d_priv->gem_nr);
  601. kfree(file_priv->g2d_priv);
  602. }
  603. static int __devinit g2d_probe(struct platform_device *pdev)
  604. {
  605. struct device *dev = &pdev->dev;
  606. struct resource *res;
  607. struct g2d_data *g2d;
  608. struct exynos_drm_subdrv *subdrv;
  609. int ret;
  610. g2d = kzalloc(sizeof(*g2d), GFP_KERNEL);
  611. if (!g2d) {
  612. dev_err(dev, "failed to allocate driver data\n");
  613. return -ENOMEM;
  614. }
  615. g2d->runqueue_slab = kmem_cache_create("g2d_runqueue_slab",
  616. sizeof(struct g2d_runqueue_node), 0, 0, NULL);
  617. if (!g2d->runqueue_slab) {
  618. ret = -ENOMEM;
  619. goto err_free_mem;
  620. }
  621. g2d->dev = dev;
  622. g2d->g2d_workq = create_singlethread_workqueue("g2d");
  623. if (!g2d->g2d_workq) {
  624. dev_err(dev, "failed to create workqueue\n");
  625. ret = -EINVAL;
  626. goto err_destroy_slab;
  627. }
  628. INIT_WORK(&g2d->runqueue_work, g2d_runqueue_worker);
  629. INIT_LIST_HEAD(&g2d->free_cmdlist);
  630. INIT_LIST_HEAD(&g2d->runqueue);
  631. mutex_init(&g2d->cmdlist_mutex);
  632. mutex_init(&g2d->runqueue_mutex);
  633. ret = g2d_init_cmdlist(g2d);
  634. if (ret < 0)
  635. goto err_destroy_workqueue;
  636. g2d->gate_clk = clk_get(dev, "fimg2d");
  637. if (IS_ERR(g2d->gate_clk)) {
  638. dev_err(dev, "failed to get gate clock\n");
  639. ret = PTR_ERR(g2d->gate_clk);
  640. goto err_fini_cmdlist;
  641. }
  642. pm_runtime_enable(dev);
  643. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  644. if (!res) {
  645. dev_err(dev, "failed to get I/O memory\n");
  646. ret = -ENOENT;
  647. goto err_put_clk;
  648. }
  649. g2d->regs_res = request_mem_region(res->start, resource_size(res),
  650. dev_name(dev));
  651. if (!g2d->regs_res) {
  652. dev_err(dev, "failed to request I/O memory\n");
  653. ret = -ENOENT;
  654. goto err_put_clk;
  655. }
  656. g2d->regs = ioremap(res->start, resource_size(res));
  657. if (!g2d->regs) {
  658. dev_err(dev, "failed to remap I/O memory\n");
  659. ret = -ENXIO;
  660. goto err_release_res;
  661. }
  662. g2d->irq = platform_get_irq(pdev, 0);
  663. if (g2d->irq < 0) {
  664. dev_err(dev, "failed to get irq\n");
  665. ret = g2d->irq;
  666. goto err_unmap_base;
  667. }
  668. ret = request_irq(g2d->irq, g2d_irq_handler, 0, "drm_g2d", g2d);
  669. if (ret < 0) {
  670. dev_err(dev, "irq request failed\n");
  671. goto err_unmap_base;
  672. }
  673. platform_set_drvdata(pdev, g2d);
  674. subdrv = &g2d->subdrv;
  675. subdrv->dev = dev;
  676. subdrv->open = g2d_open;
  677. subdrv->close = g2d_close;
  678. ret = exynos_drm_subdrv_register(subdrv);
  679. if (ret < 0) {
  680. dev_err(dev, "failed to register drm g2d device\n");
  681. goto err_free_irq;
  682. }
  683. dev_info(dev, "The exynos g2d(ver %d.%d) successfully probed\n",
  684. G2D_HW_MAJOR_VER, G2D_HW_MINOR_VER);
  685. return 0;
  686. err_free_irq:
  687. free_irq(g2d->irq, g2d);
  688. err_unmap_base:
  689. iounmap(g2d->regs);
  690. err_release_res:
  691. release_resource(g2d->regs_res);
  692. kfree(g2d->regs_res);
  693. err_put_clk:
  694. pm_runtime_disable(dev);
  695. clk_put(g2d->gate_clk);
  696. err_fini_cmdlist:
  697. g2d_fini_cmdlist(g2d);
  698. err_destroy_workqueue:
  699. destroy_workqueue(g2d->g2d_workq);
  700. err_destroy_slab:
  701. kmem_cache_destroy(g2d->runqueue_slab);
  702. err_free_mem:
  703. kfree(g2d);
  704. return ret;
  705. }
  706. static int __devexit g2d_remove(struct platform_device *pdev)
  707. {
  708. struct g2d_data *g2d = platform_get_drvdata(pdev);
  709. cancel_work_sync(&g2d->runqueue_work);
  710. exynos_drm_subdrv_unregister(&g2d->subdrv);
  711. free_irq(g2d->irq, g2d);
  712. while (g2d->runqueue_node) {
  713. g2d_free_runqueue_node(g2d, g2d->runqueue_node);
  714. g2d->runqueue_node = g2d_get_runqueue_node(g2d);
  715. }
  716. iounmap(g2d->regs);
  717. release_resource(g2d->regs_res);
  718. kfree(g2d->regs_res);
  719. pm_runtime_disable(&pdev->dev);
  720. clk_put(g2d->gate_clk);
  721. g2d_fini_cmdlist(g2d);
  722. destroy_workqueue(g2d->g2d_workq);
  723. kmem_cache_destroy(g2d->runqueue_slab);
  724. kfree(g2d);
  725. return 0;
  726. }
  727. #ifdef CONFIG_PM_SLEEP
  728. static int g2d_suspend(struct device *dev)
  729. {
  730. struct g2d_data *g2d = dev_get_drvdata(dev);
  731. mutex_lock(&g2d->runqueue_mutex);
  732. g2d->suspended = true;
  733. mutex_unlock(&g2d->runqueue_mutex);
  734. while (g2d->runqueue_node)
  735. /* FIXME: good range? */
  736. usleep_range(500, 1000);
  737. flush_work_sync(&g2d->runqueue_work);
  738. return 0;
  739. }
  740. static int g2d_resume(struct device *dev)
  741. {
  742. struct g2d_data *g2d = dev_get_drvdata(dev);
  743. g2d->suspended = false;
  744. g2d_exec_runqueue(g2d);
  745. return 0;
  746. }
  747. #endif
  748. SIMPLE_DEV_PM_OPS(g2d_pm_ops, g2d_suspend, g2d_resume);
  749. struct platform_driver g2d_driver = {
  750. .probe = g2d_probe,
  751. .remove = __devexit_p(g2d_remove),
  752. .driver = {
  753. .name = "s5p-g2d",
  754. .owner = THIS_MODULE,
  755. .pm = &g2d_pm_ops,
  756. },
  757. };