atl1_main.c 68 KB

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  1. /*
  2. * Copyright(c) 2005 - 2006 Attansic Corporation. All rights reserved.
  3. * Copyright(c) 2006 Chris Snook <csnook@redhat.com>
  4. * Copyright(c) 2006 Jay Cliburn <jcliburn@gmail.com>
  5. *
  6. * Derived from Intel e1000 driver
  7. * Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
  8. *
  9. * This program is free software; you can redistribute it and/or modify it
  10. * under the terms of the GNU General Public License as published by the Free
  11. * Software Foundation; either version 2 of the License, or (at your option)
  12. * any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful, but WITHOUT
  15. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  16. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  17. * more details.
  18. *
  19. * You should have received a copy of the GNU General Public License along with
  20. * this program; if not, write to the Free Software Foundation, Inc., 59
  21. * Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  22. *
  23. * The full GNU General Public License is included in this distribution in the
  24. * file called COPYING.
  25. *
  26. * Contact Information:
  27. * Xiong Huang <xiong_huang@attansic.com>
  28. * Attansic Technology Corp. 3F 147, Xianzheng 9th Road, Zhubei,
  29. * Xinzhu 302, TAIWAN, REPUBLIC OF CHINA
  30. *
  31. * Chris Snook <csnook@redhat.com>
  32. * Jay Cliburn <jcliburn@gmail.com>
  33. *
  34. * This version is adapted from the Attansic reference driver for
  35. * inclusion in the Linux kernel. It is currently under heavy development.
  36. * A very incomplete list of things that need to be dealt with:
  37. *
  38. * TODO:
  39. * Fix TSO; tx performance is horrible with TSO enabled.
  40. * Wake on LAN.
  41. * Add more ethtool functions, including set ring parameters.
  42. * Fix abstruse irq enable/disable condition described here:
  43. * http://marc.theaimsgroup.com/?l=linux-netdev&m=116398508500553&w=2
  44. *
  45. * NEEDS TESTING:
  46. * VLAN
  47. * multicast
  48. * promiscuous mode
  49. * interrupt coalescing
  50. * SMP torture testing
  51. */
  52. #include <linux/types.h>
  53. #include <linux/netdevice.h>
  54. #include <linux/pci.h>
  55. #include <linux/spinlock.h>
  56. #include <linux/slab.h>
  57. #include <linux/string.h>
  58. #include <linux/skbuff.h>
  59. #include <linux/etherdevice.h>
  60. #include <linux/if_vlan.h>
  61. #include <linux/irqreturn.h>
  62. #include <linux/workqueue.h>
  63. #include <linux/timer.h>
  64. #include <linux/jiffies.h>
  65. #include <linux/hardirq.h>
  66. #include <linux/interrupt.h>
  67. #include <linux/irqflags.h>
  68. #include <linux/dma-mapping.h>
  69. #include <linux/net.h>
  70. #include <linux/pm.h>
  71. #include <linux/in.h>
  72. #include <linux/ip.h>
  73. #include <linux/tcp.h>
  74. #include <linux/compiler.h>
  75. #include <linux/delay.h>
  76. #include <linux/mii.h>
  77. #include <net/checksum.h>
  78. #include <asm/atomic.h>
  79. #include <asm/byteorder.h>
  80. #include "atl1.h"
  81. #define DRIVER_VERSION "2.0.7"
  82. char atl1_driver_name[] = "atl1";
  83. static const char atl1_driver_string[] = "Attansic L1 Ethernet Network Driver";
  84. static const char atl1_copyright[] = "Copyright(c) 2005-2006 Attansic Corporation.";
  85. char atl1_driver_version[] = DRIVER_VERSION;
  86. MODULE_AUTHOR
  87. ("Attansic Corporation <xiong_huang@attansic.com>, Chris Snook <csnook@redhat.com>, Jay Cliburn <jcliburn@gmail.com>");
  88. MODULE_DESCRIPTION("Attansic 1000M Ethernet Network Driver");
  89. MODULE_LICENSE("GPL");
  90. MODULE_VERSION(DRIVER_VERSION);
  91. /*
  92. * atl1_pci_tbl - PCI Device ID Table
  93. */
  94. static const struct pci_device_id atl1_pci_tbl[] = {
  95. {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATTANSIC_L1)},
  96. /* required last entry */
  97. {0,}
  98. };
  99. MODULE_DEVICE_TABLE(pci, atl1_pci_tbl);
  100. /*
  101. * atl1_sw_init - Initialize general software structures (struct atl1_adapter)
  102. * @adapter: board private structure to initialize
  103. *
  104. * atl1_sw_init initializes the Adapter private data structure.
  105. * Fields are initialized based on PCI device information and
  106. * OS network device settings (MTU size).
  107. */
  108. static int __devinit atl1_sw_init(struct atl1_adapter *adapter)
  109. {
  110. struct atl1_hw *hw = &adapter->hw;
  111. struct net_device *netdev = adapter->netdev;
  112. struct pci_dev *pdev = adapter->pdev;
  113. /* PCI config space info */
  114. pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
  115. hw->max_frame_size = netdev->mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
  116. hw->min_frame_size = MINIMUM_ETHERNET_FRAME_SIZE;
  117. adapter->wol = 0;
  118. adapter->rx_buffer_len = (hw->max_frame_size + 7) & ~7;
  119. adapter->ict = 50000; /* 100ms */
  120. adapter->link_speed = SPEED_0; /* hardware init */
  121. adapter->link_duplex = FULL_DUPLEX;
  122. hw->phy_configured = false;
  123. hw->preamble_len = 7;
  124. hw->ipgt = 0x60;
  125. hw->min_ifg = 0x50;
  126. hw->ipgr1 = 0x40;
  127. hw->ipgr2 = 0x60;
  128. hw->max_retry = 0xf;
  129. hw->lcol = 0x37;
  130. hw->jam_ipg = 7;
  131. hw->rfd_burst = 8;
  132. hw->rrd_burst = 8;
  133. hw->rfd_fetch_gap = 1;
  134. hw->rx_jumbo_th = adapter->rx_buffer_len / 8;
  135. hw->rx_jumbo_lkah = 1;
  136. hw->rrd_ret_timer = 16;
  137. hw->tpd_burst = 4;
  138. hw->tpd_fetch_th = 16;
  139. hw->txf_burst = 0x100;
  140. hw->tx_jumbo_task_th = (hw->max_frame_size + 7) >> 3;
  141. hw->tpd_fetch_gap = 1;
  142. hw->rcb_value = atl1_rcb_64;
  143. hw->dma_ord = atl1_dma_ord_enh;
  144. hw->dmar_block = atl1_dma_req_256;
  145. hw->dmaw_block = atl1_dma_req_256;
  146. hw->cmb_rrd = 4;
  147. hw->cmb_tpd = 4;
  148. hw->cmb_rx_timer = 1; /* about 2us */
  149. hw->cmb_tx_timer = 1; /* about 2us */
  150. hw->smb_timer = 100000; /* about 200ms */
  151. atomic_set(&adapter->irq_sem, 0);
  152. spin_lock_init(&adapter->lock);
  153. spin_lock_init(&adapter->mb_lock);
  154. return 0;
  155. }
  156. /*
  157. * atl1_setup_mem_resources - allocate Tx / RX descriptor resources
  158. * @adapter: board private structure
  159. *
  160. * Return 0 on success, negative on failure
  161. */
  162. s32 atl1_setup_ring_resources(struct atl1_adapter *adapter)
  163. {
  164. struct atl1_tpd_ring *tpd_ring = &adapter->tpd_ring;
  165. struct atl1_rfd_ring *rfd_ring = &adapter->rfd_ring;
  166. struct atl1_rrd_ring *rrd_ring = &adapter->rrd_ring;
  167. struct atl1_ring_header *ring_header = &adapter->ring_header;
  168. struct pci_dev *pdev = adapter->pdev;
  169. int size;
  170. u8 offset = 0;
  171. size = sizeof(struct atl1_buffer) * (tpd_ring->count + rfd_ring->count);
  172. tpd_ring->buffer_info = kzalloc(size, GFP_KERNEL);
  173. if (unlikely(!tpd_ring->buffer_info)) {
  174. dev_err(&pdev->dev, "kzalloc failed , size = D%d\n", size);
  175. goto err_nomem;
  176. }
  177. rfd_ring->buffer_info =
  178. (struct atl1_buffer *)(tpd_ring->buffer_info + tpd_ring->count);
  179. /* real ring DMA buffer */
  180. ring_header->size = size = sizeof(struct tx_packet_desc) *
  181. tpd_ring->count
  182. + sizeof(struct rx_free_desc) * rfd_ring->count
  183. + sizeof(struct rx_return_desc) * rrd_ring->count
  184. + sizeof(struct coals_msg_block)
  185. + sizeof(struct stats_msg_block)
  186. + 40; /* "40: for 8 bytes align" huh? -- CHS */
  187. ring_header->desc = pci_alloc_consistent(pdev, ring_header->size,
  188. &ring_header->dma);
  189. if (unlikely(!ring_header->desc)) {
  190. dev_err(&pdev->dev, "pci_alloc_consistent failed\n");
  191. goto err_nomem;
  192. }
  193. memset(ring_header->desc, 0, ring_header->size);
  194. /* init TPD ring */
  195. tpd_ring->dma = ring_header->dma;
  196. offset = (tpd_ring->dma & 0x7) ? (8 - (ring_header->dma & 0x7)) : 0;
  197. tpd_ring->dma += offset;
  198. tpd_ring->desc = (u8 *) ring_header->desc + offset;
  199. tpd_ring->size = sizeof(struct tx_packet_desc) * tpd_ring->count;
  200. atomic_set(&tpd_ring->next_to_use, 0);
  201. atomic_set(&tpd_ring->next_to_clean, 0);
  202. /* init RFD ring */
  203. rfd_ring->dma = tpd_ring->dma + tpd_ring->size;
  204. offset = (rfd_ring->dma & 0x7) ? (8 - (rfd_ring->dma & 0x7)) : 0;
  205. rfd_ring->dma += offset;
  206. rfd_ring->desc = (u8 *) tpd_ring->desc + (tpd_ring->size + offset);
  207. rfd_ring->size = sizeof(struct rx_free_desc) * rfd_ring->count;
  208. rfd_ring->next_to_clean = 0;
  209. /* rfd_ring->next_to_use = rfd_ring->count - 1; */
  210. atomic_set(&rfd_ring->next_to_use, 0);
  211. /* init RRD ring */
  212. rrd_ring->dma = rfd_ring->dma + rfd_ring->size;
  213. offset = (rrd_ring->dma & 0x7) ? (8 - (rrd_ring->dma & 0x7)) : 0;
  214. rrd_ring->dma += offset;
  215. rrd_ring->desc = (u8 *) rfd_ring->desc + (rfd_ring->size + offset);
  216. rrd_ring->size = sizeof(struct rx_return_desc) * rrd_ring->count;
  217. rrd_ring->next_to_use = 0;
  218. atomic_set(&rrd_ring->next_to_clean, 0);
  219. /* init CMB */
  220. adapter->cmb.dma = rrd_ring->dma + rrd_ring->size;
  221. offset = (adapter->cmb.dma & 0x7) ? (8 - (adapter->cmb.dma & 0x7)) : 0;
  222. adapter->cmb.dma += offset;
  223. adapter->cmb.cmb =
  224. (struct coals_msg_block *) ((u8 *) rrd_ring->desc +
  225. (rrd_ring->size + offset));
  226. /* init SMB */
  227. adapter->smb.dma = adapter->cmb.dma + sizeof(struct coals_msg_block);
  228. offset = (adapter->smb.dma & 0x7) ? (8 - (adapter->smb.dma & 0x7)) : 0;
  229. adapter->smb.dma += offset;
  230. adapter->smb.smb = (struct stats_msg_block *)
  231. ((u8 *) adapter->cmb.cmb + (sizeof(struct coals_msg_block) + offset));
  232. return ATL1_SUCCESS;
  233. err_nomem:
  234. kfree(tpd_ring->buffer_info);
  235. return -ENOMEM;
  236. }
  237. /*
  238. * atl1_irq_enable - Enable default interrupt generation settings
  239. * @adapter: board private structure
  240. */
  241. static void atl1_irq_enable(struct atl1_adapter *adapter)
  242. {
  243. if (likely(!atomic_dec_and_test(&adapter->irq_sem)))
  244. iowrite32(IMR_NORMAL_MASK, adapter->hw.hw_addr + REG_IMR);
  245. }
  246. static void atl1_clear_phy_int(struct atl1_adapter *adapter)
  247. {
  248. u16 phy_data;
  249. unsigned long flags;
  250. spin_lock_irqsave(&adapter->lock, flags);
  251. atl1_read_phy_reg(&adapter->hw, 19, &phy_data);
  252. spin_unlock_irqrestore(&adapter->lock, flags);
  253. }
  254. static void atl1_inc_smb(struct atl1_adapter *adapter)
  255. {
  256. struct stats_msg_block *smb = adapter->smb.smb;
  257. /* Fill out the OS statistics structure */
  258. adapter->soft_stats.rx_packets += smb->rx_ok;
  259. adapter->soft_stats.tx_packets += smb->tx_ok;
  260. adapter->soft_stats.rx_bytes += smb->rx_byte_cnt;
  261. adapter->soft_stats.tx_bytes += smb->tx_byte_cnt;
  262. adapter->soft_stats.multicast += smb->rx_mcast;
  263. adapter->soft_stats.collisions += (smb->tx_1_col +
  264. smb->tx_2_col * 2 +
  265. smb->tx_late_col +
  266. smb->tx_abort_col *
  267. adapter->hw.max_retry);
  268. /* Rx Errors */
  269. adapter->soft_stats.rx_errors += (smb->rx_frag +
  270. smb->rx_fcs_err +
  271. smb->rx_len_err +
  272. smb->rx_sz_ov +
  273. smb->rx_rxf_ov +
  274. smb->rx_rrd_ov + smb->rx_align_err);
  275. adapter->soft_stats.rx_fifo_errors += smb->rx_rxf_ov;
  276. adapter->soft_stats.rx_length_errors += smb->rx_len_err;
  277. adapter->soft_stats.rx_crc_errors += smb->rx_fcs_err;
  278. adapter->soft_stats.rx_frame_errors += smb->rx_align_err;
  279. adapter->soft_stats.rx_missed_errors += (smb->rx_rrd_ov +
  280. smb->rx_rxf_ov);
  281. adapter->soft_stats.rx_pause += smb->rx_pause;
  282. adapter->soft_stats.rx_rrd_ov += smb->rx_rrd_ov;
  283. adapter->soft_stats.rx_trunc += smb->rx_sz_ov;
  284. /* Tx Errors */
  285. adapter->soft_stats.tx_errors += (smb->tx_late_col +
  286. smb->tx_abort_col +
  287. smb->tx_underrun + smb->tx_trunc);
  288. adapter->soft_stats.tx_fifo_errors += smb->tx_underrun;
  289. adapter->soft_stats.tx_aborted_errors += smb->tx_abort_col;
  290. adapter->soft_stats.tx_window_errors += smb->tx_late_col;
  291. adapter->soft_stats.excecol += smb->tx_abort_col;
  292. adapter->soft_stats.deffer += smb->tx_defer;
  293. adapter->soft_stats.scc += smb->tx_1_col;
  294. adapter->soft_stats.mcc += smb->tx_2_col;
  295. adapter->soft_stats.latecol += smb->tx_late_col;
  296. adapter->soft_stats.tx_underun += smb->tx_underrun;
  297. adapter->soft_stats.tx_trunc += smb->tx_trunc;
  298. adapter->soft_stats.tx_pause += smb->tx_pause;
  299. adapter->net_stats.rx_packets = adapter->soft_stats.rx_packets;
  300. adapter->net_stats.tx_packets = adapter->soft_stats.tx_packets;
  301. adapter->net_stats.rx_bytes = adapter->soft_stats.rx_bytes;
  302. adapter->net_stats.tx_bytes = adapter->soft_stats.tx_bytes;
  303. adapter->net_stats.multicast = adapter->soft_stats.multicast;
  304. adapter->net_stats.collisions = adapter->soft_stats.collisions;
  305. adapter->net_stats.rx_errors = adapter->soft_stats.rx_errors;
  306. adapter->net_stats.rx_over_errors =
  307. adapter->soft_stats.rx_missed_errors;
  308. adapter->net_stats.rx_length_errors =
  309. adapter->soft_stats.rx_length_errors;
  310. adapter->net_stats.rx_crc_errors = adapter->soft_stats.rx_crc_errors;
  311. adapter->net_stats.rx_frame_errors =
  312. adapter->soft_stats.rx_frame_errors;
  313. adapter->net_stats.rx_fifo_errors = adapter->soft_stats.rx_fifo_errors;
  314. adapter->net_stats.rx_missed_errors =
  315. adapter->soft_stats.rx_missed_errors;
  316. adapter->net_stats.tx_errors = adapter->soft_stats.tx_errors;
  317. adapter->net_stats.tx_fifo_errors = adapter->soft_stats.tx_fifo_errors;
  318. adapter->net_stats.tx_aborted_errors =
  319. adapter->soft_stats.tx_aborted_errors;
  320. adapter->net_stats.tx_window_errors =
  321. adapter->soft_stats.tx_window_errors;
  322. adapter->net_stats.tx_carrier_errors =
  323. adapter->soft_stats.tx_carrier_errors;
  324. }
  325. static void atl1_rx_checksum(struct atl1_adapter *adapter,
  326. struct rx_return_desc *rrd,
  327. struct sk_buff *skb)
  328. {
  329. skb->ip_summed = CHECKSUM_NONE;
  330. if (unlikely(rrd->pkt_flg & PACKET_FLAG_ERR)) {
  331. if (rrd->err_flg & (ERR_FLAG_CRC | ERR_FLAG_TRUNC |
  332. ERR_FLAG_CODE | ERR_FLAG_OV)) {
  333. adapter->hw_csum_err++;
  334. dev_dbg(&adapter->pdev->dev, "rx checksum error\n");
  335. return;
  336. }
  337. }
  338. /* not IPv4 */
  339. if (!(rrd->pkt_flg & PACKET_FLAG_IPV4))
  340. /* checksum is invalid, but it's not an IPv4 pkt, so ok */
  341. return;
  342. /* IPv4 packet */
  343. if (likely(!(rrd->err_flg &
  344. (ERR_FLAG_IP_CHKSUM | ERR_FLAG_L4_CHKSUM)))) {
  345. skb->ip_summed = CHECKSUM_UNNECESSARY;
  346. adapter->hw_csum_good++;
  347. return;
  348. }
  349. /* IPv4, but hardware thinks its checksum is wrong */
  350. dev_dbg(&adapter->pdev->dev,
  351. "hw csum wrong, pkt_flag:%x, err_flag:%x\n",
  352. rrd->pkt_flg, rrd->err_flg);
  353. skb->ip_summed = CHECKSUM_COMPLETE;
  354. skb->csum = htons(rrd->xsz.xsum_sz.rx_chksum);
  355. adapter->hw_csum_err++;
  356. return;
  357. }
  358. /*
  359. * atl1_alloc_rx_buffers - Replace used receive buffers
  360. * @adapter: address of board private structure
  361. */
  362. static u16 atl1_alloc_rx_buffers(struct atl1_adapter *adapter)
  363. {
  364. struct atl1_rfd_ring *rfd_ring = &adapter->rfd_ring;
  365. struct pci_dev *pdev = adapter->pdev;
  366. struct page *page;
  367. unsigned long offset;
  368. struct atl1_buffer *buffer_info, *next_info;
  369. struct sk_buff *skb;
  370. u16 num_alloc = 0;
  371. u16 rfd_next_to_use, next_next;
  372. struct rx_free_desc *rfd_desc;
  373. next_next = rfd_next_to_use = atomic_read(&rfd_ring->next_to_use);
  374. if (++next_next == rfd_ring->count)
  375. next_next = 0;
  376. buffer_info = &rfd_ring->buffer_info[rfd_next_to_use];
  377. next_info = &rfd_ring->buffer_info[next_next];
  378. while (!buffer_info->alloced && !next_info->alloced) {
  379. if (buffer_info->skb) {
  380. buffer_info->alloced = 1;
  381. goto next;
  382. }
  383. rfd_desc = ATL1_RFD_DESC(rfd_ring, rfd_next_to_use);
  384. skb = dev_alloc_skb(adapter->rx_buffer_len + NET_IP_ALIGN);
  385. if (unlikely(!skb)) { /* Better luck next round */
  386. adapter->net_stats.rx_dropped++;
  387. break;
  388. }
  389. /*
  390. * Make buffer alignment 2 beyond a 16 byte boundary
  391. * this will result in a 16 byte aligned IP header after
  392. * the 14 byte MAC header is removed
  393. */
  394. skb_reserve(skb, NET_IP_ALIGN);
  395. buffer_info->alloced = 1;
  396. buffer_info->skb = skb;
  397. buffer_info->length = (u16) adapter->rx_buffer_len;
  398. page = virt_to_page(skb->data);
  399. offset = (unsigned long)skb->data & ~PAGE_MASK;
  400. buffer_info->dma = pci_map_page(pdev, page, offset,
  401. adapter->rx_buffer_len,
  402. PCI_DMA_FROMDEVICE);
  403. rfd_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
  404. rfd_desc->buf_len = cpu_to_le16(adapter->rx_buffer_len);
  405. rfd_desc->coalese = 0;
  406. next:
  407. rfd_next_to_use = next_next;
  408. if (unlikely(++next_next == rfd_ring->count))
  409. next_next = 0;
  410. buffer_info = &rfd_ring->buffer_info[rfd_next_to_use];
  411. next_info = &rfd_ring->buffer_info[next_next];
  412. num_alloc++;
  413. }
  414. if (num_alloc) {
  415. /*
  416. * Force memory writes to complete before letting h/w
  417. * know there are new descriptors to fetch. (Only
  418. * applicable for weak-ordered memory model archs,
  419. * such as IA-64).
  420. */
  421. wmb();
  422. atomic_set(&rfd_ring->next_to_use, (int)rfd_next_to_use);
  423. }
  424. return num_alloc;
  425. }
  426. static void atl1_intr_rx(struct atl1_adapter *adapter)
  427. {
  428. int i, count;
  429. u16 length;
  430. u16 rrd_next_to_clean;
  431. u32 value;
  432. struct atl1_rfd_ring *rfd_ring = &adapter->rfd_ring;
  433. struct atl1_rrd_ring *rrd_ring = &adapter->rrd_ring;
  434. struct atl1_buffer *buffer_info;
  435. struct rx_return_desc *rrd;
  436. struct sk_buff *skb;
  437. count = 0;
  438. rrd_next_to_clean = atomic_read(&rrd_ring->next_to_clean);
  439. while (1) {
  440. rrd = ATL1_RRD_DESC(rrd_ring, rrd_next_to_clean);
  441. i = 1;
  442. if (likely(rrd->xsz.valid)) { /* packet valid */
  443. chk_rrd:
  444. /* check rrd status */
  445. if (likely(rrd->num_buf == 1))
  446. goto rrd_ok;
  447. /* rrd seems to be bad */
  448. if (unlikely(i-- > 0)) {
  449. /* rrd may not be DMAed completely */
  450. dev_dbg(&adapter->pdev->dev,
  451. "incomplete RRD DMA transfer\n");
  452. udelay(1);
  453. goto chk_rrd;
  454. }
  455. /* bad rrd */
  456. dev_dbg(&adapter->pdev->dev, "bad RRD\n");
  457. /* see if update RFD index */
  458. if (rrd->num_buf > 1) {
  459. u16 num_buf;
  460. num_buf =
  461. (rrd->xsz.xsum_sz.pkt_size +
  462. adapter->rx_buffer_len -
  463. 1) / adapter->rx_buffer_len;
  464. if (rrd->num_buf == num_buf) {
  465. /* clean alloc flag for bad rrd */
  466. while (rfd_ring->next_to_clean !=
  467. (rrd->buf_indx + num_buf)) {
  468. rfd_ring->buffer_info[rfd_ring->
  469. next_to_clean].alloced = 0;
  470. if (++rfd_ring->next_to_clean ==
  471. rfd_ring->count) {
  472. rfd_ring->
  473. next_to_clean = 0;
  474. }
  475. }
  476. }
  477. }
  478. /* update rrd */
  479. rrd->xsz.valid = 0;
  480. if (++rrd_next_to_clean == rrd_ring->count)
  481. rrd_next_to_clean = 0;
  482. count++;
  483. continue;
  484. } else { /* current rrd still not be updated */
  485. break;
  486. }
  487. rrd_ok:
  488. /* clean alloc flag for bad rrd */
  489. while (rfd_ring->next_to_clean != rrd->buf_indx) {
  490. rfd_ring->buffer_info[rfd_ring->next_to_clean].alloced =
  491. 0;
  492. if (++rfd_ring->next_to_clean == rfd_ring->count)
  493. rfd_ring->next_to_clean = 0;
  494. }
  495. buffer_info = &rfd_ring->buffer_info[rrd->buf_indx];
  496. if (++rfd_ring->next_to_clean == rfd_ring->count)
  497. rfd_ring->next_to_clean = 0;
  498. /* update rrd next to clean */
  499. if (++rrd_next_to_clean == rrd_ring->count)
  500. rrd_next_to_clean = 0;
  501. count++;
  502. if (unlikely(rrd->pkt_flg & PACKET_FLAG_ERR)) {
  503. if (!(rrd->err_flg &
  504. (ERR_FLAG_IP_CHKSUM | ERR_FLAG_L4_CHKSUM
  505. | ERR_FLAG_LEN))) {
  506. /* packet error, don't need upstream */
  507. buffer_info->alloced = 0;
  508. rrd->xsz.valid = 0;
  509. continue;
  510. }
  511. }
  512. /* Good Receive */
  513. pci_unmap_page(adapter->pdev, buffer_info->dma,
  514. buffer_info->length, PCI_DMA_FROMDEVICE);
  515. skb = buffer_info->skb;
  516. length = le16_to_cpu(rrd->xsz.xsum_sz.pkt_size);
  517. skb_put(skb, length - ETHERNET_FCS_SIZE);
  518. /* Receive Checksum Offload */
  519. atl1_rx_checksum(adapter, rrd, skb);
  520. skb->protocol = eth_type_trans(skb, adapter->netdev);
  521. if (adapter->vlgrp && (rrd->pkt_flg & PACKET_FLAG_VLAN_INS)) {
  522. u16 vlan_tag = (rrd->vlan_tag >> 4) |
  523. ((rrd->vlan_tag & 7) << 13) |
  524. ((rrd->vlan_tag & 8) << 9);
  525. vlan_hwaccel_rx(skb, adapter->vlgrp, vlan_tag);
  526. } else
  527. netif_rx(skb);
  528. /* let protocol layer free skb */
  529. buffer_info->skb = NULL;
  530. buffer_info->alloced = 0;
  531. rrd->xsz.valid = 0;
  532. adapter->netdev->last_rx = jiffies;
  533. }
  534. atomic_set(&rrd_ring->next_to_clean, rrd_next_to_clean);
  535. atl1_alloc_rx_buffers(adapter);
  536. /* update mailbox ? */
  537. if (count) {
  538. u32 tpd_next_to_use;
  539. u32 rfd_next_to_use;
  540. u32 rrd_next_to_clean;
  541. spin_lock(&adapter->mb_lock);
  542. tpd_next_to_use = atomic_read(&adapter->tpd_ring.next_to_use);
  543. rfd_next_to_use =
  544. atomic_read(&adapter->rfd_ring.next_to_use);
  545. rrd_next_to_clean =
  546. atomic_read(&adapter->rrd_ring.next_to_clean);
  547. value = ((rfd_next_to_use & MB_RFD_PROD_INDX_MASK) <<
  548. MB_RFD_PROD_INDX_SHIFT) |
  549. ((rrd_next_to_clean & MB_RRD_CONS_INDX_MASK) <<
  550. MB_RRD_CONS_INDX_SHIFT) |
  551. ((tpd_next_to_use & MB_TPD_PROD_INDX_MASK) <<
  552. MB_TPD_PROD_INDX_SHIFT);
  553. iowrite32(value, adapter->hw.hw_addr + REG_MAILBOX);
  554. spin_unlock(&adapter->mb_lock);
  555. }
  556. }
  557. static void atl1_intr_tx(struct atl1_adapter *adapter)
  558. {
  559. struct atl1_tpd_ring *tpd_ring = &adapter->tpd_ring;
  560. struct atl1_buffer *buffer_info;
  561. u16 sw_tpd_next_to_clean;
  562. u16 cmb_tpd_next_to_clean;
  563. u8 update = 0;
  564. sw_tpd_next_to_clean = atomic_read(&tpd_ring->next_to_clean);
  565. cmb_tpd_next_to_clean = le16_to_cpu(adapter->cmb.cmb->tpd_cons_idx);
  566. while (cmb_tpd_next_to_clean != sw_tpd_next_to_clean) {
  567. struct tx_packet_desc *tpd;
  568. update = 1;
  569. tpd = ATL1_TPD_DESC(tpd_ring, sw_tpd_next_to_clean);
  570. buffer_info = &tpd_ring->buffer_info[sw_tpd_next_to_clean];
  571. if (buffer_info->dma) {
  572. pci_unmap_page(adapter->pdev, buffer_info->dma,
  573. buffer_info->length, PCI_DMA_TODEVICE);
  574. buffer_info->dma = 0;
  575. }
  576. if (buffer_info->skb) {
  577. dev_kfree_skb_irq(buffer_info->skb);
  578. buffer_info->skb = NULL;
  579. }
  580. tpd->buffer_addr = 0;
  581. tpd->desc.data = 0;
  582. if (++sw_tpd_next_to_clean == tpd_ring->count)
  583. sw_tpd_next_to_clean = 0;
  584. }
  585. atomic_set(&tpd_ring->next_to_clean, sw_tpd_next_to_clean);
  586. if (netif_queue_stopped(adapter->netdev)
  587. && netif_carrier_ok(adapter->netdev))
  588. netif_wake_queue(adapter->netdev);
  589. }
  590. static void atl1_check_for_link(struct atl1_adapter *adapter)
  591. {
  592. struct net_device *netdev = adapter->netdev;
  593. u16 phy_data = 0;
  594. spin_lock(&adapter->lock);
  595. adapter->phy_timer_pending = false;
  596. atl1_read_phy_reg(&adapter->hw, MII_BMSR, &phy_data);
  597. atl1_read_phy_reg(&adapter->hw, MII_BMSR, &phy_data);
  598. spin_unlock(&adapter->lock);
  599. /* notify upper layer link down ASAP */
  600. if (!(phy_data & BMSR_LSTATUS)) { /* Link Down */
  601. if (netif_carrier_ok(netdev)) { /* old link state: Up */
  602. dev_info(&adapter->pdev->dev, "%s link is down\n",
  603. netdev->name);
  604. adapter->link_speed = SPEED_0;
  605. netif_carrier_off(netdev);
  606. netif_stop_queue(netdev);
  607. }
  608. }
  609. schedule_work(&adapter->link_chg_task);
  610. }
  611. /*
  612. * atl1_intr - Interrupt Handler
  613. * @irq: interrupt number
  614. * @data: pointer to a network interface device structure
  615. * @pt_regs: CPU registers structure
  616. */
  617. static irqreturn_t atl1_intr(int irq, void *data)
  618. {
  619. /*struct atl1_adapter *adapter = ((struct net_device *)data)->priv;*/
  620. struct atl1_adapter *adapter = netdev_priv(data);
  621. u32 status;
  622. u8 update_rx;
  623. int max_ints = 10;
  624. status = adapter->cmb.cmb->int_stats;
  625. if (!status)
  626. return IRQ_NONE;
  627. update_rx = 0;
  628. do {
  629. /* clear CMB interrupt status at once */
  630. adapter->cmb.cmb->int_stats = 0;
  631. if (status & ISR_GPHY) /* clear phy status */
  632. atl1_clear_phy_int(adapter);
  633. /* clear ISR status, and Enable CMB DMA/Disable Interrupt */
  634. iowrite32(status | ISR_DIS_INT, adapter->hw.hw_addr + REG_ISR);
  635. /* check if SMB intr */
  636. if (status & ISR_SMB)
  637. atl1_inc_smb(adapter);
  638. /* check if PCIE PHY Link down */
  639. if (status & ISR_PHY_LINKDOWN) {
  640. dev_dbg(&adapter->pdev->dev, "pcie phy link down %x\n",
  641. status);
  642. if (netif_running(adapter->netdev)) { /* reset MAC */
  643. iowrite32(0, adapter->hw.hw_addr + REG_IMR);
  644. schedule_work(&adapter->pcie_dma_to_rst_task);
  645. return IRQ_HANDLED;
  646. }
  647. }
  648. /* check if DMA read/write error ? */
  649. if (status & (ISR_DMAR_TO_RST | ISR_DMAW_TO_RST)) {
  650. dev_dbg(&adapter->pdev->dev,
  651. "pcie DMA r/w error (status = 0x%x)\n",
  652. status);
  653. iowrite32(0, adapter->hw.hw_addr + REG_IMR);
  654. schedule_work(&adapter->pcie_dma_to_rst_task);
  655. return IRQ_HANDLED;
  656. }
  657. /* link event */
  658. if (status & ISR_GPHY) {
  659. adapter->soft_stats.tx_carrier_errors++;
  660. atl1_check_for_link(adapter);
  661. }
  662. /* transmit event */
  663. if (status & ISR_CMB_TX)
  664. atl1_intr_tx(adapter);
  665. /* rx exception */
  666. if (unlikely(status & (ISR_RXF_OV | ISR_RFD_UNRUN |
  667. ISR_RRD_OV | ISR_HOST_RFD_UNRUN |
  668. ISR_HOST_RRD_OV | ISR_CMB_RX))) {
  669. if (status & (ISR_RXF_OV | ISR_RFD_UNRUN |
  670. ISR_RRD_OV | ISR_HOST_RFD_UNRUN |
  671. ISR_HOST_RRD_OV))
  672. dev_dbg(&adapter->pdev->dev,
  673. "rx exception, ISR = 0x%x\n", status);
  674. atl1_intr_rx(adapter);
  675. }
  676. if (--max_ints < 0)
  677. break;
  678. } while ((status = adapter->cmb.cmb->int_stats));
  679. /* re-enable Interrupt */
  680. iowrite32(ISR_DIS_SMB | ISR_DIS_DMA, adapter->hw.hw_addr + REG_ISR);
  681. return IRQ_HANDLED;
  682. }
  683. /*
  684. * atl1_set_multi - Multicast and Promiscuous mode set
  685. * @netdev: network interface device structure
  686. *
  687. * The set_multi entry point is called whenever the multicast address
  688. * list or the network interface flags are updated. This routine is
  689. * responsible for configuring the hardware for proper multicast,
  690. * promiscuous mode, and all-multi behavior.
  691. */
  692. static void atl1_set_multi(struct net_device *netdev)
  693. {
  694. struct atl1_adapter *adapter = netdev_priv(netdev);
  695. struct atl1_hw *hw = &adapter->hw;
  696. struct dev_mc_list *mc_ptr;
  697. u32 rctl;
  698. u32 hash_value;
  699. /* Check for Promiscuous and All Multicast modes */
  700. rctl = ioread32(hw->hw_addr + REG_MAC_CTRL);
  701. if (netdev->flags & IFF_PROMISC)
  702. rctl |= MAC_CTRL_PROMIS_EN;
  703. else if (netdev->flags & IFF_ALLMULTI) {
  704. rctl |= MAC_CTRL_MC_ALL_EN;
  705. rctl &= ~MAC_CTRL_PROMIS_EN;
  706. } else
  707. rctl &= ~(MAC_CTRL_PROMIS_EN | MAC_CTRL_MC_ALL_EN);
  708. iowrite32(rctl, hw->hw_addr + REG_MAC_CTRL);
  709. /* clear the old settings from the multicast hash table */
  710. iowrite32(0, hw->hw_addr + REG_RX_HASH_TABLE);
  711. iowrite32(0, (hw->hw_addr + REG_RX_HASH_TABLE) + (1 << 2));
  712. /* compute mc addresses' hash value ,and put it into hash table */
  713. for (mc_ptr = netdev->mc_list; mc_ptr; mc_ptr = mc_ptr->next) {
  714. hash_value = atl1_hash_mc_addr(hw, mc_ptr->dmi_addr);
  715. atl1_hash_set(hw, hash_value);
  716. }
  717. }
  718. static void atl1_setup_mac_ctrl(struct atl1_adapter *adapter)
  719. {
  720. u32 value;
  721. struct atl1_hw *hw = &adapter->hw;
  722. struct net_device *netdev = adapter->netdev;
  723. /* Config MAC CTRL Register */
  724. value = MAC_CTRL_TX_EN | MAC_CTRL_RX_EN;
  725. /* duplex */
  726. if (FULL_DUPLEX == adapter->link_duplex)
  727. value |= MAC_CTRL_DUPLX;
  728. /* speed */
  729. value |= ((u32) ((SPEED_1000 == adapter->link_speed) ?
  730. MAC_CTRL_SPEED_1000 : MAC_CTRL_SPEED_10_100) <<
  731. MAC_CTRL_SPEED_SHIFT);
  732. /* flow control */
  733. value |= (MAC_CTRL_TX_FLOW | MAC_CTRL_RX_FLOW);
  734. /* PAD & CRC */
  735. value |= (MAC_CTRL_ADD_CRC | MAC_CTRL_PAD);
  736. /* preamble length */
  737. value |= (((u32) adapter->hw.preamble_len
  738. & MAC_CTRL_PRMLEN_MASK) << MAC_CTRL_PRMLEN_SHIFT);
  739. /* vlan */
  740. if (adapter->vlgrp)
  741. value |= MAC_CTRL_RMV_VLAN;
  742. /* rx checksum
  743. if (adapter->rx_csum)
  744. value |= MAC_CTRL_RX_CHKSUM_EN;
  745. */
  746. /* filter mode */
  747. value |= MAC_CTRL_BC_EN;
  748. if (netdev->flags & IFF_PROMISC)
  749. value |= MAC_CTRL_PROMIS_EN;
  750. else if (netdev->flags & IFF_ALLMULTI)
  751. value |= MAC_CTRL_MC_ALL_EN;
  752. /* value |= MAC_CTRL_LOOPBACK; */
  753. iowrite32(value, hw->hw_addr + REG_MAC_CTRL);
  754. }
  755. static u32 atl1_check_link(struct atl1_adapter *adapter)
  756. {
  757. struct atl1_hw *hw = &adapter->hw;
  758. struct net_device *netdev = adapter->netdev;
  759. u32 ret_val;
  760. u16 speed, duplex, phy_data;
  761. int reconfig = 0;
  762. /* MII_BMSR must read twice */
  763. atl1_read_phy_reg(hw, MII_BMSR, &phy_data);
  764. atl1_read_phy_reg(hw, MII_BMSR, &phy_data);
  765. if (!(phy_data & BMSR_LSTATUS)) { /* link down */
  766. if (netif_carrier_ok(netdev)) { /* old link state: Up */
  767. dev_info(&adapter->pdev->dev, "link is down\n");
  768. adapter->link_speed = SPEED_0;
  769. netif_carrier_off(netdev);
  770. netif_stop_queue(netdev);
  771. }
  772. return ATL1_SUCCESS;
  773. }
  774. /* Link Up */
  775. ret_val = atl1_get_speed_and_duplex(hw, &speed, &duplex);
  776. if (ret_val)
  777. return ret_val;
  778. switch (hw->media_type) {
  779. case MEDIA_TYPE_1000M_FULL:
  780. if (speed != SPEED_1000 || duplex != FULL_DUPLEX)
  781. reconfig = 1;
  782. break;
  783. case MEDIA_TYPE_100M_FULL:
  784. if (speed != SPEED_100 || duplex != FULL_DUPLEX)
  785. reconfig = 1;
  786. break;
  787. case MEDIA_TYPE_100M_HALF:
  788. if (speed != SPEED_100 || duplex != HALF_DUPLEX)
  789. reconfig = 1;
  790. break;
  791. case MEDIA_TYPE_10M_FULL:
  792. if (speed != SPEED_10 || duplex != FULL_DUPLEX)
  793. reconfig = 1;
  794. break;
  795. case MEDIA_TYPE_10M_HALF:
  796. if (speed != SPEED_10 || duplex != HALF_DUPLEX)
  797. reconfig = 1;
  798. break;
  799. }
  800. /* link result is our setting */
  801. if (!reconfig) {
  802. if (adapter->link_speed != speed
  803. || adapter->link_duplex != duplex) {
  804. adapter->link_speed = speed;
  805. adapter->link_duplex = duplex;
  806. atl1_setup_mac_ctrl(adapter);
  807. dev_info(&adapter->pdev->dev,
  808. "%s link is up %d Mbps %s\n",
  809. netdev->name, adapter->link_speed,
  810. adapter->link_duplex == FULL_DUPLEX ?
  811. "full duplex" : "half duplex");
  812. }
  813. if (!netif_carrier_ok(netdev)) { /* Link down -> Up */
  814. netif_carrier_on(netdev);
  815. netif_wake_queue(netdev);
  816. }
  817. return ATL1_SUCCESS;
  818. }
  819. /* change orignal link status */
  820. if (netif_carrier_ok(netdev)) {
  821. adapter->link_speed = SPEED_0;
  822. netif_carrier_off(netdev);
  823. netif_stop_queue(netdev);
  824. }
  825. if (hw->media_type != MEDIA_TYPE_AUTO_SENSOR &&
  826. hw->media_type != MEDIA_TYPE_1000M_FULL) {
  827. switch (hw->media_type) {
  828. case MEDIA_TYPE_100M_FULL:
  829. phy_data = MII_CR_FULL_DUPLEX | MII_CR_SPEED_100 |
  830. MII_CR_RESET;
  831. break;
  832. case MEDIA_TYPE_100M_HALF:
  833. phy_data = MII_CR_SPEED_100 | MII_CR_RESET;
  834. break;
  835. case MEDIA_TYPE_10M_FULL:
  836. phy_data =
  837. MII_CR_FULL_DUPLEX | MII_CR_SPEED_10 | MII_CR_RESET;
  838. break;
  839. default: /* MEDIA_TYPE_10M_HALF: */
  840. phy_data = MII_CR_SPEED_10 | MII_CR_RESET;
  841. break;
  842. }
  843. atl1_write_phy_reg(hw, MII_BMCR, phy_data);
  844. return ATL1_SUCCESS;
  845. }
  846. /* auto-neg, insert timer to re-config phy */
  847. if (!adapter->phy_timer_pending) {
  848. adapter->phy_timer_pending = true;
  849. mod_timer(&adapter->phy_config_timer, jiffies + 3 * HZ);
  850. }
  851. return ATL1_SUCCESS;
  852. }
  853. static void set_flow_ctrl_old(struct atl1_adapter *adapter)
  854. {
  855. u32 hi, lo, value;
  856. /* RFD Flow Control */
  857. value = adapter->rfd_ring.count;
  858. hi = value / 16;
  859. if (hi < 2)
  860. hi = 2;
  861. lo = value * 7 / 8;
  862. value = ((hi & RXQ_RXF_PAUSE_TH_HI_MASK) << RXQ_RXF_PAUSE_TH_HI_SHIFT) |
  863. ((lo & RXQ_RXF_PAUSE_TH_LO_MASK) << RXQ_RXF_PAUSE_TH_LO_SHIFT);
  864. iowrite32(value, adapter->hw.hw_addr + REG_RXQ_RXF_PAUSE_THRESH);
  865. /* RRD Flow Control */
  866. value = adapter->rrd_ring.count;
  867. lo = value / 16;
  868. hi = value * 7 / 8;
  869. if (lo < 2)
  870. lo = 2;
  871. value = ((hi & RXQ_RRD_PAUSE_TH_HI_MASK) << RXQ_RRD_PAUSE_TH_HI_SHIFT) |
  872. ((lo & RXQ_RRD_PAUSE_TH_LO_MASK) << RXQ_RRD_PAUSE_TH_LO_SHIFT);
  873. iowrite32(value, adapter->hw.hw_addr + REG_RXQ_RRD_PAUSE_THRESH);
  874. }
  875. static void set_flow_ctrl_new(struct atl1_hw *hw)
  876. {
  877. u32 hi, lo, value;
  878. /* RXF Flow Control */
  879. value = ioread32(hw->hw_addr + REG_SRAM_RXF_LEN);
  880. lo = value / 16;
  881. if (lo < 192)
  882. lo = 192;
  883. hi = value * 7 / 8;
  884. if (hi < lo)
  885. hi = lo + 16;
  886. value = ((hi & RXQ_RXF_PAUSE_TH_HI_MASK) << RXQ_RXF_PAUSE_TH_HI_SHIFT) |
  887. ((lo & RXQ_RXF_PAUSE_TH_LO_MASK) << RXQ_RXF_PAUSE_TH_LO_SHIFT);
  888. iowrite32(value, hw->hw_addr + REG_RXQ_RXF_PAUSE_THRESH);
  889. /* RRD Flow Control */
  890. value = ioread32(hw->hw_addr + REG_SRAM_RRD_LEN);
  891. lo = value / 8;
  892. hi = value * 7 / 8;
  893. if (lo < 2)
  894. lo = 2;
  895. if (hi < lo)
  896. hi = lo + 3;
  897. value = ((hi & RXQ_RRD_PAUSE_TH_HI_MASK) << RXQ_RRD_PAUSE_TH_HI_SHIFT) |
  898. ((lo & RXQ_RRD_PAUSE_TH_LO_MASK) << RXQ_RRD_PAUSE_TH_LO_SHIFT);
  899. iowrite32(value, hw->hw_addr + REG_RXQ_RRD_PAUSE_THRESH);
  900. }
  901. /*
  902. * atl1_configure - Configure Transmit&Receive Unit after Reset
  903. * @adapter: board private structure
  904. *
  905. * Configure the Tx /Rx unit of the MAC after a reset.
  906. */
  907. static u32 atl1_configure(struct atl1_adapter *adapter)
  908. {
  909. struct atl1_hw *hw = &adapter->hw;
  910. u32 value;
  911. /* clear interrupt status */
  912. iowrite32(0xffffffff, adapter->hw.hw_addr + REG_ISR);
  913. /* set MAC Address */
  914. value = (((u32) hw->mac_addr[2]) << 24) |
  915. (((u32) hw->mac_addr[3]) << 16) |
  916. (((u32) hw->mac_addr[4]) << 8) |
  917. (((u32) hw->mac_addr[5]));
  918. iowrite32(value, hw->hw_addr + REG_MAC_STA_ADDR);
  919. value = (((u32) hw->mac_addr[0]) << 8) | (((u32) hw->mac_addr[1]));
  920. iowrite32(value, hw->hw_addr + (REG_MAC_STA_ADDR + 4));
  921. /* tx / rx ring */
  922. /* HI base address */
  923. iowrite32((u32) ((adapter->tpd_ring.dma & 0xffffffff00000000ULL) >> 32),
  924. hw->hw_addr + REG_DESC_BASE_ADDR_HI);
  925. /* LO base address */
  926. iowrite32((u32) (adapter->rfd_ring.dma & 0x00000000ffffffffULL),
  927. hw->hw_addr + REG_DESC_RFD_ADDR_LO);
  928. iowrite32((u32) (adapter->rrd_ring.dma & 0x00000000ffffffffULL),
  929. hw->hw_addr + REG_DESC_RRD_ADDR_LO);
  930. iowrite32((u32) (adapter->tpd_ring.dma & 0x00000000ffffffffULL),
  931. hw->hw_addr + REG_DESC_TPD_ADDR_LO);
  932. iowrite32((u32) (adapter->cmb.dma & 0x00000000ffffffffULL),
  933. hw->hw_addr + REG_DESC_CMB_ADDR_LO);
  934. iowrite32((u32) (adapter->smb.dma & 0x00000000ffffffffULL),
  935. hw->hw_addr + REG_DESC_SMB_ADDR_LO);
  936. /* element count */
  937. value = adapter->rrd_ring.count;
  938. value <<= 16;
  939. value += adapter->rfd_ring.count;
  940. iowrite32(value, hw->hw_addr + REG_DESC_RFD_RRD_RING_SIZE);
  941. iowrite32(adapter->tpd_ring.count, hw->hw_addr + REG_DESC_TPD_RING_SIZE);
  942. /* Load Ptr */
  943. iowrite32(1, hw->hw_addr + REG_LOAD_PTR);
  944. /* config Mailbox */
  945. value = ((atomic_read(&adapter->tpd_ring.next_to_use)
  946. & MB_TPD_PROD_INDX_MASK) << MB_TPD_PROD_INDX_SHIFT) |
  947. ((atomic_read(&adapter->rrd_ring.next_to_clean)
  948. & MB_RRD_CONS_INDX_MASK) << MB_RRD_CONS_INDX_SHIFT) |
  949. ((atomic_read(&adapter->rfd_ring.next_to_use)
  950. & MB_RFD_PROD_INDX_MASK) << MB_RFD_PROD_INDX_SHIFT);
  951. iowrite32(value, hw->hw_addr + REG_MAILBOX);
  952. /* config IPG/IFG */
  953. value = (((u32) hw->ipgt & MAC_IPG_IFG_IPGT_MASK)
  954. << MAC_IPG_IFG_IPGT_SHIFT) |
  955. (((u32) hw->min_ifg & MAC_IPG_IFG_MIFG_MASK)
  956. << MAC_IPG_IFG_MIFG_SHIFT) |
  957. (((u32) hw->ipgr1 & MAC_IPG_IFG_IPGR1_MASK)
  958. << MAC_IPG_IFG_IPGR1_SHIFT) |
  959. (((u32) hw->ipgr2 & MAC_IPG_IFG_IPGR2_MASK)
  960. << MAC_IPG_IFG_IPGR2_SHIFT);
  961. iowrite32(value, hw->hw_addr + REG_MAC_IPG_IFG);
  962. /* config Half-Duplex Control */
  963. value = ((u32) hw->lcol & MAC_HALF_DUPLX_CTRL_LCOL_MASK) |
  964. (((u32) hw->max_retry & MAC_HALF_DUPLX_CTRL_RETRY_MASK)
  965. << MAC_HALF_DUPLX_CTRL_RETRY_SHIFT) |
  966. MAC_HALF_DUPLX_CTRL_EXC_DEF_EN |
  967. (0xa << MAC_HALF_DUPLX_CTRL_ABEBT_SHIFT) |
  968. (((u32) hw->jam_ipg & MAC_HALF_DUPLX_CTRL_JAMIPG_MASK)
  969. << MAC_HALF_DUPLX_CTRL_JAMIPG_SHIFT);
  970. iowrite32(value, hw->hw_addr + REG_MAC_HALF_DUPLX_CTRL);
  971. /* set Interrupt Moderator Timer */
  972. iowrite16(adapter->imt, hw->hw_addr + REG_IRQ_MODU_TIMER_INIT);
  973. iowrite32(MASTER_CTRL_ITIMER_EN, hw->hw_addr + REG_MASTER_CTRL);
  974. /* set Interrupt Clear Timer */
  975. iowrite16(adapter->ict, hw->hw_addr + REG_CMBDISDMA_TIMER);
  976. /* set MTU, 4 : VLAN */
  977. iowrite32(hw->max_frame_size + 4, hw->hw_addr + REG_MTU);
  978. /* jumbo size & rrd retirement timer */
  979. value = (((u32) hw->rx_jumbo_th & RXQ_JMBOSZ_TH_MASK)
  980. << RXQ_JMBOSZ_TH_SHIFT) |
  981. (((u32) hw->rx_jumbo_lkah & RXQ_JMBO_LKAH_MASK)
  982. << RXQ_JMBO_LKAH_SHIFT) |
  983. (((u32) hw->rrd_ret_timer & RXQ_RRD_TIMER_MASK)
  984. << RXQ_RRD_TIMER_SHIFT);
  985. iowrite32(value, hw->hw_addr + REG_RXQ_JMBOSZ_RRDTIM);
  986. /* Flow Control */
  987. switch (hw->dev_rev) {
  988. case 0x8001:
  989. case 0x9001:
  990. case 0x9002:
  991. case 0x9003:
  992. set_flow_ctrl_old(adapter);
  993. break;
  994. default:
  995. set_flow_ctrl_new(hw);
  996. break;
  997. }
  998. /* config TXQ */
  999. value = (((u32) hw->tpd_burst & TXQ_CTRL_TPD_BURST_NUM_MASK)
  1000. << TXQ_CTRL_TPD_BURST_NUM_SHIFT) |
  1001. (((u32) hw->txf_burst & TXQ_CTRL_TXF_BURST_NUM_MASK)
  1002. << TXQ_CTRL_TXF_BURST_NUM_SHIFT) |
  1003. (((u32) hw->tpd_fetch_th & TXQ_CTRL_TPD_FETCH_TH_MASK)
  1004. << TXQ_CTRL_TPD_FETCH_TH_SHIFT) | TXQ_CTRL_ENH_MODE | TXQ_CTRL_EN;
  1005. iowrite32(value, hw->hw_addr + REG_TXQ_CTRL);
  1006. /* min tpd fetch gap & tx jumbo packet size threshold for taskoffload */
  1007. value = (((u32) hw->tx_jumbo_task_th & TX_JUMBO_TASK_TH_MASK)
  1008. << TX_JUMBO_TASK_TH_SHIFT) |
  1009. (((u32) hw->tpd_fetch_gap & TX_TPD_MIN_IPG_MASK)
  1010. << TX_TPD_MIN_IPG_SHIFT);
  1011. iowrite32(value, hw->hw_addr + REG_TX_JUMBO_TASK_TH_TPD_IPG);
  1012. /* config RXQ */
  1013. value = (((u32) hw->rfd_burst & RXQ_CTRL_RFD_BURST_NUM_MASK)
  1014. << RXQ_CTRL_RFD_BURST_NUM_SHIFT) |
  1015. (((u32) hw->rrd_burst & RXQ_CTRL_RRD_BURST_THRESH_MASK)
  1016. << RXQ_CTRL_RRD_BURST_THRESH_SHIFT) |
  1017. (((u32) hw->rfd_fetch_gap & RXQ_CTRL_RFD_PREF_MIN_IPG_MASK)
  1018. << RXQ_CTRL_RFD_PREF_MIN_IPG_SHIFT) |
  1019. RXQ_CTRL_CUT_THRU_EN | RXQ_CTRL_EN;
  1020. iowrite32(value, hw->hw_addr + REG_RXQ_CTRL);
  1021. /* config DMA Engine */
  1022. value = ((((u32) hw->dmar_block) & DMA_CTRL_DMAR_BURST_LEN_MASK)
  1023. << DMA_CTRL_DMAR_BURST_LEN_SHIFT) |
  1024. ((((u32) hw->dmaw_block) & DMA_CTRL_DMAR_BURST_LEN_MASK)
  1025. << DMA_CTRL_DMAR_BURST_LEN_SHIFT) |
  1026. DMA_CTRL_DMAR_EN | DMA_CTRL_DMAW_EN;
  1027. value |= (u32) hw->dma_ord;
  1028. if (atl1_rcb_128 == hw->rcb_value)
  1029. value |= DMA_CTRL_RCB_VALUE;
  1030. iowrite32(value, hw->hw_addr + REG_DMA_CTRL);
  1031. /* config CMB / SMB */
  1032. value = hw->cmb_rrd | ((u32) hw->cmb_tpd << 16);
  1033. iowrite32(value, hw->hw_addr + REG_CMB_WRITE_TH);
  1034. value = hw->cmb_rx_timer | ((u32) hw->cmb_tx_timer << 16);
  1035. iowrite32(value, hw->hw_addr + REG_CMB_WRITE_TIMER);
  1036. iowrite32(hw->smb_timer, hw->hw_addr + REG_SMB_TIMER);
  1037. /* --- enable CMB / SMB */
  1038. value = CSMB_CTRL_CMB_EN | CSMB_CTRL_SMB_EN;
  1039. iowrite32(value, hw->hw_addr + REG_CSMB_CTRL);
  1040. value = ioread32(adapter->hw.hw_addr + REG_ISR);
  1041. if (unlikely((value & ISR_PHY_LINKDOWN) != 0))
  1042. value = 1; /* config failed */
  1043. else
  1044. value = 0;
  1045. /* clear all interrupt status */
  1046. iowrite32(0x3fffffff, adapter->hw.hw_addr + REG_ISR);
  1047. iowrite32(0, adapter->hw.hw_addr + REG_ISR);
  1048. return value;
  1049. }
  1050. /*
  1051. * atl1_irq_disable - Mask off interrupt generation on the NIC
  1052. * @adapter: board private structure
  1053. */
  1054. static void atl1_irq_disable(struct atl1_adapter *adapter)
  1055. {
  1056. atomic_inc(&adapter->irq_sem);
  1057. iowrite32(0, adapter->hw.hw_addr + REG_IMR);
  1058. ioread32(adapter->hw.hw_addr + REG_IMR);
  1059. synchronize_irq(adapter->pdev->irq);
  1060. }
  1061. static void atl1_vlan_rx_register(struct net_device *netdev,
  1062. struct vlan_group *grp)
  1063. {
  1064. struct atl1_adapter *adapter = netdev_priv(netdev);
  1065. unsigned long flags;
  1066. u32 ctrl;
  1067. spin_lock_irqsave(&adapter->lock, flags);
  1068. /* atl1_irq_disable(adapter); */
  1069. adapter->vlgrp = grp;
  1070. if (grp) {
  1071. /* enable VLAN tag insert/strip */
  1072. ctrl = ioread32(adapter->hw.hw_addr + REG_MAC_CTRL);
  1073. ctrl |= MAC_CTRL_RMV_VLAN;
  1074. iowrite32(ctrl, adapter->hw.hw_addr + REG_MAC_CTRL);
  1075. } else {
  1076. /* disable VLAN tag insert/strip */
  1077. ctrl = ioread32(adapter->hw.hw_addr + REG_MAC_CTRL);
  1078. ctrl &= ~MAC_CTRL_RMV_VLAN;
  1079. iowrite32(ctrl, adapter->hw.hw_addr + REG_MAC_CTRL);
  1080. }
  1081. /* atl1_irq_enable(adapter); */
  1082. spin_unlock_irqrestore(&adapter->lock, flags);
  1083. }
  1084. static void atl1_restore_vlan(struct atl1_adapter *adapter)
  1085. {
  1086. atl1_vlan_rx_register(adapter->netdev, adapter->vlgrp);
  1087. }
  1088. static u16 tpd_avail(struct atl1_tpd_ring *tpd_ring)
  1089. {
  1090. u16 next_to_clean = atomic_read(&tpd_ring->next_to_clean);
  1091. u16 next_to_use = atomic_read(&tpd_ring->next_to_use);
  1092. return ((next_to_clean >
  1093. next_to_use) ? next_to_clean - next_to_use -
  1094. 1 : tpd_ring->count + next_to_clean - next_to_use - 1);
  1095. }
  1096. static int atl1_tso(struct atl1_adapter *adapter, struct sk_buff *skb,
  1097. struct tso_param *tso)
  1098. {
  1099. /* We enter this function holding a spinlock. */
  1100. u8 ipofst;
  1101. int err;
  1102. if (skb_shinfo(skb)->gso_size) {
  1103. if (skb_header_cloned(skb)) {
  1104. err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
  1105. if (unlikely(err))
  1106. return err;
  1107. }
  1108. if (skb->protocol == ntohs(ETH_P_IP)) {
  1109. struct iphdr *iph = ip_hdr(skb);
  1110. iph->tot_len = 0;
  1111. iph->check = 0;
  1112. tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
  1113. iph->daddr, 0,
  1114. IPPROTO_TCP,
  1115. 0);
  1116. ipofst = skb_network_offset(skb);
  1117. if (ipofst != ENET_HEADER_SIZE) /* 802.3 frame */
  1118. tso->tsopl |= 1 << TSO_PARAM_ETHTYPE_SHIFT;
  1119. tso->tsopl |= (iph->ihl &
  1120. CSUM_PARAM_IPHL_MASK) << CSUM_PARAM_IPHL_SHIFT;
  1121. tso->tsopl |= (tcp_hdrlen(skb) &
  1122. TSO_PARAM_TCPHDRLEN_MASK) << TSO_PARAM_TCPHDRLEN_SHIFT;
  1123. tso->tsopl |= (skb_shinfo(skb)->gso_size &
  1124. TSO_PARAM_MSS_MASK) << TSO_PARAM_MSS_SHIFT;
  1125. tso->tsopl |= 1 << TSO_PARAM_IPCKSUM_SHIFT;
  1126. tso->tsopl |= 1 << TSO_PARAM_TCPCKSUM_SHIFT;
  1127. tso->tsopl |= 1 << TSO_PARAM_SEGMENT_SHIFT;
  1128. return true;
  1129. }
  1130. }
  1131. return false;
  1132. }
  1133. static int atl1_tx_csum(struct atl1_adapter *adapter, struct sk_buff *skb,
  1134. struct csum_param *csum)
  1135. {
  1136. u8 css, cso;
  1137. if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) {
  1138. cso = skb_transport_offset(skb);
  1139. css = cso + skb->csum_offset;
  1140. if (unlikely(cso & 0x1)) {
  1141. dev_dbg(&adapter->pdev->dev,
  1142. "payload offset not an even number\n");
  1143. return -1;
  1144. }
  1145. csum->csumpl |= (cso & CSUM_PARAM_PLOADOFFSET_MASK) <<
  1146. CSUM_PARAM_PLOADOFFSET_SHIFT;
  1147. csum->csumpl |= (css & CSUM_PARAM_XSUMOFFSET_MASK) <<
  1148. CSUM_PARAM_XSUMOFFSET_SHIFT;
  1149. csum->csumpl |= 1 << CSUM_PARAM_CUSTOMCKSUM_SHIFT;
  1150. return true;
  1151. }
  1152. return true;
  1153. }
  1154. static void atl1_tx_map(struct atl1_adapter *adapter,
  1155. struct sk_buff *skb, bool tcp_seg)
  1156. {
  1157. /* We enter this function holding a spinlock. */
  1158. struct atl1_tpd_ring *tpd_ring = &adapter->tpd_ring;
  1159. struct atl1_buffer *buffer_info;
  1160. struct page *page;
  1161. int first_buf_len = skb->len;
  1162. unsigned long offset;
  1163. unsigned int nr_frags;
  1164. unsigned int f;
  1165. u16 tpd_next_to_use;
  1166. u16 proto_hdr_len;
  1167. u16 i, m, len12;
  1168. first_buf_len -= skb->data_len;
  1169. nr_frags = skb_shinfo(skb)->nr_frags;
  1170. tpd_next_to_use = atomic_read(&tpd_ring->next_to_use);
  1171. buffer_info = &tpd_ring->buffer_info[tpd_next_to_use];
  1172. if (unlikely(buffer_info->skb))
  1173. BUG();
  1174. buffer_info->skb = NULL; /* put skb in last TPD */
  1175. if (tcp_seg) {
  1176. /* TSO/GSO */
  1177. proto_hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
  1178. buffer_info->length = proto_hdr_len;
  1179. page = virt_to_page(skb->data);
  1180. offset = (unsigned long)skb->data & ~PAGE_MASK;
  1181. buffer_info->dma = pci_map_page(adapter->pdev, page,
  1182. offset, proto_hdr_len,
  1183. PCI_DMA_TODEVICE);
  1184. if (++tpd_next_to_use == tpd_ring->count)
  1185. tpd_next_to_use = 0;
  1186. if (first_buf_len > proto_hdr_len) {
  1187. len12 = first_buf_len - proto_hdr_len;
  1188. m = (len12 + MAX_TX_BUF_LEN - 1) / MAX_TX_BUF_LEN;
  1189. for (i = 0; i < m; i++) {
  1190. buffer_info =
  1191. &tpd_ring->buffer_info[tpd_next_to_use];
  1192. buffer_info->skb = NULL;
  1193. buffer_info->length =
  1194. (MAX_TX_BUF_LEN >=
  1195. len12) ? MAX_TX_BUF_LEN : len12;
  1196. len12 -= buffer_info->length;
  1197. page = virt_to_page(skb->data +
  1198. (proto_hdr_len +
  1199. i * MAX_TX_BUF_LEN));
  1200. offset = (unsigned long)(skb->data +
  1201. (proto_hdr_len +
  1202. i * MAX_TX_BUF_LEN)) &
  1203. ~PAGE_MASK;
  1204. buffer_info->dma =
  1205. pci_map_page(adapter->pdev, page, offset,
  1206. buffer_info->length,
  1207. PCI_DMA_TODEVICE);
  1208. if (++tpd_next_to_use == tpd_ring->count)
  1209. tpd_next_to_use = 0;
  1210. }
  1211. }
  1212. } else {
  1213. /* not TSO/GSO */
  1214. buffer_info->length = first_buf_len;
  1215. page = virt_to_page(skb->data);
  1216. offset = (unsigned long)skb->data & ~PAGE_MASK;
  1217. buffer_info->dma = pci_map_page(adapter->pdev, page,
  1218. offset, first_buf_len,
  1219. PCI_DMA_TODEVICE);
  1220. if (++tpd_next_to_use == tpd_ring->count)
  1221. tpd_next_to_use = 0;
  1222. }
  1223. for (f = 0; f < nr_frags; f++) {
  1224. struct skb_frag_struct *frag;
  1225. u16 lenf, i, m;
  1226. frag = &skb_shinfo(skb)->frags[f];
  1227. lenf = frag->size;
  1228. m = (lenf + MAX_TX_BUF_LEN - 1) / MAX_TX_BUF_LEN;
  1229. for (i = 0; i < m; i++) {
  1230. buffer_info = &tpd_ring->buffer_info[tpd_next_to_use];
  1231. if (unlikely(buffer_info->skb))
  1232. BUG();
  1233. buffer_info->skb = NULL;
  1234. buffer_info->length =
  1235. (lenf > MAX_TX_BUF_LEN) ? MAX_TX_BUF_LEN : lenf;
  1236. lenf -= buffer_info->length;
  1237. buffer_info->dma =
  1238. pci_map_page(adapter->pdev, frag->page,
  1239. frag->page_offset + i * MAX_TX_BUF_LEN,
  1240. buffer_info->length, PCI_DMA_TODEVICE);
  1241. if (++tpd_next_to_use == tpd_ring->count)
  1242. tpd_next_to_use = 0;
  1243. }
  1244. }
  1245. /* last tpd's buffer-info */
  1246. buffer_info->skb = skb;
  1247. }
  1248. static void atl1_tx_queue(struct atl1_adapter *adapter, int count,
  1249. union tpd_descr *descr)
  1250. {
  1251. /* We enter this function holding a spinlock. */
  1252. struct atl1_tpd_ring *tpd_ring = &adapter->tpd_ring;
  1253. int j;
  1254. u32 val;
  1255. struct atl1_buffer *buffer_info;
  1256. struct tx_packet_desc *tpd;
  1257. u16 tpd_next_to_use = atomic_read(&tpd_ring->next_to_use);
  1258. for (j = 0; j < count; j++) {
  1259. buffer_info = &tpd_ring->buffer_info[tpd_next_to_use];
  1260. tpd = ATL1_TPD_DESC(&adapter->tpd_ring, tpd_next_to_use);
  1261. tpd->desc.csum.csumpu = descr->csum.csumpu;
  1262. tpd->desc.csum.csumpl = descr->csum.csumpl;
  1263. tpd->desc.tso.tsopu = descr->tso.tsopu;
  1264. tpd->desc.tso.tsopl = descr->tso.tsopl;
  1265. tpd->buffer_addr = cpu_to_le64(buffer_info->dma);
  1266. tpd->desc.data = descr->data;
  1267. tpd->desc.csum.csumpu |= (cpu_to_le16(buffer_info->length) &
  1268. CSUM_PARAM_BUFLEN_MASK) << CSUM_PARAM_BUFLEN_SHIFT;
  1269. val = (descr->tso.tsopl >> TSO_PARAM_SEGMENT_SHIFT) &
  1270. TSO_PARAM_SEGMENT_MASK;
  1271. if (val && !j)
  1272. tpd->desc.tso.tsopl |= 1 << TSO_PARAM_HDRFLAG_SHIFT;
  1273. if (j == (count - 1))
  1274. tpd->desc.csum.csumpl |= 1 << CSUM_PARAM_EOP_SHIFT;
  1275. if (++tpd_next_to_use == tpd_ring->count)
  1276. tpd_next_to_use = 0;
  1277. }
  1278. /*
  1279. * Force memory writes to complete before letting h/w
  1280. * know there are new descriptors to fetch. (Only
  1281. * applicable for weak-ordered memory model archs,
  1282. * such as IA-64).
  1283. */
  1284. wmb();
  1285. atomic_set(&tpd_ring->next_to_use, (int)tpd_next_to_use);
  1286. }
  1287. static void atl1_update_mailbox(struct atl1_adapter *adapter)
  1288. {
  1289. unsigned long flags;
  1290. u32 tpd_next_to_use;
  1291. u32 rfd_next_to_use;
  1292. u32 rrd_next_to_clean;
  1293. u32 value;
  1294. spin_lock_irqsave(&adapter->mb_lock, flags);
  1295. tpd_next_to_use = atomic_read(&adapter->tpd_ring.next_to_use);
  1296. rfd_next_to_use = atomic_read(&adapter->rfd_ring.next_to_use);
  1297. rrd_next_to_clean = atomic_read(&adapter->rrd_ring.next_to_clean);
  1298. value = ((rfd_next_to_use & MB_RFD_PROD_INDX_MASK) <<
  1299. MB_RFD_PROD_INDX_SHIFT) |
  1300. ((rrd_next_to_clean & MB_RRD_CONS_INDX_MASK) <<
  1301. MB_RRD_CONS_INDX_SHIFT) |
  1302. ((tpd_next_to_use & MB_TPD_PROD_INDX_MASK) <<
  1303. MB_TPD_PROD_INDX_SHIFT);
  1304. iowrite32(value, adapter->hw.hw_addr + REG_MAILBOX);
  1305. spin_unlock_irqrestore(&adapter->mb_lock, flags);
  1306. }
  1307. static int atl1_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
  1308. {
  1309. struct atl1_adapter *adapter = netdev_priv(netdev);
  1310. int len = skb->len;
  1311. int tso;
  1312. int count = 1;
  1313. int ret_val;
  1314. u32 val;
  1315. union tpd_descr param;
  1316. u16 frag_size;
  1317. u16 vlan_tag;
  1318. unsigned long flags;
  1319. unsigned int nr_frags = 0;
  1320. unsigned int mss = 0;
  1321. unsigned int f;
  1322. unsigned int proto_hdr_len;
  1323. len -= skb->data_len;
  1324. if (unlikely(skb->len == 0)) {
  1325. dev_kfree_skb_any(skb);
  1326. return NETDEV_TX_OK;
  1327. }
  1328. param.data = 0;
  1329. param.tso.tsopu = 0;
  1330. param.tso.tsopl = 0;
  1331. param.csum.csumpu = 0;
  1332. param.csum.csumpl = 0;
  1333. /* nr_frags will be nonzero if we're doing scatter/gather (SG) */
  1334. nr_frags = skb_shinfo(skb)->nr_frags;
  1335. for (f = 0; f < nr_frags; f++) {
  1336. frag_size = skb_shinfo(skb)->frags[f].size;
  1337. if (frag_size)
  1338. count +=
  1339. (frag_size + MAX_TX_BUF_LEN - 1) / MAX_TX_BUF_LEN;
  1340. }
  1341. /* mss will be nonzero if we're doing segment offload (TSO/GSO) */
  1342. mss = skb_shinfo(skb)->gso_size;
  1343. if (mss) {
  1344. if (skb->protocol == htons(ETH_P_IP)) {
  1345. proto_hdr_len = (skb_transport_offset(skb) +
  1346. tcp_hdrlen(skb));
  1347. if (unlikely(proto_hdr_len > len)) {
  1348. dev_kfree_skb_any(skb);
  1349. return NETDEV_TX_OK;
  1350. }
  1351. /* need additional TPD ? */
  1352. if (proto_hdr_len != len)
  1353. count += (len - proto_hdr_len +
  1354. MAX_TX_BUF_LEN - 1) / MAX_TX_BUF_LEN;
  1355. }
  1356. }
  1357. local_irq_save(flags);
  1358. if (!spin_trylock(&adapter->lock)) {
  1359. /* Can't get lock - tell upper layer to requeue */
  1360. local_irq_restore(flags);
  1361. dev_dbg(&adapter->pdev->dev, "tx locked\n");
  1362. return NETDEV_TX_LOCKED;
  1363. }
  1364. if (tpd_avail(&adapter->tpd_ring) < count) {
  1365. /* not enough descriptors */
  1366. netif_stop_queue(netdev);
  1367. spin_unlock_irqrestore(&adapter->lock, flags);
  1368. dev_dbg(&adapter->pdev->dev, "tx busy\n");
  1369. return NETDEV_TX_BUSY;
  1370. }
  1371. param.data = 0;
  1372. if (adapter->vlgrp && vlan_tx_tag_present(skb)) {
  1373. vlan_tag = vlan_tx_tag_get(skb);
  1374. vlan_tag = (vlan_tag << 4) | (vlan_tag >> 13) |
  1375. ((vlan_tag >> 9) & 0x8);
  1376. param.csum.csumpl |= 1 << CSUM_PARAM_INSVLAG_SHIFT;
  1377. param.csum.csumpu |= (vlan_tag & CSUM_PARAM_VALANTAG_MASK) <<
  1378. CSUM_PARAM_VALAN_SHIFT;
  1379. }
  1380. tso = atl1_tso(adapter, skb, &param.tso);
  1381. if (tso < 0) {
  1382. spin_unlock_irqrestore(&adapter->lock, flags);
  1383. dev_kfree_skb_any(skb);
  1384. return NETDEV_TX_OK;
  1385. }
  1386. if (!tso) {
  1387. ret_val = atl1_tx_csum(adapter, skb, &param.csum);
  1388. if (ret_val < 0) {
  1389. spin_unlock_irqrestore(&adapter->lock, flags);
  1390. dev_kfree_skb_any(skb);
  1391. return NETDEV_TX_OK;
  1392. }
  1393. }
  1394. val = (param.csum.csumpl >> CSUM_PARAM_SEGMENT_SHIFT) &
  1395. CSUM_PARAM_SEGMENT_MASK;
  1396. atl1_tx_map(adapter, skb, 1 == val);
  1397. atl1_tx_queue(adapter, count, &param);
  1398. netdev->trans_start = jiffies;
  1399. spin_unlock_irqrestore(&adapter->lock, flags);
  1400. atl1_update_mailbox(adapter);
  1401. return NETDEV_TX_OK;
  1402. }
  1403. /*
  1404. * atl1_get_stats - Get System Network Statistics
  1405. * @netdev: network interface device structure
  1406. *
  1407. * Returns the address of the device statistics structure.
  1408. * The statistics are actually updated from the timer callback.
  1409. */
  1410. static struct net_device_stats *atl1_get_stats(struct net_device *netdev)
  1411. {
  1412. struct atl1_adapter *adapter = netdev_priv(netdev);
  1413. return &adapter->net_stats;
  1414. }
  1415. /*
  1416. * atl1_clean_rx_ring - Free RFD Buffers
  1417. * @adapter: board private structure
  1418. */
  1419. static void atl1_clean_rx_ring(struct atl1_adapter *adapter)
  1420. {
  1421. struct atl1_rfd_ring *rfd_ring = &adapter->rfd_ring;
  1422. struct atl1_rrd_ring *rrd_ring = &adapter->rrd_ring;
  1423. struct atl1_buffer *buffer_info;
  1424. struct pci_dev *pdev = adapter->pdev;
  1425. unsigned long size;
  1426. unsigned int i;
  1427. /* Free all the Rx ring sk_buffs */
  1428. for (i = 0; i < rfd_ring->count; i++) {
  1429. buffer_info = &rfd_ring->buffer_info[i];
  1430. if (buffer_info->dma) {
  1431. pci_unmap_page(pdev,
  1432. buffer_info->dma,
  1433. buffer_info->length,
  1434. PCI_DMA_FROMDEVICE);
  1435. buffer_info->dma = 0;
  1436. }
  1437. if (buffer_info->skb) {
  1438. dev_kfree_skb(buffer_info->skb);
  1439. buffer_info->skb = NULL;
  1440. }
  1441. }
  1442. size = sizeof(struct atl1_buffer) * rfd_ring->count;
  1443. memset(rfd_ring->buffer_info, 0, size);
  1444. /* Zero out the descriptor ring */
  1445. memset(rfd_ring->desc, 0, rfd_ring->size);
  1446. rfd_ring->next_to_clean = 0;
  1447. atomic_set(&rfd_ring->next_to_use, 0);
  1448. rrd_ring->next_to_use = 0;
  1449. atomic_set(&rrd_ring->next_to_clean, 0);
  1450. }
  1451. /*
  1452. * atl1_clean_tx_ring - Free Tx Buffers
  1453. * @adapter: board private structure
  1454. */
  1455. static void atl1_clean_tx_ring(struct atl1_adapter *adapter)
  1456. {
  1457. struct atl1_tpd_ring *tpd_ring = &adapter->tpd_ring;
  1458. struct atl1_buffer *buffer_info;
  1459. struct pci_dev *pdev = adapter->pdev;
  1460. unsigned long size;
  1461. unsigned int i;
  1462. /* Free all the Tx ring sk_buffs */
  1463. for (i = 0; i < tpd_ring->count; i++) {
  1464. buffer_info = &tpd_ring->buffer_info[i];
  1465. if (buffer_info->dma) {
  1466. pci_unmap_page(pdev, buffer_info->dma,
  1467. buffer_info->length, PCI_DMA_TODEVICE);
  1468. buffer_info->dma = 0;
  1469. }
  1470. }
  1471. for (i = 0; i < tpd_ring->count; i++) {
  1472. buffer_info = &tpd_ring->buffer_info[i];
  1473. if (buffer_info->skb) {
  1474. dev_kfree_skb_any(buffer_info->skb);
  1475. buffer_info->skb = NULL;
  1476. }
  1477. }
  1478. size = sizeof(struct atl1_buffer) * tpd_ring->count;
  1479. memset(tpd_ring->buffer_info, 0, size);
  1480. /* Zero out the descriptor ring */
  1481. memset(tpd_ring->desc, 0, tpd_ring->size);
  1482. atomic_set(&tpd_ring->next_to_use, 0);
  1483. atomic_set(&tpd_ring->next_to_clean, 0);
  1484. }
  1485. /*
  1486. * atl1_free_ring_resources - Free Tx / RX descriptor Resources
  1487. * @adapter: board private structure
  1488. *
  1489. * Free all transmit software resources
  1490. */
  1491. void atl1_free_ring_resources(struct atl1_adapter *adapter)
  1492. {
  1493. struct pci_dev *pdev = adapter->pdev;
  1494. struct atl1_tpd_ring *tpd_ring = &adapter->tpd_ring;
  1495. struct atl1_rfd_ring *rfd_ring = &adapter->rfd_ring;
  1496. struct atl1_rrd_ring *rrd_ring = &adapter->rrd_ring;
  1497. struct atl1_ring_header *ring_header = &adapter->ring_header;
  1498. atl1_clean_tx_ring(adapter);
  1499. atl1_clean_rx_ring(adapter);
  1500. kfree(tpd_ring->buffer_info);
  1501. pci_free_consistent(pdev, ring_header->size, ring_header->desc,
  1502. ring_header->dma);
  1503. tpd_ring->buffer_info = NULL;
  1504. tpd_ring->desc = NULL;
  1505. tpd_ring->dma = 0;
  1506. rfd_ring->buffer_info = NULL;
  1507. rfd_ring->desc = NULL;
  1508. rfd_ring->dma = 0;
  1509. rrd_ring->desc = NULL;
  1510. rrd_ring->dma = 0;
  1511. }
  1512. s32 atl1_up(struct atl1_adapter *adapter)
  1513. {
  1514. struct net_device *netdev = adapter->netdev;
  1515. int err;
  1516. int irq_flags = IRQF_SAMPLE_RANDOM;
  1517. /* hardware has been reset, we need to reload some things */
  1518. atl1_set_multi(netdev);
  1519. atl1_restore_vlan(adapter);
  1520. err = atl1_alloc_rx_buffers(adapter);
  1521. if (unlikely(!err)) /* no RX BUFFER allocated */
  1522. return -ENOMEM;
  1523. if (unlikely(atl1_configure(adapter))) {
  1524. err = -EIO;
  1525. goto err_up;
  1526. }
  1527. err = pci_enable_msi(adapter->pdev);
  1528. if (err) {
  1529. dev_info(&adapter->pdev->dev,
  1530. "Unable to enable MSI: %d\n", err);
  1531. irq_flags |= IRQF_SHARED;
  1532. }
  1533. err = request_irq(adapter->pdev->irq, &atl1_intr, irq_flags,
  1534. netdev->name, netdev);
  1535. if (unlikely(err))
  1536. goto err_up;
  1537. mod_timer(&adapter->watchdog_timer, jiffies);
  1538. atl1_irq_enable(adapter);
  1539. atl1_check_link(adapter);
  1540. return 0;
  1541. /* FIXME: unreachable code! -- CHS */
  1542. /* free irq disable any interrupt */
  1543. iowrite32(0, adapter->hw.hw_addr + REG_IMR);
  1544. free_irq(adapter->pdev->irq, netdev);
  1545. err_up:
  1546. pci_disable_msi(adapter->pdev);
  1547. /* free rx_buffers */
  1548. atl1_clean_rx_ring(adapter);
  1549. return err;
  1550. }
  1551. void atl1_down(struct atl1_adapter *adapter)
  1552. {
  1553. struct net_device *netdev = adapter->netdev;
  1554. del_timer_sync(&adapter->watchdog_timer);
  1555. del_timer_sync(&adapter->phy_config_timer);
  1556. adapter->phy_timer_pending = false;
  1557. atl1_irq_disable(adapter);
  1558. free_irq(adapter->pdev->irq, netdev);
  1559. pci_disable_msi(adapter->pdev);
  1560. atl1_reset_hw(&adapter->hw);
  1561. adapter->cmb.cmb->int_stats = 0;
  1562. adapter->link_speed = SPEED_0;
  1563. adapter->link_duplex = -1;
  1564. netif_carrier_off(netdev);
  1565. netif_stop_queue(netdev);
  1566. atl1_clean_tx_ring(adapter);
  1567. atl1_clean_rx_ring(adapter);
  1568. }
  1569. /*
  1570. * atl1_change_mtu - Change the Maximum Transfer Unit
  1571. * @netdev: network interface device structure
  1572. * @new_mtu: new value for maximum frame size
  1573. *
  1574. * Returns 0 on success, negative on failure
  1575. */
  1576. static int atl1_change_mtu(struct net_device *netdev, int new_mtu)
  1577. {
  1578. struct atl1_adapter *adapter = netdev_priv(netdev);
  1579. int old_mtu = netdev->mtu;
  1580. int max_frame = new_mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
  1581. if ((max_frame < MINIMUM_ETHERNET_FRAME_SIZE) ||
  1582. (max_frame > MAX_JUMBO_FRAME_SIZE)) {
  1583. dev_warn(&adapter->pdev->dev, "invalid MTU setting\n");
  1584. return -EINVAL;
  1585. }
  1586. adapter->hw.max_frame_size = max_frame;
  1587. adapter->hw.tx_jumbo_task_th = (max_frame + 7) >> 3;
  1588. adapter->rx_buffer_len = (max_frame + 7) & ~7;
  1589. adapter->hw.rx_jumbo_th = adapter->rx_buffer_len / 8;
  1590. netdev->mtu = new_mtu;
  1591. if ((old_mtu != new_mtu) && netif_running(netdev)) {
  1592. atl1_down(adapter);
  1593. atl1_up(adapter);
  1594. }
  1595. return 0;
  1596. }
  1597. /*
  1598. * atl1_set_mac - Change the Ethernet Address of the NIC
  1599. * @netdev: network interface device structure
  1600. * @p: pointer to an address structure
  1601. *
  1602. * Returns 0 on success, negative on failure
  1603. */
  1604. static int atl1_set_mac(struct net_device *netdev, void *p)
  1605. {
  1606. struct atl1_adapter *adapter = netdev_priv(netdev);
  1607. struct sockaddr *addr = p;
  1608. if (netif_running(netdev))
  1609. return -EBUSY;
  1610. if (!is_valid_ether_addr(addr->sa_data))
  1611. return -EADDRNOTAVAIL;
  1612. memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
  1613. memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len);
  1614. atl1_set_mac_addr(&adapter->hw);
  1615. return 0;
  1616. }
  1617. /*
  1618. * atl1_watchdog - Timer Call-back
  1619. * @data: pointer to netdev cast into an unsigned long
  1620. */
  1621. static void atl1_watchdog(unsigned long data)
  1622. {
  1623. struct atl1_adapter *adapter = (struct atl1_adapter *)data;
  1624. /* Reset the timer */
  1625. mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
  1626. }
  1627. static int mdio_read(struct net_device *netdev, int phy_id, int reg_num)
  1628. {
  1629. struct atl1_adapter *adapter = netdev_priv(netdev);
  1630. u16 result;
  1631. atl1_read_phy_reg(&adapter->hw, reg_num & 0x1f, &result);
  1632. return result;
  1633. }
  1634. static void mdio_write(struct net_device *netdev, int phy_id, int reg_num, int val)
  1635. {
  1636. struct atl1_adapter *adapter = netdev_priv(netdev);
  1637. atl1_write_phy_reg(&adapter->hw, reg_num, val);
  1638. }
  1639. /*
  1640. * atl1_mii_ioctl -
  1641. * @netdev:
  1642. * @ifreq:
  1643. * @cmd:
  1644. */
  1645. static int atl1_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
  1646. {
  1647. struct atl1_adapter *adapter = netdev_priv(netdev);
  1648. unsigned long flags;
  1649. int retval;
  1650. if (!netif_running(netdev))
  1651. return -EINVAL;
  1652. spin_lock_irqsave(&adapter->lock, flags);
  1653. retval = generic_mii_ioctl(&adapter->mii, if_mii(ifr), cmd, NULL);
  1654. spin_unlock_irqrestore(&adapter->lock, flags);
  1655. return retval;
  1656. }
  1657. /*
  1658. * atl1_ioctl -
  1659. * @netdev:
  1660. * @ifreq:
  1661. * @cmd:
  1662. */
  1663. static int atl1_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
  1664. {
  1665. switch (cmd) {
  1666. case SIOCGMIIPHY:
  1667. case SIOCGMIIREG:
  1668. case SIOCSMIIREG:
  1669. return atl1_mii_ioctl(netdev, ifr, cmd);
  1670. default:
  1671. return -EOPNOTSUPP;
  1672. }
  1673. }
  1674. /*
  1675. * atl1_tx_timeout - Respond to a Tx Hang
  1676. * @netdev: network interface device structure
  1677. */
  1678. static void atl1_tx_timeout(struct net_device *netdev)
  1679. {
  1680. struct atl1_adapter *adapter = netdev_priv(netdev);
  1681. /* Do the reset outside of interrupt context */
  1682. schedule_work(&adapter->tx_timeout_task);
  1683. }
  1684. /*
  1685. * atl1_phy_config - Timer Call-back
  1686. * @data: pointer to netdev cast into an unsigned long
  1687. */
  1688. static void atl1_phy_config(unsigned long data)
  1689. {
  1690. struct atl1_adapter *adapter = (struct atl1_adapter *)data;
  1691. struct atl1_hw *hw = &adapter->hw;
  1692. unsigned long flags;
  1693. spin_lock_irqsave(&adapter->lock, flags);
  1694. adapter->phy_timer_pending = false;
  1695. atl1_write_phy_reg(hw, MII_ADVERTISE, hw->mii_autoneg_adv_reg);
  1696. atl1_write_phy_reg(hw, MII_AT001_CR, hw->mii_1000t_ctrl_reg);
  1697. atl1_write_phy_reg(hw, MII_BMCR, MII_CR_RESET | MII_CR_AUTO_NEG_EN);
  1698. spin_unlock_irqrestore(&adapter->lock, flags);
  1699. }
  1700. int atl1_reset(struct atl1_adapter *adapter)
  1701. {
  1702. int ret;
  1703. ret = atl1_reset_hw(&adapter->hw);
  1704. if (ret != ATL1_SUCCESS)
  1705. return ret;
  1706. return atl1_init_hw(&adapter->hw);
  1707. }
  1708. /*
  1709. * atl1_open - Called when a network interface is made active
  1710. * @netdev: network interface device structure
  1711. *
  1712. * Returns 0 on success, negative value on failure
  1713. *
  1714. * The open entry point is called when a network interface is made
  1715. * active by the system (IFF_UP). At this point all resources needed
  1716. * for transmit and receive operations are allocated, the interrupt
  1717. * handler is registered with the OS, the watchdog timer is started,
  1718. * and the stack is notified that the interface is ready.
  1719. */
  1720. static int atl1_open(struct net_device *netdev)
  1721. {
  1722. struct atl1_adapter *adapter = netdev_priv(netdev);
  1723. int err;
  1724. /* allocate transmit descriptors */
  1725. err = atl1_setup_ring_resources(adapter);
  1726. if (err)
  1727. return err;
  1728. err = atl1_up(adapter);
  1729. if (err)
  1730. goto err_up;
  1731. return 0;
  1732. err_up:
  1733. atl1_reset(adapter);
  1734. return err;
  1735. }
  1736. /*
  1737. * atl1_close - Disables a network interface
  1738. * @netdev: network interface device structure
  1739. *
  1740. * Returns 0, this is not allowed to fail
  1741. *
  1742. * The close entry point is called when an interface is de-activated
  1743. * by the OS. The hardware is still under the drivers control, but
  1744. * needs to be disabled. A global MAC reset is issued to stop the
  1745. * hardware, and all transmit and receive resources are freed.
  1746. */
  1747. static int atl1_close(struct net_device *netdev)
  1748. {
  1749. struct atl1_adapter *adapter = netdev_priv(netdev);
  1750. atl1_down(adapter);
  1751. atl1_free_ring_resources(adapter);
  1752. return 0;
  1753. }
  1754. #ifdef CONFIG_NET_POLL_CONTROLLER
  1755. static void atl1_poll_controller(struct net_device *netdev)
  1756. {
  1757. disable_irq(netdev->irq);
  1758. atl1_intr(netdev->irq, netdev);
  1759. enable_irq(netdev->irq);
  1760. }
  1761. #endif
  1762. /*
  1763. * If TPD Buffer size equal to 0, PCIE DMAR_TO_INT
  1764. * will assert. We do soft reset <0x1400=1> according
  1765. * with the SPEC. BUT, it seemes that PCIE or DMA
  1766. * state-machine will not be reset. DMAR_TO_INT will
  1767. * assert again and again.
  1768. */
  1769. static void atl1_tx_timeout_task(struct work_struct *work)
  1770. {
  1771. struct atl1_adapter *adapter =
  1772. container_of(work, struct atl1_adapter, tx_timeout_task);
  1773. struct net_device *netdev = adapter->netdev;
  1774. netif_device_detach(netdev);
  1775. atl1_down(adapter);
  1776. atl1_up(adapter);
  1777. netif_device_attach(netdev);
  1778. }
  1779. /*
  1780. * atl1_link_chg_task - deal with link change event Out of interrupt context
  1781. */
  1782. static void atl1_link_chg_task(struct work_struct *work)
  1783. {
  1784. struct atl1_adapter *adapter =
  1785. container_of(work, struct atl1_adapter, link_chg_task);
  1786. unsigned long flags;
  1787. spin_lock_irqsave(&adapter->lock, flags);
  1788. atl1_check_link(adapter);
  1789. spin_unlock_irqrestore(&adapter->lock, flags);
  1790. }
  1791. /*
  1792. * atl1_pcie_patch - Patch for PCIE module
  1793. */
  1794. static void atl1_pcie_patch(struct atl1_adapter *adapter)
  1795. {
  1796. u32 value;
  1797. value = 0x6500;
  1798. iowrite32(value, adapter->hw.hw_addr + 0x12FC);
  1799. /* pcie flow control mode change */
  1800. value = ioread32(adapter->hw.hw_addr + 0x1008);
  1801. value |= 0x8000;
  1802. iowrite32(value, adapter->hw.hw_addr + 0x1008);
  1803. }
  1804. /*
  1805. * When ACPI resume on some VIA MotherBoard, the Interrupt Disable bit/0x400
  1806. * on PCI Command register is disable.
  1807. * The function enable this bit.
  1808. * Brackett, 2006/03/15
  1809. */
  1810. static void atl1_via_workaround(struct atl1_adapter *adapter)
  1811. {
  1812. unsigned long value;
  1813. value = ioread16(adapter->hw.hw_addr + PCI_COMMAND);
  1814. if (value & PCI_COMMAND_INTX_DISABLE)
  1815. value &= ~PCI_COMMAND_INTX_DISABLE;
  1816. iowrite32(value, adapter->hw.hw_addr + PCI_COMMAND);
  1817. }
  1818. /*
  1819. * atl1_probe - Device Initialization Routine
  1820. * @pdev: PCI device information struct
  1821. * @ent: entry in atl1_pci_tbl
  1822. *
  1823. * Returns 0 on success, negative on failure
  1824. *
  1825. * atl1_probe initializes an adapter identified by a pci_dev structure.
  1826. * The OS initialization, configuring of the adapter private structure,
  1827. * and a hardware reset occur.
  1828. */
  1829. static int __devinit atl1_probe(struct pci_dev *pdev,
  1830. const struct pci_device_id *ent)
  1831. {
  1832. struct net_device *netdev;
  1833. struct atl1_adapter *adapter;
  1834. static int cards_found = 0;
  1835. bool pci_using_64 = true;
  1836. int err;
  1837. err = pci_enable_device(pdev);
  1838. if (err)
  1839. return err;
  1840. err = pci_set_dma_mask(pdev, DMA_64BIT_MASK);
  1841. if (err) {
  1842. err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
  1843. if (err) {
  1844. dev_err(&pdev->dev, "no usable DMA configuration\n");
  1845. goto err_dma;
  1846. }
  1847. pci_using_64 = false;
  1848. }
  1849. /* Mark all PCI regions associated with PCI device
  1850. * pdev as being reserved by owner atl1_driver_name
  1851. */
  1852. err = pci_request_regions(pdev, atl1_driver_name);
  1853. if (err)
  1854. goto err_request_regions;
  1855. /* Enables bus-mastering on the device and calls
  1856. * pcibios_set_master to do the needed arch specific settings
  1857. */
  1858. pci_set_master(pdev);
  1859. netdev = alloc_etherdev(sizeof(struct atl1_adapter));
  1860. if (!netdev) {
  1861. err = -ENOMEM;
  1862. goto err_alloc_etherdev;
  1863. }
  1864. SET_MODULE_OWNER(netdev);
  1865. SET_NETDEV_DEV(netdev, &pdev->dev);
  1866. pci_set_drvdata(pdev, netdev);
  1867. adapter = netdev_priv(netdev);
  1868. adapter->netdev = netdev;
  1869. adapter->pdev = pdev;
  1870. adapter->hw.back = adapter;
  1871. adapter->hw.hw_addr = pci_iomap(pdev, 0, 0);
  1872. if (!adapter->hw.hw_addr) {
  1873. err = -EIO;
  1874. goto err_pci_iomap;
  1875. }
  1876. /* get device revision number */
  1877. adapter->hw.dev_rev = ioread16(adapter->hw.hw_addr +
  1878. (REG_MASTER_CTRL + 2));
  1879. dev_info(&pdev->dev, "version %s\n", DRIVER_VERSION);
  1880. /* set default ring resource counts */
  1881. adapter->rfd_ring.count = adapter->rrd_ring.count = ATL1_DEFAULT_RFD;
  1882. adapter->tpd_ring.count = ATL1_DEFAULT_TPD;
  1883. adapter->mii.dev = netdev;
  1884. adapter->mii.mdio_read = mdio_read;
  1885. adapter->mii.mdio_write = mdio_write;
  1886. adapter->mii.phy_id_mask = 0x1f;
  1887. adapter->mii.reg_num_mask = 0x1f;
  1888. netdev->open = &atl1_open;
  1889. netdev->stop = &atl1_close;
  1890. netdev->hard_start_xmit = &atl1_xmit_frame;
  1891. netdev->get_stats = &atl1_get_stats;
  1892. netdev->set_multicast_list = &atl1_set_multi;
  1893. netdev->set_mac_address = &atl1_set_mac;
  1894. netdev->change_mtu = &atl1_change_mtu;
  1895. netdev->do_ioctl = &atl1_ioctl;
  1896. netdev->tx_timeout = &atl1_tx_timeout;
  1897. netdev->watchdog_timeo = 5 * HZ;
  1898. #ifdef CONFIG_NET_POLL_CONTROLLER
  1899. netdev->poll_controller = atl1_poll_controller;
  1900. #endif
  1901. netdev->vlan_rx_register = atl1_vlan_rx_register;
  1902. netdev->ethtool_ops = &atl1_ethtool_ops;
  1903. adapter->bd_number = cards_found;
  1904. adapter->pci_using_64 = pci_using_64;
  1905. /* setup the private structure */
  1906. err = atl1_sw_init(adapter);
  1907. if (err)
  1908. goto err_common;
  1909. netdev->features = NETIF_F_HW_CSUM;
  1910. netdev->features |= NETIF_F_SG;
  1911. netdev->features |= (NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX);
  1912. /*
  1913. * FIXME - Until tso performance gets fixed, disable the feature.
  1914. * Enable it with ethtool -K if desired.
  1915. */
  1916. /* netdev->features |= NETIF_F_TSO; */
  1917. if (pci_using_64)
  1918. netdev->features |= NETIF_F_HIGHDMA;
  1919. netdev->features |= NETIF_F_LLTX;
  1920. /*
  1921. * patch for some L1 of old version,
  1922. * the final version of L1 may not need these
  1923. * patches
  1924. */
  1925. /* atl1_pcie_patch(adapter); */
  1926. /* really reset GPHY core */
  1927. iowrite16(0, adapter->hw.hw_addr + REG_GPHY_ENABLE);
  1928. /*
  1929. * reset the controller to
  1930. * put the device in a known good starting state
  1931. */
  1932. if (atl1_reset_hw(&adapter->hw)) {
  1933. err = -EIO;
  1934. goto err_common;
  1935. }
  1936. /* copy the MAC address out of the EEPROM */
  1937. atl1_read_mac_addr(&adapter->hw);
  1938. memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
  1939. if (!is_valid_ether_addr(netdev->dev_addr)) {
  1940. err = -EIO;
  1941. goto err_common;
  1942. }
  1943. atl1_check_options(adapter);
  1944. /* pre-init the MAC, and setup link */
  1945. err = atl1_init_hw(&adapter->hw);
  1946. if (err) {
  1947. err = -EIO;
  1948. goto err_common;
  1949. }
  1950. atl1_pcie_patch(adapter);
  1951. /* assume we have no link for now */
  1952. netif_carrier_off(netdev);
  1953. netif_stop_queue(netdev);
  1954. init_timer(&adapter->watchdog_timer);
  1955. adapter->watchdog_timer.function = &atl1_watchdog;
  1956. adapter->watchdog_timer.data = (unsigned long)adapter;
  1957. init_timer(&adapter->phy_config_timer);
  1958. adapter->phy_config_timer.function = &atl1_phy_config;
  1959. adapter->phy_config_timer.data = (unsigned long)adapter;
  1960. adapter->phy_timer_pending = false;
  1961. INIT_WORK(&adapter->tx_timeout_task, atl1_tx_timeout_task);
  1962. INIT_WORK(&adapter->link_chg_task, atl1_link_chg_task);
  1963. INIT_WORK(&adapter->pcie_dma_to_rst_task, atl1_tx_timeout_task);
  1964. err = register_netdev(netdev);
  1965. if (err)
  1966. goto err_common;
  1967. cards_found++;
  1968. atl1_via_workaround(adapter);
  1969. return 0;
  1970. err_common:
  1971. pci_iounmap(pdev, adapter->hw.hw_addr);
  1972. err_pci_iomap:
  1973. free_netdev(netdev);
  1974. err_alloc_etherdev:
  1975. pci_release_regions(pdev);
  1976. err_dma:
  1977. err_request_regions:
  1978. pci_disable_device(pdev);
  1979. return err;
  1980. }
  1981. /*
  1982. * atl1_remove - Device Removal Routine
  1983. * @pdev: PCI device information struct
  1984. *
  1985. * atl1_remove is called by the PCI subsystem to alert the driver
  1986. * that it should release a PCI device. The could be caused by a
  1987. * Hot-Plug event, or because the driver is going to be removed from
  1988. * memory.
  1989. */
  1990. static void __devexit atl1_remove(struct pci_dev *pdev)
  1991. {
  1992. struct net_device *netdev = pci_get_drvdata(pdev);
  1993. struct atl1_adapter *adapter;
  1994. /* Device not available. Return. */
  1995. if (!netdev)
  1996. return;
  1997. adapter = netdev_priv(netdev);
  1998. /* Some atl1 boards lack persistent storage for their MAC, and get it
  1999. * from the BIOS during POST. If we've been messing with the MAC
  2000. * address, we need to save the permanent one.
  2001. */
  2002. if (memcmp(adapter->hw.mac_addr, adapter->hw.perm_mac_addr, ETH_ALEN)) {
  2003. memcpy(adapter->hw.mac_addr, adapter->hw.perm_mac_addr, ETH_ALEN);
  2004. atl1_set_mac_addr(&adapter->hw);
  2005. }
  2006. iowrite16(0, adapter->hw.hw_addr + REG_GPHY_ENABLE);
  2007. unregister_netdev(netdev);
  2008. pci_iounmap(pdev, adapter->hw.hw_addr);
  2009. pci_release_regions(pdev);
  2010. free_netdev(netdev);
  2011. pci_disable_device(pdev);
  2012. }
  2013. #ifdef CONFIG_PM
  2014. static int atl1_suspend(struct pci_dev *pdev, pm_message_t state)
  2015. {
  2016. struct net_device *netdev = pci_get_drvdata(pdev);
  2017. struct atl1_adapter *adapter = netdev_priv(netdev);
  2018. struct atl1_hw *hw = &adapter->hw;
  2019. u32 ctrl = 0;
  2020. u32 wufc = adapter->wol;
  2021. netif_device_detach(netdev);
  2022. if (netif_running(netdev))
  2023. atl1_down(adapter);
  2024. atl1_read_phy_reg(hw, MII_BMSR, (u16 *) & ctrl);
  2025. atl1_read_phy_reg(hw, MII_BMSR, (u16 *) & ctrl);
  2026. if (ctrl & BMSR_LSTATUS)
  2027. wufc &= ~ATL1_WUFC_LNKC;
  2028. /* reduce speed to 10/100M */
  2029. if (wufc) {
  2030. atl1_phy_enter_power_saving(hw);
  2031. /* if resume, let driver to re- setup link */
  2032. hw->phy_configured = false;
  2033. atl1_set_mac_addr(hw);
  2034. atl1_set_multi(netdev);
  2035. ctrl = 0;
  2036. /* turn on magic packet wol */
  2037. if (wufc & ATL1_WUFC_MAG)
  2038. ctrl = WOL_MAGIC_EN | WOL_MAGIC_PME_EN;
  2039. /* turn on Link change WOL */
  2040. if (wufc & ATL1_WUFC_LNKC)
  2041. ctrl |= (WOL_LINK_CHG_EN | WOL_LINK_CHG_PME_EN);
  2042. iowrite32(ctrl, hw->hw_addr + REG_WOL_CTRL);
  2043. /* turn on all-multi mode if wake on multicast is enabled */
  2044. ctrl = ioread32(hw->hw_addr + REG_MAC_CTRL);
  2045. ctrl &= ~MAC_CTRL_DBG;
  2046. ctrl &= ~MAC_CTRL_PROMIS_EN;
  2047. if (wufc & ATL1_WUFC_MC)
  2048. ctrl |= MAC_CTRL_MC_ALL_EN;
  2049. else
  2050. ctrl &= ~MAC_CTRL_MC_ALL_EN;
  2051. /* turn on broadcast mode if wake on-BC is enabled */
  2052. if (wufc & ATL1_WUFC_BC)
  2053. ctrl |= MAC_CTRL_BC_EN;
  2054. else
  2055. ctrl &= ~MAC_CTRL_BC_EN;
  2056. /* enable RX */
  2057. ctrl |= MAC_CTRL_RX_EN;
  2058. iowrite32(ctrl, hw->hw_addr + REG_MAC_CTRL);
  2059. pci_enable_wake(pdev, PCI_D3hot, 1);
  2060. pci_enable_wake(pdev, PCI_D3cold, 1); /* 4 == D3 cold */
  2061. } else {
  2062. iowrite32(0, hw->hw_addr + REG_WOL_CTRL);
  2063. pci_enable_wake(pdev, PCI_D3hot, 0);
  2064. pci_enable_wake(pdev, PCI_D3cold, 0); /* 4 == D3 cold */
  2065. }
  2066. pci_save_state(pdev);
  2067. pci_disable_device(pdev);
  2068. pci_set_power_state(pdev, PCI_D3hot);
  2069. return 0;
  2070. }
  2071. static int atl1_resume(struct pci_dev *pdev)
  2072. {
  2073. struct net_device *netdev = pci_get_drvdata(pdev);
  2074. struct atl1_adapter *adapter = netdev_priv(netdev);
  2075. u32 ret_val;
  2076. pci_set_power_state(pdev, 0);
  2077. pci_restore_state(pdev);
  2078. ret_val = pci_enable_device(pdev);
  2079. pci_enable_wake(pdev, PCI_D3hot, 0);
  2080. pci_enable_wake(pdev, PCI_D3cold, 0);
  2081. iowrite32(0, adapter->hw.hw_addr + REG_WOL_CTRL);
  2082. atl1_reset(adapter);
  2083. if (netif_running(netdev))
  2084. atl1_up(adapter);
  2085. netif_device_attach(netdev);
  2086. atl1_via_workaround(adapter);
  2087. return 0;
  2088. }
  2089. #else
  2090. #define atl1_suspend NULL
  2091. #define atl1_resume NULL
  2092. #endif
  2093. static struct pci_driver atl1_driver = {
  2094. .name = atl1_driver_name,
  2095. .id_table = atl1_pci_tbl,
  2096. .probe = atl1_probe,
  2097. .remove = __devexit_p(atl1_remove),
  2098. /* Power Managment Hooks */
  2099. /* probably broken right now -- CHS */
  2100. .suspend = atl1_suspend,
  2101. .resume = atl1_resume
  2102. };
  2103. /*
  2104. * atl1_exit_module - Driver Exit Cleanup Routine
  2105. *
  2106. * atl1_exit_module is called just before the driver is removed
  2107. * from memory.
  2108. */
  2109. static void __exit atl1_exit_module(void)
  2110. {
  2111. pci_unregister_driver(&atl1_driver);
  2112. }
  2113. /*
  2114. * atl1_init_module - Driver Registration Routine
  2115. *
  2116. * atl1_init_module is the first routine called when the driver is
  2117. * loaded. All it does is register with the PCI subsystem.
  2118. */
  2119. static int __init atl1_init_module(void)
  2120. {
  2121. return pci_register_driver(&atl1_driver);
  2122. }
  2123. module_init(atl1_init_module);
  2124. module_exit(atl1_exit_module);