main.c 61 KB

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  1. /*
  2. * Copyright (c) 2008-2011 Atheros Communications Inc.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for any
  5. * purpose with or without fee is hereby granted, provided that the above
  6. * copyright notice and this permission notice appear in all copies.
  7. *
  8. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  9. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15. */
  16. #include <linux/nl80211.h>
  17. #include <linux/delay.h>
  18. #include "ath9k.h"
  19. #include "btcoex.h"
  20. static u8 parse_mpdudensity(u8 mpdudensity)
  21. {
  22. /*
  23. * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
  24. * 0 for no restriction
  25. * 1 for 1/4 us
  26. * 2 for 1/2 us
  27. * 3 for 1 us
  28. * 4 for 2 us
  29. * 5 for 4 us
  30. * 6 for 8 us
  31. * 7 for 16 us
  32. */
  33. switch (mpdudensity) {
  34. case 0:
  35. return 0;
  36. case 1:
  37. case 2:
  38. case 3:
  39. /* Our lower layer calculations limit our precision to
  40. 1 microsecond */
  41. return 1;
  42. case 4:
  43. return 2;
  44. case 5:
  45. return 4;
  46. case 6:
  47. return 8;
  48. case 7:
  49. return 16;
  50. default:
  51. return 0;
  52. }
  53. }
  54. static bool ath9k_has_pending_frames(struct ath_softc *sc, struct ath_txq *txq)
  55. {
  56. bool pending = false;
  57. spin_lock_bh(&txq->axq_lock);
  58. if (txq->axq_depth || !list_empty(&txq->axq_acq))
  59. pending = true;
  60. spin_unlock_bh(&txq->axq_lock);
  61. return pending;
  62. }
  63. static bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
  64. {
  65. unsigned long flags;
  66. bool ret;
  67. spin_lock_irqsave(&sc->sc_pm_lock, flags);
  68. ret = ath9k_hw_setpower(sc->sc_ah, mode);
  69. spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  70. return ret;
  71. }
  72. void ath9k_ps_wakeup(struct ath_softc *sc)
  73. {
  74. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  75. unsigned long flags;
  76. enum ath9k_power_mode power_mode;
  77. spin_lock_irqsave(&sc->sc_pm_lock, flags);
  78. if (++sc->ps_usecount != 1)
  79. goto unlock;
  80. power_mode = sc->sc_ah->power_mode;
  81. ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
  82. /*
  83. * While the hardware is asleep, the cycle counters contain no
  84. * useful data. Better clear them now so that they don't mess up
  85. * survey data results.
  86. */
  87. if (power_mode != ATH9K_PM_AWAKE) {
  88. spin_lock(&common->cc_lock);
  89. ath_hw_cycle_counters_update(common);
  90. memset(&common->cc_survey, 0, sizeof(common->cc_survey));
  91. spin_unlock(&common->cc_lock);
  92. }
  93. unlock:
  94. spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  95. }
  96. void ath9k_ps_restore(struct ath_softc *sc)
  97. {
  98. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  99. unsigned long flags;
  100. spin_lock_irqsave(&sc->sc_pm_lock, flags);
  101. if (--sc->ps_usecount != 0)
  102. goto unlock;
  103. spin_lock(&common->cc_lock);
  104. ath_hw_cycle_counters_update(common);
  105. spin_unlock(&common->cc_lock);
  106. if (sc->ps_idle)
  107. ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP);
  108. else if (sc->ps_enabled &&
  109. !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
  110. PS_WAIT_FOR_CAB |
  111. PS_WAIT_FOR_PSPOLL_DATA |
  112. PS_WAIT_FOR_TX_ACK)))
  113. ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_NETWORK_SLEEP);
  114. unlock:
  115. spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  116. }
  117. void ath_start_ani(struct ath_common *common)
  118. {
  119. struct ath_hw *ah = common->ah;
  120. unsigned long timestamp = jiffies_to_msecs(jiffies);
  121. struct ath_softc *sc = (struct ath_softc *) common->priv;
  122. if (!(sc->sc_flags & SC_OP_ANI_RUN))
  123. return;
  124. if (sc->sc_flags & SC_OP_OFFCHANNEL)
  125. return;
  126. common->ani.longcal_timer = timestamp;
  127. common->ani.shortcal_timer = timestamp;
  128. common->ani.checkani_timer = timestamp;
  129. mod_timer(&common->ani.timer,
  130. jiffies +
  131. msecs_to_jiffies((u32)ah->config.ani_poll_interval));
  132. }
  133. static void ath_update_survey_nf(struct ath_softc *sc, int channel)
  134. {
  135. struct ath_hw *ah = sc->sc_ah;
  136. struct ath9k_channel *chan = &ah->channels[channel];
  137. struct survey_info *survey = &sc->survey[channel];
  138. if (chan->noisefloor) {
  139. survey->filled |= SURVEY_INFO_NOISE_DBM;
  140. survey->noise = ath9k_hw_getchan_noise(ah, chan);
  141. }
  142. }
  143. /*
  144. * Updates the survey statistics and returns the busy time since last
  145. * update in %, if the measurement duration was long enough for the
  146. * result to be useful, -1 otherwise.
  147. */
  148. static int ath_update_survey_stats(struct ath_softc *sc)
  149. {
  150. struct ath_hw *ah = sc->sc_ah;
  151. struct ath_common *common = ath9k_hw_common(ah);
  152. int pos = ah->curchan - &ah->channels[0];
  153. struct survey_info *survey = &sc->survey[pos];
  154. struct ath_cycle_counters *cc = &common->cc_survey;
  155. unsigned int div = common->clockrate * 1000;
  156. int ret = 0;
  157. if (!ah->curchan)
  158. return -1;
  159. if (ah->power_mode == ATH9K_PM_AWAKE)
  160. ath_hw_cycle_counters_update(common);
  161. if (cc->cycles > 0) {
  162. survey->filled |= SURVEY_INFO_CHANNEL_TIME |
  163. SURVEY_INFO_CHANNEL_TIME_BUSY |
  164. SURVEY_INFO_CHANNEL_TIME_RX |
  165. SURVEY_INFO_CHANNEL_TIME_TX;
  166. survey->channel_time += cc->cycles / div;
  167. survey->channel_time_busy += cc->rx_busy / div;
  168. survey->channel_time_rx += cc->rx_frame / div;
  169. survey->channel_time_tx += cc->tx_frame / div;
  170. }
  171. if (cc->cycles < div)
  172. return -1;
  173. if (cc->cycles > 0)
  174. ret = cc->rx_busy * 100 / cc->cycles;
  175. memset(cc, 0, sizeof(*cc));
  176. ath_update_survey_nf(sc, pos);
  177. return ret;
  178. }
  179. /*
  180. * Set/change channels. If the channel is really being changed, it's done
  181. * by reseting the chip. To accomplish this we must first cleanup any pending
  182. * DMA, then restart stuff.
  183. */
  184. static int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
  185. struct ath9k_channel *hchan)
  186. {
  187. struct ath_hw *ah = sc->sc_ah;
  188. struct ath_common *common = ath9k_hw_common(ah);
  189. struct ieee80211_conf *conf = &common->hw->conf;
  190. bool fastcc = true, stopped;
  191. struct ieee80211_channel *channel = hw->conf.channel;
  192. struct ath9k_hw_cal_data *caldata = NULL;
  193. int r;
  194. if (sc->sc_flags & SC_OP_INVALID)
  195. return -EIO;
  196. sc->hw_busy_count = 0;
  197. del_timer_sync(&common->ani.timer);
  198. cancel_work_sync(&sc->paprd_work);
  199. cancel_work_sync(&sc->hw_check_work);
  200. cancel_delayed_work_sync(&sc->tx_complete_work);
  201. cancel_delayed_work_sync(&sc->hw_pll_work);
  202. ath9k_ps_wakeup(sc);
  203. spin_lock_bh(&sc->sc_pcu_lock);
  204. /*
  205. * This is only performed if the channel settings have
  206. * actually changed.
  207. *
  208. * To switch channels clear any pending DMA operations;
  209. * wait long enough for the RX fifo to drain, reset the
  210. * hardware at the new frequency, and then re-enable
  211. * the relevant bits of the h/w.
  212. */
  213. ath9k_hw_disable_interrupts(ah);
  214. stopped = ath_drain_all_txq(sc, false);
  215. if (!ath_stoprecv(sc))
  216. stopped = false;
  217. if (!ath9k_hw_check_alive(ah))
  218. stopped = false;
  219. /* XXX: do not flush receive queue here. We don't want
  220. * to flush data frames already in queue because of
  221. * changing channel. */
  222. if (!stopped || !(sc->sc_flags & SC_OP_OFFCHANNEL))
  223. fastcc = false;
  224. if (!(sc->sc_flags & SC_OP_OFFCHANNEL))
  225. caldata = &sc->caldata;
  226. ath_dbg(common, ATH_DBG_CONFIG,
  227. "(%u MHz) -> (%u MHz), conf_is_ht40: %d fastcc: %d\n",
  228. sc->sc_ah->curchan->channel,
  229. channel->center_freq, conf_is_ht40(conf),
  230. fastcc);
  231. r = ath9k_hw_reset(ah, hchan, caldata, fastcc);
  232. if (r) {
  233. ath_err(common,
  234. "Unable to reset channel (%u MHz), reset status %d\n",
  235. channel->center_freq, r);
  236. goto ps_restore;
  237. }
  238. if (ath_startrecv(sc) != 0) {
  239. ath_err(common, "Unable to restart recv logic\n");
  240. r = -EIO;
  241. goto ps_restore;
  242. }
  243. ath9k_cmn_update_txpow(ah, sc->curtxpow,
  244. sc->config.txpowlimit, &sc->curtxpow);
  245. ath9k_hw_set_interrupts(ah, ah->imask);
  246. ath9k_hw_enable_interrupts(ah);
  247. if (!(sc->sc_flags & (SC_OP_OFFCHANNEL))) {
  248. if (sc->sc_flags & SC_OP_BEACONS)
  249. ath_set_beacon(sc);
  250. ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
  251. ieee80211_queue_delayed_work(sc->hw, &sc->hw_pll_work, HZ/2);
  252. if (!common->disable_ani)
  253. ath_start_ani(common);
  254. }
  255. ps_restore:
  256. ieee80211_wake_queues(hw);
  257. spin_unlock_bh(&sc->sc_pcu_lock);
  258. ath9k_ps_restore(sc);
  259. return r;
  260. }
  261. static void ath_paprd_activate(struct ath_softc *sc)
  262. {
  263. struct ath_hw *ah = sc->sc_ah;
  264. struct ath9k_hw_cal_data *caldata = ah->caldata;
  265. struct ath_common *common = ath9k_hw_common(ah);
  266. int chain;
  267. if (!caldata || !caldata->paprd_done)
  268. return;
  269. ath9k_ps_wakeup(sc);
  270. ar9003_paprd_enable(ah, false);
  271. for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
  272. if (!(common->tx_chainmask & BIT(chain)))
  273. continue;
  274. ar9003_paprd_populate_single_table(ah, caldata, chain);
  275. }
  276. ar9003_paprd_enable(ah, true);
  277. ath9k_ps_restore(sc);
  278. }
  279. static bool ath_paprd_send_frame(struct ath_softc *sc, struct sk_buff *skb, int chain)
  280. {
  281. struct ieee80211_hw *hw = sc->hw;
  282. struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
  283. struct ath_hw *ah = sc->sc_ah;
  284. struct ath_common *common = ath9k_hw_common(ah);
  285. struct ath_tx_control txctl;
  286. int time_left;
  287. memset(&txctl, 0, sizeof(txctl));
  288. txctl.txq = sc->tx.txq_map[WME_AC_BE];
  289. memset(tx_info, 0, sizeof(*tx_info));
  290. tx_info->band = hw->conf.channel->band;
  291. tx_info->flags |= IEEE80211_TX_CTL_NO_ACK;
  292. tx_info->control.rates[0].idx = 0;
  293. tx_info->control.rates[0].count = 1;
  294. tx_info->control.rates[0].flags = IEEE80211_TX_RC_MCS;
  295. tx_info->control.rates[1].idx = -1;
  296. init_completion(&sc->paprd_complete);
  297. txctl.paprd = BIT(chain);
  298. if (ath_tx_start(hw, skb, &txctl) != 0) {
  299. ath_dbg(common, ATH_DBG_CALIBRATE, "PAPRD TX failed\n");
  300. dev_kfree_skb_any(skb);
  301. return false;
  302. }
  303. time_left = wait_for_completion_timeout(&sc->paprd_complete,
  304. msecs_to_jiffies(ATH_PAPRD_TIMEOUT));
  305. if (!time_left)
  306. ath_dbg(common, ATH_DBG_CALIBRATE,
  307. "Timeout waiting for paprd training on TX chain %d\n",
  308. chain);
  309. return !!time_left;
  310. }
  311. void ath_paprd_calibrate(struct work_struct *work)
  312. {
  313. struct ath_softc *sc = container_of(work, struct ath_softc, paprd_work);
  314. struct ieee80211_hw *hw = sc->hw;
  315. struct ath_hw *ah = sc->sc_ah;
  316. struct ieee80211_hdr *hdr;
  317. struct sk_buff *skb = NULL;
  318. struct ath9k_hw_cal_data *caldata = ah->caldata;
  319. struct ath_common *common = ath9k_hw_common(ah);
  320. int ftype;
  321. int chain_ok = 0;
  322. int chain;
  323. int len = 1800;
  324. if (!caldata)
  325. return;
  326. ath9k_ps_wakeup(sc);
  327. if (ar9003_paprd_init_table(ah) < 0)
  328. goto fail_paprd;
  329. skb = alloc_skb(len, GFP_KERNEL);
  330. if (!skb)
  331. goto fail_paprd;
  332. skb_put(skb, len);
  333. memset(skb->data, 0, len);
  334. hdr = (struct ieee80211_hdr *)skb->data;
  335. ftype = IEEE80211_FTYPE_DATA | IEEE80211_STYPE_NULLFUNC;
  336. hdr->frame_control = cpu_to_le16(ftype);
  337. hdr->duration_id = cpu_to_le16(10);
  338. memcpy(hdr->addr1, hw->wiphy->perm_addr, ETH_ALEN);
  339. memcpy(hdr->addr2, hw->wiphy->perm_addr, ETH_ALEN);
  340. memcpy(hdr->addr3, hw->wiphy->perm_addr, ETH_ALEN);
  341. for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
  342. if (!(common->tx_chainmask & BIT(chain)))
  343. continue;
  344. chain_ok = 0;
  345. ath_dbg(common, ATH_DBG_CALIBRATE,
  346. "Sending PAPRD frame for thermal measurement "
  347. "on chain %d\n", chain);
  348. if (!ath_paprd_send_frame(sc, skb, chain))
  349. goto fail_paprd;
  350. ar9003_paprd_setup_gain_table(ah, chain);
  351. ath_dbg(common, ATH_DBG_CALIBRATE,
  352. "Sending PAPRD training frame on chain %d\n", chain);
  353. if (!ath_paprd_send_frame(sc, skb, chain))
  354. goto fail_paprd;
  355. if (!ar9003_paprd_is_done(ah)) {
  356. ath_dbg(common, ATH_DBG_CALIBRATE,
  357. "PAPRD not yet done on chain %d\n", chain);
  358. break;
  359. }
  360. if (ar9003_paprd_create_curve(ah, caldata, chain)) {
  361. ath_dbg(common, ATH_DBG_CALIBRATE,
  362. "PAPRD create curve failed on chain %d\n",
  363. chain);
  364. break;
  365. }
  366. chain_ok = 1;
  367. }
  368. kfree_skb(skb);
  369. if (chain_ok) {
  370. caldata->paprd_done = true;
  371. ath_paprd_activate(sc);
  372. }
  373. fail_paprd:
  374. ath9k_ps_restore(sc);
  375. }
  376. /*
  377. * This routine performs the periodic noise floor calibration function
  378. * that is used to adjust and optimize the chip performance. This
  379. * takes environmental changes (location, temperature) into account.
  380. * When the task is complete, it reschedules itself depending on the
  381. * appropriate interval that was calculated.
  382. */
  383. void ath_ani_calibrate(unsigned long data)
  384. {
  385. struct ath_softc *sc = (struct ath_softc *)data;
  386. struct ath_hw *ah = sc->sc_ah;
  387. struct ath_common *common = ath9k_hw_common(ah);
  388. bool longcal = false;
  389. bool shortcal = false;
  390. bool aniflag = false;
  391. unsigned int timestamp = jiffies_to_msecs(jiffies);
  392. u32 cal_interval, short_cal_interval, long_cal_interval;
  393. unsigned long flags;
  394. if (ah->caldata && ah->caldata->nfcal_interference)
  395. long_cal_interval = ATH_LONG_CALINTERVAL_INT;
  396. else
  397. long_cal_interval = ATH_LONG_CALINTERVAL;
  398. short_cal_interval = (ah->opmode == NL80211_IFTYPE_AP) ?
  399. ATH_AP_SHORT_CALINTERVAL : ATH_STA_SHORT_CALINTERVAL;
  400. /* Only calibrate if awake */
  401. if (sc->sc_ah->power_mode != ATH9K_PM_AWAKE)
  402. goto set_timer;
  403. ath9k_ps_wakeup(sc);
  404. /* Long calibration runs independently of short calibration. */
  405. if ((timestamp - common->ani.longcal_timer) >= long_cal_interval) {
  406. longcal = true;
  407. ath_dbg(common, ATH_DBG_ANI, "longcal @%lu\n", jiffies);
  408. common->ani.longcal_timer = timestamp;
  409. }
  410. /* Short calibration applies only while caldone is false */
  411. if (!common->ani.caldone) {
  412. if ((timestamp - common->ani.shortcal_timer) >= short_cal_interval) {
  413. shortcal = true;
  414. ath_dbg(common, ATH_DBG_ANI,
  415. "shortcal @%lu\n", jiffies);
  416. common->ani.shortcal_timer = timestamp;
  417. common->ani.resetcal_timer = timestamp;
  418. }
  419. } else {
  420. if ((timestamp - common->ani.resetcal_timer) >=
  421. ATH_RESTART_CALINTERVAL) {
  422. common->ani.caldone = ath9k_hw_reset_calvalid(ah);
  423. if (common->ani.caldone)
  424. common->ani.resetcal_timer = timestamp;
  425. }
  426. }
  427. /* Verify whether we must check ANI */
  428. if ((timestamp - common->ani.checkani_timer) >=
  429. ah->config.ani_poll_interval) {
  430. aniflag = true;
  431. common->ani.checkani_timer = timestamp;
  432. }
  433. /* Call ANI routine if necessary */
  434. if (aniflag) {
  435. spin_lock_irqsave(&common->cc_lock, flags);
  436. ath9k_hw_ani_monitor(ah, ah->curchan);
  437. ath_update_survey_stats(sc);
  438. spin_unlock_irqrestore(&common->cc_lock, flags);
  439. }
  440. /* Perform calibration if necessary */
  441. if (longcal || shortcal) {
  442. common->ani.caldone =
  443. ath9k_hw_calibrate(ah, ah->curchan,
  444. common->rx_chainmask, longcal);
  445. }
  446. ath9k_ps_restore(sc);
  447. set_timer:
  448. /*
  449. * Set timer interval based on previous results.
  450. * The interval must be the shortest necessary to satisfy ANI,
  451. * short calibration and long calibration.
  452. */
  453. ath9k_debug_samp_bb_mac(sc);
  454. cal_interval = ATH_LONG_CALINTERVAL;
  455. if (sc->sc_ah->config.enable_ani)
  456. cal_interval = min(cal_interval,
  457. (u32)ah->config.ani_poll_interval);
  458. if (!common->ani.caldone)
  459. cal_interval = min(cal_interval, (u32)short_cal_interval);
  460. mod_timer(&common->ani.timer, jiffies + msecs_to_jiffies(cal_interval));
  461. if ((sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_PAPRD) && ah->caldata) {
  462. if (!ah->caldata->paprd_done)
  463. ieee80211_queue_work(sc->hw, &sc->paprd_work);
  464. else if (!ah->paprd_table_write_done)
  465. ath_paprd_activate(sc);
  466. }
  467. }
  468. static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta)
  469. {
  470. struct ath_node *an;
  471. an = (struct ath_node *)sta->drv_priv;
  472. #ifdef CONFIG_ATH9K_DEBUGFS
  473. spin_lock(&sc->nodes_lock);
  474. list_add(&an->list, &sc->nodes);
  475. spin_unlock(&sc->nodes_lock);
  476. an->sta = sta;
  477. #endif
  478. if (sc->sc_flags & SC_OP_TXAGGR) {
  479. ath_tx_node_init(sc, an);
  480. an->maxampdu = 1 << (IEEE80211_HT_MAX_AMPDU_FACTOR +
  481. sta->ht_cap.ampdu_factor);
  482. an->mpdudensity = parse_mpdudensity(sta->ht_cap.ampdu_density);
  483. }
  484. }
  485. static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
  486. {
  487. struct ath_node *an = (struct ath_node *)sta->drv_priv;
  488. #ifdef CONFIG_ATH9K_DEBUGFS
  489. spin_lock(&sc->nodes_lock);
  490. list_del(&an->list);
  491. spin_unlock(&sc->nodes_lock);
  492. an->sta = NULL;
  493. #endif
  494. if (sc->sc_flags & SC_OP_TXAGGR)
  495. ath_tx_node_cleanup(sc, an);
  496. }
  497. void ath_hw_check(struct work_struct *work)
  498. {
  499. struct ath_softc *sc = container_of(work, struct ath_softc, hw_check_work);
  500. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  501. unsigned long flags;
  502. int busy;
  503. ath9k_ps_wakeup(sc);
  504. if (ath9k_hw_check_alive(sc->sc_ah))
  505. goto out;
  506. spin_lock_irqsave(&common->cc_lock, flags);
  507. busy = ath_update_survey_stats(sc);
  508. spin_unlock_irqrestore(&common->cc_lock, flags);
  509. ath_dbg(common, ATH_DBG_RESET, "Possible baseband hang, "
  510. "busy=%d (try %d)\n", busy, sc->hw_busy_count + 1);
  511. if (busy >= 99) {
  512. if (++sc->hw_busy_count >= 3) {
  513. spin_lock_bh(&sc->sc_pcu_lock);
  514. ath_reset(sc, true);
  515. spin_unlock_bh(&sc->sc_pcu_lock);
  516. }
  517. } else if (busy >= 0)
  518. sc->hw_busy_count = 0;
  519. out:
  520. ath9k_ps_restore(sc);
  521. }
  522. static void ath_hw_pll_rx_hang_check(struct ath_softc *sc, u32 pll_sqsum)
  523. {
  524. static int count;
  525. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  526. if (pll_sqsum >= 0x40000) {
  527. count++;
  528. if (count == 3) {
  529. /* Rx is hung for more than 500ms. Reset it */
  530. ath_dbg(common, ATH_DBG_RESET,
  531. "Possible RX hang, resetting");
  532. spin_lock_bh(&sc->sc_pcu_lock);
  533. ath_reset(sc, true);
  534. spin_unlock_bh(&sc->sc_pcu_lock);
  535. count = 0;
  536. }
  537. } else
  538. count = 0;
  539. }
  540. void ath_hw_pll_work(struct work_struct *work)
  541. {
  542. struct ath_softc *sc = container_of(work, struct ath_softc,
  543. hw_pll_work.work);
  544. u32 pll_sqsum;
  545. if (AR_SREV_9485(sc->sc_ah)) {
  546. ath9k_ps_wakeup(sc);
  547. pll_sqsum = ar9003_get_pll_sqsum_dvc(sc->sc_ah);
  548. ath9k_ps_restore(sc);
  549. ath_hw_pll_rx_hang_check(sc, pll_sqsum);
  550. ieee80211_queue_delayed_work(sc->hw, &sc->hw_pll_work, HZ/5);
  551. }
  552. }
  553. void ath9k_tasklet(unsigned long data)
  554. {
  555. struct ath_softc *sc = (struct ath_softc *)data;
  556. struct ath_hw *ah = sc->sc_ah;
  557. struct ath_common *common = ath9k_hw_common(ah);
  558. u32 status = sc->intrstatus;
  559. u32 rxmask;
  560. if ((status & ATH9K_INT_FATAL) ||
  561. (status & ATH9K_INT_BB_WATCHDOG)) {
  562. spin_lock(&sc->sc_pcu_lock);
  563. ath_reset(sc, true);
  564. spin_unlock(&sc->sc_pcu_lock);
  565. return;
  566. }
  567. ath9k_ps_wakeup(sc);
  568. spin_lock(&sc->sc_pcu_lock);
  569. /*
  570. * Only run the baseband hang check if beacons stop working in AP or
  571. * IBSS mode, because it has a high false positive rate. For station
  572. * mode it should not be necessary, since the upper layers will detect
  573. * this through a beacon miss automatically and the following channel
  574. * change will trigger a hardware reset anyway
  575. */
  576. if (ath9k_hw_numtxpending(ah, sc->beacon.beaconq) != 0 &&
  577. !ath9k_hw_check_alive(ah))
  578. ieee80211_queue_work(sc->hw, &sc->hw_check_work);
  579. if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
  580. /*
  581. * TSF sync does not look correct; remain awake to sync with
  582. * the next Beacon.
  583. */
  584. ath_dbg(common, ATH_DBG_PS,
  585. "TSFOOR - Sync with next Beacon\n");
  586. sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC;
  587. }
  588. if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
  589. rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL |
  590. ATH9K_INT_RXORN);
  591. else
  592. rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
  593. if (status & rxmask) {
  594. /* Check for high priority Rx first */
  595. if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
  596. (status & ATH9K_INT_RXHP))
  597. ath_rx_tasklet(sc, 0, true);
  598. ath_rx_tasklet(sc, 0, false);
  599. }
  600. if (status & ATH9K_INT_TX) {
  601. if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
  602. ath_tx_edma_tasklet(sc);
  603. else
  604. ath_tx_tasklet(sc);
  605. }
  606. if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
  607. if (status & ATH9K_INT_GENTIMER)
  608. ath_gen_timer_isr(sc->sc_ah);
  609. /* re-enable hardware interrupt */
  610. ath9k_hw_enable_interrupts(ah);
  611. spin_unlock(&sc->sc_pcu_lock);
  612. ath9k_ps_restore(sc);
  613. }
  614. irqreturn_t ath_isr(int irq, void *dev)
  615. {
  616. #define SCHED_INTR ( \
  617. ATH9K_INT_FATAL | \
  618. ATH9K_INT_BB_WATCHDOG | \
  619. ATH9K_INT_RXORN | \
  620. ATH9K_INT_RXEOL | \
  621. ATH9K_INT_RX | \
  622. ATH9K_INT_RXLP | \
  623. ATH9K_INT_RXHP | \
  624. ATH9K_INT_TX | \
  625. ATH9K_INT_BMISS | \
  626. ATH9K_INT_CST | \
  627. ATH9K_INT_TSFOOR | \
  628. ATH9K_INT_GENTIMER)
  629. struct ath_softc *sc = dev;
  630. struct ath_hw *ah = sc->sc_ah;
  631. struct ath_common *common = ath9k_hw_common(ah);
  632. enum ath9k_int status;
  633. bool sched = false;
  634. /*
  635. * The hardware is not ready/present, don't
  636. * touch anything. Note this can happen early
  637. * on if the IRQ is shared.
  638. */
  639. if (sc->sc_flags & SC_OP_INVALID)
  640. return IRQ_NONE;
  641. /* shared irq, not for us */
  642. if (!ath9k_hw_intrpend(ah))
  643. return IRQ_NONE;
  644. /*
  645. * Figure out the reason(s) for the interrupt. Note
  646. * that the hal returns a pseudo-ISR that may include
  647. * bits we haven't explicitly enabled so we mask the
  648. * value to insure we only process bits we requested.
  649. */
  650. ath9k_hw_getisr(ah, &status); /* NB: clears ISR too */
  651. status &= ah->imask; /* discard unasked-for bits */
  652. /*
  653. * If there are no status bits set, then this interrupt was not
  654. * for me (should have been caught above).
  655. */
  656. if (!status)
  657. return IRQ_NONE;
  658. /* Cache the status */
  659. sc->intrstatus = status;
  660. if (status & SCHED_INTR)
  661. sched = true;
  662. /*
  663. * If a FATAL or RXORN interrupt is received, we have to reset the
  664. * chip immediately.
  665. */
  666. if ((status & ATH9K_INT_FATAL) || ((status & ATH9K_INT_RXORN) &&
  667. !(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)))
  668. goto chip_reset;
  669. if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
  670. (status & ATH9K_INT_BB_WATCHDOG)) {
  671. spin_lock(&common->cc_lock);
  672. ath_hw_cycle_counters_update(common);
  673. ar9003_hw_bb_watchdog_dbg_info(ah);
  674. spin_unlock(&common->cc_lock);
  675. goto chip_reset;
  676. }
  677. if (status & ATH9K_INT_SWBA)
  678. tasklet_schedule(&sc->bcon_tasklet);
  679. if (status & ATH9K_INT_TXURN)
  680. ath9k_hw_updatetxtriglevel(ah, true);
  681. if (status & ATH9K_INT_RXEOL) {
  682. ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
  683. ath9k_hw_set_interrupts(ah, ah->imask);
  684. }
  685. if (status & ATH9K_INT_MIB) {
  686. /*
  687. * Disable interrupts until we service the MIB
  688. * interrupt; otherwise it will continue to
  689. * fire.
  690. */
  691. ath9k_hw_disable_interrupts(ah);
  692. /*
  693. * Let the hal handle the event. We assume
  694. * it will clear whatever condition caused
  695. * the interrupt.
  696. */
  697. spin_lock(&common->cc_lock);
  698. ath9k_hw_proc_mib_event(ah);
  699. spin_unlock(&common->cc_lock);
  700. ath9k_hw_enable_interrupts(ah);
  701. }
  702. if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
  703. if (status & ATH9K_INT_TIM_TIMER) {
  704. if (ATH_DBG_WARN_ON_ONCE(sc->ps_idle))
  705. goto chip_reset;
  706. /* Clear RxAbort bit so that we can
  707. * receive frames */
  708. ath9k_setpower(sc, ATH9K_PM_AWAKE);
  709. ath9k_hw_setrxabort(sc->sc_ah, 0);
  710. sc->ps_flags |= PS_WAIT_FOR_BEACON;
  711. }
  712. chip_reset:
  713. ath_debug_stat_interrupt(sc, status);
  714. if (sched) {
  715. /* turn off every interrupt */
  716. ath9k_hw_disable_interrupts(ah);
  717. tasklet_schedule(&sc->intr_tq);
  718. }
  719. return IRQ_HANDLED;
  720. #undef SCHED_INTR
  721. }
  722. static void ath_radio_enable(struct ath_softc *sc, struct ieee80211_hw *hw)
  723. {
  724. struct ath_hw *ah = sc->sc_ah;
  725. struct ath_common *common = ath9k_hw_common(ah);
  726. struct ieee80211_channel *channel = hw->conf.channel;
  727. int r;
  728. ath9k_ps_wakeup(sc);
  729. spin_lock_bh(&sc->sc_pcu_lock);
  730. atomic_set(&ah->intr_ref_cnt, -1);
  731. ath9k_hw_configpcipowersave(ah, false);
  732. if (!ah->curchan)
  733. ah->curchan = ath9k_cmn_get_curchannel(sc->hw, ah);
  734. r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
  735. if (r) {
  736. ath_err(common,
  737. "Unable to reset channel (%u MHz), reset status %d\n",
  738. channel->center_freq, r);
  739. }
  740. ath9k_cmn_update_txpow(ah, sc->curtxpow,
  741. sc->config.txpowlimit, &sc->curtxpow);
  742. if (ath_startrecv(sc) != 0) {
  743. ath_err(common, "Unable to restart recv logic\n");
  744. goto out;
  745. }
  746. if (sc->sc_flags & SC_OP_BEACONS)
  747. ath_set_beacon(sc); /* restart beacons */
  748. /* Re-Enable interrupts */
  749. ath9k_hw_set_interrupts(ah, ah->imask);
  750. ath9k_hw_enable_interrupts(ah);
  751. /* Enable LED */
  752. ath9k_hw_cfg_output(ah, ah->led_pin,
  753. AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
  754. ath9k_hw_set_gpio(ah, ah->led_pin, 0);
  755. ieee80211_wake_queues(hw);
  756. ieee80211_queue_delayed_work(hw, &sc->hw_pll_work, HZ/2);
  757. out:
  758. spin_unlock_bh(&sc->sc_pcu_lock);
  759. ath9k_ps_restore(sc);
  760. }
  761. void ath_radio_disable(struct ath_softc *sc, struct ieee80211_hw *hw)
  762. {
  763. struct ath_hw *ah = sc->sc_ah;
  764. struct ieee80211_channel *channel = hw->conf.channel;
  765. int r;
  766. ath9k_ps_wakeup(sc);
  767. cancel_delayed_work_sync(&sc->hw_pll_work);
  768. spin_lock_bh(&sc->sc_pcu_lock);
  769. ieee80211_stop_queues(hw);
  770. /*
  771. * Keep the LED on when the radio is disabled
  772. * during idle unassociated state.
  773. */
  774. if (!sc->ps_idle) {
  775. ath9k_hw_set_gpio(ah, ah->led_pin, 1);
  776. ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
  777. }
  778. /* Disable interrupts */
  779. ath9k_hw_disable_interrupts(ah);
  780. ath_drain_all_txq(sc, false); /* clear pending tx frames */
  781. ath_stoprecv(sc); /* turn off frame recv */
  782. ath_flushrecv(sc); /* flush recv queue */
  783. if (!ah->curchan)
  784. ah->curchan = ath9k_cmn_get_curchannel(hw, ah);
  785. r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
  786. if (r) {
  787. ath_err(ath9k_hw_common(sc->sc_ah),
  788. "Unable to reset channel (%u MHz), reset status %d\n",
  789. channel->center_freq, r);
  790. }
  791. ath9k_hw_phy_disable(ah);
  792. ath9k_hw_configpcipowersave(ah, true);
  793. spin_unlock_bh(&sc->sc_pcu_lock);
  794. ath9k_ps_restore(sc);
  795. }
  796. int ath_reset(struct ath_softc *sc, bool retry_tx)
  797. {
  798. struct ath_hw *ah = sc->sc_ah;
  799. struct ath_common *common = ath9k_hw_common(ah);
  800. struct ieee80211_hw *hw = sc->hw;
  801. int r;
  802. sc->hw_busy_count = 0;
  803. ath9k_debug_samp_bb_mac(sc);
  804. /* Stop ANI */
  805. del_timer_sync(&common->ani.timer);
  806. ath9k_ps_wakeup(sc);
  807. ieee80211_stop_queues(hw);
  808. ath9k_hw_disable_interrupts(ah);
  809. ath_drain_all_txq(sc, retry_tx);
  810. ath_stoprecv(sc);
  811. ath_flushrecv(sc);
  812. r = ath9k_hw_reset(ah, sc->sc_ah->curchan, ah->caldata, false);
  813. if (r)
  814. ath_err(common,
  815. "Unable to reset hardware; reset status %d\n", r);
  816. if (ath_startrecv(sc) != 0)
  817. ath_err(common, "Unable to start recv logic\n");
  818. /*
  819. * We may be doing a reset in response to a request
  820. * that changes the channel so update any state that
  821. * might change as a result.
  822. */
  823. ath9k_cmn_update_txpow(ah, sc->curtxpow,
  824. sc->config.txpowlimit, &sc->curtxpow);
  825. if ((sc->sc_flags & SC_OP_BEACONS) || !(sc->sc_flags & (SC_OP_OFFCHANNEL)))
  826. ath_set_beacon(sc); /* restart beacons */
  827. ath9k_hw_set_interrupts(ah, ah->imask);
  828. ath9k_hw_enable_interrupts(ah);
  829. if (retry_tx) {
  830. int i;
  831. for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
  832. if (ATH_TXQ_SETUP(sc, i)) {
  833. spin_lock_bh(&sc->tx.txq[i].axq_lock);
  834. ath_txq_schedule(sc, &sc->tx.txq[i]);
  835. spin_unlock_bh(&sc->tx.txq[i].axq_lock);
  836. }
  837. }
  838. }
  839. ieee80211_wake_queues(hw);
  840. /* Start ANI */
  841. if (!common->disable_ani)
  842. ath_start_ani(common);
  843. ath9k_ps_restore(sc);
  844. return r;
  845. }
  846. /**********************/
  847. /* mac80211 callbacks */
  848. /**********************/
  849. static int ath9k_start(struct ieee80211_hw *hw)
  850. {
  851. struct ath_softc *sc = hw->priv;
  852. struct ath_hw *ah = sc->sc_ah;
  853. struct ath_common *common = ath9k_hw_common(ah);
  854. struct ieee80211_channel *curchan = hw->conf.channel;
  855. struct ath9k_channel *init_channel;
  856. int r;
  857. ath_dbg(common, ATH_DBG_CONFIG,
  858. "Starting driver with initial channel: %d MHz\n",
  859. curchan->center_freq);
  860. ath9k_ps_wakeup(sc);
  861. mutex_lock(&sc->mutex);
  862. /* setup initial channel */
  863. sc->chan_idx = curchan->hw_value;
  864. init_channel = ath9k_cmn_get_curchannel(hw, ah);
  865. /* Reset SERDES registers */
  866. ath9k_hw_configpcipowersave(ah, false);
  867. /*
  868. * The basic interface to setting the hardware in a good
  869. * state is ``reset''. On return the hardware is known to
  870. * be powered up and with interrupts disabled. This must
  871. * be followed by initialization of the appropriate bits
  872. * and then setup of the interrupt mask.
  873. */
  874. spin_lock_bh(&sc->sc_pcu_lock);
  875. r = ath9k_hw_reset(ah, init_channel, ah->caldata, false);
  876. if (r) {
  877. ath_err(common,
  878. "Unable to reset hardware; reset status %d (freq %u MHz)\n",
  879. r, curchan->center_freq);
  880. spin_unlock_bh(&sc->sc_pcu_lock);
  881. goto mutex_unlock;
  882. }
  883. /*
  884. * This is needed only to setup initial state
  885. * but it's best done after a reset.
  886. */
  887. ath9k_cmn_update_txpow(ah, sc->curtxpow,
  888. sc->config.txpowlimit, &sc->curtxpow);
  889. /*
  890. * Setup the hardware after reset:
  891. * The receive engine is set going.
  892. * Frame transmit is handled entirely
  893. * in the frame output path; there's nothing to do
  894. * here except setup the interrupt mask.
  895. */
  896. if (ath_startrecv(sc) != 0) {
  897. ath_err(common, "Unable to start recv logic\n");
  898. r = -EIO;
  899. spin_unlock_bh(&sc->sc_pcu_lock);
  900. goto mutex_unlock;
  901. }
  902. spin_unlock_bh(&sc->sc_pcu_lock);
  903. /* Setup our intr mask. */
  904. ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
  905. ATH9K_INT_RXORN | ATH9K_INT_FATAL |
  906. ATH9K_INT_GLOBAL;
  907. if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
  908. ah->imask |= ATH9K_INT_RXHP |
  909. ATH9K_INT_RXLP |
  910. ATH9K_INT_BB_WATCHDOG;
  911. else
  912. ah->imask |= ATH9K_INT_RX;
  913. ah->imask |= ATH9K_INT_GTT;
  914. if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
  915. ah->imask |= ATH9K_INT_CST;
  916. sc->sc_flags &= ~SC_OP_INVALID;
  917. sc->sc_ah->is_monitoring = false;
  918. /* Disable BMISS interrupt when we're not associated */
  919. ah->imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
  920. ath9k_hw_set_interrupts(ah, ah->imask);
  921. ath9k_hw_enable_interrupts(ah);
  922. ieee80211_wake_queues(hw);
  923. ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
  924. if ((ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE) &&
  925. !ah->btcoex_hw.enabled) {
  926. ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
  927. AR_STOMP_LOW_WLAN_WGHT);
  928. ath9k_hw_btcoex_enable(ah);
  929. if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
  930. ath9k_btcoex_timer_resume(sc);
  931. }
  932. if (ah->caps.pcie_lcr_extsync_en && common->bus_ops->extn_synch_en)
  933. common->bus_ops->extn_synch_en(common);
  934. mutex_unlock:
  935. mutex_unlock(&sc->mutex);
  936. ath9k_ps_restore(sc);
  937. return r;
  938. }
  939. static void ath9k_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
  940. {
  941. struct ath_softc *sc = hw->priv;
  942. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  943. struct ath_tx_control txctl;
  944. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
  945. if (sc->ps_enabled) {
  946. /*
  947. * mac80211 does not set PM field for normal data frames, so we
  948. * need to update that based on the current PS mode.
  949. */
  950. if (ieee80211_is_data(hdr->frame_control) &&
  951. !ieee80211_is_nullfunc(hdr->frame_control) &&
  952. !ieee80211_has_pm(hdr->frame_control)) {
  953. ath_dbg(common, ATH_DBG_PS,
  954. "Add PM=1 for a TX frame while in PS mode\n");
  955. hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
  956. }
  957. }
  958. if (unlikely(sc->sc_ah->power_mode != ATH9K_PM_AWAKE)) {
  959. /*
  960. * We are using PS-Poll and mac80211 can request TX while in
  961. * power save mode. Need to wake up hardware for the TX to be
  962. * completed and if needed, also for RX of buffered frames.
  963. */
  964. ath9k_ps_wakeup(sc);
  965. if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
  966. ath9k_hw_setrxabort(sc->sc_ah, 0);
  967. if (ieee80211_is_pspoll(hdr->frame_control)) {
  968. ath_dbg(common, ATH_DBG_PS,
  969. "Sending PS-Poll to pick a buffered frame\n");
  970. sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
  971. } else {
  972. ath_dbg(common, ATH_DBG_PS,
  973. "Wake up to complete TX\n");
  974. sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
  975. }
  976. /*
  977. * The actual restore operation will happen only after
  978. * the sc_flags bit is cleared. We are just dropping
  979. * the ps_usecount here.
  980. */
  981. ath9k_ps_restore(sc);
  982. }
  983. memset(&txctl, 0, sizeof(struct ath_tx_control));
  984. txctl.txq = sc->tx.txq_map[skb_get_queue_mapping(skb)];
  985. ath_dbg(common, ATH_DBG_XMIT, "transmitting packet, skb: %p\n", skb);
  986. if (ath_tx_start(hw, skb, &txctl) != 0) {
  987. ath_dbg(common, ATH_DBG_XMIT, "TX failed\n");
  988. goto exit;
  989. }
  990. return;
  991. exit:
  992. dev_kfree_skb_any(skb);
  993. }
  994. static void ath9k_stop(struct ieee80211_hw *hw)
  995. {
  996. struct ath_softc *sc = hw->priv;
  997. struct ath_hw *ah = sc->sc_ah;
  998. struct ath_common *common = ath9k_hw_common(ah);
  999. mutex_lock(&sc->mutex);
  1000. cancel_delayed_work_sync(&sc->tx_complete_work);
  1001. cancel_delayed_work_sync(&sc->hw_pll_work);
  1002. cancel_work_sync(&sc->paprd_work);
  1003. cancel_work_sync(&sc->hw_check_work);
  1004. if (sc->sc_flags & SC_OP_INVALID) {
  1005. ath_dbg(common, ATH_DBG_ANY, "Device not present\n");
  1006. mutex_unlock(&sc->mutex);
  1007. return;
  1008. }
  1009. /* Ensure HW is awake when we try to shut it down. */
  1010. ath9k_ps_wakeup(sc);
  1011. if (ah->btcoex_hw.enabled) {
  1012. ath9k_hw_btcoex_disable(ah);
  1013. if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
  1014. ath9k_btcoex_timer_pause(sc);
  1015. }
  1016. spin_lock_bh(&sc->sc_pcu_lock);
  1017. /* prevent tasklets to enable interrupts once we disable them */
  1018. ah->imask &= ~ATH9K_INT_GLOBAL;
  1019. /* make sure h/w will not generate any interrupt
  1020. * before setting the invalid flag. */
  1021. ath9k_hw_disable_interrupts(ah);
  1022. if (!(sc->sc_flags & SC_OP_INVALID)) {
  1023. ath_drain_all_txq(sc, false);
  1024. ath_stoprecv(sc);
  1025. ath9k_hw_phy_disable(ah);
  1026. } else
  1027. sc->rx.rxlink = NULL;
  1028. if (sc->rx.frag) {
  1029. dev_kfree_skb_any(sc->rx.frag);
  1030. sc->rx.frag = NULL;
  1031. }
  1032. /* disable HAL and put h/w to sleep */
  1033. ath9k_hw_disable(ah);
  1034. spin_unlock_bh(&sc->sc_pcu_lock);
  1035. /* we can now sync irq and kill any running tasklets, since we already
  1036. * disabled interrupts and not holding a spin lock */
  1037. synchronize_irq(sc->irq);
  1038. tasklet_kill(&sc->intr_tq);
  1039. tasklet_kill(&sc->bcon_tasklet);
  1040. ath9k_ps_restore(sc);
  1041. sc->ps_idle = true;
  1042. ath_radio_disable(sc, hw);
  1043. sc->sc_flags |= SC_OP_INVALID;
  1044. mutex_unlock(&sc->mutex);
  1045. ath_dbg(common, ATH_DBG_CONFIG, "Driver halt\n");
  1046. }
  1047. bool ath9k_uses_beacons(int type)
  1048. {
  1049. switch (type) {
  1050. case NL80211_IFTYPE_AP:
  1051. case NL80211_IFTYPE_ADHOC:
  1052. case NL80211_IFTYPE_MESH_POINT:
  1053. return true;
  1054. default:
  1055. return false;
  1056. }
  1057. }
  1058. static void ath9k_reclaim_beacon(struct ath_softc *sc,
  1059. struct ieee80211_vif *vif)
  1060. {
  1061. struct ath_vif *avp = (void *)vif->drv_priv;
  1062. ath9k_set_beaconing_status(sc, false);
  1063. ath_beacon_return(sc, avp);
  1064. ath9k_set_beaconing_status(sc, true);
  1065. sc->sc_flags &= ~SC_OP_BEACONS;
  1066. }
  1067. static void ath9k_vif_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
  1068. {
  1069. struct ath9k_vif_iter_data *iter_data = data;
  1070. int i;
  1071. if (iter_data->hw_macaddr)
  1072. for (i = 0; i < ETH_ALEN; i++)
  1073. iter_data->mask[i] &=
  1074. ~(iter_data->hw_macaddr[i] ^ mac[i]);
  1075. switch (vif->type) {
  1076. case NL80211_IFTYPE_AP:
  1077. iter_data->naps++;
  1078. break;
  1079. case NL80211_IFTYPE_STATION:
  1080. iter_data->nstations++;
  1081. break;
  1082. case NL80211_IFTYPE_ADHOC:
  1083. iter_data->nadhocs++;
  1084. break;
  1085. case NL80211_IFTYPE_MESH_POINT:
  1086. iter_data->nmeshes++;
  1087. break;
  1088. case NL80211_IFTYPE_WDS:
  1089. iter_data->nwds++;
  1090. break;
  1091. default:
  1092. iter_data->nothers++;
  1093. break;
  1094. }
  1095. }
  1096. /* Called with sc->mutex held. */
  1097. void ath9k_calculate_iter_data(struct ieee80211_hw *hw,
  1098. struct ieee80211_vif *vif,
  1099. struct ath9k_vif_iter_data *iter_data)
  1100. {
  1101. struct ath_softc *sc = hw->priv;
  1102. struct ath_hw *ah = sc->sc_ah;
  1103. struct ath_common *common = ath9k_hw_common(ah);
  1104. /*
  1105. * Use the hardware MAC address as reference, the hardware uses it
  1106. * together with the BSSID mask when matching addresses.
  1107. */
  1108. memset(iter_data, 0, sizeof(*iter_data));
  1109. iter_data->hw_macaddr = common->macaddr;
  1110. memset(&iter_data->mask, 0xff, ETH_ALEN);
  1111. if (vif)
  1112. ath9k_vif_iter(iter_data, vif->addr, vif);
  1113. /* Get list of all active MAC addresses */
  1114. ieee80211_iterate_active_interfaces_atomic(sc->hw, ath9k_vif_iter,
  1115. iter_data);
  1116. }
  1117. /* Called with sc->mutex held. */
  1118. static void ath9k_calculate_summary_state(struct ieee80211_hw *hw,
  1119. struct ieee80211_vif *vif)
  1120. {
  1121. struct ath_softc *sc = hw->priv;
  1122. struct ath_hw *ah = sc->sc_ah;
  1123. struct ath_common *common = ath9k_hw_common(ah);
  1124. struct ath9k_vif_iter_data iter_data;
  1125. ath9k_calculate_iter_data(hw, vif, &iter_data);
  1126. /* Set BSSID mask. */
  1127. memcpy(common->bssidmask, iter_data.mask, ETH_ALEN);
  1128. ath_hw_setbssidmask(common);
  1129. /* Set op-mode & TSF */
  1130. if (iter_data.naps > 0) {
  1131. ath9k_hw_set_tsfadjust(ah, 1);
  1132. sc->sc_flags |= SC_OP_TSF_RESET;
  1133. ah->opmode = NL80211_IFTYPE_AP;
  1134. } else {
  1135. ath9k_hw_set_tsfadjust(ah, 0);
  1136. sc->sc_flags &= ~SC_OP_TSF_RESET;
  1137. if (iter_data.nmeshes)
  1138. ah->opmode = NL80211_IFTYPE_MESH_POINT;
  1139. else if (iter_data.nwds)
  1140. ah->opmode = NL80211_IFTYPE_AP;
  1141. else if (iter_data.nadhocs)
  1142. ah->opmode = NL80211_IFTYPE_ADHOC;
  1143. else
  1144. ah->opmode = NL80211_IFTYPE_STATION;
  1145. }
  1146. /*
  1147. * Enable MIB interrupts when there are hardware phy counters.
  1148. */
  1149. if ((iter_data.nstations + iter_data.nadhocs + iter_data.nmeshes) > 0) {
  1150. if (ah->config.enable_ani)
  1151. ah->imask |= ATH9K_INT_MIB;
  1152. ah->imask |= ATH9K_INT_TSFOOR;
  1153. } else {
  1154. ah->imask &= ~ATH9K_INT_MIB;
  1155. ah->imask &= ~ATH9K_INT_TSFOOR;
  1156. }
  1157. ath9k_hw_set_interrupts(ah, ah->imask);
  1158. /* Set up ANI */
  1159. if (iter_data.naps > 0) {
  1160. sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
  1161. if (!common->disable_ani) {
  1162. sc->sc_flags |= SC_OP_ANI_RUN;
  1163. ath_start_ani(common);
  1164. }
  1165. } else {
  1166. sc->sc_flags &= ~SC_OP_ANI_RUN;
  1167. del_timer_sync(&common->ani.timer);
  1168. }
  1169. }
  1170. /* Called with sc->mutex held, vif counts set up properly. */
  1171. static void ath9k_do_vif_add_setup(struct ieee80211_hw *hw,
  1172. struct ieee80211_vif *vif)
  1173. {
  1174. struct ath_softc *sc = hw->priv;
  1175. ath9k_calculate_summary_state(hw, vif);
  1176. if (ath9k_uses_beacons(vif->type)) {
  1177. int error;
  1178. /* This may fail because upper levels do not have beacons
  1179. * properly configured yet. That's OK, we assume it
  1180. * will be properly configured and then we will be notified
  1181. * in the info_changed method and set up beacons properly
  1182. * there.
  1183. */
  1184. ath9k_set_beaconing_status(sc, false);
  1185. error = ath_beacon_alloc(sc, vif);
  1186. if (!error)
  1187. ath_beacon_config(sc, vif);
  1188. ath9k_set_beaconing_status(sc, true);
  1189. }
  1190. }
  1191. static int ath9k_add_interface(struct ieee80211_hw *hw,
  1192. struct ieee80211_vif *vif)
  1193. {
  1194. struct ath_softc *sc = hw->priv;
  1195. struct ath_hw *ah = sc->sc_ah;
  1196. struct ath_common *common = ath9k_hw_common(ah);
  1197. int ret = 0;
  1198. ath9k_ps_wakeup(sc);
  1199. mutex_lock(&sc->mutex);
  1200. switch (vif->type) {
  1201. case NL80211_IFTYPE_STATION:
  1202. case NL80211_IFTYPE_WDS:
  1203. case NL80211_IFTYPE_ADHOC:
  1204. case NL80211_IFTYPE_AP:
  1205. case NL80211_IFTYPE_MESH_POINT:
  1206. break;
  1207. default:
  1208. ath_err(common, "Interface type %d not yet supported\n",
  1209. vif->type);
  1210. ret = -EOPNOTSUPP;
  1211. goto out;
  1212. }
  1213. if (ath9k_uses_beacons(vif->type)) {
  1214. if (sc->nbcnvifs >= ATH_BCBUF) {
  1215. ath_err(common, "Not enough beacon buffers when adding"
  1216. " new interface of type: %i\n",
  1217. vif->type);
  1218. ret = -ENOBUFS;
  1219. goto out;
  1220. }
  1221. }
  1222. if ((ah->opmode == NL80211_IFTYPE_ADHOC) ||
  1223. ((vif->type == NL80211_IFTYPE_ADHOC) &&
  1224. sc->nvifs > 0)) {
  1225. ath_err(common, "Cannot create ADHOC interface when other"
  1226. " interfaces already exist.\n");
  1227. ret = -EINVAL;
  1228. goto out;
  1229. }
  1230. ath_dbg(common, ATH_DBG_CONFIG,
  1231. "Attach a VIF of type: %d\n", vif->type);
  1232. sc->nvifs++;
  1233. ath9k_do_vif_add_setup(hw, vif);
  1234. out:
  1235. mutex_unlock(&sc->mutex);
  1236. ath9k_ps_restore(sc);
  1237. return ret;
  1238. }
  1239. static int ath9k_change_interface(struct ieee80211_hw *hw,
  1240. struct ieee80211_vif *vif,
  1241. enum nl80211_iftype new_type,
  1242. bool p2p)
  1243. {
  1244. struct ath_softc *sc = hw->priv;
  1245. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1246. int ret = 0;
  1247. ath_dbg(common, ATH_DBG_CONFIG, "Change Interface\n");
  1248. mutex_lock(&sc->mutex);
  1249. ath9k_ps_wakeup(sc);
  1250. /* See if new interface type is valid. */
  1251. if ((new_type == NL80211_IFTYPE_ADHOC) &&
  1252. (sc->nvifs > 1)) {
  1253. ath_err(common, "When using ADHOC, it must be the only"
  1254. " interface.\n");
  1255. ret = -EINVAL;
  1256. goto out;
  1257. }
  1258. if (ath9k_uses_beacons(new_type) &&
  1259. !ath9k_uses_beacons(vif->type)) {
  1260. if (sc->nbcnvifs >= ATH_BCBUF) {
  1261. ath_err(common, "No beacon slot available\n");
  1262. ret = -ENOBUFS;
  1263. goto out;
  1264. }
  1265. }
  1266. /* Clean up old vif stuff */
  1267. if (ath9k_uses_beacons(vif->type))
  1268. ath9k_reclaim_beacon(sc, vif);
  1269. /* Add new settings */
  1270. vif->type = new_type;
  1271. vif->p2p = p2p;
  1272. ath9k_do_vif_add_setup(hw, vif);
  1273. out:
  1274. ath9k_ps_restore(sc);
  1275. mutex_unlock(&sc->mutex);
  1276. return ret;
  1277. }
  1278. static void ath9k_remove_interface(struct ieee80211_hw *hw,
  1279. struct ieee80211_vif *vif)
  1280. {
  1281. struct ath_softc *sc = hw->priv;
  1282. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1283. ath_dbg(common, ATH_DBG_CONFIG, "Detach Interface\n");
  1284. ath9k_ps_wakeup(sc);
  1285. mutex_lock(&sc->mutex);
  1286. sc->nvifs--;
  1287. /* Reclaim beacon resources */
  1288. if (ath9k_uses_beacons(vif->type))
  1289. ath9k_reclaim_beacon(sc, vif);
  1290. ath9k_calculate_summary_state(hw, NULL);
  1291. mutex_unlock(&sc->mutex);
  1292. ath9k_ps_restore(sc);
  1293. }
  1294. static void ath9k_enable_ps(struct ath_softc *sc)
  1295. {
  1296. struct ath_hw *ah = sc->sc_ah;
  1297. sc->ps_enabled = true;
  1298. if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
  1299. if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
  1300. ah->imask |= ATH9K_INT_TIM_TIMER;
  1301. ath9k_hw_set_interrupts(ah, ah->imask);
  1302. }
  1303. ath9k_hw_setrxabort(ah, 1);
  1304. }
  1305. }
  1306. static void ath9k_disable_ps(struct ath_softc *sc)
  1307. {
  1308. struct ath_hw *ah = sc->sc_ah;
  1309. sc->ps_enabled = false;
  1310. ath9k_hw_setpower(ah, ATH9K_PM_AWAKE);
  1311. if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
  1312. ath9k_hw_setrxabort(ah, 0);
  1313. sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
  1314. PS_WAIT_FOR_CAB |
  1315. PS_WAIT_FOR_PSPOLL_DATA |
  1316. PS_WAIT_FOR_TX_ACK);
  1317. if (ah->imask & ATH9K_INT_TIM_TIMER) {
  1318. ah->imask &= ~ATH9K_INT_TIM_TIMER;
  1319. ath9k_hw_set_interrupts(ah, ah->imask);
  1320. }
  1321. }
  1322. }
  1323. static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
  1324. {
  1325. struct ath_softc *sc = hw->priv;
  1326. struct ath_hw *ah = sc->sc_ah;
  1327. struct ath_common *common = ath9k_hw_common(ah);
  1328. struct ieee80211_conf *conf = &hw->conf;
  1329. bool disable_radio = false;
  1330. mutex_lock(&sc->mutex);
  1331. /*
  1332. * Leave this as the first check because we need to turn on the
  1333. * radio if it was disabled before prior to processing the rest
  1334. * of the changes. Likewise we must only disable the radio towards
  1335. * the end.
  1336. */
  1337. if (changed & IEEE80211_CONF_CHANGE_IDLE) {
  1338. sc->ps_idle = !!(conf->flags & IEEE80211_CONF_IDLE);
  1339. if (!sc->ps_idle) {
  1340. ath_radio_enable(sc, hw);
  1341. ath_dbg(common, ATH_DBG_CONFIG,
  1342. "not-idle: enabling radio\n");
  1343. } else {
  1344. disable_radio = true;
  1345. }
  1346. }
  1347. /*
  1348. * We just prepare to enable PS. We have to wait until our AP has
  1349. * ACK'd our null data frame to disable RX otherwise we'll ignore
  1350. * those ACKs and end up retransmitting the same null data frames.
  1351. * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
  1352. */
  1353. if (changed & IEEE80211_CONF_CHANGE_PS) {
  1354. unsigned long flags;
  1355. spin_lock_irqsave(&sc->sc_pm_lock, flags);
  1356. if (conf->flags & IEEE80211_CONF_PS)
  1357. ath9k_enable_ps(sc);
  1358. else
  1359. ath9k_disable_ps(sc);
  1360. spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  1361. }
  1362. if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
  1363. if (conf->flags & IEEE80211_CONF_MONITOR) {
  1364. ath_dbg(common, ATH_DBG_CONFIG,
  1365. "Monitor mode is enabled\n");
  1366. sc->sc_ah->is_monitoring = true;
  1367. } else {
  1368. ath_dbg(common, ATH_DBG_CONFIG,
  1369. "Monitor mode is disabled\n");
  1370. sc->sc_ah->is_monitoring = false;
  1371. }
  1372. }
  1373. if (changed & IEEE80211_CONF_CHANGE_CHANNEL) {
  1374. struct ieee80211_channel *curchan = hw->conf.channel;
  1375. struct ath9k_channel old_chan;
  1376. int pos = curchan->hw_value;
  1377. int old_pos = -1;
  1378. unsigned long flags;
  1379. if (ah->curchan)
  1380. old_pos = ah->curchan - &ah->channels[0];
  1381. if (hw->conf.flags & IEEE80211_CONF_OFFCHANNEL)
  1382. sc->sc_flags |= SC_OP_OFFCHANNEL;
  1383. else
  1384. sc->sc_flags &= ~SC_OP_OFFCHANNEL;
  1385. ath_dbg(common, ATH_DBG_CONFIG,
  1386. "Set channel: %d MHz type: %d\n",
  1387. curchan->center_freq, conf->channel_type);
  1388. /* update survey stats for the old channel before switching */
  1389. spin_lock_irqsave(&common->cc_lock, flags);
  1390. ath_update_survey_stats(sc);
  1391. spin_unlock_irqrestore(&common->cc_lock, flags);
  1392. /*
  1393. * Preserve the current channel values, before updating
  1394. * the same channel
  1395. */
  1396. if (old_pos == pos) {
  1397. memcpy(&old_chan, &sc->sc_ah->channels[pos],
  1398. sizeof(struct ath9k_channel));
  1399. ah->curchan = &old_chan;
  1400. }
  1401. ath9k_cmn_update_ichannel(&sc->sc_ah->channels[pos],
  1402. curchan, conf->channel_type);
  1403. /*
  1404. * If the operating channel changes, change the survey in-use flags
  1405. * along with it.
  1406. * Reset the survey data for the new channel, unless we're switching
  1407. * back to the operating channel from an off-channel operation.
  1408. */
  1409. if (!(hw->conf.flags & IEEE80211_CONF_OFFCHANNEL) &&
  1410. sc->cur_survey != &sc->survey[pos]) {
  1411. if (sc->cur_survey)
  1412. sc->cur_survey->filled &= ~SURVEY_INFO_IN_USE;
  1413. sc->cur_survey = &sc->survey[pos];
  1414. memset(sc->cur_survey, 0, sizeof(struct survey_info));
  1415. sc->cur_survey->filled |= SURVEY_INFO_IN_USE;
  1416. } else if (!(sc->survey[pos].filled & SURVEY_INFO_IN_USE)) {
  1417. memset(&sc->survey[pos], 0, sizeof(struct survey_info));
  1418. }
  1419. if (ath_set_channel(sc, hw, &sc->sc_ah->channels[pos]) < 0) {
  1420. ath_err(common, "Unable to set channel\n");
  1421. mutex_unlock(&sc->mutex);
  1422. return -EINVAL;
  1423. }
  1424. /*
  1425. * The most recent snapshot of channel->noisefloor for the old
  1426. * channel is only available after the hardware reset. Copy it to
  1427. * the survey stats now.
  1428. */
  1429. if (old_pos >= 0)
  1430. ath_update_survey_nf(sc, old_pos);
  1431. }
  1432. if (changed & IEEE80211_CONF_CHANGE_POWER) {
  1433. ath_dbg(common, ATH_DBG_CONFIG,
  1434. "Set power: %d\n", conf->power_level);
  1435. sc->config.txpowlimit = 2 * conf->power_level;
  1436. ath9k_ps_wakeup(sc);
  1437. ath9k_cmn_update_txpow(ah, sc->curtxpow,
  1438. sc->config.txpowlimit, &sc->curtxpow);
  1439. ath9k_ps_restore(sc);
  1440. }
  1441. if (disable_radio) {
  1442. ath_dbg(common, ATH_DBG_CONFIG, "idle: disabling radio\n");
  1443. ath_radio_disable(sc, hw);
  1444. }
  1445. mutex_unlock(&sc->mutex);
  1446. return 0;
  1447. }
  1448. #define SUPPORTED_FILTERS \
  1449. (FIF_PROMISC_IN_BSS | \
  1450. FIF_ALLMULTI | \
  1451. FIF_CONTROL | \
  1452. FIF_PSPOLL | \
  1453. FIF_OTHER_BSS | \
  1454. FIF_BCN_PRBRESP_PROMISC | \
  1455. FIF_PROBE_REQ | \
  1456. FIF_FCSFAIL)
  1457. /* FIXME: sc->sc_full_reset ? */
  1458. static void ath9k_configure_filter(struct ieee80211_hw *hw,
  1459. unsigned int changed_flags,
  1460. unsigned int *total_flags,
  1461. u64 multicast)
  1462. {
  1463. struct ath_softc *sc = hw->priv;
  1464. u32 rfilt;
  1465. changed_flags &= SUPPORTED_FILTERS;
  1466. *total_flags &= SUPPORTED_FILTERS;
  1467. sc->rx.rxfilter = *total_flags;
  1468. ath9k_ps_wakeup(sc);
  1469. rfilt = ath_calcrxfilter(sc);
  1470. ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
  1471. ath9k_ps_restore(sc);
  1472. ath_dbg(ath9k_hw_common(sc->sc_ah), ATH_DBG_CONFIG,
  1473. "Set HW RX filter: 0x%x\n", rfilt);
  1474. }
  1475. static int ath9k_sta_add(struct ieee80211_hw *hw,
  1476. struct ieee80211_vif *vif,
  1477. struct ieee80211_sta *sta)
  1478. {
  1479. struct ath_softc *sc = hw->priv;
  1480. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1481. struct ath_node *an = (struct ath_node *) sta->drv_priv;
  1482. struct ieee80211_key_conf ps_key = { };
  1483. ath_node_attach(sc, sta);
  1484. if (vif->type != NL80211_IFTYPE_AP &&
  1485. vif->type != NL80211_IFTYPE_AP_VLAN)
  1486. return 0;
  1487. an->ps_key = ath_key_config(common, vif, sta, &ps_key);
  1488. return 0;
  1489. }
  1490. static void ath9k_del_ps_key(struct ath_softc *sc,
  1491. struct ieee80211_vif *vif,
  1492. struct ieee80211_sta *sta)
  1493. {
  1494. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1495. struct ath_node *an = (struct ath_node *) sta->drv_priv;
  1496. struct ieee80211_key_conf ps_key = { .hw_key_idx = an->ps_key };
  1497. if (!an->ps_key)
  1498. return;
  1499. ath_key_delete(common, &ps_key);
  1500. }
  1501. static int ath9k_sta_remove(struct ieee80211_hw *hw,
  1502. struct ieee80211_vif *vif,
  1503. struct ieee80211_sta *sta)
  1504. {
  1505. struct ath_softc *sc = hw->priv;
  1506. ath9k_del_ps_key(sc, vif, sta);
  1507. ath_node_detach(sc, sta);
  1508. return 0;
  1509. }
  1510. static void ath9k_sta_notify(struct ieee80211_hw *hw,
  1511. struct ieee80211_vif *vif,
  1512. enum sta_notify_cmd cmd,
  1513. struct ieee80211_sta *sta)
  1514. {
  1515. struct ath_softc *sc = hw->priv;
  1516. struct ath_node *an = (struct ath_node *) sta->drv_priv;
  1517. switch (cmd) {
  1518. case STA_NOTIFY_SLEEP:
  1519. an->sleeping = true;
  1520. if (ath_tx_aggr_sleep(sc, an))
  1521. ieee80211_sta_set_tim(sta);
  1522. break;
  1523. case STA_NOTIFY_AWAKE:
  1524. an->sleeping = false;
  1525. ath_tx_aggr_wakeup(sc, an);
  1526. break;
  1527. }
  1528. }
  1529. static int ath9k_conf_tx(struct ieee80211_hw *hw, u16 queue,
  1530. const struct ieee80211_tx_queue_params *params)
  1531. {
  1532. struct ath_softc *sc = hw->priv;
  1533. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1534. struct ath_txq *txq;
  1535. struct ath9k_tx_queue_info qi;
  1536. int ret = 0;
  1537. if (queue >= WME_NUM_AC)
  1538. return 0;
  1539. txq = sc->tx.txq_map[queue];
  1540. ath9k_ps_wakeup(sc);
  1541. mutex_lock(&sc->mutex);
  1542. memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
  1543. qi.tqi_aifs = params->aifs;
  1544. qi.tqi_cwmin = params->cw_min;
  1545. qi.tqi_cwmax = params->cw_max;
  1546. qi.tqi_burstTime = params->txop;
  1547. ath_dbg(common, ATH_DBG_CONFIG,
  1548. "Configure tx [queue/halq] [%d/%d], aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
  1549. queue, txq->axq_qnum, params->aifs, params->cw_min,
  1550. params->cw_max, params->txop);
  1551. ret = ath_txq_update(sc, txq->axq_qnum, &qi);
  1552. if (ret)
  1553. ath_err(common, "TXQ Update failed\n");
  1554. if (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC)
  1555. if (queue == WME_AC_BE && !ret)
  1556. ath_beaconq_config(sc);
  1557. mutex_unlock(&sc->mutex);
  1558. ath9k_ps_restore(sc);
  1559. return ret;
  1560. }
  1561. static int ath9k_set_key(struct ieee80211_hw *hw,
  1562. enum set_key_cmd cmd,
  1563. struct ieee80211_vif *vif,
  1564. struct ieee80211_sta *sta,
  1565. struct ieee80211_key_conf *key)
  1566. {
  1567. struct ath_softc *sc = hw->priv;
  1568. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1569. int ret = 0;
  1570. if (ath9k_modparam_nohwcrypt)
  1571. return -ENOSPC;
  1572. if (vif->type == NL80211_IFTYPE_ADHOC &&
  1573. (key->cipher == WLAN_CIPHER_SUITE_TKIP ||
  1574. key->cipher == WLAN_CIPHER_SUITE_CCMP) &&
  1575. !(key->flags & IEEE80211_KEY_FLAG_PAIRWISE)) {
  1576. /*
  1577. * For now, disable hw crypto for the RSN IBSS group keys. This
  1578. * could be optimized in the future to use a modified key cache
  1579. * design to support per-STA RX GTK, but until that gets
  1580. * implemented, use of software crypto for group addressed
  1581. * frames is a acceptable to allow RSN IBSS to be used.
  1582. */
  1583. return -EOPNOTSUPP;
  1584. }
  1585. mutex_lock(&sc->mutex);
  1586. ath9k_ps_wakeup(sc);
  1587. ath_dbg(common, ATH_DBG_CONFIG, "Set HW Key\n");
  1588. switch (cmd) {
  1589. case SET_KEY:
  1590. if (sta)
  1591. ath9k_del_ps_key(sc, vif, sta);
  1592. ret = ath_key_config(common, vif, sta, key);
  1593. if (ret >= 0) {
  1594. key->hw_key_idx = ret;
  1595. /* push IV and Michael MIC generation to stack */
  1596. key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
  1597. if (key->cipher == WLAN_CIPHER_SUITE_TKIP)
  1598. key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
  1599. if (sc->sc_ah->sw_mgmt_crypto &&
  1600. key->cipher == WLAN_CIPHER_SUITE_CCMP)
  1601. key->flags |= IEEE80211_KEY_FLAG_SW_MGMT;
  1602. ret = 0;
  1603. }
  1604. break;
  1605. case DISABLE_KEY:
  1606. ath_key_delete(common, key);
  1607. break;
  1608. default:
  1609. ret = -EINVAL;
  1610. }
  1611. ath9k_ps_restore(sc);
  1612. mutex_unlock(&sc->mutex);
  1613. return ret;
  1614. }
  1615. static void ath9k_bss_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
  1616. {
  1617. struct ath_softc *sc = data;
  1618. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1619. struct ieee80211_bss_conf *bss_conf = &vif->bss_conf;
  1620. struct ath_vif *avp = (void *)vif->drv_priv;
  1621. /*
  1622. * Skip iteration if primary station vif's bss info
  1623. * was not changed
  1624. */
  1625. if (sc->sc_flags & SC_OP_PRIM_STA_VIF)
  1626. return;
  1627. if (bss_conf->assoc) {
  1628. sc->sc_flags |= SC_OP_PRIM_STA_VIF;
  1629. avp->primary_sta_vif = true;
  1630. memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
  1631. common->curaid = bss_conf->aid;
  1632. ath9k_hw_write_associd(sc->sc_ah);
  1633. ath_dbg(common, ATH_DBG_CONFIG,
  1634. "Bss Info ASSOC %d, bssid: %pM\n",
  1635. bss_conf->aid, common->curbssid);
  1636. ath_beacon_config(sc, vif);
  1637. /*
  1638. * Request a re-configuration of Beacon related timers
  1639. * on the receipt of the first Beacon frame (i.e.,
  1640. * after time sync with the AP).
  1641. */
  1642. sc->ps_flags |= PS_BEACON_SYNC | PS_WAIT_FOR_BEACON;
  1643. /* Reset rssi stats */
  1644. sc->last_rssi = ATH_RSSI_DUMMY_MARKER;
  1645. sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
  1646. if (!common->disable_ani) {
  1647. sc->sc_flags |= SC_OP_ANI_RUN;
  1648. ath_start_ani(common);
  1649. }
  1650. }
  1651. }
  1652. static void ath9k_config_bss(struct ath_softc *sc, struct ieee80211_vif *vif)
  1653. {
  1654. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1655. struct ieee80211_bss_conf *bss_conf = &vif->bss_conf;
  1656. struct ath_vif *avp = (void *)vif->drv_priv;
  1657. if (sc->sc_ah->opmode != NL80211_IFTYPE_STATION)
  1658. return;
  1659. /* Reconfigure bss info */
  1660. if (avp->primary_sta_vif && !bss_conf->assoc) {
  1661. ath_dbg(common, ATH_DBG_CONFIG,
  1662. "Bss Info DISASSOC %d, bssid %pM\n",
  1663. common->curaid, common->curbssid);
  1664. sc->sc_flags &= ~(SC_OP_PRIM_STA_VIF | SC_OP_BEACONS);
  1665. avp->primary_sta_vif = false;
  1666. memset(common->curbssid, 0, ETH_ALEN);
  1667. common->curaid = 0;
  1668. }
  1669. ieee80211_iterate_active_interfaces_atomic(
  1670. sc->hw, ath9k_bss_iter, sc);
  1671. /*
  1672. * None of station vifs are associated.
  1673. * Clear bssid & aid
  1674. */
  1675. if (!(sc->sc_flags & SC_OP_PRIM_STA_VIF)) {
  1676. ath9k_hw_write_associd(sc->sc_ah);
  1677. /* Stop ANI */
  1678. sc->sc_flags &= ~SC_OP_ANI_RUN;
  1679. del_timer_sync(&common->ani.timer);
  1680. }
  1681. }
  1682. static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
  1683. struct ieee80211_vif *vif,
  1684. struct ieee80211_bss_conf *bss_conf,
  1685. u32 changed)
  1686. {
  1687. struct ath_softc *sc = hw->priv;
  1688. struct ath_hw *ah = sc->sc_ah;
  1689. struct ath_common *common = ath9k_hw_common(ah);
  1690. struct ath_vif *avp = (void *)vif->drv_priv;
  1691. int slottime;
  1692. int error;
  1693. ath9k_ps_wakeup(sc);
  1694. mutex_lock(&sc->mutex);
  1695. if (changed & BSS_CHANGED_BSSID) {
  1696. ath9k_config_bss(sc, vif);
  1697. ath_dbg(common, ATH_DBG_CONFIG, "BSSID: %pM aid: 0x%x\n",
  1698. common->curbssid, common->curaid);
  1699. }
  1700. if (changed & BSS_CHANGED_IBSS) {
  1701. /* There can be only one vif available */
  1702. memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
  1703. common->curaid = bss_conf->aid;
  1704. ath9k_hw_write_associd(sc->sc_ah);
  1705. if (bss_conf->ibss_joined) {
  1706. sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
  1707. if (!common->disable_ani) {
  1708. sc->sc_flags |= SC_OP_ANI_RUN;
  1709. ath_start_ani(common);
  1710. }
  1711. } else {
  1712. sc->sc_flags &= ~SC_OP_ANI_RUN;
  1713. del_timer_sync(&common->ani.timer);
  1714. }
  1715. }
  1716. /* Enable transmission of beacons (AP, IBSS, MESH) */
  1717. if ((changed & BSS_CHANGED_BEACON) ||
  1718. ((changed & BSS_CHANGED_BEACON_ENABLED) && bss_conf->enable_beacon)) {
  1719. ath9k_set_beaconing_status(sc, false);
  1720. error = ath_beacon_alloc(sc, vif);
  1721. if (!error)
  1722. ath_beacon_config(sc, vif);
  1723. ath9k_set_beaconing_status(sc, true);
  1724. }
  1725. if (changed & BSS_CHANGED_ERP_SLOT) {
  1726. if (bss_conf->use_short_slot)
  1727. slottime = 9;
  1728. else
  1729. slottime = 20;
  1730. if (vif->type == NL80211_IFTYPE_AP) {
  1731. /*
  1732. * Defer update, so that connected stations can adjust
  1733. * their settings at the same time.
  1734. * See beacon.c for more details
  1735. */
  1736. sc->beacon.slottime = slottime;
  1737. sc->beacon.updateslot = UPDATE;
  1738. } else {
  1739. ah->slottime = slottime;
  1740. ath9k_hw_init_global_settings(ah);
  1741. }
  1742. }
  1743. /* Disable transmission of beacons */
  1744. if ((changed & BSS_CHANGED_BEACON_ENABLED) &&
  1745. !bss_conf->enable_beacon) {
  1746. ath9k_set_beaconing_status(sc, false);
  1747. avp->is_bslot_active = false;
  1748. ath9k_set_beaconing_status(sc, true);
  1749. }
  1750. if (changed & BSS_CHANGED_BEACON_INT) {
  1751. /*
  1752. * In case of AP mode, the HW TSF has to be reset
  1753. * when the beacon interval changes.
  1754. */
  1755. if (vif->type == NL80211_IFTYPE_AP) {
  1756. sc->sc_flags |= SC_OP_TSF_RESET;
  1757. ath9k_set_beaconing_status(sc, false);
  1758. error = ath_beacon_alloc(sc, vif);
  1759. if (!error)
  1760. ath_beacon_config(sc, vif);
  1761. ath9k_set_beaconing_status(sc, true);
  1762. } else
  1763. ath_beacon_config(sc, vif);
  1764. }
  1765. if (changed & BSS_CHANGED_ERP_PREAMBLE) {
  1766. ath_dbg(common, ATH_DBG_CONFIG, "BSS Changed PREAMBLE %d\n",
  1767. bss_conf->use_short_preamble);
  1768. if (bss_conf->use_short_preamble)
  1769. sc->sc_flags |= SC_OP_PREAMBLE_SHORT;
  1770. else
  1771. sc->sc_flags &= ~SC_OP_PREAMBLE_SHORT;
  1772. }
  1773. if (changed & BSS_CHANGED_ERP_CTS_PROT) {
  1774. ath_dbg(common, ATH_DBG_CONFIG, "BSS Changed CTS PROT %d\n",
  1775. bss_conf->use_cts_prot);
  1776. if (bss_conf->use_cts_prot &&
  1777. hw->conf.channel->band != IEEE80211_BAND_5GHZ)
  1778. sc->sc_flags |= SC_OP_PROTECT_ENABLE;
  1779. else
  1780. sc->sc_flags &= ~SC_OP_PROTECT_ENABLE;
  1781. }
  1782. mutex_unlock(&sc->mutex);
  1783. ath9k_ps_restore(sc);
  1784. }
  1785. static u64 ath9k_get_tsf(struct ieee80211_hw *hw)
  1786. {
  1787. struct ath_softc *sc = hw->priv;
  1788. u64 tsf;
  1789. mutex_lock(&sc->mutex);
  1790. ath9k_ps_wakeup(sc);
  1791. tsf = ath9k_hw_gettsf64(sc->sc_ah);
  1792. ath9k_ps_restore(sc);
  1793. mutex_unlock(&sc->mutex);
  1794. return tsf;
  1795. }
  1796. static void ath9k_set_tsf(struct ieee80211_hw *hw, u64 tsf)
  1797. {
  1798. struct ath_softc *sc = hw->priv;
  1799. mutex_lock(&sc->mutex);
  1800. ath9k_ps_wakeup(sc);
  1801. ath9k_hw_settsf64(sc->sc_ah, tsf);
  1802. ath9k_ps_restore(sc);
  1803. mutex_unlock(&sc->mutex);
  1804. }
  1805. static void ath9k_reset_tsf(struct ieee80211_hw *hw)
  1806. {
  1807. struct ath_softc *sc = hw->priv;
  1808. mutex_lock(&sc->mutex);
  1809. ath9k_ps_wakeup(sc);
  1810. ath9k_hw_reset_tsf(sc->sc_ah);
  1811. ath9k_ps_restore(sc);
  1812. mutex_unlock(&sc->mutex);
  1813. }
  1814. static int ath9k_ampdu_action(struct ieee80211_hw *hw,
  1815. struct ieee80211_vif *vif,
  1816. enum ieee80211_ampdu_mlme_action action,
  1817. struct ieee80211_sta *sta,
  1818. u16 tid, u16 *ssn, u8 buf_size)
  1819. {
  1820. struct ath_softc *sc = hw->priv;
  1821. int ret = 0;
  1822. local_bh_disable();
  1823. switch (action) {
  1824. case IEEE80211_AMPDU_RX_START:
  1825. if (!(sc->sc_flags & SC_OP_RXAGGR))
  1826. ret = -ENOTSUPP;
  1827. break;
  1828. case IEEE80211_AMPDU_RX_STOP:
  1829. break;
  1830. case IEEE80211_AMPDU_TX_START:
  1831. if (!(sc->sc_flags & SC_OP_TXAGGR))
  1832. return -EOPNOTSUPP;
  1833. ath9k_ps_wakeup(sc);
  1834. ret = ath_tx_aggr_start(sc, sta, tid, ssn);
  1835. if (!ret)
  1836. ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
  1837. ath9k_ps_restore(sc);
  1838. break;
  1839. case IEEE80211_AMPDU_TX_STOP:
  1840. ath9k_ps_wakeup(sc);
  1841. ath_tx_aggr_stop(sc, sta, tid);
  1842. ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
  1843. ath9k_ps_restore(sc);
  1844. break;
  1845. case IEEE80211_AMPDU_TX_OPERATIONAL:
  1846. ath9k_ps_wakeup(sc);
  1847. ath_tx_aggr_resume(sc, sta, tid);
  1848. ath9k_ps_restore(sc);
  1849. break;
  1850. default:
  1851. ath_err(ath9k_hw_common(sc->sc_ah), "Unknown AMPDU action\n");
  1852. }
  1853. local_bh_enable();
  1854. return ret;
  1855. }
  1856. static int ath9k_get_survey(struct ieee80211_hw *hw, int idx,
  1857. struct survey_info *survey)
  1858. {
  1859. struct ath_softc *sc = hw->priv;
  1860. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1861. struct ieee80211_supported_band *sband;
  1862. struct ieee80211_channel *chan;
  1863. unsigned long flags;
  1864. int pos;
  1865. spin_lock_irqsave(&common->cc_lock, flags);
  1866. if (idx == 0)
  1867. ath_update_survey_stats(sc);
  1868. sband = hw->wiphy->bands[IEEE80211_BAND_2GHZ];
  1869. if (sband && idx >= sband->n_channels) {
  1870. idx -= sband->n_channels;
  1871. sband = NULL;
  1872. }
  1873. if (!sband)
  1874. sband = hw->wiphy->bands[IEEE80211_BAND_5GHZ];
  1875. if (!sband || idx >= sband->n_channels) {
  1876. spin_unlock_irqrestore(&common->cc_lock, flags);
  1877. return -ENOENT;
  1878. }
  1879. chan = &sband->channels[idx];
  1880. pos = chan->hw_value;
  1881. memcpy(survey, &sc->survey[pos], sizeof(*survey));
  1882. survey->channel = chan;
  1883. spin_unlock_irqrestore(&common->cc_lock, flags);
  1884. return 0;
  1885. }
  1886. static void ath9k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class)
  1887. {
  1888. struct ath_softc *sc = hw->priv;
  1889. struct ath_hw *ah = sc->sc_ah;
  1890. mutex_lock(&sc->mutex);
  1891. ah->coverage_class = coverage_class;
  1892. ath9k_hw_init_global_settings(ah);
  1893. mutex_unlock(&sc->mutex);
  1894. }
  1895. static void ath9k_flush(struct ieee80211_hw *hw, bool drop)
  1896. {
  1897. struct ath_softc *sc = hw->priv;
  1898. struct ath_hw *ah = sc->sc_ah;
  1899. struct ath_common *common = ath9k_hw_common(ah);
  1900. int timeout = 200; /* ms */
  1901. int i, j;
  1902. bool drain_txq;
  1903. mutex_lock(&sc->mutex);
  1904. cancel_delayed_work_sync(&sc->tx_complete_work);
  1905. if (sc->sc_flags & SC_OP_INVALID) {
  1906. ath_dbg(common, ATH_DBG_ANY, "Device not present\n");
  1907. mutex_unlock(&sc->mutex);
  1908. return;
  1909. }
  1910. if (drop)
  1911. timeout = 1;
  1912. for (j = 0; j < timeout; j++) {
  1913. bool npend = false;
  1914. if (j)
  1915. usleep_range(1000, 2000);
  1916. for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
  1917. if (!ATH_TXQ_SETUP(sc, i))
  1918. continue;
  1919. npend = ath9k_has_pending_frames(sc, &sc->tx.txq[i]);
  1920. if (npend)
  1921. break;
  1922. }
  1923. if (!npend)
  1924. goto out;
  1925. }
  1926. ath9k_ps_wakeup(sc);
  1927. spin_lock_bh(&sc->sc_pcu_lock);
  1928. drain_txq = ath_drain_all_txq(sc, false);
  1929. if (!drain_txq)
  1930. ath_reset(sc, false);
  1931. spin_unlock_bh(&sc->sc_pcu_lock);
  1932. ath9k_ps_restore(sc);
  1933. ieee80211_wake_queues(hw);
  1934. out:
  1935. ieee80211_queue_delayed_work(hw, &sc->tx_complete_work, 0);
  1936. mutex_unlock(&sc->mutex);
  1937. }
  1938. static bool ath9k_tx_frames_pending(struct ieee80211_hw *hw)
  1939. {
  1940. struct ath_softc *sc = hw->priv;
  1941. int i;
  1942. for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
  1943. if (!ATH_TXQ_SETUP(sc, i))
  1944. continue;
  1945. if (ath9k_has_pending_frames(sc, &sc->tx.txq[i]))
  1946. return true;
  1947. }
  1948. return false;
  1949. }
  1950. static int ath9k_tx_last_beacon(struct ieee80211_hw *hw)
  1951. {
  1952. struct ath_softc *sc = hw->priv;
  1953. struct ath_hw *ah = sc->sc_ah;
  1954. struct ieee80211_vif *vif;
  1955. struct ath_vif *avp;
  1956. struct ath_buf *bf;
  1957. struct ath_tx_status ts;
  1958. int status;
  1959. vif = sc->beacon.bslot[0];
  1960. if (!vif)
  1961. return 0;
  1962. avp = (void *)vif->drv_priv;
  1963. if (!avp->is_bslot_active)
  1964. return 0;
  1965. if (!sc->beacon.tx_processed) {
  1966. tasklet_disable(&sc->bcon_tasklet);
  1967. bf = avp->av_bcbuf;
  1968. if (!bf || !bf->bf_mpdu)
  1969. goto skip;
  1970. status = ath9k_hw_txprocdesc(ah, bf->bf_desc, &ts);
  1971. if (status == -EINPROGRESS)
  1972. goto skip;
  1973. sc->beacon.tx_processed = true;
  1974. sc->beacon.tx_last = !(ts.ts_status & ATH9K_TXERR_MASK);
  1975. skip:
  1976. tasklet_enable(&sc->bcon_tasklet);
  1977. }
  1978. return sc->beacon.tx_last;
  1979. }
  1980. static int ath9k_get_stats(struct ieee80211_hw *hw,
  1981. struct ieee80211_low_level_stats *stats)
  1982. {
  1983. struct ath_softc *sc = hw->priv;
  1984. struct ath_hw *ah = sc->sc_ah;
  1985. struct ath9k_mib_stats *mib_stats = &ah->ah_mibStats;
  1986. stats->dot11ACKFailureCount = mib_stats->ackrcv_bad;
  1987. stats->dot11RTSFailureCount = mib_stats->rts_bad;
  1988. stats->dot11FCSErrorCount = mib_stats->fcs_bad;
  1989. stats->dot11RTSSuccessCount = mib_stats->rts_good;
  1990. return 0;
  1991. }
  1992. struct ieee80211_ops ath9k_ops = {
  1993. .tx = ath9k_tx,
  1994. .start = ath9k_start,
  1995. .stop = ath9k_stop,
  1996. .add_interface = ath9k_add_interface,
  1997. .change_interface = ath9k_change_interface,
  1998. .remove_interface = ath9k_remove_interface,
  1999. .config = ath9k_config,
  2000. .configure_filter = ath9k_configure_filter,
  2001. .sta_add = ath9k_sta_add,
  2002. .sta_remove = ath9k_sta_remove,
  2003. .sta_notify = ath9k_sta_notify,
  2004. .conf_tx = ath9k_conf_tx,
  2005. .bss_info_changed = ath9k_bss_info_changed,
  2006. .set_key = ath9k_set_key,
  2007. .get_tsf = ath9k_get_tsf,
  2008. .set_tsf = ath9k_set_tsf,
  2009. .reset_tsf = ath9k_reset_tsf,
  2010. .ampdu_action = ath9k_ampdu_action,
  2011. .get_survey = ath9k_get_survey,
  2012. .rfkill_poll = ath9k_rfkill_poll_state,
  2013. .set_coverage_class = ath9k_set_coverage_class,
  2014. .flush = ath9k_flush,
  2015. .tx_frames_pending = ath9k_tx_frames_pending,
  2016. .tx_last_beacon = ath9k_tx_last_beacon,
  2017. .get_stats = ath9k_get_stats,
  2018. };