iwl4965-base.c 255 KB

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  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2003 - 2007 Intel Corporation. All rights reserved.
  4. *
  5. * Portions of this file are derived from the ipw3945 project, as well
  6. * as portions of the ieee80211 subsystem header files.
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms of version 2 of the GNU General Public License as
  10. * published by the Free Software Foundation.
  11. *
  12. * This program is distributed in the hope that it will be useful, but WITHOUT
  13. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  15. * more details.
  16. *
  17. * You should have received a copy of the GNU General Public License along with
  18. * this program; if not, write to the Free Software Foundation, Inc.,
  19. * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  20. *
  21. * The full GNU General Public License is included in this distribution in the
  22. * file called LICENSE.
  23. *
  24. * Contact Information:
  25. * James P. Ketrenos <ipw2100-admin@linux.intel.com>
  26. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27. *
  28. *****************************************************************************/
  29. /*
  30. * NOTE: This file (iwl-base.c) is used to build to multiple hardware targets
  31. * by defining IWL to either 3945 or 4965. The Makefile used when building
  32. * the base targets will create base-3945.o and base-4965.o
  33. *
  34. * The eventual goal is to move as many of the #if IWL / #endif blocks out of
  35. * this file and into the hardware specific implementation files (iwl-XXXX.c)
  36. * and leave only the common (non #ifdef sprinkled) code in this file
  37. */
  38. #include <linux/kernel.h>
  39. #include <linux/module.h>
  40. #include <linux/version.h>
  41. #include <linux/init.h>
  42. #include <linux/pci.h>
  43. #include <linux/dma-mapping.h>
  44. #include <linux/delay.h>
  45. #include <linux/skbuff.h>
  46. #include <linux/netdevice.h>
  47. #include <linux/wireless.h>
  48. #include <linux/firmware.h>
  49. #include <linux/skbuff.h>
  50. #include <linux/netdevice.h>
  51. #include <linux/etherdevice.h>
  52. #include <linux/if_arp.h>
  53. #include <net/ieee80211_radiotap.h>
  54. #include <net/mac80211.h>
  55. #include <asm/div64.h>
  56. #include "iwlwifi.h"
  57. #include "iwl-4965.h"
  58. #include "iwl-helpers.h"
  59. #ifdef CONFIG_IWLWIFI_DEBUG
  60. u32 iwl_debug_level;
  61. #endif
  62. /******************************************************************************
  63. *
  64. * module boiler plate
  65. *
  66. ******************************************************************************/
  67. /* module parameters */
  68. int iwl_param_disable_hw_scan;
  69. int iwl_param_debug;
  70. int iwl_param_disable; /* def: enable radio */
  71. int iwl_param_antenna; /* def: 0 = both antennas (use diversity) */
  72. int iwl_param_hwcrypto; /* def: using software encryption */
  73. int iwl_param_qos_enable = 1;
  74. int iwl_param_queues_num = IWL_MAX_NUM_QUEUES;
  75. /*
  76. * module name, copyright, version, etc.
  77. * NOTE: DRV_NAME is defined in iwlwifi.h for use by iwl-debug.h and printk
  78. */
  79. #define DRV_DESCRIPTION "Intel(R) Wireless WiFi Link 4965AGN driver for Linux"
  80. #ifdef CONFIG_IWLWIFI_DEBUG
  81. #define VD "d"
  82. #else
  83. #define VD
  84. #endif
  85. #ifdef CONFIG_IWLWIFI_SPECTRUM_MEASUREMENT
  86. #define VS "s"
  87. #else
  88. #define VS
  89. #endif
  90. #define IWLWIFI_VERSION "0.1.15k" VD VS
  91. #define DRV_COPYRIGHT "Copyright(c) 2003-2007 Intel Corporation"
  92. #define DRV_VERSION IWLWIFI_VERSION
  93. /* Change firmware file name, using "-" and incrementing number,
  94. * *only* when uCode interface or architecture changes so that it
  95. * is not compatible with earlier drivers.
  96. * This number will also appear in << 8 position of 1st dword of uCode file */
  97. #define IWL4965_UCODE_API "-1"
  98. MODULE_DESCRIPTION(DRV_DESCRIPTION);
  99. MODULE_VERSION(DRV_VERSION);
  100. MODULE_AUTHOR(DRV_COPYRIGHT);
  101. MODULE_LICENSE("GPL");
  102. __le16 *ieee80211_get_qos_ctrl(struct ieee80211_hdr *hdr)
  103. {
  104. u16 fc = le16_to_cpu(hdr->frame_control);
  105. int hdr_len = ieee80211_get_hdrlen(fc);
  106. if ((fc & 0x00cc) == (IEEE80211_STYPE_QOS_DATA | IEEE80211_FTYPE_DATA))
  107. return (__le16 *) ((u8 *) hdr + hdr_len - QOS_CONTROL_LEN);
  108. return NULL;
  109. }
  110. static const struct ieee80211_hw_mode *iwl_get_hw_mode(
  111. struct iwl_priv *priv, int mode)
  112. {
  113. int i;
  114. for (i = 0; i < 3; i++)
  115. if (priv->modes[i].mode == mode)
  116. return &priv->modes[i];
  117. return NULL;
  118. }
  119. static int iwl_is_empty_essid(const char *essid, int essid_len)
  120. {
  121. /* Single white space is for Linksys APs */
  122. if (essid_len == 1 && essid[0] == ' ')
  123. return 1;
  124. /* Otherwise, if the entire essid is 0, we assume it is hidden */
  125. while (essid_len) {
  126. essid_len--;
  127. if (essid[essid_len] != '\0')
  128. return 0;
  129. }
  130. return 1;
  131. }
  132. static const char *iwl_escape_essid(const char *essid, u8 essid_len)
  133. {
  134. static char escaped[IW_ESSID_MAX_SIZE * 2 + 1];
  135. const char *s = essid;
  136. char *d = escaped;
  137. if (iwl_is_empty_essid(essid, essid_len)) {
  138. memcpy(escaped, "<hidden>", sizeof("<hidden>"));
  139. return escaped;
  140. }
  141. essid_len = min(essid_len, (u8) IW_ESSID_MAX_SIZE);
  142. while (essid_len--) {
  143. if (*s == '\0') {
  144. *d++ = '\\';
  145. *d++ = '0';
  146. s++;
  147. } else
  148. *d++ = *s++;
  149. }
  150. *d = '\0';
  151. return escaped;
  152. }
  153. static void iwl_print_hex_dump(int level, void *p, u32 len)
  154. {
  155. #ifdef CONFIG_IWLWIFI_DEBUG
  156. if (!(iwl_debug_level & level))
  157. return;
  158. print_hex_dump(KERN_DEBUG, "iwl data: ", DUMP_PREFIX_OFFSET, 16, 1,
  159. p, len, 1);
  160. #endif
  161. }
  162. /*************** DMA-QUEUE-GENERAL-FUNCTIONS *****
  163. * DMA services
  164. *
  165. * Theory of operation
  166. *
  167. * A queue is a circular buffers with 'Read' and 'Write' pointers.
  168. * 2 empty entries always kept in the buffer to protect from overflow.
  169. *
  170. * For Tx queue, there are low mark and high mark limits. If, after queuing
  171. * the packet for Tx, free space become < low mark, Tx queue stopped. When
  172. * reclaiming packets (on 'tx done IRQ), if free space become > high mark,
  173. * Tx queue resumed.
  174. *
  175. * The IPW operates with six queues, one receive queue in the device's
  176. * sram, one transmit queue for sending commands to the device firmware,
  177. * and four transmit queues for data.
  178. ***************************************************/
  179. static int iwl_queue_space(const struct iwl_queue *q)
  180. {
  181. int s = q->last_used - q->first_empty;
  182. if (q->last_used > q->first_empty)
  183. s -= q->n_bd;
  184. if (s <= 0)
  185. s += q->n_window;
  186. /* keep some reserve to not confuse empty and full situations */
  187. s -= 2;
  188. if (s < 0)
  189. s = 0;
  190. return s;
  191. }
  192. /* XXX: n_bd must be power-of-two size */
  193. static inline int iwl_queue_inc_wrap(int index, int n_bd)
  194. {
  195. return ++index & (n_bd - 1);
  196. }
  197. /* XXX: n_bd must be power-of-two size */
  198. static inline int iwl_queue_dec_wrap(int index, int n_bd)
  199. {
  200. return --index & (n_bd - 1);
  201. }
  202. static inline int x2_queue_used(const struct iwl_queue *q, int i)
  203. {
  204. return q->first_empty > q->last_used ?
  205. (i >= q->last_used && i < q->first_empty) :
  206. !(i < q->last_used && i >= q->first_empty);
  207. }
  208. static inline u8 get_cmd_index(struct iwl_queue *q, u32 index, int is_huge)
  209. {
  210. if (is_huge)
  211. return q->n_window;
  212. return index & (q->n_window - 1);
  213. }
  214. static int iwl_queue_init(struct iwl_priv *priv, struct iwl_queue *q,
  215. int count, int slots_num, u32 id)
  216. {
  217. q->n_bd = count;
  218. q->n_window = slots_num;
  219. q->id = id;
  220. /* count must be power-of-two size, otherwise iwl_queue_inc_wrap
  221. * and iwl_queue_dec_wrap are broken. */
  222. BUG_ON(!is_power_of_2(count));
  223. /* slots_num must be power-of-two size, otherwise
  224. * get_cmd_index is broken. */
  225. BUG_ON(!is_power_of_2(slots_num));
  226. q->low_mark = q->n_window / 4;
  227. if (q->low_mark < 4)
  228. q->low_mark = 4;
  229. q->high_mark = q->n_window / 8;
  230. if (q->high_mark < 2)
  231. q->high_mark = 2;
  232. q->first_empty = q->last_used = 0;
  233. return 0;
  234. }
  235. static int iwl_tx_queue_alloc(struct iwl_priv *priv,
  236. struct iwl_tx_queue *txq, u32 id)
  237. {
  238. struct pci_dev *dev = priv->pci_dev;
  239. if (id != IWL_CMD_QUEUE_NUM) {
  240. txq->txb = kmalloc(sizeof(txq->txb[0]) *
  241. TFD_QUEUE_SIZE_MAX, GFP_KERNEL);
  242. if (!txq->txb) {
  243. IWL_ERROR("kmalloc for auxilary BD "
  244. "structures failed\n");
  245. goto error;
  246. }
  247. } else
  248. txq->txb = NULL;
  249. txq->bd = pci_alloc_consistent(dev,
  250. sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX,
  251. &txq->q.dma_addr);
  252. if (!txq->bd) {
  253. IWL_ERROR("pci_alloc_consistent(%zd) failed\n",
  254. sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX);
  255. goto error;
  256. }
  257. txq->q.id = id;
  258. return 0;
  259. error:
  260. if (txq->txb) {
  261. kfree(txq->txb);
  262. txq->txb = NULL;
  263. }
  264. return -ENOMEM;
  265. }
  266. int iwl_tx_queue_init(struct iwl_priv *priv,
  267. struct iwl_tx_queue *txq, int slots_num, u32 txq_id)
  268. {
  269. struct pci_dev *dev = priv->pci_dev;
  270. int len;
  271. int rc = 0;
  272. /* alocate command space + one big command for scan since scan
  273. * command is very huge the system will not have two scan at the
  274. * same time */
  275. len = sizeof(struct iwl_cmd) * slots_num;
  276. if (txq_id == IWL_CMD_QUEUE_NUM)
  277. len += IWL_MAX_SCAN_SIZE;
  278. txq->cmd = pci_alloc_consistent(dev, len, &txq->dma_addr_cmd);
  279. if (!txq->cmd)
  280. return -ENOMEM;
  281. rc = iwl_tx_queue_alloc(priv, txq, txq_id);
  282. if (rc) {
  283. pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
  284. return -ENOMEM;
  285. }
  286. txq->need_update = 0;
  287. /* TFD_QUEUE_SIZE_MAX must be power-of-two size, otherwise
  288. * iwl_queue_inc_wrap and iwl_queue_dec_wrap are broken. */
  289. BUILD_BUG_ON(TFD_QUEUE_SIZE_MAX & (TFD_QUEUE_SIZE_MAX - 1));
  290. iwl_queue_init(priv, &txq->q, TFD_QUEUE_SIZE_MAX, slots_num, txq_id);
  291. iwl_hw_tx_queue_init(priv, txq);
  292. return 0;
  293. }
  294. /**
  295. * iwl_tx_queue_free - Deallocate DMA queue.
  296. * @txq: Transmit queue to deallocate.
  297. *
  298. * Empty queue by removing and destroying all BD's.
  299. * Free all buffers. txq itself is not freed.
  300. *
  301. */
  302. void iwl_tx_queue_free(struct iwl_priv *priv, struct iwl_tx_queue *txq)
  303. {
  304. struct iwl_queue *q = &txq->q;
  305. struct pci_dev *dev = priv->pci_dev;
  306. int len;
  307. if (q->n_bd == 0)
  308. return;
  309. /* first, empty all BD's */
  310. for (; q->first_empty != q->last_used;
  311. q->last_used = iwl_queue_inc_wrap(q->last_used, q->n_bd))
  312. iwl_hw_txq_free_tfd(priv, txq);
  313. len = sizeof(struct iwl_cmd) * q->n_window;
  314. if (q->id == IWL_CMD_QUEUE_NUM)
  315. len += IWL_MAX_SCAN_SIZE;
  316. pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
  317. /* free buffers belonging to queue itself */
  318. if (txq->q.n_bd)
  319. pci_free_consistent(dev, sizeof(struct iwl_tfd_frame) *
  320. txq->q.n_bd, txq->bd, txq->q.dma_addr);
  321. if (txq->txb) {
  322. kfree(txq->txb);
  323. txq->txb = NULL;
  324. }
  325. /* 0 fill whole structure */
  326. memset(txq, 0, sizeof(*txq));
  327. }
  328. const u8 BROADCAST_ADDR[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
  329. /*************** STATION TABLE MANAGEMENT ****
  330. *
  331. * NOTE: This needs to be overhauled to better synchronize between
  332. * how the iwl-4965.c is using iwl_hw_find_station vs. iwl-3945.c
  333. *
  334. * mac80211 should also be examined to determine if sta_info is duplicating
  335. * the functionality provided here
  336. */
  337. /**************************************************************/
  338. static u8 iwl_remove_station(struct iwl_priv *priv, const u8 *addr, int is_ap)
  339. {
  340. int index = IWL_INVALID_STATION;
  341. int i;
  342. unsigned long flags;
  343. spin_lock_irqsave(&priv->sta_lock, flags);
  344. if (is_ap)
  345. index = IWL_AP_ID;
  346. else if (is_broadcast_ether_addr(addr))
  347. index = priv->hw_setting.bcast_sta_id;
  348. else
  349. for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++)
  350. if (priv->stations[i].used &&
  351. !compare_ether_addr(priv->stations[i].sta.sta.addr,
  352. addr)) {
  353. index = i;
  354. break;
  355. }
  356. if (unlikely(index == IWL_INVALID_STATION))
  357. goto out;
  358. if (priv->stations[index].used) {
  359. priv->stations[index].used = 0;
  360. priv->num_stations--;
  361. }
  362. BUG_ON(priv->num_stations < 0);
  363. out:
  364. spin_unlock_irqrestore(&priv->sta_lock, flags);
  365. return 0;
  366. }
  367. static void iwl_clear_stations_table(struct iwl_priv *priv)
  368. {
  369. unsigned long flags;
  370. spin_lock_irqsave(&priv->sta_lock, flags);
  371. priv->num_stations = 0;
  372. memset(priv->stations, 0, sizeof(priv->stations));
  373. spin_unlock_irqrestore(&priv->sta_lock, flags);
  374. }
  375. u8 iwl_add_station(struct iwl_priv *priv, const u8 *addr, int is_ap, u8 flags)
  376. {
  377. int i;
  378. int index = IWL_INVALID_STATION;
  379. struct iwl_station_entry *station;
  380. unsigned long flags_spin;
  381. spin_lock_irqsave(&priv->sta_lock, flags_spin);
  382. if (is_ap)
  383. index = IWL_AP_ID;
  384. else if (is_broadcast_ether_addr(addr))
  385. index = priv->hw_setting.bcast_sta_id;
  386. else
  387. for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++) {
  388. if (!compare_ether_addr(priv->stations[i].sta.sta.addr,
  389. addr)) {
  390. index = i;
  391. break;
  392. }
  393. if (!priv->stations[i].used &&
  394. index == IWL_INVALID_STATION)
  395. index = i;
  396. }
  397. /* These twh conditions has the same outcome but keep them separate
  398. since they have different meaning */
  399. if (unlikely(index == IWL_INVALID_STATION)) {
  400. spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
  401. return index;
  402. }
  403. if (priv->stations[index].used &&
  404. !compare_ether_addr(priv->stations[index].sta.sta.addr, addr)) {
  405. spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
  406. return index;
  407. }
  408. IWL_DEBUG_ASSOC("Add STA ID %d: " MAC_FMT "\n", index, MAC_ARG(addr));
  409. station = &priv->stations[index];
  410. station->used = 1;
  411. priv->num_stations++;
  412. memset(&station->sta, 0, sizeof(struct iwl_addsta_cmd));
  413. memcpy(station->sta.sta.addr, addr, ETH_ALEN);
  414. station->sta.mode = 0;
  415. station->sta.sta.sta_id = index;
  416. station->sta.station_flags = 0;
  417. #ifdef CONFIG_IWLWIFI_HT
  418. /* BCAST station and IBSS stations do not work in HT mode */
  419. if (index != priv->hw_setting.bcast_sta_id &&
  420. priv->iw_mode != IEEE80211_IF_TYPE_IBSS)
  421. iwl4965_set_ht_add_station(priv, index);
  422. #endif /*CONFIG_IWLWIFI_HT*/
  423. spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
  424. iwl_send_add_station(priv, &station->sta, flags);
  425. return index;
  426. }
  427. /*************** DRIVER STATUS FUNCTIONS *****/
  428. static inline int iwl_is_ready(struct iwl_priv *priv)
  429. {
  430. /* The adapter is 'ready' if READY and GEO_CONFIGURED bits are
  431. * set but EXIT_PENDING is not */
  432. return test_bit(STATUS_READY, &priv->status) &&
  433. test_bit(STATUS_GEO_CONFIGURED, &priv->status) &&
  434. !test_bit(STATUS_EXIT_PENDING, &priv->status);
  435. }
  436. static inline int iwl_is_alive(struct iwl_priv *priv)
  437. {
  438. return test_bit(STATUS_ALIVE, &priv->status);
  439. }
  440. static inline int iwl_is_init(struct iwl_priv *priv)
  441. {
  442. return test_bit(STATUS_INIT, &priv->status);
  443. }
  444. static inline int iwl_is_rfkill(struct iwl_priv *priv)
  445. {
  446. return test_bit(STATUS_RF_KILL_HW, &priv->status) ||
  447. test_bit(STATUS_RF_KILL_SW, &priv->status);
  448. }
  449. static inline int iwl_is_ready_rf(struct iwl_priv *priv)
  450. {
  451. if (iwl_is_rfkill(priv))
  452. return 0;
  453. return iwl_is_ready(priv);
  454. }
  455. /*************** HOST COMMAND QUEUE FUNCTIONS *****/
  456. #define IWL_CMD(x) case x : return #x
  457. static const char *get_cmd_string(u8 cmd)
  458. {
  459. switch (cmd) {
  460. IWL_CMD(REPLY_ALIVE);
  461. IWL_CMD(REPLY_ERROR);
  462. IWL_CMD(REPLY_RXON);
  463. IWL_CMD(REPLY_RXON_ASSOC);
  464. IWL_CMD(REPLY_QOS_PARAM);
  465. IWL_CMD(REPLY_RXON_TIMING);
  466. IWL_CMD(REPLY_ADD_STA);
  467. IWL_CMD(REPLY_REMOVE_STA);
  468. IWL_CMD(REPLY_REMOVE_ALL_STA);
  469. IWL_CMD(REPLY_TX);
  470. IWL_CMD(REPLY_RATE_SCALE);
  471. IWL_CMD(REPLY_LEDS_CMD);
  472. IWL_CMD(REPLY_TX_LINK_QUALITY_CMD);
  473. IWL_CMD(RADAR_NOTIFICATION);
  474. IWL_CMD(REPLY_QUIET_CMD);
  475. IWL_CMD(REPLY_CHANNEL_SWITCH);
  476. IWL_CMD(CHANNEL_SWITCH_NOTIFICATION);
  477. IWL_CMD(REPLY_SPECTRUM_MEASUREMENT_CMD);
  478. IWL_CMD(SPECTRUM_MEASURE_NOTIFICATION);
  479. IWL_CMD(POWER_TABLE_CMD);
  480. IWL_CMD(PM_SLEEP_NOTIFICATION);
  481. IWL_CMD(PM_DEBUG_STATISTIC_NOTIFIC);
  482. IWL_CMD(REPLY_SCAN_CMD);
  483. IWL_CMD(REPLY_SCAN_ABORT_CMD);
  484. IWL_CMD(SCAN_START_NOTIFICATION);
  485. IWL_CMD(SCAN_RESULTS_NOTIFICATION);
  486. IWL_CMD(SCAN_COMPLETE_NOTIFICATION);
  487. IWL_CMD(BEACON_NOTIFICATION);
  488. IWL_CMD(REPLY_TX_BEACON);
  489. IWL_CMD(WHO_IS_AWAKE_NOTIFICATION);
  490. IWL_CMD(QUIET_NOTIFICATION);
  491. IWL_CMD(REPLY_TX_PWR_TABLE_CMD);
  492. IWL_CMD(MEASURE_ABORT_NOTIFICATION);
  493. IWL_CMD(REPLY_BT_CONFIG);
  494. IWL_CMD(REPLY_STATISTICS_CMD);
  495. IWL_CMD(STATISTICS_NOTIFICATION);
  496. IWL_CMD(REPLY_CARD_STATE_CMD);
  497. IWL_CMD(CARD_STATE_NOTIFICATION);
  498. IWL_CMD(MISSED_BEACONS_NOTIFICATION);
  499. IWL_CMD(REPLY_CT_KILL_CONFIG_CMD);
  500. IWL_CMD(SENSITIVITY_CMD);
  501. IWL_CMD(REPLY_PHY_CALIBRATION_CMD);
  502. IWL_CMD(REPLY_RX_PHY_CMD);
  503. IWL_CMD(REPLY_RX_MPDU_CMD);
  504. IWL_CMD(REPLY_4965_RX);
  505. IWL_CMD(REPLY_COMPRESSED_BA);
  506. default:
  507. return "UNKNOWN";
  508. }
  509. }
  510. #define HOST_COMPLETE_TIMEOUT (HZ / 2)
  511. /**
  512. * iwl_enqueue_hcmd - enqueue a uCode command
  513. * @priv: device private data point
  514. * @cmd: a point to the ucode command structure
  515. *
  516. * The function returns < 0 values to indicate the operation is
  517. * failed. On success, it turns the index (> 0) of command in the
  518. * command queue.
  519. */
  520. static int iwl_enqueue_hcmd(struct iwl_priv *priv, struct iwl_host_cmd *cmd)
  521. {
  522. struct iwl_tx_queue *txq = &priv->txq[IWL_CMD_QUEUE_NUM];
  523. struct iwl_queue *q = &txq->q;
  524. struct iwl_tfd_frame *tfd;
  525. u32 *control_flags;
  526. struct iwl_cmd *out_cmd;
  527. u32 idx;
  528. u16 fix_size = (u16)(cmd->len + sizeof(out_cmd->hdr));
  529. dma_addr_t phys_addr;
  530. int ret;
  531. unsigned long flags;
  532. /* If any of the command structures end up being larger than
  533. * the TFD_MAX_PAYLOAD_SIZE, and it sent as a 'small' command then
  534. * we will need to increase the size of the TFD entries */
  535. BUG_ON((fix_size > TFD_MAX_PAYLOAD_SIZE) &&
  536. !(cmd->meta.flags & CMD_SIZE_HUGE));
  537. if (iwl_queue_space(q) < ((cmd->meta.flags & CMD_ASYNC) ? 2 : 1)) {
  538. IWL_ERROR("No space for Tx\n");
  539. return -ENOSPC;
  540. }
  541. spin_lock_irqsave(&priv->hcmd_lock, flags);
  542. tfd = &txq->bd[q->first_empty];
  543. memset(tfd, 0, sizeof(*tfd));
  544. control_flags = (u32 *) tfd;
  545. idx = get_cmd_index(q, q->first_empty, cmd->meta.flags & CMD_SIZE_HUGE);
  546. out_cmd = &txq->cmd[idx];
  547. out_cmd->hdr.cmd = cmd->id;
  548. memcpy(&out_cmd->meta, &cmd->meta, sizeof(cmd->meta));
  549. memcpy(&out_cmd->cmd.payload, cmd->data, cmd->len);
  550. /* At this point, the out_cmd now has all of the incoming cmd
  551. * information */
  552. out_cmd->hdr.flags = 0;
  553. out_cmd->hdr.sequence = cpu_to_le16(QUEUE_TO_SEQ(IWL_CMD_QUEUE_NUM) |
  554. INDEX_TO_SEQ(q->first_empty));
  555. if (out_cmd->meta.flags & CMD_SIZE_HUGE)
  556. out_cmd->hdr.sequence |= cpu_to_le16(SEQ_HUGE_FRAME);
  557. phys_addr = txq->dma_addr_cmd + sizeof(txq->cmd[0]) * idx +
  558. offsetof(struct iwl_cmd, hdr);
  559. iwl_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, fix_size);
  560. IWL_DEBUG_HC("Sending command %s (#%x), seq: 0x%04X, "
  561. "%d bytes at %d[%d]:%d\n",
  562. get_cmd_string(out_cmd->hdr.cmd),
  563. out_cmd->hdr.cmd, le16_to_cpu(out_cmd->hdr.sequence),
  564. fix_size, q->first_empty, idx, IWL_CMD_QUEUE_NUM);
  565. txq->need_update = 1;
  566. ret = iwl4965_tx_queue_update_wr_ptr(priv, txq, 0);
  567. q->first_empty = iwl_queue_inc_wrap(q->first_empty, q->n_bd);
  568. iwl_tx_queue_update_write_ptr(priv, txq);
  569. spin_unlock_irqrestore(&priv->hcmd_lock, flags);
  570. return ret ? ret : idx;
  571. }
  572. int iwl_send_cmd_async(struct iwl_priv *priv, struct iwl_host_cmd *cmd)
  573. {
  574. int ret;
  575. BUG_ON(!(cmd->meta.flags & CMD_ASYNC));
  576. /* An asynchronous command can not expect an SKB to be set. */
  577. BUG_ON(cmd->meta.flags & CMD_WANT_SKB);
  578. /* An asynchronous command MUST have a callback. */
  579. BUG_ON(!cmd->meta.u.callback);
  580. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  581. return -EBUSY;
  582. ret = iwl_enqueue_hcmd(priv, cmd);
  583. if (ret < 0) {
  584. IWL_ERROR("Error sending %s: iwl_enqueue_hcmd failed: %d\n",
  585. get_cmd_string(cmd->id), ret);
  586. return ret;
  587. }
  588. return 0;
  589. }
  590. int iwl_send_cmd_sync(struct iwl_priv *priv, struct iwl_host_cmd *cmd)
  591. {
  592. int cmd_idx;
  593. int ret;
  594. static atomic_t entry = ATOMIC_INIT(0); /* reentrance protection */
  595. BUG_ON(cmd->meta.flags & CMD_ASYNC);
  596. /* A synchronous command can not have a callback set. */
  597. BUG_ON(cmd->meta.u.callback != NULL);
  598. if (atomic_xchg(&entry, 1)) {
  599. IWL_ERROR("Error sending %s: Already sending a host command\n",
  600. get_cmd_string(cmd->id));
  601. return -EBUSY;
  602. }
  603. set_bit(STATUS_HCMD_ACTIVE, &priv->status);
  604. if (cmd->meta.flags & CMD_WANT_SKB)
  605. cmd->meta.source = &cmd->meta;
  606. cmd_idx = iwl_enqueue_hcmd(priv, cmd);
  607. if (cmd_idx < 0) {
  608. ret = cmd_idx;
  609. IWL_ERROR("Error sending %s: iwl_enqueue_hcmd failed: %d\n",
  610. get_cmd_string(cmd->id), ret);
  611. goto out;
  612. }
  613. ret = wait_event_interruptible_timeout(priv->wait_command_queue,
  614. !test_bit(STATUS_HCMD_ACTIVE, &priv->status),
  615. HOST_COMPLETE_TIMEOUT);
  616. if (!ret) {
  617. if (test_bit(STATUS_HCMD_ACTIVE, &priv->status)) {
  618. IWL_ERROR("Error sending %s: time out after %dms.\n",
  619. get_cmd_string(cmd->id),
  620. jiffies_to_msecs(HOST_COMPLETE_TIMEOUT));
  621. clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
  622. ret = -ETIMEDOUT;
  623. goto cancel;
  624. }
  625. }
  626. if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
  627. IWL_DEBUG_INFO("Command %s aborted: RF KILL Switch\n",
  628. get_cmd_string(cmd->id));
  629. ret = -ECANCELED;
  630. goto fail;
  631. }
  632. if (test_bit(STATUS_FW_ERROR, &priv->status)) {
  633. IWL_DEBUG_INFO("Command %s failed: FW Error\n",
  634. get_cmd_string(cmd->id));
  635. ret = -EIO;
  636. goto fail;
  637. }
  638. if ((cmd->meta.flags & CMD_WANT_SKB) && !cmd->meta.u.skb) {
  639. IWL_ERROR("Error: Response NULL in '%s'\n",
  640. get_cmd_string(cmd->id));
  641. ret = -EIO;
  642. goto out;
  643. }
  644. ret = 0;
  645. goto out;
  646. cancel:
  647. if (cmd->meta.flags & CMD_WANT_SKB) {
  648. struct iwl_cmd *qcmd;
  649. /* Cancel the CMD_WANT_SKB flag for the cmd in the
  650. * TX cmd queue. Otherwise in case the cmd comes
  651. * in later, it will possibly set an invalid
  652. * address (cmd->meta.source). */
  653. qcmd = &priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_idx];
  654. qcmd->meta.flags &= ~CMD_WANT_SKB;
  655. }
  656. fail:
  657. if (cmd->meta.u.skb) {
  658. dev_kfree_skb_any(cmd->meta.u.skb);
  659. cmd->meta.u.skb = NULL;
  660. }
  661. out:
  662. atomic_set(&entry, 0);
  663. return ret;
  664. }
  665. int iwl_send_cmd(struct iwl_priv *priv, struct iwl_host_cmd *cmd)
  666. {
  667. /* A command can not be asynchronous AND expect an SKB to be set. */
  668. BUG_ON((cmd->meta.flags & CMD_ASYNC) &&
  669. (cmd->meta.flags & CMD_WANT_SKB));
  670. if (cmd->meta.flags & CMD_ASYNC)
  671. return iwl_send_cmd_async(priv, cmd);
  672. return iwl_send_cmd_sync(priv, cmd);
  673. }
  674. int iwl_send_cmd_pdu(struct iwl_priv *priv, u8 id, u16 len, const void *data)
  675. {
  676. struct iwl_host_cmd cmd = {
  677. .id = id,
  678. .len = len,
  679. .data = data,
  680. };
  681. return iwl_send_cmd_sync(priv, &cmd);
  682. }
  683. static int __must_check iwl_send_cmd_u32(struct iwl_priv *priv, u8 id, u32 val)
  684. {
  685. struct iwl_host_cmd cmd = {
  686. .id = id,
  687. .len = sizeof(val),
  688. .data = &val,
  689. };
  690. return iwl_send_cmd_sync(priv, &cmd);
  691. }
  692. int iwl_send_statistics_request(struct iwl_priv *priv)
  693. {
  694. return iwl_send_cmd_u32(priv, REPLY_STATISTICS_CMD, 0);
  695. }
  696. /**
  697. * iwl_rxon_add_station - add station into station table.
  698. *
  699. * there is only one AP station with id= IWL_AP_ID
  700. * NOTE: mutex must be held before calling the this fnction
  701. */
  702. static int iwl_rxon_add_station(struct iwl_priv *priv,
  703. const u8 *addr, int is_ap)
  704. {
  705. u8 rc;
  706. /* Remove this station if it happens to already exist */
  707. iwl_remove_station(priv, addr, is_ap);
  708. rc = iwl_add_station(priv, addr, is_ap, 0);
  709. iwl4965_add_station(priv, addr, is_ap);
  710. return rc;
  711. }
  712. /**
  713. * iwl_set_rxon_channel - Set the phymode and channel values in staging RXON
  714. * @phymode: MODE_IEEE80211A sets to 5.2GHz; all else set to 2.4GHz
  715. * @channel: Any channel valid for the requested phymode
  716. * In addition to setting the staging RXON, priv->phymode is also set.
  717. *
  718. * NOTE: Does not commit to the hardware; it sets appropriate bit fields
  719. * in the staging RXON flag structure based on the phymode
  720. */
  721. static int iwl_set_rxon_channel(struct iwl_priv *priv, u8 phymode, u16 channel)
  722. {
  723. if (!iwl_get_channel_info(priv, phymode, channel)) {
  724. IWL_DEBUG_INFO("Could not set channel to %d [%d]\n",
  725. channel, phymode);
  726. return -EINVAL;
  727. }
  728. if ((le16_to_cpu(priv->staging_rxon.channel) == channel) &&
  729. (priv->phymode == phymode))
  730. return 0;
  731. priv->staging_rxon.channel = cpu_to_le16(channel);
  732. if (phymode == MODE_IEEE80211A)
  733. priv->staging_rxon.flags &= ~RXON_FLG_BAND_24G_MSK;
  734. else
  735. priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
  736. priv->phymode = phymode;
  737. IWL_DEBUG_INFO("Staging channel set to %d [%d]\n", channel, phymode);
  738. return 0;
  739. }
  740. /**
  741. * iwl_check_rxon_cmd - validate RXON structure is valid
  742. *
  743. * NOTE: This is really only useful during development and can eventually
  744. * be #ifdef'd out once the driver is stable and folks aren't actively
  745. * making changes
  746. */
  747. static int iwl_check_rxon_cmd(struct iwl_rxon_cmd *rxon)
  748. {
  749. int error = 0;
  750. int counter = 1;
  751. if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
  752. error |= le32_to_cpu(rxon->flags &
  753. (RXON_FLG_TGJ_NARROW_BAND_MSK |
  754. RXON_FLG_RADAR_DETECT_MSK));
  755. if (error)
  756. IWL_WARNING("check 24G fields %d | %d\n",
  757. counter++, error);
  758. } else {
  759. error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ?
  760. 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK);
  761. if (error)
  762. IWL_WARNING("check 52 fields %d | %d\n",
  763. counter++, error);
  764. error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK);
  765. if (error)
  766. IWL_WARNING("check 52 CCK %d | %d\n",
  767. counter++, error);
  768. }
  769. error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1;
  770. if (error)
  771. IWL_WARNING("check mac addr %d | %d\n", counter++, error);
  772. /* make sure basic rates 6Mbps and 1Mbps are supported */
  773. error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) &&
  774. ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0));
  775. if (error)
  776. IWL_WARNING("check basic rate %d | %d\n", counter++, error);
  777. error |= (le16_to_cpu(rxon->assoc_id) > 2007);
  778. if (error)
  779. IWL_WARNING("check assoc id %d | %d\n", counter++, error);
  780. error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
  781. == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK));
  782. if (error)
  783. IWL_WARNING("check CCK and short slot %d | %d\n",
  784. counter++, error);
  785. error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
  786. == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK));
  787. if (error)
  788. IWL_WARNING("check CCK & auto detect %d | %d\n",
  789. counter++, error);
  790. error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
  791. RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK);
  792. if (error)
  793. IWL_WARNING("check TGG and auto detect %d | %d\n",
  794. counter++, error);
  795. if (error)
  796. IWL_WARNING("Tuning to channel %d\n",
  797. le16_to_cpu(rxon->channel));
  798. if (error) {
  799. IWL_ERROR("Not a valid iwl_rxon_assoc_cmd field values\n");
  800. return -1;
  801. }
  802. return 0;
  803. }
  804. /**
  805. * iwl_full_rxon_required - determine if RXON_ASSOC can be used in RXON commit
  806. * @priv: staging_rxon is comapred to active_rxon
  807. *
  808. * If the RXON structure is changing sufficient to require a new
  809. * tune or to clear and reset the RXON_FILTER_ASSOC_MSK then return 1
  810. * to indicate a new tune is required.
  811. */
  812. static int iwl_full_rxon_required(struct iwl_priv *priv)
  813. {
  814. /* These items are only settable from the full RXON command */
  815. if (!(priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) ||
  816. compare_ether_addr(priv->staging_rxon.bssid_addr,
  817. priv->active_rxon.bssid_addr) ||
  818. compare_ether_addr(priv->staging_rxon.node_addr,
  819. priv->active_rxon.node_addr) ||
  820. compare_ether_addr(priv->staging_rxon.wlap_bssid_addr,
  821. priv->active_rxon.wlap_bssid_addr) ||
  822. (priv->staging_rxon.dev_type != priv->active_rxon.dev_type) ||
  823. (priv->staging_rxon.channel != priv->active_rxon.channel) ||
  824. (priv->staging_rxon.air_propagation !=
  825. priv->active_rxon.air_propagation) ||
  826. (priv->staging_rxon.ofdm_ht_single_stream_basic_rates !=
  827. priv->active_rxon.ofdm_ht_single_stream_basic_rates) ||
  828. (priv->staging_rxon.ofdm_ht_dual_stream_basic_rates !=
  829. priv->active_rxon.ofdm_ht_dual_stream_basic_rates) ||
  830. (priv->staging_rxon.rx_chain != priv->active_rxon.rx_chain) ||
  831. (priv->staging_rxon.assoc_id != priv->active_rxon.assoc_id))
  832. return 1;
  833. /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
  834. * be updated with the RXON_ASSOC command -- however only some
  835. * flag transitions are allowed using RXON_ASSOC */
  836. /* Check if we are not switching bands */
  837. if ((priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) !=
  838. (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK))
  839. return 1;
  840. /* Check if we are switching association toggle */
  841. if ((priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) !=
  842. (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK))
  843. return 1;
  844. return 0;
  845. }
  846. static int iwl_send_rxon_assoc(struct iwl_priv *priv)
  847. {
  848. int rc = 0;
  849. struct iwl_rx_packet *res = NULL;
  850. struct iwl_rxon_assoc_cmd rxon_assoc;
  851. struct iwl_host_cmd cmd = {
  852. .id = REPLY_RXON_ASSOC,
  853. .len = sizeof(rxon_assoc),
  854. .meta.flags = CMD_WANT_SKB,
  855. .data = &rxon_assoc,
  856. };
  857. const struct iwl_rxon_cmd *rxon1 = &priv->staging_rxon;
  858. const struct iwl_rxon_cmd *rxon2 = &priv->active_rxon;
  859. if ((rxon1->flags == rxon2->flags) &&
  860. (rxon1->filter_flags == rxon2->filter_flags) &&
  861. (rxon1->cck_basic_rates == rxon2->cck_basic_rates) &&
  862. (rxon1->ofdm_ht_single_stream_basic_rates ==
  863. rxon2->ofdm_ht_single_stream_basic_rates) &&
  864. (rxon1->ofdm_ht_dual_stream_basic_rates ==
  865. rxon2->ofdm_ht_dual_stream_basic_rates) &&
  866. (rxon1->rx_chain == rxon2->rx_chain) &&
  867. (rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates)) {
  868. IWL_DEBUG_INFO("Using current RXON_ASSOC. Not resending.\n");
  869. return 0;
  870. }
  871. rxon_assoc.flags = priv->staging_rxon.flags;
  872. rxon_assoc.filter_flags = priv->staging_rxon.filter_flags;
  873. rxon_assoc.ofdm_basic_rates = priv->staging_rxon.ofdm_basic_rates;
  874. rxon_assoc.cck_basic_rates = priv->staging_rxon.cck_basic_rates;
  875. rxon_assoc.reserved = 0;
  876. rxon_assoc.ofdm_ht_single_stream_basic_rates =
  877. priv->staging_rxon.ofdm_ht_single_stream_basic_rates;
  878. rxon_assoc.ofdm_ht_dual_stream_basic_rates =
  879. priv->staging_rxon.ofdm_ht_dual_stream_basic_rates;
  880. rxon_assoc.rx_chain_select_flags = priv->staging_rxon.rx_chain;
  881. rc = iwl_send_cmd_sync(priv, &cmd);
  882. if (rc)
  883. return rc;
  884. res = (struct iwl_rx_packet *)cmd.meta.u.skb->data;
  885. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  886. IWL_ERROR("Bad return from REPLY_RXON_ASSOC command\n");
  887. rc = -EIO;
  888. }
  889. priv->alloc_rxb_skb--;
  890. dev_kfree_skb_any(cmd.meta.u.skb);
  891. return rc;
  892. }
  893. /**
  894. * iwl_commit_rxon - commit staging_rxon to hardware
  895. *
  896. * The RXON command in staging_rxon is commited to the hardware and
  897. * the active_rxon structure is updated with the new data. This
  898. * function correctly transitions out of the RXON_ASSOC_MSK state if
  899. * a HW tune is required based on the RXON structure changes.
  900. */
  901. static int iwl_commit_rxon(struct iwl_priv *priv)
  902. {
  903. /* cast away the const for active_rxon in this function */
  904. struct iwl_rxon_cmd *active_rxon = (void *)&priv->active_rxon;
  905. int rc = 0;
  906. if (!iwl_is_alive(priv))
  907. return -1;
  908. /* always get timestamp with Rx frame */
  909. priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
  910. rc = iwl_check_rxon_cmd(&priv->staging_rxon);
  911. if (rc) {
  912. IWL_ERROR("Invalid RXON configuration. Not committing.\n");
  913. return -EINVAL;
  914. }
  915. /* If we don't need to send a full RXON, we can use
  916. * iwl_rxon_assoc_cmd which is used to reconfigure filter
  917. * and other flags for the current radio configuration. */
  918. if (!iwl_full_rxon_required(priv)) {
  919. rc = iwl_send_rxon_assoc(priv);
  920. if (rc) {
  921. IWL_ERROR("Error setting RXON_ASSOC "
  922. "configuration (%d).\n", rc);
  923. return rc;
  924. }
  925. memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
  926. return 0;
  927. }
  928. /* station table will be cleared */
  929. priv->assoc_station_added = 0;
  930. #ifdef CONFIG_IWLWIFI_SENSITIVITY
  931. priv->sensitivity_data.state = IWL_SENS_CALIB_NEED_REINIT;
  932. if (!priv->error_recovering)
  933. priv->start_calib = 0;
  934. iwl4965_init_sensitivity(priv, CMD_ASYNC, 1);
  935. #endif /* CONFIG_IWLWIFI_SENSITIVITY */
  936. /* If we are currently associated and the new config requires
  937. * an RXON_ASSOC and the new config wants the associated mask enabled,
  938. * we must clear the associated from the active configuration
  939. * before we apply the new config */
  940. if (iwl_is_associated(priv) &&
  941. (priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK)) {
  942. IWL_DEBUG_INFO("Toggling associated bit on current RXON\n");
  943. active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  944. rc = iwl_send_cmd_pdu(priv, REPLY_RXON,
  945. sizeof(struct iwl_rxon_cmd),
  946. &priv->active_rxon);
  947. /* If the mask clearing failed then we set
  948. * active_rxon back to what it was previously */
  949. if (rc) {
  950. active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
  951. IWL_ERROR("Error clearing ASSOC_MSK on current "
  952. "configuration (%d).\n", rc);
  953. return rc;
  954. }
  955. /* The RXON bit toggling will have cleared out the
  956. * station table in the uCode, so blank it in the driver
  957. * as well */
  958. iwl_clear_stations_table(priv);
  959. } else if (priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) {
  960. /* When switching from non-associated to associated, the
  961. * uCode clears out the station table; so clear it in the
  962. * driver as well */
  963. iwl_clear_stations_table(priv);
  964. }
  965. IWL_DEBUG_INFO("Sending RXON\n"
  966. "* with%s RXON_FILTER_ASSOC_MSK\n"
  967. "* channel = %d\n"
  968. "* bssid = " MAC_FMT "\n",
  969. ((priv->staging_rxon.filter_flags &
  970. RXON_FILTER_ASSOC_MSK) ? "" : "out"),
  971. le16_to_cpu(priv->staging_rxon.channel),
  972. MAC_ARG(priv->staging_rxon.bssid_addr));
  973. /* Apply the new configuration */
  974. rc = iwl_send_cmd_pdu(priv, REPLY_RXON,
  975. sizeof(struct iwl_rxon_cmd), &priv->staging_rxon);
  976. if (rc) {
  977. IWL_ERROR("Error setting new configuration (%d).\n", rc);
  978. return rc;
  979. }
  980. #ifdef CONFIG_IWLWIFI_SENSITIVITY
  981. if (!priv->error_recovering)
  982. priv->start_calib = 0;
  983. priv->sensitivity_data.state = IWL_SENS_CALIB_NEED_REINIT;
  984. iwl4965_init_sensitivity(priv, CMD_ASYNC, 1);
  985. #endif /* CONFIG_IWLWIFI_SENSITIVITY */
  986. memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
  987. /* If we issue a new RXON command which required a tune then we must
  988. * send a new TXPOWER command or we won't be able to Tx any frames */
  989. rc = iwl_hw_reg_send_txpower(priv);
  990. if (rc) {
  991. IWL_ERROR("Error setting Tx power (%d).\n", rc);
  992. return rc;
  993. }
  994. /* Add the broadcast address so we can send broadcast frames */
  995. if (iwl_rxon_add_station(priv, BROADCAST_ADDR, 0) ==
  996. IWL_INVALID_STATION) {
  997. IWL_ERROR("Error adding BROADCAST address for transmit.\n");
  998. return -EIO;
  999. }
  1000. /* If we have set the ASSOC_MSK and we are in BSS mode then
  1001. * add the IWL_AP_ID to the station rate table */
  1002. if (iwl_is_associated(priv) &&
  1003. (priv->iw_mode == IEEE80211_IF_TYPE_STA)) {
  1004. if (iwl_rxon_add_station(priv, priv->active_rxon.bssid_addr, 1)
  1005. == IWL_INVALID_STATION) {
  1006. IWL_ERROR("Error adding AP address for transmit.\n");
  1007. return -EIO;
  1008. }
  1009. priv->assoc_station_added = 1;
  1010. }
  1011. return 0;
  1012. }
  1013. static int iwl_send_bt_config(struct iwl_priv *priv)
  1014. {
  1015. struct iwl_bt_cmd bt_cmd = {
  1016. .flags = 3,
  1017. .lead_time = 0xAA,
  1018. .max_kill = 1,
  1019. .kill_ack_mask = 0,
  1020. .kill_cts_mask = 0,
  1021. };
  1022. return iwl_send_cmd_pdu(priv, REPLY_BT_CONFIG,
  1023. sizeof(struct iwl_bt_cmd), &bt_cmd);
  1024. }
  1025. static int iwl_send_scan_abort(struct iwl_priv *priv)
  1026. {
  1027. int rc = 0;
  1028. struct iwl_rx_packet *res;
  1029. struct iwl_host_cmd cmd = {
  1030. .id = REPLY_SCAN_ABORT_CMD,
  1031. .meta.flags = CMD_WANT_SKB,
  1032. };
  1033. /* If there isn't a scan actively going on in the hardware
  1034. * then we are in between scan bands and not actually
  1035. * actively scanning, so don't send the abort command */
  1036. if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
  1037. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  1038. return 0;
  1039. }
  1040. rc = iwl_send_cmd_sync(priv, &cmd);
  1041. if (rc) {
  1042. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  1043. return rc;
  1044. }
  1045. res = (struct iwl_rx_packet *)cmd.meta.u.skb->data;
  1046. if (res->u.status != CAN_ABORT_STATUS) {
  1047. /* The scan abort will return 1 for success or
  1048. * 2 for "failure". A failure condition can be
  1049. * due to simply not being in an active scan which
  1050. * can occur if we send the scan abort before we
  1051. * the microcode has notified us that a scan is
  1052. * completed. */
  1053. IWL_DEBUG_INFO("SCAN_ABORT returned %d.\n", res->u.status);
  1054. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  1055. clear_bit(STATUS_SCAN_HW, &priv->status);
  1056. }
  1057. dev_kfree_skb_any(cmd.meta.u.skb);
  1058. return rc;
  1059. }
  1060. static int iwl_card_state_sync_callback(struct iwl_priv *priv,
  1061. struct iwl_cmd *cmd,
  1062. struct sk_buff *skb)
  1063. {
  1064. return 1;
  1065. }
  1066. /*
  1067. * CARD_STATE_CMD
  1068. *
  1069. * Use: Sets the internal card state to enable, disable, or halt
  1070. *
  1071. * When in the 'enable' state the card operates as normal.
  1072. * When in the 'disable' state, the card enters into a low power mode.
  1073. * When in the 'halt' state, the card is shut down and must be fully
  1074. * restarted to come back on.
  1075. */
  1076. static int iwl_send_card_state(struct iwl_priv *priv, u32 flags, u8 meta_flag)
  1077. {
  1078. struct iwl_host_cmd cmd = {
  1079. .id = REPLY_CARD_STATE_CMD,
  1080. .len = sizeof(u32),
  1081. .data = &flags,
  1082. .meta.flags = meta_flag,
  1083. };
  1084. if (meta_flag & CMD_ASYNC)
  1085. cmd.meta.u.callback = iwl_card_state_sync_callback;
  1086. return iwl_send_cmd(priv, &cmd);
  1087. }
  1088. static int iwl_add_sta_sync_callback(struct iwl_priv *priv,
  1089. struct iwl_cmd *cmd, struct sk_buff *skb)
  1090. {
  1091. struct iwl_rx_packet *res = NULL;
  1092. if (!skb) {
  1093. IWL_ERROR("Error: Response NULL in REPLY_ADD_STA.\n");
  1094. return 1;
  1095. }
  1096. res = (struct iwl_rx_packet *)skb->data;
  1097. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  1098. IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n",
  1099. res->hdr.flags);
  1100. return 1;
  1101. }
  1102. switch (res->u.add_sta.status) {
  1103. case ADD_STA_SUCCESS_MSK:
  1104. break;
  1105. default:
  1106. break;
  1107. }
  1108. /* We didn't cache the SKB; let the caller free it */
  1109. return 1;
  1110. }
  1111. int iwl_send_add_station(struct iwl_priv *priv,
  1112. struct iwl_addsta_cmd *sta, u8 flags)
  1113. {
  1114. struct iwl_rx_packet *res = NULL;
  1115. int rc = 0;
  1116. struct iwl_host_cmd cmd = {
  1117. .id = REPLY_ADD_STA,
  1118. .len = sizeof(struct iwl_addsta_cmd),
  1119. .meta.flags = flags,
  1120. .data = sta,
  1121. };
  1122. if (flags & CMD_ASYNC)
  1123. cmd.meta.u.callback = iwl_add_sta_sync_callback;
  1124. else
  1125. cmd.meta.flags |= CMD_WANT_SKB;
  1126. rc = iwl_send_cmd(priv, &cmd);
  1127. if (rc || (flags & CMD_ASYNC))
  1128. return rc;
  1129. res = (struct iwl_rx_packet *)cmd.meta.u.skb->data;
  1130. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  1131. IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n",
  1132. res->hdr.flags);
  1133. rc = -EIO;
  1134. }
  1135. if (rc == 0) {
  1136. switch (res->u.add_sta.status) {
  1137. case ADD_STA_SUCCESS_MSK:
  1138. IWL_DEBUG_INFO("REPLY_ADD_STA PASSED\n");
  1139. break;
  1140. default:
  1141. rc = -EIO;
  1142. IWL_WARNING("REPLY_ADD_STA failed\n");
  1143. break;
  1144. }
  1145. }
  1146. priv->alloc_rxb_skb--;
  1147. dev_kfree_skb_any(cmd.meta.u.skb);
  1148. return rc;
  1149. }
  1150. static int iwl_update_sta_key_info(struct iwl_priv *priv,
  1151. struct ieee80211_key_conf *keyconf,
  1152. u8 sta_id)
  1153. {
  1154. unsigned long flags;
  1155. __le16 key_flags = 0;
  1156. switch (keyconf->alg) {
  1157. case ALG_CCMP:
  1158. key_flags |= STA_KEY_FLG_CCMP;
  1159. key_flags |= cpu_to_le16(
  1160. keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
  1161. key_flags &= ~STA_KEY_FLG_INVALID;
  1162. break;
  1163. case ALG_TKIP:
  1164. case ALG_WEP:
  1165. return -EINVAL;
  1166. default:
  1167. return -EINVAL;
  1168. }
  1169. spin_lock_irqsave(&priv->sta_lock, flags);
  1170. priv->stations[sta_id].keyinfo.alg = keyconf->alg;
  1171. priv->stations[sta_id].keyinfo.keylen = keyconf->keylen;
  1172. memcpy(priv->stations[sta_id].keyinfo.key, keyconf->key,
  1173. keyconf->keylen);
  1174. memcpy(priv->stations[sta_id].sta.key.key, keyconf->key,
  1175. keyconf->keylen);
  1176. priv->stations[sta_id].sta.key.key_flags = key_flags;
  1177. priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  1178. priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  1179. spin_unlock_irqrestore(&priv->sta_lock, flags);
  1180. IWL_DEBUG_INFO("hwcrypto: modify ucode station key info\n");
  1181. iwl_send_add_station(priv, &priv->stations[sta_id].sta, 0);
  1182. return 0;
  1183. }
  1184. static int iwl_clear_sta_key_info(struct iwl_priv *priv, u8 sta_id)
  1185. {
  1186. unsigned long flags;
  1187. spin_lock_irqsave(&priv->sta_lock, flags);
  1188. memset(&priv->stations[sta_id].keyinfo, 0, sizeof(struct iwl_hw_key));
  1189. memset(&priv->stations[sta_id].sta.key, 0, sizeof(struct iwl_keyinfo));
  1190. priv->stations[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
  1191. priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  1192. priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  1193. spin_unlock_irqrestore(&priv->sta_lock, flags);
  1194. IWL_DEBUG_INFO("hwcrypto: clear ucode station key info\n");
  1195. iwl_send_add_station(priv, &priv->stations[sta_id].sta, 0);
  1196. return 0;
  1197. }
  1198. static void iwl_clear_free_frames(struct iwl_priv *priv)
  1199. {
  1200. struct list_head *element;
  1201. IWL_DEBUG_INFO("%d frames on pre-allocated heap on clear.\n",
  1202. priv->frames_count);
  1203. while (!list_empty(&priv->free_frames)) {
  1204. element = priv->free_frames.next;
  1205. list_del(element);
  1206. kfree(list_entry(element, struct iwl_frame, list));
  1207. priv->frames_count--;
  1208. }
  1209. if (priv->frames_count) {
  1210. IWL_WARNING("%d frames still in use. Did we lose one?\n",
  1211. priv->frames_count);
  1212. priv->frames_count = 0;
  1213. }
  1214. }
  1215. static struct iwl_frame *iwl_get_free_frame(struct iwl_priv *priv)
  1216. {
  1217. struct iwl_frame *frame;
  1218. struct list_head *element;
  1219. if (list_empty(&priv->free_frames)) {
  1220. frame = kzalloc(sizeof(*frame), GFP_KERNEL);
  1221. if (!frame) {
  1222. IWL_ERROR("Could not allocate frame!\n");
  1223. return NULL;
  1224. }
  1225. priv->frames_count++;
  1226. return frame;
  1227. }
  1228. element = priv->free_frames.next;
  1229. list_del(element);
  1230. return list_entry(element, struct iwl_frame, list);
  1231. }
  1232. static void iwl_free_frame(struct iwl_priv *priv, struct iwl_frame *frame)
  1233. {
  1234. memset(frame, 0, sizeof(*frame));
  1235. list_add(&frame->list, &priv->free_frames);
  1236. }
  1237. unsigned int iwl_fill_beacon_frame(struct iwl_priv *priv,
  1238. struct ieee80211_hdr *hdr,
  1239. const u8 *dest, int left)
  1240. {
  1241. if (!iwl_is_associated(priv) || !priv->ibss_beacon ||
  1242. ((priv->iw_mode != IEEE80211_IF_TYPE_IBSS) &&
  1243. (priv->iw_mode != IEEE80211_IF_TYPE_AP)))
  1244. return 0;
  1245. if (priv->ibss_beacon->len > left)
  1246. return 0;
  1247. memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
  1248. return priv->ibss_beacon->len;
  1249. }
  1250. int iwl_rate_index_from_plcp(int plcp)
  1251. {
  1252. int i = 0;
  1253. if (plcp & RATE_MCS_HT_MSK) {
  1254. i = (plcp & 0xff);
  1255. if (i >= IWL_RATE_MIMO_6M_PLCP)
  1256. i = i - IWL_RATE_MIMO_6M_PLCP;
  1257. i += IWL_FIRST_OFDM_RATE;
  1258. /* skip 9M not supported in ht*/
  1259. if (i >= IWL_RATE_9M_INDEX)
  1260. i += 1;
  1261. if ((i >= IWL_FIRST_OFDM_RATE) &&
  1262. (i <= IWL_LAST_OFDM_RATE))
  1263. return i;
  1264. } else {
  1265. for (i = 0; i < ARRAY_SIZE(iwl_rates); i++)
  1266. if (iwl_rates[i].plcp == (plcp &0xFF))
  1267. return i;
  1268. }
  1269. return -1;
  1270. }
  1271. static u8 iwl_rate_get_lowest_plcp(int rate_mask)
  1272. {
  1273. u8 i;
  1274. for (i = IWL_RATE_1M_INDEX; i != IWL_RATE_INVALID;
  1275. i = iwl_rates[i].next_ieee) {
  1276. if (rate_mask & (1 << i))
  1277. return iwl_rates[i].plcp;
  1278. }
  1279. return IWL_RATE_INVALID;
  1280. }
  1281. static int iwl_send_beacon_cmd(struct iwl_priv *priv)
  1282. {
  1283. struct iwl_frame *frame;
  1284. unsigned int frame_size;
  1285. int rc;
  1286. u8 rate;
  1287. frame = iwl_get_free_frame(priv);
  1288. if (!frame) {
  1289. IWL_ERROR("Could not obtain free frame buffer for beacon "
  1290. "command.\n");
  1291. return -ENOMEM;
  1292. }
  1293. if (!(priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)) {
  1294. rate = iwl_rate_get_lowest_plcp(priv->active_rate_basic &
  1295. 0xFF0);
  1296. if (rate == IWL_INVALID_RATE)
  1297. rate = IWL_RATE_6M_PLCP;
  1298. } else {
  1299. rate = iwl_rate_get_lowest_plcp(priv->active_rate_basic & 0xF);
  1300. if (rate == IWL_INVALID_RATE)
  1301. rate = IWL_RATE_1M_PLCP;
  1302. }
  1303. frame_size = iwl_hw_get_beacon_cmd(priv, frame, rate);
  1304. rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
  1305. &frame->u.cmd[0]);
  1306. iwl_free_frame(priv, frame);
  1307. return rc;
  1308. }
  1309. /******************************************************************************
  1310. *
  1311. * EEPROM related functions
  1312. *
  1313. ******************************************************************************/
  1314. static void get_eeprom_mac(struct iwl_priv *priv, u8 *mac)
  1315. {
  1316. memcpy(mac, priv->eeprom.mac_address, 6);
  1317. }
  1318. /**
  1319. * iwl_eeprom_init - read EEPROM contents
  1320. *
  1321. * Load the EEPROM from adapter into priv->eeprom
  1322. *
  1323. * NOTE: This routine uses the non-debug IO access functions.
  1324. */
  1325. int iwl_eeprom_init(struct iwl_priv *priv)
  1326. {
  1327. u16 *e = (u16 *)&priv->eeprom;
  1328. u32 gp = iwl_read32(priv, CSR_EEPROM_GP);
  1329. u32 r;
  1330. int sz = sizeof(priv->eeprom);
  1331. int rc;
  1332. int i;
  1333. u16 addr;
  1334. /* The EEPROM structure has several padding buffers within it
  1335. * and when adding new EEPROM maps is subject to programmer errors
  1336. * which may be very difficult to identify without explicitly
  1337. * checking the resulting size of the eeprom map. */
  1338. BUILD_BUG_ON(sizeof(priv->eeprom) != IWL_EEPROM_IMAGE_SIZE);
  1339. if ((gp & CSR_EEPROM_GP_VALID_MSK) == CSR_EEPROM_GP_BAD_SIGNATURE) {
  1340. IWL_ERROR("EEPROM not found, EEPROM_GP=0x%08x", gp);
  1341. return -ENOENT;
  1342. }
  1343. rc = iwl_eeprom_aqcuire_semaphore(priv);
  1344. if (rc < 0) {
  1345. IWL_ERROR("Failed to aqcuire EEPROM semaphore.\n");
  1346. return -ENOENT;
  1347. }
  1348. /* eeprom is an array of 16bit values */
  1349. for (addr = 0; addr < sz; addr += sizeof(u16)) {
  1350. _iwl_write32(priv, CSR_EEPROM_REG, addr << 1);
  1351. _iwl_clear_bit(priv, CSR_EEPROM_REG, CSR_EEPROM_REG_BIT_CMD);
  1352. for (i = 0; i < IWL_EEPROM_ACCESS_TIMEOUT;
  1353. i += IWL_EEPROM_ACCESS_DELAY) {
  1354. r = _iwl_read_restricted(priv, CSR_EEPROM_REG);
  1355. if (r & CSR_EEPROM_REG_READ_VALID_MSK)
  1356. break;
  1357. udelay(IWL_EEPROM_ACCESS_DELAY);
  1358. }
  1359. if (!(r & CSR_EEPROM_REG_READ_VALID_MSK)) {
  1360. IWL_ERROR("Time out reading EEPROM[%d]", addr);
  1361. rc = -ETIMEDOUT;
  1362. goto done;
  1363. }
  1364. e[addr / 2] = le16_to_cpu(r >> 16);
  1365. }
  1366. rc = 0;
  1367. done:
  1368. iwl_eeprom_release_semaphore(priv);
  1369. return rc;
  1370. }
  1371. /******************************************************************************
  1372. *
  1373. * Misc. internal state and helper functions
  1374. *
  1375. ******************************************************************************/
  1376. #ifdef CONFIG_IWLWIFI_DEBUG
  1377. /**
  1378. * iwl_report_frame - dump frame to syslog during debug sessions
  1379. *
  1380. * hack this function to show different aspects of received frames,
  1381. * including selective frame dumps.
  1382. * group100 parameter selects whether to show 1 out of 100 good frames.
  1383. *
  1384. * TODO: ieee80211_hdr stuff is common to 3945 and 4965, so frame type
  1385. * info output is okay, but some of this stuff (e.g. iwl_rx_frame_stats)
  1386. * is 3945-specific and gives bad output for 4965. Need to split the
  1387. * functionality, keep common stuff here.
  1388. */
  1389. void iwl_report_frame(struct iwl_priv *priv,
  1390. struct iwl_rx_packet *pkt,
  1391. struct ieee80211_hdr *header, int group100)
  1392. {
  1393. u32 to_us;
  1394. u32 print_summary = 0;
  1395. u32 print_dump = 0; /* set to 1 to dump all frames' contents */
  1396. u32 hundred = 0;
  1397. u32 dataframe = 0;
  1398. u16 fc;
  1399. u16 seq_ctl;
  1400. u16 channel;
  1401. u16 phy_flags;
  1402. int rate_sym;
  1403. u16 length;
  1404. u16 status;
  1405. u16 bcn_tmr;
  1406. u32 tsf_low;
  1407. u64 tsf;
  1408. u8 rssi;
  1409. u8 agc;
  1410. u16 sig_avg;
  1411. u16 noise_diff;
  1412. struct iwl_rx_frame_stats *rx_stats = IWL_RX_STATS(pkt);
  1413. struct iwl_rx_frame_hdr *rx_hdr = IWL_RX_HDR(pkt);
  1414. struct iwl_rx_frame_end *rx_end = IWL_RX_END(pkt);
  1415. u8 *data = IWL_RX_DATA(pkt);
  1416. /* MAC header */
  1417. fc = le16_to_cpu(header->frame_control);
  1418. seq_ctl = le16_to_cpu(header->seq_ctrl);
  1419. /* metadata */
  1420. channel = le16_to_cpu(rx_hdr->channel);
  1421. phy_flags = le16_to_cpu(rx_hdr->phy_flags);
  1422. rate_sym = rx_hdr->rate;
  1423. length = le16_to_cpu(rx_hdr->len);
  1424. /* end-of-frame status and timestamp */
  1425. status = le32_to_cpu(rx_end->status);
  1426. bcn_tmr = le32_to_cpu(rx_end->beacon_timestamp);
  1427. tsf_low = le64_to_cpu(rx_end->timestamp) & 0x0ffffffff;
  1428. tsf = le64_to_cpu(rx_end->timestamp);
  1429. /* signal statistics */
  1430. rssi = rx_stats->rssi;
  1431. agc = rx_stats->agc;
  1432. sig_avg = le16_to_cpu(rx_stats->sig_avg);
  1433. noise_diff = le16_to_cpu(rx_stats->noise_diff);
  1434. to_us = !compare_ether_addr(header->addr1, priv->mac_addr);
  1435. /* if data frame is to us and all is good,
  1436. * (optionally) print summary for only 1 out of every 100 */
  1437. if (to_us && (fc & ~IEEE80211_FCTL_PROTECTED) ==
  1438. (IEEE80211_FCTL_FROMDS | IEEE80211_FTYPE_DATA)) {
  1439. dataframe = 1;
  1440. if (!group100)
  1441. print_summary = 1; /* print each frame */
  1442. else if (priv->framecnt_to_us < 100) {
  1443. priv->framecnt_to_us++;
  1444. print_summary = 0;
  1445. } else {
  1446. priv->framecnt_to_us = 0;
  1447. print_summary = 1;
  1448. hundred = 1;
  1449. }
  1450. } else {
  1451. /* print summary for all other frames */
  1452. print_summary = 1;
  1453. }
  1454. if (print_summary) {
  1455. char *title;
  1456. u32 rate;
  1457. if (hundred)
  1458. title = "100Frames";
  1459. else if (fc & IEEE80211_FCTL_RETRY)
  1460. title = "Retry";
  1461. else if (ieee80211_is_assoc_response(fc))
  1462. title = "AscRsp";
  1463. else if (ieee80211_is_reassoc_response(fc))
  1464. title = "RasRsp";
  1465. else if (ieee80211_is_probe_response(fc)) {
  1466. title = "PrbRsp";
  1467. print_dump = 1; /* dump frame contents */
  1468. } else if (ieee80211_is_beacon(fc)) {
  1469. title = "Beacon";
  1470. print_dump = 1; /* dump frame contents */
  1471. } else if (ieee80211_is_atim(fc))
  1472. title = "ATIM";
  1473. else if (ieee80211_is_auth(fc))
  1474. title = "Auth";
  1475. else if (ieee80211_is_deauth(fc))
  1476. title = "DeAuth";
  1477. else if (ieee80211_is_disassoc(fc))
  1478. title = "DisAssoc";
  1479. else
  1480. title = "Frame";
  1481. rate = iwl_rate_index_from_plcp(rate_sym);
  1482. if (rate == -1)
  1483. rate = 0;
  1484. else
  1485. rate = iwl_rates[rate].ieee / 2;
  1486. /* print frame summary.
  1487. * MAC addresses show just the last byte (for brevity),
  1488. * but you can hack it to show more, if you'd like to. */
  1489. if (dataframe)
  1490. IWL_DEBUG_RX("%s: mhd=0x%04x, dst=0x%02x, "
  1491. "len=%u, rssi=%d, chnl=%d, rate=%u, \n",
  1492. title, fc, header->addr1[5],
  1493. length, rssi, channel, rate);
  1494. else {
  1495. /* src/dst addresses assume managed mode */
  1496. IWL_DEBUG_RX("%s: 0x%04x, dst=0x%02x, "
  1497. "src=0x%02x, rssi=%u, tim=%lu usec, "
  1498. "phy=0x%02x, chnl=%d\n",
  1499. title, fc, header->addr1[5],
  1500. header->addr3[5], rssi,
  1501. tsf_low - priv->scan_start_tsf,
  1502. phy_flags, channel);
  1503. }
  1504. }
  1505. if (print_dump)
  1506. iwl_print_hex_dump(IWL_DL_RX, data, length);
  1507. }
  1508. #endif
  1509. static void iwl_unset_hw_setting(struct iwl_priv *priv)
  1510. {
  1511. if (priv->hw_setting.shared_virt)
  1512. pci_free_consistent(priv->pci_dev,
  1513. sizeof(struct iwl_shared),
  1514. priv->hw_setting.shared_virt,
  1515. priv->hw_setting.shared_phys);
  1516. }
  1517. /**
  1518. * iwl_supported_rate_to_ie - fill in the supported rate in IE field
  1519. *
  1520. * return : set the bit for each supported rate insert in ie
  1521. */
  1522. static u16 iwl_supported_rate_to_ie(u8 *ie, u16 supported_rate,
  1523. u16 basic_rate, int max_count)
  1524. {
  1525. u16 ret_rates = 0, bit;
  1526. int i;
  1527. u8 *rates;
  1528. rates = &(ie[1]);
  1529. for (bit = 1, i = 0; i < IWL_RATE_COUNT; i++, bit <<= 1) {
  1530. if (bit & supported_rate) {
  1531. ret_rates |= bit;
  1532. rates[*ie] = iwl_rates[i].ieee |
  1533. ((bit & basic_rate) ? 0x80 : 0x00);
  1534. *ie = *ie + 1;
  1535. if (*ie >= max_count)
  1536. break;
  1537. }
  1538. }
  1539. return ret_rates;
  1540. }
  1541. #ifdef CONFIG_IWLWIFI_HT
  1542. void static iwl_set_ht_capab(struct ieee80211_hw *hw,
  1543. struct ieee80211_ht_capability *ht_cap,
  1544. u8 use_wide_chan);
  1545. #endif
  1546. /**
  1547. * iwl_fill_probe_req - fill in all required fields and IE for probe request
  1548. */
  1549. static u16 iwl_fill_probe_req(struct iwl_priv *priv,
  1550. struct ieee80211_mgmt *frame,
  1551. int left, int is_direct)
  1552. {
  1553. int len = 0;
  1554. u8 *pos = NULL;
  1555. u16 ret_rates;
  1556. /* Make sure there is enough space for the probe request,
  1557. * two mandatory IEs and the data */
  1558. left -= 24;
  1559. if (left < 0)
  1560. return 0;
  1561. len += 24;
  1562. frame->frame_control = cpu_to_le16(IEEE80211_STYPE_PROBE_REQ);
  1563. memcpy(frame->da, BROADCAST_ADDR, ETH_ALEN);
  1564. memcpy(frame->sa, priv->mac_addr, ETH_ALEN);
  1565. memcpy(frame->bssid, BROADCAST_ADDR, ETH_ALEN);
  1566. frame->seq_ctrl = 0;
  1567. /* fill in our indirect SSID IE */
  1568. /* ...next IE... */
  1569. left -= 2;
  1570. if (left < 0)
  1571. return 0;
  1572. len += 2;
  1573. pos = &(frame->u.probe_req.variable[0]);
  1574. *pos++ = WLAN_EID_SSID;
  1575. *pos++ = 0;
  1576. /* fill in our direct SSID IE... */
  1577. if (is_direct) {
  1578. /* ...next IE... */
  1579. left -= 2 + priv->essid_len;
  1580. if (left < 0)
  1581. return 0;
  1582. /* ... fill it in... */
  1583. *pos++ = WLAN_EID_SSID;
  1584. *pos++ = priv->essid_len;
  1585. memcpy(pos, priv->essid, priv->essid_len);
  1586. pos += priv->essid_len;
  1587. len += 2 + priv->essid_len;
  1588. }
  1589. /* fill in supported rate */
  1590. /* ...next IE... */
  1591. left -= 2;
  1592. if (left < 0)
  1593. return 0;
  1594. /* ... fill it in... */
  1595. *pos++ = WLAN_EID_SUPP_RATES;
  1596. *pos = 0;
  1597. ret_rates = priv->active_rate = priv->rates_mask;
  1598. priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
  1599. iwl_supported_rate_to_ie(pos, priv->active_rate,
  1600. priv->active_rate_basic, left);
  1601. len += 2 + *pos;
  1602. pos += (*pos) + 1;
  1603. ret_rates = ~ret_rates & priv->active_rate;
  1604. if (ret_rates == 0)
  1605. goto fill_end;
  1606. /* fill in supported extended rate */
  1607. /* ...next IE... */
  1608. left -= 2;
  1609. if (left < 0)
  1610. return 0;
  1611. /* ... fill it in... */
  1612. *pos++ = WLAN_EID_EXT_SUPP_RATES;
  1613. *pos = 0;
  1614. iwl_supported_rate_to_ie(pos, ret_rates, priv->active_rate_basic, left);
  1615. if (*pos > 0)
  1616. len += 2 + *pos;
  1617. #ifdef CONFIG_IWLWIFI_HT
  1618. if (is_direct && priv->is_ht_enabled) {
  1619. u8 use_wide_chan = 1;
  1620. if (priv->channel_width != IWL_CHANNEL_WIDTH_40MHZ)
  1621. use_wide_chan = 0;
  1622. pos += (*pos) + 1;
  1623. *pos++ = WLAN_EID_HT_CAPABILITY;
  1624. *pos++ = sizeof(struct ieee80211_ht_capability);
  1625. iwl_set_ht_capab(NULL, (struct ieee80211_ht_capability *)pos,
  1626. use_wide_chan);
  1627. len += 2 + sizeof(struct ieee80211_ht_capability);
  1628. }
  1629. #endif /*CONFIG_IWLWIFI_HT */
  1630. fill_end:
  1631. return (u16)len;
  1632. }
  1633. /*
  1634. * QoS support
  1635. */
  1636. #ifdef CONFIG_IWLWIFI_QOS
  1637. static int iwl_send_qos_params_command(struct iwl_priv *priv,
  1638. struct iwl_qosparam_cmd *qos)
  1639. {
  1640. return iwl_send_cmd_pdu(priv, REPLY_QOS_PARAM,
  1641. sizeof(struct iwl_qosparam_cmd), qos);
  1642. }
  1643. static void iwl_reset_qos(struct iwl_priv *priv)
  1644. {
  1645. u16 cw_min = 15;
  1646. u16 cw_max = 1023;
  1647. u8 aifs = 2;
  1648. u8 is_legacy = 0;
  1649. unsigned long flags;
  1650. int i;
  1651. spin_lock_irqsave(&priv->lock, flags);
  1652. priv->qos_data.qos_active = 0;
  1653. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS) {
  1654. if (priv->qos_data.qos_enable)
  1655. priv->qos_data.qos_active = 1;
  1656. if (!(priv->active_rate & 0xfff0)) {
  1657. cw_min = 31;
  1658. is_legacy = 1;
  1659. }
  1660. } else if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
  1661. if (priv->qos_data.qos_enable)
  1662. priv->qos_data.qos_active = 1;
  1663. } else if (!(priv->staging_rxon.flags & RXON_FLG_SHORT_SLOT_MSK)) {
  1664. cw_min = 31;
  1665. is_legacy = 1;
  1666. }
  1667. if (priv->qos_data.qos_active)
  1668. aifs = 3;
  1669. priv->qos_data.def_qos_parm.ac[0].cw_min = cpu_to_le16(cw_min);
  1670. priv->qos_data.def_qos_parm.ac[0].cw_max = cpu_to_le16(cw_max);
  1671. priv->qos_data.def_qos_parm.ac[0].aifsn = aifs;
  1672. priv->qos_data.def_qos_parm.ac[0].edca_txop = 0;
  1673. priv->qos_data.def_qos_parm.ac[0].reserved1 = 0;
  1674. if (priv->qos_data.qos_active) {
  1675. i = 1;
  1676. priv->qos_data.def_qos_parm.ac[i].cw_min = cpu_to_le16(cw_min);
  1677. priv->qos_data.def_qos_parm.ac[i].cw_max = cpu_to_le16(cw_max);
  1678. priv->qos_data.def_qos_parm.ac[i].aifsn = 7;
  1679. priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
  1680. priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
  1681. i = 2;
  1682. priv->qos_data.def_qos_parm.ac[i].cw_min =
  1683. cpu_to_le16((cw_min + 1) / 2 - 1);
  1684. priv->qos_data.def_qos_parm.ac[i].cw_max =
  1685. cpu_to_le16(cw_max);
  1686. priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
  1687. if (is_legacy)
  1688. priv->qos_data.def_qos_parm.ac[i].edca_txop =
  1689. cpu_to_le16(6016);
  1690. else
  1691. priv->qos_data.def_qos_parm.ac[i].edca_txop =
  1692. cpu_to_le16(3008);
  1693. priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
  1694. i = 3;
  1695. priv->qos_data.def_qos_parm.ac[i].cw_min =
  1696. cpu_to_le16((cw_min + 1) / 4 - 1);
  1697. priv->qos_data.def_qos_parm.ac[i].cw_max =
  1698. cpu_to_le16((cw_max + 1) / 2 - 1);
  1699. priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
  1700. priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
  1701. if (is_legacy)
  1702. priv->qos_data.def_qos_parm.ac[i].edca_txop =
  1703. cpu_to_le16(3264);
  1704. else
  1705. priv->qos_data.def_qos_parm.ac[i].edca_txop =
  1706. cpu_to_le16(1504);
  1707. } else {
  1708. for (i = 1; i < 4; i++) {
  1709. priv->qos_data.def_qos_parm.ac[i].cw_min =
  1710. cpu_to_le16(cw_min);
  1711. priv->qos_data.def_qos_parm.ac[i].cw_max =
  1712. cpu_to_le16(cw_max);
  1713. priv->qos_data.def_qos_parm.ac[i].aifsn = aifs;
  1714. priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
  1715. priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
  1716. }
  1717. }
  1718. IWL_DEBUG_QOS("set QoS to default \n");
  1719. spin_unlock_irqrestore(&priv->lock, flags);
  1720. }
  1721. static void iwl_activate_qos(struct iwl_priv *priv, u8 force)
  1722. {
  1723. unsigned long flags;
  1724. if (priv == NULL)
  1725. return;
  1726. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  1727. return;
  1728. if (!priv->qos_data.qos_enable)
  1729. return;
  1730. spin_lock_irqsave(&priv->lock, flags);
  1731. priv->qos_data.def_qos_parm.qos_flags = 0;
  1732. if (priv->qos_data.qos_cap.q_AP.queue_request &&
  1733. !priv->qos_data.qos_cap.q_AP.txop_request)
  1734. priv->qos_data.def_qos_parm.qos_flags |=
  1735. QOS_PARAM_FLG_TXOP_TYPE_MSK;
  1736. if (priv->qos_data.qos_active)
  1737. priv->qos_data.def_qos_parm.qos_flags |=
  1738. QOS_PARAM_FLG_UPDATE_EDCA_MSK;
  1739. spin_unlock_irqrestore(&priv->lock, flags);
  1740. if (force || iwl_is_associated(priv)) {
  1741. IWL_DEBUG_QOS("send QoS cmd with Qos active %d \n",
  1742. priv->qos_data.qos_active);
  1743. iwl_send_qos_params_command(priv,
  1744. &(priv->qos_data.def_qos_parm));
  1745. }
  1746. }
  1747. #endif /* CONFIG_IWLWIFI_QOS */
  1748. /*
  1749. * Power management (not Tx power!) functions
  1750. */
  1751. #define MSEC_TO_USEC 1024
  1752. #define NOSLP __constant_cpu_to_le16(0), 0, 0
  1753. #define SLP IWL_POWER_DRIVER_ALLOW_SLEEP_MSK, 0, 0
  1754. #define SLP_TIMEOUT(T) __constant_cpu_to_le32((T) * MSEC_TO_USEC)
  1755. #define SLP_VEC(X0, X1, X2, X3, X4) {__constant_cpu_to_le32(X0), \
  1756. __constant_cpu_to_le32(X1), \
  1757. __constant_cpu_to_le32(X2), \
  1758. __constant_cpu_to_le32(X3), \
  1759. __constant_cpu_to_le32(X4)}
  1760. /* default power management (not Tx power) table values */
  1761. /* for tim 0-10 */
  1762. static struct iwl_power_vec_entry range_0[IWL_POWER_AC] = {
  1763. {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
  1764. {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500), SLP_VEC(1, 2, 3, 4, 4)}, 0},
  1765. {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300), SLP_VEC(2, 4, 6, 7, 7)}, 0},
  1766. {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100), SLP_VEC(2, 6, 9, 9, 10)}, 0},
  1767. {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 10)}, 1},
  1768. {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25), SLP_VEC(4, 7, 10, 10, 10)}, 1}
  1769. };
  1770. /* for tim > 10 */
  1771. static struct iwl_power_vec_entry range_1[IWL_POWER_AC] = {
  1772. {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
  1773. {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500),
  1774. SLP_VEC(1, 2, 3, 4, 0xFF)}, 0},
  1775. {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300),
  1776. SLP_VEC(2, 4, 6, 7, 0xFF)}, 0},
  1777. {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100),
  1778. SLP_VEC(2, 6, 9, 9, 0xFF)}, 0},
  1779. {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 0xFF)}, 0},
  1780. {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25),
  1781. SLP_VEC(4, 7, 10, 10, 0xFF)}, 0}
  1782. };
  1783. int iwl_power_init_handle(struct iwl_priv *priv)
  1784. {
  1785. int rc = 0, i;
  1786. struct iwl_power_mgr *pow_data;
  1787. int size = sizeof(struct iwl_power_vec_entry) * IWL_POWER_AC;
  1788. u16 pci_pm;
  1789. IWL_DEBUG_POWER("Initialize power \n");
  1790. pow_data = &(priv->power_data);
  1791. memset(pow_data, 0, sizeof(*pow_data));
  1792. pow_data->active_index = IWL_POWER_RANGE_0;
  1793. pow_data->dtim_val = 0xffff;
  1794. memcpy(&pow_data->pwr_range_0[0], &range_0[0], size);
  1795. memcpy(&pow_data->pwr_range_1[0], &range_1[0], size);
  1796. rc = pci_read_config_word(priv->pci_dev, PCI_LINK_CTRL, &pci_pm);
  1797. if (rc != 0)
  1798. return 0;
  1799. else {
  1800. struct iwl_powertable_cmd *cmd;
  1801. IWL_DEBUG_POWER("adjust power command flags\n");
  1802. for (i = 0; i < IWL_POWER_AC; i++) {
  1803. cmd = &pow_data->pwr_range_0[i].cmd;
  1804. if (pci_pm & 0x1)
  1805. cmd->flags &= ~IWL_POWER_PCI_PM_MSK;
  1806. else
  1807. cmd->flags |= IWL_POWER_PCI_PM_MSK;
  1808. }
  1809. }
  1810. return rc;
  1811. }
  1812. static int iwl_update_power_cmd(struct iwl_priv *priv,
  1813. struct iwl_powertable_cmd *cmd, u32 mode)
  1814. {
  1815. int rc = 0, i;
  1816. u8 skip;
  1817. u32 max_sleep = 0;
  1818. struct iwl_power_vec_entry *range;
  1819. u8 period = 0;
  1820. struct iwl_power_mgr *pow_data;
  1821. if (mode > IWL_POWER_INDEX_5) {
  1822. IWL_DEBUG_POWER("Error invalid power mode \n");
  1823. return -1;
  1824. }
  1825. pow_data = &(priv->power_data);
  1826. if (pow_data->active_index == IWL_POWER_RANGE_0)
  1827. range = &pow_data->pwr_range_0[0];
  1828. else
  1829. range = &pow_data->pwr_range_1[1];
  1830. memcpy(cmd, &range[mode].cmd, sizeof(struct iwl_powertable_cmd));
  1831. #ifdef IWL_MAC80211_DISABLE
  1832. if (priv->assoc_network != NULL) {
  1833. unsigned long flags;
  1834. period = priv->assoc_network->tim.tim_period;
  1835. }
  1836. #endif /*IWL_MAC80211_DISABLE */
  1837. skip = range[mode].no_dtim;
  1838. if (period == 0) {
  1839. period = 1;
  1840. skip = 0;
  1841. }
  1842. if (skip == 0) {
  1843. max_sleep = period;
  1844. cmd->flags &= ~IWL_POWER_SLEEP_OVER_DTIM_MSK;
  1845. } else {
  1846. __le32 slp_itrvl = cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1];
  1847. max_sleep = (le32_to_cpu(slp_itrvl) / period) * period;
  1848. cmd->flags |= IWL_POWER_SLEEP_OVER_DTIM_MSK;
  1849. }
  1850. for (i = 0; i < IWL_POWER_VEC_SIZE; i++) {
  1851. if (le32_to_cpu(cmd->sleep_interval[i]) > max_sleep)
  1852. cmd->sleep_interval[i] = cpu_to_le32(max_sleep);
  1853. }
  1854. IWL_DEBUG_POWER("Flags value = 0x%08X\n", cmd->flags);
  1855. IWL_DEBUG_POWER("Tx timeout = %u\n", le32_to_cpu(cmd->tx_data_timeout));
  1856. IWL_DEBUG_POWER("Rx timeout = %u\n", le32_to_cpu(cmd->rx_data_timeout));
  1857. IWL_DEBUG_POWER("Sleep interval vector = { %d , %d , %d , %d , %d }\n",
  1858. le32_to_cpu(cmd->sleep_interval[0]),
  1859. le32_to_cpu(cmd->sleep_interval[1]),
  1860. le32_to_cpu(cmd->sleep_interval[2]),
  1861. le32_to_cpu(cmd->sleep_interval[3]),
  1862. le32_to_cpu(cmd->sleep_interval[4]));
  1863. return rc;
  1864. }
  1865. static int iwl_send_power_mode(struct iwl_priv *priv, u32 mode)
  1866. {
  1867. u32 final_mode = mode;
  1868. int rc;
  1869. struct iwl_powertable_cmd cmd;
  1870. /* If on battery, set to 3,
  1871. * if plugged into AC power, set to CAM ("continuosly aware mode"),
  1872. * else user level */
  1873. switch (mode) {
  1874. case IWL_POWER_BATTERY:
  1875. final_mode = IWL_POWER_INDEX_3;
  1876. break;
  1877. case IWL_POWER_AC:
  1878. final_mode = IWL_POWER_MODE_CAM;
  1879. break;
  1880. default:
  1881. final_mode = mode;
  1882. break;
  1883. }
  1884. cmd.keep_alive_beacons = 0;
  1885. iwl_update_power_cmd(priv, &cmd, final_mode);
  1886. rc = iwl_send_cmd_pdu(priv, POWER_TABLE_CMD, sizeof(cmd), &cmd);
  1887. if (final_mode == IWL_POWER_MODE_CAM)
  1888. clear_bit(STATUS_POWER_PMI, &priv->status);
  1889. else
  1890. set_bit(STATUS_POWER_PMI, &priv->status);
  1891. return rc;
  1892. }
  1893. int iwl_is_network_packet(struct iwl_priv *priv, struct ieee80211_hdr *header)
  1894. {
  1895. /* Filter incoming packets to determine if they are targeted toward
  1896. * this network, discarding packets coming from ourselves */
  1897. switch (priv->iw_mode) {
  1898. case IEEE80211_IF_TYPE_IBSS: /* Header: Dest. | Source | BSSID */
  1899. /* packets from our adapter are dropped (echo) */
  1900. if (!compare_ether_addr(header->addr2, priv->mac_addr))
  1901. return 0;
  1902. /* {broad,multi}cast packets to our IBSS go through */
  1903. if (is_multicast_ether_addr(header->addr1))
  1904. return !compare_ether_addr(header->addr3, priv->bssid);
  1905. /* packets to our adapter go through */
  1906. return !compare_ether_addr(header->addr1, priv->mac_addr);
  1907. case IEEE80211_IF_TYPE_STA: /* Header: Dest. | AP{BSSID} | Source */
  1908. /* packets from our adapter are dropped (echo) */
  1909. if (!compare_ether_addr(header->addr3, priv->mac_addr))
  1910. return 0;
  1911. /* {broad,multi}cast packets to our BSS go through */
  1912. if (is_multicast_ether_addr(header->addr1))
  1913. return !compare_ether_addr(header->addr2, priv->bssid);
  1914. /* packets to our adapter go through */
  1915. return !compare_ether_addr(header->addr1, priv->mac_addr);
  1916. }
  1917. return 1;
  1918. }
  1919. #define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
  1920. const char *iwl_get_tx_fail_reason(u32 status)
  1921. {
  1922. switch (status & TX_STATUS_MSK) {
  1923. case TX_STATUS_SUCCESS:
  1924. return "SUCCESS";
  1925. TX_STATUS_ENTRY(SHORT_LIMIT);
  1926. TX_STATUS_ENTRY(LONG_LIMIT);
  1927. TX_STATUS_ENTRY(FIFO_UNDERRUN);
  1928. TX_STATUS_ENTRY(MGMNT_ABORT);
  1929. TX_STATUS_ENTRY(NEXT_FRAG);
  1930. TX_STATUS_ENTRY(LIFE_EXPIRE);
  1931. TX_STATUS_ENTRY(DEST_PS);
  1932. TX_STATUS_ENTRY(ABORTED);
  1933. TX_STATUS_ENTRY(BT_RETRY);
  1934. TX_STATUS_ENTRY(STA_INVALID);
  1935. TX_STATUS_ENTRY(FRAG_DROPPED);
  1936. TX_STATUS_ENTRY(TID_DISABLE);
  1937. TX_STATUS_ENTRY(FRAME_FLUSHED);
  1938. TX_STATUS_ENTRY(INSUFFICIENT_CF_POLL);
  1939. TX_STATUS_ENTRY(TX_LOCKED);
  1940. TX_STATUS_ENTRY(NO_BEACON_ON_RADAR);
  1941. }
  1942. return "UNKNOWN";
  1943. }
  1944. /**
  1945. * iwl_scan_cancel - Cancel any currently executing HW scan
  1946. *
  1947. * NOTE: priv->mutex is not required before calling this function
  1948. */
  1949. static int iwl_scan_cancel(struct iwl_priv *priv)
  1950. {
  1951. if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
  1952. clear_bit(STATUS_SCANNING, &priv->status);
  1953. return 0;
  1954. }
  1955. if (test_bit(STATUS_SCANNING, &priv->status)) {
  1956. if (!test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  1957. IWL_DEBUG_SCAN("Queuing scan abort.\n");
  1958. set_bit(STATUS_SCAN_ABORTING, &priv->status);
  1959. queue_work(priv->workqueue, &priv->abort_scan);
  1960. } else
  1961. IWL_DEBUG_SCAN("Scan abort already in progress.\n");
  1962. return test_bit(STATUS_SCANNING, &priv->status);
  1963. }
  1964. return 0;
  1965. }
  1966. /**
  1967. * iwl_scan_cancel_timeout - Cancel any currently executing HW scan
  1968. * @ms: amount of time to wait (in milliseconds) for scan to abort
  1969. *
  1970. * NOTE: priv->mutex must be held before calling this function
  1971. */
  1972. static int iwl_scan_cancel_timeout(struct iwl_priv *priv, unsigned long ms)
  1973. {
  1974. unsigned long now = jiffies;
  1975. int ret;
  1976. ret = iwl_scan_cancel(priv);
  1977. if (ret && ms) {
  1978. mutex_unlock(&priv->mutex);
  1979. while (!time_after(jiffies, now + msecs_to_jiffies(ms)) &&
  1980. test_bit(STATUS_SCANNING, &priv->status))
  1981. msleep(1);
  1982. mutex_lock(&priv->mutex);
  1983. return test_bit(STATUS_SCANNING, &priv->status);
  1984. }
  1985. return ret;
  1986. }
  1987. static void iwl_sequence_reset(struct iwl_priv *priv)
  1988. {
  1989. /* Reset ieee stats */
  1990. /* We don't reset the net_device_stats (ieee->stats) on
  1991. * re-association */
  1992. priv->last_seq_num = -1;
  1993. priv->last_frag_num = -1;
  1994. priv->last_packet_time = 0;
  1995. iwl_scan_cancel(priv);
  1996. }
  1997. #define MAX_UCODE_BEACON_INTERVAL 4096
  1998. #define INTEL_CONN_LISTEN_INTERVAL __constant_cpu_to_le16(0xA)
  1999. static __le16 iwl_adjust_beacon_interval(u16 beacon_val)
  2000. {
  2001. u16 new_val = 0;
  2002. u16 beacon_factor = 0;
  2003. beacon_factor =
  2004. (beacon_val + MAX_UCODE_BEACON_INTERVAL)
  2005. / MAX_UCODE_BEACON_INTERVAL;
  2006. new_val = beacon_val / beacon_factor;
  2007. return cpu_to_le16(new_val);
  2008. }
  2009. static void iwl_setup_rxon_timing(struct iwl_priv *priv)
  2010. {
  2011. u64 interval_tm_unit;
  2012. u64 tsf, result;
  2013. unsigned long flags;
  2014. struct ieee80211_conf *conf = NULL;
  2015. u16 beacon_int = 0;
  2016. conf = ieee80211_get_hw_conf(priv->hw);
  2017. spin_lock_irqsave(&priv->lock, flags);
  2018. priv->rxon_timing.timestamp.dw[1] = cpu_to_le32(priv->timestamp1);
  2019. priv->rxon_timing.timestamp.dw[0] = cpu_to_le32(priv->timestamp0);
  2020. priv->rxon_timing.listen_interval = INTEL_CONN_LISTEN_INTERVAL;
  2021. tsf = priv->timestamp1;
  2022. tsf = ((tsf << 32) | priv->timestamp0);
  2023. beacon_int = priv->beacon_int;
  2024. spin_unlock_irqrestore(&priv->lock, flags);
  2025. if (priv->iw_mode == IEEE80211_IF_TYPE_STA) {
  2026. if (beacon_int == 0) {
  2027. priv->rxon_timing.beacon_interval = cpu_to_le16(100);
  2028. priv->rxon_timing.beacon_init_val = cpu_to_le32(102400);
  2029. } else {
  2030. priv->rxon_timing.beacon_interval =
  2031. cpu_to_le16(beacon_int);
  2032. priv->rxon_timing.beacon_interval =
  2033. iwl_adjust_beacon_interval(
  2034. le16_to_cpu(priv->rxon_timing.beacon_interval));
  2035. }
  2036. priv->rxon_timing.atim_window = 0;
  2037. } else {
  2038. priv->rxon_timing.beacon_interval =
  2039. iwl_adjust_beacon_interval(conf->beacon_int);
  2040. /* TODO: we need to get atim_window from upper stack
  2041. * for now we set to 0 */
  2042. priv->rxon_timing.atim_window = 0;
  2043. }
  2044. interval_tm_unit =
  2045. (le16_to_cpu(priv->rxon_timing.beacon_interval) * 1024);
  2046. result = do_div(tsf, interval_tm_unit);
  2047. priv->rxon_timing.beacon_init_val =
  2048. cpu_to_le32((u32) ((u64) interval_tm_unit - result));
  2049. IWL_DEBUG_ASSOC
  2050. ("beacon interval %d beacon timer %d beacon tim %d\n",
  2051. le16_to_cpu(priv->rxon_timing.beacon_interval),
  2052. le32_to_cpu(priv->rxon_timing.beacon_init_val),
  2053. le16_to_cpu(priv->rxon_timing.atim_window));
  2054. }
  2055. static int iwl_scan_initiate(struct iwl_priv *priv)
  2056. {
  2057. if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
  2058. IWL_ERROR("APs don't scan.\n");
  2059. return 0;
  2060. }
  2061. if (!iwl_is_ready_rf(priv)) {
  2062. IWL_DEBUG_SCAN("Aborting scan due to not ready.\n");
  2063. return -EIO;
  2064. }
  2065. if (test_bit(STATUS_SCANNING, &priv->status)) {
  2066. IWL_DEBUG_SCAN("Scan already in progress.\n");
  2067. return -EAGAIN;
  2068. }
  2069. if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  2070. IWL_DEBUG_SCAN("Scan request while abort pending. "
  2071. "Queuing.\n");
  2072. return -EAGAIN;
  2073. }
  2074. IWL_DEBUG_INFO("Starting scan...\n");
  2075. priv->scan_bands = 2;
  2076. set_bit(STATUS_SCANNING, &priv->status);
  2077. priv->scan_start = jiffies;
  2078. priv->scan_pass_start = priv->scan_start;
  2079. queue_work(priv->workqueue, &priv->request_scan);
  2080. return 0;
  2081. }
  2082. static int iwl_set_rxon_hwcrypto(struct iwl_priv *priv, int hw_decrypt)
  2083. {
  2084. struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
  2085. if (hw_decrypt)
  2086. rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
  2087. else
  2088. rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
  2089. return 0;
  2090. }
  2091. static void iwl_set_flags_for_phymode(struct iwl_priv *priv, u8 phymode)
  2092. {
  2093. if (phymode == MODE_IEEE80211A) {
  2094. priv->staging_rxon.flags &=
  2095. ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
  2096. | RXON_FLG_CCK_MSK);
  2097. priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  2098. } else {
  2099. /* Copied from iwl_bg_post_associate() */
  2100. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
  2101. priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  2102. else
  2103. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  2104. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
  2105. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  2106. priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
  2107. priv->staging_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK;
  2108. priv->staging_rxon.flags &= ~RXON_FLG_CCK_MSK;
  2109. }
  2110. }
  2111. /*
  2112. * initilize rxon structure with default values fromm eeprom
  2113. */
  2114. static void iwl_connection_init_rx_config(struct iwl_priv *priv)
  2115. {
  2116. const struct iwl_channel_info *ch_info;
  2117. memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon));
  2118. switch (priv->iw_mode) {
  2119. case IEEE80211_IF_TYPE_AP:
  2120. priv->staging_rxon.dev_type = RXON_DEV_TYPE_AP;
  2121. break;
  2122. case IEEE80211_IF_TYPE_STA:
  2123. priv->staging_rxon.dev_type = RXON_DEV_TYPE_ESS;
  2124. priv->staging_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
  2125. break;
  2126. case IEEE80211_IF_TYPE_IBSS:
  2127. priv->staging_rxon.dev_type = RXON_DEV_TYPE_IBSS;
  2128. priv->staging_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
  2129. priv->staging_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
  2130. RXON_FILTER_ACCEPT_GRP_MSK;
  2131. break;
  2132. case IEEE80211_IF_TYPE_MNTR:
  2133. priv->staging_rxon.dev_type = RXON_DEV_TYPE_SNIFFER;
  2134. priv->staging_rxon.filter_flags = RXON_FILTER_PROMISC_MSK |
  2135. RXON_FILTER_CTL2HOST_MSK | RXON_FILTER_ACCEPT_GRP_MSK;
  2136. break;
  2137. }
  2138. #if 0
  2139. /* TODO: Figure out when short_preamble would be set and cache from
  2140. * that */
  2141. if (!hw_to_local(priv->hw)->short_preamble)
  2142. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  2143. else
  2144. priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  2145. #endif
  2146. ch_info = iwl_get_channel_info(priv, priv->phymode,
  2147. le16_to_cpu(priv->staging_rxon.channel));
  2148. if (!ch_info)
  2149. ch_info = &priv->channel_info[0];
  2150. /*
  2151. * in some case A channels are all non IBSS
  2152. * in this case force B/G channel
  2153. */
  2154. if ((priv->iw_mode == IEEE80211_IF_TYPE_IBSS) &&
  2155. !(is_channel_ibss(ch_info)))
  2156. ch_info = &priv->channel_info[0];
  2157. priv->staging_rxon.channel = cpu_to_le16(ch_info->channel);
  2158. if (is_channel_a_band(ch_info))
  2159. priv->phymode = MODE_IEEE80211A;
  2160. else
  2161. priv->phymode = MODE_IEEE80211G;
  2162. iwl_set_flags_for_phymode(priv, priv->phymode);
  2163. priv->staging_rxon.ofdm_basic_rates =
  2164. (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
  2165. priv->staging_rxon.cck_basic_rates =
  2166. (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
  2167. priv->staging_rxon.flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED_MSK |
  2168. RXON_FLG_CHANNEL_MODE_PURE_40_MSK);
  2169. memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
  2170. memcpy(priv->staging_rxon.wlap_bssid_addr, priv->mac_addr, ETH_ALEN);
  2171. priv->staging_rxon.ofdm_ht_single_stream_basic_rates = 0xff;
  2172. priv->staging_rxon.ofdm_ht_dual_stream_basic_rates = 0xff;
  2173. iwl4965_set_rxon_chain(priv);
  2174. }
  2175. static int iwl_set_mode(struct iwl_priv *priv, int mode)
  2176. {
  2177. if (!iwl_is_ready_rf(priv))
  2178. return -EAGAIN;
  2179. if (mode == IEEE80211_IF_TYPE_IBSS) {
  2180. const struct iwl_channel_info *ch_info;
  2181. ch_info = iwl_get_channel_info(priv,
  2182. priv->phymode,
  2183. le16_to_cpu(priv->staging_rxon.channel));
  2184. if (!ch_info || !is_channel_ibss(ch_info)) {
  2185. IWL_ERROR("channel %d not IBSS channel\n",
  2186. le16_to_cpu(priv->staging_rxon.channel));
  2187. return -EINVAL;
  2188. }
  2189. }
  2190. cancel_delayed_work(&priv->scan_check);
  2191. if (iwl_scan_cancel_timeout(priv, 100)) {
  2192. IWL_WARNING("Aborted scan still in progress after 100ms\n");
  2193. IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
  2194. return -EAGAIN;
  2195. }
  2196. priv->iw_mode = mode;
  2197. iwl_connection_init_rx_config(priv);
  2198. memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
  2199. iwl_clear_stations_table(priv);
  2200. iwl_commit_rxon(priv);
  2201. return 0;
  2202. }
  2203. static void iwl_build_tx_cmd_hwcrypto(struct iwl_priv *priv,
  2204. struct ieee80211_tx_control *ctl,
  2205. struct iwl_cmd *cmd,
  2206. struct sk_buff *skb_frag,
  2207. int last_frag)
  2208. {
  2209. struct iwl_hw_key *keyinfo = &priv->stations[ctl->key_idx].keyinfo;
  2210. switch (keyinfo->alg) {
  2211. case ALG_CCMP:
  2212. cmd->cmd.tx.sec_ctl = TX_CMD_SEC_CCM;
  2213. memcpy(cmd->cmd.tx.key, keyinfo->key, keyinfo->keylen);
  2214. IWL_DEBUG_TX("tx_cmd with aes hwcrypto\n");
  2215. break;
  2216. case ALG_TKIP:
  2217. #if 0
  2218. cmd->cmd.tx.sec_ctl = TX_CMD_SEC_TKIP;
  2219. if (last_frag)
  2220. memcpy(cmd->cmd.tx.tkip_mic.byte, skb_frag->tail - 8,
  2221. 8);
  2222. else
  2223. memset(cmd->cmd.tx.tkip_mic.byte, 0, 8);
  2224. #endif
  2225. break;
  2226. case ALG_WEP:
  2227. cmd->cmd.tx.sec_ctl = TX_CMD_SEC_WEP |
  2228. (ctl->key_idx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT;
  2229. if (keyinfo->keylen == 13)
  2230. cmd->cmd.tx.sec_ctl |= TX_CMD_SEC_KEY128;
  2231. memcpy(&cmd->cmd.tx.key[3], keyinfo->key, keyinfo->keylen);
  2232. IWL_DEBUG_TX("Configuring packet for WEP encryption "
  2233. "with key %d\n", ctl->key_idx);
  2234. break;
  2235. case ALG_NONE:
  2236. IWL_DEBUG_TX("Tx packet in the clear (encrypt requested).\n");
  2237. break;
  2238. default:
  2239. printk(KERN_ERR "Unknown encode alg %d\n", keyinfo->alg);
  2240. break;
  2241. }
  2242. }
  2243. /*
  2244. * handle build REPLY_TX command notification.
  2245. */
  2246. static void iwl_build_tx_cmd_basic(struct iwl_priv *priv,
  2247. struct iwl_cmd *cmd,
  2248. struct ieee80211_tx_control *ctrl,
  2249. struct ieee80211_hdr *hdr,
  2250. int is_unicast, u8 std_id)
  2251. {
  2252. __le16 *qc;
  2253. u16 fc = le16_to_cpu(hdr->frame_control);
  2254. __le32 tx_flags = cmd->cmd.tx.tx_flags;
  2255. cmd->cmd.tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  2256. if (!(ctrl->flags & IEEE80211_TXCTL_NO_ACK)) {
  2257. tx_flags |= TX_CMD_FLG_ACK_MSK;
  2258. if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT)
  2259. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  2260. if (ieee80211_is_probe_response(fc) &&
  2261. !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
  2262. tx_flags |= TX_CMD_FLG_TSF_MSK;
  2263. } else {
  2264. tx_flags &= (~TX_CMD_FLG_ACK_MSK);
  2265. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  2266. }
  2267. cmd->cmd.tx.sta_id = std_id;
  2268. if (ieee80211_get_morefrag(hdr))
  2269. tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
  2270. qc = ieee80211_get_qos_ctrl(hdr);
  2271. if (qc) {
  2272. cmd->cmd.tx.tid_tspec = (u8) (le16_to_cpu(*qc) & 0xf);
  2273. tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
  2274. } else
  2275. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  2276. if (ctrl->flags & IEEE80211_TXCTL_USE_RTS_CTS) {
  2277. tx_flags |= TX_CMD_FLG_RTS_MSK;
  2278. tx_flags &= ~TX_CMD_FLG_CTS_MSK;
  2279. } else if (ctrl->flags & IEEE80211_TXCTL_USE_CTS_PROTECT) {
  2280. tx_flags &= ~TX_CMD_FLG_RTS_MSK;
  2281. tx_flags |= TX_CMD_FLG_CTS_MSK;
  2282. }
  2283. if ((tx_flags & TX_CMD_FLG_RTS_MSK) || (tx_flags & TX_CMD_FLG_CTS_MSK))
  2284. tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
  2285. tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
  2286. if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT) {
  2287. if ((fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_ASSOC_REQ ||
  2288. (fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_REASSOC_REQ)
  2289. cmd->cmd.tx.timeout.pm_frame_timeout =
  2290. cpu_to_le16(3);
  2291. else
  2292. cmd->cmd.tx.timeout.pm_frame_timeout =
  2293. cpu_to_le16(2);
  2294. } else
  2295. cmd->cmd.tx.timeout.pm_frame_timeout = 0;
  2296. cmd->cmd.tx.driver_txop = 0;
  2297. cmd->cmd.tx.tx_flags = tx_flags;
  2298. cmd->cmd.tx.next_frame_len = 0;
  2299. }
  2300. static int iwl_get_sta_id(struct iwl_priv *priv, struct ieee80211_hdr *hdr)
  2301. {
  2302. int sta_id;
  2303. u16 fc = le16_to_cpu(hdr->frame_control);
  2304. /* If this frame is broadcast or not data then use the broadcast
  2305. * station id */
  2306. if (((fc & IEEE80211_FCTL_FTYPE) != IEEE80211_FTYPE_DATA) ||
  2307. is_multicast_ether_addr(hdr->addr1))
  2308. return priv->hw_setting.bcast_sta_id;
  2309. switch (priv->iw_mode) {
  2310. /* If this frame is part of a BSS network (we're a station), then
  2311. * we use the AP's station id */
  2312. case IEEE80211_IF_TYPE_STA:
  2313. return IWL_AP_ID;
  2314. /* If we are an AP, then find the station, or use BCAST */
  2315. case IEEE80211_IF_TYPE_AP:
  2316. sta_id = iwl_hw_find_station(priv, hdr->addr1);
  2317. if (sta_id != IWL_INVALID_STATION)
  2318. return sta_id;
  2319. return priv->hw_setting.bcast_sta_id;
  2320. /* If this frame is part of a IBSS network, then we use the
  2321. * target specific station id */
  2322. case IEEE80211_IF_TYPE_IBSS:
  2323. sta_id = iwl_hw_find_station(priv, hdr->addr1);
  2324. if (sta_id != IWL_INVALID_STATION)
  2325. return sta_id;
  2326. sta_id = iwl_add_station(priv, hdr->addr1, 0, CMD_ASYNC);
  2327. if (sta_id != IWL_INVALID_STATION)
  2328. return sta_id;
  2329. IWL_DEBUG_DROP("Station " MAC_FMT " not in station map. "
  2330. "Defaulting to broadcast...\n",
  2331. MAC_ARG(hdr->addr1));
  2332. iwl_print_hex_dump(IWL_DL_DROP, (u8 *) hdr, sizeof(*hdr));
  2333. return priv->hw_setting.bcast_sta_id;
  2334. default:
  2335. IWL_WARNING("Unkown mode of operation: %d", priv->iw_mode);
  2336. return priv->hw_setting.bcast_sta_id;
  2337. }
  2338. }
  2339. /*
  2340. * start REPLY_TX command process
  2341. */
  2342. static int iwl_tx_skb(struct iwl_priv *priv,
  2343. struct sk_buff *skb, struct ieee80211_tx_control *ctl)
  2344. {
  2345. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  2346. struct iwl_tfd_frame *tfd;
  2347. u32 *control_flags;
  2348. int txq_id = ctl->queue;
  2349. struct iwl_tx_queue *txq = NULL;
  2350. struct iwl_queue *q = NULL;
  2351. dma_addr_t phys_addr;
  2352. dma_addr_t txcmd_phys;
  2353. struct iwl_cmd *out_cmd = NULL;
  2354. u16 len, idx, len_org;
  2355. u8 id, hdr_len, unicast;
  2356. u8 sta_id;
  2357. u16 seq_number = 0;
  2358. u16 fc;
  2359. __le16 *qc;
  2360. u8 wait_write_ptr = 0;
  2361. unsigned long flags;
  2362. int rc;
  2363. spin_lock_irqsave(&priv->lock, flags);
  2364. if (iwl_is_rfkill(priv)) {
  2365. IWL_DEBUG_DROP("Dropping - RF KILL\n");
  2366. goto drop_unlock;
  2367. }
  2368. if (!priv->interface_id) {
  2369. IWL_DEBUG_DROP("Dropping - !priv->interface_id\n");
  2370. goto drop_unlock;
  2371. }
  2372. if ((ctl->tx_rate & 0xFF) == IWL_INVALID_RATE) {
  2373. IWL_ERROR("ERROR: No TX rate available.\n");
  2374. goto drop_unlock;
  2375. }
  2376. unicast = !is_multicast_ether_addr(hdr->addr1);
  2377. id = 0;
  2378. fc = le16_to_cpu(hdr->frame_control);
  2379. #ifdef CONFIG_IWLWIFI_DEBUG
  2380. if (ieee80211_is_auth(fc))
  2381. IWL_DEBUG_TX("Sending AUTH frame\n");
  2382. else if (ieee80211_is_assoc_request(fc))
  2383. IWL_DEBUG_TX("Sending ASSOC frame\n");
  2384. else if (ieee80211_is_reassoc_request(fc))
  2385. IWL_DEBUG_TX("Sending REASSOC frame\n");
  2386. #endif
  2387. if (!iwl_is_associated(priv) &&
  2388. ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_DATA)) {
  2389. IWL_DEBUG_DROP("Dropping - !iwl_is_associated\n");
  2390. goto drop_unlock;
  2391. }
  2392. spin_unlock_irqrestore(&priv->lock, flags);
  2393. hdr_len = ieee80211_get_hdrlen(fc);
  2394. sta_id = iwl_get_sta_id(priv, hdr);
  2395. if (sta_id == IWL_INVALID_STATION) {
  2396. IWL_DEBUG_DROP("Dropping - INVALID STATION: " MAC_FMT "\n",
  2397. MAC_ARG(hdr->addr1));
  2398. goto drop;
  2399. }
  2400. IWL_DEBUG_RATE("station Id %d\n", sta_id);
  2401. qc = ieee80211_get_qos_ctrl(hdr);
  2402. if (qc) {
  2403. u8 tid = (u8)(le16_to_cpu(*qc) & 0xf);
  2404. seq_number = priv->stations[sta_id].tid[tid].seq_number &
  2405. IEEE80211_SCTL_SEQ;
  2406. hdr->seq_ctrl = cpu_to_le16(seq_number) |
  2407. (hdr->seq_ctrl &
  2408. __constant_cpu_to_le16(IEEE80211_SCTL_FRAG));
  2409. seq_number += 0x10;
  2410. #ifdef CONFIG_IWLWIFI_HT
  2411. #ifdef CONFIG_IWLWIFI_HT_AGG
  2412. /* aggregation is on for this <sta,tid> */
  2413. if (ctl->flags & IEEE80211_TXCTL_HT_MPDU_AGG)
  2414. txq_id = priv->stations[sta_id].tid[tid].agg.txq_id;
  2415. #endif /* CONFIG_IWLWIFI_HT_AGG */
  2416. #endif /* CONFIG_IWLWIFI_HT */
  2417. }
  2418. txq = &priv->txq[txq_id];
  2419. q = &txq->q;
  2420. spin_lock_irqsave(&priv->lock, flags);
  2421. tfd = &txq->bd[q->first_empty];
  2422. memset(tfd, 0, sizeof(*tfd));
  2423. control_flags = (u32 *) tfd;
  2424. idx = get_cmd_index(q, q->first_empty, 0);
  2425. memset(&(txq->txb[q->first_empty]), 0, sizeof(struct iwl_tx_info));
  2426. txq->txb[q->first_empty].skb[0] = skb;
  2427. memcpy(&(txq->txb[q->first_empty].status.control),
  2428. ctl, sizeof(struct ieee80211_tx_control));
  2429. out_cmd = &txq->cmd[idx];
  2430. memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
  2431. memset(&out_cmd->cmd.tx, 0, sizeof(out_cmd->cmd.tx));
  2432. out_cmd->hdr.cmd = REPLY_TX;
  2433. out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
  2434. INDEX_TO_SEQ(q->first_empty)));
  2435. /* copy frags header */
  2436. memcpy(out_cmd->cmd.tx.hdr, hdr, hdr_len);
  2437. /* hdr = (struct ieee80211_hdr *)out_cmd->cmd.tx.hdr; */
  2438. len = priv->hw_setting.tx_cmd_len +
  2439. sizeof(struct iwl_cmd_header) + hdr_len;
  2440. len_org = len;
  2441. len = (len + 3) & ~3;
  2442. if (len_org != len)
  2443. len_org = 1;
  2444. else
  2445. len_org = 0;
  2446. txcmd_phys = txq->dma_addr_cmd + sizeof(struct iwl_cmd) * idx +
  2447. offsetof(struct iwl_cmd, hdr);
  2448. iwl_hw_txq_attach_buf_to_tfd(priv, tfd, txcmd_phys, len);
  2449. if (!(ctl->flags & IEEE80211_TXCTL_DO_NOT_ENCRYPT))
  2450. iwl_build_tx_cmd_hwcrypto(priv, ctl, out_cmd, skb, 0);
  2451. /* 802.11 null functions have no payload... */
  2452. len = skb->len - hdr_len;
  2453. if (len) {
  2454. phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len,
  2455. len, PCI_DMA_TODEVICE);
  2456. iwl_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, len);
  2457. }
  2458. if (len_org)
  2459. out_cmd->cmd.tx.tx_flags |= TX_CMD_FLG_MH_PAD_MSK;
  2460. len = (u16)skb->len;
  2461. out_cmd->cmd.tx.len = cpu_to_le16(len);
  2462. /* TODO need this for burst mode later on */
  2463. iwl_build_tx_cmd_basic(priv, out_cmd, ctl, hdr, unicast, sta_id);
  2464. /* set is_hcca to 0; it probably will never be implemented */
  2465. iwl_hw_build_tx_cmd_rate(priv, out_cmd, ctl, hdr, sta_id, 0);
  2466. iwl4965_tx_cmd(priv, out_cmd, sta_id, txcmd_phys,
  2467. hdr, hdr_len, ctl, NULL);
  2468. if (!ieee80211_get_morefrag(hdr)) {
  2469. txq->need_update = 1;
  2470. if (qc) {
  2471. u8 tid = (u8)(le16_to_cpu(*qc) & 0xf);
  2472. priv->stations[sta_id].tid[tid].seq_number = seq_number;
  2473. }
  2474. } else {
  2475. wait_write_ptr = 1;
  2476. txq->need_update = 0;
  2477. }
  2478. iwl_print_hex_dump(IWL_DL_TX, out_cmd->cmd.payload,
  2479. sizeof(out_cmd->cmd.tx));
  2480. iwl_print_hex_dump(IWL_DL_TX, (u8 *)out_cmd->cmd.tx.hdr,
  2481. ieee80211_get_hdrlen(fc));
  2482. iwl4965_tx_queue_update_wr_ptr(priv, txq, len);
  2483. q->first_empty = iwl_queue_inc_wrap(q->first_empty, q->n_bd);
  2484. rc = iwl_tx_queue_update_write_ptr(priv, txq);
  2485. spin_unlock_irqrestore(&priv->lock, flags);
  2486. if (rc)
  2487. return rc;
  2488. if ((iwl_queue_space(q) < q->high_mark)
  2489. && priv->mac80211_registered) {
  2490. if (wait_write_ptr) {
  2491. spin_lock_irqsave(&priv->lock, flags);
  2492. txq->need_update = 1;
  2493. iwl_tx_queue_update_write_ptr(priv, txq);
  2494. spin_unlock_irqrestore(&priv->lock, flags);
  2495. }
  2496. ieee80211_stop_queue(priv->hw, ctl->queue);
  2497. }
  2498. return 0;
  2499. drop_unlock:
  2500. spin_unlock_irqrestore(&priv->lock, flags);
  2501. drop:
  2502. return -1;
  2503. }
  2504. static void iwl_set_rate(struct iwl_priv *priv)
  2505. {
  2506. const struct ieee80211_hw_mode *hw = NULL;
  2507. struct ieee80211_rate *rate;
  2508. int i;
  2509. hw = iwl_get_hw_mode(priv, priv->phymode);
  2510. priv->active_rate = 0;
  2511. priv->active_rate_basic = 0;
  2512. IWL_DEBUG_RATE("Setting rates for 802.11%c\n",
  2513. hw->mode == MODE_IEEE80211A ?
  2514. 'a' : ((hw->mode == MODE_IEEE80211B) ? 'b' : 'g'));
  2515. for (i = 0; i < hw->num_rates; i++) {
  2516. rate = &(hw->rates[i]);
  2517. if ((rate->val < IWL_RATE_COUNT) &&
  2518. (rate->flags & IEEE80211_RATE_SUPPORTED)) {
  2519. IWL_DEBUG_RATE("Adding rate index %d (plcp %d)%s\n",
  2520. rate->val, iwl_rates[rate->val].plcp,
  2521. (rate->flags & IEEE80211_RATE_BASIC) ?
  2522. "*" : "");
  2523. priv->active_rate |= (1 << rate->val);
  2524. if (rate->flags & IEEE80211_RATE_BASIC)
  2525. priv->active_rate_basic |= (1 << rate->val);
  2526. } else
  2527. IWL_DEBUG_RATE("Not adding rate %d (plcp %d)\n",
  2528. rate->val, iwl_rates[rate->val].plcp);
  2529. }
  2530. IWL_DEBUG_RATE("Set active_rate = %0x, active_rate_basic = %0x\n",
  2531. priv->active_rate, priv->active_rate_basic);
  2532. /*
  2533. * If a basic rate is configured, then use it (adding IWL_RATE_1M_MASK)
  2534. * otherwise set it to the default of all CCK rates and 6, 12, 24 for
  2535. * OFDM
  2536. */
  2537. if (priv->active_rate_basic & IWL_CCK_BASIC_RATES_MASK)
  2538. priv->staging_rxon.cck_basic_rates =
  2539. ((priv->active_rate_basic &
  2540. IWL_CCK_RATES_MASK) >> IWL_FIRST_CCK_RATE) & 0xF;
  2541. else
  2542. priv->staging_rxon.cck_basic_rates =
  2543. (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
  2544. if (priv->active_rate_basic & IWL_OFDM_BASIC_RATES_MASK)
  2545. priv->staging_rxon.ofdm_basic_rates =
  2546. ((priv->active_rate_basic &
  2547. (IWL_OFDM_BASIC_RATES_MASK | IWL_RATE_6M_MASK)) >>
  2548. IWL_FIRST_OFDM_RATE) & 0xFF;
  2549. else
  2550. priv->staging_rxon.ofdm_basic_rates =
  2551. (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
  2552. }
  2553. static void iwl_radio_kill_sw(struct iwl_priv *priv, int disable_radio)
  2554. {
  2555. unsigned long flags;
  2556. if (!!disable_radio == test_bit(STATUS_RF_KILL_SW, &priv->status))
  2557. return;
  2558. IWL_DEBUG_RF_KILL("Manual SW RF KILL set to: RADIO %s\n",
  2559. disable_radio ? "OFF" : "ON");
  2560. if (disable_radio) {
  2561. iwl_scan_cancel(priv);
  2562. /* FIXME: This is a workaround for AP */
  2563. if (priv->iw_mode != IEEE80211_IF_TYPE_AP) {
  2564. spin_lock_irqsave(&priv->lock, flags);
  2565. iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
  2566. CSR_UCODE_SW_BIT_RFKILL);
  2567. spin_unlock_irqrestore(&priv->lock, flags);
  2568. iwl_send_card_state(priv, CARD_STATE_CMD_DISABLE, 0);
  2569. set_bit(STATUS_RF_KILL_SW, &priv->status);
  2570. }
  2571. return;
  2572. }
  2573. spin_lock_irqsave(&priv->lock, flags);
  2574. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  2575. clear_bit(STATUS_RF_KILL_SW, &priv->status);
  2576. spin_unlock_irqrestore(&priv->lock, flags);
  2577. /* wake up ucode */
  2578. msleep(10);
  2579. spin_lock_irqsave(&priv->lock, flags);
  2580. iwl_read32(priv, CSR_UCODE_DRV_GP1);
  2581. if (!iwl_grab_restricted_access(priv))
  2582. iwl_release_restricted_access(priv);
  2583. spin_unlock_irqrestore(&priv->lock, flags);
  2584. if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
  2585. IWL_DEBUG_RF_KILL("Can not turn radio back on - "
  2586. "disabled by HW switch\n");
  2587. return;
  2588. }
  2589. queue_work(priv->workqueue, &priv->restart);
  2590. return;
  2591. }
  2592. void iwl_set_decrypted_flag(struct iwl_priv *priv, struct sk_buff *skb,
  2593. u32 decrypt_res, struct ieee80211_rx_status *stats)
  2594. {
  2595. u16 fc =
  2596. le16_to_cpu(((struct ieee80211_hdr *)skb->data)->frame_control);
  2597. if (priv->active_rxon.filter_flags & RXON_FILTER_DIS_DECRYPT_MSK)
  2598. return;
  2599. if (!(fc & IEEE80211_FCTL_PROTECTED))
  2600. return;
  2601. IWL_DEBUG_RX("decrypt_res:0x%x\n", decrypt_res);
  2602. switch (decrypt_res & RX_RES_STATUS_SEC_TYPE_MSK) {
  2603. case RX_RES_STATUS_SEC_TYPE_TKIP:
  2604. if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
  2605. RX_RES_STATUS_BAD_ICV_MIC)
  2606. stats->flag |= RX_FLAG_MMIC_ERROR;
  2607. case RX_RES_STATUS_SEC_TYPE_WEP:
  2608. case RX_RES_STATUS_SEC_TYPE_CCMP:
  2609. if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
  2610. RX_RES_STATUS_DECRYPT_OK) {
  2611. IWL_DEBUG_RX("hw decrypt successfully!!!\n");
  2612. stats->flag |= RX_FLAG_DECRYPTED;
  2613. }
  2614. break;
  2615. default:
  2616. break;
  2617. }
  2618. }
  2619. void iwl_handle_data_packet_monitor(struct iwl_priv *priv,
  2620. struct iwl_rx_mem_buffer *rxb,
  2621. void *data, short len,
  2622. struct ieee80211_rx_status *stats,
  2623. u16 phy_flags)
  2624. {
  2625. struct iwl_rt_rx_hdr *iwl_rt;
  2626. /* First cache any information we need before we overwrite
  2627. * the information provided in the skb from the hardware */
  2628. s8 signal = stats->ssi;
  2629. s8 noise = 0;
  2630. int rate = stats->rate;
  2631. u64 tsf = stats->mactime;
  2632. __le16 phy_flags_hw = cpu_to_le16(phy_flags);
  2633. /* We received data from the HW, so stop the watchdog */
  2634. if (len > IWL_RX_BUF_SIZE - sizeof(*iwl_rt)) {
  2635. IWL_DEBUG_DROP("Dropping too large packet in monitor\n");
  2636. return;
  2637. }
  2638. /* copy the frame data to write after where the radiotap header goes */
  2639. iwl_rt = (void *)rxb->skb->data;
  2640. memmove(iwl_rt->payload, data, len);
  2641. iwl_rt->rt_hdr.it_version = PKTHDR_RADIOTAP_VERSION;
  2642. iwl_rt->rt_hdr.it_pad = 0; /* always good to zero */
  2643. /* total header + data */
  2644. iwl_rt->rt_hdr.it_len = cpu_to_le16(sizeof(*iwl_rt));
  2645. /* Set the size of the skb to the size of the frame */
  2646. skb_put(rxb->skb, sizeof(*iwl_rt) + len);
  2647. /* Big bitfield of all the fields we provide in radiotap */
  2648. iwl_rt->rt_hdr.it_present =
  2649. cpu_to_le32((1 << IEEE80211_RADIOTAP_TSFT) |
  2650. (1 << IEEE80211_RADIOTAP_FLAGS) |
  2651. (1 << IEEE80211_RADIOTAP_RATE) |
  2652. (1 << IEEE80211_RADIOTAP_CHANNEL) |
  2653. (1 << IEEE80211_RADIOTAP_DBM_ANTSIGNAL) |
  2654. (1 << IEEE80211_RADIOTAP_DBM_ANTNOISE) |
  2655. (1 << IEEE80211_RADIOTAP_ANTENNA));
  2656. /* Zero the flags, we'll add to them as we go */
  2657. iwl_rt->rt_flags = 0;
  2658. iwl_rt->rt_tsf = cpu_to_le64(tsf);
  2659. /* Convert to dBm */
  2660. iwl_rt->rt_dbmsignal = signal;
  2661. iwl_rt->rt_dbmnoise = noise;
  2662. /* Convert the channel frequency and set the flags */
  2663. iwl_rt->rt_channelMHz = cpu_to_le16(stats->freq);
  2664. if (!(phy_flags_hw & RX_RES_PHY_FLAGS_BAND_24_MSK))
  2665. iwl_rt->rt_chbitmask =
  2666. cpu_to_le16((IEEE80211_CHAN_OFDM | IEEE80211_CHAN_5GHZ));
  2667. else if (phy_flags_hw & RX_RES_PHY_FLAGS_MOD_CCK_MSK)
  2668. iwl_rt->rt_chbitmask =
  2669. cpu_to_le16((IEEE80211_CHAN_CCK | IEEE80211_CHAN_2GHZ));
  2670. else /* 802.11g */
  2671. iwl_rt->rt_chbitmask =
  2672. cpu_to_le16((IEEE80211_CHAN_OFDM | IEEE80211_CHAN_2GHZ));
  2673. rate = iwl_rate_index_from_plcp(rate);
  2674. if (rate == -1)
  2675. iwl_rt->rt_rate = 0;
  2676. else
  2677. iwl_rt->rt_rate = iwl_rates[rate].ieee;
  2678. /* antenna number */
  2679. iwl_rt->rt_antenna =
  2680. le16_to_cpu(phy_flags_hw & RX_RES_PHY_FLAGS_ANTENNA_MSK) >> 4;
  2681. /* set the preamble flag if we have it */
  2682. if (phy_flags_hw & RX_RES_PHY_FLAGS_SHORT_PREAMBLE_MSK)
  2683. iwl_rt->rt_flags |= IEEE80211_RADIOTAP_F_SHORTPRE;
  2684. IWL_DEBUG_RX("Rx packet of %d bytes.\n", rxb->skb->len);
  2685. stats->flag |= RX_FLAG_RADIOTAP;
  2686. ieee80211_rx_irqsafe(priv->hw, rxb->skb, stats);
  2687. rxb->skb = NULL;
  2688. }
  2689. #define IWL_PACKET_RETRY_TIME HZ
  2690. int is_duplicate_packet(struct iwl_priv *priv, struct ieee80211_hdr *header)
  2691. {
  2692. u16 sc = le16_to_cpu(header->seq_ctrl);
  2693. u16 seq = (sc & IEEE80211_SCTL_SEQ) >> 4;
  2694. u16 frag = sc & IEEE80211_SCTL_FRAG;
  2695. u16 *last_seq, *last_frag;
  2696. unsigned long *last_time;
  2697. switch (priv->iw_mode) {
  2698. case IEEE80211_IF_TYPE_IBSS:{
  2699. struct list_head *p;
  2700. struct iwl_ibss_seq *entry = NULL;
  2701. u8 *mac = header->addr2;
  2702. int index = mac[5] & (IWL_IBSS_MAC_HASH_SIZE - 1);
  2703. __list_for_each(p, &priv->ibss_mac_hash[index]) {
  2704. entry =
  2705. list_entry(p, struct iwl_ibss_seq, list);
  2706. if (!compare_ether_addr(entry->mac, mac))
  2707. break;
  2708. }
  2709. if (p == &priv->ibss_mac_hash[index]) {
  2710. entry = kzalloc(sizeof(*entry), GFP_ATOMIC);
  2711. if (!entry) {
  2712. IWL_ERROR
  2713. ("Cannot malloc new mac entry\n");
  2714. return 0;
  2715. }
  2716. memcpy(entry->mac, mac, ETH_ALEN);
  2717. entry->seq_num = seq;
  2718. entry->frag_num = frag;
  2719. entry->packet_time = jiffies;
  2720. list_add(&entry->list,
  2721. &priv->ibss_mac_hash[index]);
  2722. return 0;
  2723. }
  2724. last_seq = &entry->seq_num;
  2725. last_frag = &entry->frag_num;
  2726. last_time = &entry->packet_time;
  2727. break;
  2728. }
  2729. case IEEE80211_IF_TYPE_STA:
  2730. last_seq = &priv->last_seq_num;
  2731. last_frag = &priv->last_frag_num;
  2732. last_time = &priv->last_packet_time;
  2733. break;
  2734. default:
  2735. return 0;
  2736. }
  2737. if ((*last_seq == seq) &&
  2738. time_after(*last_time + IWL_PACKET_RETRY_TIME, jiffies)) {
  2739. if (*last_frag == frag)
  2740. goto drop;
  2741. if (*last_frag + 1 != frag)
  2742. /* out-of-order fragment */
  2743. goto drop;
  2744. } else
  2745. *last_seq = seq;
  2746. *last_frag = frag;
  2747. *last_time = jiffies;
  2748. return 0;
  2749. drop:
  2750. return 1;
  2751. }
  2752. #ifdef CONFIG_IWLWIFI_SPECTRUM_MEASUREMENT
  2753. #include "iwl-spectrum.h"
  2754. #define BEACON_TIME_MASK_LOW 0x00FFFFFF
  2755. #define BEACON_TIME_MASK_HIGH 0xFF000000
  2756. #define TIME_UNIT 1024
  2757. /*
  2758. * extended beacon time format
  2759. * time in usec will be changed into a 32-bit value in 8:24 format
  2760. * the high 1 byte is the beacon counts
  2761. * the lower 3 bytes is the time in usec within one beacon interval
  2762. */
  2763. static u32 iwl_usecs_to_beacons(u32 usec, u32 beacon_interval)
  2764. {
  2765. u32 quot;
  2766. u32 rem;
  2767. u32 interval = beacon_interval * 1024;
  2768. if (!interval || !usec)
  2769. return 0;
  2770. quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24);
  2771. rem = (usec % interval) & BEACON_TIME_MASK_LOW;
  2772. return (quot << 24) + rem;
  2773. }
  2774. /* base is usually what we get from ucode with each received frame,
  2775. * the same as HW timer counter counting down
  2776. */
  2777. static __le32 iwl_add_beacon_time(u32 base, u32 addon, u32 beacon_interval)
  2778. {
  2779. u32 base_low = base & BEACON_TIME_MASK_LOW;
  2780. u32 addon_low = addon & BEACON_TIME_MASK_LOW;
  2781. u32 interval = beacon_interval * TIME_UNIT;
  2782. u32 res = (base & BEACON_TIME_MASK_HIGH) +
  2783. (addon & BEACON_TIME_MASK_HIGH);
  2784. if (base_low > addon_low)
  2785. res += base_low - addon_low;
  2786. else if (base_low < addon_low) {
  2787. res += interval + base_low - addon_low;
  2788. res += (1 << 24);
  2789. } else
  2790. res += (1 << 24);
  2791. return cpu_to_le32(res);
  2792. }
  2793. static int iwl_get_measurement(struct iwl_priv *priv,
  2794. struct ieee80211_measurement_params *params,
  2795. u8 type)
  2796. {
  2797. struct iwl_spectrum_cmd spectrum;
  2798. struct iwl_rx_packet *res;
  2799. struct iwl_host_cmd cmd = {
  2800. .id = REPLY_SPECTRUM_MEASUREMENT_CMD,
  2801. .data = (void *)&spectrum,
  2802. .meta.flags = CMD_WANT_SKB,
  2803. };
  2804. u32 add_time = le64_to_cpu(params->start_time);
  2805. int rc;
  2806. int spectrum_resp_status;
  2807. int duration = le16_to_cpu(params->duration);
  2808. if (iwl_is_associated(priv))
  2809. add_time =
  2810. iwl_usecs_to_beacons(
  2811. le64_to_cpu(params->start_time) - priv->last_tsf,
  2812. le16_to_cpu(priv->rxon_timing.beacon_interval));
  2813. memset(&spectrum, 0, sizeof(spectrum));
  2814. spectrum.channel_count = cpu_to_le16(1);
  2815. spectrum.flags =
  2816. RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
  2817. spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
  2818. cmd.len = sizeof(spectrum);
  2819. spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
  2820. if (iwl_is_associated(priv))
  2821. spectrum.start_time =
  2822. iwl_add_beacon_time(priv->last_beacon_time,
  2823. add_time,
  2824. le16_to_cpu(priv->rxon_timing.beacon_interval));
  2825. else
  2826. spectrum.start_time = 0;
  2827. spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
  2828. spectrum.channels[0].channel = params->channel;
  2829. spectrum.channels[0].type = type;
  2830. if (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK)
  2831. spectrum.flags |= RXON_FLG_BAND_24G_MSK |
  2832. RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK;
  2833. rc = iwl_send_cmd_sync(priv, &cmd);
  2834. if (rc)
  2835. return rc;
  2836. res = (struct iwl_rx_packet *)cmd.meta.u.skb->data;
  2837. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  2838. IWL_ERROR("Bad return from REPLY_RX_ON_ASSOC command\n");
  2839. rc = -EIO;
  2840. }
  2841. spectrum_resp_status = le16_to_cpu(res->u.spectrum.status);
  2842. switch (spectrum_resp_status) {
  2843. case 0: /* Command will be handled */
  2844. if (res->u.spectrum.id != 0xff) {
  2845. IWL_DEBUG_INFO
  2846. ("Replaced existing measurement: %d\n",
  2847. res->u.spectrum.id);
  2848. priv->measurement_status &= ~MEASUREMENT_READY;
  2849. }
  2850. priv->measurement_status |= MEASUREMENT_ACTIVE;
  2851. rc = 0;
  2852. break;
  2853. case 1: /* Command will not be handled */
  2854. rc = -EAGAIN;
  2855. break;
  2856. }
  2857. dev_kfree_skb_any(cmd.meta.u.skb);
  2858. return rc;
  2859. }
  2860. #endif
  2861. static void iwl_txstatus_to_ieee(struct iwl_priv *priv,
  2862. struct iwl_tx_info *tx_sta)
  2863. {
  2864. tx_sta->status.ack_signal = 0;
  2865. tx_sta->status.excessive_retries = 0;
  2866. tx_sta->status.queue_length = 0;
  2867. tx_sta->status.queue_number = 0;
  2868. if (in_interrupt())
  2869. ieee80211_tx_status_irqsafe(priv->hw,
  2870. tx_sta->skb[0], &(tx_sta->status));
  2871. else
  2872. ieee80211_tx_status(priv->hw,
  2873. tx_sta->skb[0], &(tx_sta->status));
  2874. tx_sta->skb[0] = NULL;
  2875. }
  2876. /**
  2877. * iwl_tx_queue_reclaim - Reclaim Tx queue entries no more used by NIC.
  2878. *
  2879. * When FW advances 'R' index, all entries between old and
  2880. * new 'R' index need to be reclaimed. As result, some free space
  2881. * forms. If there is enough free space (> low mark), wake Tx queue.
  2882. */
  2883. int iwl_tx_queue_reclaim(struct iwl_priv *priv, int txq_id, int index)
  2884. {
  2885. struct iwl_tx_queue *txq = &priv->txq[txq_id];
  2886. struct iwl_queue *q = &txq->q;
  2887. int nfreed = 0;
  2888. if ((index >= q->n_bd) || (x2_queue_used(q, index) == 0)) {
  2889. IWL_ERROR("Read index for DMA queue txq id (%d), index %d, "
  2890. "is out of range [0-%d] %d %d.\n", txq_id,
  2891. index, q->n_bd, q->first_empty, q->last_used);
  2892. return 0;
  2893. }
  2894. for (index = iwl_queue_inc_wrap(index, q->n_bd);
  2895. q->last_used != index;
  2896. q->last_used = iwl_queue_inc_wrap(q->last_used, q->n_bd)) {
  2897. if (txq_id != IWL_CMD_QUEUE_NUM) {
  2898. iwl_txstatus_to_ieee(priv,
  2899. &(txq->txb[txq->q.last_used]));
  2900. iwl_hw_txq_free_tfd(priv, txq);
  2901. } else if (nfreed > 1) {
  2902. IWL_ERROR("HCMD skipped: index (%d) %d %d\n", index,
  2903. q->first_empty, q->last_used);
  2904. queue_work(priv->workqueue, &priv->restart);
  2905. }
  2906. nfreed++;
  2907. }
  2908. if (iwl_queue_space(q) > q->low_mark && (txq_id >= 0) &&
  2909. (txq_id != IWL_CMD_QUEUE_NUM) &&
  2910. priv->mac80211_registered)
  2911. ieee80211_wake_queue(priv->hw, txq_id);
  2912. return nfreed;
  2913. }
  2914. static int iwl_is_tx_success(u32 status)
  2915. {
  2916. status &= TX_STATUS_MSK;
  2917. return (status == TX_STATUS_SUCCESS)
  2918. || (status == TX_STATUS_DIRECT_DONE);
  2919. }
  2920. /******************************************************************************
  2921. *
  2922. * Generic RX handler implementations
  2923. *
  2924. ******************************************************************************/
  2925. #ifdef CONFIG_IWLWIFI_HT
  2926. #ifdef CONFIG_IWLWIFI_HT_AGG
  2927. static inline int iwl_get_ra_sta_id(struct iwl_priv *priv,
  2928. struct ieee80211_hdr *hdr)
  2929. {
  2930. if (priv->iw_mode == IEEE80211_IF_TYPE_STA)
  2931. return IWL_AP_ID;
  2932. else {
  2933. u8 *da = ieee80211_get_DA(hdr);
  2934. return iwl_hw_find_station(priv, da);
  2935. }
  2936. }
  2937. static struct ieee80211_hdr *iwl_tx_queue_get_hdr(
  2938. struct iwl_priv *priv, int txq_id, int idx)
  2939. {
  2940. if (priv->txq[txq_id].txb[idx].skb[0])
  2941. return (struct ieee80211_hdr *)priv->txq[txq_id].
  2942. txb[idx].skb[0]->data;
  2943. return NULL;
  2944. }
  2945. static inline u32 iwl_get_scd_ssn(struct iwl_tx_resp *tx_resp)
  2946. {
  2947. __le32 *scd_ssn = (__le32 *)((u32 *)&tx_resp->status +
  2948. tx_resp->frame_count);
  2949. return le32_to_cpu(*scd_ssn) & MAX_SN;
  2950. }
  2951. static int iwl4965_tx_status_reply_tx(struct iwl_priv *priv,
  2952. struct iwl_ht_agg *agg,
  2953. struct iwl_tx_resp *tx_resp,
  2954. u16 start_idx)
  2955. {
  2956. u32 status;
  2957. __le32 *frame_status = &tx_resp->status;
  2958. struct ieee80211_tx_status *tx_status = NULL;
  2959. struct ieee80211_hdr *hdr = NULL;
  2960. int i, sh;
  2961. int txq_id, idx;
  2962. u16 seq;
  2963. if (agg->wait_for_ba)
  2964. IWL_DEBUG_TX_REPLY("got tx repsons w/o back\n");
  2965. agg->frame_count = tx_resp->frame_count;
  2966. agg->start_idx = start_idx;
  2967. agg->rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags);
  2968. agg->bitmap0 = agg->bitmap1 = 0;
  2969. if (agg->frame_count == 1) {
  2970. struct iwl_tx_queue *txq ;
  2971. status = le32_to_cpu(frame_status[0]);
  2972. txq_id = agg->txq_id;
  2973. txq = &priv->txq[txq_id];
  2974. /* FIXME: code repetition */
  2975. IWL_DEBUG_TX_REPLY("FrameCnt = %d, StartIdx=%d \n",
  2976. agg->frame_count, agg->start_idx);
  2977. tx_status = &(priv->txq[txq_id].txb[txq->q.last_used].status);
  2978. tx_status->retry_count = tx_resp->failure_frame;
  2979. tx_status->queue_number = status & 0xff;
  2980. tx_status->queue_length = tx_resp->bt_kill_count;
  2981. tx_status->queue_length |= tx_resp->failure_rts;
  2982. tx_status->flags = iwl_is_tx_success(status)?
  2983. IEEE80211_TX_STATUS_ACK : 0;
  2984. tx_status->control.tx_rate =
  2985. iwl_hw_get_rate_n_flags(tx_resp->rate_n_flags);
  2986. /* FIXME: code repetition end */
  2987. IWL_DEBUG_TX_REPLY("1 Frame 0x%x failure :%d\n",
  2988. status & 0xff, tx_resp->failure_frame);
  2989. IWL_DEBUG_TX_REPLY("Rate Info rate_n_flags=%x\n",
  2990. iwl_hw_get_rate_n_flags(tx_resp->rate_n_flags));
  2991. agg->wait_for_ba = 0;
  2992. } else {
  2993. u64 bitmap = 0;
  2994. int start = agg->start_idx;
  2995. for (i = 0; i < agg->frame_count; i++) {
  2996. u16 sc;
  2997. status = le32_to_cpu(frame_status[i]);
  2998. seq = status >> 16;
  2999. idx = SEQ_TO_INDEX(seq);
  3000. txq_id = SEQ_TO_QUEUE(seq);
  3001. if (status & (AGG_TX_STATE_FEW_BYTES_MSK |
  3002. AGG_TX_STATE_ABORT_MSK))
  3003. continue;
  3004. IWL_DEBUG_TX_REPLY("FrameCnt = %d, txq_id=%d idx=%d\n",
  3005. agg->frame_count, txq_id, idx);
  3006. hdr = iwl_tx_queue_get_hdr(priv, txq_id, idx);
  3007. sc = le16_to_cpu(hdr->seq_ctrl);
  3008. if (idx != (SEQ_TO_SN(sc) & 0xff)) {
  3009. IWL_ERROR("BUG_ON idx doesn't match seq control"
  3010. " idx=%d, seq_idx=%d, seq=%d\n",
  3011. idx, SEQ_TO_SN(sc),
  3012. hdr->seq_ctrl);
  3013. return -1;
  3014. }
  3015. IWL_DEBUG_TX_REPLY("AGG Frame i=%d idx %d seq=%d\n",
  3016. i, idx, SEQ_TO_SN(sc));
  3017. sh = idx - start;
  3018. if (sh > 64) {
  3019. sh = (start - idx) + 0xff;
  3020. bitmap = bitmap << sh;
  3021. sh = 0;
  3022. start = idx;
  3023. } else if (sh < -64)
  3024. sh = 0xff - (start - idx);
  3025. else if (sh < 0) {
  3026. sh = start - idx;
  3027. start = idx;
  3028. bitmap = bitmap << sh;
  3029. sh = 0;
  3030. }
  3031. bitmap |= (1 << sh);
  3032. IWL_DEBUG_TX_REPLY("start=%d bitmap=0x%x\n",
  3033. start, (u32)(bitmap & 0xFFFFFFFF));
  3034. }
  3035. agg->bitmap0 = bitmap & 0xFFFFFFFF;
  3036. agg->bitmap1 = bitmap >> 32;
  3037. agg->start_idx = start;
  3038. agg->rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags);
  3039. IWL_DEBUG_TX_REPLY("Frames %d start_idx=%d bitmap=0x%x\n",
  3040. agg->frame_count, agg->start_idx,
  3041. agg->bitmap0);
  3042. if (bitmap)
  3043. agg->wait_for_ba = 1;
  3044. }
  3045. return 0;
  3046. }
  3047. #endif
  3048. #endif
  3049. static void iwl_rx_reply_tx(struct iwl_priv *priv,
  3050. struct iwl_rx_mem_buffer *rxb)
  3051. {
  3052. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  3053. u16 sequence = le16_to_cpu(pkt->hdr.sequence);
  3054. int txq_id = SEQ_TO_QUEUE(sequence);
  3055. int index = SEQ_TO_INDEX(sequence);
  3056. struct iwl_tx_queue *txq = &priv->txq[txq_id];
  3057. struct ieee80211_tx_status *tx_status;
  3058. struct iwl_tx_resp *tx_resp = (void *)&pkt->u.raw[0];
  3059. u32 status = le32_to_cpu(tx_resp->status);
  3060. #ifdef CONFIG_IWLWIFI_HT
  3061. #ifdef CONFIG_IWLWIFI_HT_AGG
  3062. int tid, sta_id;
  3063. #endif
  3064. #endif
  3065. if ((index >= txq->q.n_bd) || (x2_queue_used(&txq->q, index) == 0)) {
  3066. IWL_ERROR("Read index for DMA queue txq_id (%d) index %d "
  3067. "is out of range [0-%d] %d %d\n", txq_id,
  3068. index, txq->q.n_bd, txq->q.first_empty,
  3069. txq->q.last_used);
  3070. return;
  3071. }
  3072. #ifdef CONFIG_IWLWIFI_HT
  3073. #ifdef CONFIG_IWLWIFI_HT_AGG
  3074. if (txq->sched_retry) {
  3075. const u32 scd_ssn = iwl_get_scd_ssn(tx_resp);
  3076. struct ieee80211_hdr *hdr =
  3077. iwl_tx_queue_get_hdr(priv, txq_id, index);
  3078. struct iwl_ht_agg *agg = NULL;
  3079. __le16 *qc = ieee80211_get_qos_ctrl(hdr);
  3080. if (qc == NULL) {
  3081. IWL_ERROR("BUG_ON qc is null!!!!\n");
  3082. return;
  3083. }
  3084. tid = le16_to_cpu(*qc) & 0xf;
  3085. sta_id = iwl_get_ra_sta_id(priv, hdr);
  3086. if (unlikely(sta_id == IWL_INVALID_STATION)) {
  3087. IWL_ERROR("Station not known for\n");
  3088. return;
  3089. }
  3090. agg = &priv->stations[sta_id].tid[tid].agg;
  3091. iwl4965_tx_status_reply_tx(priv, agg, tx_resp, index);
  3092. if ((tx_resp->frame_count == 1) &&
  3093. !iwl_is_tx_success(status)) {
  3094. /* TODO: send BAR */
  3095. }
  3096. if ((txq->q.last_used != (scd_ssn & 0xff))) {
  3097. index = iwl_queue_dec_wrap(scd_ssn & 0xff, txq->q.n_bd);
  3098. IWL_DEBUG_TX_REPLY("Retry scheduler reclaim scd_ssn "
  3099. "%d index %d\n", scd_ssn , index);
  3100. iwl_tx_queue_reclaim(priv, txq_id, index);
  3101. }
  3102. } else {
  3103. #endif /* CONFIG_IWLWIFI_HT_AGG */
  3104. #endif /* CONFIG_IWLWIFI_HT */
  3105. tx_status = &(txq->txb[txq->q.last_used].status);
  3106. tx_status->retry_count = tx_resp->failure_frame;
  3107. tx_status->queue_number = status;
  3108. tx_status->queue_length = tx_resp->bt_kill_count;
  3109. tx_status->queue_length |= tx_resp->failure_rts;
  3110. tx_status->flags =
  3111. iwl_is_tx_success(status) ? IEEE80211_TX_STATUS_ACK : 0;
  3112. tx_status->control.tx_rate =
  3113. iwl_hw_get_rate_n_flags(tx_resp->rate_n_flags);
  3114. IWL_DEBUG_TX("Tx queue %d Status %s (0x%08x) rate_n_flags 0x%x "
  3115. "retries %d\n", txq_id, iwl_get_tx_fail_reason(status),
  3116. status, le32_to_cpu(tx_resp->rate_n_flags),
  3117. tx_resp->failure_frame);
  3118. IWL_DEBUG_TX_REPLY("Tx queue reclaim %d\n", index);
  3119. if (index != -1)
  3120. iwl_tx_queue_reclaim(priv, txq_id, index);
  3121. #ifdef CONFIG_IWLWIFI_HT
  3122. #ifdef CONFIG_IWLWIFI_HT_AGG
  3123. }
  3124. #endif /* CONFIG_IWLWIFI_HT_AGG */
  3125. #endif /* CONFIG_IWLWIFI_HT */
  3126. if (iwl_check_bits(status, TX_ABORT_REQUIRED_MSK))
  3127. IWL_ERROR("TODO: Implement Tx ABORT REQUIRED!!!\n");
  3128. }
  3129. static void iwl_rx_reply_alive(struct iwl_priv *priv,
  3130. struct iwl_rx_mem_buffer *rxb)
  3131. {
  3132. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  3133. struct iwl_alive_resp *palive;
  3134. struct delayed_work *pwork;
  3135. palive = &pkt->u.alive_frame;
  3136. IWL_DEBUG_INFO("Alive ucode status 0x%08X revision "
  3137. "0x%01X 0x%01X\n",
  3138. palive->is_valid, palive->ver_type,
  3139. palive->ver_subtype);
  3140. if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
  3141. IWL_DEBUG_INFO("Initialization Alive received.\n");
  3142. memcpy(&priv->card_alive_init,
  3143. &pkt->u.alive_frame,
  3144. sizeof(struct iwl_init_alive_resp));
  3145. pwork = &priv->init_alive_start;
  3146. } else {
  3147. IWL_DEBUG_INFO("Runtime Alive received.\n");
  3148. memcpy(&priv->card_alive, &pkt->u.alive_frame,
  3149. sizeof(struct iwl_alive_resp));
  3150. pwork = &priv->alive_start;
  3151. }
  3152. /* We delay the ALIVE response by 5ms to
  3153. * give the HW RF Kill time to activate... */
  3154. if (palive->is_valid == UCODE_VALID_OK)
  3155. queue_delayed_work(priv->workqueue, pwork,
  3156. msecs_to_jiffies(5));
  3157. else
  3158. IWL_WARNING("uCode did not respond OK.\n");
  3159. }
  3160. static void iwl_rx_reply_add_sta(struct iwl_priv *priv,
  3161. struct iwl_rx_mem_buffer *rxb)
  3162. {
  3163. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  3164. IWL_DEBUG_RX("Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status);
  3165. return;
  3166. }
  3167. static void iwl_rx_reply_error(struct iwl_priv *priv,
  3168. struct iwl_rx_mem_buffer *rxb)
  3169. {
  3170. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  3171. IWL_ERROR("Error Reply type 0x%08X cmd %s (0x%02X) "
  3172. "seq 0x%04X ser 0x%08X\n",
  3173. le32_to_cpu(pkt->u.err_resp.error_type),
  3174. get_cmd_string(pkt->u.err_resp.cmd_id),
  3175. pkt->u.err_resp.cmd_id,
  3176. le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
  3177. le32_to_cpu(pkt->u.err_resp.error_info));
  3178. }
  3179. #define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
  3180. static void iwl_rx_csa(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb)
  3181. {
  3182. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  3183. struct iwl_rxon_cmd *rxon = (void *)&priv->active_rxon;
  3184. struct iwl_csa_notification *csa = &(pkt->u.csa_notif);
  3185. IWL_DEBUG_11H("CSA notif: channel %d, status %d\n",
  3186. le16_to_cpu(csa->channel), le32_to_cpu(csa->status));
  3187. rxon->channel = csa->channel;
  3188. priv->staging_rxon.channel = csa->channel;
  3189. }
  3190. static void iwl_rx_spectrum_measure_notif(struct iwl_priv *priv,
  3191. struct iwl_rx_mem_buffer *rxb)
  3192. {
  3193. #ifdef CONFIG_IWLWIFI_SPECTRUM_MEASUREMENT
  3194. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  3195. struct iwl_spectrum_notification *report = &(pkt->u.spectrum_notif);
  3196. if (!report->state) {
  3197. IWL_DEBUG(IWL_DL_11H | IWL_DL_INFO,
  3198. "Spectrum Measure Notification: Start\n");
  3199. return;
  3200. }
  3201. memcpy(&priv->measure_report, report, sizeof(*report));
  3202. priv->measurement_status |= MEASUREMENT_READY;
  3203. #endif
  3204. }
  3205. static void iwl_rx_pm_sleep_notif(struct iwl_priv *priv,
  3206. struct iwl_rx_mem_buffer *rxb)
  3207. {
  3208. #ifdef CONFIG_IWLWIFI_DEBUG
  3209. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  3210. struct iwl_sleep_notification *sleep = &(pkt->u.sleep_notif);
  3211. IWL_DEBUG_RX("sleep mode: %d, src: %d\n",
  3212. sleep->pm_sleep_mode, sleep->pm_wakeup_src);
  3213. #endif
  3214. }
  3215. static void iwl_rx_pm_debug_statistics_notif(struct iwl_priv *priv,
  3216. struct iwl_rx_mem_buffer *rxb)
  3217. {
  3218. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  3219. IWL_DEBUG_RADIO("Dumping %d bytes of unhandled "
  3220. "notification for %s:\n",
  3221. le32_to_cpu(pkt->len), get_cmd_string(pkt->hdr.cmd));
  3222. iwl_print_hex_dump(IWL_DL_RADIO, pkt->u.raw, le32_to_cpu(pkt->len));
  3223. }
  3224. static void iwl_bg_beacon_update(struct work_struct *work)
  3225. {
  3226. struct iwl_priv *priv =
  3227. container_of(work, struct iwl_priv, beacon_update);
  3228. struct sk_buff *beacon;
  3229. /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
  3230. beacon = ieee80211_beacon_get(priv->hw, priv->interface_id, NULL);
  3231. if (!beacon) {
  3232. IWL_ERROR("update beacon failed\n");
  3233. return;
  3234. }
  3235. mutex_lock(&priv->mutex);
  3236. /* new beacon skb is allocated every time; dispose previous.*/
  3237. if (priv->ibss_beacon)
  3238. dev_kfree_skb(priv->ibss_beacon);
  3239. priv->ibss_beacon = beacon;
  3240. mutex_unlock(&priv->mutex);
  3241. iwl_send_beacon_cmd(priv);
  3242. }
  3243. static void iwl_rx_beacon_notif(struct iwl_priv *priv,
  3244. struct iwl_rx_mem_buffer *rxb)
  3245. {
  3246. #ifdef CONFIG_IWLWIFI_DEBUG
  3247. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  3248. struct iwl_beacon_notif *beacon = &(pkt->u.beacon_status);
  3249. u8 rate = iwl_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags);
  3250. IWL_DEBUG_RX("beacon status %x retries %d iss %d "
  3251. "tsf %d %d rate %d\n",
  3252. le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
  3253. beacon->beacon_notify_hdr.failure_frame,
  3254. le32_to_cpu(beacon->ibss_mgr_status),
  3255. le32_to_cpu(beacon->high_tsf),
  3256. le32_to_cpu(beacon->low_tsf), rate);
  3257. #endif
  3258. if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) &&
  3259. (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
  3260. queue_work(priv->workqueue, &priv->beacon_update);
  3261. }
  3262. /* Service response to REPLY_SCAN_CMD (0x80) */
  3263. static void iwl_rx_reply_scan(struct iwl_priv *priv,
  3264. struct iwl_rx_mem_buffer *rxb)
  3265. {
  3266. #ifdef CONFIG_IWLWIFI_DEBUG
  3267. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  3268. struct iwl_scanreq_notification *notif =
  3269. (struct iwl_scanreq_notification *)pkt->u.raw;
  3270. IWL_DEBUG_RX("Scan request status = 0x%x\n", notif->status);
  3271. #endif
  3272. }
  3273. /* Service SCAN_START_NOTIFICATION (0x82) */
  3274. static void iwl_rx_scan_start_notif(struct iwl_priv *priv,
  3275. struct iwl_rx_mem_buffer *rxb)
  3276. {
  3277. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  3278. struct iwl_scanstart_notification *notif =
  3279. (struct iwl_scanstart_notification *)pkt->u.raw;
  3280. priv->scan_start_tsf = le32_to_cpu(notif->tsf_low);
  3281. IWL_DEBUG_SCAN("Scan start: "
  3282. "%d [802.11%s] "
  3283. "(TSF: 0x%08X:%08X) - %d (beacon timer %u)\n",
  3284. notif->channel,
  3285. notif->band ? "bg" : "a",
  3286. notif->tsf_high,
  3287. notif->tsf_low, notif->status, notif->beacon_timer);
  3288. }
  3289. /* Service SCAN_RESULTS_NOTIFICATION (0x83) */
  3290. static void iwl_rx_scan_results_notif(struct iwl_priv *priv,
  3291. struct iwl_rx_mem_buffer *rxb)
  3292. {
  3293. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  3294. struct iwl_scanresults_notification *notif =
  3295. (struct iwl_scanresults_notification *)pkt->u.raw;
  3296. IWL_DEBUG_SCAN("Scan ch.res: "
  3297. "%d [802.11%s] "
  3298. "(TSF: 0x%08X:%08X) - %d "
  3299. "elapsed=%lu usec (%dms since last)\n",
  3300. notif->channel,
  3301. notif->band ? "bg" : "a",
  3302. le32_to_cpu(notif->tsf_high),
  3303. le32_to_cpu(notif->tsf_low),
  3304. le32_to_cpu(notif->statistics[0]),
  3305. le32_to_cpu(notif->tsf_low) - priv->scan_start_tsf,
  3306. jiffies_to_msecs(elapsed_jiffies
  3307. (priv->last_scan_jiffies, jiffies)));
  3308. priv->last_scan_jiffies = jiffies;
  3309. }
  3310. /* Service SCAN_COMPLETE_NOTIFICATION (0x84) */
  3311. static void iwl_rx_scan_complete_notif(struct iwl_priv *priv,
  3312. struct iwl_rx_mem_buffer *rxb)
  3313. {
  3314. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  3315. struct iwl_scancomplete_notification *scan_notif = (void *)pkt->u.raw;
  3316. IWL_DEBUG_SCAN("Scan complete: %d channels (TSF 0x%08X:%08X) - %d\n",
  3317. scan_notif->scanned_channels,
  3318. scan_notif->tsf_low,
  3319. scan_notif->tsf_high, scan_notif->status);
  3320. /* The HW is no longer scanning */
  3321. clear_bit(STATUS_SCAN_HW, &priv->status);
  3322. /* The scan completion notification came in, so kill that timer... */
  3323. cancel_delayed_work(&priv->scan_check);
  3324. IWL_DEBUG_INFO("Scan pass on %sGHz took %dms\n",
  3325. (priv->scan_bands == 2) ? "2.4" : "5.2",
  3326. jiffies_to_msecs(elapsed_jiffies
  3327. (priv->scan_pass_start, jiffies)));
  3328. /* Remove this scanned band from the list
  3329. * of pending bands to scan */
  3330. priv->scan_bands--;
  3331. /* If a request to abort was given, or the scan did not succeed
  3332. * then we reset the scan state machine and terminate,
  3333. * re-queuing another scan if one has been requested */
  3334. if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  3335. IWL_DEBUG_INFO("Aborted scan completed.\n");
  3336. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  3337. } else {
  3338. /* If there are more bands on this scan pass reschedule */
  3339. if (priv->scan_bands > 0)
  3340. goto reschedule;
  3341. }
  3342. priv->last_scan_jiffies = jiffies;
  3343. IWL_DEBUG_INFO("Setting scan to off\n");
  3344. clear_bit(STATUS_SCANNING, &priv->status);
  3345. IWL_DEBUG_INFO("Scan took %dms\n",
  3346. jiffies_to_msecs(elapsed_jiffies(priv->scan_start, jiffies)));
  3347. queue_work(priv->workqueue, &priv->scan_completed);
  3348. return;
  3349. reschedule:
  3350. priv->scan_pass_start = jiffies;
  3351. queue_work(priv->workqueue, &priv->request_scan);
  3352. }
  3353. /* Handle notification from uCode that card's power state is changing
  3354. * due to software, hardware, or critical temperature RFKILL */
  3355. static void iwl_rx_card_state_notif(struct iwl_priv *priv,
  3356. struct iwl_rx_mem_buffer *rxb)
  3357. {
  3358. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  3359. u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
  3360. unsigned long status = priv->status;
  3361. IWL_DEBUG_RF_KILL("Card state received: HW:%s SW:%s\n",
  3362. (flags & HW_CARD_DISABLED) ? "Kill" : "On",
  3363. (flags & SW_CARD_DISABLED) ? "Kill" : "On");
  3364. if (flags & (SW_CARD_DISABLED | HW_CARD_DISABLED |
  3365. RF_CARD_DISABLED)) {
  3366. iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
  3367. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  3368. if (!iwl_grab_restricted_access(priv)) {
  3369. iwl_write_restricted(
  3370. priv, HBUS_TARG_MBX_C,
  3371. HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
  3372. iwl_release_restricted_access(priv);
  3373. }
  3374. if (!(flags & RXON_CARD_DISABLED)) {
  3375. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
  3376. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  3377. if (!iwl_grab_restricted_access(priv)) {
  3378. iwl_write_restricted(
  3379. priv, HBUS_TARG_MBX_C,
  3380. HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
  3381. iwl_release_restricted_access(priv);
  3382. }
  3383. }
  3384. if (flags & RF_CARD_DISABLED) {
  3385. iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
  3386. CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
  3387. iwl_read32(priv, CSR_UCODE_DRV_GP1);
  3388. if (!iwl_grab_restricted_access(priv))
  3389. iwl_release_restricted_access(priv);
  3390. }
  3391. }
  3392. if (flags & HW_CARD_DISABLED)
  3393. set_bit(STATUS_RF_KILL_HW, &priv->status);
  3394. else
  3395. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  3396. if (flags & SW_CARD_DISABLED)
  3397. set_bit(STATUS_RF_KILL_SW, &priv->status);
  3398. else
  3399. clear_bit(STATUS_RF_KILL_SW, &priv->status);
  3400. if (!(flags & RXON_CARD_DISABLED))
  3401. iwl_scan_cancel(priv);
  3402. if ((test_bit(STATUS_RF_KILL_HW, &status) !=
  3403. test_bit(STATUS_RF_KILL_HW, &priv->status)) ||
  3404. (test_bit(STATUS_RF_KILL_SW, &status) !=
  3405. test_bit(STATUS_RF_KILL_SW, &priv->status)))
  3406. queue_work(priv->workqueue, &priv->rf_kill);
  3407. else
  3408. wake_up_interruptible(&priv->wait_command_queue);
  3409. }
  3410. /**
  3411. * iwl_setup_rx_handlers - Initialize Rx handler callbacks
  3412. *
  3413. * Setup the RX handlers for each of the reply types sent from the uCode
  3414. * to the host.
  3415. *
  3416. * This function chains into the hardware specific files for them to setup
  3417. * any hardware specific handlers as well.
  3418. */
  3419. static void iwl_setup_rx_handlers(struct iwl_priv *priv)
  3420. {
  3421. priv->rx_handlers[REPLY_ALIVE] = iwl_rx_reply_alive;
  3422. priv->rx_handlers[REPLY_ADD_STA] = iwl_rx_reply_add_sta;
  3423. priv->rx_handlers[REPLY_ERROR] = iwl_rx_reply_error;
  3424. priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl_rx_csa;
  3425. priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
  3426. iwl_rx_spectrum_measure_notif;
  3427. priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl_rx_pm_sleep_notif;
  3428. priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
  3429. iwl_rx_pm_debug_statistics_notif;
  3430. priv->rx_handlers[BEACON_NOTIFICATION] = iwl_rx_beacon_notif;
  3431. /* NOTE: iwl_rx_statistics is different based on whether
  3432. * the build is for the 3945 or the 4965. See the
  3433. * corresponding implementation in iwl-XXXX.c
  3434. *
  3435. * The same handler is used for both the REPLY to a
  3436. * discrete statistics request from the host as well as
  3437. * for the periodic statistics notification from the uCode
  3438. */
  3439. priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl_hw_rx_statistics;
  3440. priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl_hw_rx_statistics;
  3441. priv->rx_handlers[REPLY_SCAN_CMD] = iwl_rx_reply_scan;
  3442. priv->rx_handlers[SCAN_START_NOTIFICATION] = iwl_rx_scan_start_notif;
  3443. priv->rx_handlers[SCAN_RESULTS_NOTIFICATION] =
  3444. iwl_rx_scan_results_notif;
  3445. priv->rx_handlers[SCAN_COMPLETE_NOTIFICATION] =
  3446. iwl_rx_scan_complete_notif;
  3447. priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl_rx_card_state_notif;
  3448. priv->rx_handlers[REPLY_TX] = iwl_rx_reply_tx;
  3449. /* Setup hardware specific Rx handlers */
  3450. iwl_hw_rx_handler_setup(priv);
  3451. }
  3452. /**
  3453. * iwl_tx_cmd_complete - Pull unused buffers off the queue and reclaim them
  3454. * @rxb: Rx buffer to reclaim
  3455. *
  3456. * If an Rx buffer has an async callback associated with it the callback
  3457. * will be executed. The attached skb (if present) will only be freed
  3458. * if the callback returns 1
  3459. */
  3460. static void iwl_tx_cmd_complete(struct iwl_priv *priv,
  3461. struct iwl_rx_mem_buffer *rxb)
  3462. {
  3463. struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
  3464. u16 sequence = le16_to_cpu(pkt->hdr.sequence);
  3465. int txq_id = SEQ_TO_QUEUE(sequence);
  3466. int index = SEQ_TO_INDEX(sequence);
  3467. int huge = sequence & SEQ_HUGE_FRAME;
  3468. int cmd_index;
  3469. struct iwl_cmd *cmd;
  3470. /* If a Tx command is being handled and it isn't in the actual
  3471. * command queue then there a command routing bug has been introduced
  3472. * in the queue management code. */
  3473. if (txq_id != IWL_CMD_QUEUE_NUM)
  3474. IWL_ERROR("Error wrong command queue %d command id 0x%X\n",
  3475. txq_id, pkt->hdr.cmd);
  3476. BUG_ON(txq_id != IWL_CMD_QUEUE_NUM);
  3477. cmd_index = get_cmd_index(&priv->txq[IWL_CMD_QUEUE_NUM].q, index, huge);
  3478. cmd = &priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_index];
  3479. /* Input error checking is done when commands are added to queue. */
  3480. if (cmd->meta.flags & CMD_WANT_SKB) {
  3481. cmd->meta.source->u.skb = rxb->skb;
  3482. rxb->skb = NULL;
  3483. } else if (cmd->meta.u.callback &&
  3484. !cmd->meta.u.callback(priv, cmd, rxb->skb))
  3485. rxb->skb = NULL;
  3486. iwl_tx_queue_reclaim(priv, txq_id, index);
  3487. if (!(cmd->meta.flags & CMD_ASYNC)) {
  3488. clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
  3489. wake_up_interruptible(&priv->wait_command_queue);
  3490. }
  3491. }
  3492. /************************** RX-FUNCTIONS ****************************/
  3493. /*
  3494. * Rx theory of operation
  3495. *
  3496. * The host allocates 32 DMA target addresses and passes the host address
  3497. * to the firmware at register IWL_RFDS_TABLE_LOWER + N * RFD_SIZE where N is
  3498. * 0 to 31
  3499. *
  3500. * Rx Queue Indexes
  3501. * The host/firmware share two index registers for managing the Rx buffers.
  3502. *
  3503. * The READ index maps to the first position that the firmware may be writing
  3504. * to -- the driver can read up to (but not including) this position and get
  3505. * good data.
  3506. * The READ index is managed by the firmware once the card is enabled.
  3507. *
  3508. * The WRITE index maps to the last position the driver has read from -- the
  3509. * position preceding WRITE is the last slot the firmware can place a packet.
  3510. *
  3511. * The queue is empty (no good data) if WRITE = READ - 1, and is full if
  3512. * WRITE = READ.
  3513. *
  3514. * During initialization the host sets up the READ queue position to the first
  3515. * INDEX position, and WRITE to the last (READ - 1 wrapped)
  3516. *
  3517. * When the firmware places a packet in a buffer it will advance the READ index
  3518. * and fire the RX interrupt. The driver can then query the READ index and
  3519. * process as many packets as possible, moving the WRITE index forward as it
  3520. * resets the Rx queue buffers with new memory.
  3521. *
  3522. * The management in the driver is as follows:
  3523. * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
  3524. * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
  3525. * to replensish the iwl->rxq->rx_free.
  3526. * + In iwl_rx_replenish (scheduled) if 'processed' != 'read' then the
  3527. * iwl->rxq is replenished and the READ INDEX is updated (updating the
  3528. * 'processed' and 'read' driver indexes as well)
  3529. * + A received packet is processed and handed to the kernel network stack,
  3530. * detached from the iwl->rxq. The driver 'processed' index is updated.
  3531. * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
  3532. * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
  3533. * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there
  3534. * were enough free buffers and RX_STALLED is set it is cleared.
  3535. *
  3536. *
  3537. * Driver sequence:
  3538. *
  3539. * iwl_rx_queue_alloc() Allocates rx_free
  3540. * iwl_rx_replenish() Replenishes rx_free list from rx_used, and calls
  3541. * iwl_rx_queue_restock
  3542. * iwl_rx_queue_restock() Moves available buffers from rx_free into Rx
  3543. * queue, updates firmware pointers, and updates
  3544. * the WRITE index. If insufficient rx_free buffers
  3545. * are available, schedules iwl_rx_replenish
  3546. *
  3547. * -- enable interrupts --
  3548. * ISR - iwl_rx() Detach iwl_rx_mem_buffers from pool up to the
  3549. * READ INDEX, detaching the SKB from the pool.
  3550. * Moves the packet buffer from queue to rx_used.
  3551. * Calls iwl_rx_queue_restock to refill any empty
  3552. * slots.
  3553. * ...
  3554. *
  3555. */
  3556. /**
  3557. * iwl_rx_queue_space - Return number of free slots available in queue.
  3558. */
  3559. static int iwl_rx_queue_space(const struct iwl_rx_queue *q)
  3560. {
  3561. int s = q->read - q->write;
  3562. if (s <= 0)
  3563. s += RX_QUEUE_SIZE;
  3564. /* keep some buffer to not confuse full and empty queue */
  3565. s -= 2;
  3566. if (s < 0)
  3567. s = 0;
  3568. return s;
  3569. }
  3570. /**
  3571. * iwl_rx_queue_update_write_ptr - Update the write pointer for the RX queue
  3572. *
  3573. * NOTE: This function has 3945 and 4965 specific code sections
  3574. * but is declared in base due to the majority of the
  3575. * implementation being the same (only a numeric constant is
  3576. * different)
  3577. *
  3578. */
  3579. int iwl_rx_queue_update_write_ptr(struct iwl_priv *priv, struct iwl_rx_queue *q)
  3580. {
  3581. u32 reg = 0;
  3582. int rc = 0;
  3583. unsigned long flags;
  3584. spin_lock_irqsave(&q->lock, flags);
  3585. if (q->need_update == 0)
  3586. goto exit_unlock;
  3587. if (test_bit(STATUS_POWER_PMI, &priv->status)) {
  3588. reg = iwl_read32(priv, CSR_UCODE_DRV_GP1);
  3589. if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
  3590. iwl_set_bit(priv, CSR_GP_CNTRL,
  3591. CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  3592. goto exit_unlock;
  3593. }
  3594. rc = iwl_grab_restricted_access(priv);
  3595. if (rc)
  3596. goto exit_unlock;
  3597. iwl_write_restricted(priv, FH_RSCSR_CHNL0_WPTR,
  3598. q->write & ~0x7);
  3599. iwl_release_restricted_access(priv);
  3600. } else
  3601. iwl_write32(priv, FH_RSCSR_CHNL0_WPTR, q->write & ~0x7);
  3602. q->need_update = 0;
  3603. exit_unlock:
  3604. spin_unlock_irqrestore(&q->lock, flags);
  3605. return rc;
  3606. }
  3607. /**
  3608. * iwl_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer pointer.
  3609. *
  3610. * NOTE: This function has 3945 and 4965 specific code paths in it.
  3611. */
  3612. static inline __le32 iwl_dma_addr2rbd_ptr(struct iwl_priv *priv,
  3613. dma_addr_t dma_addr)
  3614. {
  3615. return cpu_to_le32((u32)(dma_addr >> 8));
  3616. }
  3617. /**
  3618. * iwl_rx_queue_restock - refill RX queue from pre-allocated pool
  3619. *
  3620. * If there are slots in the RX queue that need to be restocked,
  3621. * and we have free pre-allocated buffers, fill the ranks as much
  3622. * as we can pulling from rx_free.
  3623. *
  3624. * This moves the 'write' index forward to catch up with 'processed', and
  3625. * also updates the memory address in the firmware to reference the new
  3626. * target buffer.
  3627. */
  3628. int iwl_rx_queue_restock(struct iwl_priv *priv)
  3629. {
  3630. struct iwl_rx_queue *rxq = &priv->rxq;
  3631. struct list_head *element;
  3632. struct iwl_rx_mem_buffer *rxb;
  3633. unsigned long flags;
  3634. int write, rc;
  3635. spin_lock_irqsave(&rxq->lock, flags);
  3636. write = rxq->write & ~0x7;
  3637. while ((iwl_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
  3638. element = rxq->rx_free.next;
  3639. rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
  3640. list_del(element);
  3641. rxq->bd[rxq->write] = iwl_dma_addr2rbd_ptr(priv, rxb->dma_addr);
  3642. rxq->queue[rxq->write] = rxb;
  3643. rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
  3644. rxq->free_count--;
  3645. }
  3646. spin_unlock_irqrestore(&rxq->lock, flags);
  3647. /* If the pre-allocated buffer pool is dropping low, schedule to
  3648. * refill it */
  3649. if (rxq->free_count <= RX_LOW_WATERMARK)
  3650. queue_work(priv->workqueue, &priv->rx_replenish);
  3651. /* If we've added more space for the firmware to place data, tell it */
  3652. if ((write != (rxq->write & ~0x7))
  3653. || (abs(rxq->write - rxq->read) > 7)) {
  3654. spin_lock_irqsave(&rxq->lock, flags);
  3655. rxq->need_update = 1;
  3656. spin_unlock_irqrestore(&rxq->lock, flags);
  3657. rc = iwl_rx_queue_update_write_ptr(priv, rxq);
  3658. if (rc)
  3659. return rc;
  3660. }
  3661. return 0;
  3662. }
  3663. /**
  3664. * iwl_rx_replensih - Move all used packet from rx_used to rx_free
  3665. *
  3666. * When moving to rx_free an SKB is allocated for the slot.
  3667. *
  3668. * Also restock the Rx queue via iwl_rx_queue_restock.
  3669. * This is called as a scheduled work item (except for during intialization)
  3670. */
  3671. void iwl_rx_replenish(void *data)
  3672. {
  3673. struct iwl_priv *priv = data;
  3674. struct iwl_rx_queue *rxq = &priv->rxq;
  3675. struct list_head *element;
  3676. struct iwl_rx_mem_buffer *rxb;
  3677. unsigned long flags;
  3678. spin_lock_irqsave(&rxq->lock, flags);
  3679. while (!list_empty(&rxq->rx_used)) {
  3680. element = rxq->rx_used.next;
  3681. rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
  3682. rxb->skb =
  3683. alloc_skb(IWL_RX_BUF_SIZE, __GFP_NOWARN | GFP_ATOMIC);
  3684. if (!rxb->skb) {
  3685. if (net_ratelimit())
  3686. printk(KERN_CRIT DRV_NAME
  3687. ": Can not allocate SKB buffers\n");
  3688. /* We don't reschedule replenish work here -- we will
  3689. * call the restock method and if it still needs
  3690. * more buffers it will schedule replenish */
  3691. break;
  3692. }
  3693. priv->alloc_rxb_skb++;
  3694. list_del(element);
  3695. rxb->dma_addr =
  3696. pci_map_single(priv->pci_dev, rxb->skb->data,
  3697. IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
  3698. list_add_tail(&rxb->list, &rxq->rx_free);
  3699. rxq->free_count++;
  3700. }
  3701. spin_unlock_irqrestore(&rxq->lock, flags);
  3702. spin_lock_irqsave(&priv->lock, flags);
  3703. iwl_rx_queue_restock(priv);
  3704. spin_unlock_irqrestore(&priv->lock, flags);
  3705. }
  3706. /* Assumes that the skb field of the buffers in 'pool' is kept accurate.
  3707. * If an SKB has been detached, the POOL needs to have it's SKB set to NULL
  3708. * This free routine walks the list of POOL entries and if SKB is set to
  3709. * non NULL it is unmapped and freed
  3710. */
  3711. void iwl_rx_queue_free(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
  3712. {
  3713. int i;
  3714. for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
  3715. if (rxq->pool[i].skb != NULL) {
  3716. pci_unmap_single(priv->pci_dev,
  3717. rxq->pool[i].dma_addr,
  3718. IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
  3719. dev_kfree_skb(rxq->pool[i].skb);
  3720. }
  3721. }
  3722. pci_free_consistent(priv->pci_dev, 4 * RX_QUEUE_SIZE, rxq->bd,
  3723. rxq->dma_addr);
  3724. rxq->bd = NULL;
  3725. }
  3726. int iwl_rx_queue_alloc(struct iwl_priv *priv)
  3727. {
  3728. struct iwl_rx_queue *rxq = &priv->rxq;
  3729. struct pci_dev *dev = priv->pci_dev;
  3730. int i;
  3731. spin_lock_init(&rxq->lock);
  3732. INIT_LIST_HEAD(&rxq->rx_free);
  3733. INIT_LIST_HEAD(&rxq->rx_used);
  3734. rxq->bd = pci_alloc_consistent(dev, 4 * RX_QUEUE_SIZE, &rxq->dma_addr);
  3735. if (!rxq->bd)
  3736. return -ENOMEM;
  3737. /* Fill the rx_used queue with _all_ of the Rx buffers */
  3738. for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++)
  3739. list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
  3740. /* Set us so that we have processed and used all buffers, but have
  3741. * not restocked the Rx queue with fresh buffers */
  3742. rxq->read = rxq->write = 0;
  3743. rxq->free_count = 0;
  3744. rxq->need_update = 0;
  3745. return 0;
  3746. }
  3747. void iwl_rx_queue_reset(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
  3748. {
  3749. unsigned long flags;
  3750. int i;
  3751. spin_lock_irqsave(&rxq->lock, flags);
  3752. INIT_LIST_HEAD(&rxq->rx_free);
  3753. INIT_LIST_HEAD(&rxq->rx_used);
  3754. /* Fill the rx_used queue with _all_ of the Rx buffers */
  3755. for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
  3756. /* In the reset function, these buffers may have been allocated
  3757. * to an SKB, so we need to unmap and free potential storage */
  3758. if (rxq->pool[i].skb != NULL) {
  3759. pci_unmap_single(priv->pci_dev,
  3760. rxq->pool[i].dma_addr,
  3761. IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
  3762. priv->alloc_rxb_skb--;
  3763. dev_kfree_skb(rxq->pool[i].skb);
  3764. rxq->pool[i].skb = NULL;
  3765. }
  3766. list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
  3767. }
  3768. /* Set us so that we have processed and used all buffers, but have
  3769. * not restocked the Rx queue with fresh buffers */
  3770. rxq->read = rxq->write = 0;
  3771. rxq->free_count = 0;
  3772. spin_unlock_irqrestore(&rxq->lock, flags);
  3773. }
  3774. /* Convert linear signal-to-noise ratio into dB */
  3775. static u8 ratio2dB[100] = {
  3776. /* 0 1 2 3 4 5 6 7 8 9 */
  3777. 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
  3778. 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
  3779. 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
  3780. 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
  3781. 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
  3782. 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
  3783. 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
  3784. 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
  3785. 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
  3786. 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */
  3787. };
  3788. /* Calculates a relative dB value from a ratio of linear
  3789. * (i.e. not dB) signal levels.
  3790. * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
  3791. int iwl_calc_db_from_ratio(int sig_ratio)
  3792. {
  3793. /* Anything above 1000:1 just report as 60 dB */
  3794. if (sig_ratio > 1000)
  3795. return 60;
  3796. /* Above 100:1, divide by 10 and use table,
  3797. * add 20 dB to make up for divide by 10 */
  3798. if (sig_ratio > 100)
  3799. return (20 + (int)ratio2dB[sig_ratio/10]);
  3800. /* We shouldn't see this */
  3801. if (sig_ratio < 1)
  3802. return 0;
  3803. /* Use table for ratios 1:1 - 99:1 */
  3804. return (int)ratio2dB[sig_ratio];
  3805. }
  3806. #define PERFECT_RSSI (-20) /* dBm */
  3807. #define WORST_RSSI (-95) /* dBm */
  3808. #define RSSI_RANGE (PERFECT_RSSI - WORST_RSSI)
  3809. /* Calculate an indication of rx signal quality (a percentage, not dBm!).
  3810. * See http://www.ces.clemson.edu/linux/signal_quality.shtml for info
  3811. * about formulas used below. */
  3812. int iwl_calc_sig_qual(int rssi_dbm, int noise_dbm)
  3813. {
  3814. int sig_qual;
  3815. int degradation = PERFECT_RSSI - rssi_dbm;
  3816. /* If we get a noise measurement, use signal-to-noise ratio (SNR)
  3817. * as indicator; formula is (signal dbm - noise dbm).
  3818. * SNR at or above 40 is a great signal (100%).
  3819. * Below that, scale to fit SNR of 0 - 40 dB within 0 - 100% indicator.
  3820. * Weakest usable signal is usually 10 - 15 dB SNR. */
  3821. if (noise_dbm) {
  3822. if (rssi_dbm - noise_dbm >= 40)
  3823. return 100;
  3824. else if (rssi_dbm < noise_dbm)
  3825. return 0;
  3826. sig_qual = ((rssi_dbm - noise_dbm) * 5) / 2;
  3827. /* Else use just the signal level.
  3828. * This formula is a least squares fit of data points collected and
  3829. * compared with a reference system that had a percentage (%) display
  3830. * for signal quality. */
  3831. } else
  3832. sig_qual = (100 * (RSSI_RANGE * RSSI_RANGE) - degradation *
  3833. (15 * RSSI_RANGE + 62 * degradation)) /
  3834. (RSSI_RANGE * RSSI_RANGE);
  3835. if (sig_qual > 100)
  3836. sig_qual = 100;
  3837. else if (sig_qual < 1)
  3838. sig_qual = 0;
  3839. return sig_qual;
  3840. }
  3841. /**
  3842. * iwl_rx_handle - Main entry function for receiving responses from the uCode
  3843. *
  3844. * Uses the priv->rx_handlers callback function array to invoke
  3845. * the appropriate handlers, including command responses,
  3846. * frame-received notifications, and other notifications.
  3847. */
  3848. static void iwl_rx_handle(struct iwl_priv *priv)
  3849. {
  3850. struct iwl_rx_mem_buffer *rxb;
  3851. struct iwl_rx_packet *pkt;
  3852. struct iwl_rx_queue *rxq = &priv->rxq;
  3853. u32 r, i;
  3854. int reclaim;
  3855. unsigned long flags;
  3856. r = iwl_hw_get_rx_read(priv);
  3857. i = rxq->read;
  3858. /* Rx interrupt, but nothing sent from uCode */
  3859. if (i == r)
  3860. IWL_DEBUG(IWL_DL_RX | IWL_DL_ISR, "r = %d, i = %d\n", r, i);
  3861. while (i != r) {
  3862. rxb = rxq->queue[i];
  3863. /* If an RXB doesn't have a queue slot associated with it
  3864. * then a bug has been introduced in the queue refilling
  3865. * routines -- catch it here */
  3866. BUG_ON(rxb == NULL);
  3867. rxq->queue[i] = NULL;
  3868. pci_dma_sync_single_for_cpu(priv->pci_dev, rxb->dma_addr,
  3869. IWL_RX_BUF_SIZE,
  3870. PCI_DMA_FROMDEVICE);
  3871. pkt = (struct iwl_rx_packet *)rxb->skb->data;
  3872. /* Reclaim a command buffer only if this packet is a response
  3873. * to a (driver-originated) command.
  3874. * If the packet (e.g. Rx frame) originated from uCode,
  3875. * there is no command buffer to reclaim.
  3876. * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
  3877. * but apparently a few don't get set; catch them here. */
  3878. reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
  3879. (pkt->hdr.cmd != REPLY_RX_PHY_CMD) &&
  3880. (pkt->hdr.cmd != REPLY_4965_RX) &&
  3881. (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
  3882. (pkt->hdr.cmd != REPLY_TX);
  3883. /* Based on type of command response or notification,
  3884. * handle those that need handling via function in
  3885. * rx_handlers table. See iwl_setup_rx_handlers() */
  3886. if (priv->rx_handlers[pkt->hdr.cmd]) {
  3887. IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR,
  3888. "r = %d, i = %d, %s, 0x%02x\n", r, i,
  3889. get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
  3890. priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
  3891. } else {
  3892. /* No handling needed */
  3893. IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR,
  3894. "r %d i %d No handler needed for %s, 0x%02x\n",
  3895. r, i, get_cmd_string(pkt->hdr.cmd),
  3896. pkt->hdr.cmd);
  3897. }
  3898. if (reclaim) {
  3899. /* Invoke any callbacks, transfer the skb to caller,
  3900. * and fire off the (possibly) blocking iwl_send_cmd()
  3901. * as we reclaim the driver command queue */
  3902. if (rxb && rxb->skb)
  3903. iwl_tx_cmd_complete(priv, rxb);
  3904. else
  3905. IWL_WARNING("Claim null rxb?\n");
  3906. }
  3907. /* For now we just don't re-use anything. We can tweak this
  3908. * later to try and re-use notification packets and SKBs that
  3909. * fail to Rx correctly */
  3910. if (rxb->skb != NULL) {
  3911. priv->alloc_rxb_skb--;
  3912. dev_kfree_skb_any(rxb->skb);
  3913. rxb->skb = NULL;
  3914. }
  3915. pci_unmap_single(priv->pci_dev, rxb->dma_addr,
  3916. IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
  3917. spin_lock_irqsave(&rxq->lock, flags);
  3918. list_add_tail(&rxb->list, &priv->rxq.rx_used);
  3919. spin_unlock_irqrestore(&rxq->lock, flags);
  3920. i = (i + 1) & RX_QUEUE_MASK;
  3921. }
  3922. /* Backtrack one entry */
  3923. priv->rxq.read = i;
  3924. iwl_rx_queue_restock(priv);
  3925. }
  3926. int iwl_tx_queue_update_write_ptr(struct iwl_priv *priv,
  3927. struct iwl_tx_queue *txq)
  3928. {
  3929. u32 reg = 0;
  3930. int rc = 0;
  3931. int txq_id = txq->q.id;
  3932. if (txq->need_update == 0)
  3933. return rc;
  3934. /* if we're trying to save power */
  3935. if (test_bit(STATUS_POWER_PMI, &priv->status)) {
  3936. /* wake up nic if it's powered down ...
  3937. * uCode will wake up, and interrupt us again, so next
  3938. * time we'll skip this part. */
  3939. reg = iwl_read32(priv, CSR_UCODE_DRV_GP1);
  3940. if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
  3941. IWL_DEBUG_INFO("Requesting wakeup, GP1 = 0x%x\n", reg);
  3942. iwl_set_bit(priv, CSR_GP_CNTRL,
  3943. CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  3944. return rc;
  3945. }
  3946. /* restore this queue's parameters in nic hardware. */
  3947. rc = iwl_grab_restricted_access(priv);
  3948. if (rc)
  3949. return rc;
  3950. iwl_write_restricted(priv, HBUS_TARG_WRPTR,
  3951. txq->q.first_empty | (txq_id << 8));
  3952. iwl_release_restricted_access(priv);
  3953. /* else not in power-save mode, uCode will never sleep when we're
  3954. * trying to tx (during RFKILL, we're not trying to tx). */
  3955. } else
  3956. iwl_write32(priv, HBUS_TARG_WRPTR,
  3957. txq->q.first_empty | (txq_id << 8));
  3958. txq->need_update = 0;
  3959. return rc;
  3960. }
  3961. #ifdef CONFIG_IWLWIFI_DEBUG
  3962. static void iwl_print_rx_config_cmd(struct iwl_rxon_cmd *rxon)
  3963. {
  3964. IWL_DEBUG_RADIO("RX CONFIG:\n");
  3965. iwl_print_hex_dump(IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
  3966. IWL_DEBUG_RADIO("u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
  3967. IWL_DEBUG_RADIO("u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
  3968. IWL_DEBUG_RADIO("u32 filter_flags: 0x%08x\n",
  3969. le32_to_cpu(rxon->filter_flags));
  3970. IWL_DEBUG_RADIO("u8 dev_type: 0x%x\n", rxon->dev_type);
  3971. IWL_DEBUG_RADIO("u8 ofdm_basic_rates: 0x%02x\n",
  3972. rxon->ofdm_basic_rates);
  3973. IWL_DEBUG_RADIO("u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
  3974. IWL_DEBUG_RADIO("u8[6] node_addr: " MAC_FMT "\n",
  3975. MAC_ARG(rxon->node_addr));
  3976. IWL_DEBUG_RADIO("u8[6] bssid_addr: " MAC_FMT "\n",
  3977. MAC_ARG(rxon->bssid_addr));
  3978. IWL_DEBUG_RADIO("u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
  3979. }
  3980. #endif
  3981. static void iwl_enable_interrupts(struct iwl_priv *priv)
  3982. {
  3983. IWL_DEBUG_ISR("Enabling interrupts\n");
  3984. set_bit(STATUS_INT_ENABLED, &priv->status);
  3985. iwl_write32(priv, CSR_INT_MASK, CSR_INI_SET_MASK);
  3986. }
  3987. static inline void iwl_disable_interrupts(struct iwl_priv *priv)
  3988. {
  3989. clear_bit(STATUS_INT_ENABLED, &priv->status);
  3990. /* disable interrupts from uCode/NIC to host */
  3991. iwl_write32(priv, CSR_INT_MASK, 0x00000000);
  3992. /* acknowledge/clear/reset any interrupts still pending
  3993. * from uCode or flow handler (Rx/Tx DMA) */
  3994. iwl_write32(priv, CSR_INT, 0xffffffff);
  3995. iwl_write32(priv, CSR_FH_INT_STATUS, 0xffffffff);
  3996. IWL_DEBUG_ISR("Disabled interrupts\n");
  3997. }
  3998. static const char *desc_lookup(int i)
  3999. {
  4000. switch (i) {
  4001. case 1:
  4002. return "FAIL";
  4003. case 2:
  4004. return "BAD_PARAM";
  4005. case 3:
  4006. return "BAD_CHECKSUM";
  4007. case 4:
  4008. return "NMI_INTERRUPT";
  4009. case 5:
  4010. return "SYSASSERT";
  4011. case 6:
  4012. return "FATAL_ERROR";
  4013. }
  4014. return "UNKNOWN";
  4015. }
  4016. #define ERROR_START_OFFSET (1 * sizeof(u32))
  4017. #define ERROR_ELEM_SIZE (7 * sizeof(u32))
  4018. static void iwl_dump_nic_error_log(struct iwl_priv *priv)
  4019. {
  4020. u32 data2, line;
  4021. u32 desc, time, count, base, data1;
  4022. u32 blink1, blink2, ilink1, ilink2;
  4023. int rc;
  4024. base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
  4025. if (!iwl_hw_valid_rtc_data_addr(base)) {
  4026. IWL_ERROR("Not valid error log pointer 0x%08X\n", base);
  4027. return;
  4028. }
  4029. rc = iwl_grab_restricted_access(priv);
  4030. if (rc) {
  4031. IWL_WARNING("Can not read from adapter at this time.\n");
  4032. return;
  4033. }
  4034. count = iwl_read_restricted_mem(priv, base);
  4035. if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
  4036. IWL_ERROR("Start IWL Error Log Dump:\n");
  4037. IWL_ERROR("Status: 0x%08lX, Config: %08X count: %d\n",
  4038. priv->status, priv->config, count);
  4039. }
  4040. desc = iwl_read_restricted_mem(priv, base + 1 * sizeof(u32));
  4041. blink1 = iwl_read_restricted_mem(priv, base + 3 * sizeof(u32));
  4042. blink2 = iwl_read_restricted_mem(priv, base + 4 * sizeof(u32));
  4043. ilink1 = iwl_read_restricted_mem(priv, base + 5 * sizeof(u32));
  4044. ilink2 = iwl_read_restricted_mem(priv, base + 6 * sizeof(u32));
  4045. data1 = iwl_read_restricted_mem(priv, base + 7 * sizeof(u32));
  4046. data2 = iwl_read_restricted_mem(priv, base + 8 * sizeof(u32));
  4047. line = iwl_read_restricted_mem(priv, base + 9 * sizeof(u32));
  4048. time = iwl_read_restricted_mem(priv, base + 11 * sizeof(u32));
  4049. IWL_ERROR("Desc Time "
  4050. "data1 data2 line\n");
  4051. IWL_ERROR("%-13s (#%d) %010u 0x%08X 0x%08X %u\n",
  4052. desc_lookup(desc), desc, time, data1, data2, line);
  4053. IWL_ERROR("blink1 blink2 ilink1 ilink2\n");
  4054. IWL_ERROR("0x%05X 0x%05X 0x%05X 0x%05X\n", blink1, blink2,
  4055. ilink1, ilink2);
  4056. iwl_release_restricted_access(priv);
  4057. }
  4058. #define EVENT_START_OFFSET (4 * sizeof(u32))
  4059. /**
  4060. * iwl_print_event_log - Dump error event log to syslog
  4061. *
  4062. * NOTE: Must be called with iwl_grab_restricted_access() already obtained!
  4063. */
  4064. static void iwl_print_event_log(struct iwl_priv *priv, u32 start_idx,
  4065. u32 num_events, u32 mode)
  4066. {
  4067. u32 i;
  4068. u32 base; /* SRAM byte address of event log header */
  4069. u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
  4070. u32 ptr; /* SRAM byte address of log data */
  4071. u32 ev, time, data; /* event log data */
  4072. if (num_events == 0)
  4073. return;
  4074. base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
  4075. if (mode == 0)
  4076. event_size = 2 * sizeof(u32);
  4077. else
  4078. event_size = 3 * sizeof(u32);
  4079. ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
  4080. /* "time" is actually "data" for mode 0 (no timestamp).
  4081. * place event id # at far right for easier visual parsing. */
  4082. for (i = 0; i < num_events; i++) {
  4083. ev = iwl_read_restricted_mem(priv, ptr);
  4084. ptr += sizeof(u32);
  4085. time = iwl_read_restricted_mem(priv, ptr);
  4086. ptr += sizeof(u32);
  4087. if (mode == 0)
  4088. IWL_ERROR("0x%08x\t%04u\n", time, ev); /* data, ev */
  4089. else {
  4090. data = iwl_read_restricted_mem(priv, ptr);
  4091. ptr += sizeof(u32);
  4092. IWL_ERROR("%010u\t0x%08x\t%04u\n", time, data, ev);
  4093. }
  4094. }
  4095. }
  4096. static void iwl_dump_nic_event_log(struct iwl_priv *priv)
  4097. {
  4098. int rc;
  4099. u32 base; /* SRAM byte address of event log header */
  4100. u32 capacity; /* event log capacity in # entries */
  4101. u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
  4102. u32 num_wraps; /* # times uCode wrapped to top of log */
  4103. u32 next_entry; /* index of next entry to be written by uCode */
  4104. u32 size; /* # entries that we'll print */
  4105. base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
  4106. if (!iwl_hw_valid_rtc_data_addr(base)) {
  4107. IWL_ERROR("Invalid event log pointer 0x%08X\n", base);
  4108. return;
  4109. }
  4110. rc = iwl_grab_restricted_access(priv);
  4111. if (rc) {
  4112. IWL_WARNING("Can not read from adapter at this time.\n");
  4113. return;
  4114. }
  4115. /* event log header */
  4116. capacity = iwl_read_restricted_mem(priv, base);
  4117. mode = iwl_read_restricted_mem(priv, base + (1 * sizeof(u32)));
  4118. num_wraps = iwl_read_restricted_mem(priv, base + (2 * sizeof(u32)));
  4119. next_entry = iwl_read_restricted_mem(priv, base + (3 * sizeof(u32)));
  4120. size = num_wraps ? capacity : next_entry;
  4121. /* bail out if nothing in log */
  4122. if (size == 0) {
  4123. IWL_ERROR("Start IPW Event Log Dump: nothing in log\n");
  4124. iwl_release_restricted_access(priv);
  4125. return;
  4126. }
  4127. IWL_ERROR("Start IPW Event Log Dump: display count %d, wraps %d\n",
  4128. size, num_wraps);
  4129. /* if uCode has wrapped back to top of log, start at the oldest entry,
  4130. * i.e the next one that uCode would fill. */
  4131. if (num_wraps)
  4132. iwl_print_event_log(priv, next_entry,
  4133. capacity - next_entry, mode);
  4134. /* (then/else) start at top of log */
  4135. iwl_print_event_log(priv, 0, next_entry, mode);
  4136. iwl_release_restricted_access(priv);
  4137. }
  4138. /**
  4139. * iwl_irq_handle_error - called for HW or SW error interrupt from card
  4140. */
  4141. static void iwl_irq_handle_error(struct iwl_priv *priv)
  4142. {
  4143. /* Set the FW error flag -- cleared on iwl_down */
  4144. set_bit(STATUS_FW_ERROR, &priv->status);
  4145. /* Cancel currently queued command. */
  4146. clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
  4147. #ifdef CONFIG_IWLWIFI_DEBUG
  4148. if (iwl_debug_level & IWL_DL_FW_ERRORS) {
  4149. iwl_dump_nic_error_log(priv);
  4150. iwl_dump_nic_event_log(priv);
  4151. iwl_print_rx_config_cmd(&priv->staging_rxon);
  4152. }
  4153. #endif
  4154. wake_up_interruptible(&priv->wait_command_queue);
  4155. /* Keep the restart process from trying to send host
  4156. * commands by clearing the INIT status bit */
  4157. clear_bit(STATUS_READY, &priv->status);
  4158. if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  4159. IWL_DEBUG(IWL_DL_INFO | IWL_DL_FW_ERRORS,
  4160. "Restarting adapter due to uCode error.\n");
  4161. if (iwl_is_associated(priv)) {
  4162. memcpy(&priv->recovery_rxon, &priv->active_rxon,
  4163. sizeof(priv->recovery_rxon));
  4164. priv->error_recovering = 1;
  4165. }
  4166. queue_work(priv->workqueue, &priv->restart);
  4167. }
  4168. }
  4169. static void iwl_error_recovery(struct iwl_priv *priv)
  4170. {
  4171. unsigned long flags;
  4172. memcpy(&priv->staging_rxon, &priv->recovery_rxon,
  4173. sizeof(priv->staging_rxon));
  4174. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  4175. iwl_commit_rxon(priv);
  4176. iwl_rxon_add_station(priv, priv->bssid, 1);
  4177. spin_lock_irqsave(&priv->lock, flags);
  4178. priv->assoc_id = le16_to_cpu(priv->staging_rxon.assoc_id);
  4179. priv->error_recovering = 0;
  4180. spin_unlock_irqrestore(&priv->lock, flags);
  4181. }
  4182. static void iwl_irq_tasklet(struct iwl_priv *priv)
  4183. {
  4184. u32 inta, handled = 0;
  4185. u32 inta_fh;
  4186. unsigned long flags;
  4187. #ifdef CONFIG_IWLWIFI_DEBUG
  4188. u32 inta_mask;
  4189. #endif
  4190. spin_lock_irqsave(&priv->lock, flags);
  4191. /* Ack/clear/reset pending uCode interrupts.
  4192. * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
  4193. * and will clear only when CSR_FH_INT_STATUS gets cleared. */
  4194. inta = iwl_read32(priv, CSR_INT);
  4195. iwl_write32(priv, CSR_INT, inta);
  4196. /* Ack/clear/reset pending flow-handler (DMA) interrupts.
  4197. * Any new interrupts that happen after this, either while we're
  4198. * in this tasklet, or later, will show up in next ISR/tasklet. */
  4199. inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
  4200. iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
  4201. #ifdef CONFIG_IWLWIFI_DEBUG
  4202. if (iwl_debug_level & IWL_DL_ISR) {
  4203. inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */
  4204. IWL_DEBUG_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
  4205. inta, inta_mask, inta_fh);
  4206. }
  4207. #endif
  4208. /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
  4209. * atomic, make sure that inta covers all the interrupts that
  4210. * we've discovered, even if FH interrupt came in just after
  4211. * reading CSR_INT. */
  4212. if (inta_fh & CSR_FH_INT_RX_MASK)
  4213. inta |= CSR_INT_BIT_FH_RX;
  4214. if (inta_fh & CSR_FH_INT_TX_MASK)
  4215. inta |= CSR_INT_BIT_FH_TX;
  4216. /* Now service all interrupt bits discovered above. */
  4217. if (inta & CSR_INT_BIT_HW_ERR) {
  4218. IWL_ERROR("Microcode HW error detected. Restarting.\n");
  4219. /* Tell the device to stop sending interrupts */
  4220. iwl_disable_interrupts(priv);
  4221. iwl_irq_handle_error(priv);
  4222. handled |= CSR_INT_BIT_HW_ERR;
  4223. spin_unlock_irqrestore(&priv->lock, flags);
  4224. return;
  4225. }
  4226. #ifdef CONFIG_IWLWIFI_DEBUG
  4227. if (iwl_debug_level & (IWL_DL_ISR)) {
  4228. /* NIC fires this, but we don't use it, redundant with WAKEUP */
  4229. if (inta & CSR_INT_BIT_MAC_CLK_ACTV)
  4230. IWL_DEBUG_ISR("Microcode started or stopped.\n");
  4231. /* Alive notification via Rx interrupt will do the real work */
  4232. if (inta & CSR_INT_BIT_ALIVE)
  4233. IWL_DEBUG_ISR("Alive interrupt\n");
  4234. }
  4235. #endif
  4236. /* Safely ignore these bits for debug checks below */
  4237. inta &= ~(CSR_INT_BIT_MAC_CLK_ACTV | CSR_INT_BIT_ALIVE);
  4238. /* HW RF KILL switch toggled (4965 only) */
  4239. if (inta & CSR_INT_BIT_RF_KILL) {
  4240. int hw_rf_kill = 0;
  4241. if (!(iwl_read32(priv, CSR_GP_CNTRL) &
  4242. CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
  4243. hw_rf_kill = 1;
  4244. IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL | IWL_DL_ISR,
  4245. "RF_KILL bit toggled to %s.\n",
  4246. hw_rf_kill ? "disable radio":"enable radio");
  4247. /* Queue restart only if RF_KILL switch was set to "kill"
  4248. * when we loaded driver, and is now set to "enable".
  4249. * After we're Alive, RF_KILL gets handled by
  4250. * iwl_rx_card_state_notif() */
  4251. if (!hw_rf_kill && !test_bit(STATUS_ALIVE, &priv->status))
  4252. queue_work(priv->workqueue, &priv->restart);
  4253. handled |= CSR_INT_BIT_RF_KILL;
  4254. }
  4255. /* Chip got too hot and stopped itself (4965 only) */
  4256. if (inta & CSR_INT_BIT_CT_KILL) {
  4257. IWL_ERROR("Microcode CT kill error detected.\n");
  4258. handled |= CSR_INT_BIT_CT_KILL;
  4259. }
  4260. /* Error detected by uCode */
  4261. if (inta & CSR_INT_BIT_SW_ERR) {
  4262. IWL_ERROR("Microcode SW error detected. Restarting 0x%X.\n",
  4263. inta);
  4264. iwl_irq_handle_error(priv);
  4265. handled |= CSR_INT_BIT_SW_ERR;
  4266. }
  4267. /* uCode wakes up after power-down sleep */
  4268. if (inta & CSR_INT_BIT_WAKEUP) {
  4269. IWL_DEBUG_ISR("Wakeup interrupt\n");
  4270. iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
  4271. iwl_tx_queue_update_write_ptr(priv, &priv->txq[0]);
  4272. iwl_tx_queue_update_write_ptr(priv, &priv->txq[1]);
  4273. iwl_tx_queue_update_write_ptr(priv, &priv->txq[2]);
  4274. iwl_tx_queue_update_write_ptr(priv, &priv->txq[3]);
  4275. iwl_tx_queue_update_write_ptr(priv, &priv->txq[4]);
  4276. iwl_tx_queue_update_write_ptr(priv, &priv->txq[5]);
  4277. handled |= CSR_INT_BIT_WAKEUP;
  4278. }
  4279. /* All uCode command responses, including Tx command responses,
  4280. * Rx "responses" (frame-received notification), and other
  4281. * notifications from uCode come through here*/
  4282. if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
  4283. iwl_rx_handle(priv);
  4284. handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
  4285. }
  4286. if (inta & CSR_INT_BIT_FH_TX) {
  4287. IWL_DEBUG_ISR("Tx interrupt\n");
  4288. handled |= CSR_INT_BIT_FH_TX;
  4289. }
  4290. if (inta & ~handled)
  4291. IWL_ERROR("Unhandled INTA bits 0x%08x\n", inta & ~handled);
  4292. if (inta & ~CSR_INI_SET_MASK) {
  4293. IWL_WARNING("Disabled INTA bits 0x%08x were pending\n",
  4294. inta & ~CSR_INI_SET_MASK);
  4295. IWL_WARNING(" with FH_INT = 0x%08x\n", inta_fh);
  4296. }
  4297. /* Re-enable all interrupts */
  4298. iwl_enable_interrupts(priv);
  4299. #ifdef CONFIG_IWLWIFI_DEBUG
  4300. if (iwl_debug_level & (IWL_DL_ISR)) {
  4301. inta = iwl_read32(priv, CSR_INT);
  4302. inta_mask = iwl_read32(priv, CSR_INT_MASK);
  4303. inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
  4304. IWL_DEBUG_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
  4305. "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
  4306. }
  4307. #endif
  4308. spin_unlock_irqrestore(&priv->lock, flags);
  4309. }
  4310. static irqreturn_t iwl_isr(int irq, void *data)
  4311. {
  4312. struct iwl_priv *priv = data;
  4313. u32 inta, inta_mask;
  4314. u32 inta_fh;
  4315. if (!priv)
  4316. return IRQ_NONE;
  4317. spin_lock(&priv->lock);
  4318. /* Disable (but don't clear!) interrupts here to avoid
  4319. * back-to-back ISRs and sporadic interrupts from our NIC.
  4320. * If we have something to service, the tasklet will re-enable ints.
  4321. * If we *don't* have something, we'll re-enable before leaving here. */
  4322. inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */
  4323. iwl_write32(priv, CSR_INT_MASK, 0x00000000);
  4324. /* Discover which interrupts are active/pending */
  4325. inta = iwl_read32(priv, CSR_INT);
  4326. inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
  4327. /* Ignore interrupt if there's nothing in NIC to service.
  4328. * This may be due to IRQ shared with another device,
  4329. * or due to sporadic interrupts thrown from our NIC. */
  4330. if (!inta && !inta_fh) {
  4331. IWL_DEBUG_ISR("Ignore interrupt, inta == 0, inta_fh == 0\n");
  4332. goto none;
  4333. }
  4334. if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
  4335. /* Hardware disappeared */
  4336. IWL_WARNING("HARDWARE GONE?? INTA == 0x%080x\n", inta);
  4337. goto none;
  4338. }
  4339. IWL_DEBUG_ISR("ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
  4340. inta, inta_mask, inta_fh);
  4341. /* iwl_irq_tasklet() will service interrupts and re-enable them */
  4342. tasklet_schedule(&priv->irq_tasklet);
  4343. spin_unlock(&priv->lock);
  4344. return IRQ_HANDLED;
  4345. none:
  4346. /* re-enable interrupts here since we don't have anything to service. */
  4347. iwl_enable_interrupts(priv);
  4348. spin_unlock(&priv->lock);
  4349. return IRQ_NONE;
  4350. }
  4351. /************************** EEPROM BANDS ****************************
  4352. *
  4353. * The iwl_eeprom_band definitions below provide the mapping from the
  4354. * EEPROM contents to the specific channel number supported for each
  4355. * band.
  4356. *
  4357. * For example, iwl_priv->eeprom.band_3_channels[4] from the band_3
  4358. * definition below maps to physical channel 42 in the 5.2GHz spectrum.
  4359. * The specific geography and calibration information for that channel
  4360. * is contained in the eeprom map itself.
  4361. *
  4362. * During init, we copy the eeprom information and channel map
  4363. * information into priv->channel_info_24/52 and priv->channel_map_24/52
  4364. *
  4365. * channel_map_24/52 provides the index in the channel_info array for a
  4366. * given channel. We have to have two separate maps as there is channel
  4367. * overlap with the 2.4GHz and 5.2GHz spectrum as seen in band_1 and
  4368. * band_2
  4369. *
  4370. * A value of 0xff stored in the channel_map indicates that the channel
  4371. * is not supported by the hardware at all.
  4372. *
  4373. * A value of 0xfe in the channel_map indicates that the channel is not
  4374. * valid for Tx with the current hardware. This means that
  4375. * while the system can tune and receive on a given channel, it may not
  4376. * be able to associate or transmit any frames on that
  4377. * channel. There is no corresponding channel information for that
  4378. * entry.
  4379. *
  4380. *********************************************************************/
  4381. /* 2.4 GHz */
  4382. static const u8 iwl_eeprom_band_1[14] = {
  4383. 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14
  4384. };
  4385. /* 5.2 GHz bands */
  4386. static const u8 iwl_eeprom_band_2[] = {
  4387. 183, 184, 185, 187, 188, 189, 192, 196, 7, 8, 11, 12, 16
  4388. };
  4389. static const u8 iwl_eeprom_band_3[] = { /* 5205-5320MHz */
  4390. 34, 36, 38, 40, 42, 44, 46, 48, 52, 56, 60, 64
  4391. };
  4392. static const u8 iwl_eeprom_band_4[] = { /* 5500-5700MHz */
  4393. 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140
  4394. };
  4395. static const u8 iwl_eeprom_band_5[] = { /* 5725-5825MHz */
  4396. 145, 149, 153, 157, 161, 165
  4397. };
  4398. static u8 iwl_eeprom_band_6[] = { /* 2.4 FAT channel */
  4399. 1, 2, 3, 4, 5, 6, 7
  4400. };
  4401. static u8 iwl_eeprom_band_7[] = { /* 5.2 FAT channel */
  4402. 36, 44, 52, 60, 100, 108, 116, 124, 132, 149, 157
  4403. };
  4404. static void iwl_init_band_reference(const struct iwl_priv *priv, int band,
  4405. int *eeprom_ch_count,
  4406. const struct iwl_eeprom_channel
  4407. **eeprom_ch_info,
  4408. const u8 **eeprom_ch_index)
  4409. {
  4410. switch (band) {
  4411. case 1: /* 2.4GHz band */
  4412. *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_1);
  4413. *eeprom_ch_info = priv->eeprom.band_1_channels;
  4414. *eeprom_ch_index = iwl_eeprom_band_1;
  4415. break;
  4416. case 2: /* 5.2GHz band */
  4417. *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_2);
  4418. *eeprom_ch_info = priv->eeprom.band_2_channels;
  4419. *eeprom_ch_index = iwl_eeprom_band_2;
  4420. break;
  4421. case 3: /* 5.2GHz band */
  4422. *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_3);
  4423. *eeprom_ch_info = priv->eeprom.band_3_channels;
  4424. *eeprom_ch_index = iwl_eeprom_band_3;
  4425. break;
  4426. case 4: /* 5.2GHz band */
  4427. *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_4);
  4428. *eeprom_ch_info = priv->eeprom.band_4_channels;
  4429. *eeprom_ch_index = iwl_eeprom_band_4;
  4430. break;
  4431. case 5: /* 5.2GHz band */
  4432. *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_5);
  4433. *eeprom_ch_info = priv->eeprom.band_5_channels;
  4434. *eeprom_ch_index = iwl_eeprom_band_5;
  4435. break;
  4436. case 6:
  4437. *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_6);
  4438. *eeprom_ch_info = priv->eeprom.band_24_channels;
  4439. *eeprom_ch_index = iwl_eeprom_band_6;
  4440. break;
  4441. case 7:
  4442. *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_7);
  4443. *eeprom_ch_info = priv->eeprom.band_52_channels;
  4444. *eeprom_ch_index = iwl_eeprom_band_7;
  4445. break;
  4446. default:
  4447. BUG();
  4448. return;
  4449. }
  4450. }
  4451. const struct iwl_channel_info *iwl_get_channel_info(const struct iwl_priv *priv,
  4452. int phymode, u16 channel)
  4453. {
  4454. int i;
  4455. switch (phymode) {
  4456. case MODE_IEEE80211A:
  4457. for (i = 14; i < priv->channel_count; i++) {
  4458. if (priv->channel_info[i].channel == channel)
  4459. return &priv->channel_info[i];
  4460. }
  4461. break;
  4462. case MODE_IEEE80211B:
  4463. case MODE_IEEE80211G:
  4464. if (channel >= 1 && channel <= 14)
  4465. return &priv->channel_info[channel - 1];
  4466. break;
  4467. }
  4468. return NULL;
  4469. }
  4470. #define CHECK_AND_PRINT(x) ((eeprom_ch_info[ch].flags & EEPROM_CHANNEL_##x) \
  4471. ? # x " " : "")
  4472. static int iwl_init_channel_map(struct iwl_priv *priv)
  4473. {
  4474. int eeprom_ch_count = 0;
  4475. const u8 *eeprom_ch_index = NULL;
  4476. const struct iwl_eeprom_channel *eeprom_ch_info = NULL;
  4477. int band, ch;
  4478. struct iwl_channel_info *ch_info;
  4479. if (priv->channel_count) {
  4480. IWL_DEBUG_INFO("Channel map already initialized.\n");
  4481. return 0;
  4482. }
  4483. if (priv->eeprom.version < 0x2f) {
  4484. IWL_WARNING("Unsupported EEPROM version: 0x%04X\n",
  4485. priv->eeprom.version);
  4486. return -EINVAL;
  4487. }
  4488. IWL_DEBUG_INFO("Initializing regulatory info from EEPROM\n");
  4489. priv->channel_count =
  4490. ARRAY_SIZE(iwl_eeprom_band_1) +
  4491. ARRAY_SIZE(iwl_eeprom_band_2) +
  4492. ARRAY_SIZE(iwl_eeprom_band_3) +
  4493. ARRAY_SIZE(iwl_eeprom_band_4) +
  4494. ARRAY_SIZE(iwl_eeprom_band_5);
  4495. IWL_DEBUG_INFO("Parsing data for %d channels.\n", priv->channel_count);
  4496. priv->channel_info = kzalloc(sizeof(struct iwl_channel_info) *
  4497. priv->channel_count, GFP_KERNEL);
  4498. if (!priv->channel_info) {
  4499. IWL_ERROR("Could not allocate channel_info\n");
  4500. priv->channel_count = 0;
  4501. return -ENOMEM;
  4502. }
  4503. ch_info = priv->channel_info;
  4504. /* Loop through the 5 EEPROM bands adding them in order to the
  4505. * channel map we maintain (that contains additional information than
  4506. * what just in the EEPROM) */
  4507. for (band = 1; band <= 5; band++) {
  4508. iwl_init_band_reference(priv, band, &eeprom_ch_count,
  4509. &eeprom_ch_info, &eeprom_ch_index);
  4510. /* Loop through each band adding each of the channels */
  4511. for (ch = 0; ch < eeprom_ch_count; ch++) {
  4512. ch_info->channel = eeprom_ch_index[ch];
  4513. ch_info->phymode = (band == 1) ? MODE_IEEE80211B :
  4514. MODE_IEEE80211A;
  4515. /* permanently store EEPROM's channel regulatory flags
  4516. * and max power in channel info database. */
  4517. ch_info->eeprom = eeprom_ch_info[ch];
  4518. /* Copy the run-time flags so they are there even on
  4519. * invalid channels */
  4520. ch_info->flags = eeprom_ch_info[ch].flags;
  4521. if (!(is_channel_valid(ch_info))) {
  4522. IWL_DEBUG_INFO("Ch. %d Flags %x [%sGHz] - "
  4523. "No traffic\n",
  4524. ch_info->channel,
  4525. ch_info->flags,
  4526. is_channel_a_band(ch_info) ?
  4527. "5.2" : "2.4");
  4528. ch_info++;
  4529. continue;
  4530. }
  4531. /* Initialize regulatory-based run-time data */
  4532. ch_info->max_power_avg = ch_info->curr_txpow =
  4533. eeprom_ch_info[ch].max_power_avg;
  4534. ch_info->scan_power = eeprom_ch_info[ch].max_power_avg;
  4535. ch_info->min_power = 0;
  4536. IWL_DEBUG_INFO("Ch. %d [%sGHz] %s%s%s%s%s%s(0x%02x"
  4537. " %ddBm): Ad-Hoc %ssupported\n",
  4538. ch_info->channel,
  4539. is_channel_a_band(ch_info) ?
  4540. "5.2" : "2.4",
  4541. CHECK_AND_PRINT(IBSS),
  4542. CHECK_AND_PRINT(ACTIVE),
  4543. CHECK_AND_PRINT(RADAR),
  4544. CHECK_AND_PRINT(WIDE),
  4545. CHECK_AND_PRINT(NARROW),
  4546. CHECK_AND_PRINT(DFS),
  4547. eeprom_ch_info[ch].flags,
  4548. eeprom_ch_info[ch].max_power_avg,
  4549. ((eeprom_ch_info[ch].
  4550. flags & EEPROM_CHANNEL_IBSS)
  4551. && !(eeprom_ch_info[ch].
  4552. flags & EEPROM_CHANNEL_RADAR))
  4553. ? "" : "not ");
  4554. /* Set the user_txpower_limit to the highest power
  4555. * supported by any channel */
  4556. if (eeprom_ch_info[ch].max_power_avg >
  4557. priv->user_txpower_limit)
  4558. priv->user_txpower_limit =
  4559. eeprom_ch_info[ch].max_power_avg;
  4560. ch_info++;
  4561. }
  4562. }
  4563. for (band = 6; band <= 7; band++) {
  4564. int phymode;
  4565. u8 fat_extension_chan;
  4566. iwl_init_band_reference(priv, band, &eeprom_ch_count,
  4567. &eeprom_ch_info, &eeprom_ch_index);
  4568. phymode = (band == 6) ? MODE_IEEE80211B : MODE_IEEE80211A;
  4569. /* Loop through each band adding each of the channels */
  4570. for (ch = 0; ch < eeprom_ch_count; ch++) {
  4571. if ((band == 6) &&
  4572. ((eeprom_ch_index[ch] == 5) ||
  4573. (eeprom_ch_index[ch] == 6) ||
  4574. (eeprom_ch_index[ch] == 7)))
  4575. fat_extension_chan = HT_IE_EXT_CHANNEL_MAX;
  4576. else
  4577. fat_extension_chan = HT_IE_EXT_CHANNEL_ABOVE;
  4578. iwl4965_set_fat_chan_info(priv, phymode,
  4579. eeprom_ch_index[ch],
  4580. &(eeprom_ch_info[ch]),
  4581. fat_extension_chan);
  4582. iwl4965_set_fat_chan_info(priv, phymode,
  4583. (eeprom_ch_index[ch] + 4),
  4584. &(eeprom_ch_info[ch]),
  4585. HT_IE_EXT_CHANNEL_BELOW);
  4586. }
  4587. }
  4588. return 0;
  4589. }
  4590. /* For active scan, listen ACTIVE_DWELL_TIME (msec) on each channel after
  4591. * sending probe req. This should be set long enough to hear probe responses
  4592. * from more than one AP. */
  4593. #define IWL_ACTIVE_DWELL_TIME_24 (20) /* all times in msec */
  4594. #define IWL_ACTIVE_DWELL_TIME_52 (10)
  4595. /* For faster active scanning, scan will move to the next channel if fewer than
  4596. * PLCP_QUIET_THRESH packets are heard on this channel within
  4597. * ACTIVE_QUIET_TIME after sending probe request. This shortens the dwell
  4598. * time if it's a quiet channel (nothing responded to our probe, and there's
  4599. * no other traffic).
  4600. * Disable "quiet" feature by setting PLCP_QUIET_THRESH to 0. */
  4601. #define IWL_PLCP_QUIET_THRESH __constant_cpu_to_le16(1) /* packets */
  4602. #define IWL_ACTIVE_QUIET_TIME __constant_cpu_to_le16(5) /* msec */
  4603. /* For passive scan, listen PASSIVE_DWELL_TIME (msec) on each channel.
  4604. * Must be set longer than active dwell time.
  4605. * For the most reliable scan, set > AP beacon interval (typically 100msec). */
  4606. #define IWL_PASSIVE_DWELL_TIME_24 (20) /* all times in msec */
  4607. #define IWL_PASSIVE_DWELL_TIME_52 (10)
  4608. #define IWL_PASSIVE_DWELL_BASE (100)
  4609. #define IWL_CHANNEL_TUNE_TIME 5
  4610. static inline u16 iwl_get_active_dwell_time(struct iwl_priv *priv, int phymode)
  4611. {
  4612. if (phymode == MODE_IEEE80211A)
  4613. return IWL_ACTIVE_DWELL_TIME_52;
  4614. else
  4615. return IWL_ACTIVE_DWELL_TIME_24;
  4616. }
  4617. static u16 iwl_get_passive_dwell_time(struct iwl_priv *priv, int phymode)
  4618. {
  4619. u16 active = iwl_get_active_dwell_time(priv, phymode);
  4620. u16 passive = (phymode != MODE_IEEE80211A) ?
  4621. IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_24 :
  4622. IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_52;
  4623. if (iwl_is_associated(priv)) {
  4624. /* If we're associated, we clamp the maximum passive
  4625. * dwell time to be 98% of the beacon interval (minus
  4626. * 2 * channel tune time) */
  4627. passive = priv->beacon_int;
  4628. if ((passive > IWL_PASSIVE_DWELL_BASE) || !passive)
  4629. passive = IWL_PASSIVE_DWELL_BASE;
  4630. passive = (passive * 98) / 100 - IWL_CHANNEL_TUNE_TIME * 2;
  4631. }
  4632. if (passive <= active)
  4633. passive = active + 1;
  4634. return passive;
  4635. }
  4636. static int iwl_get_channels_for_scan(struct iwl_priv *priv, int phymode,
  4637. u8 is_active, u8 direct_mask,
  4638. struct iwl_scan_channel *scan_ch)
  4639. {
  4640. const struct ieee80211_channel *channels = NULL;
  4641. const struct ieee80211_hw_mode *hw_mode;
  4642. const struct iwl_channel_info *ch_info;
  4643. u16 passive_dwell = 0;
  4644. u16 active_dwell = 0;
  4645. int added, i;
  4646. hw_mode = iwl_get_hw_mode(priv, phymode);
  4647. if (!hw_mode)
  4648. return 0;
  4649. channels = hw_mode->channels;
  4650. active_dwell = iwl_get_active_dwell_time(priv, phymode);
  4651. passive_dwell = iwl_get_passive_dwell_time(priv, phymode);
  4652. for (i = 0, added = 0; i < hw_mode->num_channels; i++) {
  4653. if (channels[i].chan ==
  4654. le16_to_cpu(priv->active_rxon.channel)) {
  4655. if (iwl_is_associated(priv)) {
  4656. IWL_DEBUG_SCAN
  4657. ("Skipping current channel %d\n",
  4658. le16_to_cpu(priv->active_rxon.channel));
  4659. continue;
  4660. }
  4661. } else if (priv->only_active_channel)
  4662. continue;
  4663. scan_ch->channel = channels[i].chan;
  4664. ch_info = iwl_get_channel_info(priv, phymode, scan_ch->channel);
  4665. if (!is_channel_valid(ch_info)) {
  4666. IWL_DEBUG_SCAN("Channel %d is INVALID for this SKU.\n",
  4667. scan_ch->channel);
  4668. continue;
  4669. }
  4670. if (!is_active || is_channel_passive(ch_info) ||
  4671. !(channels[i].flag & IEEE80211_CHAN_W_ACTIVE_SCAN))
  4672. scan_ch->type = 0; /* passive */
  4673. else
  4674. scan_ch->type = 1; /* active */
  4675. if (scan_ch->type & 1)
  4676. scan_ch->type |= (direct_mask << 1);
  4677. if (is_channel_narrow(ch_info))
  4678. scan_ch->type |= (1 << 7);
  4679. scan_ch->active_dwell = cpu_to_le16(active_dwell);
  4680. scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
  4681. /* Set power levels to defaults */
  4682. scan_ch->tpc.dsp_atten = 110;
  4683. /* scan_pwr_info->tpc.dsp_atten; */
  4684. /*scan_pwr_info->tpc.tx_gain; */
  4685. if (phymode == MODE_IEEE80211A)
  4686. scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
  4687. else {
  4688. scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
  4689. /* NOTE: if we were doing 6Mb OFDM for scans we'd use
  4690. * power level
  4691. scan_ch->tpc.tx_gain = ((1<<5) | (2 << 3)) | 3;
  4692. */
  4693. }
  4694. IWL_DEBUG_SCAN("Scanning %d [%s %d]\n",
  4695. scan_ch->channel,
  4696. (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
  4697. (scan_ch->type & 1) ?
  4698. active_dwell : passive_dwell);
  4699. scan_ch++;
  4700. added++;
  4701. }
  4702. IWL_DEBUG_SCAN("total channels to scan %d \n", added);
  4703. return added;
  4704. }
  4705. static void iwl_reset_channel_flag(struct iwl_priv *priv)
  4706. {
  4707. int i, j;
  4708. for (i = 0; i < 3; i++) {
  4709. struct ieee80211_hw_mode *hw_mode = (void *)&priv->modes[i];
  4710. for (j = 0; j < hw_mode->num_channels; j++)
  4711. hw_mode->channels[j].flag = hw_mode->channels[j].val;
  4712. }
  4713. }
  4714. static void iwl_init_hw_rates(struct iwl_priv *priv,
  4715. struct ieee80211_rate *rates)
  4716. {
  4717. int i;
  4718. for (i = 0; i < IWL_RATE_COUNT; i++) {
  4719. rates[i].rate = iwl_rates[i].ieee * 5;
  4720. rates[i].val = i; /* Rate scaling will work on indexes */
  4721. rates[i].val2 = i;
  4722. rates[i].flags = IEEE80211_RATE_SUPPORTED;
  4723. /* Only OFDM have the bits-per-symbol set */
  4724. if ((i <= IWL_LAST_OFDM_RATE) && (i >= IWL_FIRST_OFDM_RATE))
  4725. rates[i].flags |= IEEE80211_RATE_OFDM;
  4726. else {
  4727. /*
  4728. * If CCK 1M then set rate flag to CCK else CCK_2
  4729. * which is CCK | PREAMBLE2
  4730. */
  4731. rates[i].flags |= (iwl_rates[i].plcp == 10) ?
  4732. IEEE80211_RATE_CCK : IEEE80211_RATE_CCK_2;
  4733. }
  4734. /* Set up which ones are basic rates... */
  4735. if (IWL_BASIC_RATES_MASK & (1 << i))
  4736. rates[i].flags |= IEEE80211_RATE_BASIC;
  4737. }
  4738. iwl4965_init_hw_rates(priv, rates);
  4739. }
  4740. /**
  4741. * iwl_init_geos - Initialize mac80211's geo/channel info based from eeprom
  4742. */
  4743. static int iwl_init_geos(struct iwl_priv *priv)
  4744. {
  4745. struct iwl_channel_info *ch;
  4746. struct ieee80211_hw_mode *modes;
  4747. struct ieee80211_channel *channels;
  4748. struct ieee80211_channel *geo_ch;
  4749. struct ieee80211_rate *rates;
  4750. int i = 0;
  4751. enum {
  4752. A = 0,
  4753. B = 1,
  4754. G = 2,
  4755. A_11N = 3,
  4756. G_11N = 4,
  4757. };
  4758. int mode_count = 5;
  4759. if (priv->modes) {
  4760. IWL_DEBUG_INFO("Geography modes already initialized.\n");
  4761. set_bit(STATUS_GEO_CONFIGURED, &priv->status);
  4762. return 0;
  4763. }
  4764. modes = kzalloc(sizeof(struct ieee80211_hw_mode) * mode_count,
  4765. GFP_KERNEL);
  4766. if (!modes)
  4767. return -ENOMEM;
  4768. channels = kzalloc(sizeof(struct ieee80211_channel) *
  4769. priv->channel_count, GFP_KERNEL);
  4770. if (!channels) {
  4771. kfree(modes);
  4772. return -ENOMEM;
  4773. }
  4774. rates = kzalloc((sizeof(struct ieee80211_rate) * (IWL_MAX_RATES + 1)),
  4775. GFP_KERNEL);
  4776. if (!rates) {
  4777. kfree(modes);
  4778. kfree(channels);
  4779. return -ENOMEM;
  4780. }
  4781. /* 0 = 802.11a
  4782. * 1 = 802.11b
  4783. * 2 = 802.11g
  4784. */
  4785. /* 5.2GHz channels start after the 2.4GHz channels */
  4786. modes[A].mode = MODE_IEEE80211A;
  4787. modes[A].channels = &channels[ARRAY_SIZE(iwl_eeprom_band_1)];
  4788. modes[A].rates = rates;
  4789. modes[A].num_rates = 8; /* just OFDM */
  4790. modes[A].rates = &rates[4];
  4791. modes[A].num_channels = 0;
  4792. modes[B].mode = MODE_IEEE80211B;
  4793. modes[B].channels = channels;
  4794. modes[B].rates = rates;
  4795. modes[B].num_rates = 4; /* just CCK */
  4796. modes[B].num_channels = 0;
  4797. modes[G].mode = MODE_IEEE80211G;
  4798. modes[G].channels = channels;
  4799. modes[G].rates = rates;
  4800. modes[G].num_rates = 12; /* OFDM & CCK */
  4801. modes[G].num_channels = 0;
  4802. modes[G_11N].mode = MODE_IEEE80211G;
  4803. modes[G_11N].channels = channels;
  4804. modes[G_11N].num_rates = 13; /* OFDM & CCK */
  4805. modes[G_11N].rates = rates;
  4806. modes[G_11N].num_channels = 0;
  4807. modes[A_11N].mode = MODE_IEEE80211A;
  4808. modes[A_11N].channels = &channels[ARRAY_SIZE(iwl_eeprom_band_1)];
  4809. modes[A_11N].rates = &rates[4];
  4810. modes[A_11N].num_rates = 9; /* just OFDM */
  4811. modes[A_11N].num_channels = 0;
  4812. priv->ieee_channels = channels;
  4813. priv->ieee_rates = rates;
  4814. iwl_init_hw_rates(priv, rates);
  4815. for (i = 0, geo_ch = channels; i < priv->channel_count; i++) {
  4816. ch = &priv->channel_info[i];
  4817. if (!is_channel_valid(ch)) {
  4818. IWL_DEBUG_INFO("Channel %d [%sGHz] is restricted -- "
  4819. "skipping.\n",
  4820. ch->channel, is_channel_a_band(ch) ?
  4821. "5.2" : "2.4");
  4822. continue;
  4823. }
  4824. if (is_channel_a_band(ch)) {
  4825. geo_ch = &modes[A].channels[modes[A].num_channels++];
  4826. modes[A_11N].num_channels++;
  4827. } else {
  4828. geo_ch = &modes[B].channels[modes[B].num_channels++];
  4829. modes[G].num_channels++;
  4830. modes[G_11N].num_channels++;
  4831. }
  4832. geo_ch->freq = ieee80211chan2mhz(ch->channel);
  4833. geo_ch->chan = ch->channel;
  4834. geo_ch->power_level = ch->max_power_avg;
  4835. geo_ch->antenna_max = 0xff;
  4836. if (is_channel_valid(ch)) {
  4837. geo_ch->flag = IEEE80211_CHAN_W_SCAN;
  4838. if (ch->flags & EEPROM_CHANNEL_IBSS)
  4839. geo_ch->flag |= IEEE80211_CHAN_W_IBSS;
  4840. if (ch->flags & EEPROM_CHANNEL_ACTIVE)
  4841. geo_ch->flag |= IEEE80211_CHAN_W_ACTIVE_SCAN;
  4842. if (ch->flags & EEPROM_CHANNEL_RADAR)
  4843. geo_ch->flag |= IEEE80211_CHAN_W_RADAR_DETECT;
  4844. if (ch->max_power_avg > priv->max_channel_txpower_limit)
  4845. priv->max_channel_txpower_limit =
  4846. ch->max_power_avg;
  4847. }
  4848. geo_ch->val = geo_ch->flag;
  4849. }
  4850. if ((modes[A].num_channels == 0) && priv->is_abg) {
  4851. printk(KERN_INFO DRV_NAME
  4852. ": Incorrectly detected BG card as ABG. Please send "
  4853. "your PCI ID 0x%04X:0x%04X to maintainer.\n",
  4854. priv->pci_dev->device, priv->pci_dev->subsystem_device);
  4855. priv->is_abg = 0;
  4856. }
  4857. printk(KERN_INFO DRV_NAME
  4858. ": Tunable channels: %d 802.11bg, %d 802.11a channels\n",
  4859. modes[G].num_channels, modes[A].num_channels);
  4860. /*
  4861. * NOTE: We register these in preference of order -- the
  4862. * stack doesn't currently (as of 7.0.6 / Apr 24 '07) pick
  4863. * a phymode based on rates or AP capabilities but seems to
  4864. * configure it purely on if the channel being configured
  4865. * is supported by a mode -- and the first match is taken
  4866. */
  4867. if (modes[G].num_channels)
  4868. ieee80211_register_hwmode(priv->hw, &modes[G]);
  4869. if (modes[B].num_channels)
  4870. ieee80211_register_hwmode(priv->hw, &modes[B]);
  4871. if (modes[A].num_channels)
  4872. ieee80211_register_hwmode(priv->hw, &modes[A]);
  4873. priv->modes = modes;
  4874. set_bit(STATUS_GEO_CONFIGURED, &priv->status);
  4875. return 0;
  4876. }
  4877. /******************************************************************************
  4878. *
  4879. * uCode download functions
  4880. *
  4881. ******************************************************************************/
  4882. static void iwl_dealloc_ucode_pci(struct iwl_priv *priv)
  4883. {
  4884. if (priv->ucode_code.v_addr != NULL) {
  4885. pci_free_consistent(priv->pci_dev,
  4886. priv->ucode_code.len,
  4887. priv->ucode_code.v_addr,
  4888. priv->ucode_code.p_addr);
  4889. priv->ucode_code.v_addr = NULL;
  4890. }
  4891. if (priv->ucode_data.v_addr != NULL) {
  4892. pci_free_consistent(priv->pci_dev,
  4893. priv->ucode_data.len,
  4894. priv->ucode_data.v_addr,
  4895. priv->ucode_data.p_addr);
  4896. priv->ucode_data.v_addr = NULL;
  4897. }
  4898. if (priv->ucode_data_backup.v_addr != NULL) {
  4899. pci_free_consistent(priv->pci_dev,
  4900. priv->ucode_data_backup.len,
  4901. priv->ucode_data_backup.v_addr,
  4902. priv->ucode_data_backup.p_addr);
  4903. priv->ucode_data_backup.v_addr = NULL;
  4904. }
  4905. if (priv->ucode_init.v_addr != NULL) {
  4906. pci_free_consistent(priv->pci_dev,
  4907. priv->ucode_init.len,
  4908. priv->ucode_init.v_addr,
  4909. priv->ucode_init.p_addr);
  4910. priv->ucode_init.v_addr = NULL;
  4911. }
  4912. if (priv->ucode_init_data.v_addr != NULL) {
  4913. pci_free_consistent(priv->pci_dev,
  4914. priv->ucode_init_data.len,
  4915. priv->ucode_init_data.v_addr,
  4916. priv->ucode_init_data.p_addr);
  4917. priv->ucode_init_data.v_addr = NULL;
  4918. }
  4919. if (priv->ucode_boot.v_addr != NULL) {
  4920. pci_free_consistent(priv->pci_dev,
  4921. priv->ucode_boot.len,
  4922. priv->ucode_boot.v_addr,
  4923. priv->ucode_boot.p_addr);
  4924. priv->ucode_boot.v_addr = NULL;
  4925. }
  4926. }
  4927. /**
  4928. * iwl_verify_inst_full - verify runtime uCode image in card vs. host,
  4929. * looking at all data.
  4930. */
  4931. static int iwl_verify_inst_full(struct iwl_priv *priv, __le32 * image, u32 len)
  4932. {
  4933. u32 val;
  4934. u32 save_len = len;
  4935. int rc = 0;
  4936. u32 errcnt;
  4937. IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
  4938. rc = iwl_grab_restricted_access(priv);
  4939. if (rc)
  4940. return rc;
  4941. iwl_write_restricted(priv, HBUS_TARG_MEM_RADDR, RTC_INST_LOWER_BOUND);
  4942. errcnt = 0;
  4943. for (; len > 0; len -= sizeof(u32), image++) {
  4944. /* read data comes through single port, auto-incr addr */
  4945. /* NOTE: Use the debugless read so we don't flood kernel log
  4946. * if IWL_DL_IO is set */
  4947. val = _iwl_read_restricted(priv, HBUS_TARG_MEM_RDAT);
  4948. if (val != le32_to_cpu(*image)) {
  4949. IWL_ERROR("uCode INST section is invalid at "
  4950. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  4951. save_len - len, val, le32_to_cpu(*image));
  4952. rc = -EIO;
  4953. errcnt++;
  4954. if (errcnt >= 20)
  4955. break;
  4956. }
  4957. }
  4958. iwl_release_restricted_access(priv);
  4959. if (!errcnt)
  4960. IWL_DEBUG_INFO
  4961. ("ucode image in INSTRUCTION memory is good\n");
  4962. return rc;
  4963. }
  4964. /**
  4965. * iwl_verify_inst_sparse - verify runtime uCode image in card vs. host,
  4966. * using sample data 100 bytes apart. If these sample points are good,
  4967. * it's a pretty good bet that everything between them is good, too.
  4968. */
  4969. static int iwl_verify_inst_sparse(struct iwl_priv *priv, __le32 *image, u32 len)
  4970. {
  4971. u32 val;
  4972. int rc = 0;
  4973. u32 errcnt = 0;
  4974. u32 i;
  4975. IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
  4976. rc = iwl_grab_restricted_access(priv);
  4977. if (rc)
  4978. return rc;
  4979. for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
  4980. /* read data comes through single port, auto-incr addr */
  4981. /* NOTE: Use the debugless read so we don't flood kernel log
  4982. * if IWL_DL_IO is set */
  4983. iwl_write_restricted(priv, HBUS_TARG_MEM_RADDR,
  4984. i + RTC_INST_LOWER_BOUND);
  4985. val = _iwl_read_restricted(priv, HBUS_TARG_MEM_RDAT);
  4986. if (val != le32_to_cpu(*image)) {
  4987. #if 0 /* Enable this if you want to see details */
  4988. IWL_ERROR("uCode INST section is invalid at "
  4989. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  4990. i, val, *image);
  4991. #endif
  4992. rc = -EIO;
  4993. errcnt++;
  4994. if (errcnt >= 3)
  4995. break;
  4996. }
  4997. }
  4998. iwl_release_restricted_access(priv);
  4999. return rc;
  5000. }
  5001. /**
  5002. * iwl_verify_ucode - determine which instruction image is in SRAM,
  5003. * and verify its contents
  5004. */
  5005. static int iwl_verify_ucode(struct iwl_priv *priv)
  5006. {
  5007. __le32 *image;
  5008. u32 len;
  5009. int rc = 0;
  5010. /* Try bootstrap */
  5011. image = (__le32 *)priv->ucode_boot.v_addr;
  5012. len = priv->ucode_boot.len;
  5013. rc = iwl_verify_inst_sparse(priv, image, len);
  5014. if (rc == 0) {
  5015. IWL_DEBUG_INFO("Bootstrap uCode is good in inst SRAM\n");
  5016. return 0;
  5017. }
  5018. /* Try initialize */
  5019. image = (__le32 *)priv->ucode_init.v_addr;
  5020. len = priv->ucode_init.len;
  5021. rc = iwl_verify_inst_sparse(priv, image, len);
  5022. if (rc == 0) {
  5023. IWL_DEBUG_INFO("Initialize uCode is good in inst SRAM\n");
  5024. return 0;
  5025. }
  5026. /* Try runtime/protocol */
  5027. image = (__le32 *)priv->ucode_code.v_addr;
  5028. len = priv->ucode_code.len;
  5029. rc = iwl_verify_inst_sparse(priv, image, len);
  5030. if (rc == 0) {
  5031. IWL_DEBUG_INFO("Runtime uCode is good in inst SRAM\n");
  5032. return 0;
  5033. }
  5034. IWL_ERROR("NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
  5035. /* Show first several data entries in instruction SRAM.
  5036. * Selection of bootstrap image is arbitrary. */
  5037. image = (__le32 *)priv->ucode_boot.v_addr;
  5038. len = priv->ucode_boot.len;
  5039. rc = iwl_verify_inst_full(priv, image, len);
  5040. return rc;
  5041. }
  5042. /* check contents of special bootstrap uCode SRAM */
  5043. static int iwl_verify_bsm(struct iwl_priv *priv)
  5044. {
  5045. __le32 *image = priv->ucode_boot.v_addr;
  5046. u32 len = priv->ucode_boot.len;
  5047. u32 reg;
  5048. u32 val;
  5049. IWL_DEBUG_INFO("Begin verify bsm\n");
  5050. /* verify BSM SRAM contents */
  5051. val = iwl_read_restricted_reg(priv, BSM_WR_DWCOUNT_REG);
  5052. for (reg = BSM_SRAM_LOWER_BOUND;
  5053. reg < BSM_SRAM_LOWER_BOUND + len;
  5054. reg += sizeof(u32), image ++) {
  5055. val = iwl_read_restricted_reg(priv, reg);
  5056. if (val != le32_to_cpu(*image)) {
  5057. IWL_ERROR("BSM uCode verification failed at "
  5058. "addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n",
  5059. BSM_SRAM_LOWER_BOUND,
  5060. reg - BSM_SRAM_LOWER_BOUND, len,
  5061. val, le32_to_cpu(*image));
  5062. return -EIO;
  5063. }
  5064. }
  5065. IWL_DEBUG_INFO("BSM bootstrap uCode image OK\n");
  5066. return 0;
  5067. }
  5068. /**
  5069. * iwl_load_bsm - Load bootstrap instructions
  5070. *
  5071. * BSM operation:
  5072. *
  5073. * The Bootstrap State Machine (BSM) stores a short bootstrap uCode program
  5074. * in special SRAM that does not power down during RFKILL. When powering back
  5075. * up after power-saving sleeps (or during initial uCode load), the BSM loads
  5076. * the bootstrap program into the on-board processor, and starts it.
  5077. *
  5078. * The bootstrap program loads (via DMA) instructions and data for a new
  5079. * program from host DRAM locations indicated by the host driver in the
  5080. * BSM_DRAM_* registers. Once the new program is loaded, it starts
  5081. * automatically.
  5082. *
  5083. * When initializing the NIC, the host driver points the BSM to the
  5084. * "initialize" uCode image. This uCode sets up some internal data, then
  5085. * notifies host via "initialize alive" that it is complete.
  5086. *
  5087. * The host then replaces the BSM_DRAM_* pointer values to point to the
  5088. * normal runtime uCode instructions and a backup uCode data cache buffer
  5089. * (filled initially with starting data values for the on-board processor),
  5090. * then triggers the "initialize" uCode to load and launch the runtime uCode,
  5091. * which begins normal operation.
  5092. *
  5093. * When doing a power-save shutdown, runtime uCode saves data SRAM into
  5094. * the backup data cache in DRAM before SRAM is powered down.
  5095. *
  5096. * When powering back up, the BSM loads the bootstrap program. This reloads
  5097. * the runtime uCode instructions and the backup data cache into SRAM,
  5098. * and re-launches the runtime uCode from where it left off.
  5099. */
  5100. static int iwl_load_bsm(struct iwl_priv *priv)
  5101. {
  5102. __le32 *image = priv->ucode_boot.v_addr;
  5103. u32 len = priv->ucode_boot.len;
  5104. dma_addr_t pinst;
  5105. dma_addr_t pdata;
  5106. u32 inst_len;
  5107. u32 data_len;
  5108. int rc;
  5109. int i;
  5110. u32 done;
  5111. u32 reg_offset;
  5112. IWL_DEBUG_INFO("Begin load bsm\n");
  5113. /* make sure bootstrap program is no larger than BSM's SRAM size */
  5114. if (len > IWL_MAX_BSM_SIZE)
  5115. return -EINVAL;
  5116. /* Tell bootstrap uCode where to find the "Initialize" uCode
  5117. * in host DRAM ... bits 31:0 for 3945, bits 35:4 for 4965.
  5118. * NOTE: iwl_initialize_alive_start() will replace these values,
  5119. * after the "initialize" uCode has run, to point to
  5120. * runtime/protocol instructions and backup data cache. */
  5121. pinst = priv->ucode_init.p_addr >> 4;
  5122. pdata = priv->ucode_init_data.p_addr >> 4;
  5123. inst_len = priv->ucode_init.len;
  5124. data_len = priv->ucode_init_data.len;
  5125. rc = iwl_grab_restricted_access(priv);
  5126. if (rc)
  5127. return rc;
  5128. iwl_write_restricted_reg(priv, BSM_DRAM_INST_PTR_REG, pinst);
  5129. iwl_write_restricted_reg(priv, BSM_DRAM_DATA_PTR_REG, pdata);
  5130. iwl_write_restricted_reg(priv, BSM_DRAM_INST_BYTECOUNT_REG, inst_len);
  5131. iwl_write_restricted_reg(priv, BSM_DRAM_DATA_BYTECOUNT_REG, data_len);
  5132. /* Fill BSM memory with bootstrap instructions */
  5133. for (reg_offset = BSM_SRAM_LOWER_BOUND;
  5134. reg_offset < BSM_SRAM_LOWER_BOUND + len;
  5135. reg_offset += sizeof(u32), image++)
  5136. _iwl_write_restricted_reg(priv, reg_offset,
  5137. le32_to_cpu(*image));
  5138. rc = iwl_verify_bsm(priv);
  5139. if (rc) {
  5140. iwl_release_restricted_access(priv);
  5141. return rc;
  5142. }
  5143. /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */
  5144. iwl_write_restricted_reg(priv, BSM_WR_MEM_SRC_REG, 0x0);
  5145. iwl_write_restricted_reg(priv, BSM_WR_MEM_DST_REG,
  5146. RTC_INST_LOWER_BOUND);
  5147. iwl_write_restricted_reg(priv, BSM_WR_DWCOUNT_REG, len / sizeof(u32));
  5148. /* Load bootstrap code into instruction SRAM now,
  5149. * to prepare to load "initialize" uCode */
  5150. iwl_write_restricted_reg(priv, BSM_WR_CTRL_REG,
  5151. BSM_WR_CTRL_REG_BIT_START);
  5152. /* Wait for load of bootstrap uCode to finish */
  5153. for (i = 0; i < 100; i++) {
  5154. done = iwl_read_restricted_reg(priv, BSM_WR_CTRL_REG);
  5155. if (!(done & BSM_WR_CTRL_REG_BIT_START))
  5156. break;
  5157. udelay(10);
  5158. }
  5159. if (i < 100)
  5160. IWL_DEBUG_INFO("BSM write complete, poll %d iterations\n", i);
  5161. else {
  5162. IWL_ERROR("BSM write did not complete!\n");
  5163. return -EIO;
  5164. }
  5165. /* Enable future boot loads whenever power management unit triggers it
  5166. * (e.g. when powering back up after power-save shutdown) */
  5167. iwl_write_restricted_reg(priv, BSM_WR_CTRL_REG,
  5168. BSM_WR_CTRL_REG_BIT_START_EN);
  5169. iwl_release_restricted_access(priv);
  5170. return 0;
  5171. }
  5172. static void iwl_nic_start(struct iwl_priv *priv)
  5173. {
  5174. /* Remove all resets to allow NIC to operate */
  5175. iwl_write32(priv, CSR_RESET, 0);
  5176. }
  5177. /**
  5178. * iwl_read_ucode - Read uCode images from disk file.
  5179. *
  5180. * Copy into buffers for card to fetch via bus-mastering
  5181. */
  5182. static int iwl_read_ucode(struct iwl_priv *priv)
  5183. {
  5184. struct iwl_ucode *ucode;
  5185. int rc = 0;
  5186. const struct firmware *ucode_raw;
  5187. const char *name = "iwlwifi-4965" IWL4965_UCODE_API ".ucode";
  5188. u8 *src;
  5189. size_t len;
  5190. u32 ver, inst_size, data_size, init_size, init_data_size, boot_size;
  5191. /* Ask kernel firmware_class module to get the boot firmware off disk.
  5192. * request_firmware() is synchronous, file is in memory on return. */
  5193. rc = request_firmware(&ucode_raw, name, &priv->pci_dev->dev);
  5194. if (rc < 0) {
  5195. IWL_ERROR("%s firmware file req failed: Reason %d\n", name, rc);
  5196. goto error;
  5197. }
  5198. IWL_DEBUG_INFO("Got firmware '%s' file (%zd bytes) from disk\n",
  5199. name, ucode_raw->size);
  5200. /* Make sure that we got at least our header! */
  5201. if (ucode_raw->size < sizeof(*ucode)) {
  5202. IWL_ERROR("File size way too small!\n");
  5203. rc = -EINVAL;
  5204. goto err_release;
  5205. }
  5206. /* Data from ucode file: header followed by uCode images */
  5207. ucode = (void *)ucode_raw->data;
  5208. ver = le32_to_cpu(ucode->ver);
  5209. inst_size = le32_to_cpu(ucode->inst_size);
  5210. data_size = le32_to_cpu(ucode->data_size);
  5211. init_size = le32_to_cpu(ucode->init_size);
  5212. init_data_size = le32_to_cpu(ucode->init_data_size);
  5213. boot_size = le32_to_cpu(ucode->boot_size);
  5214. IWL_DEBUG_INFO("f/w package hdr ucode version = 0x%x\n", ver);
  5215. IWL_DEBUG_INFO("f/w package hdr runtime inst size = %u\n",
  5216. inst_size);
  5217. IWL_DEBUG_INFO("f/w package hdr runtime data size = %u\n",
  5218. data_size);
  5219. IWL_DEBUG_INFO("f/w package hdr init inst size = %u\n",
  5220. init_size);
  5221. IWL_DEBUG_INFO("f/w package hdr init data size = %u\n",
  5222. init_data_size);
  5223. IWL_DEBUG_INFO("f/w package hdr boot inst size = %u\n",
  5224. boot_size);
  5225. /* Verify size of file vs. image size info in file's header */
  5226. if (ucode_raw->size < sizeof(*ucode) +
  5227. inst_size + data_size + init_size +
  5228. init_data_size + boot_size) {
  5229. IWL_DEBUG_INFO("uCode file size %d too small\n",
  5230. (int)ucode_raw->size);
  5231. rc = -EINVAL;
  5232. goto err_release;
  5233. }
  5234. /* Verify that uCode images will fit in card's SRAM */
  5235. if (inst_size > IWL_MAX_INST_SIZE) {
  5236. IWL_DEBUG_INFO("uCode instr len %d too large to fit in card\n",
  5237. (int)inst_size);
  5238. rc = -EINVAL;
  5239. goto err_release;
  5240. }
  5241. if (data_size > IWL_MAX_DATA_SIZE) {
  5242. IWL_DEBUG_INFO("uCode data len %d too large to fit in card\n",
  5243. (int)data_size);
  5244. rc = -EINVAL;
  5245. goto err_release;
  5246. }
  5247. if (init_size > IWL_MAX_INST_SIZE) {
  5248. IWL_DEBUG_INFO
  5249. ("uCode init instr len %d too large to fit in card\n",
  5250. (int)init_size);
  5251. rc = -EINVAL;
  5252. goto err_release;
  5253. }
  5254. if (init_data_size > IWL_MAX_DATA_SIZE) {
  5255. IWL_DEBUG_INFO
  5256. ("uCode init data len %d too large to fit in card\n",
  5257. (int)init_data_size);
  5258. rc = -EINVAL;
  5259. goto err_release;
  5260. }
  5261. if (boot_size > IWL_MAX_BSM_SIZE) {
  5262. IWL_DEBUG_INFO
  5263. ("uCode boot instr len %d too large to fit in bsm\n",
  5264. (int)boot_size);
  5265. rc = -EINVAL;
  5266. goto err_release;
  5267. }
  5268. /* Allocate ucode buffers for card's bus-master loading ... */
  5269. /* Runtime instructions and 2 copies of data:
  5270. * 1) unmodified from disk
  5271. * 2) backup cache for save/restore during power-downs */
  5272. priv->ucode_code.len = inst_size;
  5273. priv->ucode_code.v_addr =
  5274. pci_alloc_consistent(priv->pci_dev,
  5275. priv->ucode_code.len,
  5276. &(priv->ucode_code.p_addr));
  5277. priv->ucode_data.len = data_size;
  5278. priv->ucode_data.v_addr =
  5279. pci_alloc_consistent(priv->pci_dev,
  5280. priv->ucode_data.len,
  5281. &(priv->ucode_data.p_addr));
  5282. priv->ucode_data_backup.len = data_size;
  5283. priv->ucode_data_backup.v_addr =
  5284. pci_alloc_consistent(priv->pci_dev,
  5285. priv->ucode_data_backup.len,
  5286. &(priv->ucode_data_backup.p_addr));
  5287. /* Initialization instructions and data */
  5288. priv->ucode_init.len = init_size;
  5289. priv->ucode_init.v_addr =
  5290. pci_alloc_consistent(priv->pci_dev,
  5291. priv->ucode_init.len,
  5292. &(priv->ucode_init.p_addr));
  5293. priv->ucode_init_data.len = init_data_size;
  5294. priv->ucode_init_data.v_addr =
  5295. pci_alloc_consistent(priv->pci_dev,
  5296. priv->ucode_init_data.len,
  5297. &(priv->ucode_init_data.p_addr));
  5298. /* Bootstrap (instructions only, no data) */
  5299. priv->ucode_boot.len = boot_size;
  5300. priv->ucode_boot.v_addr =
  5301. pci_alloc_consistent(priv->pci_dev,
  5302. priv->ucode_boot.len,
  5303. &(priv->ucode_boot.p_addr));
  5304. if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
  5305. !priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr ||
  5306. !priv->ucode_boot.v_addr || !priv->ucode_data_backup.v_addr)
  5307. goto err_pci_alloc;
  5308. /* Copy images into buffers for card's bus-master reads ... */
  5309. /* Runtime instructions (first block of data in file) */
  5310. src = &ucode->data[0];
  5311. len = priv->ucode_code.len;
  5312. IWL_DEBUG_INFO("Copying (but not loading) uCode instr len %d\n",
  5313. (int)len);
  5314. memcpy(priv->ucode_code.v_addr, src, len);
  5315. IWL_DEBUG_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
  5316. priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
  5317. /* Runtime data (2nd block)
  5318. * NOTE: Copy into backup buffer will be done in iwl_up() */
  5319. src = &ucode->data[inst_size];
  5320. len = priv->ucode_data.len;
  5321. IWL_DEBUG_INFO("Copying (but not loading) uCode data len %d\n",
  5322. (int)len);
  5323. memcpy(priv->ucode_data.v_addr, src, len);
  5324. memcpy(priv->ucode_data_backup.v_addr, src, len);
  5325. /* Initialization instructions (3rd block) */
  5326. if (init_size) {
  5327. src = &ucode->data[inst_size + data_size];
  5328. len = priv->ucode_init.len;
  5329. IWL_DEBUG_INFO("Copying (but not loading) init instr len %d\n",
  5330. (int)len);
  5331. memcpy(priv->ucode_init.v_addr, src, len);
  5332. }
  5333. /* Initialization data (4th block) */
  5334. if (init_data_size) {
  5335. src = &ucode->data[inst_size + data_size + init_size];
  5336. len = priv->ucode_init_data.len;
  5337. IWL_DEBUG_INFO("Copying (but not loading) init data len %d\n",
  5338. (int)len);
  5339. memcpy(priv->ucode_init_data.v_addr, src, len);
  5340. }
  5341. /* Bootstrap instructions (5th block) */
  5342. src = &ucode->data[inst_size + data_size + init_size + init_data_size];
  5343. len = priv->ucode_boot.len;
  5344. IWL_DEBUG_INFO("Copying (but not loading) boot instr len %d\n",
  5345. (int)len);
  5346. memcpy(priv->ucode_boot.v_addr, src, len);
  5347. /* We have our copies now, allow OS release its copies */
  5348. release_firmware(ucode_raw);
  5349. return 0;
  5350. err_pci_alloc:
  5351. IWL_ERROR("failed to allocate pci memory\n");
  5352. rc = -ENOMEM;
  5353. iwl_dealloc_ucode_pci(priv);
  5354. err_release:
  5355. release_firmware(ucode_raw);
  5356. error:
  5357. return rc;
  5358. }
  5359. /**
  5360. * iwl_set_ucode_ptrs - Set uCode address location
  5361. *
  5362. * Tell initialization uCode where to find runtime uCode.
  5363. *
  5364. * BSM registers initially contain pointers to initialization uCode.
  5365. * We need to replace them to load runtime uCode inst and data,
  5366. * and to save runtime data when powering down.
  5367. */
  5368. static int iwl_set_ucode_ptrs(struct iwl_priv *priv)
  5369. {
  5370. dma_addr_t pinst;
  5371. dma_addr_t pdata;
  5372. int rc = 0;
  5373. unsigned long flags;
  5374. /* bits 35:4 for 4965 */
  5375. pinst = priv->ucode_code.p_addr >> 4;
  5376. pdata = priv->ucode_data_backup.p_addr >> 4;
  5377. spin_lock_irqsave(&priv->lock, flags);
  5378. rc = iwl_grab_restricted_access(priv);
  5379. if (rc) {
  5380. spin_unlock_irqrestore(&priv->lock, flags);
  5381. return rc;
  5382. }
  5383. /* Tell bootstrap uCode where to find image to load */
  5384. iwl_write_restricted_reg(priv, BSM_DRAM_INST_PTR_REG, pinst);
  5385. iwl_write_restricted_reg(priv, BSM_DRAM_DATA_PTR_REG, pdata);
  5386. iwl_write_restricted_reg(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
  5387. priv->ucode_data.len);
  5388. /* Inst bytecount must be last to set up, bit 31 signals uCode
  5389. * that all new ptr/size info is in place */
  5390. iwl_write_restricted_reg(priv, BSM_DRAM_INST_BYTECOUNT_REG,
  5391. priv->ucode_code.len | BSM_DRAM_INST_LOAD);
  5392. iwl_release_restricted_access(priv);
  5393. spin_unlock_irqrestore(&priv->lock, flags);
  5394. IWL_DEBUG_INFO("Runtime uCode pointers are set.\n");
  5395. return rc;
  5396. }
  5397. /**
  5398. * iwl_init_alive_start - Called after REPLY_ALIVE notification receieved
  5399. *
  5400. * Called after REPLY_ALIVE notification received from "initialize" uCode.
  5401. *
  5402. * The 4965 "initialize" ALIVE reply contains calibration data for:
  5403. * Voltage, temperature, and MIMO tx gain correction, now stored in priv
  5404. * (3945 does not contain this data).
  5405. *
  5406. * Tell "initialize" uCode to go ahead and load the runtime uCode.
  5407. */
  5408. static void iwl_init_alive_start(struct iwl_priv *priv)
  5409. {
  5410. /* Check alive response for "valid" sign from uCode */
  5411. if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
  5412. /* We had an error bringing up the hardware, so take it
  5413. * all the way back down so we can try again */
  5414. IWL_DEBUG_INFO("Initialize Alive failed.\n");
  5415. goto restart;
  5416. }
  5417. /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
  5418. * This is a paranoid check, because we would not have gotten the
  5419. * "initialize" alive if code weren't properly loaded. */
  5420. if (iwl_verify_ucode(priv)) {
  5421. /* Runtime instruction load was bad;
  5422. * take it all the way back down so we can try again */
  5423. IWL_DEBUG_INFO("Bad \"initialize\" uCode load.\n");
  5424. goto restart;
  5425. }
  5426. /* Calculate temperature */
  5427. priv->temperature = iwl4965_get_temperature(priv);
  5428. /* Send pointers to protocol/runtime uCode image ... init code will
  5429. * load and launch runtime uCode, which will send us another "Alive"
  5430. * notification. */
  5431. IWL_DEBUG_INFO("Initialization Alive received.\n");
  5432. if (iwl_set_ucode_ptrs(priv)) {
  5433. /* Runtime instruction load won't happen;
  5434. * take it all the way back down so we can try again */
  5435. IWL_DEBUG_INFO("Couldn't set up uCode pointers.\n");
  5436. goto restart;
  5437. }
  5438. return;
  5439. restart:
  5440. queue_work(priv->workqueue, &priv->restart);
  5441. }
  5442. /**
  5443. * iwl_alive_start - called after REPLY_ALIVE notification received
  5444. * from protocol/runtime uCode (initialization uCode's
  5445. * Alive gets handled by iwl_init_alive_start()).
  5446. */
  5447. static void iwl_alive_start(struct iwl_priv *priv)
  5448. {
  5449. int rc = 0;
  5450. IWL_DEBUG_INFO("Runtime Alive received.\n");
  5451. if (priv->card_alive.is_valid != UCODE_VALID_OK) {
  5452. /* We had an error bringing up the hardware, so take it
  5453. * all the way back down so we can try again */
  5454. IWL_DEBUG_INFO("Alive failed.\n");
  5455. goto restart;
  5456. }
  5457. /* Initialize uCode has loaded Runtime uCode ... verify inst image.
  5458. * This is a paranoid check, because we would not have gotten the
  5459. * "runtime" alive if code weren't properly loaded. */
  5460. if (iwl_verify_ucode(priv)) {
  5461. /* Runtime instruction load was bad;
  5462. * take it all the way back down so we can try again */
  5463. IWL_DEBUG_INFO("Bad runtime uCode load.\n");
  5464. goto restart;
  5465. }
  5466. iwl_clear_stations_table(priv);
  5467. rc = iwl4965_alive_notify(priv);
  5468. if (rc) {
  5469. IWL_WARNING("Could not complete ALIVE transition [ntf]: %d\n",
  5470. rc);
  5471. goto restart;
  5472. }
  5473. /* After the ALIVE response, we can process host commands */
  5474. set_bit(STATUS_ALIVE, &priv->status);
  5475. /* Clear out the uCode error bit if it is set */
  5476. clear_bit(STATUS_FW_ERROR, &priv->status);
  5477. rc = iwl_init_channel_map(priv);
  5478. if (rc) {
  5479. IWL_ERROR("initializing regulatory failed: %d\n", rc);
  5480. return;
  5481. }
  5482. iwl_init_geos(priv);
  5483. if (iwl_is_rfkill(priv))
  5484. return;
  5485. if (!priv->mac80211_registered) {
  5486. /* Unlock so any user space entry points can call back into
  5487. * the driver without a deadlock... */
  5488. mutex_unlock(&priv->mutex);
  5489. iwl_rate_control_register(priv->hw);
  5490. rc = ieee80211_register_hw(priv->hw);
  5491. priv->hw->conf.beacon_int = 100;
  5492. mutex_lock(&priv->mutex);
  5493. if (rc) {
  5494. IWL_ERROR("Failed to register network "
  5495. "device (error %d)\n", rc);
  5496. return;
  5497. }
  5498. priv->mac80211_registered = 1;
  5499. iwl_reset_channel_flag(priv);
  5500. } else
  5501. ieee80211_start_queues(priv->hw);
  5502. priv->active_rate = priv->rates_mask;
  5503. priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
  5504. iwl_send_power_mode(priv, IWL_POWER_LEVEL(priv->power_mode));
  5505. if (iwl_is_associated(priv)) {
  5506. struct iwl_rxon_cmd *active_rxon =
  5507. (struct iwl_rxon_cmd *)(&priv->active_rxon);
  5508. memcpy(&priv->staging_rxon, &priv->active_rxon,
  5509. sizeof(priv->staging_rxon));
  5510. active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  5511. } else {
  5512. /* Initialize our rx_config data */
  5513. iwl_connection_init_rx_config(priv);
  5514. memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
  5515. }
  5516. /* Configure BT coexistence */
  5517. iwl_send_bt_config(priv);
  5518. /* Configure the adapter for unassociated operation */
  5519. iwl_commit_rxon(priv);
  5520. /* At this point, the NIC is initialized and operational */
  5521. priv->notif_missed_beacons = 0;
  5522. set_bit(STATUS_READY, &priv->status);
  5523. iwl4965_rf_kill_ct_config(priv);
  5524. IWL_DEBUG_INFO("ALIVE processing complete.\n");
  5525. if (priv->error_recovering)
  5526. iwl_error_recovery(priv);
  5527. return;
  5528. restart:
  5529. queue_work(priv->workqueue, &priv->restart);
  5530. }
  5531. static void iwl_cancel_deferred_work(struct iwl_priv *priv);
  5532. static void __iwl_down(struct iwl_priv *priv)
  5533. {
  5534. unsigned long flags;
  5535. int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
  5536. struct ieee80211_conf *conf = NULL;
  5537. IWL_DEBUG_INFO(DRV_NAME " is going down\n");
  5538. conf = ieee80211_get_hw_conf(priv->hw);
  5539. if (!exit_pending)
  5540. set_bit(STATUS_EXIT_PENDING, &priv->status);
  5541. iwl_clear_stations_table(priv);
  5542. /* Unblock any waiting calls */
  5543. wake_up_interruptible_all(&priv->wait_command_queue);
  5544. iwl_cancel_deferred_work(priv);
  5545. /* Wipe out the EXIT_PENDING status bit if we are not actually
  5546. * exiting the module */
  5547. if (!exit_pending)
  5548. clear_bit(STATUS_EXIT_PENDING, &priv->status);
  5549. /* stop and reset the on-board processor */
  5550. iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
  5551. /* tell the device to stop sending interrupts */
  5552. iwl_disable_interrupts(priv);
  5553. if (priv->mac80211_registered)
  5554. ieee80211_stop_queues(priv->hw);
  5555. /* If we have not previously called iwl_init() then
  5556. * clear all bits but the RF Kill and SUSPEND bits and return */
  5557. if (!iwl_is_init(priv)) {
  5558. priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
  5559. STATUS_RF_KILL_HW |
  5560. test_bit(STATUS_RF_KILL_SW, &priv->status) <<
  5561. STATUS_RF_KILL_SW |
  5562. test_bit(STATUS_IN_SUSPEND, &priv->status) <<
  5563. STATUS_IN_SUSPEND;
  5564. goto exit;
  5565. }
  5566. /* ...otherwise clear out all the status bits but the RF Kill and
  5567. * SUSPEND bits and continue taking the NIC down. */
  5568. priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
  5569. STATUS_RF_KILL_HW |
  5570. test_bit(STATUS_RF_KILL_SW, &priv->status) <<
  5571. STATUS_RF_KILL_SW |
  5572. test_bit(STATUS_IN_SUSPEND, &priv->status) <<
  5573. STATUS_IN_SUSPEND |
  5574. test_bit(STATUS_FW_ERROR, &priv->status) <<
  5575. STATUS_FW_ERROR;
  5576. spin_lock_irqsave(&priv->lock, flags);
  5577. iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  5578. spin_unlock_irqrestore(&priv->lock, flags);
  5579. iwl_hw_txq_ctx_stop(priv);
  5580. iwl_hw_rxq_stop(priv);
  5581. spin_lock_irqsave(&priv->lock, flags);
  5582. if (!iwl_grab_restricted_access(priv)) {
  5583. iwl_write_restricted_reg(priv, APMG_CLK_DIS_REG,
  5584. APMG_CLK_VAL_DMA_CLK_RQT);
  5585. iwl_release_restricted_access(priv);
  5586. }
  5587. spin_unlock_irqrestore(&priv->lock, flags);
  5588. udelay(5);
  5589. iwl_hw_nic_stop_master(priv);
  5590. iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
  5591. iwl_hw_nic_reset(priv);
  5592. exit:
  5593. memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
  5594. if (priv->ibss_beacon)
  5595. dev_kfree_skb(priv->ibss_beacon);
  5596. priv->ibss_beacon = NULL;
  5597. /* clear out any free frames */
  5598. iwl_clear_free_frames(priv);
  5599. }
  5600. static void iwl_down(struct iwl_priv *priv)
  5601. {
  5602. mutex_lock(&priv->mutex);
  5603. __iwl_down(priv);
  5604. mutex_unlock(&priv->mutex);
  5605. }
  5606. #define MAX_HW_RESTARTS 5
  5607. static int __iwl_up(struct iwl_priv *priv)
  5608. {
  5609. int rc, i;
  5610. u32 hw_rf_kill = 0;
  5611. if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  5612. IWL_WARNING("Exit pending; will not bring the NIC up\n");
  5613. return -EIO;
  5614. }
  5615. if (test_bit(STATUS_RF_KILL_SW, &priv->status)) {
  5616. IWL_WARNING("Radio disabled by SW RF kill (module "
  5617. "parameter)\n");
  5618. return 0;
  5619. }
  5620. iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
  5621. rc = iwl_hw_nic_init(priv);
  5622. if (rc) {
  5623. IWL_ERROR("Unable to int nic\n");
  5624. return rc;
  5625. }
  5626. /* make sure rfkill handshake bits are cleared */
  5627. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  5628. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
  5629. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  5630. /* clear (again), then enable host interrupts */
  5631. iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
  5632. iwl_enable_interrupts(priv);
  5633. /* really make sure rfkill handshake bits are cleared */
  5634. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  5635. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  5636. /* Copy original ucode data image from disk into backup cache.
  5637. * This will be used to initialize the on-board processor's
  5638. * data SRAM for a clean start when the runtime program first loads. */
  5639. memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
  5640. priv->ucode_data.len);
  5641. /* If platform's RF_KILL switch is set to KILL,
  5642. * wait for BIT_INT_RF_KILL interrupt before loading uCode
  5643. * and getting things started */
  5644. if (!(iwl_read32(priv, CSR_GP_CNTRL) &
  5645. CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
  5646. hw_rf_kill = 1;
  5647. if (test_bit(STATUS_RF_KILL_HW, &priv->status) || hw_rf_kill) {
  5648. IWL_WARNING("Radio disabled by HW RF Kill switch\n");
  5649. return 0;
  5650. }
  5651. for (i = 0; i < MAX_HW_RESTARTS; i++) {
  5652. iwl_clear_stations_table(priv);
  5653. /* load bootstrap state machine,
  5654. * load bootstrap program into processor's memory,
  5655. * prepare to load the "initialize" uCode */
  5656. rc = iwl_load_bsm(priv);
  5657. if (rc) {
  5658. IWL_ERROR("Unable to set up bootstrap uCode: %d\n", rc);
  5659. continue;
  5660. }
  5661. /* start card; "initialize" will load runtime ucode */
  5662. iwl_nic_start(priv);
  5663. /* MAC Address location in EEPROM same for 3945/4965 */
  5664. get_eeprom_mac(priv, priv->mac_addr);
  5665. IWL_DEBUG_INFO("MAC address: " MAC_FMT "\n",
  5666. MAC_ARG(priv->mac_addr));
  5667. SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
  5668. IWL_DEBUG_INFO(DRV_NAME " is coming up\n");
  5669. return 0;
  5670. }
  5671. set_bit(STATUS_EXIT_PENDING, &priv->status);
  5672. __iwl_down(priv);
  5673. /* tried to restart and config the device for as long as our
  5674. * patience could withstand */
  5675. IWL_ERROR("Unable to initialize device after %d attempts.\n", i);
  5676. return -EIO;
  5677. }
  5678. /*****************************************************************************
  5679. *
  5680. * Workqueue callbacks
  5681. *
  5682. *****************************************************************************/
  5683. static void iwl_bg_init_alive_start(struct work_struct *data)
  5684. {
  5685. struct iwl_priv *priv =
  5686. container_of(data, struct iwl_priv, init_alive_start.work);
  5687. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5688. return;
  5689. mutex_lock(&priv->mutex);
  5690. iwl_init_alive_start(priv);
  5691. mutex_unlock(&priv->mutex);
  5692. }
  5693. static void iwl_bg_alive_start(struct work_struct *data)
  5694. {
  5695. struct iwl_priv *priv =
  5696. container_of(data, struct iwl_priv, alive_start.work);
  5697. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5698. return;
  5699. mutex_lock(&priv->mutex);
  5700. iwl_alive_start(priv);
  5701. mutex_unlock(&priv->mutex);
  5702. }
  5703. static void iwl_bg_rf_kill(struct work_struct *work)
  5704. {
  5705. struct iwl_priv *priv = container_of(work, struct iwl_priv, rf_kill);
  5706. wake_up_interruptible(&priv->wait_command_queue);
  5707. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5708. return;
  5709. mutex_lock(&priv->mutex);
  5710. if (!iwl_is_rfkill(priv)) {
  5711. IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL,
  5712. "HW and/or SW RF Kill no longer active, restarting "
  5713. "device\n");
  5714. if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
  5715. queue_work(priv->workqueue, &priv->restart);
  5716. } else {
  5717. if (!test_bit(STATUS_RF_KILL_HW, &priv->status))
  5718. IWL_DEBUG_RF_KILL("Can not turn radio back on - "
  5719. "disabled by SW switch\n");
  5720. else
  5721. IWL_WARNING("Radio Frequency Kill Switch is On:\n"
  5722. "Kill switch must be turned off for "
  5723. "wireless networking to work.\n");
  5724. }
  5725. mutex_unlock(&priv->mutex);
  5726. }
  5727. #define IWL_SCAN_CHECK_WATCHDOG (7 * HZ)
  5728. static void iwl_bg_scan_check(struct work_struct *data)
  5729. {
  5730. struct iwl_priv *priv =
  5731. container_of(data, struct iwl_priv, scan_check.work);
  5732. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5733. return;
  5734. mutex_lock(&priv->mutex);
  5735. if (test_bit(STATUS_SCANNING, &priv->status) ||
  5736. test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  5737. IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN,
  5738. "Scan completion watchdog resetting adapter (%dms)\n",
  5739. jiffies_to_msecs(IWL_SCAN_CHECK_WATCHDOG));
  5740. if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
  5741. queue_work(priv->workqueue, &priv->restart);
  5742. }
  5743. mutex_unlock(&priv->mutex);
  5744. }
  5745. static void iwl_bg_request_scan(struct work_struct *data)
  5746. {
  5747. struct iwl_priv *priv =
  5748. container_of(data, struct iwl_priv, request_scan);
  5749. struct iwl_host_cmd cmd = {
  5750. .id = REPLY_SCAN_CMD,
  5751. .len = sizeof(struct iwl_scan_cmd),
  5752. .meta.flags = CMD_SIZE_HUGE,
  5753. };
  5754. int rc = 0;
  5755. struct iwl_scan_cmd *scan;
  5756. struct ieee80211_conf *conf = NULL;
  5757. u8 direct_mask;
  5758. int phymode;
  5759. conf = ieee80211_get_hw_conf(priv->hw);
  5760. mutex_lock(&priv->mutex);
  5761. if (!iwl_is_ready(priv)) {
  5762. IWL_WARNING("request scan called when driver not ready.\n");
  5763. goto done;
  5764. }
  5765. /* Make sure the scan wasn't cancelled before this queued work
  5766. * was given the chance to run... */
  5767. if (!test_bit(STATUS_SCANNING, &priv->status))
  5768. goto done;
  5769. /* This should never be called or scheduled if there is currently
  5770. * a scan active in the hardware. */
  5771. if (test_bit(STATUS_SCAN_HW, &priv->status)) {
  5772. IWL_DEBUG_INFO("Multiple concurrent scan requests in parallel. "
  5773. "Ignoring second request.\n");
  5774. rc = -EIO;
  5775. goto done;
  5776. }
  5777. if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  5778. IWL_DEBUG_SCAN("Aborting scan due to device shutdown\n");
  5779. goto done;
  5780. }
  5781. if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  5782. IWL_DEBUG_HC("Scan request while abort pending. Queuing.\n");
  5783. goto done;
  5784. }
  5785. if (iwl_is_rfkill(priv)) {
  5786. IWL_DEBUG_HC("Aborting scan due to RF Kill activation\n");
  5787. goto done;
  5788. }
  5789. if (!test_bit(STATUS_READY, &priv->status)) {
  5790. IWL_DEBUG_HC("Scan request while uninitialized. Queuing.\n");
  5791. goto done;
  5792. }
  5793. if (!priv->scan_bands) {
  5794. IWL_DEBUG_HC("Aborting scan due to no requested bands\n");
  5795. goto done;
  5796. }
  5797. if (!priv->scan) {
  5798. priv->scan = kmalloc(sizeof(struct iwl_scan_cmd) +
  5799. IWL_MAX_SCAN_SIZE, GFP_KERNEL);
  5800. if (!priv->scan) {
  5801. rc = -ENOMEM;
  5802. goto done;
  5803. }
  5804. }
  5805. scan = priv->scan;
  5806. memset(scan, 0, sizeof(struct iwl_scan_cmd) + IWL_MAX_SCAN_SIZE);
  5807. scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH;
  5808. scan->quiet_time = IWL_ACTIVE_QUIET_TIME;
  5809. if (iwl_is_associated(priv)) {
  5810. u16 interval = 0;
  5811. u32 extra;
  5812. u32 suspend_time = 100;
  5813. u32 scan_suspend_time = 100;
  5814. unsigned long flags;
  5815. IWL_DEBUG_INFO("Scanning while associated...\n");
  5816. spin_lock_irqsave(&priv->lock, flags);
  5817. interval = priv->beacon_int;
  5818. spin_unlock_irqrestore(&priv->lock, flags);
  5819. scan->suspend_time = 0;
  5820. scan->max_out_time = cpu_to_le32(600 * 1024);
  5821. if (!interval)
  5822. interval = suspend_time;
  5823. extra = (suspend_time / interval) << 22;
  5824. scan_suspend_time = (extra |
  5825. ((suspend_time % interval) * 1024));
  5826. scan->suspend_time = cpu_to_le32(scan_suspend_time);
  5827. IWL_DEBUG_SCAN("suspend_time 0x%X beacon interval %d\n",
  5828. scan_suspend_time, interval);
  5829. }
  5830. /* We should add the ability for user to lock to PASSIVE ONLY */
  5831. if (priv->one_direct_scan) {
  5832. IWL_DEBUG_SCAN
  5833. ("Kicking off one direct scan for '%s'\n",
  5834. iwl_escape_essid(priv->direct_ssid,
  5835. priv->direct_ssid_len));
  5836. scan->direct_scan[0].id = WLAN_EID_SSID;
  5837. scan->direct_scan[0].len = priv->direct_ssid_len;
  5838. memcpy(scan->direct_scan[0].ssid,
  5839. priv->direct_ssid, priv->direct_ssid_len);
  5840. direct_mask = 1;
  5841. } else if (!iwl_is_associated(priv)) {
  5842. scan->direct_scan[0].id = WLAN_EID_SSID;
  5843. scan->direct_scan[0].len = priv->essid_len;
  5844. memcpy(scan->direct_scan[0].ssid, priv->essid, priv->essid_len);
  5845. direct_mask = 1;
  5846. } else
  5847. direct_mask = 0;
  5848. /* We don't build a direct scan probe request; the uCode will do
  5849. * that based on the direct_mask added to each channel entry */
  5850. scan->tx_cmd.len = cpu_to_le16(
  5851. iwl_fill_probe_req(priv, (struct ieee80211_mgmt *)scan->data,
  5852. IWL_MAX_SCAN_SIZE - sizeof(scan), 0));
  5853. scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
  5854. scan->tx_cmd.sta_id = priv->hw_setting.bcast_sta_id;
  5855. scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  5856. /* flags + rate selection */
  5857. scan->tx_cmd.tx_flags |= cpu_to_le32(0x200);
  5858. switch (priv->scan_bands) {
  5859. case 2:
  5860. scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
  5861. scan->tx_cmd.rate_n_flags =
  5862. iwl_hw_set_rate_n_flags(IWL_RATE_1M_PLCP,
  5863. RATE_MCS_ANT_B_MSK|RATE_MCS_CCK_MSK);
  5864. scan->good_CRC_th = 0;
  5865. phymode = MODE_IEEE80211G;
  5866. break;
  5867. case 1:
  5868. scan->tx_cmd.rate_n_flags =
  5869. iwl_hw_set_rate_n_flags(IWL_RATE_6M_PLCP,
  5870. RATE_MCS_ANT_B_MSK);
  5871. scan->good_CRC_th = IWL_GOOD_CRC_TH;
  5872. phymode = MODE_IEEE80211A;
  5873. break;
  5874. default:
  5875. IWL_WARNING("Invalid scan band count\n");
  5876. goto done;
  5877. }
  5878. /* select Rx chains */
  5879. /* Force use of chains B and C (0x6) for scan Rx.
  5880. * Avoid A (0x1) because of its off-channel reception on A-band.
  5881. * MIMO is not used here, but value is required to make uCode happy. */
  5882. scan->rx_chain = RXON_RX_CHAIN_DRIVER_FORCE_MSK |
  5883. cpu_to_le16((0x7 << RXON_RX_CHAIN_VALID_POS) |
  5884. (0x6 << RXON_RX_CHAIN_FORCE_SEL_POS) |
  5885. (0x7 << RXON_RX_CHAIN_FORCE_MIMO_SEL_POS));
  5886. if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR)
  5887. scan->filter_flags = RXON_FILTER_PROMISC_MSK;
  5888. if (direct_mask)
  5889. IWL_DEBUG_SCAN
  5890. ("Initiating direct scan for %s.\n",
  5891. iwl_escape_essid(priv->essid, priv->essid_len));
  5892. else
  5893. IWL_DEBUG_SCAN("Initiating indirect scan.\n");
  5894. scan->channel_count =
  5895. iwl_get_channels_for_scan(
  5896. priv, phymode, 1, /* active */
  5897. direct_mask,
  5898. (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
  5899. cmd.len += le16_to_cpu(scan->tx_cmd.len) +
  5900. scan->channel_count * sizeof(struct iwl_scan_channel);
  5901. cmd.data = scan;
  5902. scan->len = cpu_to_le16(cmd.len);
  5903. set_bit(STATUS_SCAN_HW, &priv->status);
  5904. rc = iwl_send_cmd_sync(priv, &cmd);
  5905. if (rc)
  5906. goto done;
  5907. queue_delayed_work(priv->workqueue, &priv->scan_check,
  5908. IWL_SCAN_CHECK_WATCHDOG);
  5909. mutex_unlock(&priv->mutex);
  5910. return;
  5911. done:
  5912. /* inform mac80211 sacn aborted */
  5913. queue_work(priv->workqueue, &priv->scan_completed);
  5914. mutex_unlock(&priv->mutex);
  5915. }
  5916. static void iwl_bg_up(struct work_struct *data)
  5917. {
  5918. struct iwl_priv *priv = container_of(data, struct iwl_priv, up);
  5919. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5920. return;
  5921. mutex_lock(&priv->mutex);
  5922. __iwl_up(priv);
  5923. mutex_unlock(&priv->mutex);
  5924. }
  5925. static void iwl_bg_restart(struct work_struct *data)
  5926. {
  5927. struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
  5928. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5929. return;
  5930. iwl_down(priv);
  5931. queue_work(priv->workqueue, &priv->up);
  5932. }
  5933. static void iwl_bg_rx_replenish(struct work_struct *data)
  5934. {
  5935. struct iwl_priv *priv =
  5936. container_of(data, struct iwl_priv, rx_replenish);
  5937. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5938. return;
  5939. mutex_lock(&priv->mutex);
  5940. iwl_rx_replenish(priv);
  5941. mutex_unlock(&priv->mutex);
  5942. }
  5943. static void iwl_bg_post_associate(struct work_struct *data)
  5944. {
  5945. struct iwl_priv *priv = container_of(data, struct iwl_priv,
  5946. post_associate.work);
  5947. int rc = 0;
  5948. struct ieee80211_conf *conf = NULL;
  5949. if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
  5950. IWL_ERROR("%s Should not be called in AP mode\n", __FUNCTION__);
  5951. return;
  5952. }
  5953. IWL_DEBUG_ASSOC("Associated as %d to: " MAC_FMT "\n",
  5954. priv->assoc_id, MAC_ARG(priv->active_rxon.bssid_addr));
  5955. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5956. return;
  5957. mutex_lock(&priv->mutex);
  5958. conf = ieee80211_get_hw_conf(priv->hw);
  5959. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  5960. iwl_commit_rxon(priv);
  5961. memset(&priv->rxon_timing, 0, sizeof(struct iwl_rxon_time_cmd));
  5962. iwl_setup_rxon_timing(priv);
  5963. rc = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
  5964. sizeof(priv->rxon_timing), &priv->rxon_timing);
  5965. if (rc)
  5966. IWL_WARNING("REPLY_RXON_TIMING failed - "
  5967. "Attempting to continue.\n");
  5968. priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
  5969. #ifdef CONFIG_IWLWIFI_HT
  5970. if (priv->is_ht_enabled && priv->current_assoc_ht.is_ht)
  5971. iwl4965_set_rxon_ht(priv, &priv->current_assoc_ht);
  5972. else {
  5973. priv->active_rate_ht[0] = 0;
  5974. priv->active_rate_ht[1] = 0;
  5975. priv->current_channel_width = IWL_CHANNEL_WIDTH_20MHZ;
  5976. }
  5977. #endif /* CONFIG_IWLWIFI_HT*/
  5978. iwl4965_set_rxon_chain(priv);
  5979. priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
  5980. IWL_DEBUG_ASSOC("assoc id %d beacon interval %d\n",
  5981. priv->assoc_id, priv->beacon_int);
  5982. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
  5983. priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  5984. else
  5985. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  5986. if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
  5987. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
  5988. priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  5989. else
  5990. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  5991. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
  5992. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  5993. }
  5994. iwl_commit_rxon(priv);
  5995. switch (priv->iw_mode) {
  5996. case IEEE80211_IF_TYPE_STA:
  5997. iwl_rate_scale_init(priv->hw, IWL_AP_ID);
  5998. break;
  5999. case IEEE80211_IF_TYPE_IBSS:
  6000. /* clear out the station table */
  6001. iwl_clear_stations_table(priv);
  6002. iwl_rxon_add_station(priv, BROADCAST_ADDR, 0);
  6003. iwl_rxon_add_station(priv, priv->bssid, 0);
  6004. iwl_rate_scale_init(priv->hw, IWL_STA_ID);
  6005. iwl_send_beacon_cmd(priv);
  6006. break;
  6007. default:
  6008. IWL_ERROR("%s Should not be called in %d mode\n",
  6009. __FUNCTION__, priv->iw_mode);
  6010. break;
  6011. }
  6012. iwl_sequence_reset(priv);
  6013. #ifdef CONFIG_IWLWIFI_SENSITIVITY
  6014. /* Enable Rx differential gain and sensitivity calibrations */
  6015. iwl4965_chain_noise_reset(priv);
  6016. priv->start_calib = 1;
  6017. #endif /* CONFIG_IWLWIFI_SENSITIVITY */
  6018. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
  6019. priv->assoc_station_added = 1;
  6020. #ifdef CONFIG_IWLWIFI_QOS
  6021. iwl_activate_qos(priv, 0);
  6022. #endif /* CONFIG_IWLWIFI_QOS */
  6023. mutex_unlock(&priv->mutex);
  6024. }
  6025. static void iwl_bg_abort_scan(struct work_struct *work)
  6026. {
  6027. struct iwl_priv *priv = container_of(work, struct iwl_priv,
  6028. abort_scan);
  6029. if (!iwl_is_ready(priv))
  6030. return;
  6031. mutex_lock(&priv->mutex);
  6032. set_bit(STATUS_SCAN_ABORTING, &priv->status);
  6033. iwl_send_scan_abort(priv);
  6034. mutex_unlock(&priv->mutex);
  6035. }
  6036. static void iwl_bg_scan_completed(struct work_struct *work)
  6037. {
  6038. struct iwl_priv *priv =
  6039. container_of(work, struct iwl_priv, scan_completed);
  6040. IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN, "SCAN complete scan\n");
  6041. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  6042. return;
  6043. ieee80211_scan_completed(priv->hw);
  6044. /* Since setting the TXPOWER may have been deferred while
  6045. * performing the scan, fire one off */
  6046. mutex_lock(&priv->mutex);
  6047. iwl_hw_reg_send_txpower(priv);
  6048. mutex_unlock(&priv->mutex);
  6049. }
  6050. /*****************************************************************************
  6051. *
  6052. * mac80211 entry point functions
  6053. *
  6054. *****************************************************************************/
  6055. static int iwl_mac_open(struct ieee80211_hw *hw)
  6056. {
  6057. struct iwl_priv *priv = hw->priv;
  6058. IWL_DEBUG_MAC80211("enter\n");
  6059. /* we should be verifying the device is ready to be opened */
  6060. mutex_lock(&priv->mutex);
  6061. priv->is_open = 1;
  6062. if (!iwl_is_rfkill(priv))
  6063. ieee80211_start_queues(priv->hw);
  6064. mutex_unlock(&priv->mutex);
  6065. IWL_DEBUG_MAC80211("leave\n");
  6066. return 0;
  6067. }
  6068. static int iwl_mac_stop(struct ieee80211_hw *hw)
  6069. {
  6070. struct iwl_priv *priv = hw->priv;
  6071. IWL_DEBUG_MAC80211("enter\n");
  6072. priv->is_open = 0;
  6073. /*netif_stop_queue(dev); */
  6074. flush_workqueue(priv->workqueue);
  6075. IWL_DEBUG_MAC80211("leave\n");
  6076. return 0;
  6077. }
  6078. static int iwl_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb,
  6079. struct ieee80211_tx_control *ctl)
  6080. {
  6081. struct iwl_priv *priv = hw->priv;
  6082. IWL_DEBUG_MAC80211("enter\n");
  6083. if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR) {
  6084. IWL_DEBUG_MAC80211("leave - monitor\n");
  6085. return -1;
  6086. }
  6087. IWL_DEBUG_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
  6088. ctl->tx_rate);
  6089. if (iwl_tx_skb(priv, skb, ctl))
  6090. dev_kfree_skb_any(skb);
  6091. IWL_DEBUG_MAC80211("leave\n");
  6092. return 0;
  6093. }
  6094. static int iwl_mac_add_interface(struct ieee80211_hw *hw,
  6095. struct ieee80211_if_init_conf *conf)
  6096. {
  6097. struct iwl_priv *priv = hw->priv;
  6098. unsigned long flags;
  6099. IWL_DEBUG_MAC80211("enter: id %d, type %d\n", conf->if_id, conf->type);
  6100. if (conf->mac_addr)
  6101. IWL_DEBUG_MAC80211("enter: MAC " MAC_FMT "\n",
  6102. MAC_ARG(conf->mac_addr));
  6103. if (priv->interface_id) {
  6104. IWL_DEBUG_MAC80211("leave - interface_id != 0\n");
  6105. return 0;
  6106. }
  6107. spin_lock_irqsave(&priv->lock, flags);
  6108. priv->interface_id = conf->if_id;
  6109. spin_unlock_irqrestore(&priv->lock, flags);
  6110. mutex_lock(&priv->mutex);
  6111. iwl_set_mode(priv, conf->type);
  6112. IWL_DEBUG_MAC80211("leave\n");
  6113. mutex_unlock(&priv->mutex);
  6114. return 0;
  6115. }
  6116. /**
  6117. * iwl_mac_config - mac80211 config callback
  6118. *
  6119. * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to
  6120. * be set inappropriately and the driver currently sets the hardware up to
  6121. * use it whenever needed.
  6122. */
  6123. static int iwl_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf)
  6124. {
  6125. struct iwl_priv *priv = hw->priv;
  6126. const struct iwl_channel_info *ch_info;
  6127. unsigned long flags;
  6128. mutex_lock(&priv->mutex);
  6129. IWL_DEBUG_MAC80211("enter to channel %d\n", conf->channel);
  6130. if (!iwl_is_ready(priv)) {
  6131. IWL_DEBUG_MAC80211("leave - not ready\n");
  6132. mutex_unlock(&priv->mutex);
  6133. return -EIO;
  6134. }
  6135. /* TODO: Figure out how to get ieee80211_local->sta_scanning w/ only
  6136. * what is exposed through include/ declrations */
  6137. if (unlikely(!iwl_param_disable_hw_scan &&
  6138. test_bit(STATUS_SCANNING, &priv->status))) {
  6139. IWL_DEBUG_MAC80211("leave - scanning\n");
  6140. mutex_unlock(&priv->mutex);
  6141. return 0;
  6142. }
  6143. spin_lock_irqsave(&priv->lock, flags);
  6144. ch_info = iwl_get_channel_info(priv, conf->phymode, conf->channel);
  6145. if (!is_channel_valid(ch_info)) {
  6146. IWL_DEBUG_SCAN("Channel %d [%d] is INVALID for this SKU.\n",
  6147. conf->channel, conf->phymode);
  6148. IWL_DEBUG_MAC80211("leave - invalid channel\n");
  6149. spin_unlock_irqrestore(&priv->lock, flags);
  6150. mutex_unlock(&priv->mutex);
  6151. return -EINVAL;
  6152. }
  6153. #ifdef CONFIG_IWLWIFI_HT
  6154. /* if we are switching fron ht to 2.4 clear flags
  6155. * from any ht related info since 2.4 does not
  6156. * support ht */
  6157. if ((le16_to_cpu(priv->staging_rxon.channel) != conf->channel)
  6158. #ifdef IEEE80211_CONF_CHANNEL_SWITCH
  6159. && !(conf->flags & IEEE80211_CONF_CHANNEL_SWITCH)
  6160. #endif
  6161. )
  6162. priv->staging_rxon.flags = 0;
  6163. #endif /* CONFIG_IWLWIFI_HT */
  6164. iwl_set_rxon_channel(priv, conf->phymode, conf->channel);
  6165. iwl_set_flags_for_phymode(priv, conf->phymode);
  6166. /* The list of supported rates and rate mask can be different
  6167. * for each phymode; since the phymode may have changed, reset
  6168. * the rate mask to what mac80211 lists */
  6169. iwl_set_rate(priv);
  6170. spin_unlock_irqrestore(&priv->lock, flags);
  6171. #ifdef IEEE80211_CONF_CHANNEL_SWITCH
  6172. if (conf->flags & IEEE80211_CONF_CHANNEL_SWITCH) {
  6173. iwl_hw_channel_switch(priv, conf->channel);
  6174. mutex_unlock(&priv->mutex);
  6175. return 0;
  6176. }
  6177. #endif
  6178. iwl_radio_kill_sw(priv, !conf->radio_enabled);
  6179. if (!conf->radio_enabled) {
  6180. IWL_DEBUG_MAC80211("leave - radio disabled\n");
  6181. mutex_unlock(&priv->mutex);
  6182. return 0;
  6183. }
  6184. if (iwl_is_rfkill(priv)) {
  6185. IWL_DEBUG_MAC80211("leave - RF kill\n");
  6186. mutex_unlock(&priv->mutex);
  6187. return -EIO;
  6188. }
  6189. iwl_set_rate(priv);
  6190. if (memcmp(&priv->active_rxon,
  6191. &priv->staging_rxon, sizeof(priv->staging_rxon)))
  6192. iwl_commit_rxon(priv);
  6193. else
  6194. IWL_DEBUG_INFO("No re-sending same RXON configuration.\n");
  6195. IWL_DEBUG_MAC80211("leave\n");
  6196. mutex_unlock(&priv->mutex);
  6197. return 0;
  6198. }
  6199. static void iwl_config_ap(struct iwl_priv *priv)
  6200. {
  6201. int rc = 0;
  6202. if (priv->status & STATUS_EXIT_PENDING)
  6203. return;
  6204. /* The following should be done only at AP bring up */
  6205. if ((priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) == 0) {
  6206. /* RXON - unassoc (to set timing command) */
  6207. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  6208. iwl_commit_rxon(priv);
  6209. /* RXON Timing */
  6210. memset(&priv->rxon_timing, 0, sizeof(struct iwl_rxon_time_cmd));
  6211. iwl_setup_rxon_timing(priv);
  6212. rc = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
  6213. sizeof(priv->rxon_timing), &priv->rxon_timing);
  6214. if (rc)
  6215. IWL_WARNING("REPLY_RXON_TIMING failed - "
  6216. "Attempting to continue.\n");
  6217. iwl4965_set_rxon_chain(priv);
  6218. /* FIXME: what should be the assoc_id for AP? */
  6219. priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
  6220. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
  6221. priv->staging_rxon.flags |=
  6222. RXON_FLG_SHORT_PREAMBLE_MSK;
  6223. else
  6224. priv->staging_rxon.flags &=
  6225. ~RXON_FLG_SHORT_PREAMBLE_MSK;
  6226. if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
  6227. if (priv->assoc_capability &
  6228. WLAN_CAPABILITY_SHORT_SLOT_TIME)
  6229. priv->staging_rxon.flags |=
  6230. RXON_FLG_SHORT_SLOT_MSK;
  6231. else
  6232. priv->staging_rxon.flags &=
  6233. ~RXON_FLG_SHORT_SLOT_MSK;
  6234. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
  6235. priv->staging_rxon.flags &=
  6236. ~RXON_FLG_SHORT_SLOT_MSK;
  6237. }
  6238. /* restore RXON assoc */
  6239. priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
  6240. iwl_commit_rxon(priv);
  6241. #ifdef CONFIG_IWLWIFI_QOS
  6242. iwl_activate_qos(priv, 1);
  6243. #endif
  6244. iwl_rxon_add_station(priv, BROADCAST_ADDR, 0);
  6245. iwl_send_beacon_cmd(priv);
  6246. } else
  6247. iwl_send_beacon_cmd(priv);
  6248. /* FIXME - we need to add code here to detect a totally new
  6249. * configuration, reset the AP, unassoc, rxon timing, assoc,
  6250. * clear sta table, add BCAST sta... */
  6251. }
  6252. static int iwl_mac_config_interface(struct ieee80211_hw *hw, int if_id,
  6253. struct ieee80211_if_conf *conf)
  6254. {
  6255. struct iwl_priv *priv = hw->priv;
  6256. unsigned long flags;
  6257. int rc;
  6258. if (conf == NULL)
  6259. return -EIO;
  6260. if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) &&
  6261. (!conf->beacon || !conf->ssid_len)) {
  6262. IWL_DEBUG_MAC80211
  6263. ("Leaving in AP mode because HostAPD is not ready.\n");
  6264. return 0;
  6265. }
  6266. mutex_lock(&priv->mutex);
  6267. IWL_DEBUG_MAC80211("enter: interface id %d\n", if_id);
  6268. if (conf->bssid)
  6269. IWL_DEBUG_MAC80211("bssid: " MAC_FMT "\n",
  6270. MAC_ARG(conf->bssid));
  6271. if (unlikely(test_bit(STATUS_SCANNING, &priv->status)) &&
  6272. !(priv->hw->flags & IEEE80211_HW_NO_PROBE_FILTERING)) {
  6273. IWL_DEBUG_MAC80211("leave - scanning\n");
  6274. mutex_unlock(&priv->mutex);
  6275. return 0;
  6276. }
  6277. if (priv->interface_id != if_id) {
  6278. IWL_DEBUG_MAC80211("leave - interface_id != if_id\n");
  6279. mutex_unlock(&priv->mutex);
  6280. return 0;
  6281. }
  6282. if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
  6283. if (!conf->bssid) {
  6284. conf->bssid = priv->mac_addr;
  6285. memcpy(priv->bssid, priv->mac_addr, ETH_ALEN);
  6286. IWL_DEBUG_MAC80211("bssid was set to: " MAC_FMT "\n",
  6287. MAC_ARG(conf->bssid));
  6288. }
  6289. if (priv->ibss_beacon)
  6290. dev_kfree_skb(priv->ibss_beacon);
  6291. priv->ibss_beacon = conf->beacon;
  6292. }
  6293. if (conf->bssid && !is_zero_ether_addr(conf->bssid) &&
  6294. !is_multicast_ether_addr(conf->bssid)) {
  6295. /* If there is currently a HW scan going on in the background
  6296. * then we need to cancel it else the RXON below will fail. */
  6297. if (iwl_scan_cancel_timeout(priv, 100)) {
  6298. IWL_WARNING("Aborted scan still in progress "
  6299. "after 100ms\n");
  6300. IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
  6301. mutex_unlock(&priv->mutex);
  6302. return -EAGAIN;
  6303. }
  6304. memcpy(priv->staging_rxon.bssid_addr, conf->bssid, ETH_ALEN);
  6305. /* TODO: Audit driver for usage of these members and see
  6306. * if mac80211 deprecates them (priv->bssid looks like it
  6307. * shouldn't be there, but I haven't scanned the IBSS code
  6308. * to verify) - jpk */
  6309. memcpy(priv->bssid, conf->bssid, ETH_ALEN);
  6310. if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
  6311. iwl_config_ap(priv);
  6312. else {
  6313. priv->staging_rxon.filter_flags |=
  6314. RXON_FILTER_ASSOC_MSK;
  6315. rc = iwl_commit_rxon(priv);
  6316. if ((priv->iw_mode == IEEE80211_IF_TYPE_STA) && rc)
  6317. iwl_rxon_add_station(
  6318. priv, priv->active_rxon.bssid_addr, 1);
  6319. }
  6320. } else {
  6321. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  6322. iwl_commit_rxon(priv);
  6323. }
  6324. spin_lock_irqsave(&priv->lock, flags);
  6325. if (!conf->ssid_len)
  6326. memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
  6327. else
  6328. memcpy(priv->essid, conf->ssid, conf->ssid_len);
  6329. priv->essid_len = conf->ssid_len;
  6330. spin_unlock_irqrestore(&priv->lock, flags);
  6331. IWL_DEBUG_MAC80211("leave\n");
  6332. mutex_unlock(&priv->mutex);
  6333. return 0;
  6334. }
  6335. static void iwl_mac_remove_interface(struct ieee80211_hw *hw,
  6336. struct ieee80211_if_init_conf *conf)
  6337. {
  6338. struct iwl_priv *priv = hw->priv;
  6339. IWL_DEBUG_MAC80211("enter\n");
  6340. mutex_lock(&priv->mutex);
  6341. if (priv->interface_id == conf->if_id) {
  6342. priv->interface_id = 0;
  6343. memset(priv->bssid, 0, ETH_ALEN);
  6344. memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
  6345. priv->essid_len = 0;
  6346. }
  6347. mutex_unlock(&priv->mutex);
  6348. IWL_DEBUG_MAC80211("leave\n");
  6349. }
  6350. #define IWL_DELAY_NEXT_SCAN (HZ*2)
  6351. static int iwl_mac_hw_scan(struct ieee80211_hw *hw, u8 *ssid, size_t len)
  6352. {
  6353. int rc = 0;
  6354. unsigned long flags;
  6355. struct iwl_priv *priv = hw->priv;
  6356. IWL_DEBUG_MAC80211("enter\n");
  6357. spin_lock_irqsave(&priv->lock, flags);
  6358. if (!iwl_is_ready_rf(priv)) {
  6359. rc = -EIO;
  6360. IWL_DEBUG_MAC80211("leave - not ready or exit pending\n");
  6361. goto out_unlock;
  6362. }
  6363. if (priv->iw_mode == IEEE80211_IF_TYPE_AP) { /* APs don't scan */
  6364. rc = -EIO;
  6365. IWL_ERROR("ERROR: APs don't scan\n");
  6366. goto out_unlock;
  6367. }
  6368. /* if we just finished scan ask for delay */
  6369. if (priv->last_scan_jiffies &&
  6370. time_after(priv->last_scan_jiffies + IWL_DELAY_NEXT_SCAN,
  6371. jiffies)) {
  6372. rc = -EAGAIN;
  6373. goto out_unlock;
  6374. }
  6375. if (len) {
  6376. IWL_DEBUG_SCAN("direct scan for "
  6377. "%s [%d]\n ",
  6378. iwl_escape_essid(ssid, len), (int)len);
  6379. priv->one_direct_scan = 1;
  6380. priv->direct_ssid_len = (u8)
  6381. min((u8) len, (u8) IW_ESSID_MAX_SIZE);
  6382. memcpy(priv->direct_ssid, ssid, priv->direct_ssid_len);
  6383. }
  6384. rc = iwl_scan_initiate(priv);
  6385. IWL_DEBUG_MAC80211("leave\n");
  6386. out_unlock:
  6387. spin_unlock_irqrestore(&priv->lock, flags);
  6388. return rc;
  6389. }
  6390. static int iwl_mac_set_key(struct ieee80211_hw *hw, set_key_cmd cmd,
  6391. const u8 *local_addr, const u8 *addr,
  6392. struct ieee80211_key_conf *key)
  6393. {
  6394. struct iwl_priv *priv = hw->priv;
  6395. int rc = 0;
  6396. u8 sta_id;
  6397. IWL_DEBUG_MAC80211("enter\n");
  6398. if (!iwl_param_hwcrypto) {
  6399. IWL_DEBUG_MAC80211("leave - hwcrypto disabled\n");
  6400. return -EOPNOTSUPP;
  6401. }
  6402. if (is_zero_ether_addr(addr))
  6403. /* only support pairwise keys */
  6404. return -EOPNOTSUPP;
  6405. sta_id = iwl_hw_find_station(priv, addr);
  6406. if (sta_id == IWL_INVALID_STATION) {
  6407. IWL_DEBUG_MAC80211("leave - " MAC_FMT " not in station map.\n",
  6408. MAC_ARG(addr));
  6409. return -EINVAL;
  6410. }
  6411. mutex_lock(&priv->mutex);
  6412. switch (cmd) {
  6413. case SET_KEY:
  6414. rc = iwl_update_sta_key_info(priv, key, sta_id);
  6415. if (!rc) {
  6416. iwl_set_rxon_hwcrypto(priv, 1);
  6417. iwl_commit_rxon(priv);
  6418. key->hw_key_idx = sta_id;
  6419. IWL_DEBUG_MAC80211("set_key success, using hwcrypto\n");
  6420. key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
  6421. }
  6422. break;
  6423. case DISABLE_KEY:
  6424. rc = iwl_clear_sta_key_info(priv, sta_id);
  6425. if (!rc) {
  6426. iwl_set_rxon_hwcrypto(priv, 0);
  6427. iwl_commit_rxon(priv);
  6428. IWL_DEBUG_MAC80211("disable hwcrypto key\n");
  6429. }
  6430. break;
  6431. default:
  6432. rc = -EINVAL;
  6433. }
  6434. IWL_DEBUG_MAC80211("leave\n");
  6435. mutex_unlock(&priv->mutex);
  6436. return rc;
  6437. }
  6438. static int iwl_mac_conf_tx(struct ieee80211_hw *hw, int queue,
  6439. const struct ieee80211_tx_queue_params *params)
  6440. {
  6441. struct iwl_priv *priv = hw->priv;
  6442. #ifdef CONFIG_IWLWIFI_QOS
  6443. unsigned long flags;
  6444. int q;
  6445. #endif /* CONFIG_IWL_QOS */
  6446. IWL_DEBUG_MAC80211("enter\n");
  6447. if (!iwl_is_ready_rf(priv)) {
  6448. IWL_DEBUG_MAC80211("leave - RF not ready\n");
  6449. return -EIO;
  6450. }
  6451. if (queue >= AC_NUM) {
  6452. IWL_DEBUG_MAC80211("leave - queue >= AC_NUM %d\n", queue);
  6453. return 0;
  6454. }
  6455. #ifdef CONFIG_IWLWIFI_QOS
  6456. if (!priv->qos_data.qos_enable) {
  6457. priv->qos_data.qos_active = 0;
  6458. IWL_DEBUG_MAC80211("leave - qos not enabled\n");
  6459. return 0;
  6460. }
  6461. q = AC_NUM - 1 - queue;
  6462. spin_lock_irqsave(&priv->lock, flags);
  6463. priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
  6464. priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
  6465. priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
  6466. priv->qos_data.def_qos_parm.ac[q].edca_txop =
  6467. cpu_to_le16((params->burst_time * 100));
  6468. priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
  6469. priv->qos_data.qos_active = 1;
  6470. spin_unlock_irqrestore(&priv->lock, flags);
  6471. mutex_lock(&priv->mutex);
  6472. if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
  6473. iwl_activate_qos(priv, 1);
  6474. else if (priv->assoc_id && iwl_is_associated(priv))
  6475. iwl_activate_qos(priv, 0);
  6476. mutex_unlock(&priv->mutex);
  6477. #endif /*CONFIG_IWLWIFI_QOS */
  6478. IWL_DEBUG_MAC80211("leave\n");
  6479. return 0;
  6480. }
  6481. static int iwl_mac_get_tx_stats(struct ieee80211_hw *hw,
  6482. struct ieee80211_tx_queue_stats *stats)
  6483. {
  6484. struct iwl_priv *priv = hw->priv;
  6485. int i, avail;
  6486. struct iwl_tx_queue *txq;
  6487. struct iwl_queue *q;
  6488. unsigned long flags;
  6489. IWL_DEBUG_MAC80211("enter\n");
  6490. if (!iwl_is_ready_rf(priv)) {
  6491. IWL_DEBUG_MAC80211("leave - RF not ready\n");
  6492. return -EIO;
  6493. }
  6494. spin_lock_irqsave(&priv->lock, flags);
  6495. for (i = 0; i < AC_NUM; i++) {
  6496. txq = &priv->txq[i];
  6497. q = &txq->q;
  6498. avail = iwl_queue_space(q);
  6499. stats->data[i].len = q->n_window - avail;
  6500. stats->data[i].limit = q->n_window - q->high_mark;
  6501. stats->data[i].count = q->n_window;
  6502. }
  6503. spin_unlock_irqrestore(&priv->lock, flags);
  6504. IWL_DEBUG_MAC80211("leave\n");
  6505. return 0;
  6506. }
  6507. static int iwl_mac_get_stats(struct ieee80211_hw *hw,
  6508. struct ieee80211_low_level_stats *stats)
  6509. {
  6510. IWL_DEBUG_MAC80211("enter\n");
  6511. IWL_DEBUG_MAC80211("leave\n");
  6512. return 0;
  6513. }
  6514. static u64 iwl_mac_get_tsf(struct ieee80211_hw *hw)
  6515. {
  6516. IWL_DEBUG_MAC80211("enter\n");
  6517. IWL_DEBUG_MAC80211("leave\n");
  6518. return 0;
  6519. }
  6520. static void iwl_mac_reset_tsf(struct ieee80211_hw *hw)
  6521. {
  6522. struct iwl_priv *priv = hw->priv;
  6523. unsigned long flags;
  6524. mutex_lock(&priv->mutex);
  6525. IWL_DEBUG_MAC80211("enter\n");
  6526. priv->lq_mngr.lq_ready = 0;
  6527. #ifdef CONFIG_IWLWIFI_HT
  6528. spin_lock_irqsave(&priv->lock, flags);
  6529. memset(&priv->current_assoc_ht, 0, sizeof(struct sta_ht_info));
  6530. spin_unlock_irqrestore(&priv->lock, flags);
  6531. #ifdef CONFIG_IWLWIFI_HT_AGG
  6532. /* if (priv->lq_mngr.agg_ctrl.granted_ba)
  6533. iwl4965_turn_off_agg(priv, TID_ALL_SPECIFIED);*/
  6534. memset(&(priv->lq_mngr.agg_ctrl), 0, sizeof(struct iwl_agg_control));
  6535. priv->lq_mngr.agg_ctrl.tid_traffic_load_threshold = 10;
  6536. priv->lq_mngr.agg_ctrl.ba_timeout = 5000;
  6537. priv->lq_mngr.agg_ctrl.auto_agg = 1;
  6538. if (priv->lq_mngr.agg_ctrl.auto_agg)
  6539. priv->lq_mngr.agg_ctrl.requested_ba = TID_ALL_ENABLED;
  6540. #endif /*CONFIG_IWLWIFI_HT_AGG */
  6541. #endif /* CONFIG_IWLWIFI_HT */
  6542. #ifdef CONFIG_IWLWIFI_QOS
  6543. iwl_reset_qos(priv);
  6544. #endif
  6545. cancel_delayed_work(&priv->post_associate);
  6546. spin_lock_irqsave(&priv->lock, flags);
  6547. priv->assoc_id = 0;
  6548. priv->assoc_capability = 0;
  6549. priv->call_post_assoc_from_beacon = 0;
  6550. priv->assoc_station_added = 0;
  6551. /* new association get rid of ibss beacon skb */
  6552. if (priv->ibss_beacon)
  6553. dev_kfree_skb(priv->ibss_beacon);
  6554. priv->ibss_beacon = NULL;
  6555. priv->beacon_int = priv->hw->conf.beacon_int;
  6556. priv->timestamp1 = 0;
  6557. priv->timestamp0 = 0;
  6558. if ((priv->iw_mode == IEEE80211_IF_TYPE_STA))
  6559. priv->beacon_int = 0;
  6560. spin_unlock_irqrestore(&priv->lock, flags);
  6561. /* Per mac80211.h: This is only used in IBSS mode... */
  6562. if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) {
  6563. IWL_DEBUG_MAC80211("leave - not in IBSS\n");
  6564. mutex_unlock(&priv->mutex);
  6565. return;
  6566. }
  6567. if (!iwl_is_ready_rf(priv)) {
  6568. IWL_DEBUG_MAC80211("leave - not ready\n");
  6569. mutex_unlock(&priv->mutex);
  6570. return;
  6571. }
  6572. priv->only_active_channel = 0;
  6573. iwl_set_rate(priv);
  6574. mutex_unlock(&priv->mutex);
  6575. IWL_DEBUG_MAC80211("leave\n");
  6576. }
  6577. static int iwl_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb,
  6578. struct ieee80211_tx_control *control)
  6579. {
  6580. struct iwl_priv *priv = hw->priv;
  6581. unsigned long flags;
  6582. mutex_lock(&priv->mutex);
  6583. IWL_DEBUG_MAC80211("enter\n");
  6584. if (!iwl_is_ready_rf(priv)) {
  6585. IWL_DEBUG_MAC80211("leave - RF not ready\n");
  6586. mutex_unlock(&priv->mutex);
  6587. return -EIO;
  6588. }
  6589. if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) {
  6590. IWL_DEBUG_MAC80211("leave - not IBSS\n");
  6591. mutex_unlock(&priv->mutex);
  6592. return -EIO;
  6593. }
  6594. spin_lock_irqsave(&priv->lock, flags);
  6595. if (priv->ibss_beacon)
  6596. dev_kfree_skb(priv->ibss_beacon);
  6597. priv->ibss_beacon = skb;
  6598. priv->assoc_id = 0;
  6599. IWL_DEBUG_MAC80211("leave\n");
  6600. spin_unlock_irqrestore(&priv->lock, flags);
  6601. #ifdef CONFIG_IWLWIFI_QOS
  6602. iwl_reset_qos(priv);
  6603. #endif
  6604. queue_work(priv->workqueue, &priv->post_associate.work);
  6605. mutex_unlock(&priv->mutex);
  6606. return 0;
  6607. }
  6608. #ifdef CONFIG_IWLWIFI_HT
  6609. union ht_cap_info {
  6610. struct {
  6611. u16 advanced_coding_cap :1;
  6612. u16 supported_chan_width_set :1;
  6613. u16 mimo_power_save_mode :2;
  6614. u16 green_field :1;
  6615. u16 short_GI20 :1;
  6616. u16 short_GI40 :1;
  6617. u16 tx_stbc :1;
  6618. u16 rx_stbc :1;
  6619. u16 beam_forming :1;
  6620. u16 delayed_ba :1;
  6621. u16 maximal_amsdu_size :1;
  6622. u16 cck_mode_at_40MHz :1;
  6623. u16 psmp_support :1;
  6624. u16 stbc_ctrl_frame_support :1;
  6625. u16 sig_txop_protection_support :1;
  6626. };
  6627. u16 val;
  6628. } __attribute__ ((packed));
  6629. union ht_param_info{
  6630. struct {
  6631. u8 max_rx_ampdu_factor :2;
  6632. u8 mpdu_density :3;
  6633. u8 reserved :3;
  6634. };
  6635. u8 val;
  6636. } __attribute__ ((packed));
  6637. union ht_exra_param_info {
  6638. struct {
  6639. u8 ext_chan_offset :2;
  6640. u8 tx_chan_width :1;
  6641. u8 rifs_mode :1;
  6642. u8 controlled_access_only :1;
  6643. u8 service_interval_granularity :3;
  6644. };
  6645. u8 val;
  6646. } __attribute__ ((packed));
  6647. union ht_operation_mode{
  6648. struct {
  6649. u16 op_mode :2;
  6650. u16 non_GF :1;
  6651. u16 reserved :13;
  6652. };
  6653. u16 val;
  6654. } __attribute__ ((packed));
  6655. static int sta_ht_info_init(struct ieee80211_ht_capability *ht_cap,
  6656. struct ieee80211_ht_additional_info *ht_extra,
  6657. struct sta_ht_info *ht_info_ap,
  6658. struct sta_ht_info *ht_info)
  6659. {
  6660. union ht_cap_info cap;
  6661. union ht_operation_mode op_mode;
  6662. union ht_param_info param_info;
  6663. union ht_exra_param_info extra_param_info;
  6664. IWL_DEBUG_MAC80211("enter: \n");
  6665. if (!ht_info) {
  6666. IWL_DEBUG_MAC80211("leave: ht_info is NULL\n");
  6667. return -1;
  6668. }
  6669. if (ht_cap) {
  6670. cap.val = (u16) le16_to_cpu(ht_cap->capabilities_info);
  6671. param_info.val = ht_cap->mac_ht_params_info;
  6672. ht_info->is_ht = 1;
  6673. if (cap.short_GI20)
  6674. ht_info->sgf |= 0x1;
  6675. if (cap.short_GI40)
  6676. ht_info->sgf |= 0x2;
  6677. ht_info->is_green_field = cap.green_field;
  6678. ht_info->max_amsdu_size = cap.maximal_amsdu_size;
  6679. ht_info->supported_chan_width = cap.supported_chan_width_set;
  6680. ht_info->tx_mimo_ps_mode = cap.mimo_power_save_mode;
  6681. memcpy(ht_info->supp_rates, ht_cap->supported_mcs_set, 16);
  6682. ht_info->ampdu_factor = param_info.max_rx_ampdu_factor;
  6683. ht_info->mpdu_density = param_info.mpdu_density;
  6684. IWL_DEBUG_MAC80211("SISO mask 0x%X MIMO mask 0x%X \n",
  6685. ht_cap->supported_mcs_set[0],
  6686. ht_cap->supported_mcs_set[1]);
  6687. if (ht_info_ap) {
  6688. ht_info->control_channel = ht_info_ap->control_channel;
  6689. ht_info->extension_chan_offset =
  6690. ht_info_ap->extension_chan_offset;
  6691. ht_info->tx_chan_width = ht_info_ap->tx_chan_width;
  6692. ht_info->operating_mode = ht_info_ap->operating_mode;
  6693. }
  6694. if (ht_extra) {
  6695. extra_param_info.val = ht_extra->ht_param;
  6696. ht_info->control_channel = ht_extra->control_chan;
  6697. ht_info->extension_chan_offset =
  6698. extra_param_info.ext_chan_offset;
  6699. ht_info->tx_chan_width = extra_param_info.tx_chan_width;
  6700. op_mode.val = (u16)
  6701. le16_to_cpu(ht_extra->operation_mode);
  6702. ht_info->operating_mode = op_mode.op_mode;
  6703. IWL_DEBUG_MAC80211("control channel %d\n",
  6704. ht_extra->control_chan);
  6705. }
  6706. } else
  6707. ht_info->is_ht = 0;
  6708. IWL_DEBUG_MAC80211("leave\n");
  6709. return 0;
  6710. }
  6711. static int iwl_mac_conf_ht(struct ieee80211_hw *hw,
  6712. struct ieee80211_ht_capability *ht_cap,
  6713. struct ieee80211_ht_additional_info *ht_extra)
  6714. {
  6715. struct iwl_priv *priv = hw->priv;
  6716. int rs;
  6717. IWL_DEBUG_MAC80211("enter: \n");
  6718. rs = sta_ht_info_init(ht_cap, ht_extra, NULL, &priv->current_assoc_ht);
  6719. iwl4965_set_rxon_chain(priv);
  6720. if (priv && priv->assoc_id &&
  6721. (priv->iw_mode == IEEE80211_IF_TYPE_STA)) {
  6722. unsigned long flags;
  6723. spin_lock_irqsave(&priv->lock, flags);
  6724. if (priv->beacon_int)
  6725. queue_work(priv->workqueue, &priv->post_associate.work);
  6726. else
  6727. priv->call_post_assoc_from_beacon = 1;
  6728. spin_unlock_irqrestore(&priv->lock, flags);
  6729. }
  6730. IWL_DEBUG_MAC80211("leave: control channel %d\n",
  6731. ht_extra->control_chan);
  6732. return rs;
  6733. }
  6734. static void iwl_set_ht_capab(struct ieee80211_hw *hw,
  6735. struct ieee80211_ht_capability *ht_cap,
  6736. u8 use_wide_chan)
  6737. {
  6738. union ht_cap_info cap;
  6739. union ht_param_info param_info;
  6740. memset(&cap, 0, sizeof(union ht_cap_info));
  6741. memset(&param_info, 0, sizeof(union ht_param_info));
  6742. cap.maximal_amsdu_size = HT_IE_MAX_AMSDU_SIZE_4K;
  6743. cap.green_field = 1;
  6744. cap.short_GI20 = 1;
  6745. cap.short_GI40 = 1;
  6746. cap.supported_chan_width_set = use_wide_chan;
  6747. cap.mimo_power_save_mode = 0x3;
  6748. param_info.max_rx_ampdu_factor = CFG_HT_RX_AMPDU_FACTOR_DEF;
  6749. param_info.mpdu_density = CFG_HT_MPDU_DENSITY_DEF;
  6750. ht_cap->capabilities_info = (__le16) cpu_to_le16(cap.val);
  6751. ht_cap->mac_ht_params_info = (u8) param_info.val;
  6752. ht_cap->supported_mcs_set[0] = 0xff;
  6753. ht_cap->supported_mcs_set[1] = 0xff;
  6754. ht_cap->supported_mcs_set[4] =
  6755. (cap.supported_chan_width_set) ? 0x1: 0x0;
  6756. }
  6757. static void iwl_mac_get_ht_capab(struct ieee80211_hw *hw,
  6758. struct ieee80211_ht_capability *ht_cap)
  6759. {
  6760. u8 use_wide_channel = 1;
  6761. struct iwl_priv *priv = hw->priv;
  6762. IWL_DEBUG_MAC80211("enter: \n");
  6763. if (priv->channel_width != IWL_CHANNEL_WIDTH_40MHZ)
  6764. use_wide_channel = 0;
  6765. /* no fat tx allowed on 2.4GHZ */
  6766. if (priv->phymode != MODE_IEEE80211A)
  6767. use_wide_channel = 0;
  6768. iwl_set_ht_capab(hw, ht_cap, use_wide_channel);
  6769. IWL_DEBUG_MAC80211("leave: \n");
  6770. }
  6771. #endif /*CONFIG_IWLWIFI_HT*/
  6772. /*****************************************************************************
  6773. *
  6774. * sysfs attributes
  6775. *
  6776. *****************************************************************************/
  6777. #ifdef CONFIG_IWLWIFI_DEBUG
  6778. /*
  6779. * The following adds a new attribute to the sysfs representation
  6780. * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
  6781. * used for controlling the debug level.
  6782. *
  6783. * See the level definitions in iwl for details.
  6784. */
  6785. static ssize_t show_debug_level(struct device_driver *d, char *buf)
  6786. {
  6787. return sprintf(buf, "0x%08X\n", iwl_debug_level);
  6788. }
  6789. static ssize_t store_debug_level(struct device_driver *d,
  6790. const char *buf, size_t count)
  6791. {
  6792. char *p = (char *)buf;
  6793. u32 val;
  6794. val = simple_strtoul(p, &p, 0);
  6795. if (p == buf)
  6796. printk(KERN_INFO DRV_NAME
  6797. ": %s is not in hex or decimal form.\n", buf);
  6798. else
  6799. iwl_debug_level = val;
  6800. return strnlen(buf, count);
  6801. }
  6802. static DRIVER_ATTR(debug_level, S_IWUSR | S_IRUGO,
  6803. show_debug_level, store_debug_level);
  6804. #endif /* CONFIG_IWLWIFI_DEBUG */
  6805. static ssize_t show_rf_kill(struct device *d,
  6806. struct device_attribute *attr, char *buf)
  6807. {
  6808. /*
  6809. * 0 - RF kill not enabled
  6810. * 1 - SW based RF kill active (sysfs)
  6811. * 2 - HW based RF kill active
  6812. * 3 - Both HW and SW based RF kill active
  6813. */
  6814. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6815. int val = (test_bit(STATUS_RF_KILL_SW, &priv->status) ? 0x1 : 0x0) |
  6816. (test_bit(STATUS_RF_KILL_HW, &priv->status) ? 0x2 : 0x0);
  6817. return sprintf(buf, "%i\n", val);
  6818. }
  6819. static ssize_t store_rf_kill(struct device *d,
  6820. struct device_attribute *attr,
  6821. const char *buf, size_t count)
  6822. {
  6823. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6824. mutex_lock(&priv->mutex);
  6825. iwl_radio_kill_sw(priv, buf[0] == '1');
  6826. mutex_unlock(&priv->mutex);
  6827. return count;
  6828. }
  6829. static DEVICE_ATTR(rf_kill, S_IWUSR | S_IRUGO, show_rf_kill, store_rf_kill);
  6830. static ssize_t show_temperature(struct device *d,
  6831. struct device_attribute *attr, char *buf)
  6832. {
  6833. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6834. if (!iwl_is_alive(priv))
  6835. return -EAGAIN;
  6836. return sprintf(buf, "%d\n", iwl_hw_get_temperature(priv));
  6837. }
  6838. static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
  6839. static ssize_t show_rs_window(struct device *d,
  6840. struct device_attribute *attr,
  6841. char *buf)
  6842. {
  6843. struct iwl_priv *priv = d->driver_data;
  6844. return iwl_fill_rs_info(priv->hw, buf, IWL_AP_ID);
  6845. }
  6846. static DEVICE_ATTR(rs_window, S_IRUGO, show_rs_window, NULL);
  6847. static ssize_t show_tx_power(struct device *d,
  6848. struct device_attribute *attr, char *buf)
  6849. {
  6850. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6851. return sprintf(buf, "%d\n", priv->user_txpower_limit);
  6852. }
  6853. static ssize_t store_tx_power(struct device *d,
  6854. struct device_attribute *attr,
  6855. const char *buf, size_t count)
  6856. {
  6857. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6858. char *p = (char *)buf;
  6859. u32 val;
  6860. val = simple_strtoul(p, &p, 10);
  6861. if (p == buf)
  6862. printk(KERN_INFO DRV_NAME
  6863. ": %s is not in decimal form.\n", buf);
  6864. else
  6865. iwl_hw_reg_set_txpower(priv, val);
  6866. return count;
  6867. }
  6868. static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
  6869. static ssize_t show_flags(struct device *d,
  6870. struct device_attribute *attr, char *buf)
  6871. {
  6872. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6873. return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
  6874. }
  6875. static ssize_t store_flags(struct device *d,
  6876. struct device_attribute *attr,
  6877. const char *buf, size_t count)
  6878. {
  6879. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6880. u32 flags = simple_strtoul(buf, NULL, 0);
  6881. mutex_lock(&priv->mutex);
  6882. if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
  6883. /* Cancel any currently running scans... */
  6884. if (iwl_scan_cancel_timeout(priv, 100))
  6885. IWL_WARNING("Could not cancel scan.\n");
  6886. else {
  6887. IWL_DEBUG_INFO("Committing rxon.flags = 0x%04X\n",
  6888. flags);
  6889. priv->staging_rxon.flags = cpu_to_le32(flags);
  6890. iwl_commit_rxon(priv);
  6891. }
  6892. }
  6893. mutex_unlock(&priv->mutex);
  6894. return count;
  6895. }
  6896. static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
  6897. static ssize_t show_filter_flags(struct device *d,
  6898. struct device_attribute *attr, char *buf)
  6899. {
  6900. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6901. return sprintf(buf, "0x%04X\n",
  6902. le32_to_cpu(priv->active_rxon.filter_flags));
  6903. }
  6904. static ssize_t store_filter_flags(struct device *d,
  6905. struct device_attribute *attr,
  6906. const char *buf, size_t count)
  6907. {
  6908. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6909. u32 filter_flags = simple_strtoul(buf, NULL, 0);
  6910. mutex_lock(&priv->mutex);
  6911. if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
  6912. /* Cancel any currently running scans... */
  6913. if (iwl_scan_cancel_timeout(priv, 100))
  6914. IWL_WARNING("Could not cancel scan.\n");
  6915. else {
  6916. IWL_DEBUG_INFO("Committing rxon.filter_flags = "
  6917. "0x%04X\n", filter_flags);
  6918. priv->staging_rxon.filter_flags =
  6919. cpu_to_le32(filter_flags);
  6920. iwl_commit_rxon(priv);
  6921. }
  6922. }
  6923. mutex_unlock(&priv->mutex);
  6924. return count;
  6925. }
  6926. static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
  6927. store_filter_flags);
  6928. static ssize_t show_tune(struct device *d,
  6929. struct device_attribute *attr, char *buf)
  6930. {
  6931. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6932. return sprintf(buf, "0x%04X\n",
  6933. (priv->phymode << 8) |
  6934. le16_to_cpu(priv->active_rxon.channel));
  6935. }
  6936. static void iwl_set_flags_for_phymode(struct iwl_priv *priv, u8 phymode);
  6937. static ssize_t store_tune(struct device *d,
  6938. struct device_attribute *attr,
  6939. const char *buf, size_t count)
  6940. {
  6941. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6942. char *p = (char *)buf;
  6943. u16 tune = simple_strtoul(p, &p, 0);
  6944. u8 phymode = (tune >> 8) & 0xff;
  6945. u16 channel = tune & 0xff;
  6946. IWL_DEBUG_INFO("Tune request to:%d channel:%d\n", phymode, channel);
  6947. mutex_lock(&priv->mutex);
  6948. if ((le16_to_cpu(priv->staging_rxon.channel) != channel) ||
  6949. (priv->phymode != phymode)) {
  6950. const struct iwl_channel_info *ch_info;
  6951. ch_info = iwl_get_channel_info(priv, phymode, channel);
  6952. if (!ch_info) {
  6953. IWL_WARNING("Requested invalid phymode/channel "
  6954. "combination: %d %d\n", phymode, channel);
  6955. mutex_unlock(&priv->mutex);
  6956. return -EINVAL;
  6957. }
  6958. /* Cancel any currently running scans... */
  6959. if (iwl_scan_cancel_timeout(priv, 100))
  6960. IWL_WARNING("Could not cancel scan.\n");
  6961. else {
  6962. IWL_DEBUG_INFO("Committing phymode and "
  6963. "rxon.channel = %d %d\n",
  6964. phymode, channel);
  6965. iwl_set_rxon_channel(priv, phymode, channel);
  6966. iwl_set_flags_for_phymode(priv, phymode);
  6967. iwl_set_rate(priv);
  6968. iwl_commit_rxon(priv);
  6969. }
  6970. }
  6971. mutex_unlock(&priv->mutex);
  6972. return count;
  6973. }
  6974. static DEVICE_ATTR(tune, S_IWUSR | S_IRUGO, show_tune, store_tune);
  6975. #ifdef CONFIG_IWLWIFI_SPECTRUM_MEASUREMENT
  6976. static ssize_t show_measurement(struct device *d,
  6977. struct device_attribute *attr, char *buf)
  6978. {
  6979. struct iwl_priv *priv = dev_get_drvdata(d);
  6980. struct iwl_spectrum_notification measure_report;
  6981. u32 size = sizeof(measure_report), len = 0, ofs = 0;
  6982. u8 *data = (u8 *) & measure_report;
  6983. unsigned long flags;
  6984. spin_lock_irqsave(&priv->lock, flags);
  6985. if (!(priv->measurement_status & MEASUREMENT_READY)) {
  6986. spin_unlock_irqrestore(&priv->lock, flags);
  6987. return 0;
  6988. }
  6989. memcpy(&measure_report, &priv->measure_report, size);
  6990. priv->measurement_status = 0;
  6991. spin_unlock_irqrestore(&priv->lock, flags);
  6992. while (size && (PAGE_SIZE - len)) {
  6993. hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
  6994. PAGE_SIZE - len, 1);
  6995. len = strlen(buf);
  6996. if (PAGE_SIZE - len)
  6997. buf[len++] = '\n';
  6998. ofs += 16;
  6999. size -= min(size, 16U);
  7000. }
  7001. return len;
  7002. }
  7003. static ssize_t store_measurement(struct device *d,
  7004. struct device_attribute *attr,
  7005. const char *buf, size_t count)
  7006. {
  7007. struct iwl_priv *priv = dev_get_drvdata(d);
  7008. struct ieee80211_measurement_params params = {
  7009. .channel = le16_to_cpu(priv->active_rxon.channel),
  7010. .start_time = cpu_to_le64(priv->last_tsf),
  7011. .duration = cpu_to_le16(1),
  7012. };
  7013. u8 type = IWL_MEASURE_BASIC;
  7014. u8 buffer[32];
  7015. u8 channel;
  7016. if (count) {
  7017. char *p = buffer;
  7018. strncpy(buffer, buf, min(sizeof(buffer), count));
  7019. channel = simple_strtoul(p, NULL, 0);
  7020. if (channel)
  7021. params.channel = channel;
  7022. p = buffer;
  7023. while (*p && *p != ' ')
  7024. p++;
  7025. if (*p)
  7026. type = simple_strtoul(p + 1, NULL, 0);
  7027. }
  7028. IWL_DEBUG_INFO("Invoking measurement of type %d on "
  7029. "channel %d (for '%s')\n", type, params.channel, buf);
  7030. iwl_get_measurement(priv, &params, type);
  7031. return count;
  7032. }
  7033. static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR,
  7034. show_measurement, store_measurement);
  7035. #endif /* CONFIG_IWLWIFI_SPECTRUM_MEASUREMENT */
  7036. static ssize_t store_retry_rate(struct device *d,
  7037. struct device_attribute *attr,
  7038. const char *buf, size_t count)
  7039. {
  7040. struct iwl_priv *priv = dev_get_drvdata(d);
  7041. priv->retry_rate = simple_strtoul(buf, NULL, 0);
  7042. if (priv->retry_rate <= 0)
  7043. priv->retry_rate = 1;
  7044. return count;
  7045. }
  7046. static ssize_t show_retry_rate(struct device *d,
  7047. struct device_attribute *attr, char *buf)
  7048. {
  7049. struct iwl_priv *priv = dev_get_drvdata(d);
  7050. return sprintf(buf, "%d", priv->retry_rate);
  7051. }
  7052. static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate,
  7053. store_retry_rate);
  7054. static ssize_t store_power_level(struct device *d,
  7055. struct device_attribute *attr,
  7056. const char *buf, size_t count)
  7057. {
  7058. struct iwl_priv *priv = dev_get_drvdata(d);
  7059. int rc;
  7060. int mode;
  7061. mode = simple_strtoul(buf, NULL, 0);
  7062. mutex_lock(&priv->mutex);
  7063. if (!iwl_is_ready(priv)) {
  7064. rc = -EAGAIN;
  7065. goto out;
  7066. }
  7067. if ((mode < 1) || (mode > IWL_POWER_LIMIT) || (mode == IWL_POWER_AC))
  7068. mode = IWL_POWER_AC;
  7069. else
  7070. mode |= IWL_POWER_ENABLED;
  7071. if (mode != priv->power_mode) {
  7072. rc = iwl_send_power_mode(priv, IWL_POWER_LEVEL(mode));
  7073. if (rc) {
  7074. IWL_DEBUG_MAC80211("failed setting power mode.\n");
  7075. goto out;
  7076. }
  7077. priv->power_mode = mode;
  7078. }
  7079. rc = count;
  7080. out:
  7081. mutex_unlock(&priv->mutex);
  7082. return rc;
  7083. }
  7084. #define MAX_WX_STRING 80
  7085. /* Values are in microsecond */
  7086. static const s32 timeout_duration[] = {
  7087. 350000,
  7088. 250000,
  7089. 75000,
  7090. 37000,
  7091. 25000,
  7092. };
  7093. static const s32 period_duration[] = {
  7094. 400000,
  7095. 700000,
  7096. 1000000,
  7097. 1000000,
  7098. 1000000
  7099. };
  7100. static ssize_t show_power_level(struct device *d,
  7101. struct device_attribute *attr, char *buf)
  7102. {
  7103. struct iwl_priv *priv = dev_get_drvdata(d);
  7104. int level = IWL_POWER_LEVEL(priv->power_mode);
  7105. char *p = buf;
  7106. p += sprintf(p, "%d ", level);
  7107. switch (level) {
  7108. case IWL_POWER_MODE_CAM:
  7109. case IWL_POWER_AC:
  7110. p += sprintf(p, "(AC)");
  7111. break;
  7112. case IWL_POWER_BATTERY:
  7113. p += sprintf(p, "(BATTERY)");
  7114. break;
  7115. default:
  7116. p += sprintf(p,
  7117. "(Timeout %dms, Period %dms)",
  7118. timeout_duration[level - 1] / 1000,
  7119. period_duration[level - 1] / 1000);
  7120. }
  7121. if (!(priv->power_mode & IWL_POWER_ENABLED))
  7122. p += sprintf(p, " OFF\n");
  7123. else
  7124. p += sprintf(p, " \n");
  7125. return (p - buf + 1);
  7126. }
  7127. static DEVICE_ATTR(power_level, S_IWUSR | S_IRUSR, show_power_level,
  7128. store_power_level);
  7129. static ssize_t show_channels(struct device *d,
  7130. struct device_attribute *attr, char *buf)
  7131. {
  7132. struct iwl_priv *priv = dev_get_drvdata(d);
  7133. int len = 0, i;
  7134. struct ieee80211_channel *channels = NULL;
  7135. const struct ieee80211_hw_mode *hw_mode = NULL;
  7136. int count = 0;
  7137. if (!iwl_is_ready(priv))
  7138. return -EAGAIN;
  7139. hw_mode = iwl_get_hw_mode(priv, MODE_IEEE80211G);
  7140. if (!hw_mode)
  7141. hw_mode = iwl_get_hw_mode(priv, MODE_IEEE80211B);
  7142. if (hw_mode) {
  7143. channels = hw_mode->channels;
  7144. count = hw_mode->num_channels;
  7145. }
  7146. len +=
  7147. sprintf(&buf[len],
  7148. "Displaying %d channels in 2.4GHz band "
  7149. "(802.11bg):\n", count);
  7150. for (i = 0; i < count; i++)
  7151. len += sprintf(&buf[len], "%d: %ddBm: BSS%s%s, %s.\n",
  7152. channels[i].chan,
  7153. channels[i].power_level,
  7154. channels[i].
  7155. flag & IEEE80211_CHAN_W_RADAR_DETECT ?
  7156. " (IEEE 802.11h required)" : "",
  7157. (!(channels[i].flag & IEEE80211_CHAN_W_IBSS)
  7158. || (channels[i].
  7159. flag &
  7160. IEEE80211_CHAN_W_RADAR_DETECT)) ? "" :
  7161. ", IBSS",
  7162. channels[i].
  7163. flag & IEEE80211_CHAN_W_ACTIVE_SCAN ?
  7164. "active/passive" : "passive only");
  7165. hw_mode = iwl_get_hw_mode(priv, MODE_IEEE80211A);
  7166. if (hw_mode) {
  7167. channels = hw_mode->channels;
  7168. count = hw_mode->num_channels;
  7169. } else {
  7170. channels = NULL;
  7171. count = 0;
  7172. }
  7173. len += sprintf(&buf[len], "Displaying %d channels in 5.2GHz band "
  7174. "(802.11a):\n", count);
  7175. for (i = 0; i < count; i++)
  7176. len += sprintf(&buf[len], "%d: %ddBm: BSS%s%s, %s.\n",
  7177. channels[i].chan,
  7178. channels[i].power_level,
  7179. channels[i].
  7180. flag & IEEE80211_CHAN_W_RADAR_DETECT ?
  7181. " (IEEE 802.11h required)" : "",
  7182. (!(channels[i].flag & IEEE80211_CHAN_W_IBSS)
  7183. || (channels[i].
  7184. flag &
  7185. IEEE80211_CHAN_W_RADAR_DETECT)) ? "" :
  7186. ", IBSS",
  7187. channels[i].
  7188. flag & IEEE80211_CHAN_W_ACTIVE_SCAN ?
  7189. "active/passive" : "passive only");
  7190. return len;
  7191. }
  7192. static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL);
  7193. static ssize_t show_statistics(struct device *d,
  7194. struct device_attribute *attr, char *buf)
  7195. {
  7196. struct iwl_priv *priv = dev_get_drvdata(d);
  7197. u32 size = sizeof(struct iwl_notif_statistics);
  7198. u32 len = 0, ofs = 0;
  7199. u8 *data = (u8 *) & priv->statistics;
  7200. int rc = 0;
  7201. if (!iwl_is_alive(priv))
  7202. return -EAGAIN;
  7203. mutex_lock(&priv->mutex);
  7204. rc = iwl_send_statistics_request(priv);
  7205. mutex_unlock(&priv->mutex);
  7206. if (rc) {
  7207. len = sprintf(buf,
  7208. "Error sending statistics request: 0x%08X\n", rc);
  7209. return len;
  7210. }
  7211. while (size && (PAGE_SIZE - len)) {
  7212. hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
  7213. PAGE_SIZE - len, 1);
  7214. len = strlen(buf);
  7215. if (PAGE_SIZE - len)
  7216. buf[len++] = '\n';
  7217. ofs += 16;
  7218. size -= min(size, 16U);
  7219. }
  7220. return len;
  7221. }
  7222. static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
  7223. static ssize_t show_antenna(struct device *d,
  7224. struct device_attribute *attr, char *buf)
  7225. {
  7226. struct iwl_priv *priv = dev_get_drvdata(d);
  7227. if (!iwl_is_alive(priv))
  7228. return -EAGAIN;
  7229. return sprintf(buf, "%d\n", priv->antenna);
  7230. }
  7231. static ssize_t store_antenna(struct device *d,
  7232. struct device_attribute *attr,
  7233. const char *buf, size_t count)
  7234. {
  7235. int ant;
  7236. struct iwl_priv *priv = dev_get_drvdata(d);
  7237. if (count == 0)
  7238. return 0;
  7239. if (sscanf(buf, "%1i", &ant) != 1) {
  7240. IWL_DEBUG_INFO("not in hex or decimal form.\n");
  7241. return count;
  7242. }
  7243. if ((ant >= 0) && (ant <= 2)) {
  7244. IWL_DEBUG_INFO("Setting antenna select to %d.\n", ant);
  7245. priv->antenna = (enum iwl_antenna)ant;
  7246. } else
  7247. IWL_DEBUG_INFO("Bad antenna select value %d.\n", ant);
  7248. return count;
  7249. }
  7250. static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, show_antenna, store_antenna);
  7251. static ssize_t show_status(struct device *d,
  7252. struct device_attribute *attr, char *buf)
  7253. {
  7254. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  7255. if (!iwl_is_alive(priv))
  7256. return -EAGAIN;
  7257. return sprintf(buf, "0x%08x\n", (int)priv->status);
  7258. }
  7259. static DEVICE_ATTR(status, S_IRUGO, show_status, NULL);
  7260. static ssize_t dump_error_log(struct device *d,
  7261. struct device_attribute *attr,
  7262. const char *buf, size_t count)
  7263. {
  7264. char *p = (char *)buf;
  7265. if (p[0] == '1')
  7266. iwl_dump_nic_error_log((struct iwl_priv *)d->driver_data);
  7267. return strnlen(buf, count);
  7268. }
  7269. static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, dump_error_log);
  7270. static ssize_t dump_event_log(struct device *d,
  7271. struct device_attribute *attr,
  7272. const char *buf, size_t count)
  7273. {
  7274. char *p = (char *)buf;
  7275. if (p[0] == '1')
  7276. iwl_dump_nic_event_log((struct iwl_priv *)d->driver_data);
  7277. return strnlen(buf, count);
  7278. }
  7279. static DEVICE_ATTR(dump_events, S_IWUSR, NULL, dump_event_log);
  7280. /*****************************************************************************
  7281. *
  7282. * driver setup and teardown
  7283. *
  7284. *****************************************************************************/
  7285. static void iwl_setup_deferred_work(struct iwl_priv *priv)
  7286. {
  7287. priv->workqueue = create_workqueue(DRV_NAME);
  7288. init_waitqueue_head(&priv->wait_command_queue);
  7289. INIT_WORK(&priv->up, iwl_bg_up);
  7290. INIT_WORK(&priv->restart, iwl_bg_restart);
  7291. INIT_WORK(&priv->rx_replenish, iwl_bg_rx_replenish);
  7292. INIT_WORK(&priv->scan_completed, iwl_bg_scan_completed);
  7293. INIT_WORK(&priv->request_scan, iwl_bg_request_scan);
  7294. INIT_WORK(&priv->abort_scan, iwl_bg_abort_scan);
  7295. INIT_WORK(&priv->rf_kill, iwl_bg_rf_kill);
  7296. INIT_WORK(&priv->beacon_update, iwl_bg_beacon_update);
  7297. INIT_DELAYED_WORK(&priv->post_associate, iwl_bg_post_associate);
  7298. INIT_DELAYED_WORK(&priv->init_alive_start, iwl_bg_init_alive_start);
  7299. INIT_DELAYED_WORK(&priv->alive_start, iwl_bg_alive_start);
  7300. INIT_DELAYED_WORK(&priv->scan_check, iwl_bg_scan_check);
  7301. iwl_hw_setup_deferred_work(priv);
  7302. tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
  7303. iwl_irq_tasklet, (unsigned long)priv);
  7304. }
  7305. static void iwl_cancel_deferred_work(struct iwl_priv *priv)
  7306. {
  7307. iwl_hw_cancel_deferred_work(priv);
  7308. cancel_delayed_work(&priv->scan_check);
  7309. cancel_delayed_work(&priv->alive_start);
  7310. cancel_delayed_work(&priv->post_associate);
  7311. cancel_work_sync(&priv->beacon_update);
  7312. }
  7313. static struct attribute *iwl_sysfs_entries[] = {
  7314. &dev_attr_antenna.attr,
  7315. &dev_attr_channels.attr,
  7316. &dev_attr_dump_errors.attr,
  7317. &dev_attr_dump_events.attr,
  7318. &dev_attr_flags.attr,
  7319. &dev_attr_filter_flags.attr,
  7320. #ifdef CONFIG_IWLWIFI_SPECTRUM_MEASUREMENT
  7321. &dev_attr_measurement.attr,
  7322. #endif
  7323. &dev_attr_power_level.attr,
  7324. &dev_attr_retry_rate.attr,
  7325. &dev_attr_rf_kill.attr,
  7326. &dev_attr_rs_window.attr,
  7327. &dev_attr_statistics.attr,
  7328. &dev_attr_status.attr,
  7329. &dev_attr_temperature.attr,
  7330. &dev_attr_tune.attr,
  7331. &dev_attr_tx_power.attr,
  7332. NULL
  7333. };
  7334. static struct attribute_group iwl_attribute_group = {
  7335. .name = NULL, /* put in device directory */
  7336. .attrs = iwl_sysfs_entries,
  7337. };
  7338. static struct ieee80211_ops iwl_hw_ops = {
  7339. .tx = iwl_mac_tx,
  7340. .open = iwl_mac_open,
  7341. .stop = iwl_mac_stop,
  7342. .add_interface = iwl_mac_add_interface,
  7343. .remove_interface = iwl_mac_remove_interface,
  7344. .config = iwl_mac_config,
  7345. .config_interface = iwl_mac_config_interface,
  7346. .set_key = iwl_mac_set_key,
  7347. .get_stats = iwl_mac_get_stats,
  7348. .get_tx_stats = iwl_mac_get_tx_stats,
  7349. .conf_tx = iwl_mac_conf_tx,
  7350. .get_tsf = iwl_mac_get_tsf,
  7351. .reset_tsf = iwl_mac_reset_tsf,
  7352. .beacon_update = iwl_mac_beacon_update,
  7353. #ifdef CONFIG_IWLWIFI_HT
  7354. .conf_ht = iwl_mac_conf_ht,
  7355. .get_ht_capab = iwl_mac_get_ht_capab,
  7356. #ifdef CONFIG_IWLWIFI_HT_AGG
  7357. .ht_tx_agg_start = iwl_mac_ht_tx_agg_start,
  7358. .ht_tx_agg_stop = iwl_mac_ht_tx_agg_stop,
  7359. .ht_rx_agg_start = iwl_mac_ht_rx_agg_start,
  7360. .ht_rx_agg_stop = iwl_mac_ht_rx_agg_stop,
  7361. #endif /* CONFIG_IWLWIFI_HT_AGG */
  7362. #endif /* CONFIG_IWLWIFI_HT */
  7363. .hw_scan = iwl_mac_hw_scan
  7364. };
  7365. static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  7366. {
  7367. int err = 0;
  7368. struct iwl_priv *priv;
  7369. struct ieee80211_hw *hw;
  7370. int i;
  7371. if (iwl_param_disable_hw_scan) {
  7372. IWL_DEBUG_INFO("Disabling hw_scan\n");
  7373. iwl_hw_ops.hw_scan = NULL;
  7374. }
  7375. if ((iwl_param_queues_num > IWL_MAX_NUM_QUEUES) ||
  7376. (iwl_param_queues_num < IWL_MIN_NUM_QUEUES)) {
  7377. IWL_ERROR("invalid queues_num, should be between %d and %d\n",
  7378. IWL_MIN_NUM_QUEUES, IWL_MAX_NUM_QUEUES);
  7379. err = -EINVAL;
  7380. goto out;
  7381. }
  7382. /* mac80211 allocates memory for this device instance, including
  7383. * space for this driver's private structure */
  7384. hw = ieee80211_alloc_hw(sizeof(struct iwl_priv), &iwl_hw_ops);
  7385. if (hw == NULL) {
  7386. IWL_ERROR("Can not allocate network device\n");
  7387. err = -ENOMEM;
  7388. goto out;
  7389. }
  7390. SET_IEEE80211_DEV(hw, &pdev->dev);
  7391. IWL_DEBUG_INFO("*** LOAD DRIVER ***\n");
  7392. priv = hw->priv;
  7393. priv->hw = hw;
  7394. priv->pci_dev = pdev;
  7395. priv->antenna = (enum iwl_antenna)iwl_param_antenna;
  7396. #ifdef CONFIG_IWLWIFI_DEBUG
  7397. iwl_debug_level = iwl_param_debug;
  7398. atomic_set(&priv->restrict_refcnt, 0);
  7399. #endif
  7400. priv->retry_rate = 1;
  7401. priv->ibss_beacon = NULL;
  7402. /* Tell mac80211 and its clients (e.g. Wireless Extensions)
  7403. * the range of signal quality values that we'll provide.
  7404. * Negative values for level/noise indicate that we'll provide dBm.
  7405. * For WE, at least, non-0 values here *enable* display of values
  7406. * in app (iwconfig). */
  7407. hw->max_rssi = -20; /* signal level, negative indicates dBm */
  7408. hw->max_noise = -20; /* noise level, negative indicates dBm */
  7409. hw->max_signal = 100; /* link quality indication (%) */
  7410. /* Tell mac80211 our Tx characteristics */
  7411. hw->flags = IEEE80211_HW_HOST_GEN_BEACON_TEMPLATE;
  7412. hw->queues = 4;
  7413. #ifdef CONFIG_IWLWIFI_HT
  7414. #ifdef CONFIG_IWLWIFI_HT_AGG
  7415. hw->queues = 16;
  7416. #endif /* CONFIG_IWLWIFI_HT_AGG */
  7417. #endif /* CONFIG_IWLWIFI_HT */
  7418. spin_lock_init(&priv->lock);
  7419. spin_lock_init(&priv->power_data.lock);
  7420. spin_lock_init(&priv->sta_lock);
  7421. spin_lock_init(&priv->hcmd_lock);
  7422. spin_lock_init(&priv->lq_mngr.lock);
  7423. for (i = 0; i < IWL_IBSS_MAC_HASH_SIZE; i++)
  7424. INIT_LIST_HEAD(&priv->ibss_mac_hash[i]);
  7425. INIT_LIST_HEAD(&priv->free_frames);
  7426. mutex_init(&priv->mutex);
  7427. if (pci_enable_device(pdev)) {
  7428. err = -ENODEV;
  7429. goto out_ieee80211_free_hw;
  7430. }
  7431. pci_set_master(pdev);
  7432. iwl_clear_stations_table(priv);
  7433. priv->data_retry_limit = -1;
  7434. priv->ieee_channels = NULL;
  7435. priv->ieee_rates = NULL;
  7436. priv->phymode = -1;
  7437. err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
  7438. if (!err)
  7439. err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
  7440. if (err) {
  7441. printk(KERN_WARNING DRV_NAME ": No suitable DMA available.\n");
  7442. goto out_pci_disable_device;
  7443. }
  7444. pci_set_drvdata(pdev, priv);
  7445. err = pci_request_regions(pdev, DRV_NAME);
  7446. if (err)
  7447. goto out_pci_disable_device;
  7448. /* We disable the RETRY_TIMEOUT register (0x41) to keep
  7449. * PCI Tx retries from interfering with C3 CPU state */
  7450. pci_write_config_byte(pdev, 0x41, 0x00);
  7451. priv->hw_base = pci_iomap(pdev, 0, 0);
  7452. if (!priv->hw_base) {
  7453. err = -ENODEV;
  7454. goto out_pci_release_regions;
  7455. }
  7456. IWL_DEBUG_INFO("pci_resource_len = 0x%08llx\n",
  7457. (unsigned long long) pci_resource_len(pdev, 0));
  7458. IWL_DEBUG_INFO("pci_resource_base = %p\n", priv->hw_base);
  7459. /* Initialize module parameter values here */
  7460. if (iwl_param_disable) {
  7461. set_bit(STATUS_RF_KILL_SW, &priv->status);
  7462. IWL_DEBUG_INFO("Radio disabled.\n");
  7463. }
  7464. priv->iw_mode = IEEE80211_IF_TYPE_STA;
  7465. priv->ps_mode = 0;
  7466. priv->use_ant_b_for_management_frame = 1; /* start with ant B */
  7467. priv->is_ht_enabled = 1;
  7468. priv->channel_width = IWL_CHANNEL_WIDTH_40MHZ;
  7469. priv->valid_antenna = 0x7; /* assume all 3 connected */
  7470. priv->ps_mode = IWL_MIMO_PS_NONE;
  7471. priv->cck_power_index_compensation = iwl_read32(
  7472. priv, CSR_HW_REV_WA_REG);
  7473. iwl4965_set_rxon_chain(priv);
  7474. printk(KERN_INFO DRV_NAME
  7475. ": Detected Intel Wireless WiFi Link 4965AGN\n");
  7476. /* Device-specific setup */
  7477. if (iwl_hw_set_hw_setting(priv)) {
  7478. IWL_ERROR("failed to set hw settings\n");
  7479. mutex_unlock(&priv->mutex);
  7480. goto out_iounmap;
  7481. }
  7482. #ifdef CONFIG_IWLWIFI_QOS
  7483. if (iwl_param_qos_enable)
  7484. priv->qos_data.qos_enable = 1;
  7485. iwl_reset_qos(priv);
  7486. priv->qos_data.qos_active = 0;
  7487. priv->qos_data.qos_cap.val = 0;
  7488. #endif /* CONFIG_IWLWIFI_QOS */
  7489. iwl_set_rxon_channel(priv, MODE_IEEE80211G, 6);
  7490. iwl_setup_deferred_work(priv);
  7491. iwl_setup_rx_handlers(priv);
  7492. priv->rates_mask = IWL_RATES_MASK;
  7493. /* If power management is turned on, default to AC mode */
  7494. priv->power_mode = IWL_POWER_AC;
  7495. priv->user_txpower_limit = IWL_DEFAULT_TX_POWER;
  7496. pci_enable_msi(pdev);
  7497. err = request_irq(pdev->irq, iwl_isr, IRQF_SHARED, DRV_NAME, priv);
  7498. if (err) {
  7499. IWL_ERROR("Error allocating IRQ %d\n", pdev->irq);
  7500. goto out_disable_msi;
  7501. }
  7502. mutex_lock(&priv->mutex);
  7503. err = sysfs_create_group(&pdev->dev.kobj, &iwl_attribute_group);
  7504. if (err) {
  7505. IWL_ERROR("failed to create sysfs device attributes\n");
  7506. mutex_unlock(&priv->mutex);
  7507. goto out_release_irq;
  7508. }
  7509. /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
  7510. * ucode filename and max sizes are card-specific. */
  7511. err = iwl_read_ucode(priv);
  7512. if (err) {
  7513. IWL_ERROR("Could not read microcode: %d\n", err);
  7514. mutex_unlock(&priv->mutex);
  7515. goto out_pci_alloc;
  7516. }
  7517. mutex_unlock(&priv->mutex);
  7518. IWL_DEBUG_INFO("Queing UP work.\n");
  7519. queue_work(priv->workqueue, &priv->up);
  7520. return 0;
  7521. out_pci_alloc:
  7522. iwl_dealloc_ucode_pci(priv);
  7523. sysfs_remove_group(&pdev->dev.kobj, &iwl_attribute_group);
  7524. out_release_irq:
  7525. free_irq(pdev->irq, priv);
  7526. out_disable_msi:
  7527. pci_disable_msi(pdev);
  7528. destroy_workqueue(priv->workqueue);
  7529. priv->workqueue = NULL;
  7530. iwl_unset_hw_setting(priv);
  7531. out_iounmap:
  7532. pci_iounmap(pdev, priv->hw_base);
  7533. out_pci_release_regions:
  7534. pci_release_regions(pdev);
  7535. out_pci_disable_device:
  7536. pci_disable_device(pdev);
  7537. pci_set_drvdata(pdev, NULL);
  7538. out_ieee80211_free_hw:
  7539. ieee80211_free_hw(priv->hw);
  7540. out:
  7541. return err;
  7542. }
  7543. static void iwl_pci_remove(struct pci_dev *pdev)
  7544. {
  7545. struct iwl_priv *priv = pci_get_drvdata(pdev);
  7546. struct list_head *p, *q;
  7547. int i;
  7548. if (!priv)
  7549. return;
  7550. IWL_DEBUG_INFO("*** UNLOAD DRIVER ***\n");
  7551. mutex_lock(&priv->mutex);
  7552. set_bit(STATUS_EXIT_PENDING, &priv->status);
  7553. __iwl_down(priv);
  7554. mutex_unlock(&priv->mutex);
  7555. /* Free MAC hash list for ADHOC */
  7556. for (i = 0; i < IWL_IBSS_MAC_HASH_SIZE; i++) {
  7557. list_for_each_safe(p, q, &priv->ibss_mac_hash[i]) {
  7558. list_del(p);
  7559. kfree(list_entry(p, struct iwl_ibss_seq, list));
  7560. }
  7561. }
  7562. sysfs_remove_group(&pdev->dev.kobj, &iwl_attribute_group);
  7563. iwl_dealloc_ucode_pci(priv);
  7564. if (priv->rxq.bd)
  7565. iwl_rx_queue_free(priv, &priv->rxq);
  7566. iwl_hw_txq_ctx_free(priv);
  7567. iwl_unset_hw_setting(priv);
  7568. iwl_clear_stations_table(priv);
  7569. if (priv->mac80211_registered) {
  7570. ieee80211_unregister_hw(priv->hw);
  7571. iwl_rate_control_unregister(priv->hw);
  7572. }
  7573. /* ieee80211_unregister_hw calls iwl_mac_stop, which flushes
  7574. * priv->workqueue... so we can't take down the workqueue
  7575. * until now... */
  7576. destroy_workqueue(priv->workqueue);
  7577. priv->workqueue = NULL;
  7578. free_irq(pdev->irq, priv);
  7579. pci_disable_msi(pdev);
  7580. pci_iounmap(pdev, priv->hw_base);
  7581. pci_release_regions(pdev);
  7582. pci_disable_device(pdev);
  7583. pci_set_drvdata(pdev, NULL);
  7584. kfree(priv->channel_info);
  7585. kfree(priv->ieee_channels);
  7586. kfree(priv->ieee_rates);
  7587. if (priv->ibss_beacon)
  7588. dev_kfree_skb(priv->ibss_beacon);
  7589. ieee80211_free_hw(priv->hw);
  7590. }
  7591. #ifdef CONFIG_PM
  7592. static int iwl_pci_suspend(struct pci_dev *pdev, pm_message_t state)
  7593. {
  7594. struct iwl_priv *priv = pci_get_drvdata(pdev);
  7595. mutex_lock(&priv->mutex);
  7596. set_bit(STATUS_IN_SUSPEND, &priv->status);
  7597. /* Take down the device; powers it off, etc. */
  7598. __iwl_down(priv);
  7599. if (priv->mac80211_registered)
  7600. ieee80211_stop_queues(priv->hw);
  7601. pci_save_state(pdev);
  7602. pci_disable_device(pdev);
  7603. pci_set_power_state(pdev, PCI_D3hot);
  7604. mutex_unlock(&priv->mutex);
  7605. return 0;
  7606. }
  7607. static void iwl_resume(struct iwl_priv *priv)
  7608. {
  7609. unsigned long flags;
  7610. /* The following it a temporary work around due to the
  7611. * suspend / resume not fully initializing the NIC correctly.
  7612. * Without all of the following, resume will not attempt to take
  7613. * down the NIC (it shouldn't really need to) and will just try
  7614. * and bring the NIC back up. However that fails during the
  7615. * ucode verification process. This then causes iwl_down to be
  7616. * called *after* iwl_hw_nic_init() has succeeded -- which
  7617. * then lets the next init sequence succeed. So, we've
  7618. * replicated all of that NIC init code here... */
  7619. iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
  7620. iwl_hw_nic_init(priv);
  7621. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  7622. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
  7623. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  7624. iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
  7625. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  7626. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  7627. /* tell the device to stop sending interrupts */
  7628. iwl_disable_interrupts(priv);
  7629. spin_lock_irqsave(&priv->lock, flags);
  7630. iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  7631. if (!iwl_grab_restricted_access(priv)) {
  7632. iwl_write_restricted_reg(priv, APMG_CLK_DIS_REG,
  7633. APMG_CLK_VAL_DMA_CLK_RQT);
  7634. iwl_release_restricted_access(priv);
  7635. }
  7636. spin_unlock_irqrestore(&priv->lock, flags);
  7637. udelay(5);
  7638. iwl_hw_nic_reset(priv);
  7639. /* Bring the device back up */
  7640. clear_bit(STATUS_IN_SUSPEND, &priv->status);
  7641. queue_work(priv->workqueue, &priv->up);
  7642. }
  7643. static int iwl_pci_resume(struct pci_dev *pdev)
  7644. {
  7645. struct iwl_priv *priv = pci_get_drvdata(pdev);
  7646. int err;
  7647. printk(KERN_INFO "Coming out of suspend...\n");
  7648. mutex_lock(&priv->mutex);
  7649. pci_set_power_state(pdev, PCI_D0);
  7650. err = pci_enable_device(pdev);
  7651. pci_restore_state(pdev);
  7652. /*
  7653. * Suspend/Resume resets the PCI configuration space, so we have to
  7654. * re-disable the RETRY_TIMEOUT register (0x41) to keep PCI Tx retries
  7655. * from interfering with C3 CPU state. pci_restore_state won't help
  7656. * here since it only restores the first 64 bytes pci config header.
  7657. */
  7658. pci_write_config_byte(pdev, 0x41, 0x00);
  7659. iwl_resume(priv);
  7660. mutex_unlock(&priv->mutex);
  7661. return 0;
  7662. }
  7663. #endif /* CONFIG_PM */
  7664. /*****************************************************************************
  7665. *
  7666. * driver and module entry point
  7667. *
  7668. *****************************************************************************/
  7669. static struct pci_driver iwl_driver = {
  7670. .name = DRV_NAME,
  7671. .id_table = iwl_hw_card_ids,
  7672. .probe = iwl_pci_probe,
  7673. .remove = __devexit_p(iwl_pci_remove),
  7674. #ifdef CONFIG_PM
  7675. .suspend = iwl_pci_suspend,
  7676. .resume = iwl_pci_resume,
  7677. #endif
  7678. };
  7679. static int __init iwl_init(void)
  7680. {
  7681. int ret;
  7682. printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
  7683. printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
  7684. ret = pci_register_driver(&iwl_driver);
  7685. if (ret) {
  7686. IWL_ERROR("Unable to initialize PCI module\n");
  7687. return ret;
  7688. }
  7689. #ifdef CONFIG_IWLWIFI_DEBUG
  7690. ret = driver_create_file(&iwl_driver.driver, &driver_attr_debug_level);
  7691. if (ret) {
  7692. IWL_ERROR("Unable to create driver sysfs file\n");
  7693. pci_unregister_driver(&iwl_driver);
  7694. return ret;
  7695. }
  7696. #endif
  7697. return ret;
  7698. }
  7699. static void __exit iwl_exit(void)
  7700. {
  7701. #ifdef CONFIG_IWLWIFI_DEBUG
  7702. driver_remove_file(&iwl_driver.driver, &driver_attr_debug_level);
  7703. #endif
  7704. pci_unregister_driver(&iwl_driver);
  7705. }
  7706. module_param_named(antenna, iwl_param_antenna, int, 0444);
  7707. MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
  7708. module_param_named(disable, iwl_param_disable, int, 0444);
  7709. MODULE_PARM_DESC(disable, "manually disable the radio (default 0 [radio on])");
  7710. module_param_named(hwcrypto, iwl_param_hwcrypto, int, 0444);
  7711. MODULE_PARM_DESC(hwcrypto,
  7712. "using hardware crypto engine (default 0 [software])\n");
  7713. module_param_named(debug, iwl_param_debug, int, 0444);
  7714. MODULE_PARM_DESC(debug, "debug output mask");
  7715. module_param_named(disable_hw_scan, iwl_param_disable_hw_scan, int, 0444);
  7716. MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
  7717. module_param_named(queues_num, iwl_param_queues_num, int, 0444);
  7718. MODULE_PARM_DESC(queues_num, "number of hw queues.");
  7719. /* QoS */
  7720. module_param_named(qos_enable, iwl_param_qos_enable, int, 0444);
  7721. MODULE_PARM_DESC(qos_enable, "enable all QoS functionality");
  7722. module_exit(iwl_exit);
  7723. module_init(iwl_init);