setup.c 25 KB

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  1. /*
  2. * linux/arch/arm/kernel/setup.c
  3. *
  4. * Copyright (C) 1995-2001 Russell King
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. */
  10. #include <linux/export.h>
  11. #include <linux/kernel.h>
  12. #include <linux/stddef.h>
  13. #include <linux/ioport.h>
  14. #include <linux/delay.h>
  15. #include <linux/utsname.h>
  16. #include <linux/initrd.h>
  17. #include <linux/console.h>
  18. #include <linux/bootmem.h>
  19. #include <linux/seq_file.h>
  20. #include <linux/screen_info.h>
  21. #include <linux/init.h>
  22. #include <linux/kexec.h>
  23. #include <linux/of_fdt.h>
  24. #include <linux/crash_dump.h>
  25. #include <linux/root_dev.h>
  26. #include <linux/cpu.h>
  27. #include <linux/interrupt.h>
  28. #include <linux/smp.h>
  29. #include <linux/fs.h>
  30. #include <linux/proc_fs.h>
  31. #include <linux/memblock.h>
  32. #include <linux/bug.h>
  33. #include <linux/compiler.h>
  34. #include <asm/unified.h>
  35. #include <asm/cpu.h>
  36. #include <asm/cputype.h>
  37. #include <asm/elf.h>
  38. #include <asm/procinfo.h>
  39. #include <asm/sections.h>
  40. #include <asm/setup.h>
  41. #include <asm/smp_plat.h>
  42. #include <asm/mach-types.h>
  43. #include <asm/cacheflush.h>
  44. #include <asm/cachetype.h>
  45. #include <asm/tlbflush.h>
  46. #include <asm/system.h>
  47. #include <asm/prom.h>
  48. #include <asm/mach/arch.h>
  49. #include <asm/mach/irq.h>
  50. #include <asm/mach/time.h>
  51. #include <asm/traps.h>
  52. #include <asm/unwind.h>
  53. #if defined(CONFIG_DEPRECATED_PARAM_STRUCT)
  54. #include "compat.h"
  55. #endif
  56. #include "atags.h"
  57. #include "tcm.h"
  58. #ifndef MEM_SIZE
  59. #define MEM_SIZE (16*1024*1024)
  60. #endif
  61. #if defined(CONFIG_FPE_NWFPE) || defined(CONFIG_FPE_FASTFPE)
  62. char fpe_type[8];
  63. static int __init fpe_setup(char *line)
  64. {
  65. memcpy(fpe_type, line, 8);
  66. return 1;
  67. }
  68. __setup("fpe=", fpe_setup);
  69. #endif
  70. extern void paging_init(struct machine_desc *desc);
  71. extern void sanity_check_meminfo(void);
  72. extern void reboot_setup(char *str);
  73. unsigned int processor_id;
  74. EXPORT_SYMBOL(processor_id);
  75. unsigned int __machine_arch_type __read_mostly;
  76. EXPORT_SYMBOL(__machine_arch_type);
  77. unsigned int cacheid __read_mostly;
  78. EXPORT_SYMBOL(cacheid);
  79. unsigned int __atags_pointer __initdata;
  80. unsigned int system_rev;
  81. EXPORT_SYMBOL(system_rev);
  82. unsigned int system_serial_low;
  83. EXPORT_SYMBOL(system_serial_low);
  84. unsigned int system_serial_high;
  85. EXPORT_SYMBOL(system_serial_high);
  86. unsigned int elf_hwcap __read_mostly;
  87. EXPORT_SYMBOL(elf_hwcap);
  88. #ifdef MULTI_CPU
  89. struct processor processor __read_mostly;
  90. #endif
  91. #ifdef MULTI_TLB
  92. struct cpu_tlb_fns cpu_tlb __read_mostly;
  93. #endif
  94. #ifdef MULTI_USER
  95. struct cpu_user_fns cpu_user __read_mostly;
  96. #endif
  97. #ifdef MULTI_CACHE
  98. struct cpu_cache_fns cpu_cache __read_mostly;
  99. #endif
  100. #ifdef CONFIG_OUTER_CACHE
  101. struct outer_cache_fns outer_cache __read_mostly;
  102. EXPORT_SYMBOL(outer_cache);
  103. #endif
  104. /*
  105. * Cached cpu_architecture() result for use by assembler code.
  106. * C code should use the cpu_architecture() function instead of accessing this
  107. * variable directly.
  108. */
  109. int __cpu_architecture __read_mostly = CPU_ARCH_UNKNOWN;
  110. struct stack {
  111. u32 irq[3];
  112. u32 abt[3];
  113. u32 und[3];
  114. } ____cacheline_aligned;
  115. static struct stack stacks[NR_CPUS];
  116. char elf_platform[ELF_PLATFORM_SIZE];
  117. EXPORT_SYMBOL(elf_platform);
  118. static const char *cpu_name;
  119. static const char *machine_name;
  120. static char __initdata cmd_line[COMMAND_LINE_SIZE];
  121. struct machine_desc *machine_desc __initdata;
  122. static char default_command_line[COMMAND_LINE_SIZE] __initdata = CONFIG_CMDLINE;
  123. static union { char c[4]; unsigned long l; } endian_test __initdata = { { 'l', '?', '?', 'b' } };
  124. #define ENDIANNESS ((char)endian_test.l)
  125. DEFINE_PER_CPU(struct cpuinfo_arm, cpu_data);
  126. /*
  127. * Standard memory resources
  128. */
  129. static struct resource mem_res[] = {
  130. {
  131. .name = "Video RAM",
  132. .start = 0,
  133. .end = 0,
  134. .flags = IORESOURCE_MEM
  135. },
  136. {
  137. .name = "Kernel text",
  138. .start = 0,
  139. .end = 0,
  140. .flags = IORESOURCE_MEM
  141. },
  142. {
  143. .name = "Kernel data",
  144. .start = 0,
  145. .end = 0,
  146. .flags = IORESOURCE_MEM
  147. }
  148. };
  149. #define video_ram mem_res[0]
  150. #define kernel_code mem_res[1]
  151. #define kernel_data mem_res[2]
  152. static struct resource io_res[] = {
  153. {
  154. .name = "reserved",
  155. .start = 0x3bc,
  156. .end = 0x3be,
  157. .flags = IORESOURCE_IO | IORESOURCE_BUSY
  158. },
  159. {
  160. .name = "reserved",
  161. .start = 0x378,
  162. .end = 0x37f,
  163. .flags = IORESOURCE_IO | IORESOURCE_BUSY
  164. },
  165. {
  166. .name = "reserved",
  167. .start = 0x278,
  168. .end = 0x27f,
  169. .flags = IORESOURCE_IO | IORESOURCE_BUSY
  170. }
  171. };
  172. #define lp0 io_res[0]
  173. #define lp1 io_res[1]
  174. #define lp2 io_res[2]
  175. static const char *proc_arch[] = {
  176. "undefined/unknown",
  177. "3",
  178. "4",
  179. "4T",
  180. "5",
  181. "5T",
  182. "5TE",
  183. "5TEJ",
  184. "6TEJ",
  185. "7",
  186. "?(11)",
  187. "?(12)",
  188. "?(13)",
  189. "?(14)",
  190. "?(15)",
  191. "?(16)",
  192. "?(17)",
  193. };
  194. static int __get_cpu_architecture(void)
  195. {
  196. int cpu_arch;
  197. if ((read_cpuid_id() & 0x0008f000) == 0) {
  198. cpu_arch = CPU_ARCH_UNKNOWN;
  199. } else if ((read_cpuid_id() & 0x0008f000) == 0x00007000) {
  200. cpu_arch = (read_cpuid_id() & (1 << 23)) ? CPU_ARCH_ARMv4T : CPU_ARCH_ARMv3;
  201. } else if ((read_cpuid_id() & 0x00080000) == 0x00000000) {
  202. cpu_arch = (read_cpuid_id() >> 16) & 7;
  203. if (cpu_arch)
  204. cpu_arch += CPU_ARCH_ARMv3;
  205. } else if ((read_cpuid_id() & 0x000f0000) == 0x000f0000) {
  206. unsigned int mmfr0;
  207. /* Revised CPUID format. Read the Memory Model Feature
  208. * Register 0 and check for VMSAv7 or PMSAv7 */
  209. asm("mrc p15, 0, %0, c0, c1, 4"
  210. : "=r" (mmfr0));
  211. if ((mmfr0 & 0x0000000f) >= 0x00000003 ||
  212. (mmfr0 & 0x000000f0) >= 0x00000030)
  213. cpu_arch = CPU_ARCH_ARMv7;
  214. else if ((mmfr0 & 0x0000000f) == 0x00000002 ||
  215. (mmfr0 & 0x000000f0) == 0x00000020)
  216. cpu_arch = CPU_ARCH_ARMv6;
  217. else
  218. cpu_arch = CPU_ARCH_UNKNOWN;
  219. } else
  220. cpu_arch = CPU_ARCH_UNKNOWN;
  221. return cpu_arch;
  222. }
  223. int __pure cpu_architecture(void)
  224. {
  225. BUG_ON(__cpu_architecture == CPU_ARCH_UNKNOWN);
  226. return __cpu_architecture;
  227. }
  228. static int cpu_has_aliasing_icache(unsigned int arch)
  229. {
  230. int aliasing_icache;
  231. unsigned int id_reg, num_sets, line_size;
  232. /* PIPT caches never alias. */
  233. if (icache_is_pipt())
  234. return 0;
  235. /* arch specifies the register format */
  236. switch (arch) {
  237. case CPU_ARCH_ARMv7:
  238. asm("mcr p15, 2, %0, c0, c0, 0 @ set CSSELR"
  239. : /* No output operands */
  240. : "r" (1));
  241. isb();
  242. asm("mrc p15, 1, %0, c0, c0, 0 @ read CCSIDR"
  243. : "=r" (id_reg));
  244. line_size = 4 << ((id_reg & 0x7) + 2);
  245. num_sets = ((id_reg >> 13) & 0x7fff) + 1;
  246. aliasing_icache = (line_size * num_sets) > PAGE_SIZE;
  247. break;
  248. case CPU_ARCH_ARMv6:
  249. aliasing_icache = read_cpuid_cachetype() & (1 << 11);
  250. break;
  251. default:
  252. /* I-cache aliases will be handled by D-cache aliasing code */
  253. aliasing_icache = 0;
  254. }
  255. return aliasing_icache;
  256. }
  257. static void __init cacheid_init(void)
  258. {
  259. unsigned int cachetype = read_cpuid_cachetype();
  260. unsigned int arch = cpu_architecture();
  261. if (arch >= CPU_ARCH_ARMv6) {
  262. if ((cachetype & (7 << 29)) == 4 << 29) {
  263. /* ARMv7 register format */
  264. arch = CPU_ARCH_ARMv7;
  265. cacheid = CACHEID_VIPT_NONALIASING;
  266. switch (cachetype & (3 << 14)) {
  267. case (1 << 14):
  268. cacheid |= CACHEID_ASID_TAGGED;
  269. break;
  270. case (3 << 14):
  271. cacheid |= CACHEID_PIPT;
  272. break;
  273. }
  274. } else {
  275. arch = CPU_ARCH_ARMv6;
  276. if (cachetype & (1 << 23))
  277. cacheid = CACHEID_VIPT_ALIASING;
  278. else
  279. cacheid = CACHEID_VIPT_NONALIASING;
  280. }
  281. if (cpu_has_aliasing_icache(arch))
  282. cacheid |= CACHEID_VIPT_I_ALIASING;
  283. } else {
  284. cacheid = CACHEID_VIVT;
  285. }
  286. printk("CPU: %s data cache, %s instruction cache\n",
  287. cache_is_vivt() ? "VIVT" :
  288. cache_is_vipt_aliasing() ? "VIPT aliasing" :
  289. cache_is_vipt_nonaliasing() ? "PIPT / VIPT nonaliasing" : "unknown",
  290. cache_is_vivt() ? "VIVT" :
  291. icache_is_vivt_asid_tagged() ? "VIVT ASID tagged" :
  292. icache_is_vipt_aliasing() ? "VIPT aliasing" :
  293. icache_is_pipt() ? "PIPT" :
  294. cache_is_vipt_nonaliasing() ? "VIPT nonaliasing" : "unknown");
  295. }
  296. /*
  297. * These functions re-use the assembly code in head.S, which
  298. * already provide the required functionality.
  299. */
  300. extern struct proc_info_list *lookup_processor_type(unsigned int);
  301. void __init early_print(const char *str, ...)
  302. {
  303. extern void printascii(const char *);
  304. char buf[256];
  305. va_list ap;
  306. va_start(ap, str);
  307. vsnprintf(buf, sizeof(buf), str, ap);
  308. va_end(ap);
  309. #ifdef CONFIG_DEBUG_LL
  310. printascii(buf);
  311. #endif
  312. printk("%s", buf);
  313. }
  314. static void __init feat_v6_fixup(void)
  315. {
  316. int id = read_cpuid_id();
  317. if ((id & 0xff0f0000) != 0x41070000)
  318. return;
  319. /*
  320. * HWCAP_TLS is available only on 1136 r1p0 and later,
  321. * see also kuser_get_tls_init.
  322. */
  323. if ((((id >> 4) & 0xfff) == 0xb36) && (((id >> 20) & 3) == 0))
  324. elf_hwcap &= ~HWCAP_TLS;
  325. }
  326. /*
  327. * cpu_init - initialise one CPU.
  328. *
  329. * cpu_init sets up the per-CPU stacks.
  330. */
  331. void cpu_init(void)
  332. {
  333. unsigned int cpu = smp_processor_id();
  334. struct stack *stk = &stacks[cpu];
  335. if (cpu >= NR_CPUS) {
  336. printk(KERN_CRIT "CPU%u: bad primary CPU number\n", cpu);
  337. BUG();
  338. }
  339. cpu_proc_init();
  340. /*
  341. * Define the placement constraint for the inline asm directive below.
  342. * In Thumb-2, msr with an immediate value is not allowed.
  343. */
  344. #ifdef CONFIG_THUMB2_KERNEL
  345. #define PLC "r"
  346. #else
  347. #define PLC "I"
  348. #endif
  349. /*
  350. * setup stacks for re-entrant exception handlers
  351. */
  352. __asm__ (
  353. "msr cpsr_c, %1\n\t"
  354. "add r14, %0, %2\n\t"
  355. "mov sp, r14\n\t"
  356. "msr cpsr_c, %3\n\t"
  357. "add r14, %0, %4\n\t"
  358. "mov sp, r14\n\t"
  359. "msr cpsr_c, %5\n\t"
  360. "add r14, %0, %6\n\t"
  361. "mov sp, r14\n\t"
  362. "msr cpsr_c, %7"
  363. :
  364. : "r" (stk),
  365. PLC (PSR_F_BIT | PSR_I_BIT | IRQ_MODE),
  366. "I" (offsetof(struct stack, irq[0])),
  367. PLC (PSR_F_BIT | PSR_I_BIT | ABT_MODE),
  368. "I" (offsetof(struct stack, abt[0])),
  369. PLC (PSR_F_BIT | PSR_I_BIT | UND_MODE),
  370. "I" (offsetof(struct stack, und[0])),
  371. PLC (PSR_F_BIT | PSR_I_BIT | SVC_MODE)
  372. : "r14");
  373. }
  374. static void __init setup_processor(void)
  375. {
  376. struct proc_info_list *list;
  377. /*
  378. * locate processor in the list of supported processor
  379. * types. The linker builds this table for us from the
  380. * entries in arch/arm/mm/proc-*.S
  381. */
  382. list = lookup_processor_type(read_cpuid_id());
  383. if (!list) {
  384. printk("CPU configuration botched (ID %08x), unable "
  385. "to continue.\n", read_cpuid_id());
  386. while (1);
  387. }
  388. cpu_name = list->cpu_name;
  389. __cpu_architecture = __get_cpu_architecture();
  390. #ifdef MULTI_CPU
  391. processor = *list->proc;
  392. #endif
  393. #ifdef MULTI_TLB
  394. cpu_tlb = *list->tlb;
  395. #endif
  396. #ifdef MULTI_USER
  397. cpu_user = *list->user;
  398. #endif
  399. #ifdef MULTI_CACHE
  400. cpu_cache = *list->cache;
  401. #endif
  402. printk("CPU: %s [%08x] revision %d (ARMv%s), cr=%08lx\n",
  403. cpu_name, read_cpuid_id(), read_cpuid_id() & 15,
  404. proc_arch[cpu_architecture()], cr_alignment);
  405. sprintf(init_utsname()->machine, "%s%c", list->arch_name, ENDIANNESS);
  406. sprintf(elf_platform, "%s%c", list->elf_name, ENDIANNESS);
  407. elf_hwcap = list->elf_hwcap;
  408. #ifndef CONFIG_ARM_THUMB
  409. elf_hwcap &= ~HWCAP_THUMB;
  410. #endif
  411. feat_v6_fixup();
  412. cacheid_init();
  413. cpu_init();
  414. }
  415. void __init dump_machine_table(void)
  416. {
  417. struct machine_desc *p;
  418. early_print("Available machine support:\n\nID (hex)\tNAME\n");
  419. for_each_machine_desc(p)
  420. early_print("%08x\t%s\n", p->nr, p->name);
  421. early_print("\nPlease check your kernel config and/or bootloader.\n");
  422. while (true)
  423. /* can't use cpu_relax() here as it may require MMU setup */;
  424. }
  425. int __init arm_add_memory(phys_addr_t start, unsigned long size)
  426. {
  427. struct membank *bank = &meminfo.bank[meminfo.nr_banks];
  428. if (meminfo.nr_banks >= NR_BANKS) {
  429. printk(KERN_CRIT "NR_BANKS too low, "
  430. "ignoring memory at 0x%08llx\n", (long long)start);
  431. return -EINVAL;
  432. }
  433. /*
  434. * Ensure that start/size are aligned to a page boundary.
  435. * Size is appropriately rounded down, start is rounded up.
  436. */
  437. size -= start & ~PAGE_MASK;
  438. bank->start = PAGE_ALIGN(start);
  439. bank->size = size & PAGE_MASK;
  440. /*
  441. * Check whether this memory region has non-zero size or
  442. * invalid node number.
  443. */
  444. if (bank->size == 0)
  445. return -EINVAL;
  446. meminfo.nr_banks++;
  447. return 0;
  448. }
  449. /*
  450. * Pick out the memory size. We look for mem=size@start,
  451. * where start and size are "size[KkMm]"
  452. */
  453. static int __init early_mem(char *p)
  454. {
  455. static int usermem __initdata = 0;
  456. unsigned long size;
  457. phys_addr_t start;
  458. char *endp;
  459. /*
  460. * If the user specifies memory size, we
  461. * blow away any automatically generated
  462. * size.
  463. */
  464. if (usermem == 0) {
  465. usermem = 1;
  466. meminfo.nr_banks = 0;
  467. }
  468. start = PHYS_OFFSET;
  469. size = memparse(p, &endp);
  470. if (*endp == '@')
  471. start = memparse(endp + 1, NULL);
  472. arm_add_memory(start, size);
  473. return 0;
  474. }
  475. early_param("mem", early_mem);
  476. static void __init
  477. setup_ramdisk(int doload, int prompt, int image_start, unsigned int rd_sz)
  478. {
  479. #ifdef CONFIG_BLK_DEV_RAM
  480. extern int rd_size, rd_image_start, rd_prompt, rd_doload;
  481. rd_image_start = image_start;
  482. rd_prompt = prompt;
  483. rd_doload = doload;
  484. if (rd_sz)
  485. rd_size = rd_sz;
  486. #endif
  487. }
  488. static void __init request_standard_resources(struct machine_desc *mdesc)
  489. {
  490. struct memblock_region *region;
  491. struct resource *res;
  492. kernel_code.start = virt_to_phys(_text);
  493. kernel_code.end = virt_to_phys(_etext - 1);
  494. kernel_data.start = virt_to_phys(_sdata);
  495. kernel_data.end = virt_to_phys(_end - 1);
  496. for_each_memblock(memory, region) {
  497. res = alloc_bootmem_low(sizeof(*res));
  498. res->name = "System RAM";
  499. res->start = __pfn_to_phys(memblock_region_memory_base_pfn(region));
  500. res->end = __pfn_to_phys(memblock_region_memory_end_pfn(region)) - 1;
  501. res->flags = IORESOURCE_MEM | IORESOURCE_BUSY;
  502. request_resource(&iomem_resource, res);
  503. if (kernel_code.start >= res->start &&
  504. kernel_code.end <= res->end)
  505. request_resource(res, &kernel_code);
  506. if (kernel_data.start >= res->start &&
  507. kernel_data.end <= res->end)
  508. request_resource(res, &kernel_data);
  509. }
  510. if (mdesc->video_start) {
  511. video_ram.start = mdesc->video_start;
  512. video_ram.end = mdesc->video_end;
  513. request_resource(&iomem_resource, &video_ram);
  514. }
  515. /*
  516. * Some machines don't have the possibility of ever
  517. * possessing lp0, lp1 or lp2
  518. */
  519. if (mdesc->reserve_lp0)
  520. request_resource(&ioport_resource, &lp0);
  521. if (mdesc->reserve_lp1)
  522. request_resource(&ioport_resource, &lp1);
  523. if (mdesc->reserve_lp2)
  524. request_resource(&ioport_resource, &lp2);
  525. }
  526. /*
  527. * Tag parsing.
  528. *
  529. * This is the new way of passing data to the kernel at boot time. Rather
  530. * than passing a fixed inflexible structure to the kernel, we pass a list
  531. * of variable-sized tags to the kernel. The first tag must be a ATAG_CORE
  532. * tag for the list to be recognised (to distinguish the tagged list from
  533. * a param_struct). The list is terminated with a zero-length tag (this tag
  534. * is not parsed in any way).
  535. */
  536. static int __init parse_tag_core(const struct tag *tag)
  537. {
  538. if (tag->hdr.size > 2) {
  539. if ((tag->u.core.flags & 1) == 0)
  540. root_mountflags &= ~MS_RDONLY;
  541. ROOT_DEV = old_decode_dev(tag->u.core.rootdev);
  542. }
  543. return 0;
  544. }
  545. __tagtable(ATAG_CORE, parse_tag_core);
  546. static int __init parse_tag_mem32(const struct tag *tag)
  547. {
  548. return arm_add_memory(tag->u.mem.start, tag->u.mem.size);
  549. }
  550. __tagtable(ATAG_MEM, parse_tag_mem32);
  551. #if defined(CONFIG_VGA_CONSOLE) || defined(CONFIG_DUMMY_CONSOLE)
  552. struct screen_info screen_info = {
  553. .orig_video_lines = 30,
  554. .orig_video_cols = 80,
  555. .orig_video_mode = 0,
  556. .orig_video_ega_bx = 0,
  557. .orig_video_isVGA = 1,
  558. .orig_video_points = 8
  559. };
  560. static int __init parse_tag_videotext(const struct tag *tag)
  561. {
  562. screen_info.orig_x = tag->u.videotext.x;
  563. screen_info.orig_y = tag->u.videotext.y;
  564. screen_info.orig_video_page = tag->u.videotext.video_page;
  565. screen_info.orig_video_mode = tag->u.videotext.video_mode;
  566. screen_info.orig_video_cols = tag->u.videotext.video_cols;
  567. screen_info.orig_video_ega_bx = tag->u.videotext.video_ega_bx;
  568. screen_info.orig_video_lines = tag->u.videotext.video_lines;
  569. screen_info.orig_video_isVGA = tag->u.videotext.video_isvga;
  570. screen_info.orig_video_points = tag->u.videotext.video_points;
  571. return 0;
  572. }
  573. __tagtable(ATAG_VIDEOTEXT, parse_tag_videotext);
  574. #endif
  575. static int __init parse_tag_ramdisk(const struct tag *tag)
  576. {
  577. setup_ramdisk((tag->u.ramdisk.flags & 1) == 0,
  578. (tag->u.ramdisk.flags & 2) == 0,
  579. tag->u.ramdisk.start, tag->u.ramdisk.size);
  580. return 0;
  581. }
  582. __tagtable(ATAG_RAMDISK, parse_tag_ramdisk);
  583. static int __init parse_tag_serialnr(const struct tag *tag)
  584. {
  585. system_serial_low = tag->u.serialnr.low;
  586. system_serial_high = tag->u.serialnr.high;
  587. return 0;
  588. }
  589. __tagtable(ATAG_SERIAL, parse_tag_serialnr);
  590. static int __init parse_tag_revision(const struct tag *tag)
  591. {
  592. system_rev = tag->u.revision.rev;
  593. return 0;
  594. }
  595. __tagtable(ATAG_REVISION, parse_tag_revision);
  596. static int __init parse_tag_cmdline(const struct tag *tag)
  597. {
  598. #if defined(CONFIG_CMDLINE_EXTEND)
  599. strlcat(default_command_line, " ", COMMAND_LINE_SIZE);
  600. strlcat(default_command_line, tag->u.cmdline.cmdline,
  601. COMMAND_LINE_SIZE);
  602. #elif defined(CONFIG_CMDLINE_FORCE)
  603. pr_warning("Ignoring tag cmdline (using the default kernel command line)\n");
  604. #else
  605. strlcpy(default_command_line, tag->u.cmdline.cmdline,
  606. COMMAND_LINE_SIZE);
  607. #endif
  608. return 0;
  609. }
  610. __tagtable(ATAG_CMDLINE, parse_tag_cmdline);
  611. /*
  612. * Scan the tag table for this tag, and call its parse function.
  613. * The tag table is built by the linker from all the __tagtable
  614. * declarations.
  615. */
  616. static int __init parse_tag(const struct tag *tag)
  617. {
  618. extern struct tagtable __tagtable_begin, __tagtable_end;
  619. struct tagtable *t;
  620. for (t = &__tagtable_begin; t < &__tagtable_end; t++)
  621. if (tag->hdr.tag == t->tag) {
  622. t->parse(tag);
  623. break;
  624. }
  625. return t < &__tagtable_end;
  626. }
  627. /*
  628. * Parse all tags in the list, checking both the global and architecture
  629. * specific tag tables.
  630. */
  631. static void __init parse_tags(const struct tag *t)
  632. {
  633. for (; t->hdr.size; t = tag_next(t))
  634. if (!parse_tag(t))
  635. printk(KERN_WARNING
  636. "Ignoring unrecognised tag 0x%08x\n",
  637. t->hdr.tag);
  638. }
  639. /*
  640. * This holds our defaults.
  641. */
  642. static struct init_tags {
  643. struct tag_header hdr1;
  644. struct tag_core core;
  645. struct tag_header hdr2;
  646. struct tag_mem32 mem;
  647. struct tag_header hdr3;
  648. } init_tags __initdata = {
  649. { tag_size(tag_core), ATAG_CORE },
  650. { 1, PAGE_SIZE, 0xff },
  651. { tag_size(tag_mem32), ATAG_MEM },
  652. { MEM_SIZE },
  653. { 0, ATAG_NONE }
  654. };
  655. static int __init customize_machine(void)
  656. {
  657. /* customizes platform devices, or adds new ones */
  658. if (machine_desc->init_machine)
  659. machine_desc->init_machine();
  660. return 0;
  661. }
  662. arch_initcall(customize_machine);
  663. #ifdef CONFIG_KEXEC
  664. static inline unsigned long long get_total_mem(void)
  665. {
  666. unsigned long total;
  667. total = max_low_pfn - min_low_pfn;
  668. return total << PAGE_SHIFT;
  669. }
  670. /**
  671. * reserve_crashkernel() - reserves memory are for crash kernel
  672. *
  673. * This function reserves memory area given in "crashkernel=" kernel command
  674. * line parameter. The memory reserved is used by a dump capture kernel when
  675. * primary kernel is crashing.
  676. */
  677. static void __init reserve_crashkernel(void)
  678. {
  679. unsigned long long crash_size, crash_base;
  680. unsigned long long total_mem;
  681. int ret;
  682. total_mem = get_total_mem();
  683. ret = parse_crashkernel(boot_command_line, total_mem,
  684. &crash_size, &crash_base);
  685. if (ret)
  686. return;
  687. ret = reserve_bootmem(crash_base, crash_size, BOOTMEM_EXCLUSIVE);
  688. if (ret < 0) {
  689. printk(KERN_WARNING "crashkernel reservation failed - "
  690. "memory is in use (0x%lx)\n", (unsigned long)crash_base);
  691. return;
  692. }
  693. printk(KERN_INFO "Reserving %ldMB of memory at %ldMB "
  694. "for crashkernel (System RAM: %ldMB)\n",
  695. (unsigned long)(crash_size >> 20),
  696. (unsigned long)(crash_base >> 20),
  697. (unsigned long)(total_mem >> 20));
  698. crashk_res.start = crash_base;
  699. crashk_res.end = crash_base + crash_size - 1;
  700. insert_resource(&iomem_resource, &crashk_res);
  701. }
  702. #else
  703. static inline void reserve_crashkernel(void) {}
  704. #endif /* CONFIG_KEXEC */
  705. static void __init squash_mem_tags(struct tag *tag)
  706. {
  707. for (; tag->hdr.size; tag = tag_next(tag))
  708. if (tag->hdr.tag == ATAG_MEM)
  709. tag->hdr.tag = ATAG_NONE;
  710. }
  711. static struct machine_desc * __init setup_machine_tags(unsigned int nr)
  712. {
  713. struct tag *tags = (struct tag *)&init_tags;
  714. struct machine_desc *mdesc = NULL, *p;
  715. char *from = default_command_line;
  716. init_tags.mem.start = PHYS_OFFSET;
  717. /*
  718. * locate machine in the list of supported machines.
  719. */
  720. for_each_machine_desc(p)
  721. if (nr == p->nr) {
  722. printk("Machine: %s\n", p->name);
  723. mdesc = p;
  724. break;
  725. }
  726. if (!mdesc) {
  727. early_print("\nError: unrecognized/unsupported machine ID"
  728. " (r1 = 0x%08x).\n\n", nr);
  729. dump_machine_table(); /* does not return */
  730. }
  731. if (__atags_pointer)
  732. tags = phys_to_virt(__atags_pointer);
  733. else if (mdesc->atag_offset)
  734. tags = (void *)(PAGE_OFFSET + mdesc->atag_offset);
  735. #if defined(CONFIG_DEPRECATED_PARAM_STRUCT)
  736. /*
  737. * If we have the old style parameters, convert them to
  738. * a tag list.
  739. */
  740. if (tags->hdr.tag != ATAG_CORE)
  741. convert_to_tag_list(tags);
  742. #endif
  743. if (tags->hdr.tag != ATAG_CORE) {
  744. #if defined(CONFIG_OF)
  745. /*
  746. * If CONFIG_OF is set, then assume this is a reasonably
  747. * modern system that should pass boot parameters
  748. */
  749. early_print("Warning: Neither atags nor dtb found\n");
  750. #endif
  751. tags = (struct tag *)&init_tags;
  752. }
  753. if (mdesc->fixup)
  754. mdesc->fixup(tags, &from, &meminfo);
  755. if (tags->hdr.tag == ATAG_CORE) {
  756. if (meminfo.nr_banks != 0)
  757. squash_mem_tags(tags);
  758. save_atags(tags);
  759. parse_tags(tags);
  760. }
  761. /* parse_early_param needs a boot_command_line */
  762. strlcpy(boot_command_line, from, COMMAND_LINE_SIZE);
  763. return mdesc;
  764. }
  765. void __init setup_arch(char **cmdline_p)
  766. {
  767. struct machine_desc *mdesc;
  768. unwind_init();
  769. setup_processor();
  770. mdesc = setup_machine_fdt(__atags_pointer);
  771. if (!mdesc)
  772. mdesc = setup_machine_tags(machine_arch_type);
  773. machine_desc = mdesc;
  774. machine_name = mdesc->name;
  775. if (mdesc->soft_reboot)
  776. reboot_setup("s");
  777. init_mm.start_code = (unsigned long) _text;
  778. init_mm.end_code = (unsigned long) _etext;
  779. init_mm.end_data = (unsigned long) _edata;
  780. init_mm.brk = (unsigned long) _end;
  781. /* populate cmd_line too for later use, preserving boot_command_line */
  782. strlcpy(cmd_line, boot_command_line, COMMAND_LINE_SIZE);
  783. *cmdline_p = cmd_line;
  784. parse_early_param();
  785. sanity_check_meminfo();
  786. arm_memblock_init(&meminfo, mdesc);
  787. paging_init(mdesc);
  788. request_standard_resources(mdesc);
  789. unflatten_device_tree();
  790. #ifdef CONFIG_SMP
  791. if (is_smp())
  792. smp_init_cpus();
  793. #endif
  794. reserve_crashkernel();
  795. tcm_init();
  796. #ifdef CONFIG_ZONE_DMA
  797. if (mdesc->dma_zone_size) {
  798. extern unsigned long arm_dma_zone_size;
  799. arm_dma_zone_size = mdesc->dma_zone_size;
  800. }
  801. #endif
  802. #ifdef CONFIG_MULTI_IRQ_HANDLER
  803. handle_arch_irq = mdesc->handle_irq;
  804. #endif
  805. #ifdef CONFIG_VT
  806. #if defined(CONFIG_VGA_CONSOLE)
  807. conswitchp = &vga_con;
  808. #elif defined(CONFIG_DUMMY_CONSOLE)
  809. conswitchp = &dummy_con;
  810. #endif
  811. #endif
  812. early_trap_init();
  813. if (mdesc->init_early)
  814. mdesc->init_early();
  815. }
  816. static int __init topology_init(void)
  817. {
  818. int cpu;
  819. for_each_possible_cpu(cpu) {
  820. struct cpuinfo_arm *cpuinfo = &per_cpu(cpu_data, cpu);
  821. cpuinfo->cpu.hotpluggable = 1;
  822. register_cpu(&cpuinfo->cpu, cpu);
  823. }
  824. return 0;
  825. }
  826. subsys_initcall(topology_init);
  827. #ifdef CONFIG_HAVE_PROC_CPU
  828. static int __init proc_cpu_init(void)
  829. {
  830. struct proc_dir_entry *res;
  831. res = proc_mkdir("cpu", NULL);
  832. if (!res)
  833. return -ENOMEM;
  834. return 0;
  835. }
  836. fs_initcall(proc_cpu_init);
  837. #endif
  838. static const char *hwcap_str[] = {
  839. "swp",
  840. "half",
  841. "thumb",
  842. "26bit",
  843. "fastmult",
  844. "fpa",
  845. "vfp",
  846. "edsp",
  847. "java",
  848. "iwmmxt",
  849. "crunch",
  850. "thumbee",
  851. "neon",
  852. "vfpv3",
  853. "vfpv3d16",
  854. "tls",
  855. "vfpv4",
  856. "idiva",
  857. "idivt",
  858. NULL
  859. };
  860. static int c_show(struct seq_file *m, void *v)
  861. {
  862. int i;
  863. seq_printf(m, "Processor\t: %s rev %d (%s)\n",
  864. cpu_name, read_cpuid_id() & 15, elf_platform);
  865. #if defined(CONFIG_SMP)
  866. for_each_online_cpu(i) {
  867. /*
  868. * glibc reads /proc/cpuinfo to determine the number of
  869. * online processors, looking for lines beginning with
  870. * "processor". Give glibc what it expects.
  871. */
  872. seq_printf(m, "processor\t: %d\n", i);
  873. seq_printf(m, "BogoMIPS\t: %lu.%02lu\n\n",
  874. per_cpu(cpu_data, i).loops_per_jiffy / (500000UL/HZ),
  875. (per_cpu(cpu_data, i).loops_per_jiffy / (5000UL/HZ)) % 100);
  876. }
  877. #else /* CONFIG_SMP */
  878. seq_printf(m, "BogoMIPS\t: %lu.%02lu\n",
  879. loops_per_jiffy / (500000/HZ),
  880. (loops_per_jiffy / (5000/HZ)) % 100);
  881. #endif
  882. /* dump out the processor features */
  883. seq_puts(m, "Features\t: ");
  884. for (i = 0; hwcap_str[i]; i++)
  885. if (elf_hwcap & (1 << i))
  886. seq_printf(m, "%s ", hwcap_str[i]);
  887. seq_printf(m, "\nCPU implementer\t: 0x%02x\n", read_cpuid_id() >> 24);
  888. seq_printf(m, "CPU architecture: %s\n", proc_arch[cpu_architecture()]);
  889. if ((read_cpuid_id() & 0x0008f000) == 0x00000000) {
  890. /* pre-ARM7 */
  891. seq_printf(m, "CPU part\t: %07x\n", read_cpuid_id() >> 4);
  892. } else {
  893. if ((read_cpuid_id() & 0x0008f000) == 0x00007000) {
  894. /* ARM7 */
  895. seq_printf(m, "CPU variant\t: 0x%02x\n",
  896. (read_cpuid_id() >> 16) & 127);
  897. } else {
  898. /* post-ARM7 */
  899. seq_printf(m, "CPU variant\t: 0x%x\n",
  900. (read_cpuid_id() >> 20) & 15);
  901. }
  902. seq_printf(m, "CPU part\t: 0x%03x\n",
  903. (read_cpuid_id() >> 4) & 0xfff);
  904. }
  905. seq_printf(m, "CPU revision\t: %d\n", read_cpuid_id() & 15);
  906. seq_puts(m, "\n");
  907. seq_printf(m, "Hardware\t: %s\n", machine_name);
  908. seq_printf(m, "Revision\t: %04x\n", system_rev);
  909. seq_printf(m, "Serial\t\t: %08x%08x\n",
  910. system_serial_high, system_serial_low);
  911. return 0;
  912. }
  913. static void *c_start(struct seq_file *m, loff_t *pos)
  914. {
  915. return *pos < 1 ? (void *)1 : NULL;
  916. }
  917. static void *c_next(struct seq_file *m, void *v, loff_t *pos)
  918. {
  919. ++*pos;
  920. return NULL;
  921. }
  922. static void c_stop(struct seq_file *m, void *v)
  923. {
  924. }
  925. const struct seq_operations cpuinfo_op = {
  926. .start = c_start,
  927. .next = c_next,
  928. .stop = c_stop,
  929. .show = c_show
  930. };