ad1848_lib.c 38 KB

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  1. /*
  2. * Copyright (c) by Jaroslav Kysela <perex@suse.cz>
  3. * Routines for control of AD1848/AD1847/CS4248
  4. *
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  19. *
  20. */
  21. #define SNDRV_MAIN_OBJECT_FILE
  22. #include <sound/driver.h>
  23. #include <linux/delay.h>
  24. #include <linux/init.h>
  25. #include <linux/interrupt.h>
  26. #include <linux/slab.h>
  27. #include <linux/ioport.h>
  28. #include <sound/core.h>
  29. #include <sound/ad1848.h>
  30. #include <sound/control.h>
  31. #include <sound/tlv.h>
  32. #include <sound/pcm_params.h>
  33. #include <asm/io.h>
  34. #include <asm/dma.h>
  35. MODULE_AUTHOR("Jaroslav Kysela <perex@suse.cz>");
  36. MODULE_DESCRIPTION("Routines for control of AD1848/AD1847/CS4248");
  37. MODULE_LICENSE("GPL");
  38. #if 0
  39. #define SNDRV_DEBUG_MCE
  40. #endif
  41. /*
  42. * Some variables
  43. */
  44. static unsigned char freq_bits[14] = {
  45. /* 5510 */ 0x00 | AD1848_XTAL2,
  46. /* 6620 */ 0x0E | AD1848_XTAL2,
  47. /* 8000 */ 0x00 | AD1848_XTAL1,
  48. /* 9600 */ 0x0E | AD1848_XTAL1,
  49. /* 11025 */ 0x02 | AD1848_XTAL2,
  50. /* 16000 */ 0x02 | AD1848_XTAL1,
  51. /* 18900 */ 0x04 | AD1848_XTAL2,
  52. /* 22050 */ 0x06 | AD1848_XTAL2,
  53. /* 27042 */ 0x04 | AD1848_XTAL1,
  54. /* 32000 */ 0x06 | AD1848_XTAL1,
  55. /* 33075 */ 0x0C | AD1848_XTAL2,
  56. /* 37800 */ 0x08 | AD1848_XTAL2,
  57. /* 44100 */ 0x0A | AD1848_XTAL2,
  58. /* 48000 */ 0x0C | AD1848_XTAL1
  59. };
  60. static unsigned int rates[14] = {
  61. 5510, 6620, 8000, 9600, 11025, 16000, 18900, 22050,
  62. 27042, 32000, 33075, 37800, 44100, 48000
  63. };
  64. static struct snd_pcm_hw_constraint_list hw_constraints_rates = {
  65. .count = ARRAY_SIZE(rates),
  66. .list = rates,
  67. .mask = 0,
  68. };
  69. static unsigned char snd_ad1848_original_image[16] =
  70. {
  71. 0x00, /* 00 - lic */
  72. 0x00, /* 01 - ric */
  73. 0x9f, /* 02 - la1ic */
  74. 0x9f, /* 03 - ra1ic */
  75. 0x9f, /* 04 - la2ic */
  76. 0x9f, /* 05 - ra2ic */
  77. 0xbf, /* 06 - loc */
  78. 0xbf, /* 07 - roc */
  79. 0x20, /* 08 - dfr */
  80. AD1848_AUTOCALIB, /* 09 - ic */
  81. 0x00, /* 0a - pc */
  82. 0x00, /* 0b - ti */
  83. 0x00, /* 0c - mi */
  84. 0x00, /* 0d - lbc */
  85. 0x00, /* 0e - dru */
  86. 0x00, /* 0f - drl */
  87. };
  88. /*
  89. * Basic I/O functions
  90. */
  91. static void snd_ad1848_wait(struct snd_ad1848 *chip)
  92. {
  93. int timeout;
  94. for (timeout = 250; timeout > 0; timeout--) {
  95. if ((inb(AD1848P(chip, REGSEL)) & AD1848_INIT) == 0)
  96. break;
  97. udelay(100);
  98. }
  99. }
  100. void snd_ad1848_out(struct snd_ad1848 *chip,
  101. unsigned char reg,
  102. unsigned char value)
  103. {
  104. snd_ad1848_wait(chip);
  105. #ifdef CONFIG_SND_DEBUG
  106. if (inb(AD1848P(chip, REGSEL)) & AD1848_INIT)
  107. snd_printk(KERN_WARNING "auto calibration time out - "
  108. "reg = 0x%x, value = 0x%x\n", reg, value);
  109. #endif
  110. outb(chip->mce_bit | reg, AD1848P(chip, REGSEL));
  111. outb(chip->image[reg] = value, AD1848P(chip, REG));
  112. mb();
  113. snd_printdd("codec out - reg 0x%x = 0x%x\n",
  114. chip->mce_bit | reg, value);
  115. }
  116. EXPORT_SYMBOL(snd_ad1848_out);
  117. static void snd_ad1848_dout(struct snd_ad1848 *chip,
  118. unsigned char reg, unsigned char value)
  119. {
  120. snd_ad1848_wait(chip);
  121. outb(chip->mce_bit | reg, AD1848P(chip, REGSEL));
  122. outb(value, AD1848P(chip, REG));
  123. mb();
  124. }
  125. static unsigned char snd_ad1848_in(struct snd_ad1848 *chip, unsigned char reg)
  126. {
  127. snd_ad1848_wait(chip);
  128. #ifdef CONFIG_SND_DEBUG
  129. if (inb(AD1848P(chip, REGSEL)) & AD1848_INIT)
  130. snd_printk(KERN_WARNING "auto calibration time out - "
  131. "reg = 0x%x\n", reg);
  132. #endif
  133. outb(chip->mce_bit | reg, AD1848P(chip, REGSEL));
  134. mb();
  135. return inb(AD1848P(chip, REG));
  136. }
  137. #if 0
  138. static void snd_ad1848_debug(struct snd_ad1848 *chip)
  139. {
  140. printk("AD1848 REGS: INDEX = 0x%02x ", inb(AD1848P(chip, REGSEL)));
  141. printk(" STATUS = 0x%02x\n", inb(AD1848P(chip, STATUS)));
  142. printk(" 0x00: left input = 0x%02x ", snd_ad1848_in(chip, 0x00));
  143. printk(" 0x08: playback format = 0x%02x\n", snd_ad1848_in(chip, 0x08));
  144. printk(" 0x01: right input = 0x%02x ", snd_ad1848_in(chip, 0x01));
  145. printk(" 0x09: iface (CFIG 1) = 0x%02x\n", snd_ad1848_in(chip, 0x09));
  146. printk(" 0x02: AUXA left = 0x%02x ", snd_ad1848_in(chip, 0x02));
  147. printk(" 0x0a: pin control = 0x%02x\n", snd_ad1848_in(chip, 0x0a));
  148. printk(" 0x03: AUXA right = 0x%02x ", snd_ad1848_in(chip, 0x03));
  149. printk(" 0x0b: init & status = 0x%02x\n", snd_ad1848_in(chip, 0x0b));
  150. printk(" 0x04: AUXB left = 0x%02x ", snd_ad1848_in(chip, 0x04));
  151. printk(" 0x0c: revision & mode = 0x%02x\n", snd_ad1848_in(chip, 0x0c));
  152. printk(" 0x05: AUXB right = 0x%02x ", snd_ad1848_in(chip, 0x05));
  153. printk(" 0x0d: loopback = 0x%02x\n", snd_ad1848_in(chip, 0x0d));
  154. printk(" 0x06: left output = 0x%02x ", snd_ad1848_in(chip, 0x06));
  155. printk(" 0x0e: data upr count = 0x%02x\n", snd_ad1848_in(chip, 0x0e));
  156. printk(" 0x07: right output = 0x%02x ", snd_ad1848_in(chip, 0x07));
  157. printk(" 0x0f: data lwr count = 0x%02x\n", snd_ad1848_in(chip, 0x0f));
  158. }
  159. #endif
  160. /*
  161. * AD1848 detection / MCE routines
  162. */
  163. static void snd_ad1848_mce_up(struct snd_ad1848 *chip)
  164. {
  165. unsigned long flags;
  166. int timeout;
  167. snd_ad1848_wait(chip);
  168. #ifdef CONFIG_SND_DEBUG
  169. if (inb(AD1848P(chip, REGSEL)) & AD1848_INIT)
  170. snd_printk(KERN_WARNING "mce_up - auto calibration time out (0)\n");
  171. #endif
  172. spin_lock_irqsave(&chip->reg_lock, flags);
  173. chip->mce_bit |= AD1848_MCE;
  174. timeout = inb(AD1848P(chip, REGSEL));
  175. if (timeout == 0x80)
  176. snd_printk(KERN_WARNING "mce_up [0x%lx]: serious init problem - codec still busy\n", chip->port);
  177. if (!(timeout & AD1848_MCE))
  178. outb(chip->mce_bit | (timeout & 0x1f), AD1848P(chip, REGSEL));
  179. spin_unlock_irqrestore(&chip->reg_lock, flags);
  180. }
  181. static void snd_ad1848_mce_down(struct snd_ad1848 *chip)
  182. {
  183. unsigned long flags;
  184. int timeout;
  185. unsigned long end_time;
  186. spin_lock_irqsave(&chip->reg_lock, flags);
  187. for (timeout = 5; timeout > 0; timeout--)
  188. inb(AD1848P(chip, REGSEL));
  189. /* end of cleanup sequence */
  190. for (timeout = 12000; timeout > 0 && (inb(AD1848P(chip, REGSEL)) & AD1848_INIT); timeout--)
  191. udelay(100);
  192. snd_printdd("(1) timeout = %d\n", timeout);
  193. #ifdef CONFIG_SND_DEBUG
  194. if (inb(AD1848P(chip, REGSEL)) & AD1848_INIT)
  195. snd_printk(KERN_WARNING "mce_down [0x%lx] - auto calibration time out (0)\n", AD1848P(chip, REGSEL));
  196. #endif
  197. chip->mce_bit &= ~AD1848_MCE;
  198. timeout = inb(AD1848P(chip, REGSEL));
  199. outb(chip->mce_bit | (timeout & 0x1f), AD1848P(chip, REGSEL));
  200. if (timeout == 0x80)
  201. snd_printk(KERN_WARNING "mce_down [0x%lx]: serious init problem - codec still busy\n", chip->port);
  202. if ((timeout & AD1848_MCE) == 0) {
  203. spin_unlock_irqrestore(&chip->reg_lock, flags);
  204. return;
  205. }
  206. /*
  207. * Wait for (possible -- during init auto-calibration may not be set)
  208. * calibration process to start. Needs upto 5 sample periods on AD1848
  209. * which at the slowest possible rate of 5.5125 kHz means 907 us.
  210. */
  211. spin_unlock_irqrestore(&chip->reg_lock, flags);
  212. msleep(1);
  213. spin_lock_irqsave(&chip->reg_lock, flags);
  214. snd_printdd("(2) jiffies = %lu\n", jiffies);
  215. end_time = jiffies + msecs_to_jiffies(250);
  216. while (snd_ad1848_in(chip, AD1848_TEST_INIT) & AD1848_CALIB_IN_PROGRESS) {
  217. spin_unlock_irqrestore(&chip->reg_lock, flags);
  218. if (time_after(jiffies, end_time)) {
  219. snd_printk(KERN_ERR "mce_down - auto calibration time out (2)\n");
  220. return;
  221. }
  222. msleep(1);
  223. spin_lock_irqsave(&chip->reg_lock, flags);
  224. }
  225. snd_printdd("(3) jiffies = %lu\n", jiffies);
  226. end_time = jiffies + msecs_to_jiffies(100);
  227. while (inb(AD1848P(chip, REGSEL)) & AD1848_INIT) {
  228. spin_unlock_irqrestore(&chip->reg_lock, flags);
  229. if (time_after(jiffies, end_time)) {
  230. snd_printk(KERN_ERR "mce_down - auto calibration time out (3)\n");
  231. return;
  232. }
  233. msleep(1);
  234. spin_lock_irqsave(&chip->reg_lock, flags);
  235. }
  236. spin_unlock_irqrestore(&chip->reg_lock, flags);
  237. snd_printdd("(4) jiffies = %lu\n", jiffies);
  238. snd_printd("mce_down - exit = 0x%x\n", inb(AD1848P(chip, REGSEL)));
  239. }
  240. static unsigned int snd_ad1848_get_count(unsigned char format,
  241. unsigned int size)
  242. {
  243. switch (format & 0xe0) {
  244. case AD1848_LINEAR_16:
  245. size >>= 1;
  246. break;
  247. }
  248. if (format & AD1848_STEREO)
  249. size >>= 1;
  250. return size;
  251. }
  252. static int snd_ad1848_trigger(struct snd_ad1848 *chip, unsigned char what,
  253. int channel, int cmd)
  254. {
  255. int result = 0;
  256. #if 0
  257. printk("codec trigger!!! - what = %i, enable = %i, status = 0x%x\n", what, enable, inb(AD1848P(card, STATUS)));
  258. #endif
  259. spin_lock(&chip->reg_lock);
  260. if (cmd == SNDRV_PCM_TRIGGER_START) {
  261. if (chip->image[AD1848_IFACE_CTRL] & what) {
  262. spin_unlock(&chip->reg_lock);
  263. return 0;
  264. }
  265. snd_ad1848_out(chip, AD1848_IFACE_CTRL, chip->image[AD1848_IFACE_CTRL] |= what);
  266. chip->mode |= AD1848_MODE_RUNNING;
  267. } else if (cmd == SNDRV_PCM_TRIGGER_STOP) {
  268. if (!(chip->image[AD1848_IFACE_CTRL] & what)) {
  269. spin_unlock(&chip->reg_lock);
  270. return 0;
  271. }
  272. snd_ad1848_out(chip, AD1848_IFACE_CTRL, chip->image[AD1848_IFACE_CTRL] &= ~what);
  273. chip->mode &= ~AD1848_MODE_RUNNING;
  274. } else {
  275. result = -EINVAL;
  276. }
  277. spin_unlock(&chip->reg_lock);
  278. return result;
  279. }
  280. /*
  281. * CODEC I/O
  282. */
  283. static unsigned char snd_ad1848_get_rate(unsigned int rate)
  284. {
  285. int i;
  286. for (i = 0; i < ARRAY_SIZE(rates); i++)
  287. if (rate == rates[i])
  288. return freq_bits[i];
  289. snd_BUG();
  290. return freq_bits[ARRAY_SIZE(rates) - 1];
  291. }
  292. static int snd_ad1848_ioctl(struct snd_pcm_substream *substream,
  293. unsigned int cmd, void *arg)
  294. {
  295. return snd_pcm_lib_ioctl(substream, cmd, arg);
  296. }
  297. static unsigned char snd_ad1848_get_format(int format, int channels)
  298. {
  299. unsigned char rformat;
  300. rformat = AD1848_LINEAR_8;
  301. switch (format) {
  302. case SNDRV_PCM_FORMAT_A_LAW: rformat = AD1848_ALAW_8; break;
  303. case SNDRV_PCM_FORMAT_MU_LAW: rformat = AD1848_ULAW_8; break;
  304. case SNDRV_PCM_FORMAT_S16_LE: rformat = AD1848_LINEAR_16; break;
  305. }
  306. if (channels > 1)
  307. rformat |= AD1848_STEREO;
  308. #if 0
  309. snd_printk("get_format: 0x%x (mode=0x%x)\n", format, mode);
  310. #endif
  311. return rformat;
  312. }
  313. static void snd_ad1848_calibrate_mute(struct snd_ad1848 *chip, int mute)
  314. {
  315. unsigned long flags;
  316. mute = mute ? 1 : 0;
  317. spin_lock_irqsave(&chip->reg_lock, flags);
  318. if (chip->calibrate_mute == mute) {
  319. spin_unlock_irqrestore(&chip->reg_lock, flags);
  320. return;
  321. }
  322. if (!mute) {
  323. snd_ad1848_dout(chip, AD1848_LEFT_INPUT, chip->image[AD1848_LEFT_INPUT]);
  324. snd_ad1848_dout(chip, AD1848_RIGHT_INPUT, chip->image[AD1848_RIGHT_INPUT]);
  325. }
  326. snd_ad1848_dout(chip, AD1848_AUX1_LEFT_INPUT, mute ? 0x80 : chip->image[AD1848_AUX1_LEFT_INPUT]);
  327. snd_ad1848_dout(chip, AD1848_AUX1_RIGHT_INPUT, mute ? 0x80 : chip->image[AD1848_AUX1_RIGHT_INPUT]);
  328. snd_ad1848_dout(chip, AD1848_AUX2_LEFT_INPUT, mute ? 0x80 : chip->image[AD1848_AUX2_LEFT_INPUT]);
  329. snd_ad1848_dout(chip, AD1848_AUX2_RIGHT_INPUT, mute ? 0x80 : chip->image[AD1848_AUX2_RIGHT_INPUT]);
  330. snd_ad1848_dout(chip, AD1848_LEFT_OUTPUT, mute ? 0x80 : chip->image[AD1848_LEFT_OUTPUT]);
  331. snd_ad1848_dout(chip, AD1848_RIGHT_OUTPUT, mute ? 0x80 : chip->image[AD1848_RIGHT_OUTPUT]);
  332. chip->calibrate_mute = mute;
  333. spin_unlock_irqrestore(&chip->reg_lock, flags);
  334. }
  335. static void snd_ad1848_set_data_format(struct snd_ad1848 *chip, struct snd_pcm_hw_params *hw_params)
  336. {
  337. if (hw_params == NULL) {
  338. chip->image[AD1848_DATA_FORMAT] = 0x20;
  339. } else {
  340. chip->image[AD1848_DATA_FORMAT] =
  341. snd_ad1848_get_format(params_format(hw_params), params_channels(hw_params)) |
  342. snd_ad1848_get_rate(params_rate(hw_params));
  343. }
  344. // snd_printk(">>> pmode = 0x%x, dfr = 0x%x\n", pstr->mode, chip->image[AD1848_DATA_FORMAT]);
  345. }
  346. static int snd_ad1848_open(struct snd_ad1848 *chip, unsigned int mode)
  347. {
  348. unsigned long flags;
  349. mutex_lock(&chip->open_mutex);
  350. if (chip->mode & AD1848_MODE_OPEN) {
  351. mutex_unlock(&chip->open_mutex);
  352. return -EAGAIN;
  353. }
  354. snd_ad1848_mce_down(chip);
  355. #ifdef SNDRV_DEBUG_MCE
  356. snd_printk("open: (1)\n");
  357. #endif
  358. snd_ad1848_mce_up(chip);
  359. spin_lock_irqsave(&chip->reg_lock, flags);
  360. chip->image[AD1848_IFACE_CTRL] &= ~(AD1848_PLAYBACK_ENABLE | AD1848_PLAYBACK_PIO |
  361. AD1848_CAPTURE_ENABLE | AD1848_CAPTURE_PIO |
  362. AD1848_CALIB_MODE);
  363. chip->image[AD1848_IFACE_CTRL] |= AD1848_AUTOCALIB;
  364. snd_ad1848_out(chip, AD1848_IFACE_CTRL, chip->image[AD1848_IFACE_CTRL]);
  365. spin_unlock_irqrestore(&chip->reg_lock, flags);
  366. snd_ad1848_mce_down(chip);
  367. #ifdef SNDRV_DEBUG_MCE
  368. snd_printk("open: (2)\n");
  369. #endif
  370. snd_ad1848_set_data_format(chip, NULL);
  371. snd_ad1848_mce_up(chip);
  372. spin_lock_irqsave(&chip->reg_lock, flags);
  373. snd_ad1848_out(chip, AD1848_DATA_FORMAT, chip->image[AD1848_DATA_FORMAT]);
  374. spin_unlock_irqrestore(&chip->reg_lock, flags);
  375. snd_ad1848_mce_down(chip);
  376. #ifdef SNDRV_DEBUG_MCE
  377. snd_printk("open: (3)\n");
  378. #endif
  379. /* ok. now enable and ack CODEC IRQ */
  380. spin_lock_irqsave(&chip->reg_lock, flags);
  381. outb(0, AD1848P(chip, STATUS)); /* clear IRQ */
  382. outb(0, AD1848P(chip, STATUS)); /* clear IRQ */
  383. chip->image[AD1848_PIN_CTRL] |= AD1848_IRQ_ENABLE;
  384. snd_ad1848_out(chip, AD1848_PIN_CTRL, chip->image[AD1848_PIN_CTRL]);
  385. spin_unlock_irqrestore(&chip->reg_lock, flags);
  386. chip->mode = mode;
  387. mutex_unlock(&chip->open_mutex);
  388. return 0;
  389. }
  390. static void snd_ad1848_close(struct snd_ad1848 *chip)
  391. {
  392. unsigned long flags;
  393. mutex_lock(&chip->open_mutex);
  394. if (!chip->mode) {
  395. mutex_unlock(&chip->open_mutex);
  396. return;
  397. }
  398. /* disable IRQ */
  399. spin_lock_irqsave(&chip->reg_lock, flags);
  400. outb(0, AD1848P(chip, STATUS)); /* clear IRQ */
  401. outb(0, AD1848P(chip, STATUS)); /* clear IRQ */
  402. chip->image[AD1848_PIN_CTRL] &= ~AD1848_IRQ_ENABLE;
  403. snd_ad1848_out(chip, AD1848_PIN_CTRL, chip->image[AD1848_PIN_CTRL]);
  404. spin_unlock_irqrestore(&chip->reg_lock, flags);
  405. /* now disable capture & playback */
  406. snd_ad1848_mce_up(chip);
  407. spin_lock_irqsave(&chip->reg_lock, flags);
  408. chip->image[AD1848_IFACE_CTRL] &= ~(AD1848_PLAYBACK_ENABLE | AD1848_PLAYBACK_PIO |
  409. AD1848_CAPTURE_ENABLE | AD1848_CAPTURE_PIO);
  410. snd_ad1848_out(chip, AD1848_IFACE_CTRL, chip->image[AD1848_IFACE_CTRL]);
  411. spin_unlock_irqrestore(&chip->reg_lock, flags);
  412. snd_ad1848_mce_down(chip);
  413. /* clear IRQ again */
  414. spin_lock_irqsave(&chip->reg_lock, flags);
  415. outb(0, AD1848P(chip, STATUS)); /* clear IRQ */
  416. outb(0, AD1848P(chip, STATUS)); /* clear IRQ */
  417. spin_unlock_irqrestore(&chip->reg_lock, flags);
  418. chip->mode = 0;
  419. mutex_unlock(&chip->open_mutex);
  420. }
  421. /*
  422. * ok.. exported functions..
  423. */
  424. static int snd_ad1848_playback_trigger(struct snd_pcm_substream *substream,
  425. int cmd)
  426. {
  427. struct snd_ad1848 *chip = snd_pcm_substream_chip(substream);
  428. return snd_ad1848_trigger(chip, AD1848_PLAYBACK_ENABLE, SNDRV_PCM_STREAM_PLAYBACK, cmd);
  429. }
  430. static int snd_ad1848_capture_trigger(struct snd_pcm_substream *substream,
  431. int cmd)
  432. {
  433. struct snd_ad1848 *chip = snd_pcm_substream_chip(substream);
  434. return snd_ad1848_trigger(chip, AD1848_CAPTURE_ENABLE, SNDRV_PCM_STREAM_CAPTURE, cmd);
  435. }
  436. static int snd_ad1848_playback_hw_params(struct snd_pcm_substream *substream,
  437. struct snd_pcm_hw_params *hw_params)
  438. {
  439. struct snd_ad1848 *chip = snd_pcm_substream_chip(substream);
  440. unsigned long flags;
  441. int err;
  442. if ((err = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params))) < 0)
  443. return err;
  444. snd_ad1848_calibrate_mute(chip, 1);
  445. snd_ad1848_set_data_format(chip, hw_params);
  446. snd_ad1848_mce_up(chip);
  447. spin_lock_irqsave(&chip->reg_lock, flags);
  448. snd_ad1848_out(chip, AD1848_DATA_FORMAT, chip->image[AD1848_DATA_FORMAT]);
  449. spin_unlock_irqrestore(&chip->reg_lock, flags);
  450. snd_ad1848_mce_down(chip);
  451. snd_ad1848_calibrate_mute(chip, 0);
  452. return 0;
  453. }
  454. static int snd_ad1848_playback_hw_free(struct snd_pcm_substream *substream)
  455. {
  456. return snd_pcm_lib_free_pages(substream);
  457. }
  458. static int snd_ad1848_playback_prepare(struct snd_pcm_substream *substream)
  459. {
  460. struct snd_ad1848 *chip = snd_pcm_substream_chip(substream);
  461. struct snd_pcm_runtime *runtime = substream->runtime;
  462. unsigned long flags;
  463. unsigned int size = snd_pcm_lib_buffer_bytes(substream);
  464. unsigned int count = snd_pcm_lib_period_bytes(substream);
  465. chip->dma_size = size;
  466. chip->image[AD1848_IFACE_CTRL] &= ~(AD1848_PLAYBACK_ENABLE | AD1848_PLAYBACK_PIO);
  467. snd_dma_program(chip->dma, runtime->dma_addr, size, DMA_MODE_WRITE | DMA_AUTOINIT);
  468. count = snd_ad1848_get_count(chip->image[AD1848_DATA_FORMAT], count) - 1;
  469. spin_lock_irqsave(&chip->reg_lock, flags);
  470. snd_ad1848_out(chip, AD1848_DATA_LWR_CNT, (unsigned char) count);
  471. snd_ad1848_out(chip, AD1848_DATA_UPR_CNT, (unsigned char) (count >> 8));
  472. spin_unlock_irqrestore(&chip->reg_lock, flags);
  473. return 0;
  474. }
  475. static int snd_ad1848_capture_hw_params(struct snd_pcm_substream *substream,
  476. struct snd_pcm_hw_params *hw_params)
  477. {
  478. struct snd_ad1848 *chip = snd_pcm_substream_chip(substream);
  479. unsigned long flags;
  480. int err;
  481. if ((err = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params))) < 0)
  482. return err;
  483. snd_ad1848_calibrate_mute(chip, 1);
  484. snd_ad1848_set_data_format(chip, hw_params);
  485. snd_ad1848_mce_up(chip);
  486. spin_lock_irqsave(&chip->reg_lock, flags);
  487. snd_ad1848_out(chip, AD1848_DATA_FORMAT, chip->image[AD1848_DATA_FORMAT]);
  488. spin_unlock_irqrestore(&chip->reg_lock, flags);
  489. snd_ad1848_mce_down(chip);
  490. snd_ad1848_calibrate_mute(chip, 0);
  491. return 0;
  492. }
  493. static int snd_ad1848_capture_hw_free(struct snd_pcm_substream *substream)
  494. {
  495. return snd_pcm_lib_free_pages(substream);
  496. }
  497. static int snd_ad1848_capture_prepare(struct snd_pcm_substream *substream)
  498. {
  499. struct snd_ad1848 *chip = snd_pcm_substream_chip(substream);
  500. struct snd_pcm_runtime *runtime = substream->runtime;
  501. unsigned long flags;
  502. unsigned int size = snd_pcm_lib_buffer_bytes(substream);
  503. unsigned int count = snd_pcm_lib_period_bytes(substream);
  504. chip->dma_size = size;
  505. chip->image[AD1848_IFACE_CTRL] &= ~(AD1848_CAPTURE_ENABLE | AD1848_CAPTURE_PIO);
  506. snd_dma_program(chip->dma, runtime->dma_addr, size, DMA_MODE_READ | DMA_AUTOINIT);
  507. count = snd_ad1848_get_count(chip->image[AD1848_DATA_FORMAT], count) - 1;
  508. spin_lock_irqsave(&chip->reg_lock, flags);
  509. snd_ad1848_out(chip, AD1848_DATA_LWR_CNT, (unsigned char) count);
  510. snd_ad1848_out(chip, AD1848_DATA_UPR_CNT, (unsigned char) (count >> 8));
  511. spin_unlock_irqrestore(&chip->reg_lock, flags);
  512. return 0;
  513. }
  514. static irqreturn_t snd_ad1848_interrupt(int irq, void *dev_id)
  515. {
  516. struct snd_ad1848 *chip = dev_id;
  517. if ((chip->mode & AD1848_MODE_PLAY) && chip->playback_substream &&
  518. (chip->mode & AD1848_MODE_RUNNING))
  519. snd_pcm_period_elapsed(chip->playback_substream);
  520. if ((chip->mode & AD1848_MODE_CAPTURE) && chip->capture_substream &&
  521. (chip->mode & AD1848_MODE_RUNNING))
  522. snd_pcm_period_elapsed(chip->capture_substream);
  523. outb(0, AD1848P(chip, STATUS)); /* clear global interrupt bit */
  524. return IRQ_HANDLED;
  525. }
  526. static snd_pcm_uframes_t snd_ad1848_playback_pointer(struct snd_pcm_substream *substream)
  527. {
  528. struct snd_ad1848 *chip = snd_pcm_substream_chip(substream);
  529. size_t ptr;
  530. if (!(chip->image[AD1848_IFACE_CTRL] & AD1848_PLAYBACK_ENABLE))
  531. return 0;
  532. ptr = snd_dma_pointer(chip->dma, chip->dma_size);
  533. return bytes_to_frames(substream->runtime, ptr);
  534. }
  535. static snd_pcm_uframes_t snd_ad1848_capture_pointer(struct snd_pcm_substream *substream)
  536. {
  537. struct snd_ad1848 *chip = snd_pcm_substream_chip(substream);
  538. size_t ptr;
  539. if (!(chip->image[AD1848_IFACE_CTRL] & AD1848_CAPTURE_ENABLE))
  540. return 0;
  541. ptr = snd_dma_pointer(chip->dma, chip->dma_size);
  542. return bytes_to_frames(substream->runtime, ptr);
  543. }
  544. /*
  545. */
  546. static void snd_ad1848_thinkpad_twiddle(struct snd_ad1848 *chip, int on) {
  547. int tmp;
  548. if (!chip->thinkpad_flag) return;
  549. outb(0x1c, AD1848_THINKPAD_CTL_PORT1);
  550. tmp = inb(AD1848_THINKPAD_CTL_PORT2);
  551. if (on)
  552. /* turn it on */
  553. tmp |= AD1848_THINKPAD_CS4248_ENABLE_BIT;
  554. else
  555. /* turn it off */
  556. tmp &= ~AD1848_THINKPAD_CS4248_ENABLE_BIT;
  557. outb(tmp, AD1848_THINKPAD_CTL_PORT2);
  558. }
  559. #ifdef CONFIG_PM
  560. static void snd_ad1848_suspend(struct snd_ad1848 *chip)
  561. {
  562. snd_pcm_suspend_all(chip->pcm);
  563. if (chip->thinkpad_flag)
  564. snd_ad1848_thinkpad_twiddle(chip, 0);
  565. }
  566. static void snd_ad1848_resume(struct snd_ad1848 *chip)
  567. {
  568. int i;
  569. if (chip->thinkpad_flag)
  570. snd_ad1848_thinkpad_twiddle(chip, 1);
  571. /* clear any pendings IRQ */
  572. inb(AD1848P(chip, STATUS));
  573. outb(0, AD1848P(chip, STATUS));
  574. mb();
  575. snd_ad1848_mce_down(chip);
  576. for (i = 0; i < 16; i++)
  577. snd_ad1848_out(chip, i, chip->image[i]);
  578. snd_ad1848_mce_up(chip);
  579. snd_ad1848_mce_down(chip);
  580. }
  581. #endif /* CONFIG_PM */
  582. static int snd_ad1848_probe(struct snd_ad1848 * chip)
  583. {
  584. unsigned long flags;
  585. int i, id, rev, ad1847;
  586. unsigned char *ptr;
  587. #if 0
  588. snd_ad1848_debug(chip);
  589. #endif
  590. id = ad1847 = 0;
  591. for (i = 0; i < 1000; i++) {
  592. mb();
  593. if (inb(AD1848P(chip, REGSEL)) & AD1848_INIT)
  594. udelay(500);
  595. else {
  596. spin_lock_irqsave(&chip->reg_lock, flags);
  597. snd_ad1848_out(chip, AD1848_MISC_INFO, 0x00);
  598. snd_ad1848_out(chip, AD1848_LEFT_INPUT, 0xaa);
  599. snd_ad1848_out(chip, AD1848_RIGHT_INPUT, 0x45);
  600. rev = snd_ad1848_in(chip, AD1848_RIGHT_INPUT);
  601. if (rev == 0x65) {
  602. spin_unlock_irqrestore(&chip->reg_lock, flags);
  603. id = 1;
  604. ad1847 = 1;
  605. break;
  606. }
  607. if (snd_ad1848_in(chip, AD1848_LEFT_INPUT) == 0xaa && rev == 0x45) {
  608. spin_unlock_irqrestore(&chip->reg_lock, flags);
  609. id = 1;
  610. break;
  611. }
  612. spin_unlock_irqrestore(&chip->reg_lock, flags);
  613. }
  614. }
  615. if (id != 1)
  616. return -ENODEV; /* no valid device found */
  617. if (chip->hardware == AD1848_HW_DETECT) {
  618. if (ad1847) {
  619. chip->hardware = AD1848_HW_AD1847;
  620. } else {
  621. chip->hardware = AD1848_HW_AD1848;
  622. rev = snd_ad1848_in(chip, AD1848_MISC_INFO);
  623. if (rev & 0x80) {
  624. chip->hardware = AD1848_HW_CS4248;
  625. } else if ((rev & 0x0f) == 0x0a) {
  626. snd_ad1848_out(chip, AD1848_MISC_INFO, 0x40);
  627. for (i = 0; i < 16; ++i) {
  628. if (snd_ad1848_in(chip, i) != snd_ad1848_in(chip, i + 16)) {
  629. chip->hardware = AD1848_HW_CMI8330;
  630. break;
  631. }
  632. }
  633. snd_ad1848_out(chip, AD1848_MISC_INFO, 0x00);
  634. }
  635. }
  636. }
  637. spin_lock_irqsave(&chip->reg_lock, flags);
  638. inb(AD1848P(chip, STATUS)); /* clear any pendings IRQ */
  639. outb(0, AD1848P(chip, STATUS));
  640. mb();
  641. spin_unlock_irqrestore(&chip->reg_lock, flags);
  642. chip->image[AD1848_MISC_INFO] = 0x00;
  643. chip->image[AD1848_IFACE_CTRL] =
  644. (chip->image[AD1848_IFACE_CTRL] & ~AD1848_SINGLE_DMA) | AD1848_SINGLE_DMA;
  645. ptr = (unsigned char *) &chip->image;
  646. snd_ad1848_mce_down(chip);
  647. spin_lock_irqsave(&chip->reg_lock, flags);
  648. for (i = 0; i < 16; i++) /* ok.. fill all AD1848 registers */
  649. snd_ad1848_out(chip, i, *ptr++);
  650. spin_unlock_irqrestore(&chip->reg_lock, flags);
  651. snd_ad1848_mce_up(chip);
  652. snd_ad1848_mce_down(chip);
  653. return 0; /* all things are ok.. */
  654. }
  655. /*
  656. */
  657. static struct snd_pcm_hardware snd_ad1848_playback =
  658. {
  659. .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
  660. SNDRV_PCM_INFO_MMAP_VALID),
  661. .formats = (SNDRV_PCM_FMTBIT_MU_LAW | SNDRV_PCM_FMTBIT_A_LAW |
  662. SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE),
  663. .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_48000,
  664. .rate_min = 5510,
  665. .rate_max = 48000,
  666. .channels_min = 1,
  667. .channels_max = 2,
  668. .buffer_bytes_max = (128*1024),
  669. .period_bytes_min = 64,
  670. .period_bytes_max = (128*1024),
  671. .periods_min = 1,
  672. .periods_max = 1024,
  673. .fifo_size = 0,
  674. };
  675. static struct snd_pcm_hardware snd_ad1848_capture =
  676. {
  677. .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
  678. SNDRV_PCM_INFO_MMAP_VALID),
  679. .formats = (SNDRV_PCM_FMTBIT_MU_LAW | SNDRV_PCM_FMTBIT_A_LAW |
  680. SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE),
  681. .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_48000,
  682. .rate_min = 5510,
  683. .rate_max = 48000,
  684. .channels_min = 1,
  685. .channels_max = 2,
  686. .buffer_bytes_max = (128*1024),
  687. .period_bytes_min = 64,
  688. .period_bytes_max = (128*1024),
  689. .periods_min = 1,
  690. .periods_max = 1024,
  691. .fifo_size = 0,
  692. };
  693. /*
  694. */
  695. static int snd_ad1848_playback_open(struct snd_pcm_substream *substream)
  696. {
  697. struct snd_ad1848 *chip = snd_pcm_substream_chip(substream);
  698. struct snd_pcm_runtime *runtime = substream->runtime;
  699. int err;
  700. if ((err = snd_ad1848_open(chip, AD1848_MODE_PLAY)) < 0)
  701. return err;
  702. chip->playback_substream = substream;
  703. runtime->hw = snd_ad1848_playback;
  704. snd_pcm_limit_isa_dma_size(chip->dma, &runtime->hw.buffer_bytes_max);
  705. snd_pcm_limit_isa_dma_size(chip->dma, &runtime->hw.period_bytes_max);
  706. snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hw_constraints_rates);
  707. return 0;
  708. }
  709. static int snd_ad1848_capture_open(struct snd_pcm_substream *substream)
  710. {
  711. struct snd_ad1848 *chip = snd_pcm_substream_chip(substream);
  712. struct snd_pcm_runtime *runtime = substream->runtime;
  713. int err;
  714. if ((err = snd_ad1848_open(chip, AD1848_MODE_CAPTURE)) < 0)
  715. return err;
  716. chip->capture_substream = substream;
  717. runtime->hw = snd_ad1848_capture;
  718. snd_pcm_limit_isa_dma_size(chip->dma, &runtime->hw.buffer_bytes_max);
  719. snd_pcm_limit_isa_dma_size(chip->dma, &runtime->hw.period_bytes_max);
  720. snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hw_constraints_rates);
  721. return 0;
  722. }
  723. static int snd_ad1848_playback_close(struct snd_pcm_substream *substream)
  724. {
  725. struct snd_ad1848 *chip = snd_pcm_substream_chip(substream);
  726. chip->mode &= ~AD1848_MODE_PLAY;
  727. chip->playback_substream = NULL;
  728. snd_ad1848_close(chip);
  729. return 0;
  730. }
  731. static int snd_ad1848_capture_close(struct snd_pcm_substream *substream)
  732. {
  733. struct snd_ad1848 *chip = snd_pcm_substream_chip(substream);
  734. chip->mode &= ~AD1848_MODE_CAPTURE;
  735. chip->capture_substream = NULL;
  736. snd_ad1848_close(chip);
  737. return 0;
  738. }
  739. static int snd_ad1848_free(struct snd_ad1848 *chip)
  740. {
  741. release_and_free_resource(chip->res_port);
  742. if (chip->irq >= 0)
  743. free_irq(chip->irq, (void *) chip);
  744. if (chip->dma >= 0) {
  745. snd_dma_disable(chip->dma);
  746. free_dma(chip->dma);
  747. }
  748. kfree(chip);
  749. return 0;
  750. }
  751. static int snd_ad1848_dev_free(struct snd_device *device)
  752. {
  753. struct snd_ad1848 *chip = device->device_data;
  754. return snd_ad1848_free(chip);
  755. }
  756. static const char *snd_ad1848_chip_id(struct snd_ad1848 *chip)
  757. {
  758. switch (chip->hardware) {
  759. case AD1848_HW_AD1847: return "AD1847";
  760. case AD1848_HW_AD1848: return "AD1848";
  761. case AD1848_HW_CS4248: return "CS4248";
  762. case AD1848_HW_CMI8330: return "CMI8330/C3D";
  763. default: return "???";
  764. }
  765. }
  766. int snd_ad1848_create(struct snd_card *card,
  767. unsigned long port,
  768. int irq, int dma,
  769. unsigned short hardware,
  770. struct snd_ad1848 ** rchip)
  771. {
  772. static struct snd_device_ops ops = {
  773. .dev_free = snd_ad1848_dev_free,
  774. };
  775. struct snd_ad1848 *chip;
  776. int err;
  777. *rchip = NULL;
  778. chip = kzalloc(sizeof(*chip), GFP_KERNEL);
  779. if (chip == NULL)
  780. return -ENOMEM;
  781. spin_lock_init(&chip->reg_lock);
  782. mutex_init(&chip->open_mutex);
  783. chip->card = card;
  784. chip->port = port;
  785. chip->irq = -1;
  786. chip->dma = -1;
  787. chip->hardware = hardware;
  788. memcpy(&chip->image, &snd_ad1848_original_image, sizeof(snd_ad1848_original_image));
  789. if ((chip->res_port = request_region(port, 4, "AD1848")) == NULL) {
  790. snd_printk(KERN_ERR "ad1848: can't grab port 0x%lx\n", port);
  791. snd_ad1848_free(chip);
  792. return -EBUSY;
  793. }
  794. if (request_irq(irq, snd_ad1848_interrupt, IRQF_DISABLED, "AD1848", (void *) chip)) {
  795. snd_printk(KERN_ERR "ad1848: can't grab IRQ %d\n", irq);
  796. snd_ad1848_free(chip);
  797. return -EBUSY;
  798. }
  799. chip->irq = irq;
  800. if (request_dma(dma, "AD1848")) {
  801. snd_printk(KERN_ERR "ad1848: can't grab DMA %d\n", dma);
  802. snd_ad1848_free(chip);
  803. return -EBUSY;
  804. }
  805. chip->dma = dma;
  806. if (hardware == AD1848_HW_THINKPAD) {
  807. chip->thinkpad_flag = 1;
  808. chip->hardware = AD1848_HW_DETECT; /* reset */
  809. snd_ad1848_thinkpad_twiddle(chip, 1);
  810. }
  811. if (snd_ad1848_probe(chip) < 0) {
  812. snd_ad1848_free(chip);
  813. return -ENODEV;
  814. }
  815. /* Register device */
  816. if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) {
  817. snd_ad1848_free(chip);
  818. return err;
  819. }
  820. #ifdef CONFIG_PM
  821. chip->suspend = snd_ad1848_suspend;
  822. chip->resume = snd_ad1848_resume;
  823. #endif
  824. *rchip = chip;
  825. return 0;
  826. }
  827. EXPORT_SYMBOL(snd_ad1848_create);
  828. static struct snd_pcm_ops snd_ad1848_playback_ops = {
  829. .open = snd_ad1848_playback_open,
  830. .close = snd_ad1848_playback_close,
  831. .ioctl = snd_ad1848_ioctl,
  832. .hw_params = snd_ad1848_playback_hw_params,
  833. .hw_free = snd_ad1848_playback_hw_free,
  834. .prepare = snd_ad1848_playback_prepare,
  835. .trigger = snd_ad1848_playback_trigger,
  836. .pointer = snd_ad1848_playback_pointer,
  837. };
  838. static struct snd_pcm_ops snd_ad1848_capture_ops = {
  839. .open = snd_ad1848_capture_open,
  840. .close = snd_ad1848_capture_close,
  841. .ioctl = snd_ad1848_ioctl,
  842. .hw_params = snd_ad1848_capture_hw_params,
  843. .hw_free = snd_ad1848_capture_hw_free,
  844. .prepare = snd_ad1848_capture_prepare,
  845. .trigger = snd_ad1848_capture_trigger,
  846. .pointer = snd_ad1848_capture_pointer,
  847. };
  848. int snd_ad1848_pcm(struct snd_ad1848 *chip, int device, struct snd_pcm **rpcm)
  849. {
  850. struct snd_pcm *pcm;
  851. int err;
  852. if ((err = snd_pcm_new(chip->card, "AD1848", device, 1, 1, &pcm)) < 0)
  853. return err;
  854. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ad1848_playback_ops);
  855. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ad1848_capture_ops);
  856. pcm->private_data = chip;
  857. pcm->info_flags = SNDRV_PCM_INFO_HALF_DUPLEX;
  858. strcpy(pcm->name, snd_ad1848_chip_id(chip));
  859. snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
  860. snd_dma_isa_data(),
  861. 64*1024, chip->dma > 3 ? 128*1024 : 64*1024);
  862. chip->pcm = pcm;
  863. if (rpcm)
  864. *rpcm = pcm;
  865. return 0;
  866. }
  867. EXPORT_SYMBOL(snd_ad1848_pcm);
  868. const struct snd_pcm_ops *snd_ad1848_get_pcm_ops(int direction)
  869. {
  870. return direction == SNDRV_PCM_STREAM_PLAYBACK ?
  871. &snd_ad1848_playback_ops : &snd_ad1848_capture_ops;
  872. }
  873. EXPORT_SYMBOL(snd_ad1848_get_pcm_ops);
  874. /*
  875. * MIXER part
  876. */
  877. static int snd_ad1848_info_mux(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  878. {
  879. static char *texts[4] = {
  880. "Line", "Aux", "Mic", "Mix"
  881. };
  882. uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
  883. uinfo->count = 2;
  884. uinfo->value.enumerated.items = 4;
  885. if (uinfo->value.enumerated.item > 3)
  886. uinfo->value.enumerated.item = 3;
  887. strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
  888. return 0;
  889. }
  890. static int snd_ad1848_get_mux(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  891. {
  892. struct snd_ad1848 *chip = snd_kcontrol_chip(kcontrol);
  893. unsigned long flags;
  894. spin_lock_irqsave(&chip->reg_lock, flags);
  895. ucontrol->value.enumerated.item[0] = (chip->image[AD1848_LEFT_INPUT] & AD1848_MIXS_ALL) >> 6;
  896. ucontrol->value.enumerated.item[1] = (chip->image[AD1848_RIGHT_INPUT] & AD1848_MIXS_ALL) >> 6;
  897. spin_unlock_irqrestore(&chip->reg_lock, flags);
  898. return 0;
  899. }
  900. static int snd_ad1848_put_mux(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  901. {
  902. struct snd_ad1848 *chip = snd_kcontrol_chip(kcontrol);
  903. unsigned long flags;
  904. unsigned short left, right;
  905. int change;
  906. if (ucontrol->value.enumerated.item[0] > 3 ||
  907. ucontrol->value.enumerated.item[1] > 3)
  908. return -EINVAL;
  909. left = ucontrol->value.enumerated.item[0] << 6;
  910. right = ucontrol->value.enumerated.item[1] << 6;
  911. spin_lock_irqsave(&chip->reg_lock, flags);
  912. left = (chip->image[AD1848_LEFT_INPUT] & ~AD1848_MIXS_ALL) | left;
  913. right = (chip->image[AD1848_RIGHT_INPUT] & ~AD1848_MIXS_ALL) | right;
  914. change = left != chip->image[AD1848_LEFT_INPUT] ||
  915. right != chip->image[AD1848_RIGHT_INPUT];
  916. snd_ad1848_out(chip, AD1848_LEFT_INPUT, left);
  917. snd_ad1848_out(chip, AD1848_RIGHT_INPUT, right);
  918. spin_unlock_irqrestore(&chip->reg_lock, flags);
  919. return change;
  920. }
  921. static int snd_ad1848_info_single(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  922. {
  923. int mask = (kcontrol->private_value >> 16) & 0xff;
  924. uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
  925. uinfo->count = 1;
  926. uinfo->value.integer.min = 0;
  927. uinfo->value.integer.max = mask;
  928. return 0;
  929. }
  930. static int snd_ad1848_get_single(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  931. {
  932. struct snd_ad1848 *chip = snd_kcontrol_chip(kcontrol);
  933. unsigned long flags;
  934. int reg = kcontrol->private_value & 0xff;
  935. int shift = (kcontrol->private_value >> 8) & 0xff;
  936. int mask = (kcontrol->private_value >> 16) & 0xff;
  937. int invert = (kcontrol->private_value >> 24) & 0xff;
  938. spin_lock_irqsave(&chip->reg_lock, flags);
  939. ucontrol->value.integer.value[0] = (chip->image[reg] >> shift) & mask;
  940. spin_unlock_irqrestore(&chip->reg_lock, flags);
  941. if (invert)
  942. ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
  943. return 0;
  944. }
  945. static int snd_ad1848_put_single(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  946. {
  947. struct snd_ad1848 *chip = snd_kcontrol_chip(kcontrol);
  948. unsigned long flags;
  949. int reg = kcontrol->private_value & 0xff;
  950. int shift = (kcontrol->private_value >> 8) & 0xff;
  951. int mask = (kcontrol->private_value >> 16) & 0xff;
  952. int invert = (kcontrol->private_value >> 24) & 0xff;
  953. int change;
  954. unsigned short val;
  955. val = (ucontrol->value.integer.value[0] & mask);
  956. if (invert)
  957. val = mask - val;
  958. val <<= shift;
  959. spin_lock_irqsave(&chip->reg_lock, flags);
  960. val = (chip->image[reg] & ~(mask << shift)) | val;
  961. change = val != chip->image[reg];
  962. snd_ad1848_out(chip, reg, val);
  963. spin_unlock_irqrestore(&chip->reg_lock, flags);
  964. return change;
  965. }
  966. static int snd_ad1848_info_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  967. {
  968. int mask = (kcontrol->private_value >> 24) & 0xff;
  969. uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
  970. uinfo->count = 2;
  971. uinfo->value.integer.min = 0;
  972. uinfo->value.integer.max = mask;
  973. return 0;
  974. }
  975. static int snd_ad1848_get_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  976. {
  977. struct snd_ad1848 *chip = snd_kcontrol_chip(kcontrol);
  978. unsigned long flags;
  979. int left_reg = kcontrol->private_value & 0xff;
  980. int right_reg = (kcontrol->private_value >> 8) & 0xff;
  981. int shift_left = (kcontrol->private_value >> 16) & 0x07;
  982. int shift_right = (kcontrol->private_value >> 19) & 0x07;
  983. int mask = (kcontrol->private_value >> 24) & 0xff;
  984. int invert = (kcontrol->private_value >> 22) & 1;
  985. spin_lock_irqsave(&chip->reg_lock, flags);
  986. ucontrol->value.integer.value[0] = (chip->image[left_reg] >> shift_left) & mask;
  987. ucontrol->value.integer.value[1] = (chip->image[right_reg] >> shift_right) & mask;
  988. spin_unlock_irqrestore(&chip->reg_lock, flags);
  989. if (invert) {
  990. ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
  991. ucontrol->value.integer.value[1] = mask - ucontrol->value.integer.value[1];
  992. }
  993. return 0;
  994. }
  995. static int snd_ad1848_put_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  996. {
  997. struct snd_ad1848 *chip = snd_kcontrol_chip(kcontrol);
  998. unsigned long flags;
  999. int left_reg = kcontrol->private_value & 0xff;
  1000. int right_reg = (kcontrol->private_value >> 8) & 0xff;
  1001. int shift_left = (kcontrol->private_value >> 16) & 0x07;
  1002. int shift_right = (kcontrol->private_value >> 19) & 0x07;
  1003. int mask = (kcontrol->private_value >> 24) & 0xff;
  1004. int invert = (kcontrol->private_value >> 22) & 1;
  1005. int change;
  1006. unsigned short val1, val2;
  1007. val1 = ucontrol->value.integer.value[0] & mask;
  1008. val2 = ucontrol->value.integer.value[1] & mask;
  1009. if (invert) {
  1010. val1 = mask - val1;
  1011. val2 = mask - val2;
  1012. }
  1013. val1 <<= shift_left;
  1014. val2 <<= shift_right;
  1015. spin_lock_irqsave(&chip->reg_lock, flags);
  1016. if (left_reg != right_reg) {
  1017. val1 = (chip->image[left_reg] & ~(mask << shift_left)) | val1;
  1018. val2 = (chip->image[right_reg] & ~(mask << shift_right)) | val2;
  1019. change = val1 != chip->image[left_reg] || val2 != chip->image[right_reg];
  1020. snd_ad1848_out(chip, left_reg, val1);
  1021. snd_ad1848_out(chip, right_reg, val2);
  1022. } else {
  1023. val1 = (chip->image[left_reg] & ~((mask << shift_left) | (mask << shift_right))) | val1 | val2;
  1024. change = val1 != chip->image[left_reg];
  1025. snd_ad1848_out(chip, left_reg, val1);
  1026. }
  1027. spin_unlock_irqrestore(&chip->reg_lock, flags);
  1028. return change;
  1029. }
  1030. /*
  1031. */
  1032. int snd_ad1848_add_ctl_elem(struct snd_ad1848 *chip,
  1033. const struct ad1848_mix_elem *c)
  1034. {
  1035. static struct snd_kcontrol_new newctls[] = {
  1036. [AD1848_MIX_SINGLE] = {
  1037. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1038. .info = snd_ad1848_info_single,
  1039. .get = snd_ad1848_get_single,
  1040. .put = snd_ad1848_put_single,
  1041. },
  1042. [AD1848_MIX_DOUBLE] = {
  1043. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1044. .info = snd_ad1848_info_double,
  1045. .get = snd_ad1848_get_double,
  1046. .put = snd_ad1848_put_double,
  1047. },
  1048. [AD1848_MIX_CAPTURE] = {
  1049. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1050. .info = snd_ad1848_info_mux,
  1051. .get = snd_ad1848_get_mux,
  1052. .put = snd_ad1848_put_mux,
  1053. },
  1054. };
  1055. struct snd_kcontrol *ctl;
  1056. int err;
  1057. ctl = snd_ctl_new1(&newctls[c->type], chip);
  1058. if (! ctl)
  1059. return -ENOMEM;
  1060. strlcpy(ctl->id.name, c->name, sizeof(ctl->id.name));
  1061. ctl->id.index = c->index;
  1062. ctl->private_value = c->private_value;
  1063. if (c->tlv) {
  1064. ctl->vd[0].access |= SNDRV_CTL_ELEM_ACCESS_TLV_READ;
  1065. ctl->tlv.p = c->tlv;
  1066. }
  1067. if ((err = snd_ctl_add(chip->card, ctl)) < 0)
  1068. return err;
  1069. return 0;
  1070. }
  1071. EXPORT_SYMBOL(snd_ad1848_add_ctl_elem);
  1072. static const DECLARE_TLV_DB_SCALE(db_scale_6bit, -9450, 150, 0);
  1073. static const DECLARE_TLV_DB_SCALE(db_scale_5bit_12db_max, -3450, 150, 0);
  1074. static const DECLARE_TLV_DB_SCALE(db_scale_rec_gain, 0, 150, 0);
  1075. static struct ad1848_mix_elem snd_ad1848_controls[] = {
  1076. AD1848_DOUBLE("PCM Playback Switch", 0, AD1848_LEFT_OUTPUT, AD1848_RIGHT_OUTPUT, 7, 7, 1, 1),
  1077. AD1848_DOUBLE_TLV("PCM Playback Volume", 0, AD1848_LEFT_OUTPUT, AD1848_RIGHT_OUTPUT, 0, 0, 63, 1,
  1078. db_scale_6bit),
  1079. AD1848_DOUBLE("Aux Playback Switch", 0, AD1848_AUX1_LEFT_INPUT, AD1848_AUX1_RIGHT_INPUT, 7, 7, 1, 1),
  1080. AD1848_DOUBLE_TLV("Aux Playback Volume", 0, AD1848_AUX1_LEFT_INPUT, AD1848_AUX1_RIGHT_INPUT, 0, 0, 31, 1,
  1081. db_scale_5bit_12db_max),
  1082. AD1848_DOUBLE("Aux Playback Switch", 1, AD1848_AUX2_LEFT_INPUT, AD1848_AUX2_RIGHT_INPUT, 7, 7, 1, 1),
  1083. AD1848_DOUBLE_TLV("Aux Playback Volume", 1, AD1848_AUX2_LEFT_INPUT, AD1848_AUX2_RIGHT_INPUT, 0, 0, 31, 1,
  1084. db_scale_5bit_12db_max),
  1085. AD1848_DOUBLE_TLV("Capture Volume", 0, AD1848_LEFT_INPUT, AD1848_RIGHT_INPUT, 0, 0, 15, 0,
  1086. db_scale_rec_gain),
  1087. {
  1088. .name = "Capture Source",
  1089. .type = AD1848_MIX_CAPTURE,
  1090. },
  1091. AD1848_SINGLE("Loopback Capture Switch", 0, AD1848_LOOPBACK, 0, 1, 0),
  1092. AD1848_SINGLE_TLV("Loopback Capture Volume", 0, AD1848_LOOPBACK, 1, 63, 0,
  1093. db_scale_6bit),
  1094. };
  1095. int snd_ad1848_mixer(struct snd_ad1848 *chip)
  1096. {
  1097. struct snd_card *card;
  1098. struct snd_pcm *pcm;
  1099. unsigned int idx;
  1100. int err;
  1101. snd_assert(chip != NULL && chip->pcm != NULL, return -EINVAL);
  1102. pcm = chip->pcm;
  1103. card = chip->card;
  1104. strcpy(card->mixername, pcm->name);
  1105. for (idx = 0; idx < ARRAY_SIZE(snd_ad1848_controls); idx++)
  1106. if ((err = snd_ad1848_add_ctl_elem(chip, &snd_ad1848_controls[idx])) < 0)
  1107. return err;
  1108. return 0;
  1109. }
  1110. EXPORT_SYMBOL(snd_ad1848_mixer);
  1111. /*
  1112. * INIT part
  1113. */
  1114. static int __init alsa_ad1848_init(void)
  1115. {
  1116. return 0;
  1117. }
  1118. static void __exit alsa_ad1848_exit(void)
  1119. {
  1120. }
  1121. module_init(alsa_ad1848_init)
  1122. module_exit(alsa_ad1848_exit)