intel_lvds.c 30 KB

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  1. /*
  2. * Copyright © 2006-2007 Intel Corporation
  3. * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
  4. *
  5. * Permission is hereby granted, free of charge, to any person obtaining a
  6. * copy of this software and associated documentation files (the "Software"),
  7. * to deal in the Software without restriction, including without limitation
  8. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  9. * and/or sell copies of the Software, and to permit persons to whom the
  10. * Software is furnished to do so, subject to the following conditions:
  11. *
  12. * The above copyright notice and this permission notice (including the next
  13. * paragraph) shall be included in all copies or substantial portions of the
  14. * Software.
  15. *
  16. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19. * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  21. * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  22. * DEALINGS IN THE SOFTWARE.
  23. *
  24. * Authors:
  25. * Eric Anholt <eric@anholt.net>
  26. * Dave Airlie <airlied@linux.ie>
  27. * Jesse Barnes <jesse.barnes@intel.com>
  28. */
  29. #include <acpi/button.h>
  30. #include <linux/dmi.h>
  31. #include <linux/i2c.h>
  32. #include "drmP.h"
  33. #include "drm.h"
  34. #include "drm_crtc.h"
  35. #include "drm_edid.h"
  36. #include "intel_drv.h"
  37. #include "i915_drm.h"
  38. #include "i915_drv.h"
  39. #include <linux/acpi.h>
  40. /* Private structure for the integrated LVDS support */
  41. struct intel_lvds_priv {
  42. int fitting_mode;
  43. u32 pfit_control;
  44. u32 pfit_pgm_ratios;
  45. };
  46. /**
  47. * Sets the backlight level.
  48. *
  49. * \param level backlight level, from 0 to intel_lvds_get_max_backlight().
  50. */
  51. static void intel_lvds_set_backlight(struct drm_device *dev, int level)
  52. {
  53. struct drm_i915_private *dev_priv = dev->dev_private;
  54. u32 blc_pwm_ctl, reg;
  55. if (IS_IGDNG(dev))
  56. reg = BLC_PWM_CPU_CTL;
  57. else
  58. reg = BLC_PWM_CTL;
  59. blc_pwm_ctl = I915_READ(reg) & ~BACKLIGHT_DUTY_CYCLE_MASK;
  60. I915_WRITE(reg, (blc_pwm_ctl |
  61. (level << BACKLIGHT_DUTY_CYCLE_SHIFT)));
  62. }
  63. /**
  64. * Returns the maximum level of the backlight duty cycle field.
  65. */
  66. static u32 intel_lvds_get_max_backlight(struct drm_device *dev)
  67. {
  68. struct drm_i915_private *dev_priv = dev->dev_private;
  69. u32 reg;
  70. if (IS_IGDNG(dev))
  71. reg = BLC_PWM_PCH_CTL2;
  72. else
  73. reg = BLC_PWM_CTL;
  74. return ((I915_READ(reg) & BACKLIGHT_MODULATION_FREQ_MASK) >>
  75. BACKLIGHT_MODULATION_FREQ_SHIFT) * 2;
  76. }
  77. /**
  78. * Sets the power state for the panel.
  79. */
  80. static void intel_lvds_set_power(struct drm_device *dev, bool on)
  81. {
  82. struct drm_i915_private *dev_priv = dev->dev_private;
  83. u32 pp_status, ctl_reg, status_reg;
  84. if (IS_IGDNG(dev)) {
  85. ctl_reg = PCH_PP_CONTROL;
  86. status_reg = PCH_PP_STATUS;
  87. } else {
  88. ctl_reg = PP_CONTROL;
  89. status_reg = PP_STATUS;
  90. }
  91. if (on) {
  92. I915_WRITE(ctl_reg, I915_READ(ctl_reg) |
  93. POWER_TARGET_ON);
  94. do {
  95. pp_status = I915_READ(status_reg);
  96. } while ((pp_status & PP_ON) == 0);
  97. intel_lvds_set_backlight(dev, dev_priv->backlight_duty_cycle);
  98. } else {
  99. intel_lvds_set_backlight(dev, 0);
  100. I915_WRITE(ctl_reg, I915_READ(ctl_reg) &
  101. ~POWER_TARGET_ON);
  102. do {
  103. pp_status = I915_READ(status_reg);
  104. } while (pp_status & PP_ON);
  105. }
  106. }
  107. static void intel_lvds_dpms(struct drm_encoder *encoder, int mode)
  108. {
  109. struct drm_device *dev = encoder->dev;
  110. if (mode == DRM_MODE_DPMS_ON)
  111. intel_lvds_set_power(dev, true);
  112. else
  113. intel_lvds_set_power(dev, false);
  114. /* XXX: We never power down the LVDS pairs. */
  115. }
  116. static void intel_lvds_save(struct drm_connector *connector)
  117. {
  118. struct drm_device *dev = connector->dev;
  119. struct drm_i915_private *dev_priv = dev->dev_private;
  120. u32 pp_on_reg, pp_off_reg, pp_ctl_reg, pp_div_reg;
  121. u32 pwm_ctl_reg;
  122. if (IS_IGDNG(dev)) {
  123. pp_on_reg = PCH_PP_ON_DELAYS;
  124. pp_off_reg = PCH_PP_OFF_DELAYS;
  125. pp_ctl_reg = PCH_PP_CONTROL;
  126. pp_div_reg = PCH_PP_DIVISOR;
  127. pwm_ctl_reg = BLC_PWM_CPU_CTL;
  128. } else {
  129. pp_on_reg = PP_ON_DELAYS;
  130. pp_off_reg = PP_OFF_DELAYS;
  131. pp_ctl_reg = PP_CONTROL;
  132. pp_div_reg = PP_DIVISOR;
  133. pwm_ctl_reg = BLC_PWM_CTL;
  134. }
  135. dev_priv->savePP_ON = I915_READ(pp_on_reg);
  136. dev_priv->savePP_OFF = I915_READ(pp_off_reg);
  137. dev_priv->savePP_CONTROL = I915_READ(pp_ctl_reg);
  138. dev_priv->savePP_DIVISOR = I915_READ(pp_div_reg);
  139. dev_priv->saveBLC_PWM_CTL = I915_READ(pwm_ctl_reg);
  140. dev_priv->backlight_duty_cycle = (dev_priv->saveBLC_PWM_CTL &
  141. BACKLIGHT_DUTY_CYCLE_MASK);
  142. /*
  143. * If the light is off at server startup, just make it full brightness
  144. */
  145. if (dev_priv->backlight_duty_cycle == 0)
  146. dev_priv->backlight_duty_cycle =
  147. intel_lvds_get_max_backlight(dev);
  148. }
  149. static void intel_lvds_restore(struct drm_connector *connector)
  150. {
  151. struct drm_device *dev = connector->dev;
  152. struct drm_i915_private *dev_priv = dev->dev_private;
  153. u32 pp_on_reg, pp_off_reg, pp_ctl_reg, pp_div_reg;
  154. u32 pwm_ctl_reg;
  155. if (IS_IGDNG(dev)) {
  156. pp_on_reg = PCH_PP_ON_DELAYS;
  157. pp_off_reg = PCH_PP_OFF_DELAYS;
  158. pp_ctl_reg = PCH_PP_CONTROL;
  159. pp_div_reg = PCH_PP_DIVISOR;
  160. pwm_ctl_reg = BLC_PWM_CPU_CTL;
  161. } else {
  162. pp_on_reg = PP_ON_DELAYS;
  163. pp_off_reg = PP_OFF_DELAYS;
  164. pp_ctl_reg = PP_CONTROL;
  165. pp_div_reg = PP_DIVISOR;
  166. pwm_ctl_reg = BLC_PWM_CTL;
  167. }
  168. I915_WRITE(pwm_ctl_reg, dev_priv->saveBLC_PWM_CTL);
  169. I915_WRITE(pp_on_reg, dev_priv->savePP_ON);
  170. I915_WRITE(pp_off_reg, dev_priv->savePP_OFF);
  171. I915_WRITE(pp_div_reg, dev_priv->savePP_DIVISOR);
  172. I915_WRITE(pp_ctl_reg, dev_priv->savePP_CONTROL);
  173. if (dev_priv->savePP_CONTROL & POWER_TARGET_ON)
  174. intel_lvds_set_power(dev, true);
  175. else
  176. intel_lvds_set_power(dev, false);
  177. }
  178. static int intel_lvds_mode_valid(struct drm_connector *connector,
  179. struct drm_display_mode *mode)
  180. {
  181. struct drm_device *dev = connector->dev;
  182. struct drm_i915_private *dev_priv = dev->dev_private;
  183. struct drm_display_mode *fixed_mode = dev_priv->panel_fixed_mode;
  184. if (fixed_mode) {
  185. if (mode->hdisplay > fixed_mode->hdisplay)
  186. return MODE_PANEL;
  187. if (mode->vdisplay > fixed_mode->vdisplay)
  188. return MODE_PANEL;
  189. }
  190. return MODE_OK;
  191. }
  192. static bool intel_lvds_mode_fixup(struct drm_encoder *encoder,
  193. struct drm_display_mode *mode,
  194. struct drm_display_mode *adjusted_mode)
  195. {
  196. /*
  197. * float point operation is not supported . So the PANEL_RATIO_FACTOR
  198. * is defined, which can avoid the float point computation when
  199. * calculating the panel ratio.
  200. */
  201. #define PANEL_RATIO_FACTOR 8192
  202. struct drm_device *dev = encoder->dev;
  203. struct drm_i915_private *dev_priv = dev->dev_private;
  204. struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
  205. struct drm_encoder *tmp_encoder;
  206. struct intel_output *intel_output = enc_to_intel_output(encoder);
  207. struct intel_lvds_priv *lvds_priv = intel_output->dev_priv;
  208. u32 pfit_control = 0, pfit_pgm_ratios = 0;
  209. int left_border = 0, right_border = 0, top_border = 0;
  210. int bottom_border = 0;
  211. bool border = 0;
  212. int panel_ratio, desired_ratio, vert_scale, horiz_scale;
  213. int horiz_ratio, vert_ratio;
  214. u32 hsync_width, vsync_width;
  215. u32 hblank_width, vblank_width;
  216. u32 hsync_pos, vsync_pos;
  217. /* Should never happen!! */
  218. if (!IS_I965G(dev) && intel_crtc->pipe == 0) {
  219. DRM_ERROR("Can't support LVDS on pipe A\n");
  220. return false;
  221. }
  222. /* Should never happen!! */
  223. list_for_each_entry(tmp_encoder, &dev->mode_config.encoder_list, head) {
  224. if (tmp_encoder != encoder && tmp_encoder->crtc == encoder->crtc) {
  225. DRM_ERROR("Can't enable LVDS and another "
  226. "encoder on the same pipe\n");
  227. return false;
  228. }
  229. }
  230. /* If we don't have a panel mode, there is nothing we can do */
  231. if (dev_priv->panel_fixed_mode == NULL)
  232. return true;
  233. /*
  234. * If we have timings from the BIOS for the panel, put them in
  235. * to the adjusted mode. The CRTC will be set up for this mode,
  236. * with the panel scaling set up to source from the H/VDisplay
  237. * of the original mode.
  238. */
  239. if (dev_priv->panel_fixed_mode != NULL) {
  240. adjusted_mode->hdisplay = dev_priv->panel_fixed_mode->hdisplay;
  241. adjusted_mode->hsync_start =
  242. dev_priv->panel_fixed_mode->hsync_start;
  243. adjusted_mode->hsync_end =
  244. dev_priv->panel_fixed_mode->hsync_end;
  245. adjusted_mode->htotal = dev_priv->panel_fixed_mode->htotal;
  246. adjusted_mode->vdisplay = dev_priv->panel_fixed_mode->vdisplay;
  247. adjusted_mode->vsync_start =
  248. dev_priv->panel_fixed_mode->vsync_start;
  249. adjusted_mode->vsync_end =
  250. dev_priv->panel_fixed_mode->vsync_end;
  251. adjusted_mode->vtotal = dev_priv->panel_fixed_mode->vtotal;
  252. adjusted_mode->clock = dev_priv->panel_fixed_mode->clock;
  253. drm_mode_set_crtcinfo(adjusted_mode, CRTC_INTERLACE_HALVE_V);
  254. }
  255. /* Make sure pre-965s set dither correctly */
  256. if (!IS_I965G(dev)) {
  257. if (dev_priv->panel_wants_dither || dev_priv->lvds_dither)
  258. pfit_control |= PANEL_8TO6_DITHER_ENABLE;
  259. }
  260. /* Native modes don't need fitting */
  261. if (adjusted_mode->hdisplay == mode->hdisplay &&
  262. adjusted_mode->vdisplay == mode->vdisplay) {
  263. pfit_pgm_ratios = 0;
  264. border = 0;
  265. goto out;
  266. }
  267. /* 965+ wants fuzzy fitting */
  268. if (IS_I965G(dev))
  269. pfit_control |= (intel_crtc->pipe << PFIT_PIPE_SHIFT) |
  270. PFIT_FILTER_FUZZY;
  271. hsync_width = adjusted_mode->crtc_hsync_end -
  272. adjusted_mode->crtc_hsync_start;
  273. vsync_width = adjusted_mode->crtc_vsync_end -
  274. adjusted_mode->crtc_vsync_start;
  275. hblank_width = adjusted_mode->crtc_hblank_end -
  276. adjusted_mode->crtc_hblank_start;
  277. vblank_width = adjusted_mode->crtc_vblank_end -
  278. adjusted_mode->crtc_vblank_start;
  279. /*
  280. * Deal with panel fitting options. Figure out how to stretch the
  281. * image based on its aspect ratio & the current panel fitting mode.
  282. */
  283. panel_ratio = adjusted_mode->hdisplay * PANEL_RATIO_FACTOR /
  284. adjusted_mode->vdisplay;
  285. desired_ratio = mode->hdisplay * PANEL_RATIO_FACTOR /
  286. mode->vdisplay;
  287. /*
  288. * Enable automatic panel scaling for non-native modes so that they fill
  289. * the screen. Should be enabled before the pipe is enabled, according
  290. * to register description and PRM.
  291. * Change the value here to see the borders for debugging
  292. */
  293. I915_WRITE(BCLRPAT_A, 0);
  294. I915_WRITE(BCLRPAT_B, 0);
  295. switch (lvds_priv->fitting_mode) {
  296. case DRM_MODE_SCALE_CENTER:
  297. /*
  298. * For centered modes, we have to calculate border widths &
  299. * heights and modify the values programmed into the CRTC.
  300. */
  301. left_border = (adjusted_mode->hdisplay - mode->hdisplay) / 2;
  302. right_border = left_border;
  303. if (mode->hdisplay & 1)
  304. right_border++;
  305. top_border = (adjusted_mode->vdisplay - mode->vdisplay) / 2;
  306. bottom_border = top_border;
  307. if (mode->vdisplay & 1)
  308. bottom_border++;
  309. /* Set active & border values */
  310. adjusted_mode->crtc_hdisplay = mode->hdisplay;
  311. /* Keep the boder be even */
  312. if (right_border & 1)
  313. right_border++;
  314. /* use the border directly instead of border minuse one */
  315. adjusted_mode->crtc_hblank_start = mode->hdisplay +
  316. right_border;
  317. /* keep the blank width constant */
  318. adjusted_mode->crtc_hblank_end =
  319. adjusted_mode->crtc_hblank_start + hblank_width;
  320. /* get the hsync pos relative to hblank start */
  321. hsync_pos = (hblank_width - hsync_width) / 2;
  322. /* keep the hsync pos be even */
  323. if (hsync_pos & 1)
  324. hsync_pos++;
  325. adjusted_mode->crtc_hsync_start =
  326. adjusted_mode->crtc_hblank_start + hsync_pos;
  327. /* keep the hsync width constant */
  328. adjusted_mode->crtc_hsync_end =
  329. adjusted_mode->crtc_hsync_start + hsync_width;
  330. adjusted_mode->crtc_vdisplay = mode->vdisplay;
  331. /* use the border instead of border minus one */
  332. adjusted_mode->crtc_vblank_start = mode->vdisplay +
  333. bottom_border;
  334. /* keep the vblank width constant */
  335. adjusted_mode->crtc_vblank_end =
  336. adjusted_mode->crtc_vblank_start + vblank_width;
  337. /* get the vsync start postion relative to vblank start */
  338. vsync_pos = (vblank_width - vsync_width) / 2;
  339. adjusted_mode->crtc_vsync_start =
  340. adjusted_mode->crtc_vblank_start + vsync_pos;
  341. /* keep the vsync width constant */
  342. adjusted_mode->crtc_vsync_end =
  343. adjusted_mode->crtc_vblank_start + vsync_width;
  344. border = 1;
  345. break;
  346. case DRM_MODE_SCALE_ASPECT:
  347. /* Scale but preserve the spect ratio */
  348. pfit_control |= PFIT_ENABLE;
  349. if (IS_I965G(dev)) {
  350. /* 965+ is easy, it does everything in hw */
  351. if (panel_ratio > desired_ratio)
  352. pfit_control |= PFIT_SCALING_PILLAR;
  353. else if (panel_ratio < desired_ratio)
  354. pfit_control |= PFIT_SCALING_LETTER;
  355. else
  356. pfit_control |= PFIT_SCALING_AUTO;
  357. } else {
  358. /*
  359. * For earlier chips we have to calculate the scaling
  360. * ratio by hand and program it into the
  361. * PFIT_PGM_RATIO register
  362. */
  363. u32 horiz_bits, vert_bits, bits = 12;
  364. horiz_ratio = mode->hdisplay * PANEL_RATIO_FACTOR/
  365. adjusted_mode->hdisplay;
  366. vert_ratio = mode->vdisplay * PANEL_RATIO_FACTOR/
  367. adjusted_mode->vdisplay;
  368. horiz_scale = adjusted_mode->hdisplay *
  369. PANEL_RATIO_FACTOR / mode->hdisplay;
  370. vert_scale = adjusted_mode->vdisplay *
  371. PANEL_RATIO_FACTOR / mode->vdisplay;
  372. /* retain aspect ratio */
  373. if (panel_ratio > desired_ratio) { /* Pillar */
  374. u32 scaled_width;
  375. scaled_width = mode->hdisplay * vert_scale /
  376. PANEL_RATIO_FACTOR;
  377. horiz_ratio = vert_ratio;
  378. pfit_control |= (VERT_AUTO_SCALE |
  379. VERT_INTERP_BILINEAR |
  380. HORIZ_INTERP_BILINEAR);
  381. /* Pillar will have left/right borders */
  382. left_border = (adjusted_mode->hdisplay -
  383. scaled_width) / 2;
  384. right_border = left_border;
  385. if (mode->hdisplay & 1) /* odd resolutions */
  386. right_border++;
  387. /* keep the border be even */
  388. if (right_border & 1)
  389. right_border++;
  390. adjusted_mode->crtc_hdisplay = scaled_width;
  391. /* use border instead of border minus one */
  392. adjusted_mode->crtc_hblank_start =
  393. scaled_width + right_border;
  394. /* keep the hblank width constant */
  395. adjusted_mode->crtc_hblank_end =
  396. adjusted_mode->crtc_hblank_start +
  397. hblank_width;
  398. /*
  399. * get the hsync start pos relative to
  400. * hblank start
  401. */
  402. hsync_pos = (hblank_width - hsync_width) / 2;
  403. /* keep the hsync_pos be even */
  404. if (hsync_pos & 1)
  405. hsync_pos++;
  406. adjusted_mode->crtc_hsync_start =
  407. adjusted_mode->crtc_hblank_start +
  408. hsync_pos;
  409. /* keept hsync width constant */
  410. adjusted_mode->crtc_hsync_end =
  411. adjusted_mode->crtc_hsync_start +
  412. hsync_width;
  413. border = 1;
  414. } else if (panel_ratio < desired_ratio) { /* letter */
  415. u32 scaled_height = mode->vdisplay *
  416. horiz_scale / PANEL_RATIO_FACTOR;
  417. vert_ratio = horiz_ratio;
  418. pfit_control |= (HORIZ_AUTO_SCALE |
  419. VERT_INTERP_BILINEAR |
  420. HORIZ_INTERP_BILINEAR);
  421. /* Letterbox will have top/bottom border */
  422. top_border = (adjusted_mode->vdisplay -
  423. scaled_height) / 2;
  424. bottom_border = top_border;
  425. if (mode->vdisplay & 1)
  426. bottom_border++;
  427. adjusted_mode->crtc_vdisplay = scaled_height;
  428. /* use border instead of border minus one */
  429. adjusted_mode->crtc_vblank_start =
  430. scaled_height + bottom_border;
  431. /* keep the vblank width constant */
  432. adjusted_mode->crtc_vblank_end =
  433. adjusted_mode->crtc_vblank_start +
  434. vblank_width;
  435. /*
  436. * get the vsync start pos relative to
  437. * vblank start
  438. */
  439. vsync_pos = (vblank_width - vsync_width) / 2;
  440. adjusted_mode->crtc_vsync_start =
  441. adjusted_mode->crtc_vblank_start +
  442. vsync_pos;
  443. /* keep the vsync width constant */
  444. adjusted_mode->crtc_vsync_end =
  445. adjusted_mode->crtc_vsync_start +
  446. vsync_width;
  447. border = 1;
  448. } else {
  449. /* Aspects match, Let hw scale both directions */
  450. pfit_control |= (VERT_AUTO_SCALE |
  451. HORIZ_AUTO_SCALE |
  452. VERT_INTERP_BILINEAR |
  453. HORIZ_INTERP_BILINEAR);
  454. }
  455. horiz_bits = (1 << bits) * horiz_ratio /
  456. PANEL_RATIO_FACTOR;
  457. vert_bits = (1 << bits) * vert_ratio /
  458. PANEL_RATIO_FACTOR;
  459. pfit_pgm_ratios =
  460. ((vert_bits << PFIT_VERT_SCALE_SHIFT) &
  461. PFIT_VERT_SCALE_MASK) |
  462. ((horiz_bits << PFIT_HORIZ_SCALE_SHIFT) &
  463. PFIT_HORIZ_SCALE_MASK);
  464. }
  465. break;
  466. case DRM_MODE_SCALE_FULLSCREEN:
  467. /*
  468. * Full scaling, even if it changes the aspect ratio.
  469. * Fortunately this is all done for us in hw.
  470. */
  471. pfit_control |= PFIT_ENABLE;
  472. if (IS_I965G(dev))
  473. pfit_control |= PFIT_SCALING_AUTO;
  474. else
  475. pfit_control |= (VERT_AUTO_SCALE | HORIZ_AUTO_SCALE |
  476. VERT_INTERP_BILINEAR |
  477. HORIZ_INTERP_BILINEAR);
  478. break;
  479. default:
  480. break;
  481. }
  482. out:
  483. lvds_priv->pfit_control = pfit_control;
  484. lvds_priv->pfit_pgm_ratios = pfit_pgm_ratios;
  485. /*
  486. * XXX: It would be nice to support lower refresh rates on the
  487. * panels to reduce power consumption, and perhaps match the
  488. * user's requested refresh rate.
  489. */
  490. return true;
  491. }
  492. static void intel_lvds_prepare(struct drm_encoder *encoder)
  493. {
  494. struct drm_device *dev = encoder->dev;
  495. struct drm_i915_private *dev_priv = dev->dev_private;
  496. u32 reg;
  497. if (IS_IGDNG(dev))
  498. reg = BLC_PWM_CPU_CTL;
  499. else
  500. reg = BLC_PWM_CTL;
  501. dev_priv->saveBLC_PWM_CTL = I915_READ(reg);
  502. dev_priv->backlight_duty_cycle = (dev_priv->saveBLC_PWM_CTL &
  503. BACKLIGHT_DUTY_CYCLE_MASK);
  504. intel_lvds_set_power(dev, false);
  505. }
  506. static void intel_lvds_commit( struct drm_encoder *encoder)
  507. {
  508. struct drm_device *dev = encoder->dev;
  509. struct drm_i915_private *dev_priv = dev->dev_private;
  510. if (dev_priv->backlight_duty_cycle == 0)
  511. dev_priv->backlight_duty_cycle =
  512. intel_lvds_get_max_backlight(dev);
  513. intel_lvds_set_power(dev, true);
  514. }
  515. static void intel_lvds_mode_set(struct drm_encoder *encoder,
  516. struct drm_display_mode *mode,
  517. struct drm_display_mode *adjusted_mode)
  518. {
  519. struct drm_device *dev = encoder->dev;
  520. struct drm_i915_private *dev_priv = dev->dev_private;
  521. struct intel_output *intel_output = enc_to_intel_output(encoder);
  522. struct intel_lvds_priv *lvds_priv = intel_output->dev_priv;
  523. /*
  524. * The LVDS pin pair will already have been turned on in the
  525. * intel_crtc_mode_set since it has a large impact on the DPLL
  526. * settings.
  527. */
  528. /* No panel fitting yet, fixme */
  529. if (IS_IGDNG(dev))
  530. return;
  531. /*
  532. * Enable automatic panel scaling so that non-native modes fill the
  533. * screen. Should be enabled before the pipe is enabled, according to
  534. * register description and PRM.
  535. */
  536. I915_WRITE(PFIT_PGM_RATIOS, lvds_priv->pfit_pgm_ratios);
  537. I915_WRITE(PFIT_CONTROL, lvds_priv->pfit_control);
  538. }
  539. /**
  540. * Detect the LVDS connection.
  541. *
  542. * Since LVDS doesn't have hotlug, we use the lid as a proxy. Open means
  543. * connected and closed means disconnected. We also send hotplug events as
  544. * needed, using lid status notification from the input layer.
  545. */
  546. static enum drm_connector_status intel_lvds_detect(struct drm_connector *connector)
  547. {
  548. enum drm_connector_status status = connector_status_connected;
  549. if (!acpi_lid_open())
  550. status = connector_status_disconnected;
  551. return status;
  552. }
  553. /**
  554. * Return the list of DDC modes if available, or the BIOS fixed mode otherwise.
  555. */
  556. static int intel_lvds_get_modes(struct drm_connector *connector)
  557. {
  558. struct drm_device *dev = connector->dev;
  559. struct intel_output *intel_output = to_intel_output(connector);
  560. struct drm_i915_private *dev_priv = dev->dev_private;
  561. int ret = 0;
  562. ret = intel_ddc_get_modes(intel_output);
  563. if (ret)
  564. return ret;
  565. /* Didn't get an EDID, so
  566. * Set wide sync ranges so we get all modes
  567. * handed to valid_mode for checking
  568. */
  569. connector->display_info.min_vfreq = 0;
  570. connector->display_info.max_vfreq = 200;
  571. connector->display_info.min_hfreq = 0;
  572. connector->display_info.max_hfreq = 200;
  573. if (dev_priv->panel_fixed_mode != NULL) {
  574. struct drm_display_mode *mode;
  575. mode = drm_mode_duplicate(dev, dev_priv->panel_fixed_mode);
  576. drm_mode_probed_add(connector, mode);
  577. return 1;
  578. }
  579. return 0;
  580. }
  581. static int intel_lid_notify(struct notifier_block *nb, unsigned long val,
  582. void *unused)
  583. {
  584. struct drm_i915_private *dev_priv =
  585. container_of(nb, struct drm_i915_private, lid_notifier);
  586. struct drm_device *dev = dev_priv->dev;
  587. if (acpi_lid_open())
  588. drm_helper_resume_force_mode(dev);
  589. return NOTIFY_OK;
  590. }
  591. /**
  592. * intel_lvds_destroy - unregister and free LVDS structures
  593. * @connector: connector to free
  594. *
  595. * Unregister the DDC bus for this connector then free the driver private
  596. * structure.
  597. */
  598. static void intel_lvds_destroy(struct drm_connector *connector)
  599. {
  600. struct drm_device *dev = connector->dev;
  601. struct intel_output *intel_output = to_intel_output(connector);
  602. struct drm_i915_private *dev_priv = dev->dev_private;
  603. if (intel_output->ddc_bus)
  604. intel_i2c_destroy(intel_output->ddc_bus);
  605. if (dev_priv->lid_notifier.notifier_call)
  606. acpi_lid_notifier_unregister(&dev_priv->lid_notifier);
  607. drm_sysfs_connector_remove(connector);
  608. drm_connector_cleanup(connector);
  609. kfree(connector);
  610. }
  611. static int intel_lvds_set_property(struct drm_connector *connector,
  612. struct drm_property *property,
  613. uint64_t value)
  614. {
  615. struct drm_device *dev = connector->dev;
  616. struct intel_output *intel_output =
  617. to_intel_output(connector);
  618. if (property == dev->mode_config.scaling_mode_property &&
  619. connector->encoder) {
  620. struct drm_crtc *crtc = connector->encoder->crtc;
  621. struct intel_lvds_priv *lvds_priv = intel_output->dev_priv;
  622. if (value == DRM_MODE_SCALE_NONE) {
  623. DRM_DEBUG_KMS("no scaling not supported\n");
  624. return 0;
  625. }
  626. if (lvds_priv->fitting_mode == value) {
  627. /* the LVDS scaling property is not changed */
  628. return 0;
  629. }
  630. lvds_priv->fitting_mode = value;
  631. if (crtc && crtc->enabled) {
  632. /*
  633. * If the CRTC is enabled, the display will be changed
  634. * according to the new panel fitting mode.
  635. */
  636. drm_crtc_helper_set_mode(crtc, &crtc->mode,
  637. crtc->x, crtc->y, crtc->fb);
  638. }
  639. }
  640. return 0;
  641. }
  642. static const struct drm_encoder_helper_funcs intel_lvds_helper_funcs = {
  643. .dpms = intel_lvds_dpms,
  644. .mode_fixup = intel_lvds_mode_fixup,
  645. .prepare = intel_lvds_prepare,
  646. .mode_set = intel_lvds_mode_set,
  647. .commit = intel_lvds_commit,
  648. };
  649. static const struct drm_connector_helper_funcs intel_lvds_connector_helper_funcs = {
  650. .get_modes = intel_lvds_get_modes,
  651. .mode_valid = intel_lvds_mode_valid,
  652. .best_encoder = intel_best_encoder,
  653. };
  654. static const struct drm_connector_funcs intel_lvds_connector_funcs = {
  655. .dpms = drm_helper_connector_dpms,
  656. .save = intel_lvds_save,
  657. .restore = intel_lvds_restore,
  658. .detect = intel_lvds_detect,
  659. .fill_modes = drm_helper_probe_single_connector_modes,
  660. .set_property = intel_lvds_set_property,
  661. .destroy = intel_lvds_destroy,
  662. };
  663. static void intel_lvds_enc_destroy(struct drm_encoder *encoder)
  664. {
  665. drm_encoder_cleanup(encoder);
  666. }
  667. static const struct drm_encoder_funcs intel_lvds_enc_funcs = {
  668. .destroy = intel_lvds_enc_destroy,
  669. };
  670. static int __init intel_no_lvds_dmi_callback(const struct dmi_system_id *id)
  671. {
  672. DRM_DEBUG_KMS("Skipping LVDS initialization for %s\n", id->ident);
  673. return 1;
  674. }
  675. /* These systems claim to have LVDS, but really don't */
  676. static const struct dmi_system_id intel_no_lvds[] = {
  677. {
  678. .callback = intel_no_lvds_dmi_callback,
  679. .ident = "Apple Mac Mini (Core series)",
  680. .matches = {
  681. DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
  682. DMI_MATCH(DMI_PRODUCT_NAME, "Macmini1,1"),
  683. },
  684. },
  685. {
  686. .callback = intel_no_lvds_dmi_callback,
  687. .ident = "Apple Mac Mini (Core 2 series)",
  688. .matches = {
  689. DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
  690. DMI_MATCH(DMI_PRODUCT_NAME, "Macmini2,1"),
  691. },
  692. },
  693. {
  694. .callback = intel_no_lvds_dmi_callback,
  695. .ident = "MSI IM-945GSE-A",
  696. .matches = {
  697. DMI_MATCH(DMI_SYS_VENDOR, "MSI"),
  698. DMI_MATCH(DMI_PRODUCT_NAME, "A9830IMS"),
  699. },
  700. },
  701. {
  702. .callback = intel_no_lvds_dmi_callback,
  703. .ident = "Dell Studio Hybrid",
  704. .matches = {
  705. DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
  706. DMI_MATCH(DMI_PRODUCT_NAME, "Studio Hybrid 140g"),
  707. },
  708. },
  709. {
  710. .callback = intel_no_lvds_dmi_callback,
  711. .ident = "AOpen Mini PC",
  712. .matches = {
  713. DMI_MATCH(DMI_SYS_VENDOR, "AOpen"),
  714. DMI_MATCH(DMI_PRODUCT_NAME, "i965GMx-IF"),
  715. },
  716. },
  717. {
  718. .callback = intel_no_lvds_dmi_callback,
  719. .ident = "AOpen Mini PC MP915",
  720. .matches = {
  721. DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
  722. DMI_MATCH(DMI_BOARD_NAME, "i915GMx-F"),
  723. },
  724. },
  725. {
  726. .callback = intel_no_lvds_dmi_callback,
  727. .ident = "Aopen i945GTt-VFA",
  728. .matches = {
  729. DMI_MATCH(DMI_PRODUCT_VERSION, "AO00001JW"),
  730. },
  731. },
  732. { } /* terminating entry */
  733. };
  734. #ifdef CONFIG_ACPI
  735. /*
  736. * check_lid_device -- check whether @handle is an ACPI LID device.
  737. * @handle: ACPI device handle
  738. * @level : depth in the ACPI namespace tree
  739. * @context: the number of LID device when we find the device
  740. * @rv: a return value to fill if desired (Not use)
  741. */
  742. static acpi_status
  743. check_lid_device(acpi_handle handle, u32 level, void *context,
  744. void **return_value)
  745. {
  746. struct acpi_device *acpi_dev;
  747. int *lid_present = context;
  748. acpi_dev = NULL;
  749. /* Get the acpi device for device handle */
  750. if (acpi_bus_get_device(handle, &acpi_dev) || !acpi_dev) {
  751. /* If there is no ACPI device for handle, return */
  752. return AE_OK;
  753. }
  754. if (!strncmp(acpi_device_hid(acpi_dev), "PNP0C0D", 7))
  755. *lid_present = 1;
  756. return AE_OK;
  757. }
  758. /**
  759. * check whether there exists the ACPI LID device by enumerating the ACPI
  760. * device tree.
  761. */
  762. static int intel_lid_present(void)
  763. {
  764. int lid_present = 0;
  765. if (acpi_disabled) {
  766. /* If ACPI is disabled, there is no ACPI device tree to
  767. * check, so assume the LID device would have been present.
  768. */
  769. return 1;
  770. }
  771. acpi_walk_namespace(ACPI_TYPE_DEVICE, ACPI_ROOT_OBJECT,
  772. ACPI_UINT32_MAX,
  773. check_lid_device, &lid_present, NULL);
  774. return lid_present;
  775. }
  776. #else
  777. static int intel_lid_present(void)
  778. {
  779. /* In the absence of ACPI built in, assume that the LID device would
  780. * have been present.
  781. */
  782. return 1;
  783. }
  784. #endif
  785. /**
  786. * intel_lvds_init - setup LVDS connectors on this device
  787. * @dev: drm device
  788. *
  789. * Create the connector, register the LVDS DDC bus, and try to figure out what
  790. * modes we can display on the LVDS panel (if present).
  791. */
  792. void intel_lvds_init(struct drm_device *dev)
  793. {
  794. struct drm_i915_private *dev_priv = dev->dev_private;
  795. struct intel_output *intel_output;
  796. struct drm_connector *connector;
  797. struct drm_encoder *encoder;
  798. struct drm_display_mode *scan; /* *modes, *bios_mode; */
  799. struct drm_crtc *crtc;
  800. struct intel_lvds_priv *lvds_priv;
  801. u32 lvds;
  802. int pipe, gpio = GPIOC;
  803. /* Skip init on machines we know falsely report LVDS */
  804. if (dmi_check_system(intel_no_lvds))
  805. return;
  806. /* Assume that any device without an ACPI LID device also doesn't
  807. * have an integrated LVDS. We would be better off parsing the BIOS
  808. * to get a reliable indicator, but that code isn't written yet.
  809. *
  810. * In the case of all-in-one desktops using LVDS that we've seen,
  811. * they're using SDVO LVDS.
  812. */
  813. if (!intel_lid_present())
  814. return;
  815. if (IS_IGDNG(dev)) {
  816. if ((I915_READ(PCH_LVDS) & LVDS_DETECTED) == 0)
  817. return;
  818. if (dev_priv->edp_support) {
  819. DRM_DEBUG("disable LVDS for eDP support\n");
  820. return;
  821. }
  822. gpio = PCH_GPIOC;
  823. }
  824. intel_output = kzalloc(sizeof(struct intel_output) +
  825. sizeof(struct intel_lvds_priv), GFP_KERNEL);
  826. if (!intel_output) {
  827. return;
  828. }
  829. connector = &intel_output->base;
  830. encoder = &intel_output->enc;
  831. drm_connector_init(dev, &intel_output->base, &intel_lvds_connector_funcs,
  832. DRM_MODE_CONNECTOR_LVDS);
  833. drm_encoder_init(dev, &intel_output->enc, &intel_lvds_enc_funcs,
  834. DRM_MODE_ENCODER_LVDS);
  835. drm_mode_connector_attach_encoder(&intel_output->base, &intel_output->enc);
  836. intel_output->type = INTEL_OUTPUT_LVDS;
  837. intel_output->clone_mask = (1 << INTEL_LVDS_CLONE_BIT);
  838. intel_output->crtc_mask = (1 << 1);
  839. drm_encoder_helper_add(encoder, &intel_lvds_helper_funcs);
  840. drm_connector_helper_add(connector, &intel_lvds_connector_helper_funcs);
  841. connector->display_info.subpixel_order = SubPixelHorizontalRGB;
  842. connector->interlace_allowed = false;
  843. connector->doublescan_allowed = false;
  844. lvds_priv = (struct intel_lvds_priv *)(intel_output + 1);
  845. intel_output->dev_priv = lvds_priv;
  846. /* create the scaling mode property */
  847. drm_mode_create_scaling_mode_property(dev);
  848. /*
  849. * the initial panel fitting mode will be FULL_SCREEN.
  850. */
  851. drm_connector_attach_property(&intel_output->base,
  852. dev->mode_config.scaling_mode_property,
  853. DRM_MODE_SCALE_FULLSCREEN);
  854. lvds_priv->fitting_mode = DRM_MODE_SCALE_FULLSCREEN;
  855. /*
  856. * LVDS discovery:
  857. * 1) check for EDID on DDC
  858. * 2) check for VBT data
  859. * 3) check to see if LVDS is already on
  860. * if none of the above, no panel
  861. * 4) make sure lid is open
  862. * if closed, act like it's not there for now
  863. */
  864. /* Set up the DDC bus. */
  865. intel_output->ddc_bus = intel_i2c_create(dev, gpio, "LVDSDDC_C");
  866. if (!intel_output->ddc_bus) {
  867. dev_printk(KERN_ERR, &dev->pdev->dev, "DDC bus registration "
  868. "failed.\n");
  869. goto failed;
  870. }
  871. /*
  872. * Attempt to get the fixed panel mode from DDC. Assume that the
  873. * preferred mode is the right one.
  874. */
  875. intel_ddc_get_modes(intel_output);
  876. list_for_each_entry(scan, &connector->probed_modes, head) {
  877. mutex_lock(&dev->mode_config.mutex);
  878. if (scan->type & DRM_MODE_TYPE_PREFERRED) {
  879. dev_priv->panel_fixed_mode =
  880. drm_mode_duplicate(dev, scan);
  881. mutex_unlock(&dev->mode_config.mutex);
  882. goto out;
  883. }
  884. mutex_unlock(&dev->mode_config.mutex);
  885. }
  886. /* Failed to get EDID, what about VBT? */
  887. if (dev_priv->lfp_lvds_vbt_mode) {
  888. mutex_lock(&dev->mode_config.mutex);
  889. dev_priv->panel_fixed_mode =
  890. drm_mode_duplicate(dev, dev_priv->lfp_lvds_vbt_mode);
  891. mutex_unlock(&dev->mode_config.mutex);
  892. if (dev_priv->panel_fixed_mode) {
  893. dev_priv->panel_fixed_mode->type |=
  894. DRM_MODE_TYPE_PREFERRED;
  895. goto out;
  896. }
  897. }
  898. /*
  899. * If we didn't get EDID, try checking if the panel is already turned
  900. * on. If so, assume that whatever is currently programmed is the
  901. * correct mode.
  902. */
  903. /* IGDNG: FIXME if still fail, not try pipe mode now */
  904. if (IS_IGDNG(dev))
  905. goto failed;
  906. lvds = I915_READ(LVDS);
  907. pipe = (lvds & LVDS_PIPEB_SELECT) ? 1 : 0;
  908. crtc = intel_get_crtc_from_pipe(dev, pipe);
  909. if (crtc && (lvds & LVDS_PORT_EN)) {
  910. dev_priv->panel_fixed_mode = intel_crtc_mode_get(dev, crtc);
  911. if (dev_priv->panel_fixed_mode) {
  912. dev_priv->panel_fixed_mode->type |=
  913. DRM_MODE_TYPE_PREFERRED;
  914. goto out;
  915. }
  916. }
  917. /* If we still don't have a mode after all that, give up. */
  918. if (!dev_priv->panel_fixed_mode)
  919. goto failed;
  920. out:
  921. if (IS_IGDNG(dev)) {
  922. u32 pwm;
  923. /* make sure PWM is enabled */
  924. pwm = I915_READ(BLC_PWM_CPU_CTL2);
  925. pwm |= (PWM_ENABLE | PWM_PIPE_B);
  926. I915_WRITE(BLC_PWM_CPU_CTL2, pwm);
  927. pwm = I915_READ(BLC_PWM_PCH_CTL1);
  928. pwm |= PWM_PCH_ENABLE;
  929. I915_WRITE(BLC_PWM_PCH_CTL1, pwm);
  930. }
  931. dev_priv->lid_notifier.notifier_call = intel_lid_notify;
  932. if (acpi_lid_notifier_register(&dev_priv->lid_notifier)) {
  933. DRM_DEBUG("lid notifier registration failed\n");
  934. dev_priv->lid_notifier.notifier_call = NULL;
  935. }
  936. drm_sysfs_connector_add(connector);
  937. return;
  938. failed:
  939. DRM_DEBUG_KMS("No LVDS modes found, disabling.\n");
  940. if (intel_output->ddc_bus)
  941. intel_i2c_destroy(intel_output->ddc_bus);
  942. drm_connector_cleanup(connector);
  943. kfree(intel_output);
  944. }