pci-sysfs.c 34 KB

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  1. /*
  2. * drivers/pci/pci-sysfs.c
  3. *
  4. * (C) Copyright 2002-2004 Greg Kroah-Hartman <greg@kroah.com>
  5. * (C) Copyright 2002-2004 IBM Corp.
  6. * (C) Copyright 2003 Matthew Wilcox
  7. * (C) Copyright 2003 Hewlett-Packard
  8. * (C) Copyright 2004 Jon Smirl <jonsmirl@yahoo.com>
  9. * (C) Copyright 2004 Silicon Graphics, Inc. Jesse Barnes <jbarnes@sgi.com>
  10. *
  11. * File attributes for PCI devices
  12. *
  13. * Modeled after usb's driverfs.c
  14. *
  15. */
  16. #include <linux/kernel.h>
  17. #include <linux/sched.h>
  18. #include <linux/pci.h>
  19. #include <linux/stat.h>
  20. #include <linux/export.h>
  21. #include <linux/topology.h>
  22. #include <linux/mm.h>
  23. #include <linux/fs.h>
  24. #include <linux/capability.h>
  25. #include <linux/security.h>
  26. #include <linux/pci-aspm.h>
  27. #include <linux/slab.h>
  28. #include <linux/vgaarb.h>
  29. #include <linux/pm_runtime.h>
  30. #include "pci.h"
  31. static int sysfs_initialized; /* = 0 */
  32. /* show configuration fields */
  33. #define pci_config_attr(field, format_string) \
  34. static ssize_t \
  35. field##_show(struct device *dev, struct device_attribute *attr, char *buf) \
  36. { \
  37. struct pci_dev *pdev; \
  38. \
  39. pdev = to_pci_dev (dev); \
  40. return sprintf (buf, format_string, pdev->field); \
  41. }
  42. pci_config_attr(vendor, "0x%04x\n");
  43. pci_config_attr(device, "0x%04x\n");
  44. pci_config_attr(subsystem_vendor, "0x%04x\n");
  45. pci_config_attr(subsystem_device, "0x%04x\n");
  46. pci_config_attr(class, "0x%06x\n");
  47. pci_config_attr(irq, "%u\n");
  48. static ssize_t broken_parity_status_show(struct device *dev,
  49. struct device_attribute *attr,
  50. char *buf)
  51. {
  52. struct pci_dev *pdev = to_pci_dev(dev);
  53. return sprintf (buf, "%u\n", pdev->broken_parity_status);
  54. }
  55. static ssize_t broken_parity_status_store(struct device *dev,
  56. struct device_attribute *attr,
  57. const char *buf, size_t count)
  58. {
  59. struct pci_dev *pdev = to_pci_dev(dev);
  60. unsigned long val;
  61. if (strict_strtoul(buf, 0, &val) < 0)
  62. return -EINVAL;
  63. pdev->broken_parity_status = !!val;
  64. return count;
  65. }
  66. static ssize_t local_cpus_show(struct device *dev,
  67. struct device_attribute *attr, char *buf)
  68. {
  69. const struct cpumask *mask;
  70. int len;
  71. #ifdef CONFIG_NUMA
  72. mask = (dev_to_node(dev) == -1) ? cpu_online_mask :
  73. cpumask_of_node(dev_to_node(dev));
  74. #else
  75. mask = cpumask_of_pcibus(to_pci_dev(dev)->bus);
  76. #endif
  77. len = cpumask_scnprintf(buf, PAGE_SIZE-2, mask);
  78. buf[len++] = '\n';
  79. buf[len] = '\0';
  80. return len;
  81. }
  82. static ssize_t local_cpulist_show(struct device *dev,
  83. struct device_attribute *attr, char *buf)
  84. {
  85. const struct cpumask *mask;
  86. int len;
  87. #ifdef CONFIG_NUMA
  88. mask = (dev_to_node(dev) == -1) ? cpu_online_mask :
  89. cpumask_of_node(dev_to_node(dev));
  90. #else
  91. mask = cpumask_of_pcibus(to_pci_dev(dev)->bus);
  92. #endif
  93. len = cpulist_scnprintf(buf, PAGE_SIZE-2, mask);
  94. buf[len++] = '\n';
  95. buf[len] = '\0';
  96. return len;
  97. }
  98. /*
  99. * PCI Bus Class Devices
  100. */
  101. static ssize_t pci_bus_show_cpuaffinity(struct device *dev,
  102. int type,
  103. struct device_attribute *attr,
  104. char *buf)
  105. {
  106. int ret;
  107. const struct cpumask *cpumask;
  108. cpumask = cpumask_of_pcibus(to_pci_bus(dev));
  109. ret = type ?
  110. cpulist_scnprintf(buf, PAGE_SIZE-2, cpumask) :
  111. cpumask_scnprintf(buf, PAGE_SIZE-2, cpumask);
  112. buf[ret++] = '\n';
  113. buf[ret] = '\0';
  114. return ret;
  115. }
  116. static inline ssize_t pci_bus_show_cpumaskaffinity(struct device *dev,
  117. struct device_attribute *attr,
  118. char *buf)
  119. {
  120. return pci_bus_show_cpuaffinity(dev, 0, attr, buf);
  121. }
  122. static inline ssize_t pci_bus_show_cpulistaffinity(struct device *dev,
  123. struct device_attribute *attr,
  124. char *buf)
  125. {
  126. return pci_bus_show_cpuaffinity(dev, 1, attr, buf);
  127. }
  128. /* show resources */
  129. static ssize_t
  130. resource_show(struct device * dev, struct device_attribute *attr, char * buf)
  131. {
  132. struct pci_dev * pci_dev = to_pci_dev(dev);
  133. char * str = buf;
  134. int i;
  135. int max;
  136. resource_size_t start, end;
  137. if (pci_dev->subordinate)
  138. max = DEVICE_COUNT_RESOURCE;
  139. else
  140. max = PCI_BRIDGE_RESOURCES;
  141. for (i = 0; i < max; i++) {
  142. struct resource *res = &pci_dev->resource[i];
  143. pci_resource_to_user(pci_dev, i, res, &start, &end);
  144. str += sprintf(str,"0x%016llx 0x%016llx 0x%016llx\n",
  145. (unsigned long long)start,
  146. (unsigned long long)end,
  147. (unsigned long long)res->flags);
  148. }
  149. return (str - buf);
  150. }
  151. static ssize_t modalias_show(struct device *dev, struct device_attribute *attr, char *buf)
  152. {
  153. struct pci_dev *pci_dev = to_pci_dev(dev);
  154. return sprintf(buf, "pci:v%08Xd%08Xsv%08Xsd%08Xbc%02Xsc%02Xi%02x\n",
  155. pci_dev->vendor, pci_dev->device,
  156. pci_dev->subsystem_vendor, pci_dev->subsystem_device,
  157. (u8)(pci_dev->class >> 16), (u8)(pci_dev->class >> 8),
  158. (u8)(pci_dev->class));
  159. }
  160. static ssize_t is_enabled_store(struct device *dev,
  161. struct device_attribute *attr, const char *buf,
  162. size_t count)
  163. {
  164. struct pci_dev *pdev = to_pci_dev(dev);
  165. unsigned long val;
  166. ssize_t result = strict_strtoul(buf, 0, &val);
  167. if (result < 0)
  168. return result;
  169. /* this can crash the machine when done on the "wrong" device */
  170. if (!capable(CAP_SYS_ADMIN))
  171. return -EPERM;
  172. if (!val) {
  173. if (pci_is_enabled(pdev))
  174. pci_disable_device(pdev);
  175. else
  176. result = -EIO;
  177. } else
  178. result = pci_enable_device(pdev);
  179. return result < 0 ? result : count;
  180. }
  181. static ssize_t is_enabled_show(struct device *dev,
  182. struct device_attribute *attr, char *buf)
  183. {
  184. struct pci_dev *pdev;
  185. pdev = to_pci_dev (dev);
  186. return sprintf (buf, "%u\n", atomic_read(&pdev->enable_cnt));
  187. }
  188. #ifdef CONFIG_NUMA
  189. static ssize_t
  190. numa_node_show(struct device *dev, struct device_attribute *attr, char *buf)
  191. {
  192. return sprintf (buf, "%d\n", dev->numa_node);
  193. }
  194. #endif
  195. static ssize_t
  196. dma_mask_bits_show(struct device *dev, struct device_attribute *attr, char *buf)
  197. {
  198. struct pci_dev *pdev = to_pci_dev(dev);
  199. return sprintf (buf, "%d\n", fls64(pdev->dma_mask));
  200. }
  201. static ssize_t
  202. consistent_dma_mask_bits_show(struct device *dev, struct device_attribute *attr,
  203. char *buf)
  204. {
  205. return sprintf (buf, "%d\n", fls64(dev->coherent_dma_mask));
  206. }
  207. static ssize_t
  208. msi_bus_show(struct device *dev, struct device_attribute *attr, char *buf)
  209. {
  210. struct pci_dev *pdev = to_pci_dev(dev);
  211. if (!pdev->subordinate)
  212. return 0;
  213. return sprintf (buf, "%u\n",
  214. !(pdev->subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI));
  215. }
  216. static ssize_t
  217. msi_bus_store(struct device *dev, struct device_attribute *attr,
  218. const char *buf, size_t count)
  219. {
  220. struct pci_dev *pdev = to_pci_dev(dev);
  221. unsigned long val;
  222. if (strict_strtoul(buf, 0, &val) < 0)
  223. return -EINVAL;
  224. /* bad things may happen if the no_msi flag is changed
  225. * while some drivers are loaded */
  226. if (!capable(CAP_SYS_ADMIN))
  227. return -EPERM;
  228. /* Maybe pci devices without subordinate busses shouldn't even have this
  229. * attribute in the first place? */
  230. if (!pdev->subordinate)
  231. return count;
  232. /* Is the flag going to change, or keep the value it already had? */
  233. if (!(pdev->subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI) ^
  234. !!val) {
  235. pdev->subordinate->bus_flags ^= PCI_BUS_FLAGS_NO_MSI;
  236. dev_warn(&pdev->dev, "forced subordinate bus to%s support MSI,"
  237. " bad things could happen\n", val ? "" : " not");
  238. }
  239. return count;
  240. }
  241. static DEFINE_MUTEX(pci_remove_rescan_mutex);
  242. static ssize_t bus_rescan_store(struct bus_type *bus, const char *buf,
  243. size_t count)
  244. {
  245. unsigned long val;
  246. struct pci_bus *b = NULL;
  247. if (strict_strtoul(buf, 0, &val) < 0)
  248. return -EINVAL;
  249. if (val) {
  250. mutex_lock(&pci_remove_rescan_mutex);
  251. while ((b = pci_find_next_bus(b)) != NULL)
  252. pci_rescan_bus(b);
  253. mutex_unlock(&pci_remove_rescan_mutex);
  254. }
  255. return count;
  256. }
  257. struct bus_attribute pci_bus_attrs[] = {
  258. __ATTR(rescan, (S_IWUSR|S_IWGRP), NULL, bus_rescan_store),
  259. __ATTR_NULL
  260. };
  261. static ssize_t
  262. dev_rescan_store(struct device *dev, struct device_attribute *attr,
  263. const char *buf, size_t count)
  264. {
  265. unsigned long val;
  266. struct pci_dev *pdev = to_pci_dev(dev);
  267. if (strict_strtoul(buf, 0, &val) < 0)
  268. return -EINVAL;
  269. if (val) {
  270. mutex_lock(&pci_remove_rescan_mutex);
  271. pci_rescan_bus(pdev->bus);
  272. mutex_unlock(&pci_remove_rescan_mutex);
  273. }
  274. return count;
  275. }
  276. static void remove_callback(struct device *dev)
  277. {
  278. struct pci_dev *pdev = to_pci_dev(dev);
  279. mutex_lock(&pci_remove_rescan_mutex);
  280. pci_stop_and_remove_bus_device(pdev);
  281. mutex_unlock(&pci_remove_rescan_mutex);
  282. }
  283. static ssize_t
  284. remove_store(struct device *dev, struct device_attribute *dummy,
  285. const char *buf, size_t count)
  286. {
  287. int ret = 0;
  288. unsigned long val;
  289. if (strict_strtoul(buf, 0, &val) < 0)
  290. return -EINVAL;
  291. /* An attribute cannot be unregistered by one of its own methods,
  292. * so we have to use this roundabout approach.
  293. */
  294. if (val)
  295. ret = device_schedule_callback(dev, remove_callback);
  296. if (ret)
  297. count = ret;
  298. return count;
  299. }
  300. static ssize_t
  301. dev_bus_rescan_store(struct device *dev, struct device_attribute *attr,
  302. const char *buf, size_t count)
  303. {
  304. unsigned long val;
  305. struct pci_bus *bus = to_pci_bus(dev);
  306. if (strict_strtoul(buf, 0, &val) < 0)
  307. return -EINVAL;
  308. if (val) {
  309. mutex_lock(&pci_remove_rescan_mutex);
  310. if (!pci_is_root_bus(bus) && list_empty(&bus->devices))
  311. pci_rescan_bus_bridge_resize(bus->self);
  312. else
  313. pci_rescan_bus(bus);
  314. mutex_unlock(&pci_remove_rescan_mutex);
  315. }
  316. return count;
  317. }
  318. #if defined(CONFIG_PM_RUNTIME) && defined(CONFIG_ACPI)
  319. static ssize_t d3cold_allowed_store(struct device *dev,
  320. struct device_attribute *attr,
  321. const char *buf, size_t count)
  322. {
  323. struct pci_dev *pdev = to_pci_dev(dev);
  324. unsigned long val;
  325. if (strict_strtoul(buf, 0, &val) < 0)
  326. return -EINVAL;
  327. pdev->d3cold_allowed = !!val;
  328. pm_runtime_resume(dev);
  329. return count;
  330. }
  331. static ssize_t d3cold_allowed_show(struct device *dev,
  332. struct device_attribute *attr, char *buf)
  333. {
  334. struct pci_dev *pdev = to_pci_dev(dev);
  335. return sprintf (buf, "%u\n", pdev->d3cold_allowed);
  336. }
  337. #endif
  338. struct device_attribute pci_dev_attrs[] = {
  339. __ATTR_RO(resource),
  340. __ATTR_RO(vendor),
  341. __ATTR_RO(device),
  342. __ATTR_RO(subsystem_vendor),
  343. __ATTR_RO(subsystem_device),
  344. __ATTR_RO(class),
  345. __ATTR_RO(irq),
  346. __ATTR_RO(local_cpus),
  347. __ATTR_RO(local_cpulist),
  348. __ATTR_RO(modalias),
  349. #ifdef CONFIG_NUMA
  350. __ATTR_RO(numa_node),
  351. #endif
  352. __ATTR_RO(dma_mask_bits),
  353. __ATTR_RO(consistent_dma_mask_bits),
  354. __ATTR(enable, 0600, is_enabled_show, is_enabled_store),
  355. __ATTR(broken_parity_status,(S_IRUGO|S_IWUSR),
  356. broken_parity_status_show,broken_parity_status_store),
  357. __ATTR(msi_bus, 0644, msi_bus_show, msi_bus_store),
  358. __ATTR(remove, (S_IWUSR|S_IWGRP), NULL, remove_store),
  359. __ATTR(rescan, (S_IWUSR|S_IWGRP), NULL, dev_rescan_store),
  360. #if defined(CONFIG_PM_RUNTIME) && defined(CONFIG_ACPI)
  361. __ATTR(d3cold_allowed, 0644, d3cold_allowed_show, d3cold_allowed_store),
  362. #endif
  363. __ATTR_NULL,
  364. };
  365. struct device_attribute pcibus_dev_attrs[] = {
  366. __ATTR(rescan, (S_IWUSR|S_IWGRP), NULL, dev_bus_rescan_store),
  367. __ATTR(cpuaffinity, S_IRUGO, pci_bus_show_cpumaskaffinity, NULL),
  368. __ATTR(cpulistaffinity, S_IRUGO, pci_bus_show_cpulistaffinity, NULL),
  369. __ATTR_NULL,
  370. };
  371. static ssize_t
  372. boot_vga_show(struct device *dev, struct device_attribute *attr, char *buf)
  373. {
  374. struct pci_dev *pdev = to_pci_dev(dev);
  375. struct pci_dev *vga_dev = vga_default_device();
  376. if (vga_dev)
  377. return sprintf(buf, "%u\n", (pdev == vga_dev));
  378. return sprintf(buf, "%u\n",
  379. !!(pdev->resource[PCI_ROM_RESOURCE].flags &
  380. IORESOURCE_ROM_SHADOW));
  381. }
  382. struct device_attribute vga_attr = __ATTR_RO(boot_vga);
  383. static ssize_t
  384. pci_read_config(struct file *filp, struct kobject *kobj,
  385. struct bin_attribute *bin_attr,
  386. char *buf, loff_t off, size_t count)
  387. {
  388. struct pci_dev *dev = to_pci_dev(container_of(kobj,struct device,kobj));
  389. unsigned int size = 64;
  390. loff_t init_off = off;
  391. u8 *data = (u8*) buf;
  392. /* Several chips lock up trying to read undefined config space */
  393. if (security_capable(filp->f_cred, &init_user_ns, CAP_SYS_ADMIN) == 0) {
  394. size = dev->cfg_size;
  395. } else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS) {
  396. size = 128;
  397. }
  398. if (off > size)
  399. return 0;
  400. if (off + count > size) {
  401. size -= off;
  402. count = size;
  403. } else {
  404. size = count;
  405. }
  406. pci_config_pm_runtime_get(dev);
  407. if ((off & 1) && size) {
  408. u8 val;
  409. pci_user_read_config_byte(dev, off, &val);
  410. data[off - init_off] = val;
  411. off++;
  412. size--;
  413. }
  414. if ((off & 3) && size > 2) {
  415. u16 val;
  416. pci_user_read_config_word(dev, off, &val);
  417. data[off - init_off] = val & 0xff;
  418. data[off - init_off + 1] = (val >> 8) & 0xff;
  419. off += 2;
  420. size -= 2;
  421. }
  422. while (size > 3) {
  423. u32 val;
  424. pci_user_read_config_dword(dev, off, &val);
  425. data[off - init_off] = val & 0xff;
  426. data[off - init_off + 1] = (val >> 8) & 0xff;
  427. data[off - init_off + 2] = (val >> 16) & 0xff;
  428. data[off - init_off + 3] = (val >> 24) & 0xff;
  429. off += 4;
  430. size -= 4;
  431. }
  432. if (size >= 2) {
  433. u16 val;
  434. pci_user_read_config_word(dev, off, &val);
  435. data[off - init_off] = val & 0xff;
  436. data[off - init_off + 1] = (val >> 8) & 0xff;
  437. off += 2;
  438. size -= 2;
  439. }
  440. if (size > 0) {
  441. u8 val;
  442. pci_user_read_config_byte(dev, off, &val);
  443. data[off - init_off] = val;
  444. off++;
  445. --size;
  446. }
  447. pci_config_pm_runtime_put(dev);
  448. return count;
  449. }
  450. static ssize_t
  451. pci_write_config(struct file* filp, struct kobject *kobj,
  452. struct bin_attribute *bin_attr,
  453. char *buf, loff_t off, size_t count)
  454. {
  455. struct pci_dev *dev = to_pci_dev(container_of(kobj,struct device,kobj));
  456. unsigned int size = count;
  457. loff_t init_off = off;
  458. u8 *data = (u8*) buf;
  459. if (off > dev->cfg_size)
  460. return 0;
  461. if (off + count > dev->cfg_size) {
  462. size = dev->cfg_size - off;
  463. count = size;
  464. }
  465. pci_config_pm_runtime_get(dev);
  466. if ((off & 1) && size) {
  467. pci_user_write_config_byte(dev, off, data[off - init_off]);
  468. off++;
  469. size--;
  470. }
  471. if ((off & 3) && size > 2) {
  472. u16 val = data[off - init_off];
  473. val |= (u16) data[off - init_off + 1] << 8;
  474. pci_user_write_config_word(dev, off, val);
  475. off += 2;
  476. size -= 2;
  477. }
  478. while (size > 3) {
  479. u32 val = data[off - init_off];
  480. val |= (u32) data[off - init_off + 1] << 8;
  481. val |= (u32) data[off - init_off + 2] << 16;
  482. val |= (u32) data[off - init_off + 3] << 24;
  483. pci_user_write_config_dword(dev, off, val);
  484. off += 4;
  485. size -= 4;
  486. }
  487. if (size >= 2) {
  488. u16 val = data[off - init_off];
  489. val |= (u16) data[off - init_off + 1] << 8;
  490. pci_user_write_config_word(dev, off, val);
  491. off += 2;
  492. size -= 2;
  493. }
  494. if (size) {
  495. pci_user_write_config_byte(dev, off, data[off - init_off]);
  496. off++;
  497. --size;
  498. }
  499. pci_config_pm_runtime_put(dev);
  500. return count;
  501. }
  502. static ssize_t
  503. read_vpd_attr(struct file *filp, struct kobject *kobj,
  504. struct bin_attribute *bin_attr,
  505. char *buf, loff_t off, size_t count)
  506. {
  507. struct pci_dev *dev =
  508. to_pci_dev(container_of(kobj, struct device, kobj));
  509. if (off > bin_attr->size)
  510. count = 0;
  511. else if (count > bin_attr->size - off)
  512. count = bin_attr->size - off;
  513. return pci_read_vpd(dev, off, count, buf);
  514. }
  515. static ssize_t
  516. write_vpd_attr(struct file *filp, struct kobject *kobj,
  517. struct bin_attribute *bin_attr,
  518. char *buf, loff_t off, size_t count)
  519. {
  520. struct pci_dev *dev =
  521. to_pci_dev(container_of(kobj, struct device, kobj));
  522. if (off > bin_attr->size)
  523. count = 0;
  524. else if (count > bin_attr->size - off)
  525. count = bin_attr->size - off;
  526. return pci_write_vpd(dev, off, count, buf);
  527. }
  528. #ifdef HAVE_PCI_LEGACY
  529. /**
  530. * pci_read_legacy_io - read byte(s) from legacy I/O port space
  531. * @filp: open sysfs file
  532. * @kobj: kobject corresponding to file to read from
  533. * @bin_attr: struct bin_attribute for this file
  534. * @buf: buffer to store results
  535. * @off: offset into legacy I/O port space
  536. * @count: number of bytes to read
  537. *
  538. * Reads 1, 2, or 4 bytes from legacy I/O port space using an arch specific
  539. * callback routine (pci_legacy_read).
  540. */
  541. static ssize_t
  542. pci_read_legacy_io(struct file *filp, struct kobject *kobj,
  543. struct bin_attribute *bin_attr,
  544. char *buf, loff_t off, size_t count)
  545. {
  546. struct pci_bus *bus = to_pci_bus(container_of(kobj,
  547. struct device,
  548. kobj));
  549. /* Only support 1, 2 or 4 byte accesses */
  550. if (count != 1 && count != 2 && count != 4)
  551. return -EINVAL;
  552. return pci_legacy_read(bus, off, (u32 *)buf, count);
  553. }
  554. /**
  555. * pci_write_legacy_io - write byte(s) to legacy I/O port space
  556. * @filp: open sysfs file
  557. * @kobj: kobject corresponding to file to read from
  558. * @bin_attr: struct bin_attribute for this file
  559. * @buf: buffer containing value to be written
  560. * @off: offset into legacy I/O port space
  561. * @count: number of bytes to write
  562. *
  563. * Writes 1, 2, or 4 bytes from legacy I/O port space using an arch specific
  564. * callback routine (pci_legacy_write).
  565. */
  566. static ssize_t
  567. pci_write_legacy_io(struct file *filp, struct kobject *kobj,
  568. struct bin_attribute *bin_attr,
  569. char *buf, loff_t off, size_t count)
  570. {
  571. struct pci_bus *bus = to_pci_bus(container_of(kobj,
  572. struct device,
  573. kobj));
  574. /* Only support 1, 2 or 4 byte accesses */
  575. if (count != 1 && count != 2 && count != 4)
  576. return -EINVAL;
  577. return pci_legacy_write(bus, off, *(u32 *)buf, count);
  578. }
  579. /**
  580. * pci_mmap_legacy_mem - map legacy PCI memory into user memory space
  581. * @filp: open sysfs file
  582. * @kobj: kobject corresponding to device to be mapped
  583. * @attr: struct bin_attribute for this file
  584. * @vma: struct vm_area_struct passed to mmap
  585. *
  586. * Uses an arch specific callback, pci_mmap_legacy_mem_page_range, to mmap
  587. * legacy memory space (first meg of bus space) into application virtual
  588. * memory space.
  589. */
  590. static int
  591. pci_mmap_legacy_mem(struct file *filp, struct kobject *kobj,
  592. struct bin_attribute *attr,
  593. struct vm_area_struct *vma)
  594. {
  595. struct pci_bus *bus = to_pci_bus(container_of(kobj,
  596. struct device,
  597. kobj));
  598. return pci_mmap_legacy_page_range(bus, vma, pci_mmap_mem);
  599. }
  600. /**
  601. * pci_mmap_legacy_io - map legacy PCI IO into user memory space
  602. * @filp: open sysfs file
  603. * @kobj: kobject corresponding to device to be mapped
  604. * @attr: struct bin_attribute for this file
  605. * @vma: struct vm_area_struct passed to mmap
  606. *
  607. * Uses an arch specific callback, pci_mmap_legacy_io_page_range, to mmap
  608. * legacy IO space (first meg of bus space) into application virtual
  609. * memory space. Returns -ENOSYS if the operation isn't supported
  610. */
  611. static int
  612. pci_mmap_legacy_io(struct file *filp, struct kobject *kobj,
  613. struct bin_attribute *attr,
  614. struct vm_area_struct *vma)
  615. {
  616. struct pci_bus *bus = to_pci_bus(container_of(kobj,
  617. struct device,
  618. kobj));
  619. return pci_mmap_legacy_page_range(bus, vma, pci_mmap_io);
  620. }
  621. /**
  622. * pci_adjust_legacy_attr - adjustment of legacy file attributes
  623. * @b: bus to create files under
  624. * @mmap_type: I/O port or memory
  625. *
  626. * Stub implementation. Can be overridden by arch if necessary.
  627. */
  628. void __weak
  629. pci_adjust_legacy_attr(struct pci_bus *b, enum pci_mmap_state mmap_type)
  630. {
  631. return;
  632. }
  633. /**
  634. * pci_create_legacy_files - create legacy I/O port and memory files
  635. * @b: bus to create files under
  636. *
  637. * Some platforms allow access to legacy I/O port and ISA memory space on
  638. * a per-bus basis. This routine creates the files and ties them into
  639. * their associated read, write and mmap files from pci-sysfs.c
  640. *
  641. * On error unwind, but don't propagate the error to the caller
  642. * as it is ok to set up the PCI bus without these files.
  643. */
  644. void pci_create_legacy_files(struct pci_bus *b)
  645. {
  646. int error;
  647. b->legacy_io = kzalloc(sizeof(struct bin_attribute) * 2,
  648. GFP_ATOMIC);
  649. if (!b->legacy_io)
  650. goto kzalloc_err;
  651. sysfs_bin_attr_init(b->legacy_io);
  652. b->legacy_io->attr.name = "legacy_io";
  653. b->legacy_io->size = 0xffff;
  654. b->legacy_io->attr.mode = S_IRUSR | S_IWUSR;
  655. b->legacy_io->read = pci_read_legacy_io;
  656. b->legacy_io->write = pci_write_legacy_io;
  657. b->legacy_io->mmap = pci_mmap_legacy_io;
  658. pci_adjust_legacy_attr(b, pci_mmap_io);
  659. error = device_create_bin_file(&b->dev, b->legacy_io);
  660. if (error)
  661. goto legacy_io_err;
  662. /* Allocated above after the legacy_io struct */
  663. b->legacy_mem = b->legacy_io + 1;
  664. sysfs_bin_attr_init(b->legacy_mem);
  665. b->legacy_mem->attr.name = "legacy_mem";
  666. b->legacy_mem->size = 1024*1024;
  667. b->legacy_mem->attr.mode = S_IRUSR | S_IWUSR;
  668. b->legacy_mem->mmap = pci_mmap_legacy_mem;
  669. pci_adjust_legacy_attr(b, pci_mmap_mem);
  670. error = device_create_bin_file(&b->dev, b->legacy_mem);
  671. if (error)
  672. goto legacy_mem_err;
  673. return;
  674. legacy_mem_err:
  675. device_remove_bin_file(&b->dev, b->legacy_io);
  676. legacy_io_err:
  677. kfree(b->legacy_io);
  678. b->legacy_io = NULL;
  679. kzalloc_err:
  680. printk(KERN_WARNING "pci: warning: could not create legacy I/O port "
  681. "and ISA memory resources to sysfs\n");
  682. return;
  683. }
  684. void pci_remove_legacy_files(struct pci_bus *b)
  685. {
  686. if (b->legacy_io) {
  687. device_remove_bin_file(&b->dev, b->legacy_io);
  688. device_remove_bin_file(&b->dev, b->legacy_mem);
  689. kfree(b->legacy_io); /* both are allocated here */
  690. }
  691. }
  692. #endif /* HAVE_PCI_LEGACY */
  693. #ifdef HAVE_PCI_MMAP
  694. int pci_mmap_fits(struct pci_dev *pdev, int resno, struct vm_area_struct *vma,
  695. enum pci_mmap_api mmap_api)
  696. {
  697. unsigned long nr, start, size, pci_start;
  698. if (pci_resource_len(pdev, resno) == 0)
  699. return 0;
  700. nr = (vma->vm_end - vma->vm_start) >> PAGE_SHIFT;
  701. start = vma->vm_pgoff;
  702. size = ((pci_resource_len(pdev, resno) - 1) >> PAGE_SHIFT) + 1;
  703. pci_start = (mmap_api == PCI_MMAP_PROCFS) ?
  704. pci_resource_start(pdev, resno) >> PAGE_SHIFT : 0;
  705. if (start >= pci_start && start < pci_start + size &&
  706. start + nr <= pci_start + size)
  707. return 1;
  708. return 0;
  709. }
  710. /**
  711. * pci_mmap_resource - map a PCI resource into user memory space
  712. * @kobj: kobject for mapping
  713. * @attr: struct bin_attribute for the file being mapped
  714. * @vma: struct vm_area_struct passed into the mmap
  715. * @write_combine: 1 for write_combine mapping
  716. *
  717. * Use the regular PCI mapping routines to map a PCI resource into userspace.
  718. */
  719. static int
  720. pci_mmap_resource(struct kobject *kobj, struct bin_attribute *attr,
  721. struct vm_area_struct *vma, int write_combine)
  722. {
  723. struct pci_dev *pdev = to_pci_dev(container_of(kobj,
  724. struct device, kobj));
  725. struct resource *res = attr->private;
  726. enum pci_mmap_state mmap_type;
  727. resource_size_t start, end;
  728. int i;
  729. for (i = 0; i < PCI_ROM_RESOURCE; i++)
  730. if (res == &pdev->resource[i])
  731. break;
  732. if (i >= PCI_ROM_RESOURCE)
  733. return -ENODEV;
  734. if (!pci_mmap_fits(pdev, i, vma, PCI_MMAP_SYSFS)) {
  735. WARN(1, "process \"%s\" tried to map 0x%08lx bytes "
  736. "at page 0x%08lx on %s BAR %d (start 0x%16Lx, size 0x%16Lx)\n",
  737. current->comm, vma->vm_end-vma->vm_start, vma->vm_pgoff,
  738. pci_name(pdev), i,
  739. (u64)pci_resource_start(pdev, i),
  740. (u64)pci_resource_len(pdev, i));
  741. return -EINVAL;
  742. }
  743. /* pci_mmap_page_range() expects the same kind of entry as coming
  744. * from /proc/bus/pci/ which is a "user visible" value. If this is
  745. * different from the resource itself, arch will do necessary fixup.
  746. */
  747. pci_resource_to_user(pdev, i, res, &start, &end);
  748. vma->vm_pgoff += start >> PAGE_SHIFT;
  749. mmap_type = res->flags & IORESOURCE_MEM ? pci_mmap_mem : pci_mmap_io;
  750. if (res->flags & IORESOURCE_MEM && iomem_is_exclusive(start))
  751. return -EINVAL;
  752. return pci_mmap_page_range(pdev, vma, mmap_type, write_combine);
  753. }
  754. static int
  755. pci_mmap_resource_uc(struct file *filp, struct kobject *kobj,
  756. struct bin_attribute *attr,
  757. struct vm_area_struct *vma)
  758. {
  759. return pci_mmap_resource(kobj, attr, vma, 0);
  760. }
  761. static int
  762. pci_mmap_resource_wc(struct file *filp, struct kobject *kobj,
  763. struct bin_attribute *attr,
  764. struct vm_area_struct *vma)
  765. {
  766. return pci_mmap_resource(kobj, attr, vma, 1);
  767. }
  768. static ssize_t
  769. pci_resource_io(struct file *filp, struct kobject *kobj,
  770. struct bin_attribute *attr, char *buf,
  771. loff_t off, size_t count, bool write)
  772. {
  773. struct pci_dev *pdev = to_pci_dev(container_of(kobj,
  774. struct device, kobj));
  775. struct resource *res = attr->private;
  776. unsigned long port = off;
  777. int i;
  778. for (i = 0; i < PCI_ROM_RESOURCE; i++)
  779. if (res == &pdev->resource[i])
  780. break;
  781. if (i >= PCI_ROM_RESOURCE)
  782. return -ENODEV;
  783. port += pci_resource_start(pdev, i);
  784. if (port > pci_resource_end(pdev, i))
  785. return 0;
  786. if (port + count - 1 > pci_resource_end(pdev, i))
  787. return -EINVAL;
  788. switch (count) {
  789. case 1:
  790. if (write)
  791. outb(*(u8 *)buf, port);
  792. else
  793. *(u8 *)buf = inb(port);
  794. return 1;
  795. case 2:
  796. if (write)
  797. outw(*(u16 *)buf, port);
  798. else
  799. *(u16 *)buf = inw(port);
  800. return 2;
  801. case 4:
  802. if (write)
  803. outl(*(u32 *)buf, port);
  804. else
  805. *(u32 *)buf = inl(port);
  806. return 4;
  807. }
  808. return -EINVAL;
  809. }
  810. static ssize_t
  811. pci_read_resource_io(struct file *filp, struct kobject *kobj,
  812. struct bin_attribute *attr, char *buf,
  813. loff_t off, size_t count)
  814. {
  815. return pci_resource_io(filp, kobj, attr, buf, off, count, false);
  816. }
  817. static ssize_t
  818. pci_write_resource_io(struct file *filp, struct kobject *kobj,
  819. struct bin_attribute *attr, char *buf,
  820. loff_t off, size_t count)
  821. {
  822. return pci_resource_io(filp, kobj, attr, buf, off, count, true);
  823. }
  824. /**
  825. * pci_remove_resource_files - cleanup resource files
  826. * @pdev: dev to cleanup
  827. *
  828. * If we created resource files for @pdev, remove them from sysfs and
  829. * free their resources.
  830. */
  831. static void
  832. pci_remove_resource_files(struct pci_dev *pdev)
  833. {
  834. int i;
  835. for (i = 0; i < PCI_ROM_RESOURCE; i++) {
  836. struct bin_attribute *res_attr;
  837. res_attr = pdev->res_attr[i];
  838. if (res_attr) {
  839. sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
  840. kfree(res_attr);
  841. }
  842. res_attr = pdev->res_attr_wc[i];
  843. if (res_attr) {
  844. sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
  845. kfree(res_attr);
  846. }
  847. }
  848. }
  849. static int pci_create_attr(struct pci_dev *pdev, int num, int write_combine)
  850. {
  851. /* allocate attribute structure, piggyback attribute name */
  852. int name_len = write_combine ? 13 : 10;
  853. struct bin_attribute *res_attr;
  854. int retval;
  855. res_attr = kzalloc(sizeof(*res_attr) + name_len, GFP_ATOMIC);
  856. if (res_attr) {
  857. char *res_attr_name = (char *)(res_attr + 1);
  858. sysfs_bin_attr_init(res_attr);
  859. if (write_combine) {
  860. pdev->res_attr_wc[num] = res_attr;
  861. sprintf(res_attr_name, "resource%d_wc", num);
  862. res_attr->mmap = pci_mmap_resource_wc;
  863. } else {
  864. pdev->res_attr[num] = res_attr;
  865. sprintf(res_attr_name, "resource%d", num);
  866. res_attr->mmap = pci_mmap_resource_uc;
  867. }
  868. if (pci_resource_flags(pdev, num) & IORESOURCE_IO) {
  869. res_attr->read = pci_read_resource_io;
  870. res_attr->write = pci_write_resource_io;
  871. }
  872. res_attr->attr.name = res_attr_name;
  873. res_attr->attr.mode = S_IRUSR | S_IWUSR;
  874. res_attr->size = pci_resource_len(pdev, num);
  875. res_attr->private = &pdev->resource[num];
  876. retval = sysfs_create_bin_file(&pdev->dev.kobj, res_attr);
  877. } else
  878. retval = -ENOMEM;
  879. return retval;
  880. }
  881. /**
  882. * pci_create_resource_files - create resource files in sysfs for @dev
  883. * @pdev: dev in question
  884. *
  885. * Walk the resources in @pdev creating files for each resource available.
  886. */
  887. static int pci_create_resource_files(struct pci_dev *pdev)
  888. {
  889. int i;
  890. int retval;
  891. /* Expose the PCI resources from this device as files */
  892. for (i = 0; i < PCI_ROM_RESOURCE; i++) {
  893. /* skip empty resources */
  894. if (!pci_resource_len(pdev, i))
  895. continue;
  896. retval = pci_create_attr(pdev, i, 0);
  897. /* for prefetchable resources, create a WC mappable file */
  898. if (!retval && pdev->resource[i].flags & IORESOURCE_PREFETCH)
  899. retval = pci_create_attr(pdev, i, 1);
  900. if (retval) {
  901. pci_remove_resource_files(pdev);
  902. return retval;
  903. }
  904. }
  905. return 0;
  906. }
  907. #else /* !HAVE_PCI_MMAP */
  908. int __weak pci_create_resource_files(struct pci_dev *dev) { return 0; }
  909. void __weak pci_remove_resource_files(struct pci_dev *dev) { return; }
  910. #endif /* HAVE_PCI_MMAP */
  911. /**
  912. * pci_write_rom - used to enable access to the PCI ROM display
  913. * @filp: sysfs file
  914. * @kobj: kernel object handle
  915. * @bin_attr: struct bin_attribute for this file
  916. * @buf: user input
  917. * @off: file offset
  918. * @count: number of byte in input
  919. *
  920. * writing anything except 0 enables it
  921. */
  922. static ssize_t
  923. pci_write_rom(struct file *filp, struct kobject *kobj,
  924. struct bin_attribute *bin_attr,
  925. char *buf, loff_t off, size_t count)
  926. {
  927. struct pci_dev *pdev = to_pci_dev(container_of(kobj, struct device, kobj));
  928. if ((off == 0) && (*buf == '0') && (count == 2))
  929. pdev->rom_attr_enabled = 0;
  930. else
  931. pdev->rom_attr_enabled = 1;
  932. return count;
  933. }
  934. /**
  935. * pci_read_rom - read a PCI ROM
  936. * @filp: sysfs file
  937. * @kobj: kernel object handle
  938. * @bin_attr: struct bin_attribute for this file
  939. * @buf: where to put the data we read from the ROM
  940. * @off: file offset
  941. * @count: number of bytes to read
  942. *
  943. * Put @count bytes starting at @off into @buf from the ROM in the PCI
  944. * device corresponding to @kobj.
  945. */
  946. static ssize_t
  947. pci_read_rom(struct file *filp, struct kobject *kobj,
  948. struct bin_attribute *bin_attr,
  949. char *buf, loff_t off, size_t count)
  950. {
  951. struct pci_dev *pdev = to_pci_dev(container_of(kobj, struct device, kobj));
  952. void __iomem *rom;
  953. size_t size;
  954. if (!pdev->rom_attr_enabled)
  955. return -EINVAL;
  956. rom = pci_map_rom(pdev, &size); /* size starts out as PCI window size */
  957. if (!rom || !size)
  958. return -EIO;
  959. if (off >= size)
  960. count = 0;
  961. else {
  962. if (off + count > size)
  963. count = size - off;
  964. memcpy_fromio(buf, rom + off, count);
  965. }
  966. pci_unmap_rom(pdev, rom);
  967. return count;
  968. }
  969. static struct bin_attribute pci_config_attr = {
  970. .attr = {
  971. .name = "config",
  972. .mode = S_IRUGO | S_IWUSR,
  973. },
  974. .size = PCI_CFG_SPACE_SIZE,
  975. .read = pci_read_config,
  976. .write = pci_write_config,
  977. };
  978. static struct bin_attribute pcie_config_attr = {
  979. .attr = {
  980. .name = "config",
  981. .mode = S_IRUGO | S_IWUSR,
  982. },
  983. .size = PCI_CFG_SPACE_EXP_SIZE,
  984. .read = pci_read_config,
  985. .write = pci_write_config,
  986. };
  987. int __weak pcibios_add_platform_entries(struct pci_dev *dev)
  988. {
  989. return 0;
  990. }
  991. static ssize_t reset_store(struct device *dev,
  992. struct device_attribute *attr, const char *buf,
  993. size_t count)
  994. {
  995. struct pci_dev *pdev = to_pci_dev(dev);
  996. unsigned long val;
  997. ssize_t result = strict_strtoul(buf, 0, &val);
  998. if (result < 0)
  999. return result;
  1000. if (val != 1)
  1001. return -EINVAL;
  1002. result = pci_reset_function(pdev);
  1003. if (result < 0)
  1004. return result;
  1005. return count;
  1006. }
  1007. static struct device_attribute reset_attr = __ATTR(reset, 0200, NULL, reset_store);
  1008. static int pci_create_capabilities_sysfs(struct pci_dev *dev)
  1009. {
  1010. int retval;
  1011. struct bin_attribute *attr;
  1012. /* If the device has VPD, try to expose it in sysfs. */
  1013. if (dev->vpd) {
  1014. attr = kzalloc(sizeof(*attr), GFP_ATOMIC);
  1015. if (!attr)
  1016. return -ENOMEM;
  1017. sysfs_bin_attr_init(attr);
  1018. attr->size = dev->vpd->len;
  1019. attr->attr.name = "vpd";
  1020. attr->attr.mode = S_IRUSR | S_IWUSR;
  1021. attr->read = read_vpd_attr;
  1022. attr->write = write_vpd_attr;
  1023. retval = sysfs_create_bin_file(&dev->dev.kobj, attr);
  1024. if (retval) {
  1025. kfree(attr);
  1026. return retval;
  1027. }
  1028. dev->vpd->attr = attr;
  1029. }
  1030. /* Active State Power Management */
  1031. pcie_aspm_create_sysfs_dev_files(dev);
  1032. if (!pci_probe_reset_function(dev)) {
  1033. retval = device_create_file(&dev->dev, &reset_attr);
  1034. if (retval)
  1035. goto error;
  1036. dev->reset_fn = 1;
  1037. }
  1038. return 0;
  1039. error:
  1040. pcie_aspm_remove_sysfs_dev_files(dev);
  1041. if (dev->vpd && dev->vpd->attr) {
  1042. sysfs_remove_bin_file(&dev->dev.kobj, dev->vpd->attr);
  1043. kfree(dev->vpd->attr);
  1044. }
  1045. return retval;
  1046. }
  1047. int __must_check pci_create_sysfs_dev_files (struct pci_dev *pdev)
  1048. {
  1049. int retval;
  1050. int rom_size = 0;
  1051. struct bin_attribute *attr;
  1052. if (!sysfs_initialized)
  1053. return -EACCES;
  1054. if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE)
  1055. retval = sysfs_create_bin_file(&pdev->dev.kobj, &pci_config_attr);
  1056. else
  1057. retval = sysfs_create_bin_file(&pdev->dev.kobj, &pcie_config_attr);
  1058. if (retval)
  1059. goto err;
  1060. retval = pci_create_resource_files(pdev);
  1061. if (retval)
  1062. goto err_config_file;
  1063. if (pci_resource_len(pdev, PCI_ROM_RESOURCE))
  1064. rom_size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
  1065. else if (pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW)
  1066. rom_size = 0x20000;
  1067. /* If the device has a ROM, try to expose it in sysfs. */
  1068. if (rom_size) {
  1069. attr = kzalloc(sizeof(*attr), GFP_ATOMIC);
  1070. if (!attr) {
  1071. retval = -ENOMEM;
  1072. goto err_resource_files;
  1073. }
  1074. sysfs_bin_attr_init(attr);
  1075. attr->size = rom_size;
  1076. attr->attr.name = "rom";
  1077. attr->attr.mode = S_IRUSR | S_IWUSR;
  1078. attr->read = pci_read_rom;
  1079. attr->write = pci_write_rom;
  1080. retval = sysfs_create_bin_file(&pdev->dev.kobj, attr);
  1081. if (retval) {
  1082. kfree(attr);
  1083. goto err_resource_files;
  1084. }
  1085. pdev->rom_attr = attr;
  1086. }
  1087. if ((pdev->class >> 8) == PCI_CLASS_DISPLAY_VGA) {
  1088. retval = device_create_file(&pdev->dev, &vga_attr);
  1089. if (retval)
  1090. goto err_rom_file;
  1091. }
  1092. /* add platform-specific attributes */
  1093. retval = pcibios_add_platform_entries(pdev);
  1094. if (retval)
  1095. goto err_vga_file;
  1096. /* add sysfs entries for various capabilities */
  1097. retval = pci_create_capabilities_sysfs(pdev);
  1098. if (retval)
  1099. goto err_vga_file;
  1100. pci_create_firmware_label_files(pdev);
  1101. return 0;
  1102. err_vga_file:
  1103. if ((pdev->class >> 8) == PCI_CLASS_DISPLAY_VGA)
  1104. device_remove_file(&pdev->dev, &vga_attr);
  1105. err_rom_file:
  1106. if (rom_size) {
  1107. sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
  1108. kfree(pdev->rom_attr);
  1109. pdev->rom_attr = NULL;
  1110. }
  1111. err_resource_files:
  1112. pci_remove_resource_files(pdev);
  1113. err_config_file:
  1114. if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE)
  1115. sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
  1116. else
  1117. sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
  1118. err:
  1119. return retval;
  1120. }
  1121. static void pci_remove_capabilities_sysfs(struct pci_dev *dev)
  1122. {
  1123. if (dev->vpd && dev->vpd->attr) {
  1124. sysfs_remove_bin_file(&dev->dev.kobj, dev->vpd->attr);
  1125. kfree(dev->vpd->attr);
  1126. }
  1127. pcie_aspm_remove_sysfs_dev_files(dev);
  1128. if (dev->reset_fn) {
  1129. device_remove_file(&dev->dev, &reset_attr);
  1130. dev->reset_fn = 0;
  1131. }
  1132. }
  1133. /**
  1134. * pci_remove_sysfs_dev_files - cleanup PCI specific sysfs files
  1135. * @pdev: device whose entries we should free
  1136. *
  1137. * Cleanup when @pdev is removed from sysfs.
  1138. */
  1139. void pci_remove_sysfs_dev_files(struct pci_dev *pdev)
  1140. {
  1141. int rom_size = 0;
  1142. if (!sysfs_initialized)
  1143. return;
  1144. pci_remove_capabilities_sysfs(pdev);
  1145. if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE)
  1146. sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
  1147. else
  1148. sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
  1149. pci_remove_resource_files(pdev);
  1150. if (pci_resource_len(pdev, PCI_ROM_RESOURCE))
  1151. rom_size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
  1152. else if (pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW)
  1153. rom_size = 0x20000;
  1154. if (rom_size && pdev->rom_attr) {
  1155. sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
  1156. kfree(pdev->rom_attr);
  1157. }
  1158. pci_remove_firmware_label_files(pdev);
  1159. }
  1160. static int __init pci_sysfs_init(void)
  1161. {
  1162. struct pci_dev *pdev = NULL;
  1163. int retval;
  1164. sysfs_initialized = 1;
  1165. for_each_pci_dev(pdev) {
  1166. retval = pci_create_sysfs_dev_files(pdev);
  1167. if (retval) {
  1168. pci_dev_put(pdev);
  1169. return retval;
  1170. }
  1171. }
  1172. return 0;
  1173. }
  1174. late_initcall(pci_sysfs_init);