apply.c 30 KB

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  1. /*
  2. * Copyright (C) 2011 Texas Instruments
  3. * Author: Tomi Valkeinen <tomi.valkeinen@ti.com>
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms of the GNU General Public License version 2 as published by
  7. * the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope that it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. *
  14. * You should have received a copy of the GNU General Public License along with
  15. * this program. If not, see <http://www.gnu.org/licenses/>.
  16. */
  17. #define DSS_SUBSYS_NAME "APPLY"
  18. #include <linux/kernel.h>
  19. #include <linux/slab.h>
  20. #include <linux/spinlock.h>
  21. #include <linux/jiffies.h>
  22. #include <video/omapdss.h>
  23. #include "dss.h"
  24. #include "dss_features.h"
  25. /*
  26. * We have 4 levels of cache for the dispc settings. First two are in SW and
  27. * the latter two in HW.
  28. *
  29. * set_info()
  30. * v
  31. * +--------------------+
  32. * | user_info |
  33. * +--------------------+
  34. * v
  35. * apply()
  36. * v
  37. * +--------------------+
  38. * | info |
  39. * +--------------------+
  40. * v
  41. * write_regs()
  42. * v
  43. * +--------------------+
  44. * | shadow registers |
  45. * +--------------------+
  46. * v
  47. * VFP or lcd/digit_enable
  48. * v
  49. * +--------------------+
  50. * | registers |
  51. * +--------------------+
  52. */
  53. struct ovl_priv_data {
  54. bool user_info_dirty;
  55. struct omap_overlay_info user_info;
  56. bool info_dirty;
  57. struct omap_overlay_info info;
  58. bool shadow_info_dirty;
  59. bool extra_info_dirty;
  60. bool shadow_extra_info_dirty;
  61. bool enabled;
  62. enum omap_channel channel;
  63. u32 fifo_low, fifo_high;
  64. /*
  65. * True if overlay is to be enabled. Used to check and calculate configs
  66. * for the overlay before it is enabled in the HW.
  67. */
  68. bool enabling;
  69. };
  70. struct mgr_priv_data {
  71. bool user_info_dirty;
  72. struct omap_overlay_manager_info user_info;
  73. bool info_dirty;
  74. struct omap_overlay_manager_info info;
  75. bool shadow_info_dirty;
  76. /* If true, GO bit is up and shadow registers cannot be written.
  77. * Never true for manual update displays */
  78. bool busy;
  79. /* If true, dispc output is enabled */
  80. bool updating;
  81. /* If true, a display is enabled using this manager */
  82. bool enabled;
  83. bool extra_info_dirty;
  84. bool shadow_extra_info_dirty;
  85. struct omap_video_timings timings;
  86. struct dss_lcd_mgr_config lcd_config;
  87. };
  88. static struct {
  89. struct ovl_priv_data ovl_priv_data_array[MAX_DSS_OVERLAYS];
  90. struct mgr_priv_data mgr_priv_data_array[MAX_DSS_MANAGERS];
  91. bool fifo_merge_dirty;
  92. bool fifo_merge;
  93. bool irq_enabled;
  94. } dss_data;
  95. /* protects dss_data */
  96. static spinlock_t data_lock;
  97. /* lock for blocking functions */
  98. static DEFINE_MUTEX(apply_lock);
  99. static DECLARE_COMPLETION(extra_updated_completion);
  100. static void dss_register_vsync_isr(void);
  101. static struct ovl_priv_data *get_ovl_priv(struct omap_overlay *ovl)
  102. {
  103. return &dss_data.ovl_priv_data_array[ovl->id];
  104. }
  105. static struct mgr_priv_data *get_mgr_priv(struct omap_overlay_manager *mgr)
  106. {
  107. return &dss_data.mgr_priv_data_array[mgr->id];
  108. }
  109. void dss_apply_init(void)
  110. {
  111. const int num_ovls = dss_feat_get_num_ovls();
  112. struct mgr_priv_data *mp;
  113. int i;
  114. spin_lock_init(&data_lock);
  115. for (i = 0; i < num_ovls; ++i) {
  116. struct ovl_priv_data *op;
  117. op = &dss_data.ovl_priv_data_array[i];
  118. op->info.global_alpha = 255;
  119. switch (i) {
  120. case 0:
  121. op->info.zorder = 0;
  122. break;
  123. case 1:
  124. op->info.zorder =
  125. dss_has_feature(FEAT_ALPHA_FREE_ZORDER) ? 3 : 0;
  126. break;
  127. case 2:
  128. op->info.zorder =
  129. dss_has_feature(FEAT_ALPHA_FREE_ZORDER) ? 2 : 0;
  130. break;
  131. case 3:
  132. op->info.zorder =
  133. dss_has_feature(FEAT_ALPHA_FREE_ZORDER) ? 1 : 0;
  134. break;
  135. }
  136. op->user_info = op->info;
  137. }
  138. /*
  139. * Initialize some of the lcd_config fields for TV manager, this lets
  140. * us prevent checking if the manager is LCD or TV at some places
  141. */
  142. mp = &dss_data.mgr_priv_data_array[OMAP_DSS_CHANNEL_DIGIT];
  143. mp->lcd_config.video_port_width = 24;
  144. mp->lcd_config.clock_info.lck_div = 1;
  145. mp->lcd_config.clock_info.pck_div = 1;
  146. }
  147. /*
  148. * A LCD manager's stallmode decides whether it is in manual or auto update. TV
  149. * manager is always auto update, stallmode field for TV manager is false by
  150. * default
  151. */
  152. static bool ovl_manual_update(struct omap_overlay *ovl)
  153. {
  154. struct mgr_priv_data *mp = get_mgr_priv(ovl->manager);
  155. return mp->lcd_config.stallmode;
  156. }
  157. static bool mgr_manual_update(struct omap_overlay_manager *mgr)
  158. {
  159. struct mgr_priv_data *mp = get_mgr_priv(mgr);
  160. return mp->lcd_config.stallmode;
  161. }
  162. static int dss_check_settings_low(struct omap_overlay_manager *mgr,
  163. bool applying)
  164. {
  165. struct omap_overlay_info *oi;
  166. struct omap_overlay_manager_info *mi;
  167. struct omap_overlay *ovl;
  168. struct omap_overlay_info *ois[MAX_DSS_OVERLAYS];
  169. struct ovl_priv_data *op;
  170. struct mgr_priv_data *mp;
  171. mp = get_mgr_priv(mgr);
  172. if (!mp->enabled)
  173. return 0;
  174. if (applying && mp->user_info_dirty)
  175. mi = &mp->user_info;
  176. else
  177. mi = &mp->info;
  178. /* collect the infos to be tested into the array */
  179. list_for_each_entry(ovl, &mgr->overlays, list) {
  180. op = get_ovl_priv(ovl);
  181. if (!op->enabled && !op->enabling)
  182. oi = NULL;
  183. else if (applying && op->user_info_dirty)
  184. oi = &op->user_info;
  185. else
  186. oi = &op->info;
  187. ois[ovl->id] = oi;
  188. }
  189. return dss_mgr_check(mgr, mi, &mp->timings, &mp->lcd_config, ois);
  190. }
  191. /*
  192. * check manager and overlay settings using overlay_info from data->info
  193. */
  194. static int dss_check_settings(struct omap_overlay_manager *mgr)
  195. {
  196. return dss_check_settings_low(mgr, false);
  197. }
  198. /*
  199. * check manager and overlay settings using overlay_info from ovl->info if
  200. * dirty and from data->info otherwise
  201. */
  202. static int dss_check_settings_apply(struct omap_overlay_manager *mgr)
  203. {
  204. return dss_check_settings_low(mgr, true);
  205. }
  206. static bool need_isr(void)
  207. {
  208. const int num_mgrs = dss_feat_get_num_mgrs();
  209. int i;
  210. for (i = 0; i < num_mgrs; ++i) {
  211. struct omap_overlay_manager *mgr;
  212. struct mgr_priv_data *mp;
  213. struct omap_overlay *ovl;
  214. mgr = omap_dss_get_overlay_manager(i);
  215. mp = get_mgr_priv(mgr);
  216. if (!mp->enabled)
  217. continue;
  218. if (mgr_manual_update(mgr)) {
  219. /* to catch FRAMEDONE */
  220. if (mp->updating)
  221. return true;
  222. } else {
  223. /* to catch GO bit going down */
  224. if (mp->busy)
  225. return true;
  226. /* to write new values to registers */
  227. if (mp->info_dirty)
  228. return true;
  229. /* to set GO bit */
  230. if (mp->shadow_info_dirty)
  231. return true;
  232. /*
  233. * NOTE: we don't check extra_info flags for disabled
  234. * managers, once the manager is enabled, the extra_info
  235. * related manager changes will be taken in by HW.
  236. */
  237. /* to write new values to registers */
  238. if (mp->extra_info_dirty)
  239. return true;
  240. /* to set GO bit */
  241. if (mp->shadow_extra_info_dirty)
  242. return true;
  243. list_for_each_entry(ovl, &mgr->overlays, list) {
  244. struct ovl_priv_data *op;
  245. op = get_ovl_priv(ovl);
  246. /*
  247. * NOTE: we check extra_info flags even for
  248. * disabled overlays, as extra_infos need to be
  249. * always written.
  250. */
  251. /* to write new values to registers */
  252. if (op->extra_info_dirty)
  253. return true;
  254. /* to set GO bit */
  255. if (op->shadow_extra_info_dirty)
  256. return true;
  257. if (!op->enabled)
  258. continue;
  259. /* to write new values to registers */
  260. if (op->info_dirty)
  261. return true;
  262. /* to set GO bit */
  263. if (op->shadow_info_dirty)
  264. return true;
  265. }
  266. }
  267. }
  268. return false;
  269. }
  270. static bool need_go(struct omap_overlay_manager *mgr)
  271. {
  272. struct omap_overlay *ovl;
  273. struct mgr_priv_data *mp;
  274. struct ovl_priv_data *op;
  275. mp = get_mgr_priv(mgr);
  276. if (mp->shadow_info_dirty || mp->shadow_extra_info_dirty)
  277. return true;
  278. list_for_each_entry(ovl, &mgr->overlays, list) {
  279. op = get_ovl_priv(ovl);
  280. if (op->shadow_info_dirty || op->shadow_extra_info_dirty)
  281. return true;
  282. }
  283. return false;
  284. }
  285. /* returns true if an extra_info field is currently being updated */
  286. static bool extra_info_update_ongoing(void)
  287. {
  288. const int num_mgrs = dss_feat_get_num_mgrs();
  289. int i;
  290. for (i = 0; i < num_mgrs; ++i) {
  291. struct omap_overlay_manager *mgr;
  292. struct omap_overlay *ovl;
  293. struct mgr_priv_data *mp;
  294. mgr = omap_dss_get_overlay_manager(i);
  295. mp = get_mgr_priv(mgr);
  296. if (!mp->enabled)
  297. continue;
  298. if (!mp->updating)
  299. continue;
  300. if (mp->extra_info_dirty || mp->shadow_extra_info_dirty)
  301. return true;
  302. list_for_each_entry(ovl, &mgr->overlays, list) {
  303. struct ovl_priv_data *op = get_ovl_priv(ovl);
  304. if (op->extra_info_dirty || op->shadow_extra_info_dirty)
  305. return true;
  306. }
  307. }
  308. return false;
  309. }
  310. /* wait until no extra_info updates are pending */
  311. static void wait_pending_extra_info_updates(void)
  312. {
  313. bool updating;
  314. unsigned long flags;
  315. unsigned long t;
  316. int r;
  317. spin_lock_irqsave(&data_lock, flags);
  318. updating = extra_info_update_ongoing();
  319. if (!updating) {
  320. spin_unlock_irqrestore(&data_lock, flags);
  321. return;
  322. }
  323. init_completion(&extra_updated_completion);
  324. spin_unlock_irqrestore(&data_lock, flags);
  325. t = msecs_to_jiffies(500);
  326. r = wait_for_completion_timeout(&extra_updated_completion, t);
  327. if (r == 0)
  328. DSSWARN("timeout in wait_pending_extra_info_updates\n");
  329. else if (r < 0)
  330. DSSERR("wait_pending_extra_info_updates failed: %d\n", r);
  331. }
  332. int dss_mgr_wait_for_go(struct omap_overlay_manager *mgr)
  333. {
  334. unsigned long timeout = msecs_to_jiffies(500);
  335. struct mgr_priv_data *mp;
  336. u32 irq;
  337. int r;
  338. int i;
  339. struct omap_dss_device *dssdev = mgr->device;
  340. if (!dssdev || dssdev->state != OMAP_DSS_DISPLAY_ACTIVE)
  341. return 0;
  342. if (mgr_manual_update(mgr))
  343. return 0;
  344. r = dispc_runtime_get();
  345. if (r)
  346. return r;
  347. irq = dispc_mgr_get_vsync_irq(mgr->id);
  348. mp = get_mgr_priv(mgr);
  349. i = 0;
  350. while (1) {
  351. unsigned long flags;
  352. bool shadow_dirty, dirty;
  353. spin_lock_irqsave(&data_lock, flags);
  354. dirty = mp->info_dirty;
  355. shadow_dirty = mp->shadow_info_dirty;
  356. spin_unlock_irqrestore(&data_lock, flags);
  357. if (!dirty && !shadow_dirty) {
  358. r = 0;
  359. break;
  360. }
  361. /* 4 iterations is the worst case:
  362. * 1 - initial iteration, dirty = true (between VFP and VSYNC)
  363. * 2 - first VSYNC, dirty = true
  364. * 3 - dirty = false, shadow_dirty = true
  365. * 4 - shadow_dirty = false */
  366. if (i++ == 3) {
  367. DSSERR("mgr(%d)->wait_for_go() not finishing\n",
  368. mgr->id);
  369. r = 0;
  370. break;
  371. }
  372. r = omap_dispc_wait_for_irq_interruptible_timeout(irq, timeout);
  373. if (r == -ERESTARTSYS)
  374. break;
  375. if (r) {
  376. DSSERR("mgr(%d)->wait_for_go() timeout\n", mgr->id);
  377. break;
  378. }
  379. }
  380. dispc_runtime_put();
  381. return r;
  382. }
  383. int dss_mgr_wait_for_go_ovl(struct omap_overlay *ovl)
  384. {
  385. unsigned long timeout = msecs_to_jiffies(500);
  386. struct ovl_priv_data *op;
  387. struct omap_dss_device *dssdev;
  388. u32 irq;
  389. int r;
  390. int i;
  391. if (!ovl->manager)
  392. return 0;
  393. dssdev = ovl->manager->device;
  394. if (!dssdev || dssdev->state != OMAP_DSS_DISPLAY_ACTIVE)
  395. return 0;
  396. if (ovl_manual_update(ovl))
  397. return 0;
  398. r = dispc_runtime_get();
  399. if (r)
  400. return r;
  401. irq = dispc_mgr_get_vsync_irq(ovl->manager->id);
  402. op = get_ovl_priv(ovl);
  403. i = 0;
  404. while (1) {
  405. unsigned long flags;
  406. bool shadow_dirty, dirty;
  407. spin_lock_irqsave(&data_lock, flags);
  408. dirty = op->info_dirty;
  409. shadow_dirty = op->shadow_info_dirty;
  410. spin_unlock_irqrestore(&data_lock, flags);
  411. if (!dirty && !shadow_dirty) {
  412. r = 0;
  413. break;
  414. }
  415. /* 4 iterations is the worst case:
  416. * 1 - initial iteration, dirty = true (between VFP and VSYNC)
  417. * 2 - first VSYNC, dirty = true
  418. * 3 - dirty = false, shadow_dirty = true
  419. * 4 - shadow_dirty = false */
  420. if (i++ == 3) {
  421. DSSERR("ovl(%d)->wait_for_go() not finishing\n",
  422. ovl->id);
  423. r = 0;
  424. break;
  425. }
  426. r = omap_dispc_wait_for_irq_interruptible_timeout(irq, timeout);
  427. if (r == -ERESTARTSYS)
  428. break;
  429. if (r) {
  430. DSSERR("ovl(%d)->wait_for_go() timeout\n", ovl->id);
  431. break;
  432. }
  433. }
  434. dispc_runtime_put();
  435. return r;
  436. }
  437. static void dss_ovl_write_regs(struct omap_overlay *ovl)
  438. {
  439. struct ovl_priv_data *op = get_ovl_priv(ovl);
  440. struct omap_overlay_info *oi;
  441. bool replication;
  442. struct mgr_priv_data *mp;
  443. int r;
  444. DSSDBGF("%d", ovl->id);
  445. if (!op->enabled || !op->info_dirty)
  446. return;
  447. oi = &op->info;
  448. mp = get_mgr_priv(ovl->manager);
  449. replication = dss_ovl_use_replication(mp->lcd_config, oi->color_mode);
  450. r = dispc_ovl_setup(ovl->id, oi, replication, &mp->timings);
  451. if (r) {
  452. /*
  453. * We can't do much here, as this function can be called from
  454. * vsync interrupt.
  455. */
  456. DSSERR("dispc_ovl_setup failed for ovl %d\n", ovl->id);
  457. /* This will leave fifo configurations in a nonoptimal state */
  458. op->enabled = false;
  459. dispc_ovl_enable(ovl->id, false);
  460. return;
  461. }
  462. op->info_dirty = false;
  463. if (mp->updating)
  464. op->shadow_info_dirty = true;
  465. }
  466. static void dss_ovl_write_regs_extra(struct omap_overlay *ovl)
  467. {
  468. struct ovl_priv_data *op = get_ovl_priv(ovl);
  469. struct mgr_priv_data *mp;
  470. DSSDBGF("%d", ovl->id);
  471. if (!op->extra_info_dirty)
  472. return;
  473. /* note: write also when op->enabled == false, so that the ovl gets
  474. * disabled */
  475. dispc_ovl_enable(ovl->id, op->enabled);
  476. dispc_ovl_set_channel_out(ovl->id, op->channel);
  477. dispc_ovl_set_fifo_threshold(ovl->id, op->fifo_low, op->fifo_high);
  478. mp = get_mgr_priv(ovl->manager);
  479. op->extra_info_dirty = false;
  480. if (mp->updating)
  481. op->shadow_extra_info_dirty = true;
  482. }
  483. static void dss_mgr_write_regs(struct omap_overlay_manager *mgr)
  484. {
  485. struct mgr_priv_data *mp = get_mgr_priv(mgr);
  486. struct omap_overlay *ovl;
  487. DSSDBGF("%d", mgr->id);
  488. if (!mp->enabled)
  489. return;
  490. WARN_ON(mp->busy);
  491. /* Commit overlay settings */
  492. list_for_each_entry(ovl, &mgr->overlays, list) {
  493. dss_ovl_write_regs(ovl);
  494. dss_ovl_write_regs_extra(ovl);
  495. }
  496. if (mp->info_dirty) {
  497. dispc_mgr_setup(mgr->id, &mp->info);
  498. mp->info_dirty = false;
  499. if (mp->updating)
  500. mp->shadow_info_dirty = true;
  501. }
  502. }
  503. static void dss_mgr_write_regs_extra(struct omap_overlay_manager *mgr)
  504. {
  505. struct mgr_priv_data *mp = get_mgr_priv(mgr);
  506. DSSDBGF("%d", mgr->id);
  507. if (!mp->extra_info_dirty)
  508. return;
  509. dispc_mgr_set_timings(mgr->id, &mp->timings);
  510. /* lcd_config parameters */
  511. if (dss_mgr_is_lcd(mgr->id)) {
  512. dispc_mgr_set_io_pad_mode(mp->lcd_config.io_pad_mode);
  513. dispc_mgr_enable_stallmode(mgr->id, mp->lcd_config.stallmode);
  514. dispc_mgr_enable_fifohandcheck(mgr->id,
  515. mp->lcd_config.fifohandcheck);
  516. dispc_mgr_set_clock_div(mgr->id, &mp->lcd_config.clock_info);
  517. dispc_mgr_set_tft_data_lines(mgr->id,
  518. mp->lcd_config.video_port_width);
  519. dispc_lcd_enable_signal_polarity(mp->lcd_config.lcden_sig_polarity);
  520. dispc_mgr_set_lcd_type_tft(mgr->id);
  521. }
  522. mp->extra_info_dirty = false;
  523. if (mp->updating)
  524. mp->shadow_extra_info_dirty = true;
  525. }
  526. static void dss_write_regs_common(void)
  527. {
  528. const int num_mgrs = omap_dss_get_num_overlay_managers();
  529. int i;
  530. if (!dss_data.fifo_merge_dirty)
  531. return;
  532. for (i = 0; i < num_mgrs; ++i) {
  533. struct omap_overlay_manager *mgr;
  534. struct mgr_priv_data *mp;
  535. mgr = omap_dss_get_overlay_manager(i);
  536. mp = get_mgr_priv(mgr);
  537. if (mp->enabled) {
  538. if (dss_data.fifo_merge_dirty) {
  539. dispc_enable_fifomerge(dss_data.fifo_merge);
  540. dss_data.fifo_merge_dirty = false;
  541. }
  542. if (mp->updating)
  543. mp->shadow_info_dirty = true;
  544. }
  545. }
  546. }
  547. static void dss_write_regs(void)
  548. {
  549. const int num_mgrs = omap_dss_get_num_overlay_managers();
  550. int i;
  551. dss_write_regs_common();
  552. for (i = 0; i < num_mgrs; ++i) {
  553. struct omap_overlay_manager *mgr;
  554. struct mgr_priv_data *mp;
  555. int r;
  556. mgr = omap_dss_get_overlay_manager(i);
  557. mp = get_mgr_priv(mgr);
  558. if (!mp->enabled || mgr_manual_update(mgr) || mp->busy)
  559. continue;
  560. r = dss_check_settings(mgr);
  561. if (r) {
  562. DSSERR("cannot write registers for manager %s: "
  563. "illegal configuration\n", mgr->name);
  564. continue;
  565. }
  566. dss_mgr_write_regs(mgr);
  567. dss_mgr_write_regs_extra(mgr);
  568. }
  569. }
  570. static void dss_set_go_bits(void)
  571. {
  572. const int num_mgrs = omap_dss_get_num_overlay_managers();
  573. int i;
  574. for (i = 0; i < num_mgrs; ++i) {
  575. struct omap_overlay_manager *mgr;
  576. struct mgr_priv_data *mp;
  577. mgr = omap_dss_get_overlay_manager(i);
  578. mp = get_mgr_priv(mgr);
  579. if (!mp->enabled || mgr_manual_update(mgr) || mp->busy)
  580. continue;
  581. if (!need_go(mgr))
  582. continue;
  583. mp->busy = true;
  584. if (!dss_data.irq_enabled && need_isr())
  585. dss_register_vsync_isr();
  586. dispc_mgr_go(mgr->id);
  587. }
  588. }
  589. static void mgr_clear_shadow_dirty(struct omap_overlay_manager *mgr)
  590. {
  591. struct omap_overlay *ovl;
  592. struct mgr_priv_data *mp;
  593. struct ovl_priv_data *op;
  594. mp = get_mgr_priv(mgr);
  595. mp->shadow_info_dirty = false;
  596. mp->shadow_extra_info_dirty = false;
  597. list_for_each_entry(ovl, &mgr->overlays, list) {
  598. op = get_ovl_priv(ovl);
  599. op->shadow_info_dirty = false;
  600. op->shadow_extra_info_dirty = false;
  601. }
  602. }
  603. void dss_mgr_start_update(struct omap_overlay_manager *mgr)
  604. {
  605. struct mgr_priv_data *mp = get_mgr_priv(mgr);
  606. unsigned long flags;
  607. int r;
  608. spin_lock_irqsave(&data_lock, flags);
  609. WARN_ON(mp->updating);
  610. r = dss_check_settings(mgr);
  611. if (r) {
  612. DSSERR("cannot start manual update: illegal configuration\n");
  613. spin_unlock_irqrestore(&data_lock, flags);
  614. return;
  615. }
  616. dss_mgr_write_regs(mgr);
  617. dss_mgr_write_regs_extra(mgr);
  618. dss_write_regs_common();
  619. mp->updating = true;
  620. if (!dss_data.irq_enabled && need_isr())
  621. dss_register_vsync_isr();
  622. dispc_mgr_enable(mgr->id, true);
  623. mgr_clear_shadow_dirty(mgr);
  624. spin_unlock_irqrestore(&data_lock, flags);
  625. }
  626. static void dss_apply_irq_handler(void *data, u32 mask);
  627. static void dss_register_vsync_isr(void)
  628. {
  629. const int num_mgrs = dss_feat_get_num_mgrs();
  630. u32 mask;
  631. int r, i;
  632. mask = 0;
  633. for (i = 0; i < num_mgrs; ++i)
  634. mask |= dispc_mgr_get_vsync_irq(i);
  635. for (i = 0; i < num_mgrs; ++i)
  636. mask |= dispc_mgr_get_framedone_irq(i);
  637. r = omap_dispc_register_isr(dss_apply_irq_handler, NULL, mask);
  638. WARN_ON(r);
  639. dss_data.irq_enabled = true;
  640. }
  641. static void dss_unregister_vsync_isr(void)
  642. {
  643. const int num_mgrs = dss_feat_get_num_mgrs();
  644. u32 mask;
  645. int r, i;
  646. mask = 0;
  647. for (i = 0; i < num_mgrs; ++i)
  648. mask |= dispc_mgr_get_vsync_irq(i);
  649. for (i = 0; i < num_mgrs; ++i)
  650. mask |= dispc_mgr_get_framedone_irq(i);
  651. r = omap_dispc_unregister_isr(dss_apply_irq_handler, NULL, mask);
  652. WARN_ON(r);
  653. dss_data.irq_enabled = false;
  654. }
  655. static void dss_apply_irq_handler(void *data, u32 mask)
  656. {
  657. const int num_mgrs = dss_feat_get_num_mgrs();
  658. int i;
  659. bool extra_updating;
  660. spin_lock(&data_lock);
  661. /* clear busy, updating flags, shadow_dirty flags */
  662. for (i = 0; i < num_mgrs; i++) {
  663. struct omap_overlay_manager *mgr;
  664. struct mgr_priv_data *mp;
  665. bool was_updating;
  666. mgr = omap_dss_get_overlay_manager(i);
  667. mp = get_mgr_priv(mgr);
  668. if (!mp->enabled)
  669. continue;
  670. was_updating = mp->updating;
  671. mp->updating = dispc_mgr_is_enabled(i);
  672. if (!mgr_manual_update(mgr)) {
  673. bool was_busy = mp->busy;
  674. mp->busy = dispc_mgr_go_busy(i);
  675. if (was_busy && !mp->busy)
  676. mgr_clear_shadow_dirty(mgr);
  677. }
  678. }
  679. dss_write_regs();
  680. dss_set_go_bits();
  681. extra_updating = extra_info_update_ongoing();
  682. if (!extra_updating)
  683. complete_all(&extra_updated_completion);
  684. if (!need_isr())
  685. dss_unregister_vsync_isr();
  686. spin_unlock(&data_lock);
  687. }
  688. static void omap_dss_mgr_apply_ovl(struct omap_overlay *ovl)
  689. {
  690. struct ovl_priv_data *op;
  691. op = get_ovl_priv(ovl);
  692. if (!op->user_info_dirty)
  693. return;
  694. op->user_info_dirty = false;
  695. op->info_dirty = true;
  696. op->info = op->user_info;
  697. }
  698. static void omap_dss_mgr_apply_mgr(struct omap_overlay_manager *mgr)
  699. {
  700. struct mgr_priv_data *mp;
  701. mp = get_mgr_priv(mgr);
  702. if (!mp->user_info_dirty)
  703. return;
  704. mp->user_info_dirty = false;
  705. mp->info_dirty = true;
  706. mp->info = mp->user_info;
  707. }
  708. int omap_dss_mgr_apply(struct omap_overlay_manager *mgr)
  709. {
  710. unsigned long flags;
  711. struct omap_overlay *ovl;
  712. int r;
  713. DSSDBG("omap_dss_mgr_apply(%s)\n", mgr->name);
  714. spin_lock_irqsave(&data_lock, flags);
  715. r = dss_check_settings_apply(mgr);
  716. if (r) {
  717. spin_unlock_irqrestore(&data_lock, flags);
  718. DSSERR("failed to apply settings: illegal configuration.\n");
  719. return r;
  720. }
  721. /* Configure overlays */
  722. list_for_each_entry(ovl, &mgr->overlays, list)
  723. omap_dss_mgr_apply_ovl(ovl);
  724. /* Configure manager */
  725. omap_dss_mgr_apply_mgr(mgr);
  726. dss_write_regs();
  727. dss_set_go_bits();
  728. spin_unlock_irqrestore(&data_lock, flags);
  729. return 0;
  730. }
  731. static void dss_apply_ovl_enable(struct omap_overlay *ovl, bool enable)
  732. {
  733. struct ovl_priv_data *op;
  734. op = get_ovl_priv(ovl);
  735. if (op->enabled == enable)
  736. return;
  737. op->enabled = enable;
  738. op->extra_info_dirty = true;
  739. }
  740. static void dss_apply_ovl_fifo_thresholds(struct omap_overlay *ovl,
  741. u32 fifo_low, u32 fifo_high)
  742. {
  743. struct ovl_priv_data *op = get_ovl_priv(ovl);
  744. if (op->fifo_low == fifo_low && op->fifo_high == fifo_high)
  745. return;
  746. op->fifo_low = fifo_low;
  747. op->fifo_high = fifo_high;
  748. op->extra_info_dirty = true;
  749. }
  750. static void dss_apply_fifo_merge(bool use_fifo_merge)
  751. {
  752. if (dss_data.fifo_merge == use_fifo_merge)
  753. return;
  754. dss_data.fifo_merge = use_fifo_merge;
  755. dss_data.fifo_merge_dirty = true;
  756. }
  757. static void dss_ovl_setup_fifo(struct omap_overlay *ovl)
  758. {
  759. struct ovl_priv_data *op = get_ovl_priv(ovl);
  760. u32 fifo_low, fifo_high;
  761. bool use_fifo_merge = false;
  762. if (!op->enabled && !op->enabling)
  763. return;
  764. dispc_ovl_compute_fifo_thresholds(ovl->id, &fifo_low, &fifo_high,
  765. use_fifo_merge, ovl_manual_update(ovl));
  766. dss_apply_ovl_fifo_thresholds(ovl, fifo_low, fifo_high);
  767. }
  768. static void dss_mgr_setup_fifos(struct omap_overlay_manager *mgr)
  769. {
  770. struct omap_overlay *ovl;
  771. struct mgr_priv_data *mp;
  772. mp = get_mgr_priv(mgr);
  773. if (!mp->enabled)
  774. return;
  775. list_for_each_entry(ovl, &mgr->overlays, list)
  776. dss_ovl_setup_fifo(ovl);
  777. }
  778. static void dss_setup_fifos(void)
  779. {
  780. const int num_mgrs = omap_dss_get_num_overlay_managers();
  781. struct omap_overlay_manager *mgr;
  782. int i;
  783. for (i = 0; i < num_mgrs; ++i) {
  784. mgr = omap_dss_get_overlay_manager(i);
  785. dss_mgr_setup_fifos(mgr);
  786. }
  787. }
  788. int dss_mgr_enable(struct omap_overlay_manager *mgr)
  789. {
  790. struct mgr_priv_data *mp = get_mgr_priv(mgr);
  791. unsigned long flags;
  792. int r;
  793. mutex_lock(&apply_lock);
  794. if (mp->enabled)
  795. goto out;
  796. spin_lock_irqsave(&data_lock, flags);
  797. mp->enabled = true;
  798. r = dss_check_settings(mgr);
  799. if (r) {
  800. DSSERR("failed to enable manager %d: check_settings failed\n",
  801. mgr->id);
  802. goto err;
  803. }
  804. dss_setup_fifos();
  805. dss_write_regs();
  806. dss_set_go_bits();
  807. if (!mgr_manual_update(mgr))
  808. mp->updating = true;
  809. spin_unlock_irqrestore(&data_lock, flags);
  810. if (!mgr_manual_update(mgr))
  811. dispc_mgr_enable(mgr->id, true);
  812. out:
  813. mutex_unlock(&apply_lock);
  814. return 0;
  815. err:
  816. mp->enabled = false;
  817. spin_unlock_irqrestore(&data_lock, flags);
  818. mutex_unlock(&apply_lock);
  819. return r;
  820. }
  821. void dss_mgr_disable(struct omap_overlay_manager *mgr)
  822. {
  823. struct mgr_priv_data *mp = get_mgr_priv(mgr);
  824. unsigned long flags;
  825. mutex_lock(&apply_lock);
  826. if (!mp->enabled)
  827. goto out;
  828. if (!mgr_manual_update(mgr))
  829. dispc_mgr_enable(mgr->id, false);
  830. spin_lock_irqsave(&data_lock, flags);
  831. mp->updating = false;
  832. mp->enabled = false;
  833. spin_unlock_irqrestore(&data_lock, flags);
  834. out:
  835. mutex_unlock(&apply_lock);
  836. }
  837. int dss_mgr_set_info(struct omap_overlay_manager *mgr,
  838. struct omap_overlay_manager_info *info)
  839. {
  840. struct mgr_priv_data *mp = get_mgr_priv(mgr);
  841. unsigned long flags;
  842. int r;
  843. r = dss_mgr_simple_check(mgr, info);
  844. if (r)
  845. return r;
  846. spin_lock_irqsave(&data_lock, flags);
  847. mp->user_info = *info;
  848. mp->user_info_dirty = true;
  849. spin_unlock_irqrestore(&data_lock, flags);
  850. return 0;
  851. }
  852. void dss_mgr_get_info(struct omap_overlay_manager *mgr,
  853. struct omap_overlay_manager_info *info)
  854. {
  855. struct mgr_priv_data *mp = get_mgr_priv(mgr);
  856. unsigned long flags;
  857. spin_lock_irqsave(&data_lock, flags);
  858. *info = mp->user_info;
  859. spin_unlock_irqrestore(&data_lock, flags);
  860. }
  861. int dss_mgr_set_device(struct omap_overlay_manager *mgr,
  862. struct omap_dss_device *dssdev)
  863. {
  864. int r;
  865. mutex_lock(&apply_lock);
  866. if (dssdev->manager) {
  867. DSSERR("display '%s' already has a manager '%s'\n",
  868. dssdev->name, dssdev->manager->name);
  869. r = -EINVAL;
  870. goto err;
  871. }
  872. if ((mgr->supported_displays & dssdev->type) == 0) {
  873. DSSERR("display '%s' does not support manager '%s'\n",
  874. dssdev->name, mgr->name);
  875. r = -EINVAL;
  876. goto err;
  877. }
  878. dssdev->manager = mgr;
  879. mgr->device = dssdev;
  880. mutex_unlock(&apply_lock);
  881. return 0;
  882. err:
  883. mutex_unlock(&apply_lock);
  884. return r;
  885. }
  886. int dss_mgr_unset_device(struct omap_overlay_manager *mgr)
  887. {
  888. int r;
  889. mutex_lock(&apply_lock);
  890. if (!mgr->device) {
  891. DSSERR("failed to unset display, display not set.\n");
  892. r = -EINVAL;
  893. goto err;
  894. }
  895. /*
  896. * Don't allow currently enabled displays to have the overlay manager
  897. * pulled out from underneath them
  898. */
  899. if (mgr->device->state != OMAP_DSS_DISPLAY_DISABLED) {
  900. r = -EINVAL;
  901. goto err;
  902. }
  903. mgr->device->manager = NULL;
  904. mgr->device = NULL;
  905. mutex_unlock(&apply_lock);
  906. return 0;
  907. err:
  908. mutex_unlock(&apply_lock);
  909. return r;
  910. }
  911. static void dss_apply_mgr_timings(struct omap_overlay_manager *mgr,
  912. const struct omap_video_timings *timings)
  913. {
  914. struct mgr_priv_data *mp = get_mgr_priv(mgr);
  915. mp->timings = *timings;
  916. mp->extra_info_dirty = true;
  917. }
  918. void dss_mgr_set_timings(struct omap_overlay_manager *mgr,
  919. const struct omap_video_timings *timings)
  920. {
  921. unsigned long flags;
  922. struct mgr_priv_data *mp = get_mgr_priv(mgr);
  923. spin_lock_irqsave(&data_lock, flags);
  924. if (mp->updating) {
  925. DSSERR("cannot set timings for %s: manager needs to be disabled\n",
  926. mgr->name);
  927. goto out;
  928. }
  929. dss_apply_mgr_timings(mgr, timings);
  930. out:
  931. spin_unlock_irqrestore(&data_lock, flags);
  932. }
  933. static void dss_apply_mgr_lcd_config(struct omap_overlay_manager *mgr,
  934. const struct dss_lcd_mgr_config *config)
  935. {
  936. struct mgr_priv_data *mp = get_mgr_priv(mgr);
  937. mp->lcd_config = *config;
  938. mp->extra_info_dirty = true;
  939. }
  940. void dss_mgr_set_lcd_config(struct omap_overlay_manager *mgr,
  941. const struct dss_lcd_mgr_config *config)
  942. {
  943. unsigned long flags;
  944. struct mgr_priv_data *mp = get_mgr_priv(mgr);
  945. spin_lock_irqsave(&data_lock, flags);
  946. if (mp->enabled) {
  947. DSSERR("cannot apply lcd config for %s: manager needs to be disabled\n",
  948. mgr->name);
  949. goto out;
  950. }
  951. dss_apply_mgr_lcd_config(mgr, config);
  952. out:
  953. spin_unlock_irqrestore(&data_lock, flags);
  954. }
  955. int dss_ovl_set_info(struct omap_overlay *ovl,
  956. struct omap_overlay_info *info)
  957. {
  958. struct ovl_priv_data *op = get_ovl_priv(ovl);
  959. unsigned long flags;
  960. int r;
  961. r = dss_ovl_simple_check(ovl, info);
  962. if (r)
  963. return r;
  964. spin_lock_irqsave(&data_lock, flags);
  965. op->user_info = *info;
  966. op->user_info_dirty = true;
  967. spin_unlock_irqrestore(&data_lock, flags);
  968. return 0;
  969. }
  970. void dss_ovl_get_info(struct omap_overlay *ovl,
  971. struct omap_overlay_info *info)
  972. {
  973. struct ovl_priv_data *op = get_ovl_priv(ovl);
  974. unsigned long flags;
  975. spin_lock_irqsave(&data_lock, flags);
  976. *info = op->user_info;
  977. spin_unlock_irqrestore(&data_lock, flags);
  978. }
  979. int dss_ovl_set_manager(struct omap_overlay *ovl,
  980. struct omap_overlay_manager *mgr)
  981. {
  982. struct ovl_priv_data *op = get_ovl_priv(ovl);
  983. unsigned long flags;
  984. int r;
  985. if (!mgr)
  986. return -EINVAL;
  987. mutex_lock(&apply_lock);
  988. if (ovl->manager) {
  989. DSSERR("overlay '%s' already has a manager '%s'\n",
  990. ovl->name, ovl->manager->name);
  991. r = -EINVAL;
  992. goto err;
  993. }
  994. spin_lock_irqsave(&data_lock, flags);
  995. if (op->enabled) {
  996. spin_unlock_irqrestore(&data_lock, flags);
  997. DSSERR("overlay has to be disabled to change the manager\n");
  998. r = -EINVAL;
  999. goto err;
  1000. }
  1001. op->channel = mgr->id;
  1002. op->extra_info_dirty = true;
  1003. ovl->manager = mgr;
  1004. list_add_tail(&ovl->list, &mgr->overlays);
  1005. spin_unlock_irqrestore(&data_lock, flags);
  1006. /* XXX: When there is an overlay on a DSI manual update display, and
  1007. * the overlay is first disabled, then moved to tv, and enabled, we
  1008. * seem to get SYNC_LOST_DIGIT error.
  1009. *
  1010. * Waiting doesn't seem to help, but updating the manual update display
  1011. * after disabling the overlay seems to fix this. This hints that the
  1012. * overlay is perhaps somehow tied to the LCD output until the output
  1013. * is updated.
  1014. *
  1015. * Userspace workaround for this is to update the LCD after disabling
  1016. * the overlay, but before moving the overlay to TV.
  1017. */
  1018. mutex_unlock(&apply_lock);
  1019. return 0;
  1020. err:
  1021. mutex_unlock(&apply_lock);
  1022. return r;
  1023. }
  1024. int dss_ovl_unset_manager(struct omap_overlay *ovl)
  1025. {
  1026. struct ovl_priv_data *op = get_ovl_priv(ovl);
  1027. unsigned long flags;
  1028. int r;
  1029. mutex_lock(&apply_lock);
  1030. if (!ovl->manager) {
  1031. DSSERR("failed to detach overlay: manager not set\n");
  1032. r = -EINVAL;
  1033. goto err;
  1034. }
  1035. spin_lock_irqsave(&data_lock, flags);
  1036. if (op->enabled) {
  1037. spin_unlock_irqrestore(&data_lock, flags);
  1038. DSSERR("overlay has to be disabled to unset the manager\n");
  1039. r = -EINVAL;
  1040. goto err;
  1041. }
  1042. op->channel = -1;
  1043. ovl->manager = NULL;
  1044. list_del(&ovl->list);
  1045. spin_unlock_irqrestore(&data_lock, flags);
  1046. mutex_unlock(&apply_lock);
  1047. return 0;
  1048. err:
  1049. mutex_unlock(&apply_lock);
  1050. return r;
  1051. }
  1052. bool dss_ovl_is_enabled(struct omap_overlay *ovl)
  1053. {
  1054. struct ovl_priv_data *op = get_ovl_priv(ovl);
  1055. unsigned long flags;
  1056. bool e;
  1057. spin_lock_irqsave(&data_lock, flags);
  1058. e = op->enabled;
  1059. spin_unlock_irqrestore(&data_lock, flags);
  1060. return e;
  1061. }
  1062. int dss_ovl_enable(struct omap_overlay *ovl)
  1063. {
  1064. struct ovl_priv_data *op = get_ovl_priv(ovl);
  1065. unsigned long flags;
  1066. int r;
  1067. mutex_lock(&apply_lock);
  1068. if (op->enabled) {
  1069. r = 0;
  1070. goto err1;
  1071. }
  1072. if (ovl->manager == NULL || ovl->manager->device == NULL) {
  1073. r = -EINVAL;
  1074. goto err1;
  1075. }
  1076. spin_lock_irqsave(&data_lock, flags);
  1077. op->enabling = true;
  1078. r = dss_check_settings(ovl->manager);
  1079. if (r) {
  1080. DSSERR("failed to enable overlay %d: check_settings failed\n",
  1081. ovl->id);
  1082. goto err2;
  1083. }
  1084. dss_setup_fifos();
  1085. op->enabling = false;
  1086. dss_apply_ovl_enable(ovl, true);
  1087. dss_write_regs();
  1088. dss_set_go_bits();
  1089. spin_unlock_irqrestore(&data_lock, flags);
  1090. mutex_unlock(&apply_lock);
  1091. return 0;
  1092. err2:
  1093. op->enabling = false;
  1094. spin_unlock_irqrestore(&data_lock, flags);
  1095. err1:
  1096. mutex_unlock(&apply_lock);
  1097. return r;
  1098. }
  1099. int dss_ovl_disable(struct omap_overlay *ovl)
  1100. {
  1101. struct ovl_priv_data *op = get_ovl_priv(ovl);
  1102. unsigned long flags;
  1103. int r;
  1104. mutex_lock(&apply_lock);
  1105. if (!op->enabled) {
  1106. r = 0;
  1107. goto err;
  1108. }
  1109. if (ovl->manager == NULL || ovl->manager->device == NULL) {
  1110. r = -EINVAL;
  1111. goto err;
  1112. }
  1113. spin_lock_irqsave(&data_lock, flags);
  1114. dss_apply_ovl_enable(ovl, false);
  1115. dss_write_regs();
  1116. dss_set_go_bits();
  1117. spin_unlock_irqrestore(&data_lock, flags);
  1118. mutex_unlock(&apply_lock);
  1119. return 0;
  1120. err:
  1121. mutex_unlock(&apply_lock);
  1122. return r;
  1123. }