sharp.c 13 KB

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  1. /*
  2. * MTD chip driver for pre-CFI Sharp flash chips
  3. *
  4. * Copyright 2000,2001 David A. Schleef <ds@schleef.org>
  5. * 2000,2001 Lineo, Inc.
  6. *
  7. * $Id: sharp.c,v 1.16 2005/11/07 11:14:23 gleixner Exp $
  8. *
  9. * Devices supported:
  10. * LH28F016SCT Symmetrical block flash memory, 2Mx8
  11. * LH28F008SCT Symmetrical block flash memory, 1Mx8
  12. *
  13. * Documentation:
  14. * http://www.sharpmeg.com/datasheets/memic/flashcmp/
  15. * http://www.sharpmeg.com/datasheets/memic/flashcmp/01symf/16m/016sctl9.pdf
  16. * 016sctl9.pdf
  17. *
  18. * Limitations:
  19. * This driver only supports 4x1 arrangement of chips.
  20. * Not tested on anything but PowerPC.
  21. */
  22. #include <linux/kernel.h>
  23. #include <linux/module.h>
  24. #include <linux/types.h>
  25. #include <linux/sched.h>
  26. #include <linux/errno.h>
  27. #include <linux/interrupt.h>
  28. #include <linux/mtd/map.h>
  29. #include <linux/mtd/mtd.h>
  30. #include <linux/mtd/cfi.h>
  31. #include <linux/delay.h>
  32. #include <linux/init.h>
  33. #include <linux/slab.h>
  34. #define CMD_RESET 0xffffffff
  35. #define CMD_READ_ID 0x90909090
  36. #define CMD_READ_STATUS 0x70707070
  37. #define CMD_CLEAR_STATUS 0x50505050
  38. #define CMD_BLOCK_ERASE_1 0x20202020
  39. #define CMD_BLOCK_ERASE_2 0xd0d0d0d0
  40. #define CMD_BYTE_WRITE 0x40404040
  41. #define CMD_SUSPEND 0xb0b0b0b0
  42. #define CMD_RESUME 0xd0d0d0d0
  43. #define CMD_SET_BLOCK_LOCK_1 0x60606060
  44. #define CMD_SET_BLOCK_LOCK_2 0x01010101
  45. #define CMD_SET_MASTER_LOCK_1 0x60606060
  46. #define CMD_SET_MASTER_LOCK_2 0xf1f1f1f1
  47. #define CMD_CLEAR_BLOCK_LOCKS_1 0x60606060
  48. #define CMD_CLEAR_BLOCK_LOCKS_2 0xd0d0d0d0
  49. #define SR_READY 0x80808080 // 1 = ready
  50. #define SR_ERASE_SUSPEND 0x40404040 // 1 = block erase suspended
  51. #define SR_ERROR_ERASE 0x20202020 // 1 = error in block erase or clear lock bits
  52. #define SR_ERROR_WRITE 0x10101010 // 1 = error in byte write or set lock bit
  53. #define SR_VPP 0x08080808 // 1 = Vpp is low
  54. #define SR_WRITE_SUSPEND 0x04040404 // 1 = byte write suspended
  55. #define SR_PROTECT 0x02020202 // 1 = lock bit set
  56. #define SR_RESERVED 0x01010101
  57. #define SR_ERRORS (SR_ERROR_ERASE|SR_ERROR_WRITE|SR_VPP|SR_PROTECT)
  58. /* Configuration options */
  59. #undef AUTOUNLOCK /* automatically unlocks blocks before erasing */
  60. struct mtd_info *sharp_probe(struct map_info *);
  61. static int sharp_probe_map(struct map_info *map,struct mtd_info *mtd);
  62. static int sharp_read(struct mtd_info *mtd, loff_t from, size_t len,
  63. size_t *retlen, u_char *buf);
  64. static int sharp_write(struct mtd_info *mtd, loff_t from, size_t len,
  65. size_t *retlen, const u_char *buf);
  66. static int sharp_erase(struct mtd_info *mtd, struct erase_info *instr);
  67. static void sharp_sync(struct mtd_info *mtd);
  68. static int sharp_suspend(struct mtd_info *mtd);
  69. static void sharp_resume(struct mtd_info *mtd);
  70. static void sharp_destroy(struct mtd_info *mtd);
  71. static int sharp_write_oneword(struct map_info *map, struct flchip *chip,
  72. unsigned long adr, __u32 datum);
  73. static int sharp_erase_oneblock(struct map_info *map, struct flchip *chip,
  74. unsigned long adr);
  75. #ifdef AUTOUNLOCK
  76. static void sharp_unlock_oneblock(struct map_info *map, struct flchip *chip,
  77. unsigned long adr);
  78. #endif
  79. struct sharp_info{
  80. struct flchip *chip;
  81. int bogus;
  82. int chipshift;
  83. int numchips;
  84. struct flchip chips[1];
  85. };
  86. struct mtd_info *sharp_probe(struct map_info *map);
  87. static void sharp_destroy(struct mtd_info *mtd);
  88. static struct mtd_chip_driver sharp_chipdrv = {
  89. .probe = sharp_probe,
  90. .destroy = sharp_destroy,
  91. .name = "sharp",
  92. .module = THIS_MODULE
  93. };
  94. struct mtd_info *sharp_probe(struct map_info *map)
  95. {
  96. struct mtd_info *mtd = NULL;
  97. struct sharp_info *sharp = NULL;
  98. int width;
  99. mtd = kmalloc(sizeof(*mtd), GFP_KERNEL);
  100. if(!mtd)
  101. return NULL;
  102. sharp = kmalloc(sizeof(*sharp), GFP_KERNEL);
  103. if(!sharp) {
  104. kfree(mtd);
  105. return NULL;
  106. }
  107. memset(mtd, 0, sizeof(*mtd));
  108. width = sharp_probe_map(map,mtd);
  109. if(!width){
  110. kfree(mtd);
  111. kfree(sharp);
  112. return NULL;
  113. }
  114. mtd->priv = map;
  115. mtd->type = MTD_NORFLASH;
  116. mtd->erase = sharp_erase;
  117. mtd->read = sharp_read;
  118. mtd->write = sharp_write;
  119. mtd->sync = sharp_sync;
  120. mtd->suspend = sharp_suspend;
  121. mtd->resume = sharp_resume;
  122. mtd->flags = MTD_CAP_NORFLASH;
  123. mtd->name = map->name;
  124. memset(sharp, 0, sizeof(*sharp));
  125. sharp->chipshift = 23;
  126. sharp->numchips = 1;
  127. sharp->chips[0].start = 0;
  128. sharp->chips[0].state = FL_READY;
  129. sharp->chips[0].mutex = &sharp->chips[0]._spinlock;
  130. sharp->chips[0].word_write_time = 0;
  131. init_waitqueue_head(&sharp->chips[0].wq);
  132. spin_lock_init(&sharp->chips[0]._spinlock);
  133. map->fldrv = &sharp_chipdrv;
  134. map->fldrv_priv = sharp;
  135. __module_get(THIS_MODULE);
  136. return mtd;
  137. }
  138. static int sharp_probe_map(struct map_info *map,struct mtd_info *mtd)
  139. {
  140. unsigned long tmp;
  141. unsigned long base = 0;
  142. u32 read0, read4;
  143. int width = 4;
  144. tmp = map_read32(map, base+0);
  145. map_write32(map, CMD_READ_ID, base+0);
  146. read0=map_read32(map, base+0);
  147. read4=map_read32(map, base+4);
  148. if(read0 == 0x89898989){
  149. printk("Looks like sharp flash\n");
  150. switch(read4){
  151. case 0xaaaaaaaa:
  152. case 0xa0a0a0a0:
  153. /* aa - LH28F016SCT-L95 2Mx8, 32 64k blocks*/
  154. /* a0 - LH28F016SCT-Z4 2Mx8, 32 64k blocks*/
  155. mtd->erasesize = 0x10000 * width;
  156. mtd->size = 0x200000 * width;
  157. return width;
  158. case 0xa6a6a6a6:
  159. /* a6 - LH28F008SCT-L12 1Mx8, 16 64k blocks*/
  160. /* a6 - LH28F008SCR-L85 1Mx8, 16 64k blocks*/
  161. mtd->erasesize = 0x10000 * width;
  162. mtd->size = 0x100000 * width;
  163. return width;
  164. #if 0
  165. case 0x00000000: /* unknown */
  166. /* XX - LH28F004SCT 512kx8, 8 64k blocks*/
  167. mtd->erasesize = 0x10000 * width;
  168. mtd->size = 0x80000 * width;
  169. return width;
  170. #endif
  171. default:
  172. printk("Sort-of looks like sharp flash, 0x%08x 0x%08x\n",
  173. read0,read4);
  174. }
  175. }else if((map_read32(map, base+0) == CMD_READ_ID)){
  176. /* RAM, probably */
  177. printk("Looks like RAM\n");
  178. map_write32(map, tmp, base+0);
  179. }else{
  180. printk("Doesn't look like sharp flash, 0x%08x 0x%08x\n",
  181. read0,read4);
  182. }
  183. return 0;
  184. }
  185. /* This function returns with the chip->mutex lock held. */
  186. static int sharp_wait(struct map_info *map, struct flchip *chip)
  187. {
  188. int status, i;
  189. unsigned long timeo = jiffies + HZ;
  190. DECLARE_WAITQUEUE(wait, current);
  191. int adr = 0;
  192. retry:
  193. spin_lock_bh(chip->mutex);
  194. switch(chip->state){
  195. case FL_READY:
  196. map_write32(map,CMD_READ_STATUS,adr);
  197. chip->state = FL_STATUS;
  198. case FL_STATUS:
  199. for(i=0;i<100;i++){
  200. status = map_read32(map,adr);
  201. if((status & SR_READY)==SR_READY)
  202. break;
  203. udelay(1);
  204. }
  205. break;
  206. default:
  207. printk("Waiting for chip\n");
  208. set_current_state(TASK_INTERRUPTIBLE);
  209. add_wait_queue(&chip->wq, &wait);
  210. spin_unlock_bh(chip->mutex);
  211. schedule();
  212. remove_wait_queue(&chip->wq, &wait);
  213. if(signal_pending(current))
  214. return -EINTR;
  215. timeo = jiffies + HZ;
  216. goto retry;
  217. }
  218. map_write32(map,CMD_RESET, adr);
  219. chip->state = FL_READY;
  220. return 0;
  221. }
  222. static void sharp_release(struct flchip *chip)
  223. {
  224. wake_up(&chip->wq);
  225. spin_unlock_bh(chip->mutex);
  226. }
  227. static int sharp_read(struct mtd_info *mtd, loff_t from, size_t len,
  228. size_t *retlen, u_char *buf)
  229. {
  230. struct map_info *map = mtd->priv;
  231. struct sharp_info *sharp = map->fldrv_priv;
  232. int chipnum;
  233. int ret = 0;
  234. int ofs = 0;
  235. chipnum = (from >> sharp->chipshift);
  236. ofs = from & ((1 << sharp->chipshift)-1);
  237. *retlen = 0;
  238. while(len){
  239. unsigned long thislen;
  240. if(chipnum>=sharp->numchips)
  241. break;
  242. thislen = len;
  243. if(ofs+thislen >= (1<<sharp->chipshift))
  244. thislen = (1<<sharp->chipshift) - ofs;
  245. ret = sharp_wait(map,&sharp->chips[chipnum]);
  246. if(ret<0)
  247. break;
  248. map_copy_from(map,buf,ofs,thislen);
  249. sharp_release(&sharp->chips[chipnum]);
  250. *retlen += thislen;
  251. len -= thislen;
  252. buf += thislen;
  253. ofs = 0;
  254. chipnum++;
  255. }
  256. return ret;
  257. }
  258. static int sharp_write(struct mtd_info *mtd, loff_t to, size_t len,
  259. size_t *retlen, const u_char *buf)
  260. {
  261. struct map_info *map = mtd->priv;
  262. struct sharp_info *sharp = map->fldrv_priv;
  263. int ret = 0;
  264. int i,j;
  265. int chipnum;
  266. unsigned long ofs;
  267. union { u32 l; unsigned char uc[4]; } tbuf;
  268. *retlen = 0;
  269. while(len){
  270. tbuf.l = 0xffffffff;
  271. chipnum = to >> sharp->chipshift;
  272. ofs = to & ((1<<sharp->chipshift)-1);
  273. j=0;
  274. for(i=ofs&3;i<4 && len;i++){
  275. tbuf.uc[i] = *buf;
  276. buf++;
  277. to++;
  278. len--;
  279. j++;
  280. }
  281. sharp_write_oneword(map, &sharp->chips[chipnum], ofs&~3, tbuf.l);
  282. if(ret<0)
  283. return ret;
  284. (*retlen)+=j;
  285. }
  286. return 0;
  287. }
  288. static int sharp_write_oneword(struct map_info *map, struct flchip *chip,
  289. unsigned long adr, __u32 datum)
  290. {
  291. int ret;
  292. int timeo;
  293. int try;
  294. int i;
  295. int status = 0;
  296. ret = sharp_wait(map,chip);
  297. for(try=0;try<10;try++){
  298. map_write32(map,CMD_BYTE_WRITE,adr);
  299. /* cpu_to_le32 -> hack to fix the writel be->le conversion */
  300. map_write32(map,cpu_to_le32(datum),adr);
  301. chip->state = FL_WRITING;
  302. timeo = jiffies + (HZ/2);
  303. map_write32(map,CMD_READ_STATUS,adr);
  304. for(i=0;i<100;i++){
  305. status = map_read32(map,adr);
  306. if((status & SR_READY)==SR_READY)
  307. break;
  308. }
  309. if(i==100){
  310. printk("sharp: timed out writing\n");
  311. }
  312. if(!(status&SR_ERRORS))
  313. break;
  314. printk("sharp: error writing byte at addr=%08lx status=%08x\n",adr,status);
  315. map_write32(map,CMD_CLEAR_STATUS,adr);
  316. }
  317. map_write32(map,CMD_RESET,adr);
  318. chip->state = FL_READY;
  319. wake_up(&chip->wq);
  320. spin_unlock_bh(chip->mutex);
  321. return 0;
  322. }
  323. static int sharp_erase(struct mtd_info *mtd, struct erase_info *instr)
  324. {
  325. struct map_info *map = mtd->priv;
  326. struct sharp_info *sharp = map->fldrv_priv;
  327. unsigned long adr,len;
  328. int chipnum, ret=0;
  329. //printk("sharp_erase()\n");
  330. if(instr->addr & (mtd->erasesize - 1))
  331. return -EINVAL;
  332. if(instr->len & (mtd->erasesize - 1))
  333. return -EINVAL;
  334. if(instr->len + instr->addr > mtd->size)
  335. return -EINVAL;
  336. chipnum = instr->addr >> sharp->chipshift;
  337. adr = instr->addr & ((1<<sharp->chipshift)-1);
  338. len = instr->len;
  339. while(len){
  340. ret = sharp_erase_oneblock(map, &sharp->chips[chipnum], adr);
  341. if(ret)return ret;
  342. adr += mtd->erasesize;
  343. len -= mtd->erasesize;
  344. if(adr >> sharp->chipshift){
  345. adr = 0;
  346. chipnum++;
  347. if(chipnum>=sharp->numchips)
  348. break;
  349. }
  350. }
  351. instr->state = MTD_ERASE_DONE;
  352. mtd_erase_callback(instr);
  353. return 0;
  354. }
  355. static int sharp_do_wait_for_ready(struct map_info *map, struct flchip *chip,
  356. unsigned long adr)
  357. {
  358. int ret;
  359. unsigned long timeo;
  360. int status;
  361. DECLARE_WAITQUEUE(wait, current);
  362. map_write32(map,CMD_READ_STATUS,adr);
  363. status = map_read32(map,adr);
  364. timeo = jiffies + HZ;
  365. while(time_before(jiffies, timeo)){
  366. map_write32(map,CMD_READ_STATUS,adr);
  367. status = map_read32(map,adr);
  368. if((status & SR_READY)==SR_READY){
  369. ret = 0;
  370. goto out;
  371. }
  372. set_current_state(TASK_INTERRUPTIBLE);
  373. add_wait_queue(&chip->wq, &wait);
  374. //spin_unlock_bh(chip->mutex);
  375. schedule_timeout(1);
  376. schedule();
  377. remove_wait_queue(&chip->wq, &wait);
  378. //spin_lock_bh(chip->mutex);
  379. if (signal_pending(current)){
  380. ret = -EINTR;
  381. goto out;
  382. }
  383. }
  384. ret = -ETIME;
  385. out:
  386. return ret;
  387. }
  388. static int sharp_erase_oneblock(struct map_info *map, struct flchip *chip,
  389. unsigned long adr)
  390. {
  391. int ret;
  392. //int timeo;
  393. int status;
  394. //int i;
  395. //printk("sharp_erase_oneblock()\n");
  396. #ifdef AUTOUNLOCK
  397. /* This seems like a good place to do an unlock */
  398. sharp_unlock_oneblock(map,chip,adr);
  399. #endif
  400. map_write32(map,CMD_BLOCK_ERASE_1,adr);
  401. map_write32(map,CMD_BLOCK_ERASE_2,adr);
  402. chip->state = FL_ERASING;
  403. ret = sharp_do_wait_for_ready(map,chip,adr);
  404. if(ret<0)return ret;
  405. map_write32(map,CMD_READ_STATUS,adr);
  406. status = map_read32(map,adr);
  407. if(!(status&SR_ERRORS)){
  408. map_write32(map,CMD_RESET,adr);
  409. chip->state = FL_READY;
  410. //spin_unlock_bh(chip->mutex);
  411. return 0;
  412. }
  413. printk("sharp: error erasing block at addr=%08lx status=%08x\n",adr,status);
  414. map_write32(map,CMD_CLEAR_STATUS,adr);
  415. //spin_unlock_bh(chip->mutex);
  416. return -EIO;
  417. }
  418. #ifdef AUTOUNLOCK
  419. static void sharp_unlock_oneblock(struct map_info *map, struct flchip *chip,
  420. unsigned long adr)
  421. {
  422. int i;
  423. int status;
  424. map_write32(map,CMD_CLEAR_BLOCK_LOCKS_1,adr);
  425. map_write32(map,CMD_CLEAR_BLOCK_LOCKS_2,adr);
  426. udelay(100);
  427. status = map_read32(map,adr);
  428. printk("status=%08x\n",status);
  429. for(i=0;i<1000;i++){
  430. //map_write32(map,CMD_READ_STATUS,adr);
  431. status = map_read32(map,adr);
  432. if((status & SR_READY)==SR_READY)
  433. break;
  434. udelay(100);
  435. }
  436. if(i==1000){
  437. printk("sharp: timed out unlocking block\n");
  438. }
  439. if(!(status&SR_ERRORS)){
  440. map_write32(map,CMD_RESET,adr);
  441. chip->state = FL_READY;
  442. return;
  443. }
  444. printk("sharp: error unlocking block at addr=%08lx status=%08x\n",adr,status);
  445. map_write32(map,CMD_CLEAR_STATUS,adr);
  446. }
  447. #endif
  448. static void sharp_sync(struct mtd_info *mtd)
  449. {
  450. //printk("sharp_sync()\n");
  451. }
  452. static int sharp_suspend(struct mtd_info *mtd)
  453. {
  454. printk("sharp_suspend()\n");
  455. return -EINVAL;
  456. }
  457. static void sharp_resume(struct mtd_info *mtd)
  458. {
  459. printk("sharp_resume()\n");
  460. }
  461. static void sharp_destroy(struct mtd_info *mtd)
  462. {
  463. printk("sharp_destroy()\n");
  464. }
  465. int __init sharp_probe_init(void)
  466. {
  467. printk("MTD Sharp chip driver <ds@lineo.com>\n");
  468. register_mtd_chip_driver(&sharp_chipdrv);
  469. return 0;
  470. }
  471. static void __exit sharp_probe_exit(void)
  472. {
  473. unregister_mtd_chip_driver(&sharp_chipdrv);
  474. }
  475. module_init(sharp_probe_init);
  476. module_exit(sharp_probe_exit);
  477. MODULE_LICENSE("GPL");
  478. MODULE_AUTHOR("David Schleef <ds@schleef.org>");
  479. MODULE_DESCRIPTION("Old MTD chip driver for pre-CFI Sharp flash chips");