core.c 18 KB

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  1. /*
  2. * arch/arm/mach-ep93xx/core.c
  3. * Core routines for Cirrus EP93xx chips.
  4. *
  5. * Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org>
  6. * Copyright (C) 2007 Herbert Valerio Riedel <hvr@gnu.org>
  7. *
  8. * Thanks go to Michael Burian and Ray Lehtiniemi for their key
  9. * role in the ep93xx linux community.
  10. *
  11. * This program is free software; you can redistribute it and/or modify
  12. * it under the terms of the GNU General Public License as published by
  13. * the Free Software Foundation; either version 2 of the License, or (at
  14. * your option) any later version.
  15. */
  16. #define pr_fmt(fmt) "ep93xx " KBUILD_MODNAME ": " fmt
  17. #include <linux/kernel.h>
  18. #include <linux/init.h>
  19. #include <linux/platform_device.h>
  20. #include <linux/interrupt.h>
  21. #include <linux/dma-mapping.h>
  22. #include <linux/timex.h>
  23. #include <linux/irq.h>
  24. #include <linux/io.h>
  25. #include <linux/gpio.h>
  26. #include <linux/leds.h>
  27. #include <linux/termios.h>
  28. #include <linux/amba/bus.h>
  29. #include <linux/amba/serial.h>
  30. #include <linux/i2c.h>
  31. #include <linux/i2c-gpio.h>
  32. #include <mach/hardware.h>
  33. #include <mach/fb.h>
  34. #include <mach/ep93xx_keypad.h>
  35. #include <asm/mach/map.h>
  36. #include <asm/mach/time.h>
  37. #include <asm/hardware/vic.h>
  38. /*************************************************************************
  39. * Static I/O mappings that are needed for all EP93xx platforms
  40. *************************************************************************/
  41. static struct map_desc ep93xx_io_desc[] __initdata = {
  42. {
  43. .virtual = EP93XX_AHB_VIRT_BASE,
  44. .pfn = __phys_to_pfn(EP93XX_AHB_PHYS_BASE),
  45. .length = EP93XX_AHB_SIZE,
  46. .type = MT_DEVICE,
  47. }, {
  48. .virtual = EP93XX_APB_VIRT_BASE,
  49. .pfn = __phys_to_pfn(EP93XX_APB_PHYS_BASE),
  50. .length = EP93XX_APB_SIZE,
  51. .type = MT_DEVICE,
  52. },
  53. };
  54. void __init ep93xx_map_io(void)
  55. {
  56. iotable_init(ep93xx_io_desc, ARRAY_SIZE(ep93xx_io_desc));
  57. }
  58. /*************************************************************************
  59. * Timer handling for EP93xx
  60. *************************************************************************
  61. * The ep93xx has four internal timers. Timers 1, 2 (both 16 bit) and
  62. * 3 (32 bit) count down at 508 kHz, are self-reloading, and can generate
  63. * an interrupt on underflow. Timer 4 (40 bit) counts down at 983.04 kHz,
  64. * is free-running, and can't generate interrupts.
  65. *
  66. * The 508 kHz timers are ideal for use for the timer interrupt, as the
  67. * most common values of HZ divide 508 kHz nicely. We pick one of the 16
  68. * bit timers (timer 1) since we don't need more than 16 bits of reload
  69. * value as long as HZ >= 8.
  70. *
  71. * The higher clock rate of timer 4 makes it a better choice than the
  72. * other timers for use in gettimeoffset(), while the fact that it can't
  73. * generate interrupts means we don't have to worry about not being able
  74. * to use this timer for something else. We also use timer 4 for keeping
  75. * track of lost jiffies.
  76. */
  77. #define EP93XX_TIMER_REG(x) (EP93XX_TIMER_BASE + (x))
  78. #define EP93XX_TIMER1_LOAD EP93XX_TIMER_REG(0x00)
  79. #define EP93XX_TIMER1_VALUE EP93XX_TIMER_REG(0x04)
  80. #define EP93XX_TIMER1_CONTROL EP93XX_TIMER_REG(0x08)
  81. #define EP93XX_TIMER123_CONTROL_ENABLE (1 << 7)
  82. #define EP93XX_TIMER123_CONTROL_MODE (1 << 6)
  83. #define EP93XX_TIMER123_CONTROL_CLKSEL (1 << 3)
  84. #define EP93XX_TIMER1_CLEAR EP93XX_TIMER_REG(0x0c)
  85. #define EP93XX_TIMER2_LOAD EP93XX_TIMER_REG(0x20)
  86. #define EP93XX_TIMER2_VALUE EP93XX_TIMER_REG(0x24)
  87. #define EP93XX_TIMER2_CONTROL EP93XX_TIMER_REG(0x28)
  88. #define EP93XX_TIMER2_CLEAR EP93XX_TIMER_REG(0x2c)
  89. #define EP93XX_TIMER4_VALUE_LOW EP93XX_TIMER_REG(0x60)
  90. #define EP93XX_TIMER4_VALUE_HIGH EP93XX_TIMER_REG(0x64)
  91. #define EP93XX_TIMER4_VALUE_HIGH_ENABLE (1 << 8)
  92. #define EP93XX_TIMER3_LOAD EP93XX_TIMER_REG(0x80)
  93. #define EP93XX_TIMER3_VALUE EP93XX_TIMER_REG(0x84)
  94. #define EP93XX_TIMER3_CONTROL EP93XX_TIMER_REG(0x88)
  95. #define EP93XX_TIMER3_CLEAR EP93XX_TIMER_REG(0x8c)
  96. #define EP93XX_TIMER123_CLOCK 508469
  97. #define EP93XX_TIMER4_CLOCK 983040
  98. #define TIMER1_RELOAD ((EP93XX_TIMER123_CLOCK / HZ) - 1)
  99. #define TIMER4_TICKS_PER_JIFFY DIV_ROUND_CLOSEST(CLOCK_TICK_RATE, HZ)
  100. static unsigned int last_jiffy_time;
  101. static irqreturn_t ep93xx_timer_interrupt(int irq, void *dev_id)
  102. {
  103. /* Writing any value clears the timer interrupt */
  104. __raw_writel(1, EP93XX_TIMER1_CLEAR);
  105. /* Recover lost jiffies */
  106. while ((signed long)
  107. (__raw_readl(EP93XX_TIMER4_VALUE_LOW) - last_jiffy_time)
  108. >= TIMER4_TICKS_PER_JIFFY) {
  109. last_jiffy_time += TIMER4_TICKS_PER_JIFFY;
  110. timer_tick();
  111. }
  112. return IRQ_HANDLED;
  113. }
  114. static struct irqaction ep93xx_timer_irq = {
  115. .name = "ep93xx timer",
  116. .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
  117. .handler = ep93xx_timer_interrupt,
  118. };
  119. static void __init ep93xx_timer_init(void)
  120. {
  121. u32 tmode = EP93XX_TIMER123_CONTROL_MODE |
  122. EP93XX_TIMER123_CONTROL_CLKSEL;
  123. /* Enable periodic HZ timer. */
  124. __raw_writel(tmode, EP93XX_TIMER1_CONTROL);
  125. __raw_writel(TIMER1_RELOAD, EP93XX_TIMER1_LOAD);
  126. __raw_writel(tmode | EP93XX_TIMER123_CONTROL_ENABLE,
  127. EP93XX_TIMER1_CONTROL);
  128. /* Enable lost jiffy timer. */
  129. __raw_writel(EP93XX_TIMER4_VALUE_HIGH_ENABLE,
  130. EP93XX_TIMER4_VALUE_HIGH);
  131. setup_irq(IRQ_EP93XX_TIMER1, &ep93xx_timer_irq);
  132. }
  133. static unsigned long ep93xx_gettimeoffset(void)
  134. {
  135. int offset;
  136. offset = __raw_readl(EP93XX_TIMER4_VALUE_LOW) - last_jiffy_time;
  137. /* Calculate (1000000 / 983040) * offset. */
  138. return offset + (53 * offset / 3072);
  139. }
  140. struct sys_timer ep93xx_timer = {
  141. .init = ep93xx_timer_init,
  142. .offset = ep93xx_gettimeoffset,
  143. };
  144. /*************************************************************************
  145. * EP93xx IRQ handling
  146. *************************************************************************/
  147. extern void ep93xx_gpio_init_irq(void);
  148. void __init ep93xx_init_irq(void)
  149. {
  150. vic_init(EP93XX_VIC1_BASE, 0, EP93XX_VIC1_VALID_IRQ_MASK, 0);
  151. vic_init(EP93XX_VIC2_BASE, 32, EP93XX_VIC2_VALID_IRQ_MASK, 0);
  152. ep93xx_gpio_init_irq();
  153. }
  154. /*************************************************************************
  155. * EP93xx System Controller Software Locked register handling
  156. *************************************************************************/
  157. /*
  158. * syscon_swlock prevents anything else from writing to the syscon
  159. * block while a software locked register is being written.
  160. */
  161. static DEFINE_SPINLOCK(syscon_swlock);
  162. void ep93xx_syscon_swlocked_write(unsigned int val, void __iomem *reg)
  163. {
  164. unsigned long flags;
  165. spin_lock_irqsave(&syscon_swlock, flags);
  166. __raw_writel(0xaa, EP93XX_SYSCON_SWLOCK);
  167. __raw_writel(val, reg);
  168. spin_unlock_irqrestore(&syscon_swlock, flags);
  169. }
  170. EXPORT_SYMBOL(ep93xx_syscon_swlocked_write);
  171. void ep93xx_devcfg_set_clear(unsigned int set_bits, unsigned int clear_bits)
  172. {
  173. unsigned long flags;
  174. unsigned int val;
  175. spin_lock_irqsave(&syscon_swlock, flags);
  176. val = __raw_readl(EP93XX_SYSCON_DEVCFG);
  177. val |= set_bits;
  178. val &= ~clear_bits;
  179. __raw_writel(0xaa, EP93XX_SYSCON_SWLOCK);
  180. __raw_writel(val, EP93XX_SYSCON_DEVCFG);
  181. spin_unlock_irqrestore(&syscon_swlock, flags);
  182. }
  183. EXPORT_SYMBOL(ep93xx_devcfg_set_clear);
  184. /*************************************************************************
  185. * EP93xx peripheral handling
  186. *************************************************************************/
  187. #define EP93XX_UART_MCR_OFFSET (0x0100)
  188. static void ep93xx_uart_set_mctrl(struct amba_device *dev,
  189. void __iomem *base, unsigned int mctrl)
  190. {
  191. unsigned int mcr;
  192. mcr = 0;
  193. if (!(mctrl & TIOCM_RTS))
  194. mcr |= 2;
  195. if (!(mctrl & TIOCM_DTR))
  196. mcr |= 1;
  197. __raw_writel(mcr, base + EP93XX_UART_MCR_OFFSET);
  198. }
  199. static struct amba_pl010_data ep93xx_uart_data = {
  200. .set_mctrl = ep93xx_uart_set_mctrl,
  201. };
  202. static struct amba_device uart1_device = {
  203. .dev = {
  204. .init_name = "apb:uart1",
  205. .platform_data = &ep93xx_uart_data,
  206. },
  207. .res = {
  208. .start = EP93XX_UART1_PHYS_BASE,
  209. .end = EP93XX_UART1_PHYS_BASE + 0x0fff,
  210. .flags = IORESOURCE_MEM,
  211. },
  212. .irq = { IRQ_EP93XX_UART1, NO_IRQ },
  213. .periphid = 0x00041010,
  214. };
  215. static struct amba_device uart2_device = {
  216. .dev = {
  217. .init_name = "apb:uart2",
  218. .platform_data = &ep93xx_uart_data,
  219. },
  220. .res = {
  221. .start = EP93XX_UART2_PHYS_BASE,
  222. .end = EP93XX_UART2_PHYS_BASE + 0x0fff,
  223. .flags = IORESOURCE_MEM,
  224. },
  225. .irq = { IRQ_EP93XX_UART2, NO_IRQ },
  226. .periphid = 0x00041010,
  227. };
  228. static struct amba_device uart3_device = {
  229. .dev = {
  230. .init_name = "apb:uart3",
  231. .platform_data = &ep93xx_uart_data,
  232. },
  233. .res = {
  234. .start = EP93XX_UART3_PHYS_BASE,
  235. .end = EP93XX_UART3_PHYS_BASE + 0x0fff,
  236. .flags = IORESOURCE_MEM,
  237. },
  238. .irq = { IRQ_EP93XX_UART3, NO_IRQ },
  239. .periphid = 0x00041010,
  240. };
  241. static struct resource ep93xx_rtc_resource[] = {
  242. {
  243. .start = EP93XX_RTC_PHYS_BASE,
  244. .end = EP93XX_RTC_PHYS_BASE + 0x10c - 1,
  245. .flags = IORESOURCE_MEM,
  246. },
  247. };
  248. static struct platform_device ep93xx_rtc_device = {
  249. .name = "ep93xx-rtc",
  250. .id = -1,
  251. .num_resources = ARRAY_SIZE(ep93xx_rtc_resource),
  252. .resource = ep93xx_rtc_resource,
  253. };
  254. static struct resource ep93xx_ohci_resources[] = {
  255. [0] = {
  256. .start = EP93XX_USB_PHYS_BASE,
  257. .end = EP93XX_USB_PHYS_BASE + 0x0fff,
  258. .flags = IORESOURCE_MEM,
  259. },
  260. [1] = {
  261. .start = IRQ_EP93XX_USB,
  262. .end = IRQ_EP93XX_USB,
  263. .flags = IORESOURCE_IRQ,
  264. },
  265. };
  266. static struct platform_device ep93xx_ohci_device = {
  267. .name = "ep93xx-ohci",
  268. .id = -1,
  269. .dev = {
  270. .dma_mask = &ep93xx_ohci_device.dev.coherent_dma_mask,
  271. .coherent_dma_mask = DMA_BIT_MASK(32),
  272. },
  273. .num_resources = ARRAY_SIZE(ep93xx_ohci_resources),
  274. .resource = ep93xx_ohci_resources,
  275. };
  276. /*************************************************************************
  277. * EP93xx ethernet peripheral handling
  278. *************************************************************************/
  279. static struct ep93xx_eth_data ep93xx_eth_data;
  280. static struct resource ep93xx_eth_resource[] = {
  281. {
  282. .start = EP93XX_ETHERNET_PHYS_BASE,
  283. .end = EP93XX_ETHERNET_PHYS_BASE + 0xffff,
  284. .flags = IORESOURCE_MEM,
  285. }, {
  286. .start = IRQ_EP93XX_ETHERNET,
  287. .end = IRQ_EP93XX_ETHERNET,
  288. .flags = IORESOURCE_IRQ,
  289. }
  290. };
  291. static struct platform_device ep93xx_eth_device = {
  292. .name = "ep93xx-eth",
  293. .id = -1,
  294. .dev = {
  295. .platform_data = &ep93xx_eth_data,
  296. },
  297. .num_resources = ARRAY_SIZE(ep93xx_eth_resource),
  298. .resource = ep93xx_eth_resource,
  299. };
  300. /**
  301. * ep93xx_register_eth - Register the built-in ethernet platform device.
  302. * @data: platform specific ethernet configuration (__initdata)
  303. * @copy_addr: flag indicating that the MAC address should be copied
  304. * from the IndAd registers (as programmed by the bootloader)
  305. */
  306. void __init ep93xx_register_eth(struct ep93xx_eth_data *data, int copy_addr)
  307. {
  308. if (copy_addr)
  309. memcpy_fromio(data->dev_addr, EP93XX_ETHERNET_BASE + 0x50, 6);
  310. ep93xx_eth_data = *data;
  311. platform_device_register(&ep93xx_eth_device);
  312. }
  313. /*************************************************************************
  314. * EP93xx i2c peripheral handling
  315. *************************************************************************/
  316. static struct i2c_gpio_platform_data ep93xx_i2c_data;
  317. static struct platform_device ep93xx_i2c_device = {
  318. .name = "i2c-gpio",
  319. .id = 0,
  320. .dev = {
  321. .platform_data = &ep93xx_i2c_data,
  322. },
  323. };
  324. /**
  325. * ep93xx_register_i2c - Register the i2c platform device.
  326. * @data: platform specific i2c-gpio configuration (__initdata)
  327. * @devices: platform specific i2c bus device information (__initdata)
  328. * @num: the number of devices on the i2c bus
  329. */
  330. void __init ep93xx_register_i2c(struct i2c_gpio_platform_data *data,
  331. struct i2c_board_info *devices, int num)
  332. {
  333. /*
  334. * Set the EEPROM interface pin drive type control.
  335. * Defines the driver type for the EECLK and EEDAT pins as either
  336. * open drain, which will require an external pull-up, or a normal
  337. * CMOS driver.
  338. */
  339. if (data->sda_is_open_drain && data->sda_pin != EP93XX_GPIO_LINE_EEDAT)
  340. pr_warning("sda != EEDAT, open drain has no effect\n");
  341. if (data->scl_is_open_drain && data->scl_pin != EP93XX_GPIO_LINE_EECLK)
  342. pr_warning("scl != EECLK, open drain has no effect\n");
  343. __raw_writel((data->sda_is_open_drain << 1) |
  344. (data->scl_is_open_drain << 0),
  345. EP93XX_GPIO_EEDRIVE);
  346. ep93xx_i2c_data = *data;
  347. i2c_register_board_info(0, devices, num);
  348. platform_device_register(&ep93xx_i2c_device);
  349. }
  350. /*************************************************************************
  351. * EP93xx LEDs
  352. *************************************************************************/
  353. static struct gpio_led ep93xx_led_pins[] = {
  354. {
  355. .name = "platform:grled",
  356. .gpio = EP93XX_GPIO_LINE_GRLED,
  357. }, {
  358. .name = "platform:rdled",
  359. .gpio = EP93XX_GPIO_LINE_RDLED,
  360. },
  361. };
  362. static struct gpio_led_platform_data ep93xx_led_data = {
  363. .num_leds = ARRAY_SIZE(ep93xx_led_pins),
  364. .leds = ep93xx_led_pins,
  365. };
  366. static struct platform_device ep93xx_leds = {
  367. .name = "leds-gpio",
  368. .id = -1,
  369. .dev = {
  370. .platform_data = &ep93xx_led_data,
  371. },
  372. };
  373. /*************************************************************************
  374. * EP93xx pwm peripheral handling
  375. *************************************************************************/
  376. static struct resource ep93xx_pwm0_resource[] = {
  377. {
  378. .start = EP93XX_PWM_PHYS_BASE,
  379. .end = EP93XX_PWM_PHYS_BASE + 0x10 - 1,
  380. .flags = IORESOURCE_MEM,
  381. },
  382. };
  383. static struct platform_device ep93xx_pwm0_device = {
  384. .name = "ep93xx-pwm",
  385. .id = 0,
  386. .num_resources = ARRAY_SIZE(ep93xx_pwm0_resource),
  387. .resource = ep93xx_pwm0_resource,
  388. };
  389. static struct resource ep93xx_pwm1_resource[] = {
  390. {
  391. .start = EP93XX_PWM_PHYS_BASE + 0x20,
  392. .end = EP93XX_PWM_PHYS_BASE + 0x30 - 1,
  393. .flags = IORESOURCE_MEM,
  394. },
  395. };
  396. static struct platform_device ep93xx_pwm1_device = {
  397. .name = "ep93xx-pwm",
  398. .id = 1,
  399. .num_resources = ARRAY_SIZE(ep93xx_pwm1_resource),
  400. .resource = ep93xx_pwm1_resource,
  401. };
  402. void __init ep93xx_register_pwm(int pwm0, int pwm1)
  403. {
  404. if (pwm0)
  405. platform_device_register(&ep93xx_pwm0_device);
  406. /* NOTE: EP9307 does not have PWMOUT1 (pin EGPIO14) */
  407. if (pwm1)
  408. platform_device_register(&ep93xx_pwm1_device);
  409. }
  410. int ep93xx_pwm_acquire_gpio(struct platform_device *pdev)
  411. {
  412. int err;
  413. if (pdev->id == 0) {
  414. err = 0;
  415. } else if (pdev->id == 1) {
  416. err = gpio_request(EP93XX_GPIO_LINE_EGPIO14,
  417. dev_name(&pdev->dev));
  418. if (err)
  419. return err;
  420. err = gpio_direction_output(EP93XX_GPIO_LINE_EGPIO14, 0);
  421. if (err)
  422. goto fail;
  423. /* PWM 1 output on EGPIO[14] */
  424. ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_PONG);
  425. } else {
  426. err = -ENODEV;
  427. }
  428. return err;
  429. fail:
  430. gpio_free(EP93XX_GPIO_LINE_EGPIO14);
  431. return err;
  432. }
  433. EXPORT_SYMBOL(ep93xx_pwm_acquire_gpio);
  434. void ep93xx_pwm_release_gpio(struct platform_device *pdev)
  435. {
  436. if (pdev->id == 1) {
  437. gpio_direction_input(EP93XX_GPIO_LINE_EGPIO14);
  438. gpio_free(EP93XX_GPIO_LINE_EGPIO14);
  439. /* EGPIO[14] used for GPIO */
  440. ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_PONG);
  441. }
  442. }
  443. EXPORT_SYMBOL(ep93xx_pwm_release_gpio);
  444. /*************************************************************************
  445. * EP93xx video peripheral handling
  446. *************************************************************************/
  447. static struct ep93xxfb_mach_info ep93xxfb_data;
  448. static struct resource ep93xx_fb_resource[] = {
  449. {
  450. .start = EP93XX_RASTER_PHYS_BASE,
  451. .end = EP93XX_RASTER_PHYS_BASE + 0x800 - 1,
  452. .flags = IORESOURCE_MEM,
  453. },
  454. };
  455. static struct platform_device ep93xx_fb_device = {
  456. .name = "ep93xx-fb",
  457. .id = -1,
  458. .dev = {
  459. .platform_data = &ep93xxfb_data,
  460. .coherent_dma_mask = DMA_BIT_MASK(32),
  461. .dma_mask = &ep93xx_fb_device.dev.coherent_dma_mask,
  462. },
  463. .num_resources = ARRAY_SIZE(ep93xx_fb_resource),
  464. .resource = ep93xx_fb_resource,
  465. };
  466. /**
  467. * ep93xx_register_fb - Register the framebuffer platform device.
  468. * @data: platform specific framebuffer configuration (__initdata)
  469. */
  470. void __init ep93xx_register_fb(struct ep93xxfb_mach_info *data)
  471. {
  472. ep93xxfb_data = *data;
  473. platform_device_register(&ep93xx_fb_device);
  474. }
  475. /*************************************************************************
  476. * EP93xx matrix keypad peripheral handling
  477. *************************************************************************/
  478. static struct ep93xx_keypad_platform_data ep93xx_keypad_data;
  479. static struct resource ep93xx_keypad_resource[] = {
  480. {
  481. .start = EP93XX_KEY_MATRIX_PHYS_BASE,
  482. .end = EP93XX_KEY_MATRIX_PHYS_BASE + 0x0c - 1,
  483. .flags = IORESOURCE_MEM,
  484. }, {
  485. .start = IRQ_EP93XX_KEY,
  486. .end = IRQ_EP93XX_KEY,
  487. .flags = IORESOURCE_IRQ,
  488. },
  489. };
  490. static struct platform_device ep93xx_keypad_device = {
  491. .name = "ep93xx-keypad",
  492. .id = -1,
  493. .dev = {
  494. .platform_data = &ep93xx_keypad_data,
  495. },
  496. .num_resources = ARRAY_SIZE(ep93xx_keypad_resource),
  497. .resource = ep93xx_keypad_resource,
  498. };
  499. /**
  500. * ep93xx_register_keypad - Register the keypad platform device.
  501. * @data: platform specific keypad configuration (__initdata)
  502. */
  503. void __init ep93xx_register_keypad(struct ep93xx_keypad_platform_data *data)
  504. {
  505. ep93xx_keypad_data = *data;
  506. platform_device_register(&ep93xx_keypad_device);
  507. }
  508. int ep93xx_keypad_acquire_gpio(struct platform_device *pdev)
  509. {
  510. int err;
  511. int i;
  512. for (i = 0; i < 8; i++) {
  513. err = gpio_request(EP93XX_GPIO_LINE_C(i), dev_name(&pdev->dev));
  514. if (err)
  515. goto fail_gpio_c;
  516. err = gpio_request(EP93XX_GPIO_LINE_D(i), dev_name(&pdev->dev));
  517. if (err)
  518. goto fail_gpio_d;
  519. }
  520. /* Enable the keypad controller; GPIO ports C and D used for keypad */
  521. ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_KEYS |
  522. EP93XX_SYSCON_DEVCFG_GONK);
  523. return 0;
  524. fail_gpio_d:
  525. gpio_free(EP93XX_GPIO_LINE_C(i));
  526. fail_gpio_c:
  527. for ( ; i >= 0; --i) {
  528. gpio_free(EP93XX_GPIO_LINE_C(i));
  529. gpio_free(EP93XX_GPIO_LINE_D(i));
  530. }
  531. return err;
  532. }
  533. EXPORT_SYMBOL(ep93xx_keypad_acquire_gpio);
  534. void ep93xx_keypad_release_gpio(struct platform_device *pdev)
  535. {
  536. int i;
  537. for (i = 0; i < 8; i++) {
  538. gpio_free(EP93XX_GPIO_LINE_C(i));
  539. gpio_free(EP93XX_GPIO_LINE_D(i));
  540. }
  541. /* Disable the keypad controller; GPIO ports C and D used for GPIO */
  542. ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_KEYS |
  543. EP93XX_SYSCON_DEVCFG_GONK);
  544. }
  545. EXPORT_SYMBOL(ep93xx_keypad_release_gpio);
  546. extern void ep93xx_gpio_init(void);
  547. void __init ep93xx_init_devices(void)
  548. {
  549. /* Disallow access to MaverickCrunch initially */
  550. ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_CPENA);
  551. ep93xx_gpio_init();
  552. amba_device_register(&uart1_device, &iomem_resource);
  553. amba_device_register(&uart2_device, &iomem_resource);
  554. amba_device_register(&uart3_device, &iomem_resource);
  555. platform_device_register(&ep93xx_rtc_device);
  556. platform_device_register(&ep93xx_ohci_device);
  557. platform_device_register(&ep93xx_leds);
  558. }