omap_hwmod.c 59 KB

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  1. /*
  2. * omap_hwmod implementation for OMAP2/3/4
  3. *
  4. * Copyright (C) 2009-2010 Nokia Corporation
  5. *
  6. * Paul Walmsley, Benoît Cousson, Kevin Hilman
  7. *
  8. * Created in collaboration with (alphabetical order): Thara Gopinath,
  9. * Tony Lindgren, Rajendra Nayak, Vikram Pandita, Sakari Poussa, Anand
  10. * Sawant, Santosh Shilimkar, Richard Woodruff
  11. *
  12. * This program is free software; you can redistribute it and/or modify
  13. * it under the terms of the GNU General Public License version 2 as
  14. * published by the Free Software Foundation.
  15. *
  16. * Introduction
  17. * ------------
  18. * One way to view an OMAP SoC is as a collection of largely unrelated
  19. * IP blocks connected by interconnects. The IP blocks include
  20. * devices such as ARM processors, audio serial interfaces, UARTs,
  21. * etc. Some of these devices, like the DSP, are created by TI;
  22. * others, like the SGX, largely originate from external vendors. In
  23. * TI's documentation, on-chip devices are referred to as "OMAP
  24. * modules." Some of these IP blocks are identical across several
  25. * OMAP versions. Others are revised frequently.
  26. *
  27. * These OMAP modules are tied together by various interconnects.
  28. * Most of the address and data flow between modules is via OCP-based
  29. * interconnects such as the L3 and L4 buses; but there are other
  30. * interconnects that distribute the hardware clock tree, handle idle
  31. * and reset signaling, supply power, and connect the modules to
  32. * various pads or balls on the OMAP package.
  33. *
  34. * OMAP hwmod provides a consistent way to describe the on-chip
  35. * hardware blocks and their integration into the rest of the chip.
  36. * This description can be automatically generated from the TI
  37. * hardware database. OMAP hwmod provides a standard, consistent API
  38. * to reset, enable, idle, and disable these hardware blocks. And
  39. * hwmod provides a way for other core code, such as the Linux device
  40. * code or the OMAP power management and address space mapping code,
  41. * to query the hardware database.
  42. *
  43. * Using hwmod
  44. * -----------
  45. * Drivers won't call hwmod functions directly. That is done by the
  46. * omap_device code, and in rare occasions, by custom integration code
  47. * in arch/arm/ *omap*. The omap_device code includes functions to
  48. * build a struct platform_device using omap_hwmod data, and that is
  49. * currently how hwmod data is communicated to drivers and to the
  50. * Linux driver model. Most drivers will call omap_hwmod functions only
  51. * indirectly, via pm_runtime*() functions.
  52. *
  53. * From a layering perspective, here is where the OMAP hwmod code
  54. * fits into the kernel software stack:
  55. *
  56. * +-------------------------------+
  57. * | Device driver code |
  58. * | (e.g., drivers/) |
  59. * +-------------------------------+
  60. * | Linux driver model |
  61. * | (platform_device / |
  62. * | platform_driver data/code) |
  63. * +-------------------------------+
  64. * | OMAP core-driver integration |
  65. * |(arch/arm/mach-omap2/devices.c)|
  66. * +-------------------------------+
  67. * | omap_device code |
  68. * | (../plat-omap/omap_device.c) |
  69. * +-------------------------------+
  70. * ----> | omap_hwmod code/data | <-----
  71. * | (../mach-omap2/omap_hwmod*) |
  72. * +-------------------------------+
  73. * | OMAP clock/PRCM/register fns |
  74. * | (__raw_{read,write}l, clk*) |
  75. * +-------------------------------+
  76. *
  77. * Device drivers should not contain any OMAP-specific code or data in
  78. * them. They should only contain code to operate the IP block that
  79. * the driver is responsible for. This is because these IP blocks can
  80. * also appear in other SoCs, either from TI (such as DaVinci) or from
  81. * other manufacturers; and drivers should be reusable across other
  82. * platforms.
  83. *
  84. * The OMAP hwmod code also will attempt to reset and idle all on-chip
  85. * devices upon boot. The goal here is for the kernel to be
  86. * completely self-reliant and independent from bootloaders. This is
  87. * to ensure a repeatable configuration, both to ensure consistent
  88. * runtime behavior, and to make it easier for others to reproduce
  89. * bugs.
  90. *
  91. * OMAP module activity states
  92. * ---------------------------
  93. * The hwmod code considers modules to be in one of several activity
  94. * states. IP blocks start out in an UNKNOWN state, then once they
  95. * are registered via the hwmod code, proceed to the REGISTERED state.
  96. * Once their clock names are resolved to clock pointers, the module
  97. * enters the CLKS_INITED state; and finally, once the module has been
  98. * reset and the integration registers programmed, the INITIALIZED state
  99. * is entered. The hwmod code will then place the module into either
  100. * the IDLE state to save power, or in the case of a critical system
  101. * module, the ENABLED state.
  102. *
  103. * OMAP core integration code can then call omap_hwmod*() functions
  104. * directly to move the module between the IDLE, ENABLED, and DISABLED
  105. * states, as needed. This is done during both the PM idle loop, and
  106. * in the OMAP core integration code's implementation of the PM runtime
  107. * functions.
  108. *
  109. * References
  110. * ----------
  111. * This is a partial list.
  112. * - OMAP2420 Multimedia Processor Silicon Revision 2.1.1, 2.2 (SWPU064)
  113. * - OMAP2430 Multimedia Device POP Silicon Revision 2.1 (SWPU090)
  114. * - OMAP34xx Multimedia Device Silicon Revision 3.1 (SWPU108)
  115. * - OMAP4430 Multimedia Device Silicon Revision 1.0 (SWPU140)
  116. * - Open Core Protocol Specification 2.2
  117. *
  118. * To do:
  119. * - pin mux handling
  120. * - handle IO mapping
  121. * - bus throughput & module latency measurement code
  122. *
  123. * XXX add tests at the beginning of each function to ensure the hwmod is
  124. * in the appropriate state
  125. * XXX error return values should be checked to ensure that they are
  126. * appropriate
  127. */
  128. #undef DEBUG
  129. #include <linux/kernel.h>
  130. #include <linux/errno.h>
  131. #include <linux/io.h>
  132. #include <linux/clk.h>
  133. #include <linux/delay.h>
  134. #include <linux/err.h>
  135. #include <linux/list.h>
  136. #include <linux/mutex.h>
  137. #include <linux/spinlock.h>
  138. #include <plat/common.h>
  139. #include <plat/cpu.h>
  140. #include "clockdomain.h"
  141. #include "powerdomain.h"
  142. #include <plat/clock.h>
  143. #include <plat/omap_hwmod.h>
  144. #include <plat/prcm.h>
  145. #include "cm2xxx_3xxx.h"
  146. #include "cm44xx.h"
  147. #include "prm2xxx_3xxx.h"
  148. #include "prm44xx.h"
  149. /* Maximum microseconds to wait for OMAP module to softreset */
  150. #define MAX_MODULE_SOFTRESET_WAIT 10000
  151. /* Name of the OMAP hwmod for the MPU */
  152. #define MPU_INITIATOR_NAME "mpu"
  153. /* omap_hwmod_list contains all registered struct omap_hwmods */
  154. static LIST_HEAD(omap_hwmod_list);
  155. /* mpu_oh: used to add/remove MPU initiator from sleepdep list */
  156. static struct omap_hwmod *mpu_oh;
  157. /* inited: 0 if omap_hwmod_init() has not yet been called; 1 otherwise */
  158. static u8 inited;
  159. /* Private functions */
  160. /**
  161. * _update_sysc_cache - return the module OCP_SYSCONFIG register, keep copy
  162. * @oh: struct omap_hwmod *
  163. *
  164. * Load the current value of the hwmod OCP_SYSCONFIG register into the
  165. * struct omap_hwmod for later use. Returns -EINVAL if the hwmod has no
  166. * OCP_SYSCONFIG register or 0 upon success.
  167. */
  168. static int _update_sysc_cache(struct omap_hwmod *oh)
  169. {
  170. if (!oh->class->sysc) {
  171. WARN(1, "omap_hwmod: %s: cannot read OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
  172. return -EINVAL;
  173. }
  174. /* XXX ensure module interface clock is up */
  175. oh->_sysc_cache = omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
  176. if (!(oh->class->sysc->sysc_flags & SYSC_NO_CACHE))
  177. oh->_int_flags |= _HWMOD_SYSCONFIG_LOADED;
  178. return 0;
  179. }
  180. /**
  181. * _write_sysconfig - write a value to the module's OCP_SYSCONFIG register
  182. * @v: OCP_SYSCONFIG value to write
  183. * @oh: struct omap_hwmod *
  184. *
  185. * Write @v into the module class' OCP_SYSCONFIG register, if it has
  186. * one. No return value.
  187. */
  188. static void _write_sysconfig(u32 v, struct omap_hwmod *oh)
  189. {
  190. if (!oh->class->sysc) {
  191. WARN(1, "omap_hwmod: %s: cannot write OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
  192. return;
  193. }
  194. /* XXX ensure module interface clock is up */
  195. /* Module might have lost context, always update cache and register */
  196. oh->_sysc_cache = v;
  197. omap_hwmod_write(v, oh, oh->class->sysc->sysc_offs);
  198. }
  199. /**
  200. * _set_master_standbymode: set the OCP_SYSCONFIG MIDLEMODE field in @v
  201. * @oh: struct omap_hwmod *
  202. * @standbymode: MIDLEMODE field bits
  203. * @v: pointer to register contents to modify
  204. *
  205. * Update the master standby mode bits in @v to be @standbymode for
  206. * the @oh hwmod. Does not write to the hardware. Returns -EINVAL
  207. * upon error or 0 upon success.
  208. */
  209. static int _set_master_standbymode(struct omap_hwmod *oh, u8 standbymode,
  210. u32 *v)
  211. {
  212. u32 mstandby_mask;
  213. u8 mstandby_shift;
  214. if (!oh->class->sysc ||
  215. !(oh->class->sysc->sysc_flags & SYSC_HAS_MIDLEMODE))
  216. return -EINVAL;
  217. if (!oh->class->sysc->sysc_fields) {
  218. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  219. return -EINVAL;
  220. }
  221. mstandby_shift = oh->class->sysc->sysc_fields->midle_shift;
  222. mstandby_mask = (0x3 << mstandby_shift);
  223. *v &= ~mstandby_mask;
  224. *v |= __ffs(standbymode) << mstandby_shift;
  225. return 0;
  226. }
  227. /**
  228. * _set_slave_idlemode: set the OCP_SYSCONFIG SIDLEMODE field in @v
  229. * @oh: struct omap_hwmod *
  230. * @idlemode: SIDLEMODE field bits
  231. * @v: pointer to register contents to modify
  232. *
  233. * Update the slave idle mode bits in @v to be @idlemode for the @oh
  234. * hwmod. Does not write to the hardware. Returns -EINVAL upon error
  235. * or 0 upon success.
  236. */
  237. static int _set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode, u32 *v)
  238. {
  239. u32 sidle_mask;
  240. u8 sidle_shift;
  241. if (!oh->class->sysc ||
  242. !(oh->class->sysc->sysc_flags & SYSC_HAS_SIDLEMODE))
  243. return -EINVAL;
  244. if (!oh->class->sysc->sysc_fields) {
  245. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  246. return -EINVAL;
  247. }
  248. sidle_shift = oh->class->sysc->sysc_fields->sidle_shift;
  249. sidle_mask = (0x3 << sidle_shift);
  250. *v &= ~sidle_mask;
  251. *v |= __ffs(idlemode) << sidle_shift;
  252. return 0;
  253. }
  254. /**
  255. * _set_clockactivity: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
  256. * @oh: struct omap_hwmod *
  257. * @clockact: CLOCKACTIVITY field bits
  258. * @v: pointer to register contents to modify
  259. *
  260. * Update the clockactivity mode bits in @v to be @clockact for the
  261. * @oh hwmod. Used for additional powersaving on some modules. Does
  262. * not write to the hardware. Returns -EINVAL upon error or 0 upon
  263. * success.
  264. */
  265. static int _set_clockactivity(struct omap_hwmod *oh, u8 clockact, u32 *v)
  266. {
  267. u32 clkact_mask;
  268. u8 clkact_shift;
  269. if (!oh->class->sysc ||
  270. !(oh->class->sysc->sysc_flags & SYSC_HAS_CLOCKACTIVITY))
  271. return -EINVAL;
  272. if (!oh->class->sysc->sysc_fields) {
  273. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  274. return -EINVAL;
  275. }
  276. clkact_shift = oh->class->sysc->sysc_fields->clkact_shift;
  277. clkact_mask = (0x3 << clkact_shift);
  278. *v &= ~clkact_mask;
  279. *v |= clockact << clkact_shift;
  280. return 0;
  281. }
  282. /**
  283. * _set_softreset: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
  284. * @oh: struct omap_hwmod *
  285. * @v: pointer to register contents to modify
  286. *
  287. * Set the SOFTRESET bit in @v for hwmod @oh. Returns -EINVAL upon
  288. * error or 0 upon success.
  289. */
  290. static int _set_softreset(struct omap_hwmod *oh, u32 *v)
  291. {
  292. u32 softrst_mask;
  293. if (!oh->class->sysc ||
  294. !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
  295. return -EINVAL;
  296. if (!oh->class->sysc->sysc_fields) {
  297. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  298. return -EINVAL;
  299. }
  300. softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
  301. *v |= softrst_mask;
  302. return 0;
  303. }
  304. /**
  305. * _set_module_autoidle: set the OCP_SYSCONFIG AUTOIDLE field in @v
  306. * @oh: struct omap_hwmod *
  307. * @autoidle: desired AUTOIDLE bitfield value (0 or 1)
  308. * @v: pointer to register contents to modify
  309. *
  310. * Update the module autoidle bit in @v to be @autoidle for the @oh
  311. * hwmod. The autoidle bit controls whether the module can gate
  312. * internal clocks automatically when it isn't doing anything; the
  313. * exact function of this bit varies on a per-module basis. This
  314. * function does not write to the hardware. Returns -EINVAL upon
  315. * error or 0 upon success.
  316. */
  317. static int _set_module_autoidle(struct omap_hwmod *oh, u8 autoidle,
  318. u32 *v)
  319. {
  320. u32 autoidle_mask;
  321. u8 autoidle_shift;
  322. if (!oh->class->sysc ||
  323. !(oh->class->sysc->sysc_flags & SYSC_HAS_AUTOIDLE))
  324. return -EINVAL;
  325. if (!oh->class->sysc->sysc_fields) {
  326. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  327. return -EINVAL;
  328. }
  329. autoidle_shift = oh->class->sysc->sysc_fields->autoidle_shift;
  330. autoidle_mask = (0x3 << autoidle_shift);
  331. *v &= ~autoidle_mask;
  332. *v |= autoidle << autoidle_shift;
  333. return 0;
  334. }
  335. /**
  336. * _enable_wakeup: set OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
  337. * @oh: struct omap_hwmod *
  338. *
  339. * Allow the hardware module @oh to send wakeups. Returns -EINVAL
  340. * upon error or 0 upon success.
  341. */
  342. static int _enable_wakeup(struct omap_hwmod *oh, u32 *v)
  343. {
  344. u32 wakeup_mask;
  345. if (!oh->class->sysc ||
  346. !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
  347. (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)))
  348. return -EINVAL;
  349. if (!oh->class->sysc->sysc_fields) {
  350. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  351. return -EINVAL;
  352. }
  353. wakeup_mask = (0x1 << oh->class->sysc->sysc_fields->enwkup_shift);
  354. *v |= wakeup_mask;
  355. if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
  356. _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
  357. /* XXX test pwrdm_get_wken for this hwmod's subsystem */
  358. oh->_int_flags |= _HWMOD_WAKEUP_ENABLED;
  359. return 0;
  360. }
  361. /**
  362. * _disable_wakeup: clear OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
  363. * @oh: struct omap_hwmod *
  364. *
  365. * Prevent the hardware module @oh to send wakeups. Returns -EINVAL
  366. * upon error or 0 upon success.
  367. */
  368. static int _disable_wakeup(struct omap_hwmod *oh, u32 *v)
  369. {
  370. u32 wakeup_mask;
  371. if (!oh->class->sysc ||
  372. !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
  373. (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)))
  374. return -EINVAL;
  375. if (!oh->class->sysc->sysc_fields) {
  376. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  377. return -EINVAL;
  378. }
  379. wakeup_mask = (0x1 << oh->class->sysc->sysc_fields->enwkup_shift);
  380. *v &= ~wakeup_mask;
  381. if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
  382. _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART, v);
  383. /* XXX test pwrdm_get_wken for this hwmod's subsystem */
  384. oh->_int_flags &= ~_HWMOD_WAKEUP_ENABLED;
  385. return 0;
  386. }
  387. /**
  388. * _add_initiator_dep: prevent @oh from smart-idling while @init_oh is active
  389. * @oh: struct omap_hwmod *
  390. *
  391. * Prevent the hardware module @oh from entering idle while the
  392. * hardare module initiator @init_oh is active. Useful when a module
  393. * will be accessed by a particular initiator (e.g., if a module will
  394. * be accessed by the IVA, there should be a sleepdep between the IVA
  395. * initiator and the module). Only applies to modules in smart-idle
  396. * mode. Returns -EINVAL upon error or passes along
  397. * clkdm_add_sleepdep() value upon success.
  398. */
  399. static int _add_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
  400. {
  401. if (!oh->_clk)
  402. return -EINVAL;
  403. return clkdm_add_sleepdep(oh->_clk->clkdm, init_oh->_clk->clkdm);
  404. }
  405. /**
  406. * _del_initiator_dep: allow @oh to smart-idle even if @init_oh is active
  407. * @oh: struct omap_hwmod *
  408. *
  409. * Allow the hardware module @oh to enter idle while the hardare
  410. * module initiator @init_oh is active. Useful when a module will not
  411. * be accessed by a particular initiator (e.g., if a module will not
  412. * be accessed by the IVA, there should be no sleepdep between the IVA
  413. * initiator and the module). Only applies to modules in smart-idle
  414. * mode. Returns -EINVAL upon error or passes along
  415. * clkdm_del_sleepdep() value upon success.
  416. */
  417. static int _del_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
  418. {
  419. if (!oh->_clk)
  420. return -EINVAL;
  421. return clkdm_del_sleepdep(oh->_clk->clkdm, init_oh->_clk->clkdm);
  422. }
  423. /**
  424. * _init_main_clk - get a struct clk * for the the hwmod's main functional clk
  425. * @oh: struct omap_hwmod *
  426. *
  427. * Called from _init_clocks(). Populates the @oh _clk (main
  428. * functional clock pointer) if a main_clk is present. Returns 0 on
  429. * success or -EINVAL on error.
  430. */
  431. static int _init_main_clk(struct omap_hwmod *oh)
  432. {
  433. int ret = 0;
  434. if (!oh->main_clk)
  435. return 0;
  436. oh->_clk = omap_clk_get_by_name(oh->main_clk);
  437. if (!oh->_clk) {
  438. pr_warning("omap_hwmod: %s: cannot clk_get main_clk %s\n",
  439. oh->name, oh->main_clk);
  440. return -EINVAL;
  441. }
  442. if (!oh->_clk->clkdm)
  443. pr_warning("omap_hwmod: %s: missing clockdomain for %s.\n",
  444. oh->main_clk, oh->_clk->name);
  445. return ret;
  446. }
  447. /**
  448. * _init_interface_clks - get a struct clk * for the the hwmod's interface clks
  449. * @oh: struct omap_hwmod *
  450. *
  451. * Called from _init_clocks(). Populates the @oh OCP slave interface
  452. * clock pointers. Returns 0 on success or -EINVAL on error.
  453. */
  454. static int _init_interface_clks(struct omap_hwmod *oh)
  455. {
  456. struct clk *c;
  457. int i;
  458. int ret = 0;
  459. if (oh->slaves_cnt == 0)
  460. return 0;
  461. for (i = 0; i < oh->slaves_cnt; i++) {
  462. struct omap_hwmod_ocp_if *os = oh->slaves[i];
  463. if (!os->clk)
  464. continue;
  465. c = omap_clk_get_by_name(os->clk);
  466. if (!c) {
  467. pr_warning("omap_hwmod: %s: cannot clk_get interface_clk %s\n",
  468. oh->name, os->clk);
  469. ret = -EINVAL;
  470. }
  471. os->_clk = c;
  472. }
  473. return ret;
  474. }
  475. /**
  476. * _init_opt_clk - get a struct clk * for the the hwmod's optional clocks
  477. * @oh: struct omap_hwmod *
  478. *
  479. * Called from _init_clocks(). Populates the @oh omap_hwmod_opt_clk
  480. * clock pointers. Returns 0 on success or -EINVAL on error.
  481. */
  482. static int _init_opt_clks(struct omap_hwmod *oh)
  483. {
  484. struct omap_hwmod_opt_clk *oc;
  485. struct clk *c;
  486. int i;
  487. int ret = 0;
  488. for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++) {
  489. c = omap_clk_get_by_name(oc->clk);
  490. if (!c) {
  491. pr_warning("omap_hwmod: %s: cannot clk_get opt_clk %s\n",
  492. oh->name, oc->clk);
  493. ret = -EINVAL;
  494. }
  495. oc->_clk = c;
  496. }
  497. return ret;
  498. }
  499. /**
  500. * _enable_clocks - enable hwmod main clock and interface clocks
  501. * @oh: struct omap_hwmod *
  502. *
  503. * Enables all clocks necessary for register reads and writes to succeed
  504. * on the hwmod @oh. Returns 0.
  505. */
  506. static int _enable_clocks(struct omap_hwmod *oh)
  507. {
  508. int i;
  509. pr_debug("omap_hwmod: %s: enabling clocks\n", oh->name);
  510. if (oh->_clk)
  511. clk_enable(oh->_clk);
  512. if (oh->slaves_cnt > 0) {
  513. for (i = 0; i < oh->slaves_cnt; i++) {
  514. struct omap_hwmod_ocp_if *os = oh->slaves[i];
  515. struct clk *c = os->_clk;
  516. if (c && (os->flags & OCPIF_SWSUP_IDLE))
  517. clk_enable(c);
  518. }
  519. }
  520. /* The opt clocks are controlled by the device driver. */
  521. return 0;
  522. }
  523. /**
  524. * _disable_clocks - disable hwmod main clock and interface clocks
  525. * @oh: struct omap_hwmod *
  526. *
  527. * Disables the hwmod @oh main functional and interface clocks. Returns 0.
  528. */
  529. static int _disable_clocks(struct omap_hwmod *oh)
  530. {
  531. int i;
  532. pr_debug("omap_hwmod: %s: disabling clocks\n", oh->name);
  533. if (oh->_clk)
  534. clk_disable(oh->_clk);
  535. if (oh->slaves_cnt > 0) {
  536. for (i = 0; i < oh->slaves_cnt; i++) {
  537. struct omap_hwmod_ocp_if *os = oh->slaves[i];
  538. struct clk *c = os->_clk;
  539. if (c && (os->flags & OCPIF_SWSUP_IDLE))
  540. clk_disable(c);
  541. }
  542. }
  543. /* The opt clocks are controlled by the device driver. */
  544. return 0;
  545. }
  546. static void _enable_optional_clocks(struct omap_hwmod *oh)
  547. {
  548. struct omap_hwmod_opt_clk *oc;
  549. int i;
  550. pr_debug("omap_hwmod: %s: enabling optional clocks\n", oh->name);
  551. for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
  552. if (oc->_clk) {
  553. pr_debug("omap_hwmod: enable %s:%s\n", oc->role,
  554. oc->_clk->name);
  555. clk_enable(oc->_clk);
  556. }
  557. }
  558. static void _disable_optional_clocks(struct omap_hwmod *oh)
  559. {
  560. struct omap_hwmod_opt_clk *oc;
  561. int i;
  562. pr_debug("omap_hwmod: %s: disabling optional clocks\n", oh->name);
  563. for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
  564. if (oc->_clk) {
  565. pr_debug("omap_hwmod: disable %s:%s\n", oc->role,
  566. oc->_clk->name);
  567. clk_disable(oc->_clk);
  568. }
  569. }
  570. /**
  571. * _find_mpu_port_index - find hwmod OCP slave port ID intended for MPU use
  572. * @oh: struct omap_hwmod *
  573. *
  574. * Returns the array index of the OCP slave port that the MPU
  575. * addresses the device on, or -EINVAL upon error or not found.
  576. */
  577. static int __init _find_mpu_port_index(struct omap_hwmod *oh)
  578. {
  579. int i;
  580. int found = 0;
  581. if (!oh || oh->slaves_cnt == 0)
  582. return -EINVAL;
  583. for (i = 0; i < oh->slaves_cnt; i++) {
  584. struct omap_hwmod_ocp_if *os = oh->slaves[i];
  585. if (os->user & OCP_USER_MPU) {
  586. found = 1;
  587. break;
  588. }
  589. }
  590. if (found)
  591. pr_debug("omap_hwmod: %s: MPU OCP slave port ID %d\n",
  592. oh->name, i);
  593. else
  594. pr_debug("omap_hwmod: %s: no MPU OCP slave port found\n",
  595. oh->name);
  596. return (found) ? i : -EINVAL;
  597. }
  598. /**
  599. * _find_mpu_rt_base - find hwmod register target base addr accessible by MPU
  600. * @oh: struct omap_hwmod *
  601. *
  602. * Return the virtual address of the base of the register target of
  603. * device @oh, or NULL on error.
  604. */
  605. static void __iomem * __init _find_mpu_rt_base(struct omap_hwmod *oh, u8 index)
  606. {
  607. struct omap_hwmod_ocp_if *os;
  608. struct omap_hwmod_addr_space *mem;
  609. int i;
  610. int found = 0;
  611. void __iomem *va_start;
  612. if (!oh || oh->slaves_cnt == 0)
  613. return NULL;
  614. os = oh->slaves[index];
  615. for (i = 0, mem = os->addr; i < os->addr_cnt; i++, mem++) {
  616. if (mem->flags & ADDR_TYPE_RT) {
  617. found = 1;
  618. break;
  619. }
  620. }
  621. if (found) {
  622. va_start = ioremap(mem->pa_start, mem->pa_end - mem->pa_start);
  623. if (!va_start) {
  624. pr_err("omap_hwmod: %s: Could not ioremap\n", oh->name);
  625. return NULL;
  626. }
  627. pr_debug("omap_hwmod: %s: MPU register target at va %p\n",
  628. oh->name, va_start);
  629. } else {
  630. pr_debug("omap_hwmod: %s: no MPU register target found\n",
  631. oh->name);
  632. }
  633. return (found) ? va_start : NULL;
  634. }
  635. /**
  636. * _enable_sysc - try to bring a module out of idle via OCP_SYSCONFIG
  637. * @oh: struct omap_hwmod *
  638. *
  639. * If module is marked as SWSUP_SIDLE, force the module out of slave
  640. * idle; otherwise, configure it for smart-idle. If module is marked
  641. * as SWSUP_MSUSPEND, force the module out of master standby;
  642. * otherwise, configure it for smart-standby. No return value.
  643. */
  644. static void _enable_sysc(struct omap_hwmod *oh)
  645. {
  646. u8 idlemode, sf;
  647. u32 v;
  648. if (!oh->class->sysc)
  649. return;
  650. v = oh->_sysc_cache;
  651. sf = oh->class->sysc->sysc_flags;
  652. if (sf & SYSC_HAS_SIDLEMODE) {
  653. idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ?
  654. HWMOD_IDLEMODE_NO : HWMOD_IDLEMODE_SMART;
  655. _set_slave_idlemode(oh, idlemode, &v);
  656. }
  657. if (sf & SYSC_HAS_MIDLEMODE) {
  658. idlemode = (oh->flags & HWMOD_SWSUP_MSTANDBY) ?
  659. HWMOD_IDLEMODE_NO : HWMOD_IDLEMODE_SMART;
  660. _set_master_standbymode(oh, idlemode, &v);
  661. }
  662. /*
  663. * XXX The clock framework should handle this, by
  664. * calling into this code. But this must wait until the
  665. * clock structures are tagged with omap_hwmod entries
  666. */
  667. if ((oh->flags & HWMOD_SET_DEFAULT_CLOCKACT) &&
  668. (sf & SYSC_HAS_CLOCKACTIVITY))
  669. _set_clockactivity(oh, oh->class->sysc->clockact, &v);
  670. /* If slave is in SMARTIDLE, also enable wakeup */
  671. if ((sf & SYSC_HAS_SIDLEMODE) && !(oh->flags & HWMOD_SWSUP_SIDLE))
  672. _enable_wakeup(oh, &v);
  673. _write_sysconfig(v, oh);
  674. /*
  675. * Set the autoidle bit only after setting the smartidle bit
  676. * Setting this will not have any impact on the other modules.
  677. */
  678. if (sf & SYSC_HAS_AUTOIDLE) {
  679. idlemode = (oh->flags & HWMOD_NO_OCP_AUTOIDLE) ?
  680. 0 : 1;
  681. _set_module_autoidle(oh, idlemode, &v);
  682. _write_sysconfig(v, oh);
  683. }
  684. }
  685. /**
  686. * _idle_sysc - try to put a module into idle via OCP_SYSCONFIG
  687. * @oh: struct omap_hwmod *
  688. *
  689. * If module is marked as SWSUP_SIDLE, force the module into slave
  690. * idle; otherwise, configure it for smart-idle. If module is marked
  691. * as SWSUP_MSUSPEND, force the module into master standby; otherwise,
  692. * configure it for smart-standby. No return value.
  693. */
  694. static void _idle_sysc(struct omap_hwmod *oh)
  695. {
  696. u8 idlemode, sf;
  697. u32 v;
  698. if (!oh->class->sysc)
  699. return;
  700. v = oh->_sysc_cache;
  701. sf = oh->class->sysc->sysc_flags;
  702. if (sf & SYSC_HAS_SIDLEMODE) {
  703. idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ?
  704. HWMOD_IDLEMODE_FORCE : HWMOD_IDLEMODE_SMART;
  705. _set_slave_idlemode(oh, idlemode, &v);
  706. }
  707. if (sf & SYSC_HAS_MIDLEMODE) {
  708. idlemode = (oh->flags & HWMOD_SWSUP_MSTANDBY) ?
  709. HWMOD_IDLEMODE_FORCE : HWMOD_IDLEMODE_SMART;
  710. _set_master_standbymode(oh, idlemode, &v);
  711. }
  712. /* If slave is in SMARTIDLE, also enable wakeup */
  713. if ((sf & SYSC_HAS_SIDLEMODE) && !(oh->flags & HWMOD_SWSUP_SIDLE))
  714. _enable_wakeup(oh, &v);
  715. _write_sysconfig(v, oh);
  716. }
  717. /**
  718. * _shutdown_sysc - force a module into idle via OCP_SYSCONFIG
  719. * @oh: struct omap_hwmod *
  720. *
  721. * Force the module into slave idle and master suspend. No return
  722. * value.
  723. */
  724. static void _shutdown_sysc(struct omap_hwmod *oh)
  725. {
  726. u32 v;
  727. u8 sf;
  728. if (!oh->class->sysc)
  729. return;
  730. v = oh->_sysc_cache;
  731. sf = oh->class->sysc->sysc_flags;
  732. if (sf & SYSC_HAS_SIDLEMODE)
  733. _set_slave_idlemode(oh, HWMOD_IDLEMODE_FORCE, &v);
  734. if (sf & SYSC_HAS_MIDLEMODE)
  735. _set_master_standbymode(oh, HWMOD_IDLEMODE_FORCE, &v);
  736. if (sf & SYSC_HAS_AUTOIDLE)
  737. _set_module_autoidle(oh, 1, &v);
  738. _write_sysconfig(v, oh);
  739. }
  740. /**
  741. * _lookup - find an omap_hwmod by name
  742. * @name: find an omap_hwmod by name
  743. *
  744. * Return a pointer to an omap_hwmod by name, or NULL if not found.
  745. */
  746. static struct omap_hwmod *_lookup(const char *name)
  747. {
  748. struct omap_hwmod *oh, *temp_oh;
  749. oh = NULL;
  750. list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
  751. if (!strcmp(name, temp_oh->name)) {
  752. oh = temp_oh;
  753. break;
  754. }
  755. }
  756. return oh;
  757. }
  758. /**
  759. * _init_clocks - clk_get() all clocks associated with this hwmod
  760. * @oh: struct omap_hwmod *
  761. * @data: not used; pass NULL
  762. *
  763. * Called by omap_hwmod_late_init() (after omap2_clk_init()).
  764. * Resolves all clock names embedded in the hwmod. Returns -EINVAL if
  765. * the omap_hwmod has not yet been registered or if the clocks have
  766. * already been initialized, 0 on success, or a non-zero error on
  767. * failure.
  768. */
  769. static int _init_clocks(struct omap_hwmod *oh, void *data)
  770. {
  771. int ret = 0;
  772. if (!oh || (oh->_state != _HWMOD_STATE_REGISTERED))
  773. return -EINVAL;
  774. pr_debug("omap_hwmod: %s: looking up clocks\n", oh->name);
  775. ret |= _init_main_clk(oh);
  776. ret |= _init_interface_clks(oh);
  777. ret |= _init_opt_clks(oh);
  778. if (!ret)
  779. oh->_state = _HWMOD_STATE_CLKS_INITED;
  780. return 0;
  781. }
  782. /**
  783. * _wait_target_ready - wait for a module to leave slave idle
  784. * @oh: struct omap_hwmod *
  785. *
  786. * Wait for a module @oh to leave slave idle. Returns 0 if the module
  787. * does not have an IDLEST bit or if the module successfully leaves
  788. * slave idle; otherwise, pass along the return value of the
  789. * appropriate *_cm_wait_module_ready() function.
  790. */
  791. static int _wait_target_ready(struct omap_hwmod *oh)
  792. {
  793. struct omap_hwmod_ocp_if *os;
  794. int ret;
  795. if (!oh)
  796. return -EINVAL;
  797. if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
  798. return 0;
  799. os = oh->slaves[oh->_mpu_port_index];
  800. if (oh->flags & HWMOD_NO_IDLEST)
  801. return 0;
  802. /* XXX check module SIDLEMODE */
  803. /* XXX check clock enable states */
  804. if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
  805. ret = omap2_cm_wait_module_ready(oh->prcm.omap2.module_offs,
  806. oh->prcm.omap2.idlest_reg_id,
  807. oh->prcm.omap2.idlest_idle_bit);
  808. } else if (cpu_is_omap44xx()) {
  809. ret = omap4_cm_wait_module_ready(oh->prcm.omap4.clkctrl_reg);
  810. } else {
  811. BUG();
  812. };
  813. return ret;
  814. }
  815. /**
  816. * _lookup_hardreset - return the register bit shift for this hwmod/reset line
  817. * @oh: struct omap_hwmod *
  818. * @name: name of the reset line in the context of this hwmod
  819. *
  820. * Return the bit position of the reset line that match the
  821. * input name. Return -ENOENT if not found.
  822. */
  823. static u8 _lookup_hardreset(struct omap_hwmod *oh, const char *name)
  824. {
  825. int i;
  826. for (i = 0; i < oh->rst_lines_cnt; i++) {
  827. const char *rst_line = oh->rst_lines[i].name;
  828. if (!strcmp(rst_line, name)) {
  829. u8 shift = oh->rst_lines[i].rst_shift;
  830. pr_debug("omap_hwmod: %s: _lookup_hardreset: %s: %d\n",
  831. oh->name, rst_line, shift);
  832. return shift;
  833. }
  834. }
  835. return -ENOENT;
  836. }
  837. /**
  838. * _assert_hardreset - assert the HW reset line of submodules
  839. * contained in the hwmod module.
  840. * @oh: struct omap_hwmod *
  841. * @name: name of the reset line to lookup and assert
  842. *
  843. * Some IP like dsp, ipu or iva contain processor that require
  844. * an HW reset line to be assert / deassert in order to enable fully
  845. * the IP.
  846. */
  847. static int _assert_hardreset(struct omap_hwmod *oh, const char *name)
  848. {
  849. u8 shift;
  850. if (!oh)
  851. return -EINVAL;
  852. shift = _lookup_hardreset(oh, name);
  853. if (IS_ERR_VALUE(shift))
  854. return shift;
  855. if (cpu_is_omap24xx() || cpu_is_omap34xx())
  856. return omap2_prm_assert_hardreset(oh->prcm.omap2.module_offs,
  857. shift);
  858. else if (cpu_is_omap44xx())
  859. return omap4_prm_assert_hardreset(oh->prcm.omap4.rstctrl_reg,
  860. shift);
  861. else
  862. return -EINVAL;
  863. }
  864. /**
  865. * _deassert_hardreset - deassert the HW reset line of submodules contained
  866. * in the hwmod module.
  867. * @oh: struct omap_hwmod *
  868. * @name: name of the reset line to look up and deassert
  869. *
  870. * Some IP like dsp, ipu or iva contain processor that require
  871. * an HW reset line to be assert / deassert in order to enable fully
  872. * the IP.
  873. */
  874. static int _deassert_hardreset(struct omap_hwmod *oh, const char *name)
  875. {
  876. u8 shift;
  877. int r;
  878. if (!oh)
  879. return -EINVAL;
  880. shift = _lookup_hardreset(oh, name);
  881. if (IS_ERR_VALUE(shift))
  882. return shift;
  883. if (cpu_is_omap24xx() || cpu_is_omap34xx())
  884. r = omap2_prm_deassert_hardreset(oh->prcm.omap2.module_offs,
  885. shift);
  886. else if (cpu_is_omap44xx())
  887. r = omap4_prm_deassert_hardreset(oh->prcm.omap4.rstctrl_reg,
  888. shift);
  889. else
  890. return -EINVAL;
  891. if (r == -EBUSY)
  892. pr_warning("omap_hwmod: %s: failed to hardreset\n", oh->name);
  893. return r;
  894. }
  895. /**
  896. * _read_hardreset - read the HW reset line state of submodules
  897. * contained in the hwmod module
  898. * @oh: struct omap_hwmod *
  899. * @name: name of the reset line to look up and read
  900. *
  901. * Return the state of the reset line.
  902. */
  903. static int _read_hardreset(struct omap_hwmod *oh, const char *name)
  904. {
  905. u8 shift;
  906. if (!oh)
  907. return -EINVAL;
  908. shift = _lookup_hardreset(oh, name);
  909. if (IS_ERR_VALUE(shift))
  910. return shift;
  911. if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
  912. return omap2_prm_is_hardreset_asserted(oh->prcm.omap2.module_offs,
  913. shift);
  914. } else if (cpu_is_omap44xx()) {
  915. return omap4_prm_is_hardreset_asserted(oh->prcm.omap4.rstctrl_reg,
  916. shift);
  917. } else {
  918. return -EINVAL;
  919. }
  920. }
  921. /**
  922. * _ocp_softreset - reset an omap_hwmod via the OCP_SYSCONFIG bit
  923. * @oh: struct omap_hwmod *
  924. *
  925. * Resets an omap_hwmod @oh via the OCP_SYSCONFIG bit. hwmod must be
  926. * enabled for this to work. Returns -EINVAL if the hwmod cannot be
  927. * reset this way or if the hwmod is in the wrong state, -ETIMEDOUT if
  928. * the module did not reset in time, or 0 upon success.
  929. *
  930. * In OMAP3 a specific SYSSTATUS register is used to get the reset status.
  931. * Starting in OMAP4, some IPs do not have SYSSTATUS registers and instead
  932. * use the SYSCONFIG softreset bit to provide the status.
  933. *
  934. * Note that some IP like McBSP do have reset control but don't have
  935. * reset status.
  936. */
  937. static int _ocp_softreset(struct omap_hwmod *oh)
  938. {
  939. u32 v;
  940. int c = 0;
  941. int ret = 0;
  942. if (!oh->class->sysc ||
  943. !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
  944. return -EINVAL;
  945. /* clocks must be on for this operation */
  946. if (oh->_state != _HWMOD_STATE_ENABLED) {
  947. pr_warning("omap_hwmod: %s: reset can only be entered from "
  948. "enabled state\n", oh->name);
  949. return -EINVAL;
  950. }
  951. /* For some modules, all optionnal clocks need to be enabled as well */
  952. if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
  953. _enable_optional_clocks(oh);
  954. pr_debug("omap_hwmod: %s: resetting via OCP SOFTRESET\n", oh->name);
  955. v = oh->_sysc_cache;
  956. ret = _set_softreset(oh, &v);
  957. if (ret)
  958. goto dis_opt_clks;
  959. _write_sysconfig(v, oh);
  960. if (oh->class->sysc->sysc_flags & SYSS_HAS_RESET_STATUS)
  961. omap_test_timeout((omap_hwmod_read(oh,
  962. oh->class->sysc->syss_offs)
  963. & SYSS_RESETDONE_MASK),
  964. MAX_MODULE_SOFTRESET_WAIT, c);
  965. else if (oh->class->sysc->sysc_flags & SYSC_HAS_RESET_STATUS)
  966. omap_test_timeout(!(omap_hwmod_read(oh,
  967. oh->class->sysc->sysc_offs)
  968. & SYSC_TYPE2_SOFTRESET_MASK),
  969. MAX_MODULE_SOFTRESET_WAIT, c);
  970. if (c == MAX_MODULE_SOFTRESET_WAIT)
  971. pr_warning("omap_hwmod: %s: softreset failed (waited %d usec)\n",
  972. oh->name, MAX_MODULE_SOFTRESET_WAIT);
  973. else
  974. pr_debug("omap_hwmod: %s: softreset in %d usec\n", oh->name, c);
  975. /*
  976. * XXX add _HWMOD_STATE_WEDGED for modules that don't come back from
  977. * _wait_target_ready() or _reset()
  978. */
  979. ret = (c == MAX_MODULE_SOFTRESET_WAIT) ? -ETIMEDOUT : 0;
  980. dis_opt_clks:
  981. if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
  982. _disable_optional_clocks(oh);
  983. return ret;
  984. }
  985. /**
  986. * _reset - reset an omap_hwmod
  987. * @oh: struct omap_hwmod *
  988. *
  989. * Resets an omap_hwmod @oh. The default software reset mechanism for
  990. * most OMAP IP blocks is triggered via the OCP_SYSCONFIG.SOFTRESET
  991. * bit. However, some hwmods cannot be reset via this method: some
  992. * are not targets and therefore have no OCP header registers to
  993. * access; others (like the IVA) have idiosyncratic reset sequences.
  994. * So for these relatively rare cases, custom reset code can be
  995. * supplied in the struct omap_hwmod_class .reset function pointer.
  996. * Passes along the return value from either _reset() or the custom
  997. * reset function - these must return -EINVAL if the hwmod cannot be
  998. * reset this way or if the hwmod is in the wrong state, -ETIMEDOUT if
  999. * the module did not reset in time, or 0 upon success.
  1000. */
  1001. static int _reset(struct omap_hwmod *oh)
  1002. {
  1003. int ret;
  1004. pr_debug("omap_hwmod: %s: resetting\n", oh->name);
  1005. ret = (oh->class->reset) ? oh->class->reset(oh) : _ocp_softreset(oh);
  1006. return ret;
  1007. }
  1008. /**
  1009. * _enable - enable an omap_hwmod
  1010. * @oh: struct omap_hwmod *
  1011. *
  1012. * Enables an omap_hwmod @oh such that the MPU can access the hwmod's
  1013. * register target. Returns -EINVAL if the hwmod is in the wrong
  1014. * state or passes along the return value of _wait_target_ready().
  1015. */
  1016. static int _enable(struct omap_hwmod *oh)
  1017. {
  1018. int r;
  1019. if (oh->_state != _HWMOD_STATE_INITIALIZED &&
  1020. oh->_state != _HWMOD_STATE_IDLE &&
  1021. oh->_state != _HWMOD_STATE_DISABLED) {
  1022. WARN(1, "omap_hwmod: %s: enabled state can only be entered "
  1023. "from initialized, idle, or disabled state\n", oh->name);
  1024. return -EINVAL;
  1025. }
  1026. pr_debug("omap_hwmod: %s: enabling\n", oh->name);
  1027. /*
  1028. * If an IP contains only one HW reset line, then de-assert it in order
  1029. * to allow to enable the clocks. Otherwise the PRCM will return
  1030. * Intransition status, and the init will failed.
  1031. */
  1032. if ((oh->_state == _HWMOD_STATE_INITIALIZED ||
  1033. oh->_state == _HWMOD_STATE_DISABLED) && oh->rst_lines_cnt == 1)
  1034. _deassert_hardreset(oh, oh->rst_lines[0].name);
  1035. /* XXX mux balls */
  1036. _add_initiator_dep(oh, mpu_oh);
  1037. _enable_clocks(oh);
  1038. r = _wait_target_ready(oh);
  1039. if (!r) {
  1040. oh->_state = _HWMOD_STATE_ENABLED;
  1041. /* Access the sysconfig only if the target is ready */
  1042. if (oh->class->sysc) {
  1043. if (!(oh->_int_flags & _HWMOD_SYSCONFIG_LOADED))
  1044. _update_sysc_cache(oh);
  1045. _enable_sysc(oh);
  1046. }
  1047. } else {
  1048. _disable_clocks(oh);
  1049. pr_debug("omap_hwmod: %s: _wait_target_ready: %d\n",
  1050. oh->name, r);
  1051. }
  1052. return r;
  1053. }
  1054. /**
  1055. * _idle - idle an omap_hwmod
  1056. * @oh: struct omap_hwmod *
  1057. *
  1058. * Idles an omap_hwmod @oh. This should be called once the hwmod has
  1059. * no further work. Returns -EINVAL if the hwmod is in the wrong
  1060. * state or returns 0.
  1061. */
  1062. static int _idle(struct omap_hwmod *oh)
  1063. {
  1064. if (oh->_state != _HWMOD_STATE_ENABLED) {
  1065. WARN(1, "omap_hwmod: %s: idle state can only be entered from "
  1066. "enabled state\n", oh->name);
  1067. return -EINVAL;
  1068. }
  1069. pr_debug("omap_hwmod: %s: idling\n", oh->name);
  1070. if (oh->class->sysc)
  1071. _idle_sysc(oh);
  1072. _del_initiator_dep(oh, mpu_oh);
  1073. _disable_clocks(oh);
  1074. oh->_state = _HWMOD_STATE_IDLE;
  1075. return 0;
  1076. }
  1077. /**
  1078. * _shutdown - shutdown an omap_hwmod
  1079. * @oh: struct omap_hwmod *
  1080. *
  1081. * Shut down an omap_hwmod @oh. This should be called when the driver
  1082. * used for the hwmod is removed or unloaded or if the driver is not
  1083. * used by the system. Returns -EINVAL if the hwmod is in the wrong
  1084. * state or returns 0.
  1085. */
  1086. static int _shutdown(struct omap_hwmod *oh)
  1087. {
  1088. int ret;
  1089. u8 prev_state;
  1090. if (oh->_state != _HWMOD_STATE_IDLE &&
  1091. oh->_state != _HWMOD_STATE_ENABLED) {
  1092. WARN(1, "omap_hwmod: %s: disabled state can only be entered "
  1093. "from idle, or enabled state\n", oh->name);
  1094. return -EINVAL;
  1095. }
  1096. pr_debug("omap_hwmod: %s: disabling\n", oh->name);
  1097. if (oh->class->pre_shutdown) {
  1098. prev_state = oh->_state;
  1099. if (oh->_state == _HWMOD_STATE_IDLE)
  1100. _enable(oh);
  1101. ret = oh->class->pre_shutdown(oh);
  1102. if (ret) {
  1103. if (prev_state == _HWMOD_STATE_IDLE)
  1104. _idle(oh);
  1105. return ret;
  1106. }
  1107. }
  1108. if (oh->class->sysc)
  1109. _shutdown_sysc(oh);
  1110. /*
  1111. * If an IP contains only one HW reset line, then assert it
  1112. * before disabling the clocks and shutting down the IP.
  1113. */
  1114. if (oh->rst_lines_cnt == 1)
  1115. _assert_hardreset(oh, oh->rst_lines[0].name);
  1116. /* clocks and deps are already disabled in idle */
  1117. if (oh->_state == _HWMOD_STATE_ENABLED) {
  1118. _del_initiator_dep(oh, mpu_oh);
  1119. /* XXX what about the other system initiators here? dma, dsp */
  1120. _disable_clocks(oh);
  1121. }
  1122. /* XXX Should this code also force-disable the optional clocks? */
  1123. /* XXX mux any associated balls to safe mode */
  1124. oh->_state = _HWMOD_STATE_DISABLED;
  1125. return 0;
  1126. }
  1127. /**
  1128. * _setup - do initial configuration of omap_hwmod
  1129. * @oh: struct omap_hwmod *
  1130. *
  1131. * Writes the CLOCKACTIVITY bits @clockact to the hwmod @oh
  1132. * OCP_SYSCONFIG register. Returns -EINVAL if the hwmod is in the
  1133. * wrong state or returns 0.
  1134. */
  1135. static int _setup(struct omap_hwmod *oh, void *data)
  1136. {
  1137. int i, r;
  1138. u8 postsetup_state;
  1139. /* Set iclk autoidle mode */
  1140. if (oh->slaves_cnt > 0) {
  1141. for (i = 0; i < oh->slaves_cnt; i++) {
  1142. struct omap_hwmod_ocp_if *os = oh->slaves[i];
  1143. struct clk *c = os->_clk;
  1144. if (!c)
  1145. continue;
  1146. if (os->flags & OCPIF_SWSUP_IDLE) {
  1147. /* XXX omap_iclk_deny_idle(c); */
  1148. } else {
  1149. /* XXX omap_iclk_allow_idle(c); */
  1150. clk_enable(c);
  1151. }
  1152. }
  1153. }
  1154. oh->_state = _HWMOD_STATE_INITIALIZED;
  1155. /*
  1156. * In the case of hwmod with hardreset that should not be
  1157. * de-assert at boot time, we have to keep the module
  1158. * initialized, because we cannot enable it properly with the
  1159. * reset asserted. Exit without warning because that behavior is
  1160. * expected.
  1161. */
  1162. if ((oh->flags & HWMOD_INIT_NO_RESET) && oh->rst_lines_cnt == 1)
  1163. return 0;
  1164. r = _enable(oh);
  1165. if (r) {
  1166. pr_warning("omap_hwmod: %s: cannot be enabled (%d)\n",
  1167. oh->name, oh->_state);
  1168. return 0;
  1169. }
  1170. if (!(oh->flags & HWMOD_INIT_NO_RESET)) {
  1171. _reset(oh);
  1172. /*
  1173. * OCP_SYSCONFIG bits need to be reprogrammed after a softreset.
  1174. * The _enable() function should be split to
  1175. * avoid the rewrite of the OCP_SYSCONFIG register.
  1176. */
  1177. if (oh->class->sysc) {
  1178. _update_sysc_cache(oh);
  1179. _enable_sysc(oh);
  1180. }
  1181. }
  1182. postsetup_state = oh->_postsetup_state;
  1183. if (postsetup_state == _HWMOD_STATE_UNKNOWN)
  1184. postsetup_state = _HWMOD_STATE_ENABLED;
  1185. /*
  1186. * XXX HWMOD_INIT_NO_IDLE does not belong in hwmod data -
  1187. * it should be set by the core code as a runtime flag during startup
  1188. */
  1189. if ((oh->flags & HWMOD_INIT_NO_IDLE) &&
  1190. (postsetup_state == _HWMOD_STATE_IDLE))
  1191. postsetup_state = _HWMOD_STATE_ENABLED;
  1192. if (postsetup_state == _HWMOD_STATE_IDLE)
  1193. _idle(oh);
  1194. else if (postsetup_state == _HWMOD_STATE_DISABLED)
  1195. _shutdown(oh);
  1196. else if (postsetup_state != _HWMOD_STATE_ENABLED)
  1197. WARN(1, "hwmod: %s: unknown postsetup state %d! defaulting to enabled\n",
  1198. oh->name, postsetup_state);
  1199. return 0;
  1200. }
  1201. /**
  1202. * _register - register a struct omap_hwmod
  1203. * @oh: struct omap_hwmod *
  1204. *
  1205. * Registers the omap_hwmod @oh. Returns -EEXIST if an omap_hwmod
  1206. * already has been registered by the same name; -EINVAL if the
  1207. * omap_hwmod is in the wrong state, if @oh is NULL, if the
  1208. * omap_hwmod's class field is NULL; if the omap_hwmod is missing a
  1209. * name, or if the omap_hwmod's class is missing a name; or 0 upon
  1210. * success.
  1211. *
  1212. * XXX The data should be copied into bootmem, so the original data
  1213. * should be marked __initdata and freed after init. This would allow
  1214. * unneeded omap_hwmods to be freed on multi-OMAP configurations. Note
  1215. * that the copy process would be relatively complex due to the large number
  1216. * of substructures.
  1217. */
  1218. static int __init _register(struct omap_hwmod *oh)
  1219. {
  1220. int ret, ms_id;
  1221. if (!oh || !oh->name || !oh->class || !oh->class->name ||
  1222. (oh->_state != _HWMOD_STATE_UNKNOWN))
  1223. return -EINVAL;
  1224. pr_debug("omap_hwmod: %s: registering\n", oh->name);
  1225. if (_lookup(oh->name))
  1226. return -EEXIST;
  1227. ms_id = _find_mpu_port_index(oh);
  1228. if (!IS_ERR_VALUE(ms_id)) {
  1229. oh->_mpu_port_index = ms_id;
  1230. oh->_mpu_rt_va = _find_mpu_rt_base(oh, oh->_mpu_port_index);
  1231. } else {
  1232. oh->_int_flags |= _HWMOD_NO_MPU_PORT;
  1233. }
  1234. list_add_tail(&oh->node, &omap_hwmod_list);
  1235. spin_lock_init(&oh->_lock);
  1236. oh->_state = _HWMOD_STATE_REGISTERED;
  1237. ret = 0;
  1238. return ret;
  1239. }
  1240. /* Public functions */
  1241. u32 omap_hwmod_read(struct omap_hwmod *oh, u16 reg_offs)
  1242. {
  1243. if (oh->flags & HWMOD_16BIT_REG)
  1244. return __raw_readw(oh->_mpu_rt_va + reg_offs);
  1245. else
  1246. return __raw_readl(oh->_mpu_rt_va + reg_offs);
  1247. }
  1248. void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs)
  1249. {
  1250. if (oh->flags & HWMOD_16BIT_REG)
  1251. __raw_writew(v, oh->_mpu_rt_va + reg_offs);
  1252. else
  1253. __raw_writel(v, oh->_mpu_rt_va + reg_offs);
  1254. }
  1255. /**
  1256. * omap_hwmod_set_slave_idlemode - set the hwmod's OCP slave idlemode
  1257. * @oh: struct omap_hwmod *
  1258. * @idlemode: SIDLEMODE field bits (shifted to bit 0)
  1259. *
  1260. * Sets the IP block's OCP slave idlemode in hardware, and updates our
  1261. * local copy. Intended to be used by drivers that have some erratum
  1262. * that requires direct manipulation of the SIDLEMODE bits. Returns
  1263. * -EINVAL if @oh is null, or passes along the return value from
  1264. * _set_slave_idlemode().
  1265. *
  1266. * XXX Does this function have any current users? If not, we should
  1267. * remove it; it is better to let the rest of the hwmod code handle this.
  1268. * Any users of this function should be scrutinized carefully.
  1269. */
  1270. int omap_hwmod_set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode)
  1271. {
  1272. u32 v;
  1273. int retval = 0;
  1274. if (!oh)
  1275. return -EINVAL;
  1276. v = oh->_sysc_cache;
  1277. retval = _set_slave_idlemode(oh, idlemode, &v);
  1278. if (!retval)
  1279. _write_sysconfig(v, oh);
  1280. return retval;
  1281. }
  1282. /**
  1283. * omap_hwmod_lookup - look up a registered omap_hwmod by name
  1284. * @name: name of the omap_hwmod to look up
  1285. *
  1286. * Given a @name of an omap_hwmod, return a pointer to the registered
  1287. * struct omap_hwmod *, or NULL upon error.
  1288. */
  1289. struct omap_hwmod *omap_hwmod_lookup(const char *name)
  1290. {
  1291. struct omap_hwmod *oh;
  1292. if (!name)
  1293. return NULL;
  1294. oh = _lookup(name);
  1295. return oh;
  1296. }
  1297. /**
  1298. * omap_hwmod_for_each - call function for each registered omap_hwmod
  1299. * @fn: pointer to a callback function
  1300. * @data: void * data to pass to callback function
  1301. *
  1302. * Call @fn for each registered omap_hwmod, passing @data to each
  1303. * function. @fn must return 0 for success or any other value for
  1304. * failure. If @fn returns non-zero, the iteration across omap_hwmods
  1305. * will stop and the non-zero return value will be passed to the
  1306. * caller of omap_hwmod_for_each(). @fn is called with
  1307. * omap_hwmod_for_each() held.
  1308. */
  1309. int omap_hwmod_for_each(int (*fn)(struct omap_hwmod *oh, void *data),
  1310. void *data)
  1311. {
  1312. struct omap_hwmod *temp_oh;
  1313. int ret;
  1314. if (!fn)
  1315. return -EINVAL;
  1316. list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
  1317. ret = (*fn)(temp_oh, data);
  1318. if (ret)
  1319. break;
  1320. }
  1321. return ret;
  1322. }
  1323. /**
  1324. * omap_hwmod_init - init omap_hwmod code and register hwmods
  1325. * @ohs: pointer to an array of omap_hwmods to register
  1326. *
  1327. * Intended to be called early in boot before the clock framework is
  1328. * initialized. If @ohs is not null, will register all omap_hwmods
  1329. * listed in @ohs that are valid for this chip. Returns -EINVAL if
  1330. * omap_hwmod_init() has already been called or 0 otherwise.
  1331. */
  1332. int __init omap_hwmod_init(struct omap_hwmod **ohs)
  1333. {
  1334. struct omap_hwmod *oh;
  1335. int r;
  1336. if (inited)
  1337. return -EINVAL;
  1338. inited = 1;
  1339. if (!ohs)
  1340. return 0;
  1341. oh = *ohs;
  1342. while (oh) {
  1343. if (omap_chip_is(oh->omap_chip)) {
  1344. r = _register(oh);
  1345. WARN(r, "omap_hwmod: %s: _register returned "
  1346. "%d\n", oh->name, r);
  1347. }
  1348. oh = *++ohs;
  1349. }
  1350. return 0;
  1351. }
  1352. /**
  1353. * omap_hwmod_late_init - do some post-clock framework initialization
  1354. *
  1355. * Must be called after omap2_clk_init(). Resolves the struct clk names
  1356. * to struct clk pointers for each registered omap_hwmod. Also calls
  1357. * _setup() on each hwmod. Returns 0.
  1358. */
  1359. int omap_hwmod_late_init(void)
  1360. {
  1361. int r;
  1362. /* XXX check return value */
  1363. r = omap_hwmod_for_each(_init_clocks, NULL);
  1364. WARN(r, "omap_hwmod: omap_hwmod_late_init(): _init_clocks failed\n");
  1365. mpu_oh = omap_hwmod_lookup(MPU_INITIATOR_NAME);
  1366. WARN(!mpu_oh, "omap_hwmod: could not find MPU initiator hwmod %s\n",
  1367. MPU_INITIATOR_NAME);
  1368. omap_hwmod_for_each(_setup, NULL);
  1369. return 0;
  1370. }
  1371. /**
  1372. * omap_hwmod_enable - enable an omap_hwmod
  1373. * @oh: struct omap_hwmod *
  1374. *
  1375. * Enable an omap_hwmod @oh. Intended to be called by omap_device_enable().
  1376. * Returns -EINVAL on error or passes along the return value from _enable().
  1377. */
  1378. int omap_hwmod_enable(struct omap_hwmod *oh)
  1379. {
  1380. int r;
  1381. unsigned long flags;
  1382. if (!oh)
  1383. return -EINVAL;
  1384. spin_lock_irqsave(&oh->_lock, flags);
  1385. r = _enable(oh);
  1386. spin_unlock_irqrestore(&oh->_lock, flags);
  1387. return r;
  1388. }
  1389. /**
  1390. * omap_hwmod_idle - idle an omap_hwmod
  1391. * @oh: struct omap_hwmod *
  1392. *
  1393. * Idle an omap_hwmod @oh. Intended to be called by omap_device_idle().
  1394. * Returns -EINVAL on error or passes along the return value from _idle().
  1395. */
  1396. int omap_hwmod_idle(struct omap_hwmod *oh)
  1397. {
  1398. unsigned long flags;
  1399. if (!oh)
  1400. return -EINVAL;
  1401. spin_lock_irqsave(&oh->_lock, flags);
  1402. _idle(oh);
  1403. spin_unlock_irqrestore(&oh->_lock, flags);
  1404. return 0;
  1405. }
  1406. /**
  1407. * omap_hwmod_shutdown - shutdown an omap_hwmod
  1408. * @oh: struct omap_hwmod *
  1409. *
  1410. * Shutdown an omap_hwmod @oh. Intended to be called by
  1411. * omap_device_shutdown(). Returns -EINVAL on error or passes along
  1412. * the return value from _shutdown().
  1413. */
  1414. int omap_hwmod_shutdown(struct omap_hwmod *oh)
  1415. {
  1416. unsigned long flags;
  1417. if (!oh)
  1418. return -EINVAL;
  1419. spin_lock_irqsave(&oh->_lock, flags);
  1420. _shutdown(oh);
  1421. spin_unlock_irqrestore(&oh->_lock, flags);
  1422. return 0;
  1423. }
  1424. /**
  1425. * omap_hwmod_enable_clocks - enable main_clk, all interface clocks
  1426. * @oh: struct omap_hwmod *oh
  1427. *
  1428. * Intended to be called by the omap_device code.
  1429. */
  1430. int omap_hwmod_enable_clocks(struct omap_hwmod *oh)
  1431. {
  1432. unsigned long flags;
  1433. spin_lock_irqsave(&oh->_lock, flags);
  1434. _enable_clocks(oh);
  1435. spin_unlock_irqrestore(&oh->_lock, flags);
  1436. return 0;
  1437. }
  1438. /**
  1439. * omap_hwmod_disable_clocks - disable main_clk, all interface clocks
  1440. * @oh: struct omap_hwmod *oh
  1441. *
  1442. * Intended to be called by the omap_device code.
  1443. */
  1444. int omap_hwmod_disable_clocks(struct omap_hwmod *oh)
  1445. {
  1446. unsigned long flags;
  1447. spin_lock_irqsave(&oh->_lock, flags);
  1448. _disable_clocks(oh);
  1449. spin_unlock_irqrestore(&oh->_lock, flags);
  1450. return 0;
  1451. }
  1452. /**
  1453. * omap_hwmod_ocp_barrier - wait for posted writes against the hwmod to complete
  1454. * @oh: struct omap_hwmod *oh
  1455. *
  1456. * Intended to be called by drivers and core code when all posted
  1457. * writes to a device must complete before continuing further
  1458. * execution (for example, after clearing some device IRQSTATUS
  1459. * register bits)
  1460. *
  1461. * XXX what about targets with multiple OCP threads?
  1462. */
  1463. void omap_hwmod_ocp_barrier(struct omap_hwmod *oh)
  1464. {
  1465. BUG_ON(!oh);
  1466. if (!oh->class->sysc || !oh->class->sysc->sysc_flags) {
  1467. WARN(1, "omap_device: %s: OCP barrier impossible due to "
  1468. "device configuration\n", oh->name);
  1469. return;
  1470. }
  1471. /*
  1472. * Forces posted writes to complete on the OCP thread handling
  1473. * register writes
  1474. */
  1475. omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
  1476. }
  1477. /**
  1478. * omap_hwmod_reset - reset the hwmod
  1479. * @oh: struct omap_hwmod *
  1480. *
  1481. * Under some conditions, a driver may wish to reset the entire device.
  1482. * Called from omap_device code. Returns -EINVAL on error or passes along
  1483. * the return value from _reset().
  1484. */
  1485. int omap_hwmod_reset(struct omap_hwmod *oh)
  1486. {
  1487. int r;
  1488. unsigned long flags;
  1489. if (!oh)
  1490. return -EINVAL;
  1491. spin_lock_irqsave(&oh->_lock, flags);
  1492. r = _reset(oh);
  1493. spin_unlock_irqrestore(&oh->_lock, flags);
  1494. return r;
  1495. }
  1496. /**
  1497. * omap_hwmod_count_resources - count number of struct resources needed by hwmod
  1498. * @oh: struct omap_hwmod *
  1499. * @res: pointer to the first element of an array of struct resource to fill
  1500. *
  1501. * Count the number of struct resource array elements necessary to
  1502. * contain omap_hwmod @oh resources. Intended to be called by code
  1503. * that registers omap_devices. Intended to be used to determine the
  1504. * size of a dynamically-allocated struct resource array, before
  1505. * calling omap_hwmod_fill_resources(). Returns the number of struct
  1506. * resource array elements needed.
  1507. *
  1508. * XXX This code is not optimized. It could attempt to merge adjacent
  1509. * resource IDs.
  1510. *
  1511. */
  1512. int omap_hwmod_count_resources(struct omap_hwmod *oh)
  1513. {
  1514. int ret, i;
  1515. ret = oh->mpu_irqs_cnt + oh->sdma_reqs_cnt;
  1516. for (i = 0; i < oh->slaves_cnt; i++)
  1517. ret += oh->slaves[i]->addr_cnt;
  1518. return ret;
  1519. }
  1520. /**
  1521. * omap_hwmod_fill_resources - fill struct resource array with hwmod data
  1522. * @oh: struct omap_hwmod *
  1523. * @res: pointer to the first element of an array of struct resource to fill
  1524. *
  1525. * Fill the struct resource array @res with resource data from the
  1526. * omap_hwmod @oh. Intended to be called by code that registers
  1527. * omap_devices. See also omap_hwmod_count_resources(). Returns the
  1528. * number of array elements filled.
  1529. */
  1530. int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res)
  1531. {
  1532. int i, j;
  1533. int r = 0;
  1534. /* For each IRQ, DMA, memory area, fill in array.*/
  1535. for (i = 0; i < oh->mpu_irqs_cnt; i++) {
  1536. (res + r)->name = (oh->mpu_irqs + i)->name;
  1537. (res + r)->start = (oh->mpu_irqs + i)->irq;
  1538. (res + r)->end = (oh->mpu_irqs + i)->irq;
  1539. (res + r)->flags = IORESOURCE_IRQ;
  1540. r++;
  1541. }
  1542. for (i = 0; i < oh->sdma_reqs_cnt; i++) {
  1543. (res + r)->name = (oh->sdma_reqs + i)->name;
  1544. (res + r)->start = (oh->sdma_reqs + i)->dma_req;
  1545. (res + r)->end = (oh->sdma_reqs + i)->dma_req;
  1546. (res + r)->flags = IORESOURCE_DMA;
  1547. r++;
  1548. }
  1549. for (i = 0; i < oh->slaves_cnt; i++) {
  1550. struct omap_hwmod_ocp_if *os;
  1551. os = oh->slaves[i];
  1552. for (j = 0; j < os->addr_cnt; j++) {
  1553. (res + r)->start = (os->addr + j)->pa_start;
  1554. (res + r)->end = (os->addr + j)->pa_end;
  1555. (res + r)->flags = IORESOURCE_MEM;
  1556. r++;
  1557. }
  1558. }
  1559. return r;
  1560. }
  1561. /**
  1562. * omap_hwmod_get_pwrdm - return pointer to this module's main powerdomain
  1563. * @oh: struct omap_hwmod *
  1564. *
  1565. * Return the powerdomain pointer associated with the OMAP module
  1566. * @oh's main clock. If @oh does not have a main clk, return the
  1567. * powerdomain associated with the interface clock associated with the
  1568. * module's MPU port. (XXX Perhaps this should use the SDMA port
  1569. * instead?) Returns NULL on error, or a struct powerdomain * on
  1570. * success.
  1571. */
  1572. struct powerdomain *omap_hwmod_get_pwrdm(struct omap_hwmod *oh)
  1573. {
  1574. struct clk *c;
  1575. if (!oh)
  1576. return NULL;
  1577. if (oh->_clk) {
  1578. c = oh->_clk;
  1579. } else {
  1580. if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
  1581. return NULL;
  1582. c = oh->slaves[oh->_mpu_port_index]->_clk;
  1583. }
  1584. if (!c->clkdm)
  1585. return NULL;
  1586. return c->clkdm->pwrdm.ptr;
  1587. }
  1588. /**
  1589. * omap_hwmod_get_mpu_rt_va - return the module's base address (for the MPU)
  1590. * @oh: struct omap_hwmod *
  1591. *
  1592. * Returns the virtual address corresponding to the beginning of the
  1593. * module's register target, in the address range that is intended to
  1594. * be used by the MPU. Returns the virtual address upon success or NULL
  1595. * upon error.
  1596. */
  1597. void __iomem *omap_hwmod_get_mpu_rt_va(struct omap_hwmod *oh)
  1598. {
  1599. if (!oh)
  1600. return NULL;
  1601. if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
  1602. return NULL;
  1603. if (oh->_state == _HWMOD_STATE_UNKNOWN)
  1604. return NULL;
  1605. return oh->_mpu_rt_va;
  1606. }
  1607. /**
  1608. * omap_hwmod_add_initiator_dep - add sleepdep from @init_oh to @oh
  1609. * @oh: struct omap_hwmod *
  1610. * @init_oh: struct omap_hwmod * (initiator)
  1611. *
  1612. * Add a sleep dependency between the initiator @init_oh and @oh.
  1613. * Intended to be called by DSP/Bridge code via platform_data for the
  1614. * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge
  1615. * code needs to add/del initiator dependencies dynamically
  1616. * before/after accessing a device. Returns the return value from
  1617. * _add_initiator_dep().
  1618. *
  1619. * XXX Keep a usecount in the clockdomain code
  1620. */
  1621. int omap_hwmod_add_initiator_dep(struct omap_hwmod *oh,
  1622. struct omap_hwmod *init_oh)
  1623. {
  1624. return _add_initiator_dep(oh, init_oh);
  1625. }
  1626. /*
  1627. * XXX what about functions for drivers to save/restore ocp_sysconfig
  1628. * for context save/restore operations?
  1629. */
  1630. /**
  1631. * omap_hwmod_del_initiator_dep - remove sleepdep from @init_oh to @oh
  1632. * @oh: struct omap_hwmod *
  1633. * @init_oh: struct omap_hwmod * (initiator)
  1634. *
  1635. * Remove a sleep dependency between the initiator @init_oh and @oh.
  1636. * Intended to be called by DSP/Bridge code via platform_data for the
  1637. * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge
  1638. * code needs to add/del initiator dependencies dynamically
  1639. * before/after accessing a device. Returns the return value from
  1640. * _del_initiator_dep().
  1641. *
  1642. * XXX Keep a usecount in the clockdomain code
  1643. */
  1644. int omap_hwmod_del_initiator_dep(struct omap_hwmod *oh,
  1645. struct omap_hwmod *init_oh)
  1646. {
  1647. return _del_initiator_dep(oh, init_oh);
  1648. }
  1649. /**
  1650. * omap_hwmod_enable_wakeup - allow device to wake up the system
  1651. * @oh: struct omap_hwmod *
  1652. *
  1653. * Sets the module OCP socket ENAWAKEUP bit to allow the module to
  1654. * send wakeups to the PRCM. Eventually this should sets PRCM wakeup
  1655. * registers to cause the PRCM to receive wakeup events from the
  1656. * module. Does not set any wakeup routing registers beyond this
  1657. * point - if the module is to wake up any other module or subsystem,
  1658. * that must be set separately. Called by omap_device code. Returns
  1659. * -EINVAL on error or 0 upon success.
  1660. */
  1661. int omap_hwmod_enable_wakeup(struct omap_hwmod *oh)
  1662. {
  1663. unsigned long flags;
  1664. u32 v;
  1665. if (!oh->class->sysc ||
  1666. !(oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP))
  1667. return -EINVAL;
  1668. spin_lock_irqsave(&oh->_lock, flags);
  1669. v = oh->_sysc_cache;
  1670. _enable_wakeup(oh, &v);
  1671. _write_sysconfig(v, oh);
  1672. spin_unlock_irqrestore(&oh->_lock, flags);
  1673. return 0;
  1674. }
  1675. /**
  1676. * omap_hwmod_disable_wakeup - prevent device from waking the system
  1677. * @oh: struct omap_hwmod *
  1678. *
  1679. * Clears the module OCP socket ENAWAKEUP bit to prevent the module
  1680. * from sending wakeups to the PRCM. Eventually this should clear
  1681. * PRCM wakeup registers to cause the PRCM to ignore wakeup events
  1682. * from the module. Does not set any wakeup routing registers beyond
  1683. * this point - if the module is to wake up any other module or
  1684. * subsystem, that must be set separately. Called by omap_device
  1685. * code. Returns -EINVAL on error or 0 upon success.
  1686. */
  1687. int omap_hwmod_disable_wakeup(struct omap_hwmod *oh)
  1688. {
  1689. unsigned long flags;
  1690. u32 v;
  1691. if (!oh->class->sysc ||
  1692. !(oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP))
  1693. return -EINVAL;
  1694. spin_lock_irqsave(&oh->_lock, flags);
  1695. v = oh->_sysc_cache;
  1696. _disable_wakeup(oh, &v);
  1697. _write_sysconfig(v, oh);
  1698. spin_unlock_irqrestore(&oh->_lock, flags);
  1699. return 0;
  1700. }
  1701. /**
  1702. * omap_hwmod_assert_hardreset - assert the HW reset line of submodules
  1703. * contained in the hwmod module.
  1704. * @oh: struct omap_hwmod *
  1705. * @name: name of the reset line to lookup and assert
  1706. *
  1707. * Some IP like dsp, ipu or iva contain processor that require
  1708. * an HW reset line to be assert / deassert in order to enable fully
  1709. * the IP. Returns -EINVAL if @oh is null or if the operation is not
  1710. * yet supported on this OMAP; otherwise, passes along the return value
  1711. * from _assert_hardreset().
  1712. */
  1713. int omap_hwmod_assert_hardreset(struct omap_hwmod *oh, const char *name)
  1714. {
  1715. int ret;
  1716. unsigned long flags;
  1717. if (!oh)
  1718. return -EINVAL;
  1719. spin_lock_irqsave(&oh->_lock, flags);
  1720. ret = _assert_hardreset(oh, name);
  1721. spin_unlock_irqrestore(&oh->_lock, flags);
  1722. return ret;
  1723. }
  1724. /**
  1725. * omap_hwmod_deassert_hardreset - deassert the HW reset line of submodules
  1726. * contained in the hwmod module.
  1727. * @oh: struct omap_hwmod *
  1728. * @name: name of the reset line to look up and deassert
  1729. *
  1730. * Some IP like dsp, ipu or iva contain processor that require
  1731. * an HW reset line to be assert / deassert in order to enable fully
  1732. * the IP. Returns -EINVAL if @oh is null or if the operation is not
  1733. * yet supported on this OMAP; otherwise, passes along the return value
  1734. * from _deassert_hardreset().
  1735. */
  1736. int omap_hwmod_deassert_hardreset(struct omap_hwmod *oh, const char *name)
  1737. {
  1738. int ret;
  1739. unsigned long flags;
  1740. if (!oh)
  1741. return -EINVAL;
  1742. spin_lock_irqsave(&oh->_lock, flags);
  1743. ret = _deassert_hardreset(oh, name);
  1744. spin_unlock_irqrestore(&oh->_lock, flags);
  1745. return ret;
  1746. }
  1747. /**
  1748. * omap_hwmod_read_hardreset - read the HW reset line state of submodules
  1749. * contained in the hwmod module
  1750. * @oh: struct omap_hwmod *
  1751. * @name: name of the reset line to look up and read
  1752. *
  1753. * Return the current state of the hwmod @oh's reset line named @name:
  1754. * returns -EINVAL upon parameter error or if this operation
  1755. * is unsupported on the current OMAP; otherwise, passes along the return
  1756. * value from _read_hardreset().
  1757. */
  1758. int omap_hwmod_read_hardreset(struct omap_hwmod *oh, const char *name)
  1759. {
  1760. int ret;
  1761. unsigned long flags;
  1762. if (!oh)
  1763. return -EINVAL;
  1764. spin_lock_irqsave(&oh->_lock, flags);
  1765. ret = _read_hardreset(oh, name);
  1766. spin_unlock_irqrestore(&oh->_lock, flags);
  1767. return ret;
  1768. }
  1769. /**
  1770. * omap_hwmod_for_each_by_class - call @fn for each hwmod of class @classname
  1771. * @classname: struct omap_hwmod_class name to search for
  1772. * @fn: callback function pointer to call for each hwmod in class @classname
  1773. * @user: arbitrary context data to pass to the callback function
  1774. *
  1775. * For each omap_hwmod of class @classname, call @fn.
  1776. * If the callback function returns something other than
  1777. * zero, the iterator is terminated, and the callback function's return
  1778. * value is passed back to the caller. Returns 0 upon success, -EINVAL
  1779. * if @classname or @fn are NULL, or passes back the error code from @fn.
  1780. */
  1781. int omap_hwmod_for_each_by_class(const char *classname,
  1782. int (*fn)(struct omap_hwmod *oh,
  1783. void *user),
  1784. void *user)
  1785. {
  1786. struct omap_hwmod *temp_oh;
  1787. int ret = 0;
  1788. if (!classname || !fn)
  1789. return -EINVAL;
  1790. pr_debug("omap_hwmod: %s: looking for modules of class %s\n",
  1791. __func__, classname);
  1792. list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
  1793. if (!strcmp(temp_oh->class->name, classname)) {
  1794. pr_debug("omap_hwmod: %s: %s: calling callback fn\n",
  1795. __func__, temp_oh->name);
  1796. ret = (*fn)(temp_oh, user);
  1797. if (ret)
  1798. break;
  1799. }
  1800. }
  1801. if (ret)
  1802. pr_debug("omap_hwmod: %s: iterator terminated early: %d\n",
  1803. __func__, ret);
  1804. return ret;
  1805. }
  1806. /**
  1807. * omap_hwmod_set_postsetup_state - set the post-_setup() state for this hwmod
  1808. * @oh: struct omap_hwmod *
  1809. * @state: state that _setup() should leave the hwmod in
  1810. *
  1811. * Sets the hwmod state that @oh will enter at the end of _setup() (called by
  1812. * omap_hwmod_late_init()). Only valid to call between calls to
  1813. * omap_hwmod_init() and omap_hwmod_late_init(). Returns 0 upon success or
  1814. * -EINVAL if there is a problem with the arguments or if the hwmod is
  1815. * in the wrong state.
  1816. */
  1817. int omap_hwmod_set_postsetup_state(struct omap_hwmod *oh, u8 state)
  1818. {
  1819. int ret;
  1820. unsigned long flags;
  1821. if (!oh)
  1822. return -EINVAL;
  1823. if (state != _HWMOD_STATE_DISABLED &&
  1824. state != _HWMOD_STATE_ENABLED &&
  1825. state != _HWMOD_STATE_IDLE)
  1826. return -EINVAL;
  1827. spin_lock_irqsave(&oh->_lock, flags);
  1828. if (oh->_state != _HWMOD_STATE_REGISTERED) {
  1829. ret = -EINVAL;
  1830. goto ohsps_unlock;
  1831. }
  1832. oh->_postsetup_state = state;
  1833. ret = 0;
  1834. ohsps_unlock:
  1835. spin_unlock_irqrestore(&oh->_lock, flags);
  1836. return ret;
  1837. }
  1838. /**
  1839. * omap_hwmod_get_context_loss_count - get lost context count
  1840. * @oh: struct omap_hwmod *
  1841. *
  1842. * Query the powerdomain of of @oh to get the context loss
  1843. * count for this device.
  1844. *
  1845. * Returns the context loss count of the powerdomain assocated with @oh
  1846. * upon success, or zero if no powerdomain exists for @oh.
  1847. */
  1848. u32 omap_hwmod_get_context_loss_count(struct omap_hwmod *oh)
  1849. {
  1850. struct powerdomain *pwrdm;
  1851. int ret = 0;
  1852. pwrdm = omap_hwmod_get_pwrdm(oh);
  1853. if (pwrdm)
  1854. ret = pwrdm_get_context_loss_count(pwrdm);
  1855. return ret;
  1856. }