apply.c 29 KB

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  1. /*
  2. * Copyright (C) 2011 Texas Instruments
  3. * Author: Tomi Valkeinen <tomi.valkeinen@ti.com>
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms of the GNU General Public License version 2 as published by
  7. * the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope that it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. *
  14. * You should have received a copy of the GNU General Public License along with
  15. * this program. If not, see <http://www.gnu.org/licenses/>.
  16. */
  17. #define DSS_SUBSYS_NAME "APPLY"
  18. #include <linux/kernel.h>
  19. #include <linux/slab.h>
  20. #include <linux/spinlock.h>
  21. #include <linux/jiffies.h>
  22. #include <video/omapdss.h>
  23. #include "dss.h"
  24. #include "dss_features.h"
  25. /*
  26. * We have 4 levels of cache for the dispc settings. First two are in SW and
  27. * the latter two in HW.
  28. *
  29. * set_info()
  30. * v
  31. * +--------------------+
  32. * | user_info |
  33. * +--------------------+
  34. * v
  35. * apply()
  36. * v
  37. * +--------------------+
  38. * | info |
  39. * +--------------------+
  40. * v
  41. * write_regs()
  42. * v
  43. * +--------------------+
  44. * | shadow registers |
  45. * +--------------------+
  46. * v
  47. * VFP or lcd/digit_enable
  48. * v
  49. * +--------------------+
  50. * | registers |
  51. * +--------------------+
  52. */
  53. struct ovl_priv_data {
  54. bool user_info_dirty;
  55. struct omap_overlay_info user_info;
  56. bool info_dirty;
  57. struct omap_overlay_info info;
  58. bool shadow_info_dirty;
  59. bool extra_info_dirty;
  60. bool shadow_extra_info_dirty;
  61. bool enabled;
  62. enum omap_channel channel;
  63. u32 fifo_low, fifo_high;
  64. /*
  65. * True if overlay is to be enabled. Used to check and calculate configs
  66. * for the overlay before it is enabled in the HW.
  67. */
  68. bool enabling;
  69. };
  70. struct mgr_priv_data {
  71. bool user_info_dirty;
  72. struct omap_overlay_manager_info user_info;
  73. bool info_dirty;
  74. struct omap_overlay_manager_info info;
  75. bool shadow_info_dirty;
  76. /* If true, GO bit is up and shadow registers cannot be written.
  77. * Never true for manual update displays */
  78. bool busy;
  79. /* If true, dispc output is enabled */
  80. bool updating;
  81. /* If true, a display is enabled using this manager */
  82. bool enabled;
  83. bool extra_info_dirty;
  84. bool shadow_extra_info_dirty;
  85. struct omap_video_timings timings;
  86. struct dss_lcd_mgr_config lcd_config;
  87. };
  88. static struct {
  89. struct ovl_priv_data ovl_priv_data_array[MAX_DSS_OVERLAYS];
  90. struct mgr_priv_data mgr_priv_data_array[MAX_DSS_MANAGERS];
  91. bool irq_enabled;
  92. } dss_data;
  93. /* protects dss_data */
  94. static spinlock_t data_lock;
  95. /* lock for blocking functions */
  96. static DEFINE_MUTEX(apply_lock);
  97. static DECLARE_COMPLETION(extra_updated_completion);
  98. static void dss_register_vsync_isr(void);
  99. static struct ovl_priv_data *get_ovl_priv(struct omap_overlay *ovl)
  100. {
  101. return &dss_data.ovl_priv_data_array[ovl->id];
  102. }
  103. static struct mgr_priv_data *get_mgr_priv(struct omap_overlay_manager *mgr)
  104. {
  105. return &dss_data.mgr_priv_data_array[mgr->id];
  106. }
  107. void dss_apply_init(void)
  108. {
  109. const int num_ovls = dss_feat_get_num_ovls();
  110. struct mgr_priv_data *mp;
  111. int i;
  112. spin_lock_init(&data_lock);
  113. for (i = 0; i < num_ovls; ++i) {
  114. struct ovl_priv_data *op;
  115. op = &dss_data.ovl_priv_data_array[i];
  116. op->info.global_alpha = 255;
  117. switch (i) {
  118. case 0:
  119. op->info.zorder = 0;
  120. break;
  121. case 1:
  122. op->info.zorder =
  123. dss_has_feature(FEAT_ALPHA_FREE_ZORDER) ? 3 : 0;
  124. break;
  125. case 2:
  126. op->info.zorder =
  127. dss_has_feature(FEAT_ALPHA_FREE_ZORDER) ? 2 : 0;
  128. break;
  129. case 3:
  130. op->info.zorder =
  131. dss_has_feature(FEAT_ALPHA_FREE_ZORDER) ? 1 : 0;
  132. break;
  133. }
  134. op->user_info = op->info;
  135. }
  136. /*
  137. * Initialize some of the lcd_config fields for TV manager, this lets
  138. * us prevent checking if the manager is LCD or TV at some places
  139. */
  140. mp = &dss_data.mgr_priv_data_array[OMAP_DSS_CHANNEL_DIGIT];
  141. mp->lcd_config.video_port_width = 24;
  142. mp->lcd_config.clock_info.lck_div = 1;
  143. mp->lcd_config.clock_info.pck_div = 1;
  144. }
  145. /*
  146. * A LCD manager's stallmode decides whether it is in manual or auto update. TV
  147. * manager is always auto update, stallmode field for TV manager is false by
  148. * default
  149. */
  150. static bool ovl_manual_update(struct omap_overlay *ovl)
  151. {
  152. struct mgr_priv_data *mp = get_mgr_priv(ovl->manager);
  153. return mp->lcd_config.stallmode;
  154. }
  155. static bool mgr_manual_update(struct omap_overlay_manager *mgr)
  156. {
  157. struct mgr_priv_data *mp = get_mgr_priv(mgr);
  158. return mp->lcd_config.stallmode;
  159. }
  160. static int dss_check_settings_low(struct omap_overlay_manager *mgr,
  161. bool applying)
  162. {
  163. struct omap_overlay_info *oi;
  164. struct omap_overlay_manager_info *mi;
  165. struct omap_overlay *ovl;
  166. struct omap_overlay_info *ois[MAX_DSS_OVERLAYS];
  167. struct ovl_priv_data *op;
  168. struct mgr_priv_data *mp;
  169. mp = get_mgr_priv(mgr);
  170. if (!mp->enabled)
  171. return 0;
  172. if (applying && mp->user_info_dirty)
  173. mi = &mp->user_info;
  174. else
  175. mi = &mp->info;
  176. /* collect the infos to be tested into the array */
  177. list_for_each_entry(ovl, &mgr->overlays, list) {
  178. op = get_ovl_priv(ovl);
  179. if (!op->enabled && !op->enabling)
  180. oi = NULL;
  181. else if (applying && op->user_info_dirty)
  182. oi = &op->user_info;
  183. else
  184. oi = &op->info;
  185. ois[ovl->id] = oi;
  186. }
  187. return dss_mgr_check(mgr, mi, &mp->timings, &mp->lcd_config, ois);
  188. }
  189. /*
  190. * check manager and overlay settings using overlay_info from data->info
  191. */
  192. static int dss_check_settings(struct omap_overlay_manager *mgr)
  193. {
  194. return dss_check_settings_low(mgr, false);
  195. }
  196. /*
  197. * check manager and overlay settings using overlay_info from ovl->info if
  198. * dirty and from data->info otherwise
  199. */
  200. static int dss_check_settings_apply(struct omap_overlay_manager *mgr)
  201. {
  202. return dss_check_settings_low(mgr, true);
  203. }
  204. static bool need_isr(void)
  205. {
  206. const int num_mgrs = dss_feat_get_num_mgrs();
  207. int i;
  208. for (i = 0; i < num_mgrs; ++i) {
  209. struct omap_overlay_manager *mgr;
  210. struct mgr_priv_data *mp;
  211. struct omap_overlay *ovl;
  212. mgr = omap_dss_get_overlay_manager(i);
  213. mp = get_mgr_priv(mgr);
  214. if (!mp->enabled)
  215. continue;
  216. if (mgr_manual_update(mgr)) {
  217. /* to catch FRAMEDONE */
  218. if (mp->updating)
  219. return true;
  220. } else {
  221. /* to catch GO bit going down */
  222. if (mp->busy)
  223. return true;
  224. /* to write new values to registers */
  225. if (mp->info_dirty)
  226. return true;
  227. /* to set GO bit */
  228. if (mp->shadow_info_dirty)
  229. return true;
  230. /*
  231. * NOTE: we don't check extra_info flags for disabled
  232. * managers, once the manager is enabled, the extra_info
  233. * related manager changes will be taken in by HW.
  234. */
  235. /* to write new values to registers */
  236. if (mp->extra_info_dirty)
  237. return true;
  238. /* to set GO bit */
  239. if (mp->shadow_extra_info_dirty)
  240. return true;
  241. list_for_each_entry(ovl, &mgr->overlays, list) {
  242. struct ovl_priv_data *op;
  243. op = get_ovl_priv(ovl);
  244. /*
  245. * NOTE: we check extra_info flags even for
  246. * disabled overlays, as extra_infos need to be
  247. * always written.
  248. */
  249. /* to write new values to registers */
  250. if (op->extra_info_dirty)
  251. return true;
  252. /* to set GO bit */
  253. if (op->shadow_extra_info_dirty)
  254. return true;
  255. if (!op->enabled)
  256. continue;
  257. /* to write new values to registers */
  258. if (op->info_dirty)
  259. return true;
  260. /* to set GO bit */
  261. if (op->shadow_info_dirty)
  262. return true;
  263. }
  264. }
  265. }
  266. return false;
  267. }
  268. static bool need_go(struct omap_overlay_manager *mgr)
  269. {
  270. struct omap_overlay *ovl;
  271. struct mgr_priv_data *mp;
  272. struct ovl_priv_data *op;
  273. mp = get_mgr_priv(mgr);
  274. if (mp->shadow_info_dirty || mp->shadow_extra_info_dirty)
  275. return true;
  276. list_for_each_entry(ovl, &mgr->overlays, list) {
  277. op = get_ovl_priv(ovl);
  278. if (op->shadow_info_dirty || op->shadow_extra_info_dirty)
  279. return true;
  280. }
  281. return false;
  282. }
  283. /* returns true if an extra_info field is currently being updated */
  284. static bool extra_info_update_ongoing(void)
  285. {
  286. const int num_mgrs = dss_feat_get_num_mgrs();
  287. int i;
  288. for (i = 0; i < num_mgrs; ++i) {
  289. struct omap_overlay_manager *mgr;
  290. struct omap_overlay *ovl;
  291. struct mgr_priv_data *mp;
  292. mgr = omap_dss_get_overlay_manager(i);
  293. mp = get_mgr_priv(mgr);
  294. if (!mp->enabled)
  295. continue;
  296. if (!mp->updating)
  297. continue;
  298. if (mp->extra_info_dirty || mp->shadow_extra_info_dirty)
  299. return true;
  300. list_for_each_entry(ovl, &mgr->overlays, list) {
  301. struct ovl_priv_data *op = get_ovl_priv(ovl);
  302. if (op->extra_info_dirty || op->shadow_extra_info_dirty)
  303. return true;
  304. }
  305. }
  306. return false;
  307. }
  308. /* wait until no extra_info updates are pending */
  309. static void wait_pending_extra_info_updates(void)
  310. {
  311. bool updating;
  312. unsigned long flags;
  313. unsigned long t;
  314. int r;
  315. spin_lock_irqsave(&data_lock, flags);
  316. updating = extra_info_update_ongoing();
  317. if (!updating) {
  318. spin_unlock_irqrestore(&data_lock, flags);
  319. return;
  320. }
  321. init_completion(&extra_updated_completion);
  322. spin_unlock_irqrestore(&data_lock, flags);
  323. t = msecs_to_jiffies(500);
  324. r = wait_for_completion_timeout(&extra_updated_completion, t);
  325. if (r == 0)
  326. DSSWARN("timeout in wait_pending_extra_info_updates\n");
  327. else if (r < 0)
  328. DSSERR("wait_pending_extra_info_updates failed: %d\n", r);
  329. }
  330. int dss_mgr_wait_for_go(struct omap_overlay_manager *mgr)
  331. {
  332. unsigned long timeout = msecs_to_jiffies(500);
  333. struct mgr_priv_data *mp;
  334. u32 irq;
  335. int r;
  336. int i;
  337. struct omap_dss_device *dssdev = mgr->device;
  338. if (!dssdev || dssdev->state != OMAP_DSS_DISPLAY_ACTIVE)
  339. return 0;
  340. if (mgr_manual_update(mgr))
  341. return 0;
  342. r = dispc_runtime_get();
  343. if (r)
  344. return r;
  345. irq = dispc_mgr_get_vsync_irq(mgr->id);
  346. mp = get_mgr_priv(mgr);
  347. i = 0;
  348. while (1) {
  349. unsigned long flags;
  350. bool shadow_dirty, dirty;
  351. spin_lock_irqsave(&data_lock, flags);
  352. dirty = mp->info_dirty;
  353. shadow_dirty = mp->shadow_info_dirty;
  354. spin_unlock_irqrestore(&data_lock, flags);
  355. if (!dirty && !shadow_dirty) {
  356. r = 0;
  357. break;
  358. }
  359. /* 4 iterations is the worst case:
  360. * 1 - initial iteration, dirty = true (between VFP and VSYNC)
  361. * 2 - first VSYNC, dirty = true
  362. * 3 - dirty = false, shadow_dirty = true
  363. * 4 - shadow_dirty = false */
  364. if (i++ == 3) {
  365. DSSERR("mgr(%d)->wait_for_go() not finishing\n",
  366. mgr->id);
  367. r = 0;
  368. break;
  369. }
  370. r = omap_dispc_wait_for_irq_interruptible_timeout(irq, timeout);
  371. if (r == -ERESTARTSYS)
  372. break;
  373. if (r) {
  374. DSSERR("mgr(%d)->wait_for_go() timeout\n", mgr->id);
  375. break;
  376. }
  377. }
  378. dispc_runtime_put();
  379. return r;
  380. }
  381. int dss_mgr_wait_for_go_ovl(struct omap_overlay *ovl)
  382. {
  383. unsigned long timeout = msecs_to_jiffies(500);
  384. struct ovl_priv_data *op;
  385. struct omap_dss_device *dssdev;
  386. u32 irq;
  387. int r;
  388. int i;
  389. if (!ovl->manager)
  390. return 0;
  391. dssdev = ovl->manager->device;
  392. if (!dssdev || dssdev->state != OMAP_DSS_DISPLAY_ACTIVE)
  393. return 0;
  394. if (ovl_manual_update(ovl))
  395. return 0;
  396. r = dispc_runtime_get();
  397. if (r)
  398. return r;
  399. irq = dispc_mgr_get_vsync_irq(ovl->manager->id);
  400. op = get_ovl_priv(ovl);
  401. i = 0;
  402. while (1) {
  403. unsigned long flags;
  404. bool shadow_dirty, dirty;
  405. spin_lock_irqsave(&data_lock, flags);
  406. dirty = op->info_dirty;
  407. shadow_dirty = op->shadow_info_dirty;
  408. spin_unlock_irqrestore(&data_lock, flags);
  409. if (!dirty && !shadow_dirty) {
  410. r = 0;
  411. break;
  412. }
  413. /* 4 iterations is the worst case:
  414. * 1 - initial iteration, dirty = true (between VFP and VSYNC)
  415. * 2 - first VSYNC, dirty = true
  416. * 3 - dirty = false, shadow_dirty = true
  417. * 4 - shadow_dirty = false */
  418. if (i++ == 3) {
  419. DSSERR("ovl(%d)->wait_for_go() not finishing\n",
  420. ovl->id);
  421. r = 0;
  422. break;
  423. }
  424. r = omap_dispc_wait_for_irq_interruptible_timeout(irq, timeout);
  425. if (r == -ERESTARTSYS)
  426. break;
  427. if (r) {
  428. DSSERR("ovl(%d)->wait_for_go() timeout\n", ovl->id);
  429. break;
  430. }
  431. }
  432. dispc_runtime_put();
  433. return r;
  434. }
  435. static void dss_ovl_write_regs(struct omap_overlay *ovl)
  436. {
  437. struct ovl_priv_data *op = get_ovl_priv(ovl);
  438. struct omap_overlay_info *oi;
  439. bool replication;
  440. struct mgr_priv_data *mp;
  441. int r;
  442. DSSDBGF("%d", ovl->id);
  443. if (!op->enabled || !op->info_dirty)
  444. return;
  445. oi = &op->info;
  446. mp = get_mgr_priv(ovl->manager);
  447. replication = dss_ovl_use_replication(mp->lcd_config, oi->color_mode);
  448. r = dispc_ovl_setup(ovl->id, oi, replication, &mp->timings);
  449. if (r) {
  450. /*
  451. * We can't do much here, as this function can be called from
  452. * vsync interrupt.
  453. */
  454. DSSERR("dispc_ovl_setup failed for ovl %d\n", ovl->id);
  455. /* This will leave fifo configurations in a nonoptimal state */
  456. op->enabled = false;
  457. dispc_ovl_enable(ovl->id, false);
  458. return;
  459. }
  460. op->info_dirty = false;
  461. if (mp->updating)
  462. op->shadow_info_dirty = true;
  463. }
  464. static void dss_ovl_write_regs_extra(struct omap_overlay *ovl)
  465. {
  466. struct ovl_priv_data *op = get_ovl_priv(ovl);
  467. struct mgr_priv_data *mp;
  468. DSSDBGF("%d", ovl->id);
  469. if (!op->extra_info_dirty)
  470. return;
  471. /* note: write also when op->enabled == false, so that the ovl gets
  472. * disabled */
  473. dispc_ovl_enable(ovl->id, op->enabled);
  474. dispc_ovl_set_channel_out(ovl->id, op->channel);
  475. dispc_ovl_set_fifo_threshold(ovl->id, op->fifo_low, op->fifo_high);
  476. mp = get_mgr_priv(ovl->manager);
  477. op->extra_info_dirty = false;
  478. if (mp->updating)
  479. op->shadow_extra_info_dirty = true;
  480. }
  481. static void dss_mgr_write_regs(struct omap_overlay_manager *mgr)
  482. {
  483. struct mgr_priv_data *mp = get_mgr_priv(mgr);
  484. struct omap_overlay *ovl;
  485. DSSDBGF("%d", mgr->id);
  486. if (!mp->enabled)
  487. return;
  488. WARN_ON(mp->busy);
  489. /* Commit overlay settings */
  490. list_for_each_entry(ovl, &mgr->overlays, list) {
  491. dss_ovl_write_regs(ovl);
  492. dss_ovl_write_regs_extra(ovl);
  493. }
  494. if (mp->info_dirty) {
  495. dispc_mgr_setup(mgr->id, &mp->info);
  496. mp->info_dirty = false;
  497. if (mp->updating)
  498. mp->shadow_info_dirty = true;
  499. }
  500. }
  501. static void dss_mgr_write_regs_extra(struct omap_overlay_manager *mgr)
  502. {
  503. struct mgr_priv_data *mp = get_mgr_priv(mgr);
  504. DSSDBGF("%d", mgr->id);
  505. if (!mp->extra_info_dirty)
  506. return;
  507. dispc_mgr_set_timings(mgr->id, &mp->timings);
  508. /* lcd_config parameters */
  509. if (dss_mgr_is_lcd(mgr->id)) {
  510. dispc_mgr_set_io_pad_mode(mp->lcd_config.io_pad_mode);
  511. dispc_mgr_enable_stallmode(mgr->id, mp->lcd_config.stallmode);
  512. dispc_mgr_enable_fifohandcheck(mgr->id,
  513. mp->lcd_config.fifohandcheck);
  514. dispc_mgr_set_clock_div(mgr->id, &mp->lcd_config.clock_info);
  515. dispc_mgr_set_tft_data_lines(mgr->id,
  516. mp->lcd_config.video_port_width);
  517. dispc_lcd_enable_signal_polarity(mp->lcd_config.lcden_sig_polarity);
  518. dispc_mgr_set_lcd_type_tft(mgr->id);
  519. }
  520. mp->extra_info_dirty = false;
  521. if (mp->updating)
  522. mp->shadow_extra_info_dirty = true;
  523. }
  524. static void dss_write_regs(void)
  525. {
  526. const int num_mgrs = omap_dss_get_num_overlay_managers();
  527. int i;
  528. for (i = 0; i < num_mgrs; ++i) {
  529. struct omap_overlay_manager *mgr;
  530. struct mgr_priv_data *mp;
  531. int r;
  532. mgr = omap_dss_get_overlay_manager(i);
  533. mp = get_mgr_priv(mgr);
  534. if (!mp->enabled || mgr_manual_update(mgr) || mp->busy)
  535. continue;
  536. r = dss_check_settings(mgr);
  537. if (r) {
  538. DSSERR("cannot write registers for manager %s: "
  539. "illegal configuration\n", mgr->name);
  540. continue;
  541. }
  542. dss_mgr_write_regs(mgr);
  543. dss_mgr_write_regs_extra(mgr);
  544. }
  545. }
  546. static void dss_set_go_bits(void)
  547. {
  548. const int num_mgrs = omap_dss_get_num_overlay_managers();
  549. int i;
  550. for (i = 0; i < num_mgrs; ++i) {
  551. struct omap_overlay_manager *mgr;
  552. struct mgr_priv_data *mp;
  553. mgr = omap_dss_get_overlay_manager(i);
  554. mp = get_mgr_priv(mgr);
  555. if (!mp->enabled || mgr_manual_update(mgr) || mp->busy)
  556. continue;
  557. if (!need_go(mgr))
  558. continue;
  559. mp->busy = true;
  560. if (!dss_data.irq_enabled && need_isr())
  561. dss_register_vsync_isr();
  562. dispc_mgr_go(mgr->id);
  563. }
  564. }
  565. static void mgr_clear_shadow_dirty(struct omap_overlay_manager *mgr)
  566. {
  567. struct omap_overlay *ovl;
  568. struct mgr_priv_data *mp;
  569. struct ovl_priv_data *op;
  570. mp = get_mgr_priv(mgr);
  571. mp->shadow_info_dirty = false;
  572. mp->shadow_extra_info_dirty = false;
  573. list_for_each_entry(ovl, &mgr->overlays, list) {
  574. op = get_ovl_priv(ovl);
  575. op->shadow_info_dirty = false;
  576. op->shadow_extra_info_dirty = false;
  577. }
  578. }
  579. void dss_mgr_start_update(struct omap_overlay_manager *mgr)
  580. {
  581. struct mgr_priv_data *mp = get_mgr_priv(mgr);
  582. unsigned long flags;
  583. int r;
  584. spin_lock_irqsave(&data_lock, flags);
  585. WARN_ON(mp->updating);
  586. r = dss_check_settings(mgr);
  587. if (r) {
  588. DSSERR("cannot start manual update: illegal configuration\n");
  589. spin_unlock_irqrestore(&data_lock, flags);
  590. return;
  591. }
  592. dss_mgr_write_regs(mgr);
  593. dss_mgr_write_regs_extra(mgr);
  594. mp->updating = true;
  595. if (!dss_data.irq_enabled && need_isr())
  596. dss_register_vsync_isr();
  597. dispc_mgr_enable(mgr->id, true);
  598. mgr_clear_shadow_dirty(mgr);
  599. spin_unlock_irqrestore(&data_lock, flags);
  600. }
  601. static void dss_apply_irq_handler(void *data, u32 mask);
  602. static void dss_register_vsync_isr(void)
  603. {
  604. const int num_mgrs = dss_feat_get_num_mgrs();
  605. u32 mask;
  606. int r, i;
  607. mask = 0;
  608. for (i = 0; i < num_mgrs; ++i)
  609. mask |= dispc_mgr_get_vsync_irq(i);
  610. for (i = 0; i < num_mgrs; ++i)
  611. mask |= dispc_mgr_get_framedone_irq(i);
  612. r = omap_dispc_register_isr(dss_apply_irq_handler, NULL, mask);
  613. WARN_ON(r);
  614. dss_data.irq_enabled = true;
  615. }
  616. static void dss_unregister_vsync_isr(void)
  617. {
  618. const int num_mgrs = dss_feat_get_num_mgrs();
  619. u32 mask;
  620. int r, i;
  621. mask = 0;
  622. for (i = 0; i < num_mgrs; ++i)
  623. mask |= dispc_mgr_get_vsync_irq(i);
  624. for (i = 0; i < num_mgrs; ++i)
  625. mask |= dispc_mgr_get_framedone_irq(i);
  626. r = omap_dispc_unregister_isr(dss_apply_irq_handler, NULL, mask);
  627. WARN_ON(r);
  628. dss_data.irq_enabled = false;
  629. }
  630. static void dss_apply_irq_handler(void *data, u32 mask)
  631. {
  632. const int num_mgrs = dss_feat_get_num_mgrs();
  633. int i;
  634. bool extra_updating;
  635. spin_lock(&data_lock);
  636. /* clear busy, updating flags, shadow_dirty flags */
  637. for (i = 0; i < num_mgrs; i++) {
  638. struct omap_overlay_manager *mgr;
  639. struct mgr_priv_data *mp;
  640. bool was_updating;
  641. mgr = omap_dss_get_overlay_manager(i);
  642. mp = get_mgr_priv(mgr);
  643. if (!mp->enabled)
  644. continue;
  645. was_updating = mp->updating;
  646. mp->updating = dispc_mgr_is_enabled(i);
  647. if (!mgr_manual_update(mgr)) {
  648. bool was_busy = mp->busy;
  649. mp->busy = dispc_mgr_go_busy(i);
  650. if (was_busy && !mp->busy)
  651. mgr_clear_shadow_dirty(mgr);
  652. }
  653. }
  654. dss_write_regs();
  655. dss_set_go_bits();
  656. extra_updating = extra_info_update_ongoing();
  657. if (!extra_updating)
  658. complete_all(&extra_updated_completion);
  659. if (!need_isr())
  660. dss_unregister_vsync_isr();
  661. spin_unlock(&data_lock);
  662. }
  663. static void omap_dss_mgr_apply_ovl(struct omap_overlay *ovl)
  664. {
  665. struct ovl_priv_data *op;
  666. op = get_ovl_priv(ovl);
  667. if (!op->user_info_dirty)
  668. return;
  669. op->user_info_dirty = false;
  670. op->info_dirty = true;
  671. op->info = op->user_info;
  672. }
  673. static void omap_dss_mgr_apply_mgr(struct omap_overlay_manager *mgr)
  674. {
  675. struct mgr_priv_data *mp;
  676. mp = get_mgr_priv(mgr);
  677. if (!mp->user_info_dirty)
  678. return;
  679. mp->user_info_dirty = false;
  680. mp->info_dirty = true;
  681. mp->info = mp->user_info;
  682. }
  683. int omap_dss_mgr_apply(struct omap_overlay_manager *mgr)
  684. {
  685. unsigned long flags;
  686. struct omap_overlay *ovl;
  687. int r;
  688. DSSDBG("omap_dss_mgr_apply(%s)\n", mgr->name);
  689. spin_lock_irqsave(&data_lock, flags);
  690. r = dss_check_settings_apply(mgr);
  691. if (r) {
  692. spin_unlock_irqrestore(&data_lock, flags);
  693. DSSERR("failed to apply settings: illegal configuration.\n");
  694. return r;
  695. }
  696. /* Configure overlays */
  697. list_for_each_entry(ovl, &mgr->overlays, list)
  698. omap_dss_mgr_apply_ovl(ovl);
  699. /* Configure manager */
  700. omap_dss_mgr_apply_mgr(mgr);
  701. dss_write_regs();
  702. dss_set_go_bits();
  703. spin_unlock_irqrestore(&data_lock, flags);
  704. return 0;
  705. }
  706. static void dss_apply_ovl_enable(struct omap_overlay *ovl, bool enable)
  707. {
  708. struct ovl_priv_data *op;
  709. op = get_ovl_priv(ovl);
  710. if (op->enabled == enable)
  711. return;
  712. op->enabled = enable;
  713. op->extra_info_dirty = true;
  714. }
  715. static void dss_apply_ovl_fifo_thresholds(struct omap_overlay *ovl,
  716. u32 fifo_low, u32 fifo_high)
  717. {
  718. struct ovl_priv_data *op = get_ovl_priv(ovl);
  719. if (op->fifo_low == fifo_low && op->fifo_high == fifo_high)
  720. return;
  721. op->fifo_low = fifo_low;
  722. op->fifo_high = fifo_high;
  723. op->extra_info_dirty = true;
  724. }
  725. static void dss_ovl_setup_fifo(struct omap_overlay *ovl)
  726. {
  727. struct ovl_priv_data *op = get_ovl_priv(ovl);
  728. u32 fifo_low, fifo_high;
  729. bool use_fifo_merge = false;
  730. if (!op->enabled && !op->enabling)
  731. return;
  732. dispc_ovl_compute_fifo_thresholds(ovl->id, &fifo_low, &fifo_high,
  733. use_fifo_merge, ovl_manual_update(ovl));
  734. dss_apply_ovl_fifo_thresholds(ovl, fifo_low, fifo_high);
  735. }
  736. static void dss_mgr_setup_fifos(struct omap_overlay_manager *mgr)
  737. {
  738. struct omap_overlay *ovl;
  739. struct mgr_priv_data *mp;
  740. mp = get_mgr_priv(mgr);
  741. if (!mp->enabled)
  742. return;
  743. list_for_each_entry(ovl, &mgr->overlays, list)
  744. dss_ovl_setup_fifo(ovl);
  745. }
  746. static void dss_setup_fifos(void)
  747. {
  748. const int num_mgrs = omap_dss_get_num_overlay_managers();
  749. struct omap_overlay_manager *mgr;
  750. int i;
  751. for (i = 0; i < num_mgrs; ++i) {
  752. mgr = omap_dss_get_overlay_manager(i);
  753. dss_mgr_setup_fifos(mgr);
  754. }
  755. }
  756. int dss_mgr_enable(struct omap_overlay_manager *mgr)
  757. {
  758. struct mgr_priv_data *mp = get_mgr_priv(mgr);
  759. unsigned long flags;
  760. int r;
  761. mutex_lock(&apply_lock);
  762. if (mp->enabled)
  763. goto out;
  764. spin_lock_irqsave(&data_lock, flags);
  765. mp->enabled = true;
  766. r = dss_check_settings(mgr);
  767. if (r) {
  768. DSSERR("failed to enable manager %d: check_settings failed\n",
  769. mgr->id);
  770. goto err;
  771. }
  772. dss_setup_fifos();
  773. dss_write_regs();
  774. dss_set_go_bits();
  775. if (!mgr_manual_update(mgr))
  776. mp->updating = true;
  777. spin_unlock_irqrestore(&data_lock, flags);
  778. if (!mgr_manual_update(mgr))
  779. dispc_mgr_enable(mgr->id, true);
  780. out:
  781. mutex_unlock(&apply_lock);
  782. return 0;
  783. err:
  784. mp->enabled = false;
  785. spin_unlock_irqrestore(&data_lock, flags);
  786. mutex_unlock(&apply_lock);
  787. return r;
  788. }
  789. void dss_mgr_disable(struct omap_overlay_manager *mgr)
  790. {
  791. struct mgr_priv_data *mp = get_mgr_priv(mgr);
  792. unsigned long flags;
  793. mutex_lock(&apply_lock);
  794. if (!mp->enabled)
  795. goto out;
  796. if (!mgr_manual_update(mgr))
  797. dispc_mgr_enable(mgr->id, false);
  798. spin_lock_irqsave(&data_lock, flags);
  799. mp->updating = false;
  800. mp->enabled = false;
  801. spin_unlock_irqrestore(&data_lock, flags);
  802. out:
  803. mutex_unlock(&apply_lock);
  804. }
  805. int dss_mgr_set_info(struct omap_overlay_manager *mgr,
  806. struct omap_overlay_manager_info *info)
  807. {
  808. struct mgr_priv_data *mp = get_mgr_priv(mgr);
  809. unsigned long flags;
  810. int r;
  811. r = dss_mgr_simple_check(mgr, info);
  812. if (r)
  813. return r;
  814. spin_lock_irqsave(&data_lock, flags);
  815. mp->user_info = *info;
  816. mp->user_info_dirty = true;
  817. spin_unlock_irqrestore(&data_lock, flags);
  818. return 0;
  819. }
  820. void dss_mgr_get_info(struct omap_overlay_manager *mgr,
  821. struct omap_overlay_manager_info *info)
  822. {
  823. struct mgr_priv_data *mp = get_mgr_priv(mgr);
  824. unsigned long flags;
  825. spin_lock_irqsave(&data_lock, flags);
  826. *info = mp->user_info;
  827. spin_unlock_irqrestore(&data_lock, flags);
  828. }
  829. int dss_mgr_set_device(struct omap_overlay_manager *mgr,
  830. struct omap_dss_device *dssdev)
  831. {
  832. int r;
  833. mutex_lock(&apply_lock);
  834. if (dssdev->manager) {
  835. DSSERR("display '%s' already has a manager '%s'\n",
  836. dssdev->name, dssdev->manager->name);
  837. r = -EINVAL;
  838. goto err;
  839. }
  840. if ((mgr->supported_displays & dssdev->type) == 0) {
  841. DSSERR("display '%s' does not support manager '%s'\n",
  842. dssdev->name, mgr->name);
  843. r = -EINVAL;
  844. goto err;
  845. }
  846. dssdev->manager = mgr;
  847. mgr->device = dssdev;
  848. mutex_unlock(&apply_lock);
  849. return 0;
  850. err:
  851. mutex_unlock(&apply_lock);
  852. return r;
  853. }
  854. int dss_mgr_unset_device(struct omap_overlay_manager *mgr)
  855. {
  856. int r;
  857. mutex_lock(&apply_lock);
  858. if (!mgr->device) {
  859. DSSERR("failed to unset display, display not set.\n");
  860. r = -EINVAL;
  861. goto err;
  862. }
  863. /*
  864. * Don't allow currently enabled displays to have the overlay manager
  865. * pulled out from underneath them
  866. */
  867. if (mgr->device->state != OMAP_DSS_DISPLAY_DISABLED) {
  868. r = -EINVAL;
  869. goto err;
  870. }
  871. mgr->device->manager = NULL;
  872. mgr->device = NULL;
  873. mutex_unlock(&apply_lock);
  874. return 0;
  875. err:
  876. mutex_unlock(&apply_lock);
  877. return r;
  878. }
  879. static void dss_apply_mgr_timings(struct omap_overlay_manager *mgr,
  880. const struct omap_video_timings *timings)
  881. {
  882. struct mgr_priv_data *mp = get_mgr_priv(mgr);
  883. mp->timings = *timings;
  884. mp->extra_info_dirty = true;
  885. }
  886. void dss_mgr_set_timings(struct omap_overlay_manager *mgr,
  887. const struct omap_video_timings *timings)
  888. {
  889. unsigned long flags;
  890. struct mgr_priv_data *mp = get_mgr_priv(mgr);
  891. spin_lock_irqsave(&data_lock, flags);
  892. if (mp->updating) {
  893. DSSERR("cannot set timings for %s: manager needs to be disabled\n",
  894. mgr->name);
  895. goto out;
  896. }
  897. dss_apply_mgr_timings(mgr, timings);
  898. out:
  899. spin_unlock_irqrestore(&data_lock, flags);
  900. }
  901. static void dss_apply_mgr_lcd_config(struct omap_overlay_manager *mgr,
  902. const struct dss_lcd_mgr_config *config)
  903. {
  904. struct mgr_priv_data *mp = get_mgr_priv(mgr);
  905. mp->lcd_config = *config;
  906. mp->extra_info_dirty = true;
  907. }
  908. void dss_mgr_set_lcd_config(struct omap_overlay_manager *mgr,
  909. const struct dss_lcd_mgr_config *config)
  910. {
  911. unsigned long flags;
  912. struct mgr_priv_data *mp = get_mgr_priv(mgr);
  913. spin_lock_irqsave(&data_lock, flags);
  914. if (mp->enabled) {
  915. DSSERR("cannot apply lcd config for %s: manager needs to be disabled\n",
  916. mgr->name);
  917. goto out;
  918. }
  919. dss_apply_mgr_lcd_config(mgr, config);
  920. out:
  921. spin_unlock_irqrestore(&data_lock, flags);
  922. }
  923. int dss_ovl_set_info(struct omap_overlay *ovl,
  924. struct omap_overlay_info *info)
  925. {
  926. struct ovl_priv_data *op = get_ovl_priv(ovl);
  927. unsigned long flags;
  928. int r;
  929. r = dss_ovl_simple_check(ovl, info);
  930. if (r)
  931. return r;
  932. spin_lock_irqsave(&data_lock, flags);
  933. op->user_info = *info;
  934. op->user_info_dirty = true;
  935. spin_unlock_irqrestore(&data_lock, flags);
  936. return 0;
  937. }
  938. void dss_ovl_get_info(struct omap_overlay *ovl,
  939. struct omap_overlay_info *info)
  940. {
  941. struct ovl_priv_data *op = get_ovl_priv(ovl);
  942. unsigned long flags;
  943. spin_lock_irqsave(&data_lock, flags);
  944. *info = op->user_info;
  945. spin_unlock_irqrestore(&data_lock, flags);
  946. }
  947. int dss_ovl_set_manager(struct omap_overlay *ovl,
  948. struct omap_overlay_manager *mgr)
  949. {
  950. struct ovl_priv_data *op = get_ovl_priv(ovl);
  951. unsigned long flags;
  952. int r;
  953. if (!mgr)
  954. return -EINVAL;
  955. mutex_lock(&apply_lock);
  956. if (ovl->manager) {
  957. DSSERR("overlay '%s' already has a manager '%s'\n",
  958. ovl->name, ovl->manager->name);
  959. r = -EINVAL;
  960. goto err;
  961. }
  962. spin_lock_irqsave(&data_lock, flags);
  963. if (op->enabled) {
  964. spin_unlock_irqrestore(&data_lock, flags);
  965. DSSERR("overlay has to be disabled to change the manager\n");
  966. r = -EINVAL;
  967. goto err;
  968. }
  969. op->channel = mgr->id;
  970. op->extra_info_dirty = true;
  971. ovl->manager = mgr;
  972. list_add_tail(&ovl->list, &mgr->overlays);
  973. spin_unlock_irqrestore(&data_lock, flags);
  974. /* XXX: When there is an overlay on a DSI manual update display, and
  975. * the overlay is first disabled, then moved to tv, and enabled, we
  976. * seem to get SYNC_LOST_DIGIT error.
  977. *
  978. * Waiting doesn't seem to help, but updating the manual update display
  979. * after disabling the overlay seems to fix this. This hints that the
  980. * overlay is perhaps somehow tied to the LCD output until the output
  981. * is updated.
  982. *
  983. * Userspace workaround for this is to update the LCD after disabling
  984. * the overlay, but before moving the overlay to TV.
  985. */
  986. mutex_unlock(&apply_lock);
  987. return 0;
  988. err:
  989. mutex_unlock(&apply_lock);
  990. return r;
  991. }
  992. int dss_ovl_unset_manager(struct omap_overlay *ovl)
  993. {
  994. struct ovl_priv_data *op = get_ovl_priv(ovl);
  995. unsigned long flags;
  996. int r;
  997. mutex_lock(&apply_lock);
  998. if (!ovl->manager) {
  999. DSSERR("failed to detach overlay: manager not set\n");
  1000. r = -EINVAL;
  1001. goto err;
  1002. }
  1003. spin_lock_irqsave(&data_lock, flags);
  1004. if (op->enabled) {
  1005. spin_unlock_irqrestore(&data_lock, flags);
  1006. DSSERR("overlay has to be disabled to unset the manager\n");
  1007. r = -EINVAL;
  1008. goto err;
  1009. }
  1010. spin_unlock_irqrestore(&data_lock, flags);
  1011. /* wait for pending extra_info updates to ensure the ovl is disabled */
  1012. wait_pending_extra_info_updates();
  1013. spin_lock_irqsave(&data_lock, flags);
  1014. op->channel = -1;
  1015. ovl->manager = NULL;
  1016. list_del(&ovl->list);
  1017. spin_unlock_irqrestore(&data_lock, flags);
  1018. mutex_unlock(&apply_lock);
  1019. return 0;
  1020. err:
  1021. mutex_unlock(&apply_lock);
  1022. return r;
  1023. }
  1024. bool dss_ovl_is_enabled(struct omap_overlay *ovl)
  1025. {
  1026. struct ovl_priv_data *op = get_ovl_priv(ovl);
  1027. unsigned long flags;
  1028. bool e;
  1029. spin_lock_irqsave(&data_lock, flags);
  1030. e = op->enabled;
  1031. spin_unlock_irqrestore(&data_lock, flags);
  1032. return e;
  1033. }
  1034. int dss_ovl_enable(struct omap_overlay *ovl)
  1035. {
  1036. struct ovl_priv_data *op = get_ovl_priv(ovl);
  1037. unsigned long flags;
  1038. int r;
  1039. mutex_lock(&apply_lock);
  1040. if (op->enabled) {
  1041. r = 0;
  1042. goto err1;
  1043. }
  1044. if (ovl->manager == NULL || ovl->manager->device == NULL) {
  1045. r = -EINVAL;
  1046. goto err1;
  1047. }
  1048. spin_lock_irqsave(&data_lock, flags);
  1049. op->enabling = true;
  1050. r = dss_check_settings(ovl->manager);
  1051. if (r) {
  1052. DSSERR("failed to enable overlay %d: check_settings failed\n",
  1053. ovl->id);
  1054. goto err2;
  1055. }
  1056. dss_setup_fifos();
  1057. op->enabling = false;
  1058. dss_apply_ovl_enable(ovl, true);
  1059. dss_write_regs();
  1060. dss_set_go_bits();
  1061. spin_unlock_irqrestore(&data_lock, flags);
  1062. mutex_unlock(&apply_lock);
  1063. return 0;
  1064. err2:
  1065. op->enabling = false;
  1066. spin_unlock_irqrestore(&data_lock, flags);
  1067. err1:
  1068. mutex_unlock(&apply_lock);
  1069. return r;
  1070. }
  1071. int dss_ovl_disable(struct omap_overlay *ovl)
  1072. {
  1073. struct ovl_priv_data *op = get_ovl_priv(ovl);
  1074. unsigned long flags;
  1075. int r;
  1076. mutex_lock(&apply_lock);
  1077. if (!op->enabled) {
  1078. r = 0;
  1079. goto err;
  1080. }
  1081. if (ovl->manager == NULL || ovl->manager->device == NULL) {
  1082. r = -EINVAL;
  1083. goto err;
  1084. }
  1085. spin_lock_irqsave(&data_lock, flags);
  1086. dss_apply_ovl_enable(ovl, false);
  1087. dss_write_regs();
  1088. dss_set_go_bits();
  1089. spin_unlock_irqrestore(&data_lock, flags);
  1090. mutex_unlock(&apply_lock);
  1091. return 0;
  1092. err:
  1093. mutex_unlock(&apply_lock);
  1094. return r;
  1095. }