async_tx.h 6.3 KB

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  1. /*
  2. * Copyright © 2006, Intel Corporation.
  3. *
  4. * This program is free software; you can redistribute it and/or modify it
  5. * under the terms and conditions of the GNU General Public License,
  6. * version 2, as published by the Free Software Foundation.
  7. *
  8. * This program is distributed in the hope it will be useful, but WITHOUT
  9. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  10. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  11. * more details.
  12. *
  13. * You should have received a copy of the GNU General Public License along with
  14. * this program; if not, write to the Free Software Foundation, Inc.,
  15. * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  16. *
  17. */
  18. #ifndef _ASYNC_TX_H_
  19. #define _ASYNC_TX_H_
  20. #include <linux/dmaengine.h>
  21. #include <linux/spinlock.h>
  22. #include <linux/interrupt.h>
  23. /* on architectures without dma-mapping capabilities we need to ensure
  24. * that the asynchronous path compiles away
  25. */
  26. #ifdef CONFIG_HAS_DMA
  27. #define __async_inline
  28. #else
  29. #define __async_inline __always_inline
  30. #endif
  31. /**
  32. * dma_chan_ref - object used to manage dma channels received from the
  33. * dmaengine core.
  34. * @chan - the channel being tracked
  35. * @node - node for the channel to be placed on async_tx_master_list
  36. * @rcu - for list_del_rcu
  37. * @count - number of times this channel is listed in the pool
  38. * (for channels with multiple capabiities)
  39. */
  40. struct dma_chan_ref {
  41. struct dma_chan *chan;
  42. struct list_head node;
  43. struct rcu_head rcu;
  44. atomic_t count;
  45. };
  46. /**
  47. * async_tx_flags - modifiers for the async_* calls
  48. * @ASYNC_TX_XOR_ZERO_DST: this flag must be used for xor operations where the
  49. * the destination address is not a source. The asynchronous case handles this
  50. * implicitly, the synchronous case needs to zero the destination block.
  51. * @ASYNC_TX_XOR_DROP_DST: this flag must be used if the destination address is
  52. * also one of the source addresses. In the synchronous case the destination
  53. * address is an implied source, whereas the asynchronous case it must be listed
  54. * as a source. The destination address must be the first address in the source
  55. * array.
  56. * @ASYNC_TX_ACK: immediately ack the descriptor, precludes setting up a
  57. * dependency chain
  58. */
  59. enum async_tx_flags {
  60. ASYNC_TX_XOR_ZERO_DST = (1 << 0),
  61. ASYNC_TX_XOR_DROP_DST = (1 << 1),
  62. ASYNC_TX_ACK = (1 << 2),
  63. };
  64. /**
  65. * struct async_submit_ctl - async_tx submission/completion modifiers
  66. * @flags: submission modifiers
  67. * @depend_tx: parent dependency of the current operation being submitted
  68. * @cb_fn: callback routine to run at operation completion
  69. * @cb_param: parameter for the callback routine
  70. * @scribble: caller provided space for dma/page address conversions
  71. */
  72. struct async_submit_ctl {
  73. enum async_tx_flags flags;
  74. struct dma_async_tx_descriptor *depend_tx;
  75. dma_async_tx_callback cb_fn;
  76. void *cb_param;
  77. void *scribble;
  78. };
  79. #ifdef CONFIG_DMA_ENGINE
  80. #define async_tx_issue_pending_all dma_issue_pending_all
  81. /**
  82. * async_tx_issue_pending - send pending descriptor to the hardware channel
  83. * @tx: descriptor handle to retrieve hardware context
  84. *
  85. * Note: any dependent operations will have already been issued by
  86. * async_tx_channel_switch, or (in the case of no channel switch) will
  87. * be already pending on this channel.
  88. */
  89. static inline void async_tx_issue_pending(struct dma_async_tx_descriptor *tx)
  90. {
  91. if (likely(tx)) {
  92. struct dma_chan *chan = tx->chan;
  93. struct dma_device *dma = chan->device;
  94. dma->device_issue_pending(chan);
  95. }
  96. }
  97. #ifdef CONFIG_ARCH_HAS_ASYNC_TX_FIND_CHANNEL
  98. #include <asm/async_tx.h>
  99. #else
  100. #define async_tx_find_channel(dep, type, dst, dst_count, src, src_count, len) \
  101. __async_tx_find_channel(dep, type)
  102. struct dma_chan *
  103. __async_tx_find_channel(struct async_submit_ctl *submit,
  104. enum dma_transaction_type tx_type);
  105. #endif /* CONFIG_ARCH_HAS_ASYNC_TX_FIND_CHANNEL */
  106. #else
  107. static inline void async_tx_issue_pending_all(void)
  108. {
  109. do { } while (0);
  110. }
  111. static inline void async_tx_issue_pending(struct dma_async_tx_descriptor *tx)
  112. {
  113. do { } while (0);
  114. }
  115. static inline struct dma_chan *
  116. async_tx_find_channel(struct async_submit_ctl *submit,
  117. enum dma_transaction_type tx_type, struct page **dst,
  118. int dst_count, struct page **src, int src_count,
  119. size_t len)
  120. {
  121. return NULL;
  122. }
  123. #endif
  124. /**
  125. * async_tx_sync_epilog - actions to take if an operation is run synchronously
  126. * @cb_fn: function to call when the transaction completes
  127. * @cb_fn_param: parameter to pass to the callback routine
  128. */
  129. static inline void
  130. async_tx_sync_epilog(struct async_submit_ctl *submit)
  131. {
  132. if (submit->cb_fn)
  133. submit->cb_fn(submit->cb_param);
  134. }
  135. typedef union {
  136. unsigned long addr;
  137. struct page *page;
  138. dma_addr_t dma;
  139. } addr_conv_t;
  140. static inline void
  141. init_async_submit(struct async_submit_ctl *args, enum async_tx_flags flags,
  142. struct dma_async_tx_descriptor *tx,
  143. dma_async_tx_callback cb_fn, void *cb_param,
  144. addr_conv_t *scribble)
  145. {
  146. args->flags = flags;
  147. args->depend_tx = tx;
  148. args->cb_fn = cb_fn;
  149. args->cb_param = cb_param;
  150. args->scribble = scribble;
  151. }
  152. void async_tx_submit(struct dma_chan *chan, struct dma_async_tx_descriptor *tx,
  153. struct async_submit_ctl *submit);
  154. struct dma_async_tx_descriptor *
  155. async_xor(struct page *dest, struct page **src_list, unsigned int offset,
  156. int src_cnt, size_t len, struct async_submit_ctl *submit);
  157. struct dma_async_tx_descriptor *
  158. async_xor_val(struct page *dest, struct page **src_list, unsigned int offset,
  159. int src_cnt, size_t len, enum sum_check_flags *result,
  160. struct async_submit_ctl *submit);
  161. struct dma_async_tx_descriptor *
  162. async_memcpy(struct page *dest, struct page *src, unsigned int dest_offset,
  163. unsigned int src_offset, size_t len,
  164. struct async_submit_ctl *submit);
  165. struct dma_async_tx_descriptor *
  166. async_memset(struct page *dest, int val, unsigned int offset,
  167. size_t len, struct async_submit_ctl *submit);
  168. struct dma_async_tx_descriptor *async_trigger_callback(struct async_submit_ctl *submit);
  169. struct dma_async_tx_descriptor *
  170. async_gen_syndrome(struct page **blocks, unsigned int offset, int src_cnt,
  171. size_t len, struct async_submit_ctl *submit);
  172. struct dma_async_tx_descriptor *
  173. async_syndrome_val(struct page **blocks, unsigned int offset, int src_cnt,
  174. size_t len, enum sum_check_flags *pqres, struct page *spare,
  175. struct async_submit_ctl *submit);
  176. void async_tx_quiesce(struct dma_async_tx_descriptor **tx);
  177. #endif /* _ASYNC_TX_H_ */